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([59.188.211.160]) by smtp.googlemail.com with ESMTPSA id d9443c01a7336-218a1dcb3ffsm79202565ad.75.2024.12.18.10.29.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Dec 2024 10:29:02 -0800 (PST) From: Nick Chan To: Hector Martin , Sven Peter , Alyssa Rosenzweig , "Rafael J . Wysocki" , Viresh Kumar , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Asahi Linux , Linux ARM Kernel Architecture , Linux power management , Devicetree , LKML Cc: Nick Chan , Krzysztof Kozlowski Subject: [PATCH v3 1/7] dt-bindings: cpufreq: apple,cluster-cpufreq: Add A7-A11, T2 compatibles Date: Thu, 19 Dec 2024 02:25:03 +0800 Message-ID: <20241218182834.22334-2-towinchenmi@gmail.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241218182834.22334-1-towinchenmi@gmail.com> References: <20241218182834.22334-1-towinchenmi@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241218_102904_458232_E9FF0221 X-CRM114-Status: GOOD ( 10.09 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add compatibles for Apple A7-A11, T2 SoCs. Apple A7, A8, A8X gets the per-SoC compatible and the A7 "apple,s5l8960x-cluster-cpufreq" compatible. Apple A9, A9X, A10, A10X, T2, A11 gets the per-SoC compatible, M1 "apple,t8103-cluster-cpufreq" compatible, then the "apple,cluster-cpufreq" fallback compatible. Acked-by: Krzysztof Kozlowski Signed-off-by: Nick Chan --- .../bindings/cpufreq/apple,cluster-cpufreq.yaml | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/cpufreq/apple,cluster-cpufreq.yaml b/Documentation/devicetree/bindings/cpufreq/apple,cluster-cpufreq.yaml index 76cb9726660e..896276b8c6bb 100644 --- a/Documentation/devicetree/bindings/cpufreq/apple,cluster-cpufreq.yaml +++ b/Documentation/devicetree/bindings/cpufreq/apple,cluster-cpufreq.yaml @@ -24,9 +24,17 @@ properties: - apple,t8112-cluster-cpufreq - const: apple,cluster-cpufreq - items: - - const: apple,t6000-cluster-cpufreq + - enum: + - apple,s8000-cluster-cpufreq + - apple,t8010-cluster-cpufreq + - apple,t8015-cluster-cpufreq + - apple,t6000-cluster-cpufreq - const: apple,t8103-cluster-cpufreq - const: apple,cluster-cpufreq + - items: + - const: apple,t7000-cluster-cpufreq + - const: apple,s5l8960x-cluster-cpufreq + - const: apple,s5l8960x-cluster-cpufreq reg: maxItems: 1 From patchwork Wed Dec 18 18:25:04 2024 Content-Type: text/plain; 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([59.188.211.160]) by smtp.googlemail.com with ESMTPSA id d9443c01a7336-218a1dcb3ffsm79202565ad.75.2024.12.18.10.29.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Dec 2024 10:29:05 -0800 (PST) From: Nick Chan To: Hector Martin , Sven Peter , Alyssa Rosenzweig , "Rafael J . Wysocki" , Viresh Kumar , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Asahi Linux , Linux ARM Kernel Architecture , Linux power management , Devicetree , LKML Cc: Nick Chan Subject: [PATCH v3 2/7] cpufreq: apple-soc: Drop setting the PS2 field on M2+ Date: Thu, 19 Dec 2024 02:25:04 +0800 Message-ID: <20241218182834.22334-3-towinchenmi@gmail.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241218182834.22334-1-towinchenmi@gmail.com> References: <20241218182834.22334-1-towinchenmi@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241218_102907_409372_ADCB0133 X-CRM114-Status: GOOD ( 15.08 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Hector Martin Newer device do not use this. It is not known what this field does, but change the behavior to be same as macOS to be safe. Signed-off-by: Hector Martin Signed-off-by: Nick Chan --- drivers/cpufreq/apple-soc-cpufreq.c | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/drivers/cpufreq/apple-soc-cpufreq.c b/drivers/cpufreq/apple-soc-cpufreq.c index 4dcacab9b4bf..ad6c7b8f290c 100644 --- a/drivers/cpufreq/apple-soc-cpufreq.c +++ b/drivers/cpufreq/apple-soc-cpufreq.c @@ -25,7 +25,7 @@ #define APPLE_DVFS_CMD 0x20 #define APPLE_DVFS_CMD_BUSY BIT(31) #define APPLE_DVFS_CMD_SET BIT(25) -#define APPLE_DVFS_CMD_PS2 GENMASK(16, 12) +#define APPLE_DVFS_CMD_PS2 GENMASK(15, 12) #define APPLE_DVFS_CMD_PS1 GENMASK(4, 0) /* Same timebase as CPU counter (24MHz) */ @@ -55,6 +55,7 @@ #define APPLE_DVFS_TRANSITION_TIMEOUT 100 struct apple_soc_cpufreq_info { + bool has_ps2; u64 max_pstate; u64 cur_pstate_mask; u64 cur_pstate_shift; @@ -69,18 +70,21 @@ struct apple_cpu_priv { static struct cpufreq_driver apple_soc_cpufreq_driver; static const struct apple_soc_cpufreq_info soc_t8103_info = { + .has_ps2 = true, .max_pstate = 15, .cur_pstate_mask = APPLE_DVFS_STATUS_CUR_PS_T8103, .cur_pstate_shift = APPLE_DVFS_STATUS_CUR_PS_SHIFT_T8103, }; static const struct apple_soc_cpufreq_info soc_t8112_info = { + .has_ps2 = false, .max_pstate = 31, .cur_pstate_mask = APPLE_DVFS_STATUS_CUR_PS_T8112, .cur_pstate_shift = APPLE_DVFS_STATUS_CUR_PS_SHIFT_T8112, }; static const struct apple_soc_cpufreq_info soc_default_info = { + .has_ps2 = false, .max_pstate = 15, .cur_pstate_mask = 0, /* fallback */ }; @@ -148,9 +152,12 @@ static int apple_soc_cpufreq_set_target(struct cpufreq_policy *policy, return -EIO; } - reg &= ~(APPLE_DVFS_CMD_PS1 | APPLE_DVFS_CMD_PS2); + reg &= ~APPLE_DVFS_CMD_PS1; reg |= FIELD_PREP(APPLE_DVFS_CMD_PS1, pstate); - reg |= FIELD_PREP(APPLE_DVFS_CMD_PS2, pstate); + if (priv->info->has_ps2) { + reg &= ~APPLE_DVFS_CMD_PS2; + reg |= FIELD_PREP(APPLE_DVFS_CMD_PS2, pstate); + } reg |= APPLE_DVFS_CMD_SET; writeq_relaxed(reg, priv->reg_base + APPLE_DVFS_CMD); From patchwork Wed Dec 18 18:25:05 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nick Chan X-Patchwork-Id: 13914035 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D7715E77188 for ; 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([59.188.211.160]) by smtp.googlemail.com with ESMTPSA id d9443c01a7336-218a1dcb3ffsm79202565ad.75.2024.12.18.10.29.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Dec 2024 10:29:08 -0800 (PST) From: Nick Chan To: Hector Martin , Sven Peter , Alyssa Rosenzweig , "Rafael J . Wysocki" , Viresh Kumar , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Asahi Linux , Linux ARM Kernel Architecture , Linux power management , Devicetree , LKML Cc: Nick Chan Subject: [PATCH v3 3/7] cpufreq: apple-soc: Allow per-SoC configuration of APPLE_DVFS_CMD_PS1 Date: Thu, 19 Dec 2024 02:25:05 +0800 Message-ID: <20241218182834.22334-4-towinchenmi@gmail.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241218182834.22334-1-towinchenmi@gmail.com> References: <20241218182834.22334-1-towinchenmi@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241218_102910_247730_02D02D9A X-CRM114-Status: GOOD ( 15.53 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Support for SoC that has a different APPLE_DVFS_CMD_PS1 will be added soon, so modify the driver first to allow it to be configured per-SoC. Signed-off-by: Nick Chan --- drivers/cpufreq/apple-soc-cpufreq.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/drivers/cpufreq/apple-soc-cpufreq.c b/drivers/cpufreq/apple-soc-cpufreq.c index ad6c7b8f290c..90e34105b50b 100644 --- a/drivers/cpufreq/apple-soc-cpufreq.c +++ b/drivers/cpufreq/apple-soc-cpufreq.c @@ -27,6 +27,7 @@ #define APPLE_DVFS_CMD_SET BIT(25) #define APPLE_DVFS_CMD_PS2 GENMASK(15, 12) #define APPLE_DVFS_CMD_PS1 GENMASK(4, 0) +#define APPLE_DVFS_CMD_PS1_SHIFT 0 /* Same timebase as CPU counter (24MHz) */ #define APPLE_DVFS_LAST_CHG_TIME 0x38 @@ -59,6 +60,8 @@ struct apple_soc_cpufreq_info { u64 max_pstate; u64 cur_pstate_mask; u64 cur_pstate_shift; + u64 ps1_mask; + u64 ps1_shift; }; struct apple_cpu_priv { @@ -74,6 +77,8 @@ static const struct apple_soc_cpufreq_info soc_t8103_info = { .max_pstate = 15, .cur_pstate_mask = APPLE_DVFS_STATUS_CUR_PS_T8103, .cur_pstate_shift = APPLE_DVFS_STATUS_CUR_PS_SHIFT_T8103, + .ps1_mask = APPLE_DVFS_CMD_PS1, + .ps1_shift = APPLE_DVFS_CMD_PS1_SHIFT, }; static const struct apple_soc_cpufreq_info soc_t8112_info = { @@ -81,12 +86,16 @@ static const struct apple_soc_cpufreq_info soc_t8112_info = { .max_pstate = 31, .cur_pstate_mask = APPLE_DVFS_STATUS_CUR_PS_T8112, .cur_pstate_shift = APPLE_DVFS_STATUS_CUR_PS_SHIFT_T8112, + .ps1_mask = APPLE_DVFS_CMD_PS1, + .ps1_shift = APPLE_DVFS_CMD_PS1_SHIFT, }; static const struct apple_soc_cpufreq_info soc_default_info = { .has_ps2 = false, .max_pstate = 15, .cur_pstate_mask = 0, /* fallback */ + .ps1_mask = APPLE_DVFS_CMD_PS1, + .ps1_shift = APPLE_DVFS_CMD_PS1_SHIFT, }; static const struct of_device_id apple_soc_cpufreq_of_match[] __maybe_unused = { @@ -152,8 +161,8 @@ static int apple_soc_cpufreq_set_target(struct cpufreq_policy *policy, return -EIO; } - reg &= ~APPLE_DVFS_CMD_PS1; - reg |= FIELD_PREP(APPLE_DVFS_CMD_PS1, pstate); + reg &= ~priv->info->ps1_mask; + reg |= pstate << priv->info->ps1_shift; if (priv->info->has_ps2) { reg &= ~APPLE_DVFS_CMD_PS2; reg |= FIELD_PREP(APPLE_DVFS_CMD_PS2, pstate); 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([59.188.211.160]) by smtp.googlemail.com with ESMTPSA id d9443c01a7336-218a1dcb3ffsm79202565ad.75.2024.12.18.10.29.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Dec 2024 10:29:11 -0800 (PST) From: Nick Chan To: Hector Martin , Sven Peter , Alyssa Rosenzweig , "Rafael J . Wysocki" , Viresh Kumar , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Asahi Linux , Linux ARM Kernel Architecture , Linux power management , Devicetree , LKML Cc: Nick Chan Subject: [PATCH v3 4/7] cpufreq: apple-soc: Use 32-bit read for status register Date: Thu, 19 Dec 2024 02:25:06 +0800 Message-ID: <20241218182834.22334-5-towinchenmi@gmail.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241218182834.22334-1-towinchenmi@gmail.com> References: <20241218182834.22334-1-towinchenmi@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241218_102913_345662_5FB41386 X-CRM114-Status: GOOD ( 12.76 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Apple A7-A9(X) SoCs requires 32-bit reads on the status register. Newer SoCs accepts 32-bit reads on the status register as well. Signed-off-by: Nick Chan --- drivers/cpufreq/apple-soc-cpufreq.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/cpufreq/apple-soc-cpufreq.c b/drivers/cpufreq/apple-soc-cpufreq.c index 90e34105b50b..b27d261fe5a6 100644 --- a/drivers/cpufreq/apple-soc-cpufreq.c +++ b/drivers/cpufreq/apple-soc-cpufreq.c @@ -122,7 +122,7 @@ static unsigned int apple_soc_cpufreq_get_rate(unsigned int cpu) unsigned int pstate; if (priv->info->cur_pstate_mask) { - u64 reg = readq_relaxed(priv->reg_base + APPLE_DVFS_STATUS); + u32 reg = readl_relaxed(priv->reg_base + APPLE_DVFS_STATUS); pstate = (reg & priv->info->cur_pstate_mask) >> priv->info->cur_pstate_shift; } else { From patchwork Wed Dec 18 18:25:07 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nick Chan X-Patchwork-Id: 13914046 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8CA2FE77187 for ; Wed, 18 Dec 2024 18:35:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=11W4ToO5h1HZTorB4p+IfX/arkj3h4R3MbzsYg+yGqg=; b=FM+Q4UYmo/8YKsjnwxgiN32Oai HrjqbtZ4R5IryhNz3APXwxXKNyCWd6qujHSGbFxI0vD2VCTIQiL9MzL/83+bA1fNb33KoRYltD9O/ wJZ1HrpRuRMkaW+fZFgSLNluSE3P4TG+o51Ry4OJXXWcSszq1gdO0KoDgso/agk7H4v8OdF8ZlPrM MhW0SGGPakD7M3obVrr061fKtVNxY4GCwRYyAa+NihBTv7jfr8tRwTvtnxvVeB529bW4RCg3L5VF4 YvOWu2c3RBqA9VnUYs2q1l4ZLzaa+Pcb1iUl6szKma+KDvtFuFy91e8wuWS1dj86zOe/FxqtTHhKe iZ28J/vQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tNyta-0000000HSTH-2zIu; Wed, 18 Dec 2024 18:35:42 +0000 Received: from mail-pl1-x632.google.com ([2607:f8b0:4864:20::632]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tNynL-0000000HRK2-1b6h for linux-arm-kernel@lists.infradead.org; Wed, 18 Dec 2024 18:29:16 +0000 Received: by mail-pl1-x632.google.com with SMTP id d9443c01a7336-21644aca3a0so82122175ad.3 for ; Wed, 18 Dec 2024 10:29:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1734546555; x=1735151355; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=11W4ToO5h1HZTorB4p+IfX/arkj3h4R3MbzsYg+yGqg=; b=czEwNkgQFstA9+g43JOVMca6JT4KCHnXYtuymQiMRBK6pjWH7FLwmpFWqHUVISdLfV wslXkNMiFztb8KXml/WsV9NYBBoNJyjK9ugofWf8eKmwnNkelJ5uvqGZC8qd5sLpKKw0 BTkkZ/KhHuQR7rXBrcPBSWApKOeZiP/ErShzaqAUhy/FGNXF9b12cCSLrQWPK0Ir2W6q nE3pw60MQ2Z0cKkY5lHy50jwXLc3TTkcHKsrZyQFu9M9ct/OClR3m4zAtYN7b66FCNg8 tYpxl1UjbZL/rjIkbX0bC992oRIzKHrHAdJZOo93RAzpExZgOZ3Atp+Oahy3m4JApFZd jZyw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1734546555; x=1735151355; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=11W4ToO5h1HZTorB4p+IfX/arkj3h4R3MbzsYg+yGqg=; b=j3f+k9alv5byIir43HLOdgI4i5hbdizBQsWWmq+1AJ/Xhzfi7eMI4s9FOgQZzyrnKK pYGKPL8pFmC3Wr/xyP4BiAM1TRLYz2D1RO0gdYeIazHsnKvgB8HO4VP3T9IH0qBTOfXw aEhpJkyUwOKoCVkNVpsN/fqkdAjR1BMuMzRTs23dCkQ9gdmhqtADGmkXXsMOjxuscomk tKlMfWDB95OLcuIk+8t8XFJXUT00cNFgkUTVahr4FitS4tfr+CqyR93fWvUM2frhgQ8z COAskYag4eARMpcuOh0amVXEYrfCE+bVbXGJ7lUfsTpHqazAYkHNrG95BygzILT3lqZV J9ZA== X-Forwarded-Encrypted: i=1; AJvYcCX+3QHvAkMfOEhvZMTpaDRHvdNA4F3GDH4IOUfO7uosfKHEHpPB1amN4YHlwm2GkTVpFB1Z8g3nDENJRlgtd1aj@lists.infradead.org X-Gm-Message-State: AOJu0YwkQZxVP9nchLkkh0TfdDFbDkg/vH2Mizi2OAd1FpN4x/LsqUBQ 57p/9WatjQbbitHMcXz6xPI2EqP/63AmhyLdlvjI2RcXqshWynZo X-Gm-Gg: ASbGnctc54gwJlVfp6WPBUgghaQBBpmCTpK3PmhYl8VEP59lum6avgfJEK6cdMpBegj +1MIaUfGgLTFFIME498ENUbSeC+Y/+zc0+U0FlyLephNye3H3ahM48U3Af3e9hTPTCuv4ZhJBy8 yz2SuCQY2hehlhAazcwaPhY3QRwO2Qf77Fmc89yom9jalKAyos6jUzi6vi7a7lRvcOXDxcQyyBk 5FsvIAnrXj+xTREbKAXm3BA2Yz4Nx2wKYofrdgTNGESG42ziXkZ8DSuTQ== X-Google-Smtp-Source: AGHT+IGGkzD5I1MEo0iKpf3ViMZnzuOuLHWt5lenYWuouWbqfIDA4yXHbjCexInJBE+6e0MeVf9ggQ== X-Received: by 2002:a17:902:c410:b0:216:56c7:98a7 with SMTP id d9443c01a7336-219d97f7eb5mr9892435ad.53.1734546554836; Wed, 18 Dec 2024 10:29:14 -0800 (PST) Received: from nick-mbp.. ([59.188.211.160]) by smtp.googlemail.com with ESMTPSA id d9443c01a7336-218a1dcb3ffsm79202565ad.75.2024.12.18.10.29.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Dec 2024 10:29:14 -0800 (PST) From: Nick Chan To: Hector Martin , Sven Peter , Alyssa Rosenzweig , "Rafael J . Wysocki" , Viresh Kumar , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Asahi Linux , Linux ARM Kernel Architecture , Linux power management , Devicetree , LKML Cc: Nick Chan Subject: [PATCH v3 5/7] cpufreq: apple-soc: Increase cluster switch timeout to 400us Date: Thu, 19 Dec 2024 02:25:07 +0800 Message-ID: <20241218182834.22334-6-towinchenmi@gmail.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241218182834.22334-1-towinchenmi@gmail.com> References: <20241218182834.22334-1-towinchenmi@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241218_102915_529255_4C92FAF0 X-CRM114-Status: GOOD ( 11.81 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Apple A11 SoC takes a long time to switch. Maximum switch time observed is 345us, so increase the cluster switch timeout to 400us to be safe. Signed-off-by: Nick Chan --- drivers/cpufreq/apple-soc-cpufreq.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/cpufreq/apple-soc-cpufreq.c b/drivers/cpufreq/apple-soc-cpufreq.c index b27d261fe5a6..94e57f055a5f 100644 --- a/drivers/cpufreq/apple-soc-cpufreq.c +++ b/drivers/cpufreq/apple-soc-cpufreq.c @@ -53,7 +53,7 @@ #define APPLE_DVFS_PLL_FACTOR_MULT GENMASK(31, 16) #define APPLE_DVFS_PLL_FACTOR_DIV GENMASK(15, 0) -#define APPLE_DVFS_TRANSITION_TIMEOUT 100 +#define APPLE_DVFS_TRANSITION_TIMEOUT 400 struct apple_soc_cpufreq_info { bool has_ps2; From patchwork Wed Dec 18 18:25:08 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nick Chan X-Patchwork-Id: 13914047 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 36A66E77187 for ; Wed, 18 Dec 2024 18:37:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=O1e4i2yJb6M8JWolS3FF1qtbGtdKGQDJ3R3qFDxNx2w=; b=tZyAJubXT1yR9Q6GG5GAZO1xbB UJzL63Va2Vr7iClMk/aFl9C1DIYSxxMDdnTBPx/m2T5g/wDI/Ol3KOqxfP4W3sWYsAaMfUo1M3fue 0T4nleWv+be/bgi9p7FWzCfOfzXCcObgzIwYEf84eZKwVRF2jZSVZHw1dJEzan6N/nrD6FHCGKb+U RWHseSUOO22mgl7ySgegulck6xHaxm7I16ef1RrQemi9UEPij0zPemBQoMdTwJA4DAPu0T7WLqmyB RsOXTpl5OKQPumRyGQGl57dkLUAqDydL9XeQgarlZ2HonPp4aBVMV2k3hvGakLjaZ/hiqS/ekxk6U O5Qsdfwg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tNyue-0000000HScO-1mnA; Wed, 18 Dec 2024 18:36:48 +0000 Received: from mail-pf1-x435.google.com ([2607:f8b0:4864:20::435]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tNynP-0000000HRKj-0GJz for linux-arm-kernel@lists.infradead.org; Wed, 18 Dec 2024 18:29:20 +0000 Received: by mail-pf1-x435.google.com with SMTP id d2e1a72fcca58-725abf74334so6076414b3a.3 for ; Wed, 18 Dec 2024 10:29:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1734546558; x=1735151358; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=O1e4i2yJb6M8JWolS3FF1qtbGtdKGQDJ3R3qFDxNx2w=; b=MIV0rakwCCc1SeUdIhlXMR+2ZdEBh3I5BSZKXeov98gY3P/BZHeUp0gU+oy8yM48J7 M5Z5egbX6TBHd9q9ZPR+njM9ty3mV0uiKO1Aj1mbvgIV5Q3tr3NSIdccXYOKfjBQWmjf bndpoWgKuiaos/b+/uMLebDiccYdn7CI+gehvJlQvnK23y86gv1CbSpcfw8EHJisMLRi PkviFuVcHWT4rHBB/0s8vO/4Cuu6WbEqgqNLw4fmGy56rnf4R6jnmaO4IXx1X3MAJThl RPNClrwc9EihR5wS52dJB0Vxr1TVeAkMGLKlkRWBOYJnXSlUOiwuIWPNnhtPmAejCJCg ZR2Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1734546558; x=1735151358; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=O1e4i2yJb6M8JWolS3FF1qtbGtdKGQDJ3R3qFDxNx2w=; b=WtbM/IHQ5sxoCyZEaw/oF5dDU0yJ/8PO+TKyNTXsKrTk13eYs9Cs7f8kC2Rm2KH9yu NBkbUh7X6OvpMXoiVmbF3pbXlTxKA+JXa8GsorzVEHGJG8iiF7BARyafmATXcS6rNWAR xzAipT5dmTBoR/4QGSn0F9BrOoUrdXXglGc/j+vOTOSL/+mD5qcNjGzKWOSCoTphnS2R B9zt218i0/1OBGI4aa07AN8MnXapy3jG3Tv/WriS+CdNO4rXzUhF9fUnOMxjd66LSS9v b6hgWqHXHjelSeYLkFNaGRAUIu5VjhTlA4BKocq2jVXIV5IKTd4uRJ+mSpzDjM8iKFex 7BVg== X-Forwarded-Encrypted: i=1; AJvYcCUs5hDy29At4ywuuflAOiYTQfDEkjPTs3f1/JNwgO9F566k5G4nqgwq6dQ7xw+NeCF2Lf1DgQRPgDMRPYk0vMBM@lists.infradead.org X-Gm-Message-State: AOJu0YzS3Y6dMCKpSbjHLB+pPHt3BxbMpP1YIX1QSMt3H8aqPG/C1obs GNttuBjZ+ci0JEKGAvHQA6YhF+jsvEL0bfYN/MpxAFvrDAbcfDen X-Gm-Gg: ASbGnctvGuYgvI/LdZ9UqdFxK3RngcFzTYhWcVLaDtCFt4Zxutpx9eIk48xc4GkgF5C QgmXeCYGy7EoZiz4Q30js15KDak3BLJKy6mSn/gRXepn4Cb+KV8G9DqjnjtRfFXwXzJjK34HWRx ztw/3DYKK4jCPJFpKlXNFnRiAjtDp4eLbDAw39VIj87QXmDGOTCa8gW/6vlcPOc02IfLvxeufPA Tlxx+TzTrnGM765Ix9IWaIKjYKbUJEVHU0nXBnRv5PuAwpvIL0lgixHHw== X-Google-Smtp-Source: AGHT+IHIJQZvEA5f5MqvLKQRVSuowhIimcNsdQUZGQd0bWhhesTYwzAxxO/1ARL7Nrb4NCT2ZfdFZQ== X-Received: by 2002:a17:903:2306:b0:215:a190:ba10 with SMTP id d9443c01a7336-218d6fe1a96mr58866725ad.15.1734546557853; Wed, 18 Dec 2024 10:29:17 -0800 (PST) Received: from nick-mbp.. ([59.188.211.160]) by smtp.googlemail.com with ESMTPSA id d9443c01a7336-218a1dcb3ffsm79202565ad.75.2024.12.18.10.29.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Dec 2024 10:29:17 -0800 (PST) From: Nick Chan To: Hector Martin , Sven Peter , Alyssa Rosenzweig , "Rafael J . Wysocki" , Viresh Kumar , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Asahi Linux , Linux ARM Kernel Architecture , Linux power management , Devicetree , LKML Cc: Nick Chan , Christian Loehle Subject: [PATCH v3 6/7] cpufreq: apple-soc: Set fallback transition latency to APPLE_DVFS_TRANSITION_TIMEOUT Date: Thu, 19 Dec 2024 02:25:08 +0800 Message-ID: <20241218182834.22334-7-towinchenmi@gmail.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241218182834.22334-1-towinchenmi@gmail.com> References: <20241218182834.22334-1-towinchenmi@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241218_102919_168371_8399057D X-CRM114-Status: GOOD ( 12.97 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The driver already assumes transitions will not take longer than APPLE_DVFS_TRANSITION_TIMEOUT in apple_soc_cpufreq_set_target(), so it makes little sense to set CPUFREQ_ETERNAL as the transition latency when the transistion latency is not given by the opp-table. Reviewed-by: Christian Loehle Signed-off-by: Nick Chan --- drivers/cpufreq/apple-soc-cpufreq.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/cpufreq/apple-soc-cpufreq.c b/drivers/cpufreq/apple-soc-cpufreq.c index 94e57f055a5f..879ddec9e557 100644 --- a/drivers/cpufreq/apple-soc-cpufreq.c +++ b/drivers/cpufreq/apple-soc-cpufreq.c @@ -291,7 +291,7 @@ static int apple_soc_cpufreq_init(struct cpufreq_policy *policy) transition_latency = dev_pm_opp_get_max_transition_latency(cpu_dev); if (!transition_latency) - transition_latency = CPUFREQ_ETERNAL; + transition_latency = APPLE_DVFS_TRANSITION_TIMEOUT * NSEC_PER_USEC; policy->cpuinfo.transition_latency = transition_latency; policy->dvfs_possible_from_any_cpu = true; From patchwork Wed Dec 18 18:25:09 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nick Chan X-Patchwork-Id: 13914048 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 392F1E77187 for ; Wed, 18 Dec 2024 18:38:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=5ZBfNBSGDJ0HG4dwJs91dFczJyiFsgvS33RZvYaZjO0=; b=qm42DJmpv4yYcRvTCSJsKR1XT6 syU5uiyX3mM82FbAK2YeJEPtez5H8miQtDepjA4C7l6Bo0KdANt1auCqKHRIAy+b2BizCO52ykMVw 2IQCjkSEuoc6UxUX6JacFCMsPmBTFKtUnfG4nr/U7k9HnJLPkeKG8Iuxm3rywQtrGD/seYM81wISK EUe0kISh1j2KIZC8nTl8M7U+sKy06zb6t4zLvpUkkuiz7uFA2GcNhw8vC464zqxooatjo1hKjlZ9F R2I89nDXumVMTf8mkixsMtuOT8KNQHiNhP4x48T2GVbMe5u9TuLSsAjh0j7mwKNLmXgGCk3Z4s6P6 Jryu1Nww==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tNyvj-0000000HSjj-0SSg; Wed, 18 Dec 2024 18:37:55 +0000 Received: from mail-pl1-x629.google.com ([2607:f8b0:4864:20::629]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tNynR-0000000HRLY-3zEs for linux-arm-kernel@lists.infradead.org; Wed, 18 Dec 2024 18:29:23 +0000 Received: by mail-pl1-x629.google.com with SMTP id d9443c01a7336-21654fdd5daso5555ad.1 for ; Wed, 18 Dec 2024 10:29:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1734546561; x=1735151361; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=5ZBfNBSGDJ0HG4dwJs91dFczJyiFsgvS33RZvYaZjO0=; b=eYeI3nHIT/TOMhTaXW48DciPb0AxZpLA85jQrKOqb122ll0+oUyokHt1XVDldHpmZ5 yk+MEn5OXdyepmAtOtQFsAJ2dUP0VMlmf56cPrtPyWcyvEbSbeRRG6GKKHa+EGOIQU+F beojOIJrz3OOqg89pL5dmqRDVzkwdz0Ex3TIOTYhLXfUTN/UatCTqbm6TjqNAcrB5XdM wwi+kWKMumYuVFDsJL0n5v4VCYegef4ncogu3eCkn5FS+B2jQZ6oVCCCOUoGjpoXV/2G 1LChJsZ78AJB2DFYHz8dxhjRSFwXXVTVjZROBJeGL2TRprOF16xpgZkk9l2rXdJ4obQp L4yg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1734546561; x=1735151361; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=5ZBfNBSGDJ0HG4dwJs91dFczJyiFsgvS33RZvYaZjO0=; b=O3gmIaCG5A7cHIBuxbCZk9sH+a/G02Ezd0dkIWD8rXHs9rS7UNeRy4uiNODOQkNxky k8FxGdTPsz/6L8VoD7XzvJeBojxYXH6xYTe8Q+ERLjhTn+t9l2bpY5zr6DV+Mr27caFh 1Jrnwf4dCHYYg3AJiV/9h7QrjGnzSb4PyC1TpvkrpnP3N2Cu/2tmI2eRT6h0iWks4c8C u5niM93UrDFjjDYpdu23PjcuEIjeeywZRx/AcjSUSurTcKMYu/Zrgl8tD6/+Jsi6bmxa 6JOVkxKD/P+mLlvrPTTpl0Rtm1F0zPV588AIM0mc5t7R+bXcTOdEGMIWwSS74EppuEPf FL3g== X-Forwarded-Encrypted: i=1; AJvYcCXwaMhGk7m3sZDOqX6bqekUXeITubvqbIB/33aB8lHkk02UOteNfSU8o+DTVFTRzyBKojXPipS9/wPEVYBYJAbr@lists.infradead.org X-Gm-Message-State: AOJu0YyBK6nPWx72bQwmdr0hzXQc84zo420gwdaoJ6WLXs6D2ILezCsO 1DBmvOL+Z2G2RAguP2PG1MXSNNZ8s6tR/hist6jKvLPTHJk8+VJR X-Gm-Gg: ASbGnctdaF0pjfRKf1uJSODGL3BdKuoYLQtXw89Xr5j6k5OadeLY6Ske6NqrnWJzU55 k6XyP9lca8JzkdI63nLg/MU5weMkad26EE4vRydJAuqY2wfWOiu2si+xFhvZ8qp/dXJnvqjEGGJ rkS0scEysaQlsq1br4WdhsppuLHYykiu6DDZNcgWVJbLFAmzmandBWAmEWH6OhwyzoEUwlnBydd 9C4yhZYwOZxSzn13W5x6L5zN1KHOVXHgBsiD1wDCJRG88mepYWZkfNKPQ== X-Google-Smtp-Source: AGHT+IHKE8BBaNkfFDIiYK2d/X+ou/ScQY3k5kP8jILytQsn9xsdpJIG3SmkQVJ4kyDLKQIjDOdCPA== X-Received: by 2002:a17:902:ec81:b0:216:5568:38c9 with SMTP id d9443c01a7336-218d72349edmr57596245ad.31.1734546560737; Wed, 18 Dec 2024 10:29:20 -0800 (PST) Received: from nick-mbp.. ([59.188.211.160]) by smtp.googlemail.com with ESMTPSA id d9443c01a7336-218a1dcb3ffsm79202565ad.75.2024.12.18.10.29.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Dec 2024 10:29:20 -0800 (PST) From: Nick Chan To: Hector Martin , Sven Peter , Alyssa Rosenzweig , "Rafael J . Wysocki" , Viresh Kumar , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Asahi Linux , Linux ARM Kernel Architecture , Linux power management , Devicetree , LKML Cc: Nick Chan Subject: [PATCH v3 7/7] cpufreq: apple-soc: Add Apple A7-A8X SoC cpufreq support Date: Thu, 19 Dec 2024 02:25:09 +0800 Message-ID: <20241218182834.22334-8-towinchenmi@gmail.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241218182834.22334-1-towinchenmi@gmail.com> References: <20241218182834.22334-1-towinchenmi@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241218_102921_992938_77BF264D X-CRM114-Status: GOOD ( 14.27 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org These SoCs only use 3 bits for p-states, and have a different APPLE_DVFS_CMD_PS1 mask value. Signed-off-by: Nick Chan --- drivers/cpufreq/apple-soc-cpufreq.c | 30 +++++++++++++++++++++++------ 1 file changed, 24 insertions(+), 6 deletions(-) diff --git a/drivers/cpufreq/apple-soc-cpufreq.c b/drivers/cpufreq/apple-soc-cpufreq.c index 879ddec9e557..269b18c62d04 100644 --- a/drivers/cpufreq/apple-soc-cpufreq.c +++ b/drivers/cpufreq/apple-soc-cpufreq.c @@ -22,12 +22,14 @@ #include #include -#define APPLE_DVFS_CMD 0x20 -#define APPLE_DVFS_CMD_BUSY BIT(31) -#define APPLE_DVFS_CMD_SET BIT(25) -#define APPLE_DVFS_CMD_PS2 GENMASK(15, 12) -#define APPLE_DVFS_CMD_PS1 GENMASK(4, 0) -#define APPLE_DVFS_CMD_PS1_SHIFT 0 +#define APPLE_DVFS_CMD 0x20 +#define APPLE_DVFS_CMD_BUSY BIT(31) +#define APPLE_DVFS_CMD_SET BIT(25) +#define APPLE_DVFS_CMD_PS1_S5L8960X GENMASK(24, 22) +#define APPLE_DVFS_CMD_PS1_S5L8960X_SHIFT 22 +#define APPLE_DVFS_CMD_PS2 GENMASK(15, 12) +#define APPLE_DVFS_CMD_PS1 GENMASK(4, 0) +#define APPLE_DVFS_CMD_PS1_SHIFT 0 /* Same timebase as CPU counter (24MHz) */ #define APPLE_DVFS_LAST_CHG_TIME 0x38 @@ -36,6 +38,9 @@ * Apple ran out of bits and had to shift this in T8112... */ #define APPLE_DVFS_STATUS 0x50 +#define APPLE_DVFS_STATUS_CUR_PS_S5L8960X GENMASK(5, 3) +#define APPLE_DVFS_STATUS_CUR_PS_SHIFT_S5L8960X 3 +#define APPLE_DVFS_STATUS_TGT_PS_S5L8960X GENMASK(2, 0) #define APPLE_DVFS_STATUS_CUR_PS_T8103 GENMASK(7, 4) #define APPLE_DVFS_STATUS_CUR_PS_SHIFT_T8103 4 #define APPLE_DVFS_STATUS_TGT_PS_T8103 GENMASK(3, 0) @@ -72,6 +77,15 @@ struct apple_cpu_priv { static struct cpufreq_driver apple_soc_cpufreq_driver; +static const struct apple_soc_cpufreq_info soc_s5l8960x_info = { + .has_ps2 = false, + .max_pstate = 7, + .cur_pstate_mask = APPLE_DVFS_STATUS_CUR_PS_S5L8960X, + .cur_pstate_shift = APPLE_DVFS_STATUS_CUR_PS_SHIFT_S5L8960X, + .ps1_mask = APPLE_DVFS_CMD_PS1_S5L8960X, + .ps1_shift = APPLE_DVFS_CMD_PS1_S5L8960X_SHIFT, +}; + static const struct apple_soc_cpufreq_info soc_t8103_info = { .has_ps2 = true, .max_pstate = 15, @@ -99,6 +113,10 @@ static const struct apple_soc_cpufreq_info soc_default_info = { }; static const struct of_device_id apple_soc_cpufreq_of_match[] __maybe_unused = { + { + .compatible = "apple,s5l8960x-cluster-cpufreq", + .data = &soc_s5l8960x_info, + }, { .compatible = "apple,t8103-cluster-cpufreq", .data = &soc_t8103_info,