From patchwork Wed Dec 18 23:17:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Acayan X-Patchwork-Id: 13914275 Received: from mail-io1-f50.google.com (mail-io1-f50.google.com [209.85.166.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3F6251FCD0C; Wed, 18 Dec 2024 23:19:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.166.50 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734563952; cv=none; b=MTyBe88UDGUb6tiR3Fd6ikQ0cJJdZ7voegJYy7IRHr2TgnT/6qJKFrQpuKnkdPL9yiJ/e49tnvlv+GlqjREo4p46RtkMxVG5u6kfr7V59R+ip9Z4wq4SPH+QZ/4QnfwbeySzn0mM9V41itw4y7fZ5AXFN1QkmOciy7uttTtfAfg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734563952; c=relaxed/simple; bh=j1nmSz4h9xbZuxtFBuqrqJx2eZckGLAAhtREhszTjdE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=jRkJcJQ6VRj3SwrVt2qup0wW/tJHD0cQjaWNHa21TjOhs7aESq6LFLrvqdmoGWIx/yh+0OKJlTFhEZSZEDqxupVPcTiPwzUAuRgeaHVOqY+xsxQ0Er6rFh35mILlRLY3IWp4TsoiHjW5YtliQW1cyA7sQWj01adEvAp09/eIfZI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=SAS9j7FF; arc=none smtp.client-ip=209.85.166.50 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="SAS9j7FF" Received: by mail-io1-f50.google.com with SMTP id ca18e2360f4ac-844d7f81dd1so8289539f.2; Wed, 18 Dec 2024 15:19:11 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1734563950; x=1735168750; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=LumiF4eO+NG7cdcWuV/5Rou+YqcDG+HnDje6/Mwwnx4=; b=SAS9j7FF1dw7zIWmXdLbwAAK5WWoeSuGKF7cJx/GEXmcEY1FtTT5e6VcrAAMIIpSEY XW9HaVcn3SGN00ytzrm4WWtm2D3S6Rysdgt9Y/+6Dr6O2Eq09aYXxqKQC9Sx3tI4fqgl ZGU3IUScAAqkPv0o5pn6wrbKuid7t52HbvtlQeN4GwVfZqZ/XSVcddtDVM9Kagt2HGJa D9BIJK+nN1VqQIJZqI4KUSLT8KsUzihQON5YbV9/1fl4dqtEAf3LLWBIa1J6xvWPBPMc yYVthuW6/wltMox430zyrvkyWpcOCM7Hcf786Aie6FpFHfVZH1vcWOdr+DN8Dv7wtHzO VvSQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1734563950; x=1735168750; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=LumiF4eO+NG7cdcWuV/5Rou+YqcDG+HnDje6/Mwwnx4=; b=HOYcVTdzKsYONyPtVggODPwoUeFbE9uIg8h12krqWRZQAUqJ0/hjPohOFZSopA78C9 sVF+Q4t5MyuSeXt+UTtUgpRCJUqS6RRkZCSGO6ikbsmQC2+h1lBQZiuNT1SkfdA2yUqk Ewlpsz1+p0uVO8u6GEUCfElu0qMLOslDZbb6WpefahmySCWxKBViEU0AQ7bQByG5ziFB apUQQn3co/R2XfKB+0guCoAQUCfOKnt7vSVOmatro+mAev9E5+NWqAdzBeRCj8fLq1a6 fN5+09H1EFqjTJZMjix/Urk3/GcIngIWm1tk7SUh8amNAfZZjsz/NLkXYpeerRUVEAwx Qf0A== X-Forwarded-Encrypted: i=1; AJvYcCVNq1REPaROSRGgKtQV2x9CkMtZq5I3U/R3sKFBnMtOUlfebQCU/fvy5G1YdBP25mgZ4+bHMx8d+owD@vger.kernel.org, AJvYcCWNt04rWyWjtrEo2DfG9iNd1fMDIOhL/hHgi5s+t0xQArrY/FeTLGuf5lYxkAHU1kPshdcVd2BN+p8A@vger.kernel.org, AJvYcCXEixExx/myBA0wL5wfUrUuH2UTviCIaGVASnCHTSBb48Q8Wk1u/ghYiRIlz4wiYP2CMyedax6y6Si/q5N+WQ==@vger.kernel.org, AJvYcCXZLj7aIzKVB6FY4MNkZosryPDPaYXWtX3xgP/BQVArwJy8supQTQGKtCqCvqTUQNWPzAQ3dPVV/o7CYMg=@vger.kernel.org X-Gm-Message-State: AOJu0Yw9pjABJJrysece8H5DMlNHDCOJ8UzSsqCCRLXx4sQ+uiu30Vbx DaBAzC3y4zYjhlMplc+g1o+JxeXw7UKiFA0lCS0eH3vGIhr1W7+a X-Gm-Gg: ASbGnctuzem9ux9dzh0pS0E6C5DuMkEFHB3ph7P1cobTob8xyLM7JGASYVoD8qFFU6j AkZNSsVVngiUM91kBJ5HVkFHBm5t4ZP9hPDcPKF1YPvrmQXQwBKk0aSGES/ZJ7Ga+lYpbq+KIBk RpQWy/hT3JpBap1CnzqE4TK5CV6MY5RaK3dOmGL0PkVSz4niNZvx25qk1j7PdHiDct7R1O2gW7D Vk2s/1kJ3+fXQvTXj4ln5cupOzgVCIafAuu1rd8EE8= X-Google-Smtp-Source: AGHT+IE4t9BbOhd8+vPOlbmAdo0GHKEUU8rVgDhHRtXbpNh5QLqJsQB653IwODnoAsh/hrlyxm9Sgg== X-Received: by 2002:a05:6602:6d17:b0:841:a652:b0c8 with SMTP id ca18e2360f4ac-84987bdab96mr157328839f.3.1734563950342; Wed, 18 Dec 2024 15:19:10 -0800 (PST) Received: from localhost ([2607:fea8:52a3:d200::eca]) by smtp.gmail.com with ESMTPSA id 8926c6da1cb9f-4e5e3782412sm2487725173.124.2024.12.18.15.19.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Dec 2024 15:19:10 -0800 (PST) From: Richard Acayan To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Robert Foss , Todor Tomov , "Bryan O'Donoghue" , Mauro Carvalho Chehab , Konrad Dybcio , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-media@vger.kernel.org Cc: Vladimir Zapolskiy , Richard Acayan Subject: [PATCH v9 1/5] dt-bindings: clock: qcom,sdm845-camcc: add sdm670 compatible Date: Wed, 18 Dec 2024 18:17:31 -0500 Message-ID: <20241218231729.270137-8-mailingradian@gmail.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241218231729.270137-7-mailingradian@gmail.com> References: <20241218231729.270137-7-mailingradian@gmail.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The camera clocks on SDM670 and SDM845 have no significant differences that would require a change in the clock controller driver. The only difference is the clock frequency at each level of the power domains, which is not specified in the clock driver. There should still be a compatible specific to the SoC, so add the compatible for SDM670 with the SDM845 compatible as fallback. Link: https://android.googlesource.com/kernel/msm/+/d4dc50c0a9291bd99895d4844f973421c047d267/drivers/clk/qcom/camcc-sdm845.c#2048 Suggested-by: Vladimir Zapolskiy Suggested-by: Konrad Dybcio Link: https://lore.kernel.org/linux-arm-msm/7d26a62b-b898-4737-bd53-f49821e3b471@linaro.org Signed-off-by: Richard Acayan Reviewed-by: Krzysztof Kozlowski --- .../devicetree/bindings/clock/qcom,sdm845-camcc.yaml | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/clock/qcom,sdm845-camcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sdm845-camcc.yaml index 810b852ae371..fa95c3a1ba3a 100644 --- a/Documentation/devicetree/bindings/clock/qcom,sdm845-camcc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,sdm845-camcc.yaml @@ -20,7 +20,11 @@ allOf: properties: compatible: - const: qcom,sdm845-camcc + oneOf: + - items: + - const: qcom,sdm670-camcc + - const: qcom,sdm845-camcc + - const: qcom,sdm845-camcc clocks: items: From patchwork Wed Dec 18 23:17:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Acayan X-Patchwork-Id: 13914276 Received: from mail-io1-f51.google.com (mail-io1-f51.google.com [209.85.166.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1D6C61FCD0C; Wed, 18 Dec 2024 23:19:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.166.51 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734563956; cv=none; b=s6yoZHJ78KiG2++d8XBSmskepSETmStQz2lweB7OpOmU8AZlmM5vPYl6cmScvY0CuC0JbkPuZLTKCtH3NcviTea89/nWJj0anHuskJZXsoH9lRj8//Dxr9d0wDOLdiBeBJdkl08JHdzKd7fcI5EBdWymWJ2ccaSh+LYiuk3RHNQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734563956; c=relaxed/simple; bh=qyaCuCa4gDWf4lPIQ6DQ2cmbsLSQ6GruHVjXnVxOqU4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=s5mL6sjeqd9Gv6f9gbqY2sp9S6BgBTQTuOJQj7rDjYcPFxXKP4rfmc40GDNxzHdZ8S4fJ8MxsnRKZdy01SN5MmYs99OAZNGwWqzm30XZPk+z/4rnfb3QSjnvoMTj51Nm0IDYtZoatUsjqPB2njTOu9CbpukEH4BaKToGbsEJnqI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=hZak6fHr; arc=none smtp.client-ip=209.85.166.51 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="hZak6fHr" Received: by mail-io1-f51.google.com with SMTP id ca18e2360f4ac-844e61f3902so18885439f.0; Wed, 18 Dec 2024 15:19:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1734563954; x=1735168754; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=nJ/13WVnxEsU4PKR0aHPd6kIMA/P8PZaMf8INR7sqYU=; b=hZak6fHrDcMwhwzUsXtCY1GbNBJGJG0DYKjhuKJNszi08oLz9cjpWB9cTqdPUnUTIJ sys27Fquqv8CF//NP8TZDQopjozK/TmRtnaY8dqEs536duEmEeAaNcyeDCCRjeeFZzmQ fBQH25UaIyN9QJF0rcUrFzmBsqi+3GlpMX604x/TEgTgfn/OGuDaT6GFf+QM4T7leiuk h4m2UOthJOMLx7AEMR0tGA/C5GKOpOhldJbVk9CZ2LemC1HaXCb/G9wPUGWdN41DnpQy IT/0TVTasno6xrAr45JyVec+JlyaZ4krC6kpoK1A2JrnV9S1spytgzPpaRAmq8mr5QBI V5vA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1734563954; x=1735168754; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=nJ/13WVnxEsU4PKR0aHPd6kIMA/P8PZaMf8INR7sqYU=; b=n6aqmi+0m2vptbMV7DVyKA9kLCS69gG9pNDlLPr2oWKKj29EUZD5wDxvSbU13tiRtq 6Cy1XH4ddEprDWirR8IbIWyq7ie5xjxSjfom7XC/h8/2Pi2LJ2XwahOCGyZXEsQ+tukX M4CFvCy51A6uId7IOpWQqDVI4hhTSOb52ILALQtlomK12VPM5+88JcWitJ+McgR1G6rU 36+o+De5RLqdEpuwdemrj7nHc5DVhJcxYxMOpyCk2HrdUgKXb+q6/zYa2Mv3as+1lydp smXL9oLrhTCuW8Cfx8sLocaTpeDT0Rl1E5FoJIKSlYFzIoPFk1ipaK7iUBzGd3ULoWVI 9HxA== X-Forwarded-Encrypted: i=1; AJvYcCV617NOjkun2Vq+stmCjzOQBa7cR0mziQzrZQIryOtz6EZLpc7CHaAdAw3aAMWhqIVNxYj8Lc5EPFIh@vger.kernel.org, AJvYcCVX50QdTTewRNoWCmoWGnqG7Q6MYnfj0ken1tQnZrRKyTi0+vuRW7KXkkb5yWxMYpgbqTUc3faAhRGPwirjLA==@vger.kernel.org, AJvYcCWwKLLqxeppiAHOdvNGPM70E2IdlEh3ChyLXsHGqTufGiEEfqdHI3cVn0Spc/Rd03CvT3NJ+bSJ5HnwO/4=@vger.kernel.org, AJvYcCWza8JHJwNdd2yPgODgUqWguYaW5nVQ2CqsSNTDQf2kkV98HbnhyavdTq9dK6dBOrrek1J/0iPNFrb0@vger.kernel.org X-Gm-Message-State: AOJu0YyH3VYU6isZyn+p6qssLf97sh0Yhd/Wz5YAo32vzoml50Kr+A1H 0169U77O6NGOkcftOjt/E2kTb86TgsUlFXazTgEFifUJag0BwQ4VA6P+JcM/ X-Gm-Gg: ASbGncubVgtduC89z/Io2IRT+4q3BBEqiar9xs6QQ8rdmJg1kGH1GC5M8+lYh9Fo4DY fiilN9BnFZu7R/JEegw3EOTnS+E+GLStUMvOQRqVUm61VEqzo2jJqbqe0Imx9QRB79ShHm5CCJM TJzRfDuQ6LQGJSOow3TKh2fAXF0dryI7BuwjqrSJhubviGVEqYFS7DEb2p1jMuKurbSJj0OAV91 EKkfHNfbbti3peWjpWdgLsCoblhTaA+7RVggJiPeIE= X-Google-Smtp-Source: AGHT+IHGl38QahnZYMVDvlY/AJOkQiHsJaw5XjinB0couhGC5PJeLbx9rQPHfGc0f9vGGnLAPXjPOQ== X-Received: by 2002:a05:6602:13d4:b0:842:ef83:d3cf with SMTP id ca18e2360f4ac-84987da8469mr133239639f.11.1734563954211; Wed, 18 Dec 2024 15:19:14 -0800 (PST) Received: from localhost ([2607:fea8:52a3:d200::eca]) by smtp.gmail.com with ESMTPSA id ca18e2360f4ac-844f62583f6sm246194739f.14.2024.12.18.15.19.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Dec 2024 15:19:12 -0800 (PST) From: Richard Acayan To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Robert Foss , Todor Tomov , "Bryan O'Donoghue" , Mauro Carvalho Chehab , Konrad Dybcio , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-media@vger.kernel.org Cc: Vladimir Zapolskiy , Richard Acayan Subject: [PATCH v9 2/5] dt-bindings: media: camss: Add qcom,sdm670-camss Date: Wed, 18 Dec 2024 18:17:32 -0500 Message-ID: <20241218231729.270137-9-mailingradian@gmail.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241218231729.270137-7-mailingradian@gmail.com> References: <20241218231729.270137-7-mailingradian@gmail.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 As found in the Pixel 3a, the Snapdragon 670 has a camera subsystem with 3 CSIDs and 3 VFEs (including 1 VFE lite). Add this camera subsystem to the bindings. Adapted from SC8280XP camera subsystem. Signed-off-by: Richard Acayan Reviewed-by: Bryan O'Donoghue Reviewed-by: Krzysztof Kozlowski --- .../bindings/media/qcom,sdm670-camss.yaml | 318 ++++++++++++++++++ 1 file changed, 318 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/qcom,sdm670-camss.yaml diff --git a/Documentation/devicetree/bindings/media/qcom,sdm670-camss.yaml b/Documentation/devicetree/bindings/media/qcom,sdm670-camss.yaml new file mode 100644 index 000000000000..35c40fe22376 --- /dev/null +++ b/Documentation/devicetree/bindings/media/qcom,sdm670-camss.yaml @@ -0,0 +1,318 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/qcom,sdm670-camss.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SDM670 Camera Subsystem (CAMSS) + +maintainers: + - Richard Acayan + +description: + The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms. + +properties: + compatible: + const: qcom,sdm670-camss + + reg: + maxItems: 9 + + reg-names: + items: + - const: csid0 + - const: csid1 + - const: csid2 + - const: csiphy0 + - const: csiphy1 + - const: csiphy2 + - const: vfe0 + - const: vfe1 + - const: vfe_lite + + interrupts: + maxItems: 9 + + interrupt-names: + items: + - const: csid0 + - const: csid1 + - const: csid2 + - const: csiphy0 + - const: csiphy1 + - const: csiphy2 + - const: vfe0 + - const: vfe1 + - const: vfe_lite + + clocks: + maxItems: 22 + + clock-names: + items: + - const: camnoc_axi + - const: cpas_ahb + - const: csi0 + - const: csi1 + - const: csi2 + - const: csiphy0 + - const: csiphy0_timer + - const: csiphy1 + - const: csiphy1_timer + - const: csiphy2 + - const: csiphy2_timer + - const: gcc_camera_ahb + - const: gcc_camera_axi + - const: soc_ahb + - const: vfe0 + - const: vfe0_axi + - const: vfe0_cphy_rx + - const: vfe1 + - const: vfe1_axi + - const: vfe1_cphy_rx + - const: vfe_lite + - const: vfe_lite_cphy_rx + + iommus: + maxItems: 4 + + power-domains: + items: + - description: IFE0 GDSC - Image Front End, Global Distributed Switch Controller. + - description: IFE1 GDSC - Image Front End, Global Distributed Switch Controller. + - description: Titan Top GDSC - Titan ISP Block, Global Distributed Switch Controller. + + power-domain-names: + items: + - const: ife0 + - const: ife1 + - const: top + + vdda-phy-supply: + description: + Phandle to a regulator supply to PHY core block. + + vdda-pll-supply: + description: + Phandle to 1.8V regulator supply to PHY refclk pll block. + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + description: + CSI input ports. + + properties: + port@0: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: + Input port for receiving CSI data from CSIPHY0. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + properties: + clock-lanes: + maxItems: 1 + + data-lanes: + minItems: 1 + maxItems: 4 + + required: + - clock-lanes + - data-lanes + + port@1: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: + Input port for receiving CSI data from CSIPHY1. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + properties: + clock-lanes: + maxItems: 1 + + data-lanes: + minItems: 1 + maxItems: 4 + + required: + - clock-lanes + - data-lanes + + port@2: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: + Input port for receiving CSI data from CSIPHY2. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + properties: + clock-lanes: + maxItems: 1 + + data-lanes: + minItems: 1 + maxItems: 4 + + required: + - clock-lanes + - data-lanes + +required: + - compatible + - reg + - reg-names + - interrupts + - interrupt-names + - clocks + - clock-names + - iommus + - power-domains + - power-domain-names + - vdda-phy-supply + - vdda-pll-supply + +additionalProperties: false + +examples: + - | + #include + #include + #include + + soc { + #address-cells = <2>; + #size-cells = <2>; + + isp@acb3000 { + compatible = "qcom,sdm670-camss"; + + reg = <0 0x0acb3000 0 0x1000>, + <0 0x0acba000 0 0x1000>, + <0 0x0acc8000 0 0x1000>, + <0 0x0ac65000 0 0x1000>, + <0 0x0ac66000 0 0x1000>, + <0 0x0ac67000 0 0x1000>, + <0 0x0acaf000 0 0x4000>, + <0 0x0acb6000 0 0x4000>, + <0 0x0acc4000 0 0x4000>; + reg-names = "csid0", + "csid1", + "csid2", + "csiphy0", + "csiphy1", + "csiphy2", + "vfe0", + "vfe1", + "vfe_lite"; + + interrupts = , + , + , + , + , + , + , + , + ; + interrupt-names = "csid0", + "csid1", + "csid2", + "csiphy0", + "csiphy1", + "csiphy2", + "vfe0", + "vfe1", + "vfe_lite"; + + clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>, + <&camcc CAM_CC_CPAS_AHB_CLK>, + <&camcc CAM_CC_IFE_0_CSID_CLK>, + <&camcc CAM_CC_IFE_1_CSID_CLK>, + <&camcc CAM_CC_IFE_LITE_CSID_CLK>, + <&camcc CAM_CC_CSIPHY0_CLK>, + <&camcc CAM_CC_CSI0PHYTIMER_CLK>, + <&camcc CAM_CC_CSIPHY1_CLK>, + <&camcc CAM_CC_CSI1PHYTIMER_CLK>, + <&camcc CAM_CC_CSIPHY2_CLK>, + <&camcc CAM_CC_CSI2PHYTIMER_CLK>, + <&gcc GCC_CAMERA_AHB_CLK>, + <&gcc GCC_CAMERA_AXI_CLK>, + <&camcc CAM_CC_SOC_AHB_CLK>, + <&camcc CAM_CC_IFE_0_CLK>, + <&camcc CAM_CC_IFE_0_AXI_CLK>, + <&camcc CAM_CC_IFE_0_CPHY_RX_CLK>, + <&camcc CAM_CC_IFE_1_CLK>, + <&camcc CAM_CC_IFE_1_AXI_CLK>, + <&camcc CAM_CC_IFE_1_CPHY_RX_CLK>, + <&camcc CAM_CC_IFE_LITE_CLK>, + <&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>; + clock-names = "camnoc_axi", + "cpas_ahb", + "csi0", + "csi1", + "csi2", + "csiphy0", + "csiphy0_timer", + "csiphy1", + "csiphy1_timer", + "csiphy2", + "csiphy2_timer", + "gcc_camera_ahb", + "gcc_camera_axi", + "soc_ahb", + "vfe0", + "vfe0_axi", + "vfe0_cphy_rx", + "vfe1", + "vfe1_axi", + "vfe1_cphy_rx", + "vfe_lite", + "vfe_lite_cphy_rx"; + + iommus = <&apps_smmu 0x808 0x0>, + <&apps_smmu 0x810 0x8>, + <&apps_smmu 0xc08 0x0>, + <&apps_smmu 0xc10 0x8>; + + power-domains = <&camcc IFE_0_GDSC>, + <&camcc IFE_1_GDSC>, + <&camcc TITAN_TOP_GDSC>; + power-domain-names = "ife0", + "ife1", + "top"; + + vdda-phy-supply = <&vreg_l1a_1p225>; + vdda-pll-supply = <&vreg_l8a_1p8>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + csiphy_ep0: endpoint { + clock-lanes = <7>; + data-lanes = <0 1 2 3>; + remote-endpoint = <&front_sensor_ep>; + }; + }; + }; + }; + }; From patchwork Wed Dec 18 23:17:33 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Acayan X-Patchwork-Id: 13914277 Received: from mail-io1-f54.google.com (mail-io1-f54.google.com [209.85.166.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3968D1FD79F; Wed, 18 Dec 2024 23:19:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.166.54 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734563958; cv=none; b=cdXnct1oQgcyPF6ropLhgMTDrag9wvHQvWm9tbFCy2aRiYXKaMZAgFpSnz2q4qyMCwTqriGg/ym9bE8YDkruAThFoo+2CZP5V9IiTuI5odsOQ60tb+LPvFJkCZqrlfTZE3ahFqkSnN6qcrTpA+KI7qZ6CR6LrsFwKoTD2OWXpfY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734563958; c=relaxed/simple; bh=WEMpS7S8YLtV8CuVrqXEyBFUeVtpaM6wzmJAaXyx4jk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=r/5hcBiMDTGFTTvOzIHQ/7ZicL06xR7g+eD9cmCv7hSZgNCB85bWFTS2ImIjvVbMYeLemT7hY/acCLqHcv7jnoBvDyzPPEXf+4m/SVk6vKAn/SLdc8BEmFu3EwcaQUfl3rI/zIji8AA6+loBdHvEsfA9HySUXSKOiTjJQEdIdrI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=hbRPYoQ2; arc=none smtp.client-ip=209.85.166.54 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="hbRPYoQ2" Received: by mail-io1-f54.google.com with SMTP id ca18e2360f4ac-844bff5ba1dso16792139f.1; Wed, 18 Dec 2024 15:19:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1734563956; x=1735168756; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=C/yUNvBrFyhglt7yI6PncD6xcXtPXIh892mCL9SYeg4=; b=hbRPYoQ28VIZXxswHfklINpRnLnO3wLUlVyUkKPkoQq1JSvKGCvxR381sA28MFInD+ 3UsQOMoLKGtN0q/HMxHRxCE0nQhbfpKxsS1XrzN380zWM0+8Li5JWWwEYMeNRcEjhGmI Y7Yhq/1TEmjZI6TX5lV8CWlg4RQ3BXUuXHdJR3AIpKwRl8Ym8Bjqxw3wHSZrwZ4AiLEL aPkUF9XLwLFrDn7dDmcalcGV5F7KvVerEnn8LpHz7yUUk7IQ4Aht3oFBsYssxD//geFF mjgGoEGMalJ2ncyX2WSfbg9yjniZ9K8/prAZ3yE3wtfxv5wUyNzptfHCNMPuDzU3e3Yc l91g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1734563956; x=1735168756; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=C/yUNvBrFyhglt7yI6PncD6xcXtPXIh892mCL9SYeg4=; b=R2di5OHqMdoM32WDHM5SYp/LBzIiw84HU87soXJIpcnDjFpNxLfzTATrN4TTIidiIb eOVf2V8+n2CE0wtpHWlqz2WunsyNm/UXgmeua2+LhokuPnJvNxXFaaN8KkLvcYlITy/R h1JUaOvtqhwd6PboivI66s1CV3y064DXIWmOEJBH92k+U6bGPjNDHL6OL/oZ7xtUNe5y H8hx1ZLrgqTWv6UKy5Bvjeqr1LN6vAXawCRaJKynulrokvsRkZLY08pqDYxFM5JuzGkB b8GQkGFvVzIYqQ9FJkvLxUo+4Qk0XfJstywrehtgQMJs0YB6/98mXoadKN50r6yiIikH kFVw== X-Forwarded-Encrypted: i=1; AJvYcCVRBrJRQ5fjNYWBoEbewnE8DzmxNfHRwV5F8d3toV8WiMeG940/LUYshcs1IC2e275mP9sUs4MUNa/AmlA22g==@vger.kernel.org, AJvYcCVyl3Ebuvr3JcDIDMKkDHNUiADaAQRLrW93ozaSG9PtuAXgr6kyKvvQ3SlJwcPyc88lV8LTNPqT4xnsmlQ=@vger.kernel.org, AJvYcCX359v3pwQg1U6HU3Q+AwEcfA6XOj0HtIG9Srovfs+mLGVMjODJwt6hVG/61H4ei4+Kp96x5xFpvT3G@vger.kernel.org, AJvYcCXMFoc3bP5lKjYiLwLp+r8kFS07D2GyJL59EHbH8W7PR/Cdl4JLGnDYD2DJVpCorw5Rv2KniQfmBswD@vger.kernel.org X-Gm-Message-State: AOJu0Yw3FFw/9VqnLVeQ6wZNIsHp8fz076wf2B8GqVQPjQFU/XdtmKNr o2cOozOHqeQ5HdJVkQSRzoqokrFwMlHRgbC+O3FPim5gFjFg+hR1 X-Gm-Gg: ASbGnctByJ8LCsa2vrfZCtCTPdT6+KCqMqnRZbEhPRDSdyO4GVXRbaWc16jPhGlKMqJ coQXCq1ebLTimJAYSIy1hOx0hBmTVKYy5y0twltQiffj3EO9YMzRj6F/8bAV42reTNQ0NmB/NIR 1OoRF3OQwo5KzaCBOGtDHfN0pX74cACN9DPcV+TCDeSHDCdik7zaQyHHwYP+NWt8Vzpf5iqbVG0 B3fSGNDrHypemlZLsGgr9Cw21tTOA4C+v4Wg1iMop8= X-Google-Smtp-Source: AGHT+IEx3kHJ8q/BChF479JkIOL0lzv42miin7scM2wSAnVcH35C87RMcHhTGAMECdrL49pMd2ar7w== X-Received: by 2002:a05:6602:1555:b0:82c:ed57:ebd9 with SMTP id ca18e2360f4ac-847585f2c23mr467500539f.10.1734563956200; Wed, 18 Dec 2024 15:19:16 -0800 (PST) Received: from localhost ([2607:fea8:52a3:d200::eca]) by smtp.gmail.com with ESMTPSA id 8926c6da1cb9f-4e5e378cce6sm2394614173.115.2024.12.18.15.19.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Dec 2024 15:19:15 -0800 (PST) From: Richard Acayan To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Robert Foss , Todor Tomov , "Bryan O'Donoghue" , Mauro Carvalho Chehab , Konrad Dybcio , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-media@vger.kernel.org Cc: Vladimir Zapolskiy , Richard Acayan Subject: [PATCH v9 3/5] media: qcom: camss: add support for SDM670 camss Date: Wed, 18 Dec 2024 18:17:33 -0500 Message-ID: <20241218231729.270137-10-mailingradian@gmail.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241218231729.270137-7-mailingradian@gmail.com> References: <20241218231729.270137-7-mailingradian@gmail.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The camera subsystem for the SDM670 the same as on SDM845 except with 3 CSIPHY ports instead of 4. Add support for the SDM670 camera subsystem. Signed-off-by: Richard Acayan --- drivers/media/platform/qcom/camss/camss.c | 191 ++++++++++++++++++++++ 1 file changed, 191 insertions(+) diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c index 9fb31f4c18ad..aba2dbc00e82 100644 --- a/drivers/media/platform/qcom/camss/camss.c +++ b/drivers/media/platform/qcom/camss/camss.c @@ -738,6 +738,185 @@ static const struct camss_subdev_resources vfe_res_660[] = { } }; +static const struct camss_subdev_resources csiphy_res_670[] = { + /* CSIPHY0 */ + { + .regulators = { "vdda-phy", "vdda-pll" }, + .clock = { "soc_ahb", "cpas_ahb", + "csiphy0", "csiphy0_timer" }, + .clock_rate = { { 0 }, + { 0 }, + { 0 }, + { 19200000, 240000000, 269333333 } }, + .reg = { "csiphy0" }, + .interrupt = { "csiphy0" }, + .csiphy = { + .hw_ops = &csiphy_ops_3ph_1_0, + .formats = &csiphy_formats_sdm845 + } + }, + + /* CSIPHY1 */ + { + .regulators = { "vdda-phy", "vdda-pll" }, + .clock = { "soc_ahb", "cpas_ahb", + "csiphy1", "csiphy1_timer" }, + .clock_rate = { { 0 }, + { 0 }, + { 0 }, + { 19200000, 240000000, 269333333 } }, + .reg = { "csiphy1" }, + .interrupt = { "csiphy1" }, + .csiphy = { + .hw_ops = &csiphy_ops_3ph_1_0, + .formats = &csiphy_formats_sdm845 + } + }, + + /* CSIPHY2 */ + { + .regulators = { "vdda-phy", "vdda-pll" }, + .clock = { "soc_ahb", "cpas_ahb", + "csiphy2", "csiphy2_timer" }, + .clock_rate = { { 0 }, + { 0 }, + { 0 }, + { 19200000, 240000000, 269333333 } }, + .reg = { "csiphy2" }, + .interrupt = { "csiphy2" }, + .csiphy = { + .hw_ops = &csiphy_ops_3ph_1_0, + .formats = &csiphy_formats_sdm845 + } + } +}; + +static const struct camss_subdev_resources csid_res_670[] = { + /* CSID0 */ + { + .regulators = {}, + .clock = { "cpas_ahb", "soc_ahb", "vfe0", + "vfe0_cphy_rx", "csi0" }, + .clock_rate = { { 0 }, + { 0 }, + { 100000000, 320000000, 404000000, 480000000, 600000000 }, + { 384000000 }, + { 19200000, 75000000, 384000000, 538666667 } }, + .reg = { "csid0" }, + .interrupt = { "csid0" }, + .csid = { + .hw_ops = &csid_ops_gen2, + .parent_dev_ops = &vfe_parent_dev_ops, + .formats = &csid_formats_gen2 + } + }, + + /* CSID1 */ + { + .regulators = {}, + .clock = { "cpas_ahb", "soc_ahb", "vfe1", + "vfe1_cphy_rx", "csi1" }, + .clock_rate = { { 0 }, + { 0 }, + { 100000000, 320000000, 404000000, 480000000, 600000000 }, + { 384000000 }, + { 19200000, 75000000, 384000000, 538666667 } }, + .reg = { "csid1" }, + .interrupt = { "csid1" }, + .csid = { + .hw_ops = &csid_ops_gen2, + .parent_dev_ops = &vfe_parent_dev_ops, + .formats = &csid_formats_gen2 + } + }, + + /* CSID2 */ + { + .regulators = {}, + .clock = { "cpas_ahb", "soc_ahb", "vfe_lite", + "vfe_lite_cphy_rx", "csi2" }, + .clock_rate = { { 0 }, + { 0 }, + { 100000000, 320000000, 404000000, 480000000, 600000000 }, + { 384000000 }, + { 19200000, 75000000, 384000000, 538666667 } }, + .reg = { "csid2" }, + .interrupt = { "csid2" }, + .csid = { + .is_lite = true, + .hw_ops = &csid_ops_gen2, + .parent_dev_ops = &vfe_parent_dev_ops, + .formats = &csid_formats_gen2 + } + } +}; + +static const struct camss_subdev_resources vfe_res_670[] = { + /* VFE0 */ + { + .regulators = {}, + .clock = { "camnoc_axi", "cpas_ahb", "soc_ahb", + "vfe0", "vfe0_axi" }, + .clock_rate = { { 0 }, + { 0 }, + { 0 }, + { 100000000, 320000000, 404000000, 480000000, 600000000 }, + { 0 } }, + .reg = { "vfe0" }, + .interrupt = { "vfe0" }, + .vfe = { + .line_num = 4, + .has_pd = true, + .pd_name = "ife0", + .hw_ops = &vfe_ops_170, + .formats_rdi = &vfe_formats_rdi_845, + .formats_pix = &vfe_formats_pix_845 + } + }, + + /* VFE1 */ + { + .regulators = {}, + .clock = { "camnoc_axi", "cpas_ahb", "soc_ahb", + "vfe1", "vfe1_axi" }, + .clock_rate = { { 0 }, + { 0 }, + { 0 }, + { 100000000, 320000000, 404000000, 480000000, 600000000 }, + { 0 } }, + .reg = { "vfe1" }, + .interrupt = { "vfe1" }, + .vfe = { + .line_num = 4, + .has_pd = true, + .pd_name = "ife1", + .hw_ops = &vfe_ops_170, + .formats_rdi = &vfe_formats_rdi_845, + .formats_pix = &vfe_formats_pix_845 + } + }, + + /* VFE-lite */ + { + .regulators = {}, + .clock = { "camnoc_axi", "cpas_ahb", "soc_ahb", + "vfe_lite" }, + .clock_rate = { { 0 }, + { 0 }, + { 0 }, + { 100000000, 320000000, 404000000, 480000000, 600000000 } }, + .reg = { "vfe_lite" }, + .interrupt = { "vfe_lite" }, + .vfe = { + .is_lite = true, + .line_num = 4, + .hw_ops = &vfe_ops_170, + .formats_rdi = &vfe_formats_rdi_845, + .formats_pix = &vfe_formats_pix_845 + } + } +}; + static const struct camss_subdev_resources csiphy_res_845[] = { /* CSIPHY0 */ { @@ -2582,6 +2761,17 @@ static const struct camss_resources sdm660_resources = { .link_entities = camss_link_entities }; +static const struct camss_resources sdm670_resources = { + .version = CAMSS_845, + .csiphy_res = csiphy_res_670, + .csid_res = csid_res_670, + .vfe_res = vfe_res_670, + .csiphy_num = ARRAY_SIZE(csiphy_res_670), + .csid_num = ARRAY_SIZE(csid_res_670), + .vfe_num = ARRAY_SIZE(vfe_res_670), + .link_entities = camss_link_entities +}; + static const struct camss_resources sdm845_resources = { .version = CAMSS_845, .csiphy_res = csiphy_res_845, @@ -2627,6 +2817,7 @@ static const struct of_device_id camss_dt_match[] = { { .compatible = "qcom,msm8953-camss", .data = &msm8953_resources }, { .compatible = "qcom,msm8996-camss", .data = &msm8996_resources }, { .compatible = "qcom,sdm660-camss", .data = &sdm660_resources }, + { .compatible = "qcom,sdm670-camss", .data = &sdm670_resources }, { .compatible = "qcom,sdm845-camss", .data = &sdm845_resources }, { .compatible = "qcom,sm8250-camss", .data = &sm8250_resources }, { .compatible = "qcom,sc8280xp-camss", .data = &sc8280xp_resources }, From patchwork Wed Dec 18 23:17:34 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Acayan X-Patchwork-Id: 13914278 Received: from mail-io1-f51.google.com (mail-io1-f51.google.com [209.85.166.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 61B7C1FCCEE; Wed, 18 Dec 2024 23:19:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.166.51 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734563961; cv=none; b=TXODiiQAOM0lU8BreafdKWjRtEfeVzN2Li4g7AttrrLaBg5C6lR+qjQGGjVM7Mvh2r3EA5TcwJXE+VZaCgFTMrzNjyFMjXqO7m3D93tT5mLHIzE4ZMYJQk+kMMv1pmkx9lV4NjBl0Z1uUxUrrbijGg6P4xIDT2DdKwMh5P7eYco= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734563961; c=relaxed/simple; bh=cA8ia9gUiiYNXiF6cnwGU5yb3IDiwQmbEW9UlFxwV/c=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=dA8Ch6QeyZmheaWMFzhvADgrVetZZTSZmKqDKgqNvYbRJ/4yk66uYszx7y9ZEp4RKQZ4ZrzCvJwE14t4FVsHeydhbk08SA2eg/YTlqd3vlP071m6TlCdWOTtsJEttL0WnfqlO8yNhaf0nAm5xbn+fjtOppWNOLRHei2cOHw6pU4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=L+9lgSuX; arc=none smtp.client-ip=209.85.166.51 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="L+9lgSuX" Received: by mail-io1-f51.google.com with SMTP id ca18e2360f4ac-844dfe4b136so7217039f.3; Wed, 18 Dec 2024 15:19:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1734563959; x=1735168759; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=riRl3ZaZxwmWu/pRGOcAcSHXuWSTMJ3QmPDQGJ4LbYU=; b=L+9lgSuX9uL4jR87aruNsdCy+USHf96oNZKG4z5/yEm7HcynQLfgkMNARiUovkA/yJ eu2W1cD19wmvnqbacrTUJtG7GYDlZ6Tu9rq2oj5c2Hzz1L03PLQxF3Zjg6JMZJH278s4 6iYF3YSdKGPjILf2PoJuo9/taRJ1ozWVJ/O5YlW17oDtUfSUaAheST2gFHzTJtljlJVy 5XYxN57Xcx4yzXlViyFetrW85tdcYdkDtvI9/5NUavwSqvRt5dHFoKDIfcVbTW1ZVxat GQasIFx0MlW9AaWYYT+DAvqa3OB3K/D337Ms2rvVuJ5HnaHUZlXyVFKC9avrX0pwQclZ jSqA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1734563959; x=1735168759; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=riRl3ZaZxwmWu/pRGOcAcSHXuWSTMJ3QmPDQGJ4LbYU=; b=fXiuZDP3OwyHZQAkpA0F1wbMCF+GtuCFwTwamjOoaUzZ5gdIwRUXUoFigaOXlb+LB5 SAjz969f04LydHnt0G2AlMzZMX09tpyHvkw/glNCi6icJIJ5USD+rsNP3MBMhjyftZnC ldikiQ+NHHd2mBtTS6g9ygkQp6pu3jTv96fs9UBYo+Fjyje6g2EOWHhIOs9NC6MXJCov VT6fyitw/hkunXiYl/oprc5rCctAUBCSoT0wwCYvurIxhYHKs6XnGkGihoFb2gN10d4i fNblDBM/UizcMZBe3C4RLfrs2PT9rp6pmxTGet6Be443ikugPMuAgDt9HWK8WI9OmEyY ST5g== X-Forwarded-Encrypted: i=1; AJvYcCUCsNW5RAUdyA0N86Jn/XBdVxFMjG5AQOiu5CynEwhJnS3Krj2/0hnNvimutdWHDwdTbSMu7DlqgjZGgSBAZw==@vger.kernel.org, AJvYcCW8WskMpNHKp0dYemYRjkUVrGnLs87A/vkXw9ZRLuVZODg4u7tVQOwWql2LOCL/j9gw2rTLRF5G+Uvc@vger.kernel.org, AJvYcCWDiq1ymmI6rsR4YfcDvFFNpullhbwrQRN53LM+NdSmzfQkcE8MPr63sb+5LLD3c/EINExQhJZv2M+7@vger.kernel.org, AJvYcCXgCyNiLKHcRW9dhBfL5O4rW/Wysl3K8vgGsqZDq8qp+e+OrVT2A/WbVTDtS/hSPH1Net0PMMS1lMtl7hw=@vger.kernel.org X-Gm-Message-State: AOJu0YyyAYT8LHLqtass3gF8jqMUNS5xKEDZ+SSDHVgrrlPTHsxv2JSY fz/iaXfnHCFtJN1pBHURJvcBKejCu34uLAUHzQRheuLlj1W/hlR5CoMgYoNH X-Gm-Gg: ASbGncvkNQ/BPKzDFAtk/n8xxfxRoFifY0GriDrFfMVhsklA5/eBYVkOJlgna23A4qq OKNtZDAnq25JWQuXlVYnESM2GnLpeJpWuVHvOXh8P9I6EccthSuXfCJCJrAvV9Y7t4jhl24m35l OtdlBlRSzCAhak3ULD2XloDyg5PgOauf68aQimsdEOmThL/YDcd8ylqUfiqpAmRsN6LIGir3rIU qQ1RF/Dx4IJ3EI3TP47l/7a/kPkaWyOjz0CNpD7gRE= X-Google-Smtp-Source: AGHT+IGNByxvPRTJMN8l6rCvlxitQh8qSqEXxmMaxgrEVpsvPTBwcrRgN5giPiZSOteJz+kkPJuyaQ== X-Received: by 2002:a05:6602:3f94:b0:844:c6a8:7f8a with SMTP id ca18e2360f4ac-84758582668mr502946339f.9.1734563959461; Wed, 18 Dec 2024 15:19:19 -0800 (PST) Received: from localhost ([2607:fea8:52a3:d200::eca]) by smtp.gmail.com with ESMTPSA id ca18e2360f4ac-844f6292754sm255182939f.29.2024.12.18.15.19.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Dec 2024 15:19:19 -0800 (PST) From: Richard Acayan To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Robert Foss , Todor Tomov , "Bryan O'Donoghue" , Mauro Carvalho Chehab , Konrad Dybcio , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-media@vger.kernel.org Cc: Vladimir Zapolskiy , Richard Acayan Subject: [PATCH v9 4/5] arm64: dts: qcom: sdm670: add camcc Date: Wed, 18 Dec 2024 18:17:34 -0500 Message-ID: <20241218231729.270137-11-mailingradian@gmail.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241218231729.270137-7-mailingradian@gmail.com> References: <20241218231729.270137-7-mailingradian@gmail.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The camera clock controller on SDM670 controls the clocks that drive the camera subsystem. The clocks are the same as on SDM845. Add the camera clock controller for SDM670. Reviewed-by: Bryan O'Donoghue Signed-off-by: Richard Acayan --- arch/arm64/boot/dts/qcom/sdm670.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi b/arch/arm64/boot/dts/qcom/sdm670.dtsi index c93dd06c0b7d..328096b91126 100644 --- a/arch/arm64/boot/dts/qcom/sdm670.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm670.dtsi @@ -1400,6 +1400,16 @@ spmi_bus: spmi@c440000 { #interrupt-cells = <4>; }; + camcc: clock-controller@ad00000 { + compatible = "qcom,sdm670-camcc", "qcom,sdm845-camcc"; + reg = <0 0x0ad00000 0 0x10000>; + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "bi_tcxo"; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + }; + mdss: display-subsystem@ae00000 { compatible = "qcom,sdm670-mdss"; reg = <0 0x0ae00000 0 0x1000>; From patchwork Wed Dec 18 23:17:35 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Acayan X-Patchwork-Id: 13914279 Received: from mail-il1-f171.google.com (mail-il1-f171.google.com [209.85.166.171]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BB3181FCD15; Wed, 18 Dec 2024 23:19:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.166.171 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734563964; cv=none; b=Fzg8Cb1QJziQnJGj4QgFTjLQBGZ++8Iygc2sUuYlBUUq9aCny+YEQ7hXrio+0RlaXktgokdritPhKLEQvAvcfp74l5MSd6XjAiixiWedbTOxe90CTRnCsT4Mjb5CaMO6TRDhxzSvxqZ56QBcGmzAoA8S2TborR3jn8H1dcBIWto= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734563964; c=relaxed/simple; bh=f9cJ05WCR2wdPEl2OKl0KC8I4zZ0XSzhEbqHOiSZ4Yc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=axSCjZ0RTkG12u/IUjHCZ8IUps0fogivg609lbETa0z6rkGl+vMLjjhVFniLcOUBItO84vnhpqpq97qWADxIVThQJJnudHlEkBF5AmX2R6tcbFctqXhGTapmQ8mM0r9Kc75Vy3ZYdUVEX/CeNneAFGghWFfypjo57Aohq8ADrNI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=lmXb3QGP; arc=none smtp.client-ip=209.85.166.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="lmXb3QGP" Received: by mail-il1-f171.google.com with SMTP id e9e14a558f8ab-3a7e108b491so1218855ab.3; Wed, 18 Dec 2024 15:19:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1734563962; x=1735168762; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=24h5o9WmiPWWVl46Dr7LPcbWN6q2XU2AlMJNr+RBJSM=; b=lmXb3QGPtmMA+uO9quDWfJe4os5egOVQXG2mH8uaCVeFy3WAiSga7Wy48G3I1ve4g8 44gAa4YAuf6XqvIcS5xa/7Qy8JADkhB6M1EpdNrZ0DAZo7AJDK07l5MLrk5VFhMebq2m +9hA4fOs8fT/+B9VAff7fJBsELDgdX3cZTZat7qWEONlwSyFS6ElPKM2YVVti1W+4lH6 qZonJpg/PUs0UJc8leK/VlVbIUtSCCkEaEzOu1ny/zMCtK1GIMiihULdPCROO9cwkIzu 52erGYzy/2vpSqd2sDuj1tIn/38QzzOJWRPque8xAEiiVDiV0QG3Q0FLKGleCM69Sj2b 1jOA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1734563962; x=1735168762; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=24h5o9WmiPWWVl46Dr7LPcbWN6q2XU2AlMJNr+RBJSM=; b=L2oFdBIOTK9kC6EQgbPvL5YiUkHmvf/6/Azv/NTfzf1grLuN41pwfJ8HI7O3tqKxrC 6bXCsooEBG79qDr8DV3OXTQlwnZ6fFGWIojWyB7w3iDa9fzezaNDpMoW49UkLdVT7+qr 0ddWIWtJzL7ihJYjpeyXn1vHePRaHM4e3WunAOFeiPZMxWQmE4QlJ+A9forf1tIPZiTO g7x3K1cfa+9vgoxffxv2/nWbh4Y2MN349iAZ2OcGBN+SaRArDjrfZ+vmL0tJajm6OhPG Pebgrvwvu6AifqmKx3nHbWT3CwYVqpfegOAHKIfiKj9fuuhXMcujozcMsdsrIe3myRVj yeuQ== X-Forwarded-Encrypted: i=1; AJvYcCVVOc8YKr3yFVLi5mxnChlfwFdX01tgQsJ6D4BbKA3hji0XbQJH0heMZ/EbSvqoeY5cZgc5Dyt6Uoj7S0Y=@vger.kernel.org, AJvYcCWJjm157uyP9mDEiN9MrD6zy3/QCYSdXJlQ3slqa0hfjF94TA51gB3eor+nqrN/pXhERO6ZK+nBg7iTzrUQcA==@vger.kernel.org, AJvYcCXP0RgwNyMjJgyjRLPo5FIJdW71j0V8ijlDjY7iaU0WwAcG2v3pSiYYYTx7Uf5M1TOPZUsEBuT5NIfw@vger.kernel.org, AJvYcCXqXMr7ZmeAq/BS7r4ZnvBHZmd2bzYJkUh8rgW0KPcabgogsKrPortI0GBzJgV+16xUij8QvFBMgksx@vger.kernel.org X-Gm-Message-State: AOJu0YzY94GhYwC3Tz4wpXS82+uDxVdVHooiS++MXrssRvM0zpXuAk6L z87wxNOId9j/fEtexTfK6XncBGrGSxCp54UpGJKveyLmzcSC2LNY X-Gm-Gg: ASbGncswk7o10YR6BPIptO4H9xgu0b0SPvxJbwTxZgaym9fkM+1YhSWvRZFNlivgysq 73Ncdm+BfoyAOAWn5uxGUN8BVqIwJxEdJ9eWzzVQMWOXYLH6mccvN+Lr0EzsjpOiJ5onjpi7dgY jn6poz226ddxvJzdEHf/tJuZs94EXKZYoRGR7gLkJun4/n7l1qvX47DdlQQz74Z2uzoEAnQI2kr KKojs0oMRdLf6Txzzbl4ltVUQnH+8YVWQN++eEYvj8= X-Google-Smtp-Source: AGHT+IGKkxlLb7J3Vm3DERq+L/8vB3lE3fDDHMAgqPxonqOOV7QCBFJdENzhhf1Oe3mszKJUiRNxZw== X-Received: by 2002:a05:6e02:1985:b0:3a7:9347:544c with SMTP id e9e14a558f8ab-3c01062a2d0mr15696445ab.5.1734563961816; Wed, 18 Dec 2024 15:19:21 -0800 (PST) Received: from localhost ([2607:fea8:52a3:d200::eca]) by smtp.gmail.com with ESMTPSA id 8926c6da1cb9f-4e5e32a2dfdsm2428402173.105.2024.12.18.15.19.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Dec 2024 15:19:21 -0800 (PST) From: Richard Acayan To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Robert Foss , Todor Tomov , "Bryan O'Donoghue" , Mauro Carvalho Chehab , Konrad Dybcio , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-media@vger.kernel.org Cc: Vladimir Zapolskiy , Richard Acayan Subject: [PATCH v9 5/5] arm64: dts: qcom: sdm670: add camss and cci Date: Wed, 18 Dec 2024 18:17:35 -0500 Message-ID: <20241218231729.270137-12-mailingradian@gmail.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241218231729.270137-7-mailingradian@gmail.com> References: <20241218231729.270137-7-mailingradian@gmail.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add the camera subsystem and CCI used to interface with cameras on the Snapdragon 670. Signed-off-by: Richard Acayan Reviewed-by: Bryan O'Donoghue Reviewed-by: Vladimir Zapolskiy --- arch/arm64/boot/dts/qcom/sdm670.dtsi | 197 +++++++++++++++++++++++++++ 1 file changed, 197 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi b/arch/arm64/boot/dts/qcom/sdm670.dtsi index 328096b91126..068b6be14be7 100644 --- a/arch/arm64/boot/dts/qcom/sdm670.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm670.dtsi @@ -6,6 +6,7 @@ * Copyright (c) 2022, Richard Acayan. All rights reserved. */ +#include #include #include #include @@ -1168,6 +1169,34 @@ tlmm: pinctrl@3400000 { gpio-ranges = <&tlmm 0 0 151>; wakeup-parent = <&pdc>; + cci0_default: cci0-default-state { + pins = "gpio17", "gpio18"; + function = "cci_i2c"; + drive-strength = <2>; + bias-pull-up; + }; + + cci0_sleep: cci0-sleep-state { + pins = "gpio17", "gpio18"; + function = "cci_i2c"; + drive-strength = <2>; + bias-pull-down; + }; + + cci1_default: cci1-default-state { + pins = "gpio19", "gpio20"; + function = "cci_i2c"; + drive-strength = <2>; + bias-pull-up; + }; + + cci1_sleep: cci1-sleep-state { + pins = "gpio19", "gpio20"; + function = "cci_i2c"; + drive-strength = <2>; + bias-pull-down; + }; + qup_i2c0_default: qup-i2c0-default-state { pins = "gpio0", "gpio1"; function = "qup0"; @@ -1400,6 +1429,174 @@ spmi_bus: spmi@c440000 { #interrupt-cells = <4>; }; + cci: cci@ac4a000 { + compatible = "qcom,sdm670-cci", "qcom,msm8996-cci"; + #address-cells = <1>; + #size-cells = <0>; + + reg = <0 0x0ac4a000 0 0x4000>; + interrupts = ; + power-domains = <&camcc TITAN_TOP_GDSC>; + + clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>, + <&camcc CAM_CC_SOC_AHB_CLK>, + <&camcc CAM_CC_CPAS_AHB_CLK>, + <&camcc CAM_CC_CCI_CLK>; + clock-names = "camnoc_axi", + "soc_ahb", + "cpas_ahb", + "cci"; + + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&cci0_default &cci1_default>; + pinctrl-1 = <&cci0_sleep &cci1_sleep>; + + status = "disabled"; + + cci_i2c0: i2c-bus@0 { + reg = <0>; + clock-frequency = <1000000>; + #address-cells = <1>; + #size-cells = <0>; + }; + + cci_i2c1: i2c-bus@1 { + reg = <1>; + clock-frequency = <1000000>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + + camss: isp@acb3000 { + compatible = "qcom,sdm670-camss"; + reg = <0 0x0acb3000 0 0x1000>, + <0 0x0acba000 0 0x1000>, + <0 0x0acc8000 0 0x1000>, + <0 0x0ac65000 0 0x1000>, + <0 0x0ac66000 0 0x1000>, + <0 0x0ac67000 0 0x1000>, + <0 0x0acaf000 0 0x4000>, + <0 0x0acb6000 0 0x4000>, + <0 0x0acc4000 0 0x4000>; + reg-names = "csid0", + "csid1", + "csid2", + "csiphy0", + "csiphy1", + "csiphy2", + "vfe0", + "vfe1", + "vfe_lite"; + + interrupts = , + , + , + , + , + , + , + , + ; + interrupt-names = "csid0", + "csid1", + "csid2", + "csiphy0", + "csiphy1", + "csiphy2", + "vfe0", + "vfe1", + "vfe_lite"; + + clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>, + <&camcc CAM_CC_CPAS_AHB_CLK>, + <&camcc CAM_CC_IFE_0_CSID_CLK>, + <&camcc CAM_CC_IFE_1_CSID_CLK>, + <&camcc CAM_CC_IFE_LITE_CSID_CLK>, + <&camcc CAM_CC_CSIPHY0_CLK>, + <&camcc CAM_CC_CSI0PHYTIMER_CLK>, + <&camcc CAM_CC_CSIPHY1_CLK>, + <&camcc CAM_CC_CSI1PHYTIMER_CLK>, + <&camcc CAM_CC_CSIPHY2_CLK>, + <&camcc CAM_CC_CSI2PHYTIMER_CLK>, + <&gcc GCC_CAMERA_AHB_CLK>, + <&gcc GCC_CAMERA_AXI_CLK>, + <&camcc CAM_CC_SOC_AHB_CLK>, + <&camcc CAM_CC_IFE_0_CLK>, + <&camcc CAM_CC_IFE_0_AXI_CLK>, + <&camcc CAM_CC_IFE_0_CPHY_RX_CLK>, + <&camcc CAM_CC_IFE_1_CLK>, + <&camcc CAM_CC_IFE_1_AXI_CLK>, + <&camcc CAM_CC_IFE_1_CPHY_RX_CLK>, + <&camcc CAM_CC_IFE_LITE_CLK>, + <&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>; + clock-names = "camnoc_axi", + "cpas_ahb", + "csi0", + "csi1", + "csi2", + "csiphy0", + "csiphy0_timer", + "csiphy1", + "csiphy1_timer", + "csiphy2", + "csiphy2_timer", + "gcc_camera_ahb", + "gcc_camera_axi", + "soc_ahb", + "vfe0", + "vfe0_axi", + "vfe0_cphy_rx", + "vfe1", + "vfe1_axi", + "vfe1_cphy_rx", + "vfe_lite", + "vfe_lite_cphy_rx"; + + iommus = <&apps_smmu 0x808 0x0>, + <&apps_smmu 0x810 0x8>, + <&apps_smmu 0xc08 0x0>, + <&apps_smmu 0xc10 0x8>; + + power-domains = <&camcc IFE_0_GDSC>, + <&camcc IFE_1_GDSC>, + <&camcc TITAN_TOP_GDSC>; + power-domain-names = "ife0", + "ife1", + "top"; + + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + camss_endpoint0: endpoint { + status = "disabled"; + }; + }; + + port@1 { + reg = <1>; + + camss_endpoint1: endpoint { + status = "disabled"; + }; + }; + + port@2 { + reg = <2>; + + camss_endpoint2: endpoint { + status = "disabled"; + }; + }; + }; + }; + camcc: clock-controller@ad00000 { compatible = "qcom,sdm670-camcc", "qcom,sdm845-camcc"; reg = <0 0x0ad00000 0 0x10000>;