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+extern const Property migration_properties[]; /* capabilities */ diff --git a/migration/options.c b/migration/options.c index ad8d6989a80..24cc8471aa0 100644 --- a/migration/options.c +++ b/migration/options.c @@ -85,7 +85,7 @@ #define DEFAULT_MIGRATE_VCPU_DIRTY_LIMIT_PERIOD 1000 /* milliseconds */ #define DEFAULT_MIGRATE_VCPU_DIRTY_LIMIT 1 /* MB/s */ -Property migration_properties[] = { +const Property migration_properties[] = { DEFINE_PROP_BOOL("store-global-state", MigrationState, store_global_state, true), DEFINE_PROP_BOOL("send-configuration", MigrationState, From patchwork Thu Dec 19 08:31:49 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 13914803 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 445C0E77184 for ; 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- #ifndef CONFIG_USER_ONLY #include "hw/core/sysemu-cpu-ops.h" @@ -7468,7 +7463,6 @@ static void ppc_cpu_class_init(ObjectClass *oc, void *data) device_class_set_parent_unrealize(dc, ppc_cpu_unrealize, &pcc->parent_unrealize); pcc->pvr_match = ppc_pvr_match_default; - device_class_set_props(dc, ppc_cpu_properties); resettable_class_set_parent_phases(rc, NULL, ppc_cpu_reset_hold, NULL, &pcc->parent_phases); From patchwork Thu Dec 19 08:31:51 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 13914841 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 43473E77184 for ; Thu, 19 Dec 2024 08:38:29 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tOBxn-0004U5-3F; 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helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -31 X-Spam_score: -3.2 X-Spam_bar: --- X-Spam_report: (-3.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-1.116, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Richard Henderson Avoid the empty property list for user-only mode. Signed-off-by: Richard Henderson Link: https://lore.kernel.org/r/20241216035109.3486070-5-richard.henderson@linaro.org Signed-off-by: Paolo Bonzini --- target/s390x/cpu.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c index 4702761ca30..263f9e84ed6 100644 --- a/target/s390x/cpu.c +++ b/target/s390x/cpu.c @@ -309,8 +309,8 @@ static const gchar *s390_gdb_arch_name(CPUState *cs) return "s390:64-bit"; } +#ifndef CONFIG_USER_ONLY static const Property s390x_cpu_properties[] = { -#if !defined(CONFIG_USER_ONLY) DEFINE_PROP_UINT32("core-id", S390CPU, env.core_id, 0), DEFINE_PROP_INT32("socket-id", S390CPU, env.socket_id, -1), DEFINE_PROP_INT32("book-id", S390CPU, env.book_id, -1), @@ -318,9 +318,9 @@ static const Property s390x_cpu_properties[] = { DEFINE_PROP_BOOL("dedicated", S390CPU, env.dedicated, false), DEFINE_PROP_CPUS390ENTITLEMENT("entitlement", S390CPU, env.entitlement, S390_CPU_ENTITLEMENT_AUTO), -#endif DEFINE_PROP_END_OF_LIST() }; +#endif #ifdef CONFIG_TCG #include "hw/core/tcg-cpu-ops.h" @@ -388,7 +388,6 @@ static void s390_cpu_class_init(ObjectClass *oc, void *data) device_class_set_parent_realize(dc, s390_cpu_realizefn, &scc->parent_realize); - device_class_set_props(dc, s390x_cpu_properties); dc->user_creatable = true; resettable_class_set_parent_phases(rc, NULL, s390_cpu_reset_hold, NULL, @@ -404,6 +403,7 @@ static void s390_cpu_class_init(ObjectClass *oc, void *data) cc->gdb_read_register = s390_cpu_gdb_read_register; cc->gdb_write_register = s390_cpu_gdb_write_register; #ifndef CONFIG_USER_ONLY + device_class_set_props(dc, s390x_cpu_properties); s390_cpu_class_init_sysemu(cc); #endif cc->disas_set_info = s390_cpu_disas_set_info; From patchwork Thu Dec 19 08:31:52 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 13914844 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 54EC8E7718A for ; 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} -static Property elroy_pcihost_properties[] = { - DEFINE_PROP_END_OF_LIST(), -}; - static const VMStateDescription vmstate_elroy = { .name = "Elroy", .version_id = 1, @@ -490,7 +486,6 @@ static void elroy_pcihost_class_init(ObjectClass *klass, void *data) DeviceClass *dc = DEVICE_CLASS(klass); device_class_set_legacy_reset(dc, elroy_reset); - device_class_set_props(dc, elroy_pcihost_properties); dc->vmsd = &vmstate_elroy; dc->user_creatable = false; } From patchwork Thu Dec 19 08:31:53 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 13914834 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4FE94E77184 for ; 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helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -31 X-Spam_score: -3.2 X-Spam_bar: --- X-Spam_report: (-3.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-1.116, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Richard Henderson Do not register an empty set of properties. Signed-off-by: Richard Henderson Link: https://lore.kernel.org/r/20241216035109.3486070-7-richard.henderson@linaro.org Signed-off-by: Paolo Bonzini --- hw/ppc/spapr_nvdimm.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/hw/ppc/spapr_nvdimm.c b/hw/ppc/spapr_nvdimm.c index 2ef6f29f3dd..8bcce4146a5 100644 --- a/hw/ppc/spapr_nvdimm.c +++ b/hw/ppc/spapr_nvdimm.c @@ -884,22 +884,23 @@ static void spapr_nvdimm_unrealize(NVDIMMDevice *dimm) vmstate_unregister(NULL, &vmstate_spapr_nvdimm_states, dimm); } -static const Property spapr_nvdimm_properties[] = { #ifdef CONFIG_LIBPMEM +static const Property spapr_nvdimm_properties[] = { DEFINE_PROP_BOOL("pmem-override", SpaprNVDIMMDevice, pmem_override, false), -#endif DEFINE_PROP_END_OF_LIST(), }; +#endif static void spapr_nvdimm_class_init(ObjectClass *oc, void *data) { - DeviceClass *dc = DEVICE_CLASS(oc); NVDIMMClass *nvc = NVDIMM_CLASS(oc); nvc->realize = spapr_nvdimm_realize; nvc->unrealize = spapr_nvdimm_unrealize; - device_class_set_props(dc, spapr_nvdimm_properties); +#ifdef CONFIG_LIBPMEM + device_class_set_props(DEVICE_CLASS(oc), spapr_nvdimm_properties); +#endif } static void spapr_nvdimm_init(Object *obj) From patchwork Thu Dec 19 08:31:54 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 13914807 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id F23C6E7718B for ; Thu, 19 Dec 2024 08:33:47 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tOBxq-0004Vz-TP; Thu, 19 Dec 2024 03:32:58 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tOBxh-0004Sl-8t for qemu-devel@nongnu.org; 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helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -31 X-Spam_score: -3.2 X-Spam_bar: --- X-Spam_report: (-3.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-1.116, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Richard Henderson Signed-off-by: Richard Henderson Link: https://lore.kernel.org/r/20241216035109.3486070-8-richard.henderson@linaro.org Signed-off-by: Paolo Bonzini --- hw/tricore/tc27x_soc.c | 5 ----- hw/tricore/tricore_testdevice.c | 5 ----- 2 files changed, 10 deletions(-) diff --git a/hw/tricore/tc27x_soc.c b/hw/tricore/tc27x_soc.c index ecd92717b50..81bb16d89b6 100644 --- a/hw/tricore/tc27x_soc.c +++ b/hw/tricore/tc27x_soc.c @@ -201,16 +201,11 @@ static void tc27x_soc_init(Object *obj) object_initialize_child(obj, "tc27x", &s->cpu, sc->cpu_type); } -static Property tc27x_soc_properties[] = { - DEFINE_PROP_END_OF_LIST(), -}; - static void tc27x_soc_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); dc->realize = tc27x_soc_realize; - device_class_set_props(dc, tc27x_soc_properties); } static void tc277d_soc_class_init(ObjectClass *oc, void *data) diff --git a/hw/tricore/tricore_testdevice.c b/hw/tricore/tricore_testdevice.c index ae95c495654..e60866d76fa 100644 --- a/hw/tricore/tricore_testdevice.c +++ b/hw/tricore/tricore_testdevice.c @@ -58,15 +58,10 @@ static void tricore_testdevice_init(Object *obj) "tricore_testdevice", 0x4); } -static Property tricore_testdevice_properties[] = { - DEFINE_PROP_END_OF_LIST() -}; - static void tricore_testdevice_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); - device_class_set_props(dc, tricore_testdevice_properties); device_class_set_legacy_reset(dc, tricore_testdevice_reset); } From patchwork Thu Dec 19 08:31:55 2024 Content-Type: text/plain; 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} -static Property emulated_ccw_3270_properties[] = { - DEFINE_PROP_END_OF_LIST(), -}; - static void emulated_ccw_3270_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); - device_class_set_props(dc, emulated_ccw_3270_properties); dc->realize = emulated_ccw_3270_realize; dc->hotpluggable = false; set_bit(DEVICE_CATEGORY_DISPLAY, dc->categories); From patchwork Thu Dec 19 08:31:56 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 13914842 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AC0A1E77184 for ; Thu, 19 Dec 2024 08:38:34 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tOBxn-0004U7-9c; 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helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -31 X-Spam_score: -3.2 X-Spam_bar: --- X-Spam_report: (-3.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-1.116, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Richard Henderson There is no point in registering no properties. Remove xen_sysdev_class_init entirely, as it did nothing else. Signed-off-by: Richard Henderson Link: https://lore.kernel.org/r/20241216035109.3486070-10-richard.henderson@linaro.org Signed-off-by: Paolo Bonzini --- hw/xen/xen-legacy-backend.c | 17 ----------------- 1 file changed, 17 deletions(-) diff --git a/hw/xen/xen-legacy-backend.c b/hw/xen/xen-legacy-backend.c index e8e1ee4f7d8..118c571b3a7 100644 --- a/hw/xen/xen-legacy-backend.c +++ b/hw/xen/xen-legacy-backend.c @@ -635,15 +635,10 @@ int xen_be_bind_evtchn(struct XenLegacyDevice *xendev) } -static Property xendev_properties[] = { - DEFINE_PROP_END_OF_LIST(), -}; - static void xendev_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); - device_class_set_props(dc, xendev_properties); set_bit(DEVICE_CATEGORY_MISC, dc->categories); /* xen-backend devices can be plugged/unplugged dynamically */ dc->user_creatable = true; @@ -674,22 +669,10 @@ static const TypeInfo xensysbus_info = { } }; -static Property xen_sysdev_properties[] = { - {/* end of property list */}, -}; - -static void xen_sysdev_class_init(ObjectClass *klass, void *data) -{ - DeviceClass *dc = DEVICE_CLASS(klass); - - device_class_set_props(dc, xen_sysdev_properties); -} - static const TypeInfo xensysdev_info = { .name = TYPE_XENSYSDEV, .parent = TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(SysBusDevice), - .class_init = xen_sysdev_class_init, }; static void xenbe_register_types(void) From patchwork Thu Dec 19 08:31:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 13914827 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B22ABE7718B for ; Thu, 19 Dec 2024 08:36:58 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tOBxq-0004Vx-EA; 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Thu, 19 Dec 2024 00:32:49 -0800 (PST) X-Google-Smtp-Source: AGHT+IGcjR+VMxAu0nFHCgL4AzVlqS/5SaastdJGcxUUecubn4xtJRVQYzz0CHTdDnXcZOqc/2/u+Q== X-Received: by 2002:a7b:cde1:0:b0:436:5165:f21f with SMTP id 5b1f17b1804b1-4365c7c9713mr14808035e9.26.1734597169333; Thu, 19 Dec 2024 00:32:49 -0800 (PST) Received: from [192.168.10.47] ([151.81.118.45]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-436612008bcsm11140035e9.16.2024.12.19.00.32.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Dec 2024 00:32:48 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: Richard Henderson Subject: [PULL 10/41] hw/sparc: Remove empty Property lists Date: Thu, 19 Dec 2024 09:31:57 +0100 Message-ID: <20241219083228.363430-11-pbonzini@redhat.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241219083228.363430-1-pbonzini@redhat.com> References: <20241219083228.363430-1-pbonzini@redhat.com> MIME-Version: 1.0 Received-SPF: pass client-ip=170.10.129.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -31 X-Spam_score: -3.2 X-Spam_bar: --- X-Spam_report: (-3.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-1.116, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Richard Henderson Signed-off-by: Richard Henderson Link: https://lore.kernel.org/r/20241216035109.3486070-11-richard.henderson@linaro.org Signed-off-by: Paolo Bonzini --- hw/sparc/sun4m.c | 5 ----- hw/sparc64/sun4u.c | 5 ----- 2 files changed, 10 deletions(-) diff --git a/hw/sparc/sun4m.c b/hw/sparc/sun4m.c index d52e6a7213f..7ec346533e2 100644 --- a/hw/sparc/sun4m.c +++ b/hw/sparc/sun4m.c @@ -732,15 +732,10 @@ static void prom_realize(DeviceState *ds, Error **errp) sysbus_init_mmio(dev, &s->prom); } -static Property prom_properties[] = { - {/* end of property list */}, -}; - static void prom_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); - device_class_set_props(dc, prom_properties); dc->realize = prom_realize; } diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c index 7088ac273ea..05b8c7369e2 100644 --- a/hw/sparc64/sun4u.c +++ b/hw/sparc64/sun4u.c @@ -471,15 +471,10 @@ static void prom_realize(DeviceState *ds, Error **errp) sysbus_init_mmio(dev, &s->prom); } -static Property prom_properties[] = { - {/* end of property list */}, -}; - static void prom_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); - device_class_set_props(dc, prom_properties); dc->realize = prom_realize; } From patchwork Thu Dec 19 08:31:58 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 13914822 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0CEEBE7718A for ; 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helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -31 X-Spam_score: -3.2 X-Spam_bar: --- X-Spam_report: (-3.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-1.116, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Richard Henderson Signed-off-by: Richard Henderson Link: https://lore.kernel.org/r/20241216035109.3486070-12-richard.henderson@linaro.org Signed-off-by: Paolo Bonzini --- hw/virtio/vdpa-dev-pci.c | 5 ----- hw/virtio/vhost-user-snd-pci.c | 5 ----- 2 files changed, 10 deletions(-) diff --git a/hw/virtio/vdpa-dev-pci.c b/hw/virtio/vdpa-dev-pci.c index 5446e6b393e..787926801a1 100644 --- a/hw/virtio/vdpa-dev-pci.c +++ b/hw/virtio/vdpa-dev-pci.c @@ -48,10 +48,6 @@ static void vhost_vdpa_device_pci_instance_init(Object *obj) "bootindex"); } -static Property vhost_vdpa_device_pci_properties[] = { - DEFINE_PROP_END_OF_LIST(), -}; - static int vhost_vdpa_device_pci_post_init(VhostVdpaDevice *v, Error **errp) { VhostVdpaDevicePCI *dev = container_of(v, VhostVdpaDevicePCI, vdev); @@ -80,7 +76,6 @@ static void vhost_vdpa_device_pci_class_init(ObjectClass *klass, void *data) VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass); set_bit(DEVICE_CATEGORY_MISC, dc->categories); - device_class_set_props(dc, vhost_vdpa_device_pci_properties); k->realize = vhost_vdpa_device_pci_realize; } diff --git a/hw/virtio/vhost-user-snd-pci.c b/hw/virtio/vhost-user-snd-pci.c index d61cfdae631..0cb86b7d85d 100644 --- a/hw/virtio/vhost-user-snd-pci.c +++ b/hw/virtio/vhost-user-snd-pci.c @@ -23,10 +23,6 @@ typedef struct VHostUserSoundPCI VHostUserSoundPCI; DECLARE_INSTANCE_CHECKER(VHostUserSoundPCI, VHOST_USER_SND_PCI, TYPE_VHOST_USER_SND_PCI) -static Property vhost_user_snd_pci_properties[] = { - DEFINE_PROP_END_OF_LIST(), -}; - static void vhost_user_snd_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) { VHostUserSoundPCI *dev = VHOST_USER_SND_PCI(vpci_dev); @@ -44,7 +40,6 @@ static void vhost_user_snd_pci_class_init(ObjectClass *klass, void *data) PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass); k->realize = vhost_user_snd_pci_realize; set_bit(DEVICE_CATEGORY_SOUND, dc->categories); - device_class_set_props(dc, vhost_user_snd_pci_properties); pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET; pcidev_k->device_id = 0; /* Set by virtio-pci based on virtio id */ pcidev_k->revision = 0x00; From patchwork Thu Dec 19 08:31:59 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 13914839 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A99CDE77184 for ; Thu, 19 Dec 2024 08:38:18 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tOBxt-0004X6-1s; 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Thu, 19 Dec 2024 00:32:53 -0800 (PST) X-Google-Smtp-Source: AGHT+IFpzVp+rdUfEwhoS9mPfpLdBoyJEXuXG6TC4MXMoEbWgKhwSaBr1kmImIx1MuCXBch0+1WNpQ== X-Received: by 2002:a5d:6c64:0:b0:385:e90a:b7de with SMTP id ffacd0b85a97d-38a1a1f9f38mr1570157f8f.5.1734597173446; Thu, 19 Dec 2024 00:32:53 -0800 (PST) Received: from [192.168.10.47] ([151.81.118.45]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38a1c8acc02sm971232f8f.104.2024.12.19.00.32.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Dec 2024 00:32:52 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: Richard Henderson Subject: [PULL 12/41] include/hw/qdev-core: Detect most empty Property lists at compile time Date: Thu, 19 Dec 2024 09:31:59 +0100 Message-ID: <20241219083228.363430-13-pbonzini@redhat.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241219083228.363430-1-pbonzini@redhat.com> References: <20241219083228.363430-1-pbonzini@redhat.com> MIME-Version: 1.0 Received-SPF: pass client-ip=170.10.133.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -31 X-Spam_score: -3.2 X-Spam_bar: --- X-Spam_report: (-3.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-1.116, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Richard Henderson Signed-off-by: Richard Henderson Link: https://lore.kernel.org/r/20241216035109.3486070-13-richard.henderson@linaro.org Signed-off-by: Paolo Bonzini --- include/hw/qdev-core.h | 8 ++++++++ hw/core/qdev-properties.c | 2 +- migration/migration.c | 2 +- 3 files changed, 10 insertions(+), 2 deletions(-) diff --git a/include/hw/qdev-core.h b/include/hw/qdev-core.h index 5be9844412f..b2859d1e39e 100644 --- a/include/hw/qdev-core.h +++ b/include/hw/qdev-core.h @@ -943,6 +943,14 @@ char *qdev_get_own_fw_dev_path_from_handler(BusState *bus, DeviceState *dev); */ void device_class_set_props(DeviceClass *dc, const Property *props); +/* Validate at least one Property, plus the terminator. */ +#define device_class_set_props(DC, PROPS) \ + do { \ + QEMU_BUILD_BUG_ON(sizeof(PROPS) != sizeof(const Property *) && \ + sizeof(PROPS) < 2 * sizeof(Property)); \ + (device_class_set_props)(DC, PROPS); \ + } while (0) + /** * device_class_set_parent_realize() - set up for chaining realize fns * @dc: The device class diff --git a/hw/core/qdev-properties.c b/hw/core/qdev-properties.c index 315196bd85a..de618a964a9 100644 --- a/hw/core/qdev-properties.c +++ b/hw/core/qdev-properties.c @@ -1061,7 +1061,7 @@ static void qdev_class_add_legacy_property(DeviceClass *dc, const Property *prop NULL, NULL, (Property *)prop); } -void device_class_set_props(DeviceClass *dc, const Property *props) +void (device_class_set_props)(DeviceClass *dc, const Property *props) { const Property *prop; diff --git a/migration/migration.c b/migration/migration.c index 8c5bd0a75c8..6b3b85d31e5 100644 --- a/migration/migration.c +++ b/migration/migration.c @@ -3822,7 +3822,7 @@ static void migration_class_init(ObjectClass *klass, void *data) DeviceClass *dc = DEVICE_CLASS(klass); dc->user_creatable = false; - device_class_set_props(dc, migration_properties); + (device_class_set_props)(dc, migration_properties); } static void migration_instance_finalize(Object *obj) From patchwork Thu Dec 19 08:32:00 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 13914818 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E4914E77184 for ; Thu, 19 Dec 2024 08:35:39 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tOBxw-0004Xr-9b; Thu, 19 Dec 2024 03:33:04 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tOBxu-0004XS-Tg for qemu-devel@nongnu.org; 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helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -31 X-Spam_score: -3.2 X-Spam_bar: --- X-Spam_report: (-3.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-1.116, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Richard Henderson Record the size of the array in DeviceClass.props_count_. Iterate with known count in qdev_prop_walk. Signed-off-by: Richard Henderson Link: https://lore.kernel.org/r/20241216035109.3486070-14-richard.henderson@linaro.org Signed-off-by: Paolo Bonzini --- include/hw/qdev-core.h | 18 ++++++++++++++++++ hw/core/qdev-properties.c | 39 +++++++++++++++++++++++++++++---------- hw/core/qdev.c | 1 + system/qdev-monitor.c | 15 +++++++-------- 4 files changed, 55 insertions(+), 18 deletions(-) diff --git a/include/hw/qdev-core.h b/include/hw/qdev-core.h index b2859d1e39e..cd0ddf84ca5 100644 --- a/include/hw/qdev-core.h +++ b/include/hw/qdev-core.h @@ -138,6 +138,12 @@ struct DeviceClass { */ const Property *props_; + /** + * @props_count_: number of elements in @props_; should only be + * assigned by using device_class_set_props(). + */ + uint16_t props_count_; + /** * @user_creatable: Can user instantiate with -device / device_add? * @@ -951,6 +957,18 @@ void device_class_set_props(DeviceClass *dc, const Property *props); (device_class_set_props)(DC, PROPS); \ } while (0) +/** + * device_class_set_props_n(): add a set of properties to an device + * @dc: the parent DeviceClass all devices inherit + * @props: an array of properties, not terminated by DEFINE_PROP_END_OF_LIST. + * @n: ARRAY_SIZE(@props) + * + * This will add a set of properties to the object. It will fault if + * you attempt to add an existing property defined by a parent class. + * To modify an inherited property you need to use???? + */ +void device_class_set_props_n(DeviceClass *dc, const Property *props, size_t n); + /** * device_class_set_parent_realize() - set up for chaining realize fns * @dc: The device class diff --git a/hw/core/qdev-properties.c b/hw/core/qdev-properties.c index de618a964a9..31e3072b559 100644 --- a/hw/core/qdev-properties.c +++ b/hw/core/qdev-properties.c @@ -749,16 +749,13 @@ const PropertyInfo qdev_prop_array = { /* --- public helpers --- */ -static const Property *qdev_prop_walk(const Property *props, const char *name) +static const Property *qdev_prop_walk(DeviceClass *cls, const char *name) { - if (!props) { - return NULL; - } - while (props->name) { - if (strcmp(props->name, name) == 0) { - return props; + for (int i = 0, n = cls->props_count_; i < n; ++i) { + const Property *prop = &cls->props_[i]; + if (strcmp(prop->name, name) == 0) { + return prop; } - props++; } return NULL; } @@ -771,7 +768,7 @@ static const Property *qdev_prop_find(DeviceState *dev, const char *name) /* device properties */ class = object_get_class(OBJECT(dev)); do { - prop = qdev_prop_walk(DEVICE_CLASS(class)->props_, name); + prop = qdev_prop_walk(DEVICE_CLASS(class), name); if (prop) { return prop; } @@ -1064,9 +1061,31 @@ static void qdev_class_add_legacy_property(DeviceClass *dc, const Property *prop void (device_class_set_props)(DeviceClass *dc, const Property *props) { const Property *prop; + size_t n; dc->props_ = props; - for (prop = props; prop && prop->name; prop++) { + for (prop = props, n = 0; prop && prop->name; prop++, n++) { + qdev_class_add_legacy_property(dc, prop); + qdev_class_add_property(dc, prop->name, prop); + } + + /* We used a hole in DeviceClass because that's still a lot. */ + assert(n <= UINT16_MAX); + dc->props_count_ = n; +} + +void device_class_set_props_n(DeviceClass *dc, const Property *props, size_t n) +{ + /* We used a hole in DeviceClass because that's still a lot. */ + assert(n <= UINT16_MAX); + assert(n != 0); + + dc->props_ = props; + dc->props_count_ = n; + + for (size_t i = 0; i < n; ++i) { + const Property *prop = &props[i]; + assert(prop->name); qdev_class_add_legacy_property(dc, prop); qdev_class_add_property(dc, prop->name, prop); } diff --git a/hw/core/qdev.c b/hw/core/qdev.c index 5f13111b77c..57c1d9df3a7 100644 --- a/hw/core/qdev.c +++ b/hw/core/qdev.c @@ -703,6 +703,7 @@ static void device_class_base_init(ObjectClass *class, void *data) * so do not propagate them to the subclasses. */ klass->props_ = NULL; + klass->props_count_ = 0; } static void device_unparent(Object *obj) diff --git a/system/qdev-monitor.c b/system/qdev-monitor.c index 03ae6106497..6831fffd9d5 100644 --- a/system/qdev-monitor.c +++ b/system/qdev-monitor.c @@ -752,19 +752,18 @@ DeviceState *qdev_device_add(QemuOpts *opts, Error **errp) #define qdev_printf(fmt, ...) monitor_printf(mon, "%*s" fmt, indent, "", ## __VA_ARGS__) -static void qdev_print_props(Monitor *mon, DeviceState *dev, const Property *props, +static void qdev_print_props(Monitor *mon, DeviceState *dev, DeviceClass *dc, int indent) { - if (!props) - return; - for (; props->name; props++) { + for (int i = 0, n = dc->props_count_; i < n; ++i) { + const Property *prop = &dc->props_[i]; char *value; - char *legacy_name = g_strdup_printf("legacy-%s", props->name); + char *legacy_name = g_strdup_printf("legacy-%s", prop->name); if (object_property_get_type(OBJECT(dev), legacy_name, NULL)) { value = object_property_get_str(OBJECT(dev), legacy_name, NULL); } else { - value = object_property_print(OBJECT(dev), props->name, true, + value = object_property_print(OBJECT(dev), prop->name, true, NULL); } g_free(legacy_name); @@ -772,7 +771,7 @@ static void qdev_print_props(Monitor *mon, DeviceState *dev, const Property *pro if (!value) { continue; } - qdev_printf("%s = %s\n", props->name, + qdev_printf("%s = %s\n", prop->name, *value ? value : ""); g_free(value); } @@ -812,7 +811,7 @@ static void qdev_print(Monitor *mon, DeviceState *dev, int indent) } class = object_get_class(OBJECT(dev)); do { - qdev_print_props(mon, dev, DEVICE_CLASS(class)->props_, indent); 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helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -31 X-Spam_score: -3.2 X-Spam_bar: --- X-Spam_report: (-3.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-1.116, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Richard Henderson Export the migration_properties array size from options.c; use that to feed device_class_set_props_n. We must remove DEFINE_PROP_END_OF_LIST so the count is correct. Signed-off-by: Richard Henderson Link: https://lore.kernel.org/r/20241216035109.3486070-15-richard.henderson@linaro.org Signed-off-by: Paolo Bonzini --- migration/options.h | 1 + migration/migration.c | 3 ++- migration/options.c | 2 +- 3 files changed, 4 insertions(+), 2 deletions(-) diff --git a/migration/options.h b/migration/options.h index a360f93a44f..762be4e641a 100644 --- a/migration/options.h +++ b/migration/options.h @@ -21,6 +21,7 @@ /* migration properties */ extern const Property migration_properties[]; +extern const size_t migration_properties_count; /* capabilities */ diff --git a/migration/migration.c b/migration/migration.c index 6b3b85d31e5..d23d392685e 100644 --- a/migration/migration.c +++ b/migration/migration.c @@ -3822,7 +3822,8 @@ static void migration_class_init(ObjectClass *klass, void *data) DeviceClass *dc = DEVICE_CLASS(klass); dc->user_creatable = false; - (device_class_set_props)(dc, migration_properties); + device_class_set_props_n(dc, migration_properties, + migration_properties_count); } static void migration_instance_finalize(Object *obj) diff --git a/migration/options.c b/migration/options.c index 24cc8471aa0..70ff56535a2 100644 --- a/migration/options.c +++ b/migration/options.c @@ -196,8 +196,8 @@ const Property migration_properties[] = { MIGRATION_CAPABILITY_SWITCHOVER_ACK), DEFINE_PROP_MIG_CAP("x-dirty-limit", MIGRATION_CAPABILITY_DIRTY_LIMIT), DEFINE_PROP_MIG_CAP("mapped-ram", MIGRATION_CAPABILITY_MAPPED_RAM), - DEFINE_PROP_END_OF_LIST(), }; +const size_t migration_properties_count = ARRAY_SIZE(migration_properties); bool migrate_auto_converge(void) { From patchwork Thu Dec 19 08:32:02 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 13914815 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C155CE77184 for ; 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helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -31 X-Spam_score: -3.2 X-Spam_bar: --- X-Spam_report: (-3.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-1.116, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Richard Henderson We must remove DEFINE_PROP_END_OF_LIST so the count is correct. Signed-off-by: Richard Henderson Link: https://lore.kernel.org/r/20241216035109.3486070-16-richard.henderson@linaro.org Signed-off-by: Paolo Bonzini --- hw/scsi/megasas.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/hw/scsi/megasas.c b/hw/scsi/megasas.c index 8323cd18e3a..7f012c218b4 100644 --- a/hw/scsi/megasas.c +++ b/hw/scsi/megasas.c @@ -2459,7 +2459,6 @@ static const Property megasas_properties_gen1[] = { DEFINE_PROP_ON_OFF_AUTO("msix", MegasasState, msix, ON_OFF_AUTO_AUTO), DEFINE_PROP_BIT("use_jbod", MegasasState, flags, MEGASAS_FLAG_USE_JBOD, false), - DEFINE_PROP_END_OF_LIST(), }; static const Property megasas_properties_gen2[] = { @@ -2473,7 +2472,6 @@ static const Property megasas_properties_gen2[] = { DEFINE_PROP_ON_OFF_AUTO("msix", MegasasState, msix, ON_OFF_AUTO_AUTO), DEFINE_PROP_BIT("use_jbod", MegasasState, flags, MEGASAS_FLAG_USE_JBOD, false), - DEFINE_PROP_END_OF_LIST(), }; typedef struct MegasasInfo { @@ -2488,6 +2486,7 @@ typedef struct MegasasInfo { int osts; const VMStateDescription *vmsd; const Property *props; + size_t props_count; InterfaceInfo *interfaces; } MegasasInfo; @@ -2504,6 +2503,7 @@ static struct MegasasInfo megasas_devices[] = { .osts = MFI_1078_RM | 1, .vmsd = &vmstate_megasas_gen1, .props = megasas_properties_gen1, + .props_count = ARRAY_SIZE(megasas_properties_gen1), .interfaces = (InterfaceInfo[]) { { INTERFACE_CONVENTIONAL_PCI_DEVICE }, { }, @@ -2520,6 +2520,7 @@ static struct MegasasInfo megasas_devices[] = { .osts = MFI_GEN2_RM, .vmsd = &vmstate_megasas_gen2, .props = megasas_properties_gen2, + .props_count = ARRAY_SIZE(megasas_properties_gen2), .interfaces = (InterfaceInfo[]) { { INTERFACE_PCIE_DEVICE }, { } @@ -2546,7 +2547,7 @@ static void megasas_class_init(ObjectClass *oc, void *data) e->osts = info->osts; e->product_name = info->product_name; e->product_version = info->product_version; - device_class_set_props(dc, info->props); + device_class_set_props_n(dc, info->props, info->props_count); device_class_set_legacy_reset(dc, megasas_scsi_reset); dc->vmsd = info->vmsd; set_bit(DEVICE_CATEGORY_STORAGE, dc->categories); From patchwork Thu Dec 19 08:32:03 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 13914814 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A16BBE77184 for ; Thu, 19 Dec 2024 08:34:57 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tOBy2-0004ZP-Tr; Thu, 19 Dec 2024 03:33:10 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tOBy1-0004Z7-Jh for qemu-devel@nongnu.org; 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Thu, 19 Dec 2024 00:33:02 -0800 (PST) X-Google-Smtp-Source: AGHT+IHKjGpwbAYyzTyApgi/Hc//OmdMRx57jNbb8c2W3s8J/3ePLHgS5d9ooc/n2BgOKe9BwhyFVw== X-Received: by 2002:a05:6000:400f:b0:385:fa2e:a33e with SMTP id ffacd0b85a97d-388e4d8e54cmr6063737f8f.43.1734597181722; Thu, 19 Dec 2024 00:33:01 -0800 (PST) Received: from [192.168.10.47] ([151.81.118.45]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38a1c8ac97fsm962448f8f.92.2024.12.19.00.33.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Dec 2024 00:33:00 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: Richard Henderson Subject: [PULL 16/41] hw/arm/armsse: Use device_class_set_props_n Date: Thu, 19 Dec 2024 09:32:03 +0100 Message-ID: <20241219083228.363430-17-pbonzini@redhat.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241219083228.363430-1-pbonzini@redhat.com> References: <20241219083228.363430-1-pbonzini@redhat.com> MIME-Version: 1.0 Received-SPF: pass client-ip=170.10.133.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -31 X-Spam_score: -3.2 X-Spam_bar: --- X-Spam_report: (-3.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-1.116, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Richard Henderson We must remove DEFINE_PROP_END_OF_LIST so the count is correct. Signed-off-by: Richard Henderson Link: https://lore.kernel.org/r/20241216035109.3486070-17-richard.henderson@linaro.org Signed-off-by: Paolo Bonzini --- hw/arm/armsse.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c index 1cd6b4a4b2b..ffd732f8068 100644 --- a/hw/arm/armsse.c +++ b/hw/arm/armsse.c @@ -72,6 +72,7 @@ struct ARMSSEInfo { bool has_cpu_pwrctrl; bool has_sse_counter; bool has_tcms; + uint8_t props_count; const Property *props; const ARMSSEDeviceInfo *devinfo; const bool *irq_is_common; @@ -87,7 +88,6 @@ static const Property iotkit_properties[] = { DEFINE_PROP_BOOL("CPU0_DSP", ARMSSE, cpu_dsp[0], true), DEFINE_PROP_UINT32("CPU0_MPU_NS", ARMSSE, cpu_mpu_ns[0], 8), DEFINE_PROP_UINT32("CPU0_MPU_S", ARMSSE, cpu_mpu_s[0], 8), - DEFINE_PROP_END_OF_LIST() }; static const Property sse200_properties[] = { @@ -104,7 +104,6 @@ static const Property sse200_properties[] = { DEFINE_PROP_UINT32("CPU0_MPU_S", ARMSSE, cpu_mpu_s[0], 8), DEFINE_PROP_UINT32("CPU1_MPU_NS", ARMSSE, cpu_mpu_ns[1], 8), DEFINE_PROP_UINT32("CPU1_MPU_S", ARMSSE, cpu_mpu_s[1], 8), - DEFINE_PROP_END_OF_LIST() }; static const Property sse300_properties[] = { @@ -117,7 +116,6 @@ static const Property sse300_properties[] = { DEFINE_PROP_BOOL("CPU0_DSP", ARMSSE, cpu_dsp[0], true), DEFINE_PROP_UINT32("CPU0_MPU_NS", ARMSSE, cpu_mpu_ns[0], 8), DEFINE_PROP_UINT32("CPU0_MPU_S", ARMSSE, cpu_mpu_s[0], 8), - DEFINE_PROP_END_OF_LIST() }; static const ARMSSEDeviceInfo iotkit_devices[] = { @@ -528,6 +526,7 @@ static const ARMSSEInfo armsse_variants[] = { .has_sse_counter = false, .has_tcms = false, .props = iotkit_properties, + .props_count = ARRAY_SIZE(iotkit_properties), .devinfo = iotkit_devices, .irq_is_common = sse200_irq_is_common, }, @@ -549,6 +548,7 @@ static const ARMSSEInfo armsse_variants[] = { .has_sse_counter = false, .has_tcms = false, .props = sse200_properties, + .props_count = ARRAY_SIZE(sse200_properties), .devinfo = sse200_devices, .irq_is_common = sse200_irq_is_common, }, @@ -570,6 +570,7 @@ static const ARMSSEInfo armsse_variants[] = { .has_sse_counter = true, .has_tcms = true, .props = sse300_properties, + .props_count = ARRAY_SIZE(sse300_properties), .devinfo = sse300_devices, .irq_is_common = sse300_irq_is_common, }, @@ -1699,7 +1700,7 @@ static void armsse_class_init(ObjectClass *klass, void *data) dc->realize = armsse_realize; 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envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -31 X-Spam_score: -3.2 X-Spam_bar: --- X-Spam_report: (-3.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-1.116, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Richard Henderson This means we can update declare_properties to drop the zero terminator at the end of the array as well. Cc: qemu-rust@nongnu.org Signed-off-by: Richard Henderson Reviewed-by: Paolo Bonzini Link: https://lore.kernel.org/r/20241216035109.3486070-18-richard.henderson@linaro.org Signed-off-by: Paolo Bonzini --- rust/qemu-api/src/device_class.rs | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/rust/qemu-api/src/device_class.rs b/rust/qemu-api/src/device_class.rs index 03d03feee83..c98f0b2c7da 100644 --- a/rust/qemu-api/src/device_class.rs +++ b/rust/qemu-api/src/device_class.rs @@ -7,7 +7,6 @@ use crate::{ bindings::{self, DeviceClass, DeviceState, Error, ObjectClass, Property, VMStateDescription}, prelude::*, - zeroable::Zeroable, }; /// Trait providing the contents of [`DeviceClass`]. @@ -31,7 +30,7 @@ pub trait DeviceImpl { /// device. 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Thu, 19 Dec 2024 00:33:07 -0800 (PST) X-Google-Smtp-Source: AGHT+IFuDqkZNP9JNxZMMT+1kXsDPde+6BfP4PEWrSyz5Xen2nIGPkpognO7hlfhI5420tdMt6GHBg== X-Received: by 2002:a05:600c:510f:b0:436:1b08:4c78 with SMTP id 5b1f17b1804b1-43655401b49mr58587725e9.31.1734597186686; Thu, 19 Dec 2024 00:33:06 -0800 (PST) Received: from [192.168.10.47] ([151.81.118.45]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43656b119d7sm44931385e9.20.2024.12.19.00.33.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Dec 2024 00:33:05 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: Richard Henderson Subject: [PULL 18/41] hw/core: Replace device_class_set_props with a macro Date: Thu, 19 Dec 2024 09:32:05 +0100 Message-ID: <20241219083228.363430-19-pbonzini@redhat.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241219083228.363430-1-pbonzini@redhat.com> References: <20241219083228.363430-1-pbonzini@redhat.com> MIME-Version: 1.0 Received-SPF: pass client-ip=170.10.133.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -31 X-Spam_score: -3.2 X-Spam_bar: --- X-Spam_report: (-3.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-1.116, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Richard Henderson Use ARRAY_SIZE to implement as device_class_set_props_n. Remove any DEFINE_PROP_END_OF_LIST terminator from the count. Signed-off-by: Richard Henderson Link: https://lore.kernel.org/r/20241216035109.3486070-19-richard.henderson@linaro.org Signed-off-by: Paolo Bonzini --- include/hw/qdev-core.h | 21 +++++++++++++-------- hw/core/qdev-properties.c | 16 ---------------- 2 files changed, 13 insertions(+), 24 deletions(-) diff --git a/include/hw/qdev-core.h b/include/hw/qdev-core.h index cd0ddf84ca5..5dc46402585 100644 --- a/include/hw/qdev-core.h +++ b/include/hw/qdev-core.h @@ -941,20 +941,25 @@ char *qdev_get_own_fw_dev_path_from_handler(BusState *bus, DeviceState *dev); /** * device_class_set_props(): add a set of properties to an device * @dc: the parent DeviceClass all devices inherit - * @props: an array of properties, terminate by DEFINE_PROP_END_OF_LIST() + * @props: an array of properties * * This will add a set of properties to the object. It will fault if * you attempt to add an existing property defined by a parent class. * To modify an inherited property you need to use???? + * + * Validate that @props has at least one Property plus the terminator. + * Validate that @props is an array, not a pointer, via ARRAY_SIZE. + * Validate that the array is terminated at compile-time (with -O2), + * which requires the array to be const. */ -void device_class_set_props(DeviceClass *dc, const Property *props); - -/* Validate at least one Property, plus the terminator. */ -#define device_class_set_props(DC, PROPS) \ +#define device_class_set_props(dc, props) \ do { \ - QEMU_BUILD_BUG_ON(sizeof(PROPS) != sizeof(const Property *) && \ - sizeof(PROPS) < 2 * sizeof(Property)); \ - (device_class_set_props)(DC, PROPS); \ + QEMU_BUILD_BUG_ON(sizeof(props) < 2 * sizeof(Property)); \ + size_t props_count_ = ARRAY_SIZE(props) - 1; \ + if ((props)[props_count_].name != NULL) { \ + qemu_build_not_reached(); \ + } \ + device_class_set_props_n((dc), (props), props_count_); \ } while (0) /** diff --git a/hw/core/qdev-properties.c b/hw/core/qdev-properties.c index 31e3072b559..a3d49e20202 100644 --- a/hw/core/qdev-properties.c +++ b/hw/core/qdev-properties.c @@ -1058,22 +1058,6 @@ static void qdev_class_add_legacy_property(DeviceClass *dc, const Property *prop NULL, NULL, (Property *)prop); } -void (device_class_set_props)(DeviceClass *dc, const Property *props) -{ - const Property *prop; - size_t n; - - dc->props_ = props; - for (prop = props, n = 0; prop && prop->name; prop++, n++) { - qdev_class_add_legacy_property(dc, prop); - qdev_class_add_property(dc, prop->name, prop); - } - - /* We used a hole in DeviceClass because that's still a lot. */ - assert(n <= UINT16_MAX); - dc->props_count_ = n; -} - void device_class_set_props_n(DeviceClass *dc, const Property *props, size_t n) { /* We used a hole in DeviceClass because that's still a lot. */ From patchwork Thu Dec 19 08:32:06 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 13914804 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B6884E77184 for ; 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helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -31 X-Spam_score: -3.2 X-Spam_bar: --- X-Spam_report: (-3.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-1.116, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Richard Henderson These are not arrays of Property and had no business using DEFINE_PROP_END_OF_LIST. Use plain { } instead. Signed-off-by: Richard Henderson Link: https://lore.kernel.org/r/20241216035109.3486070-20-richard.henderson@linaro.org Signed-off-by: Paolo Bonzini --- target/riscv/cpu.c | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 4329015076d..a5aa3a8670a 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -213,7 +213,7 @@ const RISCVIsaExtData isa_edata_arr[] = { ISA_EXT_DATA_ENTRY(xtheadsync, PRIV_VERSION_1_11_0, ext_xtheadsync), ISA_EXT_DATA_ENTRY(xventanacondops, PRIV_VERSION_1_12_0, ext_XVentanaCondOps), - DEFINE_PROP_END_OF_LIST(), + { }, }; bool isa_ext_is_enabled(RISCVCPU *cpu, uint32_t ext_offset) @@ -1575,7 +1575,7 @@ const RISCVCPUMultiExtConfig riscv_cpu_extensions[] = { MULTI_EXT_CFG_BOOL("zvksc", ext_zvksc, false), MULTI_EXT_CFG_BOOL("zvksg", ext_zvksg, false), - DEFINE_PROP_END_OF_LIST(), + { }, }; const RISCVCPUMultiExtConfig riscv_cpu_vendor_exts[] = { @@ -1592,12 +1592,12 @@ const RISCVCPUMultiExtConfig riscv_cpu_vendor_exts[] = { MULTI_EXT_CFG_BOOL("xtheadsync", ext_xtheadsync, false), MULTI_EXT_CFG_BOOL("xventanacondops", ext_XVentanaCondOps, false), - DEFINE_PROP_END_OF_LIST(), + { }, }; /* These are experimental so mark with 'x-' */ const RISCVCPUMultiExtConfig riscv_cpu_experimental_exts[] = { - DEFINE_PROP_END_OF_LIST(), + { }, }; /* @@ -1610,7 +1610,7 @@ const RISCVCPUMultiExtConfig riscv_cpu_experimental_exts[] = { const RISCVCPUMultiExtConfig riscv_cpu_named_features[] = { MULTI_EXT_CFG_BOOL("zic64b", ext_zic64b, true), - DEFINE_PROP_END_OF_LIST(), + { }, }; /* Deprecated entries marked for future removal */ @@ -1627,7 +1627,7 @@ const RISCVCPUMultiExtConfig riscv_cpu_deprecated_exts[] = { MULTI_EXT_CFG_BOOL("Zve64f", ext_zve64f, false), MULTI_EXT_CFG_BOOL("Zve64d", ext_zve64d, false), - DEFINE_PROP_END_OF_LIST(), + { }, }; static void cpu_set_prop_err(RISCVCPU *cpu, const char *propname, @@ -2699,7 +2699,6 @@ static const Property riscv_cpu_properties[] = { * it with -x and default to 'false'. */ DEFINE_PROP_BOOL("x-misa-w", RISCVCPU, cfg.misa_w, false), - DEFINE_PROP_END_OF_LIST(), }; #if defined(TARGET_RISCV64) From patchwork Thu Dec 19 08:32:07 2024 Content-Type: text/plain; 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helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -31 X-Spam_score: -3.2 X-Spam_bar: --- X-Spam_report: (-3.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-1.116, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Richard Henderson Now that all of the Property arrays are counted, we can remove the terminator object from each array. Update the assertions in device_class_set_props to match. With struct Property being 88 bytes, this was a rather large form of terminator. Saves 30k from qemu-system-aarch64. Signed-off-by: Richard Henderson Link: https://lore.kernel.org/r/20241216035109.3486070-21-richard.henderson@linaro.org Signed-off-by: Paolo Bonzini --- docs/devel/migration/compatibility.rst | 1 - docs/devel/virtio-backends.rst | 1 - include/hw/qdev-core.h | 14 +++++++------- include/hw/qdev-properties.h | 3 --- cpu-target.c | 1 - hw/9pfs/virtio-9p-device.c | 1 - hw/acpi/erst.c | 1 - hw/acpi/generic_event_device.c | 1 - hw/acpi/piix4.c | 1 - hw/acpi/vmgenid.c | 1 - hw/adc/aspeed_adc.c | 1 - hw/adc/npcm7xx_adc.c | 1 - hw/arm/armv7m.c | 2 -- hw/arm/aspeed_soc_common.c | 1 - hw/arm/fsl-imx25.c | 1 - hw/arm/fsl-imx6.c | 1 - hw/arm/fsl-imx6ul.c | 1 - hw/arm/fsl-imx7.c | 1 - hw/arm/integratorcp.c | 1 - hw/arm/msf2-soc.c | 1 - hw/arm/npcm7xx.c | 1 - hw/arm/nrf51_soc.c | 1 - hw/arm/smmu-common.c | 1 - hw/arm/smmuv3.c | 1 - hw/arm/stellaris.c | 1 - hw/arm/strongarm.c | 1 - hw/arm/xlnx-versal.c | 1 - hw/arm/xlnx-zynqmp.c | 1 - hw/audio/ac97.c | 1 - hw/audio/adlib.c | 1 - hw/audio/asc.c | 1 - hw/audio/cs4231a.c | 1 - hw/audio/es1370.c | 1 - hw/audio/gus.c | 1 - hw/audio/hda-codec.c | 1 - hw/audio/intel-hda.c | 2 -- hw/audio/pcspk.c | 1 - hw/audio/pl041.c | 1 - hw/audio/sb16.c | 1 - hw/audio/via-ac97.c | 1 - hw/audio/virtio-snd-pci.c | 1 - hw/audio/virtio-snd.c | 1 - hw/audio/wm8750.c | 1 - hw/avr/atmega.c | 1 - hw/block/fdc-isa.c | 1 - hw/block/fdc-sysbus.c | 2 -- hw/block/fdc.c | 1 - hw/block/m25p80.c | 1 - hw/block/nand.c | 1 - hw/block/pflash_cfi01.c | 1 - hw/block/pflash_cfi02.c | 1 - hw/block/swim.c | 1 - hw/block/vhost-user-blk.c | 1 - hw/block/virtio-blk.c | 1 - hw/block/xen-block.c | 1 - hw/char/avr_usart.c | 1 - hw/char/bcm2835_aux.c | 1 - hw/char/cadence_uart.c | 1 - hw/char/cmsdk-apb-uart.c | 1 - hw/char/debugcon.c | 1 - hw/char/digic-uart.c | 1 - hw/char/escc.c | 1 - hw/char/exynos4210_uart.c | 1 - hw/char/goldfish_tty.c | 1 - hw/char/grlib_apbuart.c | 1 - hw/char/ibex_uart.c | 1 - hw/char/imx_serial.c | 1 - hw/char/ipoctal232.c | 1 - hw/char/mcf_uart.c | 1 - hw/char/nrf51_uart.c | 1 - hw/char/parallel.c | 1 - hw/char/pl011.c | 1 - hw/char/renesas_sci.c | 1 - hw/char/sclpconsole-lm.c | 1 - hw/char/sclpconsole.c | 1 - hw/char/serial-isa.c | 1 - hw/char/serial-mm.c | 1 - hw/char/serial-pci-multi.c | 2 -- hw/char/serial-pci.c | 1 - hw/char/serial.c | 1 - hw/char/sh_serial.c | 1 - hw/char/shakti_uart.c | 1 - hw/char/sifive_uart.c | 1 - hw/char/spapr_vty.c | 1 - hw/char/stm32f2xx_usart.c | 1 - hw/char/stm32l4x5_usart.c | 1 - hw/char/terminal3270.c | 1 - hw/char/virtio-console.c | 1 - hw/char/virtio-serial-bus.c | 2 -- hw/char/xen_console.c | 1 - hw/char/xilinx_uartlite.c | 1 - hw/core/generic-loader.c | 1 - hw/core/guest-loader.c | 1 - hw/core/or-irq.c | 1 - hw/core/platform-bus.c | 1 - hw/core/split-irq.c | 1 - hw/cpu/a15mpcore.c | 1 - hw/cpu/a9mpcore.c | 1 - hw/cpu/arm11mpcore.c | 1 - hw/cpu/cluster.c | 1 - hw/cpu/realview_mpcore.c | 1 - hw/cxl/switch-mailbox-cci.c | 1 - hw/display/artist.c | 1 - hw/display/ati.c | 1 - hw/display/bcm2835_fb.c | 1 - hw/display/bochs-display.c | 1 - hw/display/cg3.c | 1 - hw/display/cirrus_vga.c | 1 - hw/display/cirrus_vga_isa.c | 1 - hw/display/exynos4210_fimd.c | 1 - hw/display/g364fb.c | 1 - hw/display/i2c-ddc.c | 1 - hw/display/macfb.c | 2 -- hw/display/pl110.c | 1 - hw/display/qxl.c | 1 - hw/display/ramfb-standalone.c | 1 - hw/display/sm501.c | 2 -- hw/display/tcx.c | 1 - hw/display/vga-isa.c | 1 - hw/display/vga-mmio.c | 1 - hw/display/vga-pci.c | 2 -- hw/display/vhost-user-gpu.c | 1 - hw/display/virtio-gpu-gl.c | 1 - hw/display/virtio-gpu-pci.c | 1 - hw/display/virtio-gpu-rutabaga.c | 1 - hw/display/virtio-gpu.c | 1 - hw/display/virtio-vga.c | 1 - hw/display/vmware_vga.c | 1 - hw/display/xlnx_dp.c | 1 - hw/dma/i82374.c | 1 - hw/dma/i8257.c | 1 - hw/dma/pl080.c | 1 - hw/dma/pl330.c | 2 -- hw/dma/xilinx_axidma.c | 1 - hw/dma/xlnx-zdma.c | 1 - hw/dma/xlnx_csu_dma.c | 1 - hw/gpio/imx_gpio.c | 1 - hw/gpio/npcm7xx_gpio.c | 1 - hw/gpio/omap_gpio.c | 1 - hw/gpio/pca9552.c | 1 - hw/gpio/pca9554.c | 1 - hw/gpio/pl061.c | 1 - hw/gpio/sifive_gpio.c | 1 - hw/gpio/stm32l4x5_gpio.c | 1 - hw/hyperv/hv-balloon.c | 2 -- hw/hyperv/syndbg.c | 1 - hw/hyperv/vmbus.c | 2 -- hw/i2c/aspeed_i2c.c | 2 -- hw/i2c/core.c | 1 - hw/i2c/i2c_mux_pca954x.c | 1 - hw/i2c/omap_i2c.c | 1 - hw/i386/amd_iommu.c | 1 - hw/i386/intel_iommu.c | 1 - hw/i386/kvm/clock.c | 1 - hw/i386/kvm/i8254.c | 1 - hw/i386/kvm/ioapic.c | 1 - hw/i386/sgx-epc.c | 1 - hw/i386/vmmouse.c | 1 - hw/i386/vmport.c | 2 -- hw/i386/x86-iommu.c | 1 - hw/i386/xen/xen_pvdevice.c | 1 - hw/ide/ahci-sysbus.c | 1 - hw/ide/cf.c | 1 - hw/ide/cmd646.c | 1 - hw/ide/ide-dev.c | 3 --- hw/ide/isa.c | 1 - hw/ide/macio.c | 1 - hw/ide/mmio.c | 1 - hw/input/pckbd.c | 2 -- hw/input/stellaris_gamepad.c | 1 - hw/input/virtio-input-hid.c | 3 --- hw/input/virtio-input-host.c | 1 - hw/input/virtio-input.c | 1 - hw/intc/apic_common.c | 1 - hw/intc/arm_gic_common.c | 1 - hw/intc/arm_gicv2m.c | 1 - hw/intc/arm_gicv3_common.c | 1 - hw/intc/arm_gicv3_its.c | 1 - hw/intc/arm_gicv3_its_kvm.c | 1 - hw/intc/armv7m_nvic.c | 1 - hw/intc/exynos4210_combiner.c | 1 - hw/intc/exynos4210_gic.c | 1 - hw/intc/goldfish_pic.c | 1 - hw/intc/grlib_irqmp.c | 1 - hw/intc/i8259_common.c | 1 - hw/intc/ioapic.c | 1 - hw/intc/loongarch_extioi.c | 1 - hw/intc/loongarch_pch_msi.c | 1 - hw/intc/loongarch_pch_pic.c | 1 - hw/intc/loongson_ipi_common.c | 1 - hw/intc/m68k_irqc.c | 1 - hw/intc/mips_gic.c | 1 - hw/intc/omap_intc.c | 1 - hw/intc/ompic.c | 1 - hw/intc/openpic.c | 1 - hw/intc/openpic_kvm.c | 1 - hw/intc/pnv_xive.c | 1 - hw/intc/pnv_xive2.c | 1 - hw/intc/ppc-uic.c | 1 - hw/intc/riscv_aclint.c | 2 -- hw/intc/riscv_aplic.c | 1 - hw/intc/riscv_imsic.c | 1 - hw/intc/rx_icu.c | 1 - hw/intc/s390_flic.c | 2 -- hw/intc/sifive_plic.c | 1 - hw/intc/spapr_xive.c | 1 - hw/intc/xics.c | 2 -- hw/intc/xilinx_intc.c | 1 - hw/intc/xive.c | 4 ---- hw/intc/xive2.c | 2 -- hw/intc/xlnx-pmu-iomod-intc.c | 1 - hw/ipack/ipack.c | 1 - hw/ipmi/ipmi.c | 1 - hw/ipmi/ipmi_bmc_extern.c | 1 - hw/ipmi/ipmi_bmc_sim.c | 1 - hw/ipmi/isa_ipmi_bt.c | 1 - hw/ipmi/isa_ipmi_kcs.c | 1 - hw/isa/lpc_ich9.c | 1 - hw/isa/pc87312.c | 1 - hw/isa/piix.c | 1 - hw/m68k/mcf5206.c | 1 - hw/m68k/mcf_intc.c | 1 - hw/m68k/next-cube.c | 1 - hw/m68k/q800-glue.c | 1 - hw/mem/cxl_type3.c | 1 - hw/mem/nvdimm.c | 1 - hw/mem/pc-dimm.c | 1 - hw/mem/sparse-mem.c | 1 - hw/mips/cps.c | 1 - hw/misc/a9scu.c | 1 - hw/misc/allwinner-h3-dramc.c | 1 - hw/misc/allwinner-r40-dramc.c | 1 - hw/misc/allwinner-sid.c | 1 - hw/misc/applesmc.c | 1 - hw/misc/arm11scu.c | 1 - hw/misc/arm_l2x0.c | 1 - hw/misc/arm_sysctl.c | 1 - hw/misc/armsse-cpuid.c | 1 - hw/misc/aspeed_hace.c | 1 - hw/misc/aspeed_i3c.c | 1 - hw/misc/aspeed_lpc.c | 1 - hw/misc/aspeed_sbc.c | 1 - hw/misc/aspeed_scu.c | 1 - hw/misc/aspeed_sdmc.c | 1 - hw/misc/bcm2835_cprman.c | 1 - hw/misc/bcm2835_property.c | 1 - hw/misc/debugexit.c | 1 - hw/misc/eccmemctl.c | 1 - hw/misc/empty_slot.c | 1 - hw/misc/iotkit-secctl.c | 1 - hw/misc/iotkit-sysctl.c | 1 - hw/misc/iotkit-sysinfo.c | 1 - hw/misc/ivshmem.c | 2 -- hw/misc/led.c | 1 - hw/misc/mac_via.c | 1 - hw/misc/macio/cuda.c | 1 - hw/misc/macio/macio.c | 2 -- hw/misc/macio/pmu.c | 1 - hw/misc/mips_cmgcr.c | 1 - hw/misc/mips_cpc.c | 1 - hw/misc/mips_itu.c | 1 - hw/misc/mos6522.c | 1 - hw/misc/mps2-fpgaio.c | 1 - hw/misc/mps2-scc.c | 1 - hw/misc/msf2-sysreg.c | 1 - hw/misc/npcm7xx_gcr.c | 1 - hw/misc/nrf51_rng.c | 1 - hw/misc/pci-testdev.c | 1 - hw/misc/pvpanic-isa.c | 1 - hw/misc/pvpanic-pci.c | 1 - hw/misc/sifive_e_aon.c | 1 - hw/misc/sifive_u_otp.c | 1 - hw/misc/stm32l4x5_rcc.c | 1 - hw/misc/tz-mpc.c | 1 - hw/misc/tz-msc.c | 1 - hw/misc/tz-ppc.c | 1 - hw/misc/unimp.c | 1 - hw/misc/xlnx-versal-cframe-reg.c | 2 -- hw/misc/xlnx-versal-cfu.c | 2 -- hw/misc/xlnx-versal-trng.c | 2 -- hw/misc/xlnx-versal-xramc.c | 1 - hw/misc/zynq_slcr.c | 1 - hw/net/allwinner-sun8i-emac.c | 1 - hw/net/allwinner_emac.c | 1 - hw/net/cadence_gem.c | 1 - hw/net/can/xlnx-versal-canfd.c | 1 - hw/net/can/xlnx-zynqmp-can.c | 1 - hw/net/dp8393x.c | 1 - hw/net/e1000.c | 1 - hw/net/e1000e.c | 1 - hw/net/eepro100.c | 1 - hw/net/fsl_etsec/etsec.c | 1 - hw/net/ftgmac100.c | 2 -- hw/net/igb.c | 1 - hw/net/imx_fec.c | 1 - hw/net/lan9118.c | 1 - hw/net/lance.c | 1 - hw/net/lasi_i82596.c | 1 - hw/net/mcf_fec.c | 1 - hw/net/mipsnet.c | 1 - hw/net/msf2-emac.c | 1 - hw/net/mv88w8618_eth.c | 1 - hw/net/ne2000-isa.c | 1 - hw/net/ne2000-pci.c | 1 - hw/net/npcm7xx_emc.c | 1 - hw/net/npcm_gmac.c | 1 - hw/net/opencores_eth.c | 1 - hw/net/pcnet-pci.c | 1 - hw/net/rocker/rocker.c | 1 - hw/net/rtl8139.c | 1 - hw/net/smc91c111.c | 1 - hw/net/spapr_llan.c | 1 - hw/net/stellaris_enet.c | 1 - hw/net/sungem.c | 1 - hw/net/sunhme.c | 1 - hw/net/tulip.c | 1 - hw/net/virtio-net.c | 1 - hw/net/vmxnet3.c | 1 - hw/net/xen_nic.c | 1 - hw/net/xgmac.c | 1 - hw/net/xilinx_axienet.c | 1 - hw/net/xilinx_ethlite.c | 1 - hw/nubus/nubus-bridge.c | 1 - hw/nubus/nubus-device.c | 1 - hw/nvme/ctrl.c | 1 - hw/nvme/ns.c | 1 - hw/nvme/subsys.c | 1 - hw/nvram/ds1225y.c | 1 - hw/nvram/eeprom_at24c.c | 1 - hw/nvram/fw_cfg.c | 3 --- hw/nvram/mac_nvram.c | 1 - hw/nvram/nrf51_nvm.c | 1 - hw/nvram/spapr_nvram.c | 1 - hw/nvram/xlnx-bbram.c | 1 - hw/nvram/xlnx-efuse.c | 1 - hw/nvram/xlnx-versal-efuse-cache.c | 2 -- hw/nvram/xlnx-versal-efuse-ctrl.c | 2 -- hw/nvram/xlnx-zynqmp-efuse.c | 2 -- hw/pci-bridge/cxl_downstream.c | 1 - hw/pci-bridge/cxl_root_port.c | 1 - hw/pci-bridge/cxl_upstream.c | 1 - hw/pci-bridge/gen_pcie_root_port.c | 1 - hw/pci-bridge/pci_bridge_dev.c | 1 - hw/pci-bridge/pci_expander_bridge.c | 2 -- hw/pci-bridge/pcie_pci_bridge.c | 1 - hw/pci-bridge/pcie_root_port.c | 1 - hw/pci-bridge/xio3130_downstream.c | 1 - hw/pci-host/dino.c | 1 - hw/pci-host/gpex.c | 1 - hw/pci-host/grackle.c | 1 - hw/pci-host/gt64120.c | 1 - hw/pci-host/i440fx.c | 1 - hw/pci-host/mv64361.c | 1 - hw/pci-host/pnv_phb.c | 4 ---- hw/pci-host/pnv_phb3.c | 1 - hw/pci-host/pnv_phb4.c | 1 - hw/pci-host/pnv_phb4_pec.c | 1 - hw/pci-host/ppce500.c | 1 - hw/pci-host/q35.c | 2 -- hw/pci-host/raven.c | 1 - hw/pci-host/sabre.c | 1 - hw/pci-host/uninorth.c | 1 - hw/pci-host/versatile.c | 1 - hw/pci-host/xilinx-pcie.c | 1 - hw/pci/pci.c | 1 - hw/pci/pci_bridge.c | 1 - hw/pci/pci_host.c | 1 - hw/pci/pcie_port.c | 2 -- hw/ppc/pnv.c | 1 - hw/ppc/pnv_adu.c | 1 - hw/ppc/pnv_chiptod.c | 1 - hw/ppc/pnv_core.c | 2 -- hw/ppc/pnv_homer.c | 1 - hw/ppc/pnv_i2c.c | 1 - hw/ppc/pnv_lpc.c | 1 - hw/ppc/pnv_pnor.c | 1 - hw/ppc/pnv_psi.c | 1 - hw/ppc/ppc405_uc.c | 1 - hw/ppc/ppc440_uc.c | 1 - hw/ppc/ppc4xx_devs.c | 2 -- hw/ppc/ppc4xx_sdram.c | 2 -- hw/ppc/prep_systemio.c | 1 - hw/ppc/rs6000_mc.c | 1 - hw/ppc/spapr_cpu_core.c | 1 - hw/ppc/spapr_nvdimm.c | 1 - hw/ppc/spapr_pci.c | 1 - hw/ppc/spapr_rng.c | 1 - hw/ppc/spapr_tpm_proxy.c | 1 - hw/remote/proxy.c | 1 - hw/riscv/opentitan.c | 1 - hw/riscv/riscv-iommu-pci.c | 1 - hw/riscv/riscv-iommu.c | 1 - hw/riscv/riscv_hart.c | 1 - hw/riscv/sifive_u.c | 1 - hw/rtc/allwinner-rtc.c | 1 - hw/rtc/goldfish_rtc.c | 1 - hw/rtc/m48t59-isa.c | 1 - hw/rtc/m48t59.c | 1 - hw/rtc/mc146818rtc.c | 1 - hw/rtc/pl031.c | 1 - hw/rx/rx62n.c | 1 - hw/s390x/ccw-device.c | 1 - hw/s390x/css-bridge.c | 1 - hw/s390x/ipl.c | 1 - hw/s390x/s390-pci-bus.c | 1 - hw/s390x/s390-skeys.c | 1 - hw/s390x/s390-stattrib.c | 1 - hw/s390x/vhost-scsi-ccw.c | 1 - hw/s390x/vhost-user-fs-ccw.c | 1 - hw/s390x/vhost-vsock-ccw.c | 1 - hw/s390x/virtio-ccw-9p.c | 1 - hw/s390x/virtio-ccw-balloon.c | 1 - hw/s390x/virtio-ccw-blk.c | 1 - hw/s390x/virtio-ccw-crypto.c | 1 - hw/s390x/virtio-ccw-gpu.c | 1 - hw/s390x/virtio-ccw-input.c | 1 - hw/s390x/virtio-ccw-net.c | 1 - hw/s390x/virtio-ccw-rng.c | 1 - hw/s390x/virtio-ccw-scsi.c | 1 - hw/s390x/virtio-ccw-serial.c | 1 - hw/scsi/mptsas.c | 1 - hw/scsi/scsi-bus.c | 1 - hw/scsi/scsi-disk.c | 3 --- hw/scsi/scsi-generic.c | 1 - hw/scsi/spapr_vscsi.c | 1 - hw/scsi/vhost-scsi.c | 1 - hw/scsi/vhost-user-scsi.c | 1 - hw/scsi/virtio-scsi.c | 1 - hw/scsi/vmw_pvscsi.c | 1 - hw/sd/allwinner-sdhost.c | 1 - hw/sd/aspeed_sdhci.c | 1 - hw/sd/sd.c | 3 --- hw/sd/sdhci-pci.c | 1 - hw/sd/sdhci.c | 1 - hw/sparc/sun4m_iommu.c | 1 - hw/sparc64/sun4u.c | 2 -- hw/ssi/aspeed_smc.c | 2 -- hw/ssi/ibex_spi_host.c | 1 - hw/ssi/npcm7xx_fiu.c | 1 - hw/ssi/pnv_spi.c | 1 - hw/ssi/sifive_spi.c | 1 - hw/ssi/ssi.c | 1 - hw/ssi/xilinx_spi.c | 1 - hw/ssi/xilinx_spips.c | 2 -- hw/ssi/xlnx-versal-ospi.c | 1 - hw/timer/a9gtimer.c | 1 - hw/timer/allwinner-a10-pit.c | 1 - hw/timer/arm_mptimer.c | 1 - hw/timer/arm_timer.c | 1 - hw/timer/aspeed_timer.c | 1 - hw/timer/avr_timer16.c | 1 - hw/timer/grlib_gptimer.c | 1 - hw/timer/hpet.c | 1 - hw/timer/i8254_common.c | 1 - hw/timer/ibex_timer.c | 1 - hw/timer/mss-timer.c | 1 - hw/timer/nrf51_timer.c | 1 - hw/timer/pxa2xx_timer.c | 1 - hw/timer/renesas_cmt.c | 1 - hw/timer/renesas_tmr.c | 1 - hw/timer/sifive_pwm.c | 1 - hw/timer/slavio_timer.c | 1 - hw/timer/sse-timer.c | 1 - hw/timer/stm32f2xx_timer.c | 1 - hw/timer/xilinx_timer.c | 1 - hw/tpm/tpm_crb.c | 1 - hw/tpm/tpm_spapr.c | 1 - hw/tpm/tpm_tis_i2c.c | 1 - hw/tpm/tpm_tis_isa.c | 1 - hw/tpm/tpm_tis_sysbus.c | 1 - hw/ufs/lu.c | 1 - hw/ufs/ufs.c | 1 - hw/usb/bus.c | 1 - hw/usb/canokey.c | 1 - hw/usb/ccid-card-emulated.c | 1 - hw/usb/ccid-card-passthru.c | 1 - hw/usb/dev-audio.c | 1 - hw/usb/dev-hid.c | 3 --- hw/usb/dev-hub.c | 1 - hw/usb/dev-mtp.c | 1 - hw/usb/dev-network.c | 1 - hw/usb/dev-serial.c | 2 -- hw/usb/dev-smartcard-reader.c | 2 -- hw/usb/dev-storage-classic.c | 1 - hw/usb/dev-uas.c | 1 - hw/usb/hcd-dwc2.c | 1 - hw/usb/hcd-dwc3.c | 1 - hw/usb/hcd-ehci-pci.c | 1 - hw/usb/hcd-ehci-sysbus.c | 1 - hw/usb/hcd-ohci-pci.c | 1 - hw/usb/hcd-ohci-sysbus.c | 1 - hw/usb/hcd-uhci.c | 2 -- hw/usb/hcd-xhci-nec.c | 1 - hw/usb/hcd-xhci-sysbus.c | 1 - hw/usb/hcd-xhci.c | 1 - hw/usb/host-libusb.c | 1 - hw/usb/redirect.c | 1 - hw/usb/u2f-emulated.c | 1 - hw/usb/u2f-passthru.c | 1 - hw/vfio/ap.c | 1 - hw/vfio/ccw.c | 1 - hw/vfio/pci.c | 2 -- hw/vfio/platform.c | 1 - hw/virtio/vdpa-dev.c | 1 - hw/virtio/vhost-scsi-pci.c | 1 - hw/virtio/vhost-user-blk-pci.c | 1 - hw/virtio/vhost-user-device.c | 1 - hw/virtio/vhost-user-fs-pci.c | 1 - hw/virtio/vhost-user-fs.c | 1 - hw/virtio/vhost-user-gpio.c | 1 - hw/virtio/vhost-user-i2c.c | 1 - hw/virtio/vhost-user-input.c | 1 - hw/virtio/vhost-user-rng-pci.c | 1 - hw/virtio/vhost-user-rng.c | 1 - hw/virtio/vhost-user-scmi.c | 1 - hw/virtio/vhost-user-scsi-pci.c | 1 - hw/virtio/vhost-user-snd.c | 1 - hw/virtio/vhost-user-vsock-pci.c | 1 - hw/virtio/vhost-user-vsock.c | 1 - hw/virtio/vhost-vsock-common.c | 1 - hw/virtio/vhost-vsock-pci.c | 1 - hw/virtio/vhost-vsock.c | 1 - hw/virtio/virtio-9p-pci.c | 1 - hw/virtio/virtio-balloon.c | 1 - hw/virtio/virtio-blk-pci.c | 1 - hw/virtio/virtio-crypto-pci.c | 1 - hw/virtio/virtio-crypto.c | 1 - hw/virtio/virtio-input-pci.c | 1 - hw/virtio/virtio-iommu-pci.c | 1 - hw/virtio/virtio-iommu.c | 1 - hw/virtio/virtio-mem.c | 1 - hw/virtio/virtio-mmio.c | 1 - hw/virtio/virtio-net-pci.c | 1 - hw/virtio/virtio-nsm.c | 1 - hw/virtio/virtio-pci.c | 2 -- hw/virtio/virtio-pmem.c | 1 - hw/virtio/virtio-rng-pci.c | 1 - hw/virtio/virtio-rng.c | 1 - hw/virtio/virtio-scsi-pci.c | 1 - hw/virtio/virtio-serial-pci.c | 1 - hw/virtio/virtio.c | 1 - hw/watchdog/sbsa_gwdt.c | 1 - hw/watchdog/wdt_aspeed.c | 1 - hw/watchdog/wdt_imx2.c | 1 - hw/xen/xen-bus.c | 1 - hw/xen/xen_pt.c | 1 - target/arm/cpu.c | 1 - target/avr/cpu.c | 1 - target/hexagon/cpu.c | 1 - target/i386/cpu.c | 2 -- target/microblaze/cpu.c | 1 - target/mips/cpu.c | 1 - target/s390x/cpu.c | 1 - target/sparc/cpu.c | 1 - tests/unit/test-qdev-global-props.c | 1 - 555 files changed, 7 insertions(+), 623 deletions(-) diff --git a/docs/devel/migration/compatibility.rst b/docs/devel/migration/compatibility.rst index c787f537386..ecb887e3184 100644 --- a/docs/devel/migration/compatibility.rst +++ b/docs/devel/migration/compatibility.rst @@ -401,7 +401,6 @@ the old behaviour or the new behaviour:: DEFINE_PROP_UINT32("acpi-index", PCIDevice, acpi_index, 0), + DEFINE_PROP_BIT("x-pcie-err-unc-mask", PCIDevice, cap_present, + QEMU_PCIE_ERR_UNC_MASK_BITNR, true), - DEFINE_PROP_END_OF_LIST() }; Notice that we enable the feature for new machine types. diff --git a/docs/devel/virtio-backends.rst b/docs/devel/virtio-backends.rst index a6f9df4845a..679d7544b8e 100644 --- a/docs/devel/virtio-backends.rst +++ b/docs/devel/virtio-backends.rst @@ -107,7 +107,6 @@ manually instantiated: VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true), DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, DEV_NVECTORS_UNSPECIFIED), - DEFINE_PROP_END_OF_LIST(), }; static void virtio_blk_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) diff --git a/include/hw/qdev-core.h b/include/hw/qdev-core.h index 5dc46402585..e6ef80b7fd0 100644 --- a/include/hw/qdev-core.h +++ b/include/hw/qdev-core.h @@ -947,16 +947,16 @@ char *qdev_get_own_fw_dev_path_from_handler(BusState *bus, DeviceState *dev); * you attempt to add an existing property defined by a parent class. * To modify an inherited property you need to use???? * - * Validate that @props has at least one Property plus the terminator. + * Validate that @props has at least one Property. * Validate that @props is an array, not a pointer, via ARRAY_SIZE. - * Validate that the array is terminated at compile-time (with -O2), - * which requires the array to be const. + * Validate that the array does not have a legacy terminator at compile-time; + * requires -O2 and the array to be const. */ #define device_class_set_props(dc, props) \ do { \ - QEMU_BUILD_BUG_ON(sizeof(props) < 2 * sizeof(Property)); \ - size_t props_count_ = ARRAY_SIZE(props) - 1; \ - if ((props)[props_count_].name != NULL) { \ + QEMU_BUILD_BUG_ON(sizeof(props) == 0); \ + size_t props_count_ = ARRAY_SIZE(props); \ + if ((props)[props_count_ - 1].name == NULL) { \ qemu_build_not_reached(); \ } \ device_class_set_props_n((dc), (props), props_count_); \ @@ -965,7 +965,7 @@ char *qdev_get_own_fw_dev_path_from_handler(BusState *bus, DeviceState *dev); /** * device_class_set_props_n(): add a set of properties to an device * @dc: the parent DeviceClass all devices inherit - * @props: an array of properties, not terminated by DEFINE_PROP_END_OF_LIST. + * @props: an array of properties * @n: ARRAY_SIZE(@props) * * This will add a set of properties to the object. It will fault if diff --git a/include/hw/qdev-properties.h b/include/hw/qdev-properties.h index 26ebd230685..ef3fd7b4ae2 100644 --- a/include/hw/qdev-properties.h +++ b/include/hw/qdev-properties.h @@ -171,9 +171,6 @@ extern const PropertyInfo qdev_prop_link; #define DEFINE_PROP_SIZE32(_n, _s, _f, _d) \ DEFINE_PROP_UNSIGNED(_n, _s, _f, _d, qdev_prop_size32, uint32_t) -#define DEFINE_PROP_END_OF_LIST() \ - {} - /* * Set properties between creation and realization. * diff --git a/cpu-target.c b/cpu-target.c index 2ae07a779ea..6af34098b9e 100644 --- a/cpu-target.c +++ b/cpu-target.c @@ -201,7 +201,6 @@ static const Property cpu_common_props[] = { DEFINE_PROP_LINK("memory", CPUState, memory, TYPE_MEMORY_REGION, MemoryRegion *), #endif - DEFINE_PROP_END_OF_LIST(), }; #ifndef CONFIG_USER_ONLY diff --git a/hw/9pfs/virtio-9p-device.c b/hw/9pfs/virtio-9p-device.c index b764e4cd3db..ef0d845109d 100644 --- a/hw/9pfs/virtio-9p-device.c +++ b/hw/9pfs/virtio-9p-device.c @@ -246,7 +246,6 @@ static const VMStateDescription vmstate_virtio_9p = { static const Property virtio_9p_properties[] = { DEFINE_PROP_STRING("mount_tag", V9fsVirtioState, state.fsconf.tag), DEFINE_PROP_STRING("fsdev", V9fsVirtioState, state.fsconf.fsdev_id), - DEFINE_PROP_END_OF_LIST(), }; static void virtio_9p_class_init(ObjectClass *klass, void *data) diff --git a/hw/acpi/erst.c b/hw/acpi/erst.c index 5ef5ddccb68..dfa0f371767 100644 --- a/hw/acpi/erst.c +++ b/hw/acpi/erst.c @@ -1016,7 +1016,6 @@ static const Property erst_properties[] = { TYPE_MEMORY_BACKEND, HostMemoryBackend *), DEFINE_PROP_UINT32(ACPI_ERST_RECORD_SIZE_PROP, ERSTDeviceState, default_record_size, ERST_RECORD_SIZE), - DEFINE_PROP_END_OF_LIST(), }; static void erst_class_init(ObjectClass *klass, void *data) diff --git a/hw/acpi/generic_event_device.c b/hw/acpi/generic_event_device.c index 8c4706f8cff..cfb14299b68 100644 --- a/hw/acpi/generic_event_device.c +++ b/hw/acpi/generic_event_device.c @@ -318,7 +318,6 @@ static void acpi_ged_send_event(AcpiDeviceIf *adev, AcpiEventStatusBits ev) static const Property acpi_ged_properties[] = { DEFINE_PROP_UINT32("ged-event", AcpiGedState, ged_event_bitmap, 0), - DEFINE_PROP_END_OF_LIST(), }; static const VMStateDescription vmstate_memhp_state = { diff --git a/hw/acpi/piix4.c b/hw/acpi/piix4.c index 2bfaf5a38d3..cc755b36ebc 100644 --- a/hw/acpi/piix4.c +++ b/hw/acpi/piix4.c @@ -617,7 +617,6 @@ static const Property piix4_pm_properties[] = { DEFINE_PROP_BOOL("smm-enabled", PIIX4PMState, smm_enabled, false), DEFINE_PROP_BOOL("x-not-migrate-acpi-index", PIIX4PMState, not_migrate_acpi_index, false), - DEFINE_PROP_END_OF_LIST(), }; static void piix4_pm_class_init(ObjectClass *klass, void *data) diff --git a/hw/acpi/vmgenid.c b/hw/acpi/vmgenid.c index 9c2ca85cc7c..af3ec859891 100644 --- a/hw/acpi/vmgenid.c +++ b/hw/acpi/vmgenid.c @@ -216,7 +216,6 @@ static void vmgenid_realize(DeviceState *dev, Error **errp) static const Property vmgenid_device_properties[] = { DEFINE_PROP_UUID(VMGENID_GUID, VmGenIdState, guid), - DEFINE_PROP_END_OF_LIST(), }; static void vmgenid_device_class_init(ObjectClass *klass, void *data) diff --git a/hw/adc/aspeed_adc.c b/hw/adc/aspeed_adc.c index f94c6f2be3a..1cc554f1793 100644 --- a/hw/adc/aspeed_adc.c +++ b/hw/adc/aspeed_adc.c @@ -289,7 +289,6 @@ static const VMStateDescription vmstate_aspeed_adc_engine = { static const Property aspeed_adc_engine_properties[] = { DEFINE_PROP_UINT32("engine-id", AspeedADCEngineState, engine_id, 0), DEFINE_PROP_UINT32("nr-channels", AspeedADCEngineState, nr_channels, 0), - DEFINE_PROP_END_OF_LIST(), }; static void aspeed_adc_engine_class_init(ObjectClass *klass, void *data) diff --git a/hw/adc/npcm7xx_adc.c b/hw/adc/npcm7xx_adc.c index 1781ff4c0b0..0a83d28605e 100644 --- a/hw/adc/npcm7xx_adc.c +++ b/hw/adc/npcm7xx_adc.c @@ -269,7 +269,6 @@ static const VMStateDescription vmstate_npcm7xx_adc = { static const Property npcm7xx_timer_properties[] = { DEFINE_PROP_UINT32("iref", NPCM7xxADCState, iref, NPCM7XX_ADC_DEFAULT_IREF), - DEFINE_PROP_END_OF_LIST(), }; static void npcm7xx_adc_class_init(ObjectClass *klass, void *data) diff --git a/hw/arm/armv7m.c b/hw/arm/armv7m.c index e20f719c9bd..1134606fc24 100644 --- a/hw/arm/armv7m.c +++ b/hw/arm/armv7m.c @@ -552,7 +552,6 @@ static const Property armv7m_properties[] = { DEFINE_PROP_BOOL("dsp", ARMv7MState, dsp, true), DEFINE_PROP_UINT32("mpu-ns-regions", ARMv7MState, mpu_ns_regions, UINT_MAX), DEFINE_PROP_UINT32("mpu-s-regions", ARMv7MState, mpu_s_regions, UINT_MAX), - DEFINE_PROP_END_OF_LIST(), }; static const VMStateDescription vmstate_armv7m = { @@ -635,7 +634,6 @@ static const Property bitband_properties[] = { DEFINE_PROP_UINT32("base", BitBandState, base, 0), DEFINE_PROP_LINK("source-memory", BitBandState, source_memory, TYPE_MEMORY_REGION, MemoryRegion *), - DEFINE_PROP_END_OF_LIST(), }; static void bitband_class_init(ObjectClass *klass, void *data) diff --git a/hw/arm/aspeed_soc_common.c b/hw/arm/aspeed_soc_common.c index 4221cacd51a..1ddcb26c1ed 100644 --- a/hw/arm/aspeed_soc_common.c +++ b/hw/arm/aspeed_soc_common.c @@ -144,7 +144,6 @@ static const Property aspeed_soc_properties[] = { MemoryRegion *), DEFINE_PROP_LINK("memory", AspeedSoCState, memory, TYPE_MEMORY_REGION, MemoryRegion *), - DEFINE_PROP_END_OF_LIST(), }; static void aspeed_soc_class_init(ObjectClass *oc, void *data) diff --git a/hw/arm/fsl-imx25.c b/hw/arm/fsl-imx25.c index 48763b03feb..ef1242d0a0e 100644 --- a/hw/arm/fsl-imx25.c +++ b/hw/arm/fsl-imx25.c @@ -311,7 +311,6 @@ static void fsl_imx25_realize(DeviceState *dev, Error **errp) static const Property fsl_imx25_properties[] = { DEFINE_PROP_UINT32("fec-phy-num", FslIMX25State, phy_num, 0), - DEFINE_PROP_END_OF_LIST(), }; static void fsl_imx25_class_init(ObjectClass *oc, void *data) diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c index 236d15bc9cb..fed2dbb46d3 100644 --- a/hw/arm/fsl-imx6.c +++ b/hw/arm/fsl-imx6.c @@ -483,7 +483,6 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp) static const Property fsl_imx6_properties[] = { DEFINE_PROP_UINT32("fec-phy-num", FslIMX6State, phy_num, 0), - DEFINE_PROP_END_OF_LIST(), }; static void fsl_imx6_class_init(ObjectClass *oc, void *data) diff --git a/hw/arm/fsl-imx6ul.c b/hw/arm/fsl-imx6ul.c index 1e0bbbb5d77..6995746f642 100644 --- a/hw/arm/fsl-imx6ul.c +++ b/hw/arm/fsl-imx6ul.c @@ -725,7 +725,6 @@ static const Property fsl_imx6ul_properties[] = { true), DEFINE_PROP_BOOL("fec2-phy-connected", FslIMX6ULState, phy_connected[1], true), - DEFINE_PROP_END_OF_LIST(), }; static void fsl_imx6ul_class_init(ObjectClass *oc, void *data) diff --git a/hw/arm/fsl-imx7.c b/hw/arm/fsl-imx7.c index 0310c15b0cf..55b3b3d3c25 100644 --- a/hw/arm/fsl-imx7.c +++ b/hw/arm/fsl-imx7.c @@ -743,7 +743,6 @@ static const Property fsl_imx7_properties[] = { true), DEFINE_PROP_BOOL("fec2-phy-connected", FslIMX7State, phy_connected[1], true), - DEFINE_PROP_END_OF_LIST(), }; static void fsl_imx7_class_init(ObjectClass *oc, void *data) diff --git a/hw/arm/integratorcp.c b/hw/arm/integratorcp.c index ee6c7e0c0d9..64025bac64c 100644 --- a/hw/arm/integratorcp.c +++ b/hw/arm/integratorcp.c @@ -696,7 +696,6 @@ DEFINE_MACHINE("integratorcp", integratorcp_machine_init) static const Property core_properties[] = { DEFINE_PROP_UINT32("memsz", IntegratorCMState, memsz, 0), - DEFINE_PROP_END_OF_LIST(), }; static void core_class_init(ObjectClass *klass, void *data) diff --git a/hw/arm/msf2-soc.c b/hw/arm/msf2-soc.c index 5d7c3f2e5a0..224530f4da8 100644 --- a/hw/arm/msf2-soc.c +++ b/hw/arm/msf2-soc.c @@ -234,7 +234,6 @@ static const Property m2sxxx_soc_properties[] = { /* default divisors in Libero GUI */ DEFINE_PROP_UINT8("apb0div", MSF2State, apb0div, 2), DEFINE_PROP_UINT8("apb1div", MSF2State, apb1div, 2), - DEFINE_PROP_END_OF_LIST(), }; static void m2sxxx_soc_class_init(ObjectClass *klass, void *data) diff --git a/hw/arm/npcm7xx.c b/hw/arm/npcm7xx.c index 2960b63b596..780936493ef 100644 --- a/hw/arm/npcm7xx.c +++ b/hw/arm/npcm7xx.c @@ -813,7 +813,6 @@ static void npcm7xx_realize(DeviceState *dev, Error **errp) static const Property npcm7xx_properties[] = { DEFINE_PROP_LINK("dram-mr", NPCM7xxState, dram, TYPE_MEMORY_REGION, MemoryRegion *), - DEFINE_PROP_END_OF_LIST(), }; static void npcm7xx_class_init(ObjectClass *oc, void *data) diff --git a/hw/arm/nrf51_soc.c b/hw/arm/nrf51_soc.c index 43fac8a8db2..37dd4cf5f40 100644 --- a/hw/arm/nrf51_soc.c +++ b/hw/arm/nrf51_soc.c @@ -214,7 +214,6 @@ static const Property nrf51_soc_properties[] = { DEFINE_PROP_UINT32("sram-size", NRF51State, sram_size, NRF51822_SRAM_SIZE), DEFINE_PROP_UINT32("flash-size", NRF51State, flash_size, NRF51822_FLASH_SIZE), - DEFINE_PROP_END_OF_LIST(), }; static void nrf51_soc_class_init(ObjectClass *klass, void *data) diff --git a/hw/arm/smmu-common.c b/hw/arm/smmu-common.c index 6baa9d0fc31..dd74c2e5583 100644 --- a/hw/arm/smmu-common.c +++ b/hw/arm/smmu-common.c @@ -938,7 +938,6 @@ static const Property smmu_dev_properties[] = { DEFINE_PROP_UINT8("bus_num", SMMUState, bus_num, 0), DEFINE_PROP_LINK("primary-bus", SMMUState, primary_bus, TYPE_PCI_BUS, PCIBus *), - DEFINE_PROP_END_OF_LIST(), }; static void smmu_base_class_init(ObjectClass *klass, void *data) diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c index 026838f9ace..c0cf5df0f6e 100644 --- a/hw/arm/smmuv3.c +++ b/hw/arm/smmuv3.c @@ -1985,7 +1985,6 @@ static const Property smmuv3_properties[] = { * Defaults to stage 1 */ DEFINE_PROP_STRING("stage", SMMUv3State, stage), - DEFINE_PROP_END_OF_LIST() }; static void smmuv3_instance_init(Object *obj) diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c index 7fc13d96c9b..ea04b2837ff 100644 --- a/hw/arm/stellaris.c +++ b/hw/arm/stellaris.c @@ -448,7 +448,6 @@ static const Property stellaris_sys_properties[] = { DEFINE_PROP_UINT32("dc2", ssys_state, dc2, 0), DEFINE_PROP_UINT32("dc3", ssys_state, dc3, 0), DEFINE_PROP_UINT32("dc4", ssys_state, dc4, 0), - DEFINE_PROP_END_OF_LIST() }; static void stellaris_sys_instance_init(Object *obj) diff --git a/hw/arm/strongarm.c b/hw/arm/strongarm.c index 4c4ff21e804..f56781519ff 100644 --- a/hw/arm/strongarm.c +++ b/hw/arm/strongarm.c @@ -1334,7 +1334,6 @@ static const VMStateDescription vmstate_strongarm_uart_regs = { static const Property strongarm_uart_properties[] = { DEFINE_PROP_CHR("chardev", StrongARMUARTState, chr), - DEFINE_PROP_END_OF_LIST(), }; static void strongarm_uart_class_init(ObjectClass *klass, void *data) diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c index 3adbe7b1fbf..3760d101fd6 100644 --- a/hw/arm/xlnx-versal.c +++ b/hw/arm/xlnx-versal.c @@ -975,7 +975,6 @@ static const Property versal_properties[] = { TYPE_CAN_BUS, CanBusState *), DEFINE_PROP_LINK("canbus1", Versal, lpd.iou.canbus[1], TYPE_CAN_BUS, CanBusState *), - DEFINE_PROP_END_OF_LIST() }; static void versal_class_init(ObjectClass *klass, void *data) diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c index 1082c62c30f..6bb4629a5c9 100644 --- a/hw/arm/xlnx-zynqmp.c +++ b/hw/arm/xlnx-zynqmp.c @@ -867,7 +867,6 @@ static const Property xlnx_zynqmp_props[] = { CanBusState *), DEFINE_PROP_LINK("canbus1", XlnxZynqMPState, canbus[1], TYPE_CAN_BUS, CanBusState *), - DEFINE_PROP_END_OF_LIST() }; static void xlnx_zynqmp_class_init(ObjectClass *oc, void *data) diff --git a/hw/audio/ac97.c b/hw/audio/ac97.c index 8033bbbaed4..35533c6bad0 100644 --- a/hw/audio/ac97.c +++ b/hw/audio/ac97.c @@ -1326,7 +1326,6 @@ static void ac97_exit(PCIDevice *dev) static const Property ac97_properties[] = { DEFINE_AUDIO_PROPERTIES(AC97LinkState, card), - DEFINE_PROP_END_OF_LIST(), }; static void ac97_class_init(ObjectClass *klass, void *data) diff --git a/hw/audio/adlib.c b/hw/audio/adlib.c index c1d8faecb49..8c9767b5372 100644 --- a/hw/audio/adlib.c +++ b/hw/audio/adlib.c @@ -301,7 +301,6 @@ static const Property adlib_properties[] = { DEFINE_AUDIO_PROPERTIES(AdlibState, card), DEFINE_PROP_UINT32 ("iobase", AdlibState, port, 0x220), DEFINE_PROP_UINT32 ("freq", AdlibState, freq, 44100), - DEFINE_PROP_END_OF_LIST (), }; static void adlib_class_initfn (ObjectClass *klass, void *data) diff --git a/hw/audio/asc.c b/hw/audio/asc.c index 452039418d0..cc205bf063e 100644 --- a/hw/audio/asc.c +++ b/hw/audio/asc.c @@ -698,7 +698,6 @@ static void asc_init(Object *obj) static const Property asc_properties[] = { DEFINE_AUDIO_PROPERTIES(ASCState, card), DEFINE_PROP_UINT8("asctype", ASCState, type, ASC_TYPE_ASC), - DEFINE_PROP_END_OF_LIST(), }; static void asc_class_init(ObjectClass *oc, void *data) diff --git a/hw/audio/cs4231a.c b/hw/audio/cs4231a.c index abc38720a36..5a9be80ba3b 100644 --- a/hw/audio/cs4231a.c +++ b/hw/audio/cs4231a.c @@ -694,7 +694,6 @@ static const Property cs4231a_properties[] = { DEFINE_PROP_UINT32 ("iobase", CSState, port, 0x534), DEFINE_PROP_UINT32 ("irq", CSState, irq, 9), DEFINE_PROP_UINT32 ("dma", CSState, dma, 3), - DEFINE_PROP_END_OF_LIST (), }; static void cs4231a_class_initfn (ObjectClass *klass, void *data) diff --git a/hw/audio/es1370.c b/hw/audio/es1370.c index 6170425a5a1..b5756b97d5e 100644 --- a/hw/audio/es1370.c +++ b/hw/audio/es1370.c @@ -870,7 +870,6 @@ static void es1370_exit(PCIDevice *dev) static const Property es1370_properties[] = { DEFINE_AUDIO_PROPERTIES(ES1370State, card), - DEFINE_PROP_END_OF_LIST(), }; static void es1370_class_init (ObjectClass *klass, void *data) diff --git a/hw/audio/gus.c b/hw/audio/gus.c index dd5a5a34414..e718c1183e8 100644 --- a/hw/audio/gus.c +++ b/hw/audio/gus.c @@ -296,7 +296,6 @@ static const Property gus_properties[] = { DEFINE_PROP_UINT32 ("iobase", GUSState, port, 0x240), DEFINE_PROP_UINT32 ("irq", GUSState, emu.gusirq, 7), DEFINE_PROP_UINT32 ("dma", GUSState, emu.gusdma, 3), - DEFINE_PROP_END_OF_LIST (), }; static void gus_class_initfn (ObjectClass *klass, void *data) diff --git a/hw/audio/hda-codec.c b/hw/audio/hda-codec.c index 8bd8f62c485..6f3a8f691bf 100644 --- a/hw/audio/hda-codec.c +++ b/hw/audio/hda-codec.c @@ -862,7 +862,6 @@ static const Property hda_audio_properties[] = { DEFINE_PROP_UINT32("debug", HDAAudioState, debug, 0), DEFINE_PROP_BOOL("mixer", HDAAudioState, mixer, true), DEFINE_PROP_BOOL("use-timer", HDAAudioState, use_timer, true), - DEFINE_PROP_END_OF_LIST(), }; static void hda_audio_init_output(HDACodecDevice *hda, Error **errp) diff --git a/hw/audio/intel-hda.c b/hw/audio/intel-hda.c index 3e4a7552287..ec24dfd77aa 100644 --- a/hw/audio/intel-hda.c +++ b/hw/audio/intel-hda.c @@ -39,7 +39,6 @@ static const Property hda_props[] = { DEFINE_PROP_UINT32("cad", HDACodecDevice, cad, -1), - DEFINE_PROP_END_OF_LIST() }; static const TypeInfo hda_codec_bus_info = { @@ -1219,7 +1218,6 @@ static const Property intel_hda_properties[] = { DEFINE_PROP_UINT32("debug", IntelHDAState, debug, 0), DEFINE_PROP_ON_OFF_AUTO("msi", IntelHDAState, msi, ON_OFF_AUTO_AUTO), DEFINE_PROP_BOOL("old_msi_addr", IntelHDAState, old_msi_addr, false), - DEFINE_PROP_END_OF_LIST(), }; static void intel_hda_class_init(ObjectClass *klass, void *data) diff --git a/hw/audio/pcspk.c b/hw/audio/pcspk.c index 7a6b9f52d3f..17be1855474 100644 --- a/hw/audio/pcspk.c +++ b/hw/audio/pcspk.c @@ -219,7 +219,6 @@ static const Property pcspk_properties[] = { DEFINE_AUDIO_PROPERTIES(PCSpkState, card), DEFINE_PROP_UINT32("iobase", PCSpkState, iobase, 0x61), DEFINE_PROP_BOOL("migrate", PCSpkState, migrate, true), - DEFINE_PROP_END_OF_LIST(), }; static void pcspk_class_initfn(ObjectClass *klass, void *data) diff --git a/hw/audio/pl041.c b/hw/audio/pl041.c index 6c66a240cb9..f771d725fa6 100644 --- a/hw/audio/pl041.c +++ b/hw/audio/pl041.c @@ -630,7 +630,6 @@ static const Property pl041_device_properties[] = { /* Non-compact FIFO depth property */ DEFINE_PROP_UINT32("nc_fifo_depth", PL041State, fifo_depth, DEFAULT_FIFO_DEPTH), - DEFINE_PROP_END_OF_LIST(), }; static void pl041_device_class_init(ObjectClass *klass, void *data) diff --git a/hw/audio/sb16.c b/hw/audio/sb16.c index 143b9e71e12..0c661b4947b 100644 --- a/hw/audio/sb16.c +++ b/hw/audio/sb16.c @@ -1447,7 +1447,6 @@ static const Property sb16_properties[] = { DEFINE_PROP_UINT32 ("irq", SB16State, irq, 5), DEFINE_PROP_UINT32 ("dma", SB16State, dma, 1), DEFINE_PROP_UINT32 ("dma16", SB16State, hdma, 5), - DEFINE_PROP_END_OF_LIST (), }; static void sb16_class_initfn (ObjectClass *klass, void *data) diff --git a/hw/audio/via-ac97.c b/hw/audio/via-ac97.c index e43ddf37f3c..4e115e011e8 100644 --- a/hw/audio/via-ac97.c +++ b/hw/audio/via-ac97.c @@ -461,7 +461,6 @@ static void via_ac97_exit(PCIDevice *dev) static const Property via_ac97_properties[] = { DEFINE_AUDIO_PROPERTIES(ViaAC97State, card), - DEFINE_PROP_END_OF_LIST(), }; static void via_ac97_class_init(ObjectClass *klass, void *data) diff --git a/hw/audio/virtio-snd-pci.c b/hw/audio/virtio-snd-pci.c index b762d7e81ee..74d93f4e9c9 100644 --- a/hw/audio/virtio-snd-pci.c +++ b/hw/audio/virtio-snd-pci.c @@ -31,7 +31,6 @@ static const Property virtio_snd_pci_properties[] = { DEFINE_PROP_BIT("ioeventfd", VirtIOPCIProxy, flags, VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true), DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 2), - DEFINE_PROP_END_OF_LIST(), }; static void virtio_snd_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) diff --git a/hw/audio/virtio-snd.c b/hw/audio/virtio-snd.c index e2b112e0593..7e8ab74ceb4 100644 --- a/hw/audio/virtio-snd.c +++ b/hw/audio/virtio-snd.c @@ -85,7 +85,6 @@ static const Property virtio_snd_properties[] = { VIRTIO_SOUND_STREAM_DEFAULT), DEFINE_PROP_UINT32("chmaps", VirtIOSound, snd_conf.chmaps, VIRTIO_SOUND_CHMAP_DEFAULT), - DEFINE_PROP_END_OF_LIST(), }; static void diff --git a/hw/audio/wm8750.c b/hw/audio/wm8750.c index 19e7755060c..8d381dbc658 100644 --- a/hw/audio/wm8750.c +++ b/hw/audio/wm8750.c @@ -708,7 +708,6 @@ void wm8750_set_bclk_in(void *opaque, int new_hz) static const Property wm8750_properties[] = { DEFINE_AUDIO_PROPERTIES(WM8750State, card), - DEFINE_PROP_END_OF_LIST(), }; static void wm8750_class_init(ObjectClass *klass, void *data) diff --git a/hw/avr/atmega.c b/hw/avr/atmega.c index ce630ec572f..981f34219f4 100644 --- a/hw/avr/atmega.c +++ b/hw/avr/atmega.c @@ -358,7 +358,6 @@ static void atmega_realize(DeviceState *dev, Error **errp) static const Property atmega_props[] = { DEFINE_PROP_UINT64("xtal-frequency-hz", AtmegaMcuState, xtal_freq_hz, 0), - DEFINE_PROP_END_OF_LIST() }; static void atmega_class_init(ObjectClass *oc, void *data) diff --git a/hw/block/fdc-isa.c b/hw/block/fdc-isa.c index 2b9f667fe44..e71be8ab2cd 100644 --- a/hw/block/fdc-isa.c +++ b/hw/block/fdc-isa.c @@ -296,7 +296,6 @@ static const Property isa_fdc_properties[] = { DEFINE_PROP_SIGNED("fallback", FDCtrlISABus, state.fallback, FLOPPY_DRIVE_TYPE_288, qdev_prop_fdc_drive_type, FloppyDriveType), - DEFINE_PROP_END_OF_LIST(), }; static void isabus_fdc_class_init(ObjectClass *klass, void *data) diff --git a/hw/block/fdc-sysbus.c b/hw/block/fdc-sysbus.c index f17e04b138b..381b492aec9 100644 --- a/hw/block/fdc-sysbus.c +++ b/hw/block/fdc-sysbus.c @@ -206,7 +206,6 @@ static const Property sysbus_fdc_properties[] = { DEFINE_PROP_SIGNED("fallback", FDCtrlSysBus, state.fallback, FLOPPY_DRIVE_TYPE_144, qdev_prop_fdc_drive_type, FloppyDriveType), - DEFINE_PROP_END_OF_LIST(), }; static void sysbus_fdc_class_init(ObjectClass *klass, void *data) @@ -230,7 +229,6 @@ static const Property sun4m_fdc_properties[] = { DEFINE_PROP_SIGNED("fallback", FDCtrlSysBus, state.fallback, FLOPPY_DRIVE_TYPE_144, qdev_prop_fdc_drive_type, FloppyDriveType), - DEFINE_PROP_END_OF_LIST(), }; static void sun4m_fdc_class_init(ObjectClass *klass, void *data) diff --git a/hw/block/fdc.c b/hw/block/fdc.c index 57d68448063..d81b7a2a73b 100644 --- a/hw/block/fdc.c +++ b/hw/block/fdc.c @@ -460,7 +460,6 @@ static const Property floppy_drive_properties[] = { DEFINE_PROP_SIGNED("drive-type", FloppyDrive, type, FLOPPY_DRIVE_TYPE_AUTO, qdev_prop_fdc_drive_type, FloppyDriveType), - DEFINE_PROP_END_OF_LIST(), }; static void floppy_drive_realize(DeviceState *qdev, Error **errp) diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c index ca97365926b..8b5f148796d 100644 --- a/hw/block/m25p80.c +++ b/hw/block/m25p80.c @@ -1729,7 +1729,6 @@ static const Property m25p80_properties[] = { DEFINE_PROP_UINT8("spansion-cr3nv", Flash, spansion_cr3nv, 0x2), DEFINE_PROP_UINT8("spansion-cr4nv", Flash, spansion_cr4nv, 0x10), DEFINE_PROP_DRIVE("drive", Flash, blk), - DEFINE_PROP_END_OF_LIST(), }; static int m25p80_pre_load(void *opaque) diff --git a/hw/block/nand.c b/hw/block/nand.c index b6e6bfac236..35a91a870bf 100644 --- a/hw/block/nand.c +++ b/hw/block/nand.c @@ -449,7 +449,6 @@ static const Property nand_properties[] = { DEFINE_PROP_UINT8("manufacturer_id", NANDFlashState, manf_id, 0), DEFINE_PROP_UINT8("chip_id", NANDFlashState, chip_id, 0), DEFINE_PROP_DRIVE("drive", NANDFlashState, blk), - DEFINE_PROP_END_OF_LIST(), }; static void nand_class_init(ObjectClass *klass, void *data) diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c index 20f4fc67a03..06db20da606 100644 --- a/hw/block/pflash_cfi01.c +++ b/hw/block/pflash_cfi01.c @@ -932,7 +932,6 @@ static const Property pflash_cfi01_properties[] = { DEFINE_PROP_STRING("name", PFlashCFI01, name), DEFINE_PROP_BOOL("old-multiple-chip-handling", PFlashCFI01, old_multiple_chip_handling, false), - DEFINE_PROP_END_OF_LIST(), }; static void pflash_cfi01_class_init(ObjectClass *klass, void *data) diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c index c82002d665e..559fac8ce8c 100644 --- a/hw/block/pflash_cfi02.c +++ b/hw/block/pflash_cfi02.c @@ -959,7 +959,6 @@ static const Property pflash_cfi02_properties[] = { DEFINE_PROP_UINT16("unlock-addr0", PFlashCFI02, unlock_addr0, 0), DEFINE_PROP_UINT16("unlock-addr1", PFlashCFI02, unlock_addr1, 0), DEFINE_PROP_STRING("name", PFlashCFI02, name), - DEFINE_PROP_END_OF_LIST(), }; static void pflash_cfi02_unrealize(DeviceState *dev) diff --git a/hw/block/swim.c b/hw/block/swim.c index c336d83bdc1..4a7f8d13f7f 100644 --- a/hw/block/swim.c +++ b/hw/block/swim.c @@ -169,7 +169,6 @@ static const BlockDevOps swim_block_ops = { static const Property swim_drive_properties[] = { DEFINE_PROP_INT32("unit", SWIMDrive, unit, -1), DEFINE_BLOCK_PROPERTIES(SWIMDrive, conf), - DEFINE_PROP_END_OF_LIST(), }; static void swim_drive_realize(DeviceState *qdev, Error **errp) diff --git a/hw/block/vhost-user-blk.c b/hw/block/vhost-user-blk.c index f3ac0071080..d13c597d7eb 100644 --- a/hw/block/vhost-user-blk.c +++ b/hw/block/vhost-user-blk.c @@ -581,7 +581,6 @@ static const Property vhost_user_blk_properties[] = { VIRTIO_BLK_F_DISCARD, true), DEFINE_PROP_BIT64("write-zeroes", VHostUserBlk, parent_obj.host_features, VIRTIO_BLK_F_WRITE_ZEROES, true), - DEFINE_PROP_END_OF_LIST(), }; static void vhost_user_blk_class_init(ObjectClass *klass, void *data) diff --git a/hw/block/virtio-blk.c b/hw/block/virtio-blk.c index 9ca60fbc070..5bcb77ed200 100644 --- a/hw/block/virtio-blk.c +++ b/hw/block/virtio-blk.c @@ -2014,7 +2014,6 @@ static const Property virtio_blk_properties[] = { conf.max_write_zeroes_sectors, BDRV_REQUEST_MAX_SECTORS), DEFINE_PROP_BOOL("x-enable-wce-if-config-wce", VirtIOBlock, conf.x_enable_wce_if_config_wce, true), - DEFINE_PROP_END_OF_LIST(), }; static void virtio_blk_class_init(ObjectClass *klass, void *data) diff --git a/hw/block/xen-block.c b/hw/block/xen-block.c index 0c0817f4987..56a67136604 100644 --- a/hw/block/xen-block.c +++ b/hw/block/xen-block.c @@ -674,7 +674,6 @@ static const Property xen_block_props[] = { props.max_ring_page_order, 4), DEFINE_PROP_LINK("iothread", XenBlockDevice, props.iothread, TYPE_IOTHREAD, IOThread *), - DEFINE_PROP_END_OF_LIST() }; static void xen_block_class_init(ObjectClass *class, void *data) diff --git a/hw/char/avr_usart.c b/hw/char/avr_usart.c index 3421576e459..e8012cae3ad 100644 --- a/hw/char/avr_usart.c +++ b/hw/char/avr_usart.c @@ -261,7 +261,6 @@ static const MemoryRegionOps avr_usart_ops = { static const Property avr_usart_properties[] = { DEFINE_PROP_CHR("chardev", AVRUsartState, chr), - DEFINE_PROP_END_OF_LIST(), }; static void avr_usart_pr(void *opaque, int irq, int level) diff --git a/hw/char/bcm2835_aux.c b/hw/char/bcm2835_aux.c index 30285c97b0f..73ad5934067 100644 --- a/hw/char/bcm2835_aux.c +++ b/hw/char/bcm2835_aux.c @@ -292,7 +292,6 @@ static void bcm2835_aux_realize(DeviceState *dev, Error **errp) static const Property bcm2835_aux_props[] = { DEFINE_PROP_CHR("chardev", BCM2835AuxState, chr), - DEFINE_PROP_END_OF_LIST(), }; static void bcm2835_aux_class_init(ObjectClass *oc, void *data) diff --git a/hw/char/cadence_uart.c b/hw/char/cadence_uart.c index 2e778f7a9cd..ebd846a083b 100644 --- a/hw/char/cadence_uart.c +++ b/hw/char/cadence_uart.c @@ -619,7 +619,6 @@ static const VMStateDescription vmstate_cadence_uart = { static const Property cadence_uart_properties[] = { DEFINE_PROP_CHR("chardev", CadenceUARTState, chr), - DEFINE_PROP_END_OF_LIST(), }; static void cadence_uart_class_init(ObjectClass *klass, void *data) diff --git a/hw/char/cmsdk-apb-uart.c b/hw/char/cmsdk-apb-uart.c index e37e14e0f2d..0506500215f 100644 --- a/hw/char/cmsdk-apb-uart.c +++ b/hw/char/cmsdk-apb-uart.c @@ -380,7 +380,6 @@ static const VMStateDescription cmsdk_apb_uart_vmstate = { static const Property cmsdk_apb_uart_properties[] = { DEFINE_PROP_CHR("chardev", CMSDKAPBUART, chr), DEFINE_PROP_UINT32("pclk-frq", CMSDKAPBUART, pclk_frq, 0), - DEFINE_PROP_END_OF_LIST(), }; static void cmsdk_apb_uart_class_init(ObjectClass *klass, void *data) diff --git a/hw/char/debugcon.c b/hw/char/debugcon.c index c0f16e9bd64..1bc3bf85fea 100644 --- a/hw/char/debugcon.c +++ b/hw/char/debugcon.c @@ -118,7 +118,6 @@ static const Property debugcon_isa_properties[] = { DEFINE_PROP_UINT32("iobase", ISADebugconState, iobase, 0xe9), DEFINE_PROP_CHR("chardev", ISADebugconState, state.chr), DEFINE_PROP_UINT32("readback", ISADebugconState, state.readback, 0xe9), - DEFINE_PROP_END_OF_LIST(), }; static void debugcon_isa_class_initfn(ObjectClass *klass, void *data) diff --git a/hw/char/digic-uart.c b/hw/char/digic-uart.c index 03beba11adb..b0b0714e0f7 100644 --- a/hw/char/digic-uart.c +++ b/hw/char/digic-uart.c @@ -174,7 +174,6 @@ static const VMStateDescription vmstate_digic_uart = { static const Property digic_uart_properties[] = { DEFINE_PROP_CHR("chardev", DigicUartState, chr), - DEFINE_PROP_END_OF_LIST(), }; static void digic_uart_class_init(ObjectClass *klass, void *data) diff --git a/hw/char/escc.c b/hw/char/escc.c index 08bc65ef2cc..a5fdd8f6986 100644 --- a/hw/char/escc.c +++ b/hw/char/escc.c @@ -1099,7 +1099,6 @@ static const Property escc_properties[] = { DEFINE_PROP_CHR("chrB", ESCCState, chn[0].chr), DEFINE_PROP_CHR("chrA", ESCCState, chn[1].chr), DEFINE_PROP_STRING("chnA-sunkbd-layout", ESCCState, chn[1].sunkbd_layout), - DEFINE_PROP_END_OF_LIST(), }; static void escc_class_init(ObjectClass *klass, void *data) diff --git a/hw/char/exynos4210_uart.c b/hw/char/exynos4210_uart.c index c2836ff8fd8..a1a9a12cafe 100644 --- a/hw/char/exynos4210_uart.c +++ b/hw/char/exynos4210_uart.c @@ -709,7 +709,6 @@ static const Property exynos4210_uart_properties[] = { DEFINE_PROP_UINT32("channel", Exynos4210UartState, channel, 0), DEFINE_PROP_UINT32("rx-size", Exynos4210UartState, rx.size, 16), DEFINE_PROP_UINT32("tx-size", Exynos4210UartState, tx.size, 16), - DEFINE_PROP_END_OF_LIST(), }; static void exynos4210_uart_class_init(ObjectClass *klass, void *data) diff --git a/hw/char/goldfish_tty.c b/hw/char/goldfish_tty.c index 68e261236ec..701eb988933 100644 --- a/hw/char/goldfish_tty.c +++ b/hw/char/goldfish_tty.c @@ -243,7 +243,6 @@ static const VMStateDescription vmstate_goldfish_tty = { static const Property goldfish_tty_properties[] = { DEFINE_PROP_CHR("chardev", GoldfishTTYState, chr), - DEFINE_PROP_END_OF_LIST(), }; static void goldfish_tty_instance_init(Object *obj) diff --git a/hw/char/grlib_apbuart.c b/hw/char/grlib_apbuart.c index caae88d77d5..db6bcdad41b 100644 --- a/hw/char/grlib_apbuart.c +++ b/hw/char/grlib_apbuart.c @@ -279,7 +279,6 @@ static void grlib_apbuart_reset(DeviceState *d) static const Property grlib_apbuart_properties[] = { DEFINE_PROP_CHR("chrdev", UART, chr), - DEFINE_PROP_END_OF_LIST(), }; static void grlib_apbuart_class_init(ObjectClass *klass, void *data) diff --git a/hw/char/ibex_uart.c b/hw/char/ibex_uart.c index b1bdb2ad152..392375ad551 100644 --- a/hw/char/ibex_uart.c +++ b/hw/char/ibex_uart.c @@ -510,7 +510,6 @@ static const VMStateDescription vmstate_ibex_uart = { static const Property ibex_uart_properties[] = { DEFINE_PROP_CHR("chardev", IbexUartState, chr), - DEFINE_PROP_END_OF_LIST(), }; static void ibex_uart_init(Object *obj) diff --git a/hw/char/imx_serial.c b/hw/char/imx_serial.c index 6376f2cadc3..12705a1337f 100644 --- a/hw/char/imx_serial.c +++ b/hw/char/imx_serial.c @@ -440,7 +440,6 @@ static void imx_serial_init(Object *obj) static const Property imx_serial_properties[] = { DEFINE_PROP_CHR("chardev", IMXSerialState, chr), - DEFINE_PROP_END_OF_LIST(), }; static void imx_serial_class_init(ObjectClass *klass, void *data) diff --git a/hw/char/ipoctal232.c b/hw/char/ipoctal232.c index fb8cb6c2b71..d1e5f6dad2e 100644 --- a/hw/char/ipoctal232.c +++ b/hw/char/ipoctal232.c @@ -567,7 +567,6 @@ static const Property ipoctal_properties[] = { DEFINE_PROP_CHR("chardev5", IPOctalState, ch[5].dev), DEFINE_PROP_CHR("chardev6", IPOctalState, ch[6].dev), DEFINE_PROP_CHR("chardev7", IPOctalState, ch[7].dev), - DEFINE_PROP_END_OF_LIST(), }; static void ipoctal_class_init(ObjectClass *klass, void *data) diff --git a/hw/char/mcf_uart.c b/hw/char/mcf_uart.c index c044536d5d1..980a12fcb7d 100644 --- a/hw/char/mcf_uart.c +++ b/hw/char/mcf_uart.c @@ -314,7 +314,6 @@ static void mcf_uart_realize(DeviceState *dev, Error **errp) static const Property mcf_uart_properties[] = { DEFINE_PROP_CHR("chardev", mcf_uart_state, chr), - DEFINE_PROP_END_OF_LIST(), }; static void mcf_uart_class_init(ObjectClass *oc, void *data) diff --git a/hw/char/nrf51_uart.c b/hw/char/nrf51_uart.c index b164c70f52c..82a61ee95f2 100644 --- a/hw/char/nrf51_uart.c +++ b/hw/char/nrf51_uart.c @@ -306,7 +306,6 @@ static const VMStateDescription nrf51_uart_vmstate = { static const Property nrf51_uart_properties[] = { DEFINE_PROP_CHR("chardev", NRF51UARTState, chr), - DEFINE_PROP_END_OF_LIST(), }; static void nrf51_uart_class_init(ObjectClass *klass, void *data) diff --git a/hw/char/parallel.c b/hw/char/parallel.c index 15191698f5f..df31ce47220 100644 --- a/hw/char/parallel.c +++ b/hw/char/parallel.c @@ -608,7 +608,6 @@ static const Property parallel_isa_properties[] = { DEFINE_PROP_UINT32("iobase", ISAParallelState, iobase, -1), DEFINE_PROP_UINT32("irq", ISAParallelState, isairq, 7), DEFINE_PROP_CHR("chardev", ISAParallelState, state.chr), - DEFINE_PROP_END_OF_LIST(), }; static void parallel_isa_class_initfn(ObjectClass *klass, void *data) diff --git a/hw/char/pl011.c b/hw/char/pl011.c index 5fbee5e6c5b..06ce851044d 100644 --- a/hw/char/pl011.c +++ b/hw/char/pl011.c @@ -606,7 +606,6 @@ static const VMStateDescription vmstate_pl011 = { static const Property pl011_properties[] = { DEFINE_PROP_CHR("chardev", PL011State, chr), DEFINE_PROP_BOOL("migrate-clk", PL011State, migrate_clk, true), - DEFINE_PROP_END_OF_LIST(), }; static void pl011_init(Object *obj) diff --git a/hw/char/renesas_sci.c b/hw/char/renesas_sci.c index 516b48648b9..ea944949320 100644 --- a/hw/char/renesas_sci.c +++ b/hw/char/renesas_sci.c @@ -322,7 +322,6 @@ static const VMStateDescription vmstate_rsci = { static const Property rsci_properties[] = { DEFINE_PROP_UINT64("input-freq", RSCIState, input_freq, 0), DEFINE_PROP_CHR("chardev", RSCIState, chr), - DEFINE_PROP_END_OF_LIST(), }; static void rsci_class_init(ObjectClass *klass, void *data) diff --git a/hw/char/sclpconsole-lm.c b/hw/char/sclpconsole-lm.c index 536b2834717..ddb9a726d5a 100644 --- a/hw/char/sclpconsole-lm.c +++ b/hw/char/sclpconsole-lm.c @@ -337,7 +337,6 @@ static const Property console_properties[] = { DEFINE_PROP_CHR("chardev", SCLPConsoleLM, chr), DEFINE_PROP_UINT32("write_errors", SCLPConsoleLM, write_errors, 0), DEFINE_PROP_BOOL("echo", SCLPConsoleLM, echo, true), - DEFINE_PROP_END_OF_LIST(), }; static void console_class_init(ObjectClass *klass, void *data) diff --git a/hw/char/sclpconsole.c b/hw/char/sclpconsole.c index a90b892d1dd..01233b933d8 100644 --- a/hw/char/sclpconsole.c +++ b/hw/char/sclpconsole.c @@ -253,7 +253,6 @@ static void console_reset(DeviceState *dev) static const Property console_properties[] = { DEFINE_PROP_CHR("chardev", SCLPConsole, chr), - DEFINE_PROP_END_OF_LIST(), }; static void console_class_init(ObjectClass *klass, void *data) diff --git a/hw/char/serial-isa.c b/hw/char/serial-isa.c index 2cf50eb0bbb..f44959c769c 100644 --- a/hw/char/serial-isa.c +++ b/hw/char/serial-isa.c @@ -117,7 +117,6 @@ static const Property serial_isa_properties[] = { DEFINE_PROP_UINT32("index", ISASerialState, index, -1), DEFINE_PROP_UINT32("iobase", ISASerialState, iobase, -1), DEFINE_PROP_UINT32("irq", ISASerialState, isairq, -1), - DEFINE_PROP_END_OF_LIST(), }; static void serial_isa_class_initfn(ObjectClass *klass, void *data) diff --git a/hw/char/serial-mm.c b/hw/char/serial-mm.c index 8f51f1d3b8e..6338e7c0ba8 100644 --- a/hw/char/serial-mm.c +++ b/hw/char/serial-mm.c @@ -132,7 +132,6 @@ static const Property serial_mm_properties[] = { */ DEFINE_PROP_UINT8("regshift", SerialMM, regshift, 0), DEFINE_PROP_UINT8("endianness", SerialMM, endianness, DEVICE_NATIVE_ENDIAN), - DEFINE_PROP_END_OF_LIST(), }; static void serial_mm_class_init(ObjectClass *oc, void *data) diff --git a/hw/char/serial-pci-multi.c b/hw/char/serial-pci-multi.c index c2f20d8e74e..7578e863cfe 100644 --- a/hw/char/serial-pci-multi.c +++ b/hw/char/serial-pci-multi.c @@ -136,7 +136,6 @@ static const Property multi_2x_serial_pci_properties[] = { DEFINE_PROP_CHR("chardev1", PCIMultiSerialState, state[0].chr), DEFINE_PROP_CHR("chardev2", PCIMultiSerialState, state[1].chr), DEFINE_PROP_UINT8("prog_if", PCIMultiSerialState, prog_if, 0x02), - DEFINE_PROP_END_OF_LIST(), }; static const Property multi_4x_serial_pci_properties[] = { @@ -145,7 +144,6 @@ static const Property multi_4x_serial_pci_properties[] = { DEFINE_PROP_CHR("chardev3", PCIMultiSerialState, state[2].chr), DEFINE_PROP_CHR("chardev4", PCIMultiSerialState, state[3].chr), DEFINE_PROP_UINT8("prog_if", PCIMultiSerialState, prog_if, 0x02), - DEFINE_PROP_END_OF_LIST(), }; static void multi_2x_serial_pci_class_initfn(ObjectClass *klass, void *data) diff --git a/hw/char/serial-pci.c b/hw/char/serial-pci.c index 2f487a3a799..6659cef5d4b 100644 --- a/hw/char/serial-pci.c +++ b/hw/char/serial-pci.c @@ -83,7 +83,6 @@ static const VMStateDescription vmstate_pci_serial = { static const Property serial_pci_properties[] = { DEFINE_PROP_UINT8("prog_if", PCISerialState, prog_if, 0x02), - DEFINE_PROP_END_OF_LIST(), }; static void serial_pci_class_initfn(ObjectClass *klass, void *data) diff --git a/hw/char/serial.c b/hw/char/serial.c index 85dba02ace4..81b346a5ab7 100644 --- a/hw/char/serial.c +++ b/hw/char/serial.c @@ -968,7 +968,6 @@ static const Property serial_properties[] = { DEFINE_PROP_CHR("chardev", SerialState, chr), DEFINE_PROP_UINT32("baudbase", SerialState, baudbase, 115200), DEFINE_PROP_BOOL("wakeup", SerialState, wakeup, false), - DEFINE_PROP_END_OF_LIST(), }; static void serial_class_init(ObjectClass *klass, void* data) diff --git a/hw/char/sh_serial.c b/hw/char/sh_serial.c index 2ab7197aee7..247aeb071ac 100644 --- a/hw/char/sh_serial.c +++ b/hw/char/sh_serial.c @@ -450,7 +450,6 @@ static void sh_serial_init(Object *obj) static const Property sh_serial_properties[] = { DEFINE_PROP_CHR("chardev", SHSerialState, chr), DEFINE_PROP_UINT8("features", SHSerialState, feat, 0), - DEFINE_PROP_END_OF_LIST() }; static void sh_serial_class_init(ObjectClass *oc, void *data) diff --git a/hw/char/shakti_uart.c b/hw/char/shakti_uart.c index 6e56754ca6a..09975d9d349 100644 --- a/hw/char/shakti_uart.c +++ b/hw/char/shakti_uart.c @@ -159,7 +159,6 @@ static void shakti_uart_instance_init(Object *obj) static const Property shakti_uart_properties[] = { DEFINE_PROP_CHR("chardev", ShaktiUartState, chr), - DEFINE_PROP_END_OF_LIST(), }; static void shakti_uart_class_init(ObjectClass *klass, void *data) diff --git a/hw/char/sifive_uart.c b/hw/char/sifive_uart.c index 97e4be37c07..4bc5767284b 100644 --- a/hw/char/sifive_uart.c +++ b/hw/char/sifive_uart.c @@ -253,7 +253,6 @@ static int sifive_uart_be_change(void *opaque) static const Property sifive_uart_properties[] = { DEFINE_PROP_CHR("chardev", SiFiveUARTState, chr), - DEFINE_PROP_END_OF_LIST(), }; static void sifive_uart_init(Object *obj) diff --git a/hw/char/spapr_vty.c b/hw/char/spapr_vty.c index cd91dad7090..6451d010ac7 100644 --- a/hw/char/spapr_vty.c +++ b/hw/char/spapr_vty.c @@ -166,7 +166,6 @@ void spapr_vty_create(SpaprVioBus *bus, Chardev *chardev) static const Property spapr_vty_properties[] = { DEFINE_SPAPR_PROPERTIES(SpaprVioVty, sdev), DEFINE_PROP_CHR("chardev", SpaprVioVty, chardev), - DEFINE_PROP_END_OF_LIST(), }; static const VMStateDescription vmstate_spapr_vty = { diff --git a/hw/char/stm32f2xx_usart.c b/hw/char/stm32f2xx_usart.c index 4a3c30eddba..ebcc510f4ea 100644 --- a/hw/char/stm32f2xx_usart.c +++ b/hw/char/stm32f2xx_usart.c @@ -201,7 +201,6 @@ static const MemoryRegionOps stm32f2xx_usart_ops = { static const Property stm32f2xx_usart_properties[] = { DEFINE_PROP_CHR("chardev", STM32F2XXUsartState, chr), - DEFINE_PROP_END_OF_LIST(), }; static void stm32f2xx_usart_init(Object *obj) diff --git a/hw/char/stm32l4x5_usart.c b/hw/char/stm32l4x5_usart.c index 360e79cc3f4..bcc310bd97b 100644 --- a/hw/char/stm32l4x5_usart.c +++ b/hw/char/stm32l4x5_usart.c @@ -536,7 +536,6 @@ static const MemoryRegionOps stm32l4x5_usart_base_ops = { static const Property stm32l4x5_usart_base_properties[] = { DEFINE_PROP_CHR("chardev", Stm32l4x5UsartBaseState, chr), - DEFINE_PROP_END_OF_LIST(), }; static void stm32l4x5_usart_base_init(Object *obj) diff --git a/hw/char/terminal3270.c b/hw/char/terminal3270.c index c2aafda0ce5..04ee26dcbd3 100644 --- a/hw/char/terminal3270.c +++ b/hw/char/terminal3270.c @@ -285,7 +285,6 @@ static int write_payload_3270(EmulatedCcw3270Device *dev, uint8_t cmd) static const Property terminal_properties[] = { DEFINE_PROP_CHR("chardev", Terminal3270, chr), - DEFINE_PROP_END_OF_LIST(), }; static const VMStateDescription terminal3270_vmstate = { diff --git a/hw/char/virtio-console.c b/hw/char/virtio-console.c index f58292e2bb3..aa6d611a475 100644 --- a/hw/char/virtio-console.c +++ b/hw/char/virtio-console.c @@ -276,7 +276,6 @@ static const TypeInfo virtconsole_info = { static const Property virtserialport_properties[] = { DEFINE_PROP_CHR("chardev", VirtConsole, chr), - DEFINE_PROP_END_OF_LIST(), }; static void virtserialport_class_init(ObjectClass *klass, void *data) diff --git a/hw/char/virtio-serial-bus.c b/hw/char/virtio-serial-bus.c index 1e631bcb2b3..b6d2743a9c6 100644 --- a/hw/char/virtio-serial-bus.c +++ b/hw/char/virtio-serial-bus.c @@ -838,7 +838,6 @@ static void virtser_bus_dev_print(Monitor *mon, DeviceState *qdev, int indent); static const Property virtser_props[] = { DEFINE_PROP_UINT32("nr", VirtIOSerialPort, id, VIRTIO_CONSOLE_BAD_ID), DEFINE_PROP_STRING("name", VirtIOSerialPort, name), - DEFINE_PROP_END_OF_LIST() }; static void virtser_bus_class_init(ObjectClass *klass, void *data) @@ -1158,7 +1157,6 @@ static const Property virtio_serial_properties[] = { 31), DEFINE_PROP_BIT64("emergency-write", VirtIOSerial, host_features, VIRTIO_CONSOLE_F_EMERG_WRITE, true), - DEFINE_PROP_END_OF_LIST(), }; static void virtio_serial_class_init(ObjectClass *klass, void *data) diff --git a/hw/char/xen_console.c b/hw/char/xen_console.c index c20c1b4b84e..96e7d5940d2 100644 --- a/hw/char/xen_console.c +++ b/hw/char/xen_console.c @@ -490,7 +490,6 @@ static char *xen_console_get_frontend_path(XenDevice *xendev, Error **errp) static const Property xen_console_properties[] = { DEFINE_PROP_CHR("chardev", XenConsole, chr), DEFINE_PROP_INT32("idx", XenConsole, dev, -1), - DEFINE_PROP_END_OF_LIST(), }; static void xen_console_class_init(ObjectClass *class, void *data) diff --git a/hw/char/xilinx_uartlite.c b/hw/char/xilinx_uartlite.c index ad772262178..56955e0d74a 100644 --- a/hw/char/xilinx_uartlite.c +++ b/hw/char/xilinx_uartlite.c @@ -178,7 +178,6 @@ static const MemoryRegionOps uart_ops = { static const Property xilinx_uartlite_properties[] = { DEFINE_PROP_CHR("chardev", XilinxUARTLite, chr), - DEFINE_PROP_END_OF_LIST(), }; static void uart_rx(void *opaque, const uint8_t *buf, int size) diff --git a/hw/core/generic-loader.c b/hw/core/generic-loader.c index c1cddecf604..67f20089950 100644 --- a/hw/core/generic-loader.c +++ b/hw/core/generic-loader.c @@ -187,7 +187,6 @@ static const Property generic_loader_props[] = { DEFINE_PROP_UINT32("cpu-num", GenericLoaderState, cpu_num, CPU_NONE), DEFINE_PROP_BOOL("force-raw", GenericLoaderState, force_raw, false), DEFINE_PROP_STRING("file", GenericLoaderState, file), - DEFINE_PROP_END_OF_LIST(), }; static void generic_loader_class_init(ObjectClass *klass, void *data) diff --git a/hw/core/guest-loader.c b/hw/core/guest-loader.c index 74af00cee70..57315e5cef7 100644 --- a/hw/core/guest-loader.c +++ b/hw/core/guest-loader.c @@ -116,7 +116,6 @@ static const Property guest_loader_props[] = { DEFINE_PROP_STRING("kernel", GuestLoaderState, kernel), DEFINE_PROP_STRING("bootargs", GuestLoaderState, args), DEFINE_PROP_STRING("initrd", GuestLoaderState, initrd), - DEFINE_PROP_END_OF_LIST(), }; static void guest_loader_class_init(ObjectClass *klass, void *data) diff --git a/hw/core/or-irq.c b/hw/core/or-irq.c index fc52796f543..4d0d3cabf1e 100644 --- a/hw/core/or-irq.c +++ b/hw/core/or-irq.c @@ -117,7 +117,6 @@ static const VMStateDescription vmstate_or_irq = { static const Property or_irq_properties[] = { DEFINE_PROP_UINT16("num-lines", OrIRQState, num_lines, 1), - DEFINE_PROP_END_OF_LIST(), }; static void or_irq_class_init(ObjectClass *klass, void *data) diff --git a/hw/core/platform-bus.c b/hw/core/platform-bus.c index a29c9c6e594..1d00c4d36d0 100644 --- a/hw/core/platform-bus.c +++ b/hw/core/platform-bus.c @@ -207,7 +207,6 @@ static void platform_bus_realize(DeviceState *dev, Error **errp) static const Property platform_bus_properties[] = { DEFINE_PROP_UINT32("num_irqs", PlatformBusDevice, num_irqs, 0), DEFINE_PROP_UINT32("mmio_size", PlatformBusDevice, mmio_size, 0), - DEFINE_PROP_END_OF_LIST() }; static void platform_bus_class_init(ObjectClass *klass, void *data) diff --git a/hw/core/split-irq.c b/hw/core/split-irq.c index 40fc7e2e773..fc12274811b 100644 --- a/hw/core/split-irq.c +++ b/hw/core/split-irq.c @@ -61,7 +61,6 @@ static void split_irq_realize(DeviceState *dev, Error **errp) static const Property split_irq_properties[] = { DEFINE_PROP_UINT16("num-lines", SplitIRQ, num_lines, 1), - DEFINE_PROP_END_OF_LIST(), }; static void split_irq_class_init(ObjectClass *klass, void *data) diff --git a/hw/cpu/a15mpcore.c b/hw/cpu/a15mpcore.c index 5346b8b6c6e..bad44836f7e 100644 --- a/hw/cpu/a15mpcore.c +++ b/hw/cpu/a15mpcore.c @@ -153,7 +153,6 @@ static const Property a15mp_priv_properties[] = { * Other boards may differ and should set this property appropriately. */ DEFINE_PROP_UINT32("num-irq", A15MPPrivState, num_irq, 160), - DEFINE_PROP_END_OF_LIST(), }; static void a15mp_priv_class_init(ObjectClass *klass, void *data) diff --git a/hw/cpu/a9mpcore.c b/hw/cpu/a9mpcore.c index c3fdfb92e11..9671585b5f9 100644 --- a/hw/cpu/a9mpcore.c +++ b/hw/cpu/a9mpcore.c @@ -167,7 +167,6 @@ static const Property a9mp_priv_properties[] = { * Other boards may differ and should set this property appropriately. */ DEFINE_PROP_UINT32("num-irq", A9MPPrivState, num_irq, 96), - DEFINE_PROP_END_OF_LIST(), }; static void a9mp_priv_class_init(ObjectClass *klass, void *data) diff --git a/hw/cpu/arm11mpcore.c b/hw/cpu/arm11mpcore.c index 193fc182ab6..94861a06d94 100644 --- a/hw/cpu/arm11mpcore.c +++ b/hw/cpu/arm11mpcore.c @@ -142,7 +142,6 @@ static const Property mpcore_priv_properties[] = { * has more IRQ lines than the kernel expects. */ DEFINE_PROP_UINT32("num-irq", ARM11MPCorePriveState, num_irq, 64), - DEFINE_PROP_END_OF_LIST(), }; static void mpcore_priv_class_init(ObjectClass *klass, void *data) diff --git a/hw/cpu/cluster.c b/hw/cpu/cluster.c index 8e43621b5c7..9da5221f88b 100644 --- a/hw/cpu/cluster.c +++ b/hw/cpu/cluster.c @@ -27,7 +27,6 @@ static const Property cpu_cluster_properties[] = { DEFINE_PROP_UINT32("cluster-id", CPUClusterState, cluster_id, 0), - DEFINE_PROP_END_OF_LIST() }; typedef struct CallbackData { diff --git a/hw/cpu/realview_mpcore.c b/hw/cpu/realview_mpcore.c index 9a0ff1df864..4268735e3a5 100644 --- a/hw/cpu/realview_mpcore.c +++ b/hw/cpu/realview_mpcore.c @@ -110,7 +110,6 @@ static void mpcore_rirq_init(Object *obj) static const Property mpcore_rirq_properties[] = { DEFINE_PROP_UINT32("num-cpu", mpcore_rirq_state, num_cpu, 1), - DEFINE_PROP_END_OF_LIST(), }; static void mpcore_rirq_class_init(ObjectClass *klass, void *data) diff --git a/hw/cxl/switch-mailbox-cci.c b/hw/cxl/switch-mailbox-cci.c index 3fde0f8aaee..65cdac6cc13 100644 --- a/hw/cxl/switch-mailbox-cci.c +++ b/hw/cxl/switch-mailbox-cci.c @@ -68,7 +68,6 @@ static void cswmbcci_exit(PCIDevice *pci_dev) static const Property cxl_switch_cci_props[] = { DEFINE_PROP_LINK("target", CSWMBCCIDev, target, TYPE_CXL_USP, PCIDevice *), - DEFINE_PROP_END_OF_LIST(), }; static void cswmbcci_class_init(ObjectClass *oc, void *data) diff --git a/hw/display/artist.c b/hw/display/artist.c index 49deed328d9..8b719b11edb 100644 --- a/hw/display/artist.c +++ b/hw/display/artist.c @@ -1478,7 +1478,6 @@ static const Property artist_properties[] = { DEFINE_PROP_UINT16("width", ARTISTState, width, 1280), DEFINE_PROP_UINT16("height", ARTISTState, height, 1024), DEFINE_PROP_UINT16("depth", ARTISTState, depth, 8), - DEFINE_PROP_END_OF_LIST(), }; static void artist_reset(DeviceState *qdev) diff --git a/hw/display/ati.c b/hw/display/ati.c index e24e092bbc5..864fa4fc2ce 100644 --- a/hw/display/ati.c +++ b/hw/display/ati.c @@ -1047,7 +1047,6 @@ static const Property ati_vga_properties[] = { DEFINE_PROP_BOOL("guest_hwcursor", ATIVGAState, cursor_guest_mode, false), /* this is a debug option, prefer PROP_UINT over PROP_BIT for simplicity */ DEFINE_PROP_UINT8("x-pixman", ATIVGAState, use_pixman, DEFAULT_X_PIXMAN), - DEFINE_PROP_END_OF_LIST() }; static void ati_vga_class_init(ObjectClass *klass, void *data) diff --git a/hw/display/bcm2835_fb.c b/hw/display/bcm2835_fb.c index 2539fcc8ab8..a5bded5156a 100644 --- a/hw/display/bcm2835_fb.c +++ b/hw/display/bcm2835_fb.c @@ -440,7 +440,6 @@ static const Property bcm2835_fb_props[] = { initial_config.pixo, 1), /* 1=RGB, 0=BGR */ DEFINE_PROP_UINT32("alpha", BCM2835FBState, initial_config.alpha, 2), /* alpha ignored */ - DEFINE_PROP_END_OF_LIST() }; static void bcm2835_fb_class_init(ObjectClass *klass, void *data) diff --git a/hw/display/bochs-display.c b/hw/display/bochs-display.c index 9a3263aa016..086f7a0f06c 100644 --- a/hw/display/bochs-display.c +++ b/hw/display/bochs-display.c @@ -349,7 +349,6 @@ static const Property bochs_display_properties[] = { DEFINE_PROP_SIZE("vgamem", BochsDisplayState, vgamem, 16 * MiB), DEFINE_PROP_BOOL("edid", BochsDisplayState, enable_edid, true), DEFINE_EDID_PROPERTIES(BochsDisplayState, edid_info), - DEFINE_PROP_END_OF_LIST(), }; static void bochs_display_class_init(ObjectClass *klass, void *data) diff --git a/hw/display/cg3.c b/hw/display/cg3.c index 75b3312c245..3f971d875f8 100644 --- a/hw/display/cg3.c +++ b/hw/display/cg3.c @@ -366,7 +366,6 @@ static const Property cg3_properties[] = { DEFINE_PROP_UINT16("width", CG3State, width, -1), DEFINE_PROP_UINT16("height", CG3State, height, -1), DEFINE_PROP_UINT16("depth", CG3State, depth, -1), - DEFINE_PROP_END_OF_LIST(), }; static void cg3_class_init(ObjectClass *klass, void *data) diff --git a/hw/display/cirrus_vga.c b/hw/display/cirrus_vga.c index 198ed9ed9be..47ca6a77541 100644 --- a/hw/display/cirrus_vga.c +++ b/hw/display/cirrus_vga.c @@ -2989,7 +2989,6 @@ static const Property pci_vga_cirrus_properties[] = { cirrus_vga.enable_blitter, true), DEFINE_PROP_BOOL("global-vmstate", struct PCICirrusVGAState, cirrus_vga.vga.global_vmstate, false), - DEFINE_PROP_END_OF_LIST(), }; static void cirrus_vga_class_init(ObjectClass *klass, void *data) diff --git a/hw/display/cirrus_vga_isa.c b/hw/display/cirrus_vga_isa.c index d0d134470fa..60b7fd20f1e 100644 --- a/hw/display/cirrus_vga_isa.c +++ b/hw/display/cirrus_vga_isa.c @@ -74,7 +74,6 @@ static const Property isa_cirrus_vga_properties[] = { cirrus_vga.vga.vram_size_mb, 4), DEFINE_PROP_BOOL("blitter", struct ISACirrusVGAState, cirrus_vga.enable_blitter, true), - DEFINE_PROP_END_OF_LIST(), }; static void isa_cirrus_vga_class_init(ObjectClass *klass, void *data) diff --git a/hw/display/exynos4210_fimd.c b/hw/display/exynos4210_fimd.c index 4f097a172c3..04c864a3084 100644 --- a/hw/display/exynos4210_fimd.c +++ b/hw/display/exynos4210_fimd.c @@ -1928,7 +1928,6 @@ static const GraphicHwOps exynos4210_fimd_ops = { static const Property exynos4210_fimd_properties[] = { DEFINE_PROP_LINK("framebuffer-memory", Exynos4210fimdState, fbmem, TYPE_MEMORY_REGION, MemoryRegion *), - DEFINE_PROP_END_OF_LIST(), }; static void exynos4210_fimd_init(Object *obj) diff --git a/hw/display/g364fb.c b/hw/display/g364fb.c index a7533c69082..30b5ea67f26 100644 --- a/hw/display/g364fb.c +++ b/hw/display/g364fb.c @@ -514,7 +514,6 @@ static void g364fb_sysbus_reset(DeviceState *d) static const Property g364fb_sysbus_properties[] = { DEFINE_PROP_UINT32("vram_size", G364SysBusState, g364.vram_size, 8 * MiB), - DEFINE_PROP_END_OF_LIST(), }; static const VMStateDescription vmstate_g364fb_sysbus = { diff --git a/hw/display/i2c-ddc.c b/hw/display/i2c-ddc.c index a2d1f2b044b..d8ab9eee405 100644 --- a/hw/display/i2c-ddc.c +++ b/hw/display/i2c-ddc.c @@ -97,7 +97,6 @@ static const VMStateDescription vmstate_i2c_ddc = { static const Property i2c_ddc_properties[] = { DEFINE_EDID_PROPERTIES(I2CDDCState, edid_info), - DEFINE_PROP_END_OF_LIST(), }; static void i2c_ddc_class_init(ObjectClass *oc, void *data) diff --git a/hw/display/macfb.c b/hw/display/macfb.c index 977901bfdd0..e83fc863be5 100644 --- a/hw/display/macfb.c +++ b/hw/display/macfb.c @@ -764,7 +764,6 @@ static const Property macfb_sysbus_properties[] = { DEFINE_PROP_UINT8("depth", MacfbSysBusState, macfb.depth, 8), DEFINE_PROP_UINT8("display", MacfbSysBusState, macfb.type, MACFB_DISPLAY_VGA), - DEFINE_PROP_END_OF_LIST(), }; static const VMStateDescription vmstate_macfb_sysbus = { @@ -783,7 +782,6 @@ static const Property macfb_nubus_properties[] = { DEFINE_PROP_UINT8("depth", MacfbNubusState, macfb.depth, 8), DEFINE_PROP_UINT8("display", MacfbNubusState, macfb.type, MACFB_DISPLAY_VGA), - DEFINE_PROP_END_OF_LIST(), }; static const VMStateDescription vmstate_macfb_nubus = { diff --git a/hw/display/pl110.c b/hw/display/pl110.c index eca00b42794..4d4f477b943 100644 --- a/hw/display/pl110.c +++ b/hw/display/pl110.c @@ -538,7 +538,6 @@ static const GraphicHwOps pl110_gfx_ops = { static const Property pl110_properties[] = { DEFINE_PROP_LINK("framebuffer-memory", PL110State, fbmem, TYPE_MEMORY_REGION, MemoryRegion *), - DEFINE_PROP_END_OF_LIST(), }; static void pl110_realize(DeviceState *dev, Error **errp) diff --git a/hw/display/qxl.c b/hw/display/qxl.c index 949949d374b..f3b1be7ebfa 100644 --- a/hw/display/qxl.c +++ b/hw/display/qxl.c @@ -2475,7 +2475,6 @@ static const Property qxl_properties[] = { DEFINE_PROP_UINT32("xres", PCIQXLDevice, xres, 0), DEFINE_PROP_UINT32("yres", PCIQXLDevice, yres, 0), DEFINE_PROP_BOOL("global-vmstate", PCIQXLDevice, vga.global_vmstate, false), - DEFINE_PROP_END_OF_LIST(), }; static void qxl_pci_class_init(ObjectClass *klass, void *data) diff --git a/hw/display/ramfb-standalone.c b/hw/display/ramfb-standalone.c index e677f44be68..6c35028965d 100644 --- a/hw/display/ramfb-standalone.c +++ b/hw/display/ramfb-standalone.c @@ -62,7 +62,6 @@ static const VMStateDescription ramfb_dev_vmstate = { static const Property ramfb_properties[] = { DEFINE_PROP_BOOL("x-migrate", RAMFBStandaloneState, migrate, true), - DEFINE_PROP_END_OF_LIST(), }; static void ramfb_class_initfn(ObjectClass *klass, void *data) diff --git a/hw/display/sm501.c b/hw/display/sm501.c index 446b648f1a4..09edcf86f8e 100644 --- a/hw/display/sm501.c +++ b/hw/display/sm501.c @@ -2058,7 +2058,6 @@ static const Property sm501_sysbus_properties[] = { DEFINE_PROP_UINT32("vram-size", SM501SysBusState, vram_size, 0), /* this a debug option, prefer PROP_UINT over PROP_BIT for simplicity */ DEFINE_PROP_UINT8("x-pixman", SM501SysBusState, state.use_pixman, DEFAULT_X_PIXMAN), - DEFINE_PROP_END_OF_LIST(), }; static void sm501_reset_sysbus(DeviceState *dev) @@ -2146,7 +2145,6 @@ static void sm501_realize_pci(PCIDevice *dev, Error **errp) static const Property sm501_pci_properties[] = { DEFINE_PROP_UINT32("vram-size", SM501PCIState, vram_size, 64 * MiB), DEFINE_PROP_UINT8("x-pixman", SM501PCIState, state.use_pixman, DEFAULT_X_PIXMAN), - DEFINE_PROP_END_OF_LIST(), }; static void sm501_reset_pci(DeviceState *dev) diff --git a/hw/display/tcx.c b/hw/display/tcx.c index 3eb0a91ff9c..2cfc1e8f01d 100644 --- a/hw/display/tcx.c +++ b/hw/display/tcx.c @@ -884,7 +884,6 @@ static const Property tcx_properties[] = { DEFINE_PROP_UINT16("width", TCXState, width, -1), DEFINE_PROP_UINT16("height", TCXState, height, -1), DEFINE_PROP_UINT16("depth", TCXState, depth, -1), - DEFINE_PROP_END_OF_LIST(), }; static void tcx_class_init(ObjectClass *klass, void *data) diff --git a/hw/display/vga-isa.c b/hw/display/vga-isa.c index a6cbf771031..2920628f780 100644 --- a/hw/display/vga-isa.c +++ b/hw/display/vga-isa.c @@ -90,7 +90,6 @@ static void vga_isa_realizefn(DeviceState *dev, Error **errp) static const Property vga_isa_properties[] = { DEFINE_PROP_UINT32("vgamem_mb", ISAVGAState, state.vram_size_mb, 8), - DEFINE_PROP_END_OF_LIST(), }; static void vga_isa_class_initfn(ObjectClass *klass, void *data) diff --git a/hw/display/vga-mmio.c b/hw/display/vga-mmio.c index b759efdde75..1e0c2dbf748 100644 --- a/hw/display/vga-mmio.c +++ b/hw/display/vga-mmio.c @@ -114,7 +114,6 @@ static void vga_mmio_realizefn(DeviceState *dev, Error **errp) static const Property vga_mmio_properties[] = { DEFINE_PROP_UINT8("it_shift", VGAMmioState, it_shift, 0), DEFINE_PROP_UINT32("vgamem_mb", VGAMmioState, vga.vram_size_mb, 8), - DEFINE_PROP_END_OF_LIST(), }; static void vga_mmio_class_initfn(ObjectClass *klass, void *data) diff --git a/hw/display/vga-pci.c b/hw/display/vga-pci.c index 3145c448f59..dd084c20b16 100644 --- a/hw/display/vga-pci.c +++ b/hw/display/vga-pci.c @@ -339,7 +339,6 @@ static const Property vga_pci_properties[] = { PCIVGAState, flags, PCI_VGA_FLAG_ENABLE_EDID, true), DEFINE_EDID_PROPERTIES(PCIVGAState, edid_info), DEFINE_PROP_BOOL("global-vmstate", PCIVGAState, vga.global_vmstate, false), - DEFINE_PROP_END_OF_LIST(), }; static const Property secondary_pci_properties[] = { @@ -349,7 +348,6 @@ static const Property secondary_pci_properties[] = { DEFINE_PROP_BIT("edid", PCIVGAState, flags, PCI_VGA_FLAG_ENABLE_EDID, true), DEFINE_EDID_PROPERTIES(PCIVGAState, edid_info), - DEFINE_PROP_END_OF_LIST(), }; static void vga_pci_class_init(ObjectClass *klass, void *data) diff --git a/hw/display/vhost-user-gpu.c b/hw/display/vhost-user-gpu.c index a36eddcb12f..12d5c37ee50 100644 --- a/hw/display/vhost-user-gpu.c +++ b/hw/display/vhost-user-gpu.c @@ -647,7 +647,6 @@ static struct vhost_dev *vhost_user_gpu_get_vhost(VirtIODevice *vdev) static const Property vhost_user_gpu_properties[] = { VIRTIO_GPU_BASE_PROPERTIES(VhostUserGPU, parent_obj.conf), - DEFINE_PROP_END_OF_LIST(), }; static void diff --git a/hw/display/virtio-gpu-gl.c b/hw/display/virtio-gpu-gl.c index 6f31149e1ee..c6609ddb1bf 100644 --- a/hw/display/virtio-gpu-gl.c +++ b/hw/display/virtio-gpu-gl.c @@ -159,7 +159,6 @@ static const Property virtio_gpu_gl_properties[] = { VIRTIO_GPU_FLAG_STATS_ENABLED, false), DEFINE_PROP_BIT("venus", VirtIOGPU, parent_obj.conf.flags, VIRTIO_GPU_FLAG_VENUS_ENABLED, false), - DEFINE_PROP_END_OF_LIST(), }; static void virtio_gpu_gl_device_unrealize(DeviceState *qdev) diff --git a/hw/display/virtio-gpu-pci.c b/hw/display/virtio-gpu-pci.c index 89d27c9d85c..6d789701a3c 100644 --- a/hw/display/virtio-gpu-pci.c +++ b/hw/display/virtio-gpu-pci.c @@ -23,7 +23,6 @@ static const Property virtio_gpu_pci_base_properties[] = { DEFINE_VIRTIO_GPU_PCI_PROPERTIES(VirtIOPCIProxy), - DEFINE_PROP_END_OF_LIST(), }; static void virtio_gpu_pci_base_realize(VirtIOPCIProxy *vpci_dev, Error **errp) diff --git a/hw/display/virtio-gpu-rutabaga.c b/hw/display/virtio-gpu-rutabaga.c index f6486acddae..f6eb29472e8 100644 --- a/hw/display/virtio-gpu-rutabaga.c +++ b/hw/display/virtio-gpu-rutabaga.c @@ -1108,7 +1108,6 @@ static const Property virtio_gpu_rutabaga_properties[] = { DEFINE_PROP_STRING("wayland-socket-path", VirtIOGPURutabaga, wayland_socket_path), DEFINE_PROP_STRING("wsi", VirtIOGPURutabaga, wsi), - DEFINE_PROP_END_OF_LIST(), }; static void virtio_gpu_rutabaga_class_init(ObjectClass *klass, void *data) diff --git a/hw/display/virtio-gpu.c b/hw/display/virtio-gpu.c index 82741d19e56..c2a74a8d990 100644 --- a/hw/display/virtio-gpu.c +++ b/hw/display/virtio-gpu.c @@ -1682,7 +1682,6 @@ static const Property virtio_gpu_properties[] = { VIRTIO_GPU_FLAG_BLOB_ENABLED, false), DEFINE_PROP_SIZE("hostmem", VirtIOGPU, parent_obj.conf.hostmem, 0), DEFINE_PROP_UINT8("x-scanout-vmstate-version", VirtIOGPU, scanout_vmstate_version, 2), - DEFINE_PROP_END_OF_LIST(), }; static void virtio_gpu_class_init(ObjectClass *klass, void *data) diff --git a/hw/display/virtio-vga.c b/hw/display/virtio-vga.c index 532e4c62d57..fefbdb61e17 100644 --- a/hw/display/virtio-vga.c +++ b/hw/display/virtio-vga.c @@ -211,7 +211,6 @@ static void virtio_vga_set_big_endian_fb(Object *obj, bool value, Error **errp) static const Property virtio_vga_base_properties[] = { DEFINE_VIRTIO_GPU_PCI_PROPERTIES(VirtIOPCIProxy), - DEFINE_PROP_END_OF_LIST(), }; static void virtio_vga_base_class_init(ObjectClass *klass, void *data) diff --git a/hw/display/vmware_vga.c b/hw/display/vmware_vga.c index f49bbf393a1..2dd661e3c13 100644 --- a/hw/display/vmware_vga.c +++ b/hw/display/vmware_vga.c @@ -1337,7 +1337,6 @@ static const Property vga_vmware_properties[] = { chip.vga.vram_size_mb, 16), DEFINE_PROP_BOOL("global-vmstate", struct pci_vmsvga_state_s, chip.vga.global_vmstate, false), - DEFINE_PROP_END_OF_LIST(), }; static void vmsvga_class_init(ObjectClass *klass, void *data) diff --git a/hw/display/xlnx_dp.c b/hw/display/xlnx_dp.c index 7838f28bcad..1272da0133a 100644 --- a/hw/display/xlnx_dp.c +++ b/hw/display/xlnx_dp.c @@ -1389,7 +1389,6 @@ static void xlnx_dp_reset(DeviceState *dev) static const Property xlnx_dp_device_properties[] = { DEFINE_AUDIO_PROPERTIES(XlnxDPState, aud_card), - DEFINE_PROP_END_OF_LIST(), }; static void xlnx_dp_class_init(ObjectClass *oc, void *data) diff --git a/hw/dma/i82374.c b/hw/dma/i82374.c index 032afedde20..9652d47adcd 100644 --- a/hw/dma/i82374.c +++ b/hw/dma/i82374.c @@ -141,7 +141,6 @@ static void i82374_realize(DeviceState *dev, Error **errp) static const Property i82374_properties[] = { DEFINE_PROP_UINT32("iobase", I82374State, iobase, 0x400), - DEFINE_PROP_END_OF_LIST() }; static void i82374_class_init(ObjectClass *klass, void *data) diff --git a/hw/dma/i8257.c b/hw/dma/i8257.c index 8b041773930..74c38d2ee84 100644 --- a/hw/dma/i8257.c +++ b/hw/dma/i8257.c @@ -590,7 +590,6 @@ static const Property i8257_properties[] = { DEFINE_PROP_INT32("page-base", I8257State, page_base, 0x80), DEFINE_PROP_INT32("pageh-base", I8257State, pageh_base, 0x480), DEFINE_PROP_INT32("dshift", I8257State, dshift, 0), - DEFINE_PROP_END_OF_LIST() }; static void i8257_class_init(ObjectClass *klass, void *data) diff --git a/hw/dma/pl080.c b/hw/dma/pl080.c index 3f392822ed0..8a9b073b249 100644 --- a/hw/dma/pl080.c +++ b/hw/dma/pl080.c @@ -411,7 +411,6 @@ static void pl081_init(Object *obj) static const Property pl080_properties[] = { DEFINE_PROP_LINK("downstream", PL080State, downstream, TYPE_MEMORY_REGION, MemoryRegion *), - DEFINE_PROP_END_OF_LIST(), }; static void pl080_class_init(ObjectClass *oc, void *data) diff --git a/hw/dma/pl330.c b/hw/dma/pl330.c index d5a0a1caa20..ffef9ebb6fb 100644 --- a/hw/dma/pl330.c +++ b/hw/dma/pl330.c @@ -1669,8 +1669,6 @@ static const Property pl330_properties[] = { DEFINE_PROP_LINK("memory", PL330State, mem_mr, TYPE_MEMORY_REGION, MemoryRegion *), - - DEFINE_PROP_END_OF_LIST(), }; static void pl330_class_init(ObjectClass *klass, void *data) diff --git a/hw/dma/xilinx_axidma.c b/hw/dma/xilinx_axidma.c index f09452d0b52..4bae52a3017 100644 --- a/hw/dma/xilinx_axidma.c +++ b/hw/dma/xilinx_axidma.c @@ -619,7 +619,6 @@ static const Property axidma_properties[] = { tx_control_dev, TYPE_STREAM_SINK, StreamSink *), DEFINE_PROP_LINK("dma", XilinxAXIDMA, dma_mr, TYPE_MEMORY_REGION, MemoryRegion *), - DEFINE_PROP_END_OF_LIST(), }; static void axidma_class_init(ObjectClass *klass, void *data) diff --git a/hw/dma/xlnx-zdma.c b/hw/dma/xlnx-zdma.c index 1a63d5f3b28..bb27cb2e644 100644 --- a/hw/dma/xlnx-zdma.c +++ b/hw/dma/xlnx-zdma.c @@ -814,7 +814,6 @@ static const Property zdma_props[] = { DEFINE_PROP_UINT32("bus-width", XlnxZDMA, cfg.bus_width, 64), DEFINE_PROP_LINK("dma", XlnxZDMA, dma_mr, TYPE_MEMORY_REGION, MemoryRegion *), - DEFINE_PROP_END_OF_LIST(), }; static void zdma_class_init(ObjectClass *klass, void *data) diff --git a/hw/dma/xlnx_csu_dma.c b/hw/dma/xlnx_csu_dma.c index d78dc6444bd..f46485a42cb 100644 --- a/hw/dma/xlnx_csu_dma.c +++ b/hw/dma/xlnx_csu_dma.c @@ -710,7 +710,6 @@ static const Property xlnx_csu_dma_properties[] = { TYPE_STREAM_SINK, StreamSink *), DEFINE_PROP_LINK("dma", XlnxCSUDMA, dma_mr, TYPE_MEMORY_REGION, MemoryRegion *), - DEFINE_PROP_END_OF_LIST(), }; static void xlnx_csu_dma_class_init(ObjectClass *klass, void *data) diff --git a/hw/gpio/imx_gpio.c b/hw/gpio/imx_gpio.c index 919d53701f9..898f80f8c83 100644 --- a/hw/gpio/imx_gpio.c +++ b/hw/gpio/imx_gpio.c @@ -294,7 +294,6 @@ static const Property imx_gpio_properties[] = { DEFINE_PROP_BOOL("has-edge-sel", IMXGPIOState, has_edge_sel, true), DEFINE_PROP_BOOL("has-upper-pin-irq", IMXGPIOState, has_upper_pin_irq, false), - DEFINE_PROP_END_OF_LIST(), }; static void imx_gpio_reset(DeviceState *dev) diff --git a/hw/gpio/npcm7xx_gpio.c b/hw/gpio/npcm7xx_gpio.c index db6792b2ad9..23e67424c9f 100644 --- a/hw/gpio/npcm7xx_gpio.c +++ b/hw/gpio/npcm7xx_gpio.c @@ -395,7 +395,6 @@ static const Property npcm7xx_gpio_properties[] = { DEFINE_PROP_UINT32("reset-osrc", NPCM7xxGPIOState, reset_osrc, 0), /* Bit n set => pin n has high drive strength by default. */ DEFINE_PROP_UINT32("reset-odsc", NPCM7xxGPIOState, reset_odsc, 0), - DEFINE_PROP_END_OF_LIST(), }; static void npcm7xx_gpio_class_init(ObjectClass *klass, void *data) diff --git a/hw/gpio/omap_gpio.c b/hw/gpio/omap_gpio.c index 03ee9e47c68..8a9f14ba152 100644 --- a/hw/gpio/omap_gpio.c +++ b/hw/gpio/omap_gpio.c @@ -227,7 +227,6 @@ void omap_gpio_set_clk(Omap1GpioState *gpio, omap_clk clk) static const Property omap_gpio_properties[] = { DEFINE_PROP_INT32("mpu_model", Omap1GpioState, mpu_model, 0), - DEFINE_PROP_END_OF_LIST(), }; static void omap_gpio_class_init(ObjectClass *klass, void *data) diff --git a/hw/gpio/pca9552.c b/hw/gpio/pca9552.c index 427419d218f..1ac0cf6c464 100644 --- a/hw/gpio/pca9552.c +++ b/hw/gpio/pca9552.c @@ -430,7 +430,6 @@ static void pca955x_realize(DeviceState *dev, Error **errp) static const Property pca955x_properties[] = { DEFINE_PROP_STRING("description", PCA955xState, description), - DEFINE_PROP_END_OF_LIST(), }; static void pca955x_class_init(ObjectClass *klass, void *data) diff --git a/hw/gpio/pca9554.c b/hw/gpio/pca9554.c index e8b0458aac4..fe03bb4b5e2 100644 --- a/hw/gpio/pca9554.c +++ b/hw/gpio/pca9554.c @@ -293,7 +293,6 @@ static void pca9554_realize(DeviceState *dev, Error **errp) static const Property pca9554_properties[] = { DEFINE_PROP_STRING("description", PCA9554State, description), - DEFINE_PROP_END_OF_LIST(), }; static void pca9554_class_init(ObjectClass *klass, void *data) diff --git a/hw/gpio/pl061.c b/hw/gpio/pl061.c index 9b8ca6de320..60ce4a7f628 100644 --- a/hw/gpio/pl061.c +++ b/hw/gpio/pl061.c @@ -565,7 +565,6 @@ static void pl061_realize(DeviceState *dev, Error **errp) static const Property pl061_props[] = { DEFINE_PROP_UINT32("pullups", PL061State, pullups, 0xff), DEFINE_PROP_UINT32("pulldowns", PL061State, pulldowns, 0x0), - DEFINE_PROP_END_OF_LIST() }; static void pl061_class_init(ObjectClass *klass, void *data) diff --git a/hw/gpio/sifive_gpio.c b/hw/gpio/sifive_gpio.c index 5603f0c2357..0d5206ae6b5 100644 --- a/hw/gpio/sifive_gpio.c +++ b/hw/gpio/sifive_gpio.c @@ -351,7 +351,6 @@ static const VMStateDescription vmstate_sifive_gpio = { static const Property sifive_gpio_properties[] = { DEFINE_PROP_UINT32("ngpio", SIFIVEGPIOState, ngpio, SIFIVE_GPIO_PINS), - DEFINE_PROP_END_OF_LIST(), }; static void sifive_gpio_realize(DeviceState *dev, Error **errp) diff --git a/hw/gpio/stm32l4x5_gpio.c b/hw/gpio/stm32l4x5_gpio.c index d1394f3f55d..f69fc1db4f5 100644 --- a/hw/gpio/stm32l4x5_gpio.c +++ b/hw/gpio/stm32l4x5_gpio.c @@ -452,7 +452,6 @@ static const Property stm32l4x5_gpio_properties[] = { DEFINE_PROP_UINT32("mode-reset", Stm32l4x5GpioState, moder_reset, 0), DEFINE_PROP_UINT32("ospeed-reset", Stm32l4x5GpioState, ospeedr_reset, 0), DEFINE_PROP_UINT32("pupd-reset", Stm32l4x5GpioState, pupdr_reset, 0), - DEFINE_PROP_END_OF_LIST(), }; static void stm32l4x5_gpio_class_init(ObjectClass *klass, void *data) diff --git a/hw/hyperv/hv-balloon.c b/hw/hyperv/hv-balloon.c index 74897b1604f..c0bf5284295 100644 --- a/hw/hyperv/hv-balloon.c +++ b/hw/hyperv/hv-balloon.c @@ -1741,8 +1741,6 @@ static const Property hv_balloon_properties[] = { DEFINE_PROP_LINK(HV_BALLOON_MEMDEV_PROP, HvBalloon, hostmem, TYPE_MEMORY_BACKEND, HostMemoryBackend *), DEFINE_PROP_UINT64(HV_BALLOON_ADDR_PROP, HvBalloon, addr, 0), - - DEFINE_PROP_END_OF_LIST(), }; static void hv_balloon_class_init(ObjectClass *klass, void *data) diff --git a/hw/hyperv/syndbg.c b/hw/hyperv/syndbg.c index 0193addd424..d3e39170772 100644 --- a/hw/hyperv/syndbg.c +++ b/hw/hyperv/syndbg.c @@ -370,7 +370,6 @@ static const Property hv_syndbg_properties[] = { DEFINE_PROP_STRING("host_ip", HvSynDbg, host_ip), DEFINE_PROP_UINT16("host_port", HvSynDbg, host_port, 50000), DEFINE_PROP_BOOL("use_hcalls", HvSynDbg, use_hcalls, false), - DEFINE_PROP_END_OF_LIST(), }; static void hv_syndbg_class_init(ObjectClass *klass, void *data) diff --git a/hw/hyperv/vmbus.c b/hw/hyperv/vmbus.c index 3d1f4d14e84..12a7dc43128 100644 --- a/hw/hyperv/vmbus.c +++ b/hw/hyperv/vmbus.c @@ -2348,7 +2348,6 @@ static void vmbus_dev_unrealize(DeviceState *dev) static const Property vmbus_dev_props[] = { DEFINE_PROP_UUID("instanceid", VMBusDevice, instanceid), - DEFINE_PROP_END_OF_LIST() }; @@ -2655,7 +2654,6 @@ static const VMStateDescription vmstate_vmbus_bridge = { static const Property vmbus_bridge_props[] = { DEFINE_PROP_UINT8("irq", VMBusBridge, irq, 7), - DEFINE_PROP_END_OF_LIST() }; static void vmbus_bridge_class_init(ObjectClass *klass, void *data) diff --git a/hw/i2c/aspeed_i2c.c b/hw/i2c/aspeed_i2c.c index 2ea68c3090d..a8fbb9f44a1 100644 --- a/hw/i2c/aspeed_i2c.c +++ b/hw/i2c/aspeed_i2c.c @@ -1261,7 +1261,6 @@ static void aspeed_i2c_realize(DeviceState *dev, Error **errp) static const Property aspeed_i2c_properties[] = { DEFINE_PROP_LINK("dram", AspeedI2CState, dram_mr, TYPE_MEMORY_REGION, MemoryRegion *), - DEFINE_PROP_END_OF_LIST(), }; static void aspeed_i2c_class_init(ObjectClass *klass, void *data) @@ -1450,7 +1449,6 @@ static const Property aspeed_i2c_bus_properties[] = { DEFINE_PROP_UINT8("bus-id", AspeedI2CBus, id, 0), DEFINE_PROP_LINK("controller", AspeedI2CBus, controller, TYPE_ASPEED_I2C, AspeedI2CState *), - DEFINE_PROP_END_OF_LIST(), }; static void aspeed_i2c_bus_class_init(ObjectClass *klass, void *data) diff --git a/hw/i2c/core.c b/hw/i2c/core.c index 4118d3db506..26bb18514a9 100644 --- a/hw/i2c/core.c +++ b/hw/i2c/core.c @@ -20,7 +20,6 @@ static const Property i2c_props[] = { DEFINE_PROP_UINT8("address", struct I2CSlave, address, 0), - DEFINE_PROP_END_OF_LIST(), }; static const TypeInfo i2c_bus_info = { diff --git a/hw/i2c/i2c_mux_pca954x.c b/hw/i2c/i2c_mux_pca954x.c index 80c570fd102..779cc4e66ed 100644 --- a/hw/i2c/i2c_mux_pca954x.c +++ b/hw/i2c/i2c_mux_pca954x.c @@ -213,7 +213,6 @@ static void pca954x_init(Object *obj) static const Property pca954x_props[] = { DEFINE_PROP_STRING("name", Pca954xState, name), - DEFINE_PROP_END_OF_LIST() }; static void pca954x_class_init(ObjectClass *klass, void *data) diff --git a/hw/i2c/omap_i2c.c b/hw/i2c/omap_i2c.c index 172df135f57..a641db23480 100644 --- a/hw/i2c/omap_i2c.c +++ b/hw/i2c/omap_i2c.c @@ -513,7 +513,6 @@ void omap_i2c_set_fclk(OMAPI2CState *i2c, omap_clk clk) static const Property omap_i2c_properties[] = { DEFINE_PROP_UINT8("revision", OMAPI2CState, revision, 0), - DEFINE_PROP_END_OF_LIST(), }; static void omap_i2c_class_init(ObjectClass *klass, void *data) diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c index ca3e62a2446..be522b5d7dc 100644 --- a/hw/i386/amd_iommu.c +++ b/hw/i386/amd_iommu.c @@ -1670,7 +1670,6 @@ static void amdvi_sysbus_realize(DeviceState *dev, Error **errp) static const Property amdvi_properties[] = { DEFINE_PROP_BOOL("xtsup", AMDVIState, xtsup, false), - DEFINE_PROP_END_OF_LIST(), }; static const VMStateDescription vmstate_amdvi_sysbus = { diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index a5b268342fc..f81f34dafa2 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -3418,7 +3418,6 @@ static const Property vtd_properties[] = { DEFINE_PROP_BOOL("dma-drain", IntelIOMMUState, dma_drain, true), DEFINE_PROP_BOOL("dma-translation", IntelIOMMUState, dma_translation, true), DEFINE_PROP_BOOL("stale-tm", IntelIOMMUState, stale_tm, false), - DEFINE_PROP_END_OF_LIST(), }; /* Read IRTE entry with specific index */ diff --git a/hw/i386/kvm/clock.c b/hw/i386/kvm/clock.c index 71150ed2e0a..f7b49bd9f79 100644 --- a/hw/i386/kvm/clock.c +++ b/hw/i386/kvm/clock.c @@ -308,7 +308,6 @@ static const VMStateDescription kvmclock_vmsd = { static const Property kvmclock_properties[] = { DEFINE_PROP_BOOL("x-mach-use-reliable-get-clock", KVMClockState, mach_use_reliable_get_clock, true), - DEFINE_PROP_END_OF_LIST(), }; static void kvmclock_class_init(ObjectClass *klass, void *data) diff --git a/hw/i386/kvm/i8254.c b/hw/i386/kvm/i8254.c index 2933d3f4581..da5eb600529 100644 --- a/hw/i386/kvm/i8254.c +++ b/hw/i386/kvm/i8254.c @@ -290,7 +290,6 @@ static void kvm_pit_realizefn(DeviceState *dev, Error **errp) static const Property kvm_pit_properties[] = { DEFINE_PROP_LOSTTICKPOLICY("lost_tick_policy", KVMPITState, lost_tick_policy, LOST_TICK_POLICY_DELAY), - DEFINE_PROP_END_OF_LIST(), }; static void kvm_pit_class_init(ObjectClass *klass, void *data) diff --git a/hw/i386/kvm/ioapic.c b/hw/i386/kvm/ioapic.c index 217ff43b982..73b31df6ab9 100644 --- a/hw/i386/kvm/ioapic.c +++ b/hw/i386/kvm/ioapic.c @@ -135,7 +135,6 @@ static void kvm_ioapic_realize(DeviceState *dev, Error **errp) static const Property kvm_ioapic_properties[] = { DEFINE_PROP_UINT32("gsi_base", KVMIOAPICState, kvm_gsi_base, 0), - DEFINE_PROP_END_OF_LIST() }; static void kvm_ioapic_class_init(ObjectClass *klass, void *data) diff --git a/hw/i386/sgx-epc.c b/hw/i386/sgx-epc.c index c232e825e02..875e1c5c33b 100644 --- a/hw/i386/sgx-epc.c +++ b/hw/i386/sgx-epc.c @@ -24,7 +24,6 @@ static const Property sgx_epc_properties[] = { DEFINE_PROP_UINT32(SGX_EPC_NUMA_NODE_PROP, SGXEPCDevice, node, 0), DEFINE_PROP_LINK(SGX_EPC_MEMDEV_PROP, SGXEPCDevice, hostmem, TYPE_MEMORY_BACKEND_EPC, HostMemoryBackendEpc *), - DEFINE_PROP_END_OF_LIST(), }; static void sgx_epc_get_size(Object *obj, Visitor *v, const char *name, diff --git a/hw/i386/vmmouse.c b/hw/i386/vmmouse.c index da9c35c1ec2..3e07d125128 100644 --- a/hw/i386/vmmouse.c +++ b/hw/i386/vmmouse.c @@ -319,7 +319,6 @@ static void vmmouse_realizefn(DeviceState *dev, Error **errp) static const Property vmmouse_properties[] = { DEFINE_PROP_LINK("i8042", VMMouseState, i8042, TYPE_I8042, ISAKBDState *), - DEFINE_PROP_END_OF_LIST(), }; static void vmmouse_class_initfn(ObjectClass *klass, void *data) diff --git a/hw/i386/vmport.c b/hw/i386/vmport.c index cab6e720898..2096686b640 100644 --- a/hw/i386/vmport.c +++ b/hw/i386/vmport.c @@ -284,8 +284,6 @@ static const Property vmport_properties[] = { * 5 - ACE 1.x (Deprecated) */ DEFINE_PROP_UINT8("vmware-vmx-type", VMPortState, vmware_vmx_type, 2), - - DEFINE_PROP_END_OF_LIST(), }; static void vmport_class_initfn(ObjectClass *klass, void *data) diff --git a/hw/i386/x86-iommu.c b/hw/i386/x86-iommu.c index 155f6262ea1..e5ec60eae7e 100644 --- a/hw/i386/x86-iommu.c +++ b/hw/i386/x86-iommu.c @@ -130,7 +130,6 @@ static const Property x86_iommu_properties[] = { intr_supported, ON_OFF_AUTO_AUTO), DEFINE_PROP_BOOL("device-iotlb", X86IOMMUState, dt_supported, false), DEFINE_PROP_BOOL("pt", X86IOMMUState, pt_supported, true), - DEFINE_PROP_END_OF_LIST(), }; static void x86_iommu_class_init(ObjectClass *klass, void *data) diff --git a/hw/i386/xen/xen_pvdevice.c b/hw/i386/xen/xen_pvdevice.c index e71483e6e33..9453da97bd9 100644 --- a/hw/i386/xen/xen_pvdevice.c +++ b/hw/i386/xen/xen_pvdevice.c @@ -120,7 +120,6 @@ static const Property xen_pv_props[] = { DEFINE_PROP_UINT16("device-id", XenPVDevice, device_id, 0xffff), DEFINE_PROP_UINT8("revision", XenPVDevice, revision, 0x01), DEFINE_PROP_UINT32("size", XenPVDevice, size, 0x400000), - DEFINE_PROP_END_OF_LIST() }; static void xen_pv_class_init(ObjectClass *klass, void *data) diff --git a/hw/ide/ahci-sysbus.c b/hw/ide/ahci-sysbus.c index 2432039290b..03a5bd42d07 100644 --- a/hw/ide/ahci-sysbus.c +++ b/hw/ide/ahci-sysbus.c @@ -64,7 +64,6 @@ static void sysbus_ahci_realize(DeviceState *dev, Error **errp) static const Property sysbus_ahci_properties[] = { DEFINE_PROP_UINT32("num-ports", SysbusAHCIState, ahci.ports, 1), - DEFINE_PROP_END_OF_LIST(), }; static void sysbus_ahci_class_init(ObjectClass *klass, void *data) diff --git a/hw/ide/cf.c b/hw/ide/cf.c index 190914f5133..cfb4394f80d 100644 --- a/hw/ide/cf.c +++ b/hw/ide/cf.c @@ -29,7 +29,6 @@ static const Property ide_cf_properties[] = { DEFINE_BLOCK_CHS_PROPERTIES(IDEDrive, dev.conf), DEFINE_PROP_BIOS_CHS_TRANS("bios-chs-trans", IDEDrive, dev.chs_trans, BIOS_ATA_TRANSLATION_AUTO), - DEFINE_PROP_END_OF_LIST(), }; static void ide_cf_class_init(ObjectClass *klass, void *data) diff --git a/hw/ide/cmd646.c b/hw/ide/cmd646.c index 942f6c470c8..bcc3f344fc0 100644 --- a/hw/ide/cmd646.c +++ b/hw/ide/cmd646.c @@ -315,7 +315,6 @@ static void pci_cmd646_ide_exitfn(PCIDevice *dev) static const Property cmd646_ide_properties[] = { DEFINE_PROP_UINT32("secondary", PCIIDEState, secondary, 0), - DEFINE_PROP_END_OF_LIST(), }; static void cmd646_ide_class_init(ObjectClass *klass, void *data) diff --git a/hw/ide/ide-dev.c b/hw/ide/ide-dev.c index cc92531f1ce..789056c5dc7 100644 --- a/hw/ide/ide-dev.c +++ b/hw/ide/ide-dev.c @@ -32,7 +32,6 @@ static const Property ide_props[] = { DEFINE_PROP_UINT32("unit", IDEDevice, unit, -1), DEFINE_PROP_BOOL("win2k-install-hack", IDEDevice, win2k_install_hack, false), - DEFINE_PROP_END_OF_LIST(), }; static void ide_qdev_realize(DeviceState *qdev, Error **errp) @@ -197,7 +196,6 @@ static const Property ide_hd_properties[] = { DEFINE_PROP_BIOS_CHS_TRANS("bios-chs-trans", IDEDrive, dev.chs_trans, BIOS_ATA_TRANSLATION_AUTO), DEFINE_PROP_UINT16("rotation_rate", IDEDrive, dev.rotation_rate, 0), - DEFINE_PROP_END_OF_LIST(), }; static void ide_hd_class_init(ObjectClass *klass, void *data) @@ -220,7 +218,6 @@ static const TypeInfo ide_hd_info = { static const Property ide_cd_properties[] = { DEFINE_IDE_DEV_PROPERTIES(), - DEFINE_PROP_END_OF_LIST(), }; static void ide_cd_class_init(ObjectClass *klass, void *data) diff --git a/hw/ide/isa.c b/hw/ide/isa.c index a0a7e4837c2..9a3c2d522c1 100644 --- a/hw/ide/isa.c +++ b/hw/ide/isa.c @@ -105,7 +105,6 @@ static const Property isa_ide_properties[] = { DEFINE_PROP_UINT32("iobase", ISAIDEState, iobase, 0x1f0), DEFINE_PROP_UINT32("iobase2", ISAIDEState, iobase2, 0x3f6), DEFINE_PROP_UINT32("irq", ISAIDEState, irqnum, 14), - DEFINE_PROP_END_OF_LIST(), }; static void isa_ide_class_initfn(ObjectClass *klass, void *data) diff --git a/hw/ide/macio.c b/hw/ide/macio.c index 25f8403e80f..ecaab77862f 100644 --- a/hw/ide/macio.c +++ b/hw/ide/macio.c @@ -462,7 +462,6 @@ static void macio_ide_initfn(Object *obj) static const Property macio_ide_properties[] = { DEFINE_PROP_UINT32("channel", MACIOIDEState, channel, 0), DEFINE_PROP_UINT32("addr", MACIOIDEState, addr, -1), - DEFINE_PROP_END_OF_LIST(), }; static void macio_ide_class_init(ObjectClass *oc, void *data) diff --git a/hw/ide/mmio.c b/hw/ide/mmio.c index 43ab66f3478..a1b0fd23de4 100644 --- a/hw/ide/mmio.c +++ b/hw/ide/mmio.c @@ -143,7 +143,6 @@ static void mmio_ide_initfn(Object *obj) static const Property mmio_ide_properties[] = { DEFINE_PROP_UINT32("shift", MMIOIDEState, shift, 0), - DEFINE_PROP_END_OF_LIST() }; static void mmio_ide_class_init(ObjectClass *oc, void *data) diff --git a/hw/input/pckbd.c b/hw/input/pckbd.c index 24a133fd252..16ac82e34d0 100644 --- a/hw/input/pckbd.c +++ b/hw/input/pckbd.c @@ -738,7 +738,6 @@ static void i8042_mmio_init(Object *obj) static const Property i8042_mmio_properties[] = { DEFINE_PROP_UINT64("mask", MMIOKBDState, kbd.mask, UINT64_MAX), DEFINE_PROP_UINT32("size", MMIOKBDState, size, -1), - DEFINE_PROP_END_OF_LIST(), }; static const VMStateDescription vmstate_kbd_mmio = { @@ -938,7 +937,6 @@ static const Property i8042_properties[] = { DEFINE_PROP_BOOL("kbd-throttle", ISAKBDState, kbd_throttle, false), DEFINE_PROP_UINT8("kbd-irq", ISAKBDState, kbd_irq, 1), DEFINE_PROP_UINT8("mouse-irq", ISAKBDState, mouse_irq, 12), - DEFINE_PROP_END_OF_LIST(), }; static void i8042_class_initfn(ObjectClass *klass, void *data) diff --git a/hw/input/stellaris_gamepad.c b/hw/input/stellaris_gamepad.c index b1cc6931896..98382a0e153 100644 --- a/hw/input/stellaris_gamepad.c +++ b/hw/input/stellaris_gamepad.c @@ -80,7 +80,6 @@ static void stellaris_gamepad_reset_enter(Object *obj, ResetType type) static const Property stellaris_gamepad_properties[] = { DEFINE_PROP_ARRAY("keycodes", StellarisGamepad, num_buttons, keycodes, qdev_prop_uint32, uint32_t), - DEFINE_PROP_END_OF_LIST(), }; static void stellaris_gamepad_class_init(ObjectClass *klass, void *data) diff --git a/hw/input/virtio-input-hid.c b/hw/input/virtio-input-hid.c index 73963855089..812faaef8fe 100644 --- a/hw/input/virtio-input-hid.c +++ b/hw/input/virtio-input-hid.c @@ -240,7 +240,6 @@ static void virtio_input_hid_handle_status(VirtIOInput *vinput, static const Property virtio_input_hid_properties[] = { DEFINE_PROP_STRING("display", VirtIOInputHID, display), DEFINE_PROP_UINT32("head", VirtIOInputHID, head, 0), - DEFINE_PROP_END_OF_LIST(), }; static void virtio_input_hid_class_init(ObjectClass *klass, void *data) @@ -382,7 +381,6 @@ static struct virtio_input_config virtio_mouse_config_v2[] = { static const Property virtio_mouse_properties[] = { DEFINE_PROP_BOOL("wheel-axis", VirtIOInputHID, wheel_axis, true), - DEFINE_PROP_END_OF_LIST(), }; static void virtio_mouse_class_init(ObjectClass *klass, void *data) @@ -507,7 +505,6 @@ static struct virtio_input_config virtio_tablet_config_v2[] = { static const Property virtio_tablet_properties[] = { DEFINE_PROP_BOOL("wheel-axis", VirtIOInputHID, wheel_axis, true), - DEFINE_PROP_END_OF_LIST(), }; static void virtio_tablet_class_init(ObjectClass *klass, void *data) diff --git a/hw/input/virtio-input-host.c b/hw/input/virtio-input-host.c index 2be2c633abc..8bfb17f3c43 100644 --- a/hw/input/virtio-input-host.c +++ b/hw/input/virtio-input-host.c @@ -223,7 +223,6 @@ static const VMStateDescription vmstate_virtio_input_host = { static const Property virtio_input_host_properties[] = { DEFINE_PROP_STRING("evdev", VirtIOInputHost, evdev), - DEFINE_PROP_END_OF_LIST(), }; static void virtio_input_host_class_init(ObjectClass *klass, void *data) diff --git a/hw/input/virtio-input.c b/hw/input/virtio-input.c index edcd94dedb6..1394d99c6b4 100644 --- a/hw/input/virtio-input.c +++ b/hw/input/virtio-input.c @@ -302,7 +302,6 @@ static const VMStateDescription vmstate_virtio_input = { static const Property virtio_input_properties[] = { DEFINE_PROP_STRING("serial", VirtIOInput, serial), - DEFINE_PROP_END_OF_LIST(), }; static void virtio_input_class_init(ObjectClass *klass, void *data) diff --git a/hw/intc/apic_common.c b/hw/intc/apic_common.c index 8be9f22de82..de8074d474f 100644 --- a/hw/intc/apic_common.c +++ b/hw/intc/apic_common.c @@ -414,7 +414,6 @@ static const Property apic_properties_common[] = { true), DEFINE_PROP_BOOL("legacy-instance-id", APICCommonState, legacy_instance_id, false), - DEFINE_PROP_END_OF_LIST(), }; static void apic_common_get_id(Object *obj, Visitor *v, const char *name, diff --git a/hw/intc/arm_gic_common.c b/hw/intc/arm_gic_common.c index e961cd91565..50c516f2f2e 100644 --- a/hw/intc/arm_gic_common.c +++ b/hw/intc/arm_gic_common.c @@ -360,7 +360,6 @@ static const Property arm_gic_common_properties[] = { /* True if the GIC should implement the virtualization extensions */ DEFINE_PROP_BOOL("has-virtualization-extensions", GICState, virt_extn, 0), DEFINE_PROP_UINT32("num-priority-bits", GICState, n_prio_bits, 8), - DEFINE_PROP_END_OF_LIST(), }; static void arm_gic_common_class_init(ObjectClass *klass, void *data) diff --git a/hw/intc/arm_gicv2m.c b/hw/intc/arm_gicv2m.c index ffa830b433c..ae389fe5842 100644 --- a/hw/intc/arm_gicv2m.c +++ b/hw/intc/arm_gicv2m.c @@ -173,7 +173,6 @@ static void gicv2m_init(Object *obj) static const Property gicv2m_properties[] = { DEFINE_PROP_UINT32("base-spi", ARMGICv2mState, base_spi, 0), DEFINE_PROP_UINT32("num-spi", ARMGICv2mState, num_spi, 64), - DEFINE_PROP_END_OF_LIST(), }; static void gicv2m_class_init(ObjectClass *klass, void *data) diff --git a/hw/intc/arm_gicv3_common.c b/hw/intc/arm_gicv3_common.c index a8ec615a3fe..53e7a251b0e 100644 --- a/hw/intc/arm_gicv3_common.c +++ b/hw/intc/arm_gicv3_common.c @@ -621,7 +621,6 @@ static const Property arm_gicv3_common_properties[] = { redist_region_count, qdev_prop_uint32, uint32_t), DEFINE_PROP_LINK("sysmem", GICv3State, dma, TYPE_MEMORY_REGION, MemoryRegion *), - DEFINE_PROP_END_OF_LIST(), }; static void arm_gicv3_common_class_init(ObjectClass *klass, void *data) diff --git a/hw/intc/arm_gicv3_its.c b/hw/intc/arm_gicv3_its.c index f50b1814eaf..2388a96799f 100644 --- a/hw/intc/arm_gicv3_its.c +++ b/hw/intc/arm_gicv3_its.c @@ -2005,7 +2005,6 @@ static void gicv3_its_post_load(GICv3ITSState *s) static const Property gicv3_its_props[] = { DEFINE_PROP_LINK("parent-gicv3", GICv3ITSState, gicv3, "arm-gicv3", GICv3State *), - DEFINE_PROP_END_OF_LIST(), }; static void gicv3_its_class_init(ObjectClass *klass, void *data) diff --git a/hw/intc/arm_gicv3_its_kvm.c b/hw/intc/arm_gicv3_its_kvm.c index 68a6144add8..3d9150a5c29 100644 --- a/hw/intc/arm_gicv3_its_kvm.c +++ b/hw/intc/arm_gicv3_its_kvm.c @@ -237,7 +237,6 @@ static void kvm_arm_its_reset_hold(Object *obj, ResetType type) static const Property kvm_arm_its_props[] = { DEFINE_PROP_LINK("parent-gicv3", GICv3ITSState, gicv3, "kvm-arm-gicv3", GICv3State *), - DEFINE_PROP_END_OF_LIST(), }; static void kvm_arm_its_class_init(ObjectClass *klass, void *data) diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c index 6e2803b1234..a30f31833a9 100644 --- a/hw/intc/armv7m_nvic.c +++ b/hw/intc/armv7m_nvic.c @@ -2577,7 +2577,6 @@ static const Property props_nvic[] = { * to use a reasonable default. */ DEFINE_PROP_UINT8("num-prio-bits", NVICState, num_prio_bits, 0), - DEFINE_PROP_END_OF_LIST() }; static void armv7m_nvic_reset(DeviceState *dev) diff --git a/hw/intc/exynos4210_combiner.c b/hw/intc/exynos4210_combiner.c index 221dfa912a3..6ddbcd4c6df 100644 --- a/hw/intc/exynos4210_combiner.c +++ b/hw/intc/exynos4210_combiner.c @@ -327,7 +327,6 @@ static void exynos4210_combiner_init(Object *obj) static const Property exynos4210_combiner_properties[] = { DEFINE_PROP_UINT32("external", Exynos4210CombinerState, external, 0), - DEFINE_PROP_END_OF_LIST(), }; static void exynos4210_combiner_class_init(ObjectClass *klass, void *data) diff --git a/hw/intc/exynos4210_gic.c b/hw/intc/exynos4210_gic.c index e1b956d990c..01a53936d3a 100644 --- a/hw/intc/exynos4210_gic.c +++ b/hw/intc/exynos4210_gic.c @@ -113,7 +113,6 @@ static void exynos4210_gic_realize(DeviceState *dev, Error **errp) static const Property exynos4210_gic_properties[] = { DEFINE_PROP_UINT32("num-cpu", Exynos4210GicState, num_cpu, 1), - DEFINE_PROP_END_OF_LIST(), }; static void exynos4210_gic_class_init(ObjectClass *klass, void *data) diff --git a/hw/intc/goldfish_pic.c b/hw/intc/goldfish_pic.c index f5343c9d2f8..aa5162c18fd 100644 --- a/hw/intc/goldfish_pic.c +++ b/hw/intc/goldfish_pic.c @@ -183,7 +183,6 @@ static void goldfish_pic_instance_init(Object *obj) static const Property goldfish_pic_properties[] = { DEFINE_PROP_UINT8("index", GoldfishPICState, idx, 0), - DEFINE_PROP_END_OF_LIST(), }; static void goldfish_pic_class_init(ObjectClass *oc, void *data) diff --git a/hw/intc/grlib_irqmp.c b/hw/intc/grlib_irqmp.c index bf53251ea25..95cdb411d2c 100644 --- a/hw/intc/grlib_irqmp.c +++ b/hw/intc/grlib_irqmp.c @@ -378,7 +378,6 @@ static void grlib_irqmp_realize(DeviceState *dev, Error **errp) static const Property grlib_irqmp_properties[] = { DEFINE_PROP_UINT32("ncpus", IRQMP, ncpus, 1), - DEFINE_PROP_END_OF_LIST(), }; static void grlib_irqmp_class_init(ObjectClass *klass, void *data) diff --git a/hw/intc/i8259_common.c b/hw/intc/i8259_common.c index c3174f4fdc5..c77ff683bb8 100644 --- a/hw/intc/i8259_common.c +++ b/hw/intc/i8259_common.c @@ -198,7 +198,6 @@ static const Property pic_properties_common[] = { DEFINE_PROP_UINT32("elcr_addr", PICCommonState, elcr_addr, -1), DEFINE_PROP_UINT8("elcr_mask", PICCommonState, elcr_mask, -1), DEFINE_PROP_BIT("master", PICCommonState, master, 0, false), - DEFINE_PROP_END_OF_LIST(), }; static void pic_common_class_init(ObjectClass *klass, void *data) diff --git a/hw/intc/ioapic.c b/hw/intc/ioapic.c index 6d566165b02..bfc8cb7ece0 100644 --- a/hw/intc/ioapic.c +++ b/hw/intc/ioapic.c @@ -478,7 +478,6 @@ static void ioapic_unrealize(DeviceState *dev) static const Property ioapic_properties[] = { DEFINE_PROP_UINT8("version", IOAPICCommonState, version, IOAPIC_VER_DEF), - DEFINE_PROP_END_OF_LIST(), }; static void ioapic_class_init(ObjectClass *klass, void *data) diff --git a/hw/intc/loongarch_extioi.c b/hw/intc/loongarch_extioi.c index dd91f893612..be7d3997fd2 100644 --- a/hw/intc/loongarch_extioi.c +++ b/hw/intc/loongarch_extioi.c @@ -427,7 +427,6 @@ static const Property extioi_properties[] = { DEFINE_PROP_UINT32("num-cpu", LoongArchExtIOI, num_cpu, 1), DEFINE_PROP_BIT("has-virtualization-extension", LoongArchExtIOI, features, EXTIOI_HAS_VIRT_EXTENSION, 0), - DEFINE_PROP_END_OF_LIST(), }; static void loongarch_extioi_class_init(ObjectClass *klass, void *data) diff --git a/hw/intc/loongarch_pch_msi.c b/hw/intc/loongarch_pch_msi.c index e2eca306606..66b5c1e660e 100644 --- a/hw/intc/loongarch_pch_msi.c +++ b/hw/intc/loongarch_pch_msi.c @@ -86,7 +86,6 @@ static void loongarch_pch_msi_init(Object *obj) static const Property loongarch_msi_properties[] = { DEFINE_PROP_UINT32("msi_irq_base", LoongArchPCHMSI, irq_base, 0), DEFINE_PROP_UINT32("msi_irq_num", LoongArchPCHMSI, irq_num, 0), - DEFINE_PROP_END_OF_LIST(), }; static void loongarch_pch_msi_class_init(ObjectClass *klass, void *data) diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c index 6a87b1aab73..dc93c90b3c7 100644 --- a/hw/intc/loongarch_pch_pic.c +++ b/hw/intc/loongarch_pch_pic.c @@ -413,7 +413,6 @@ static void loongarch_pch_pic_init(Object *obj) static const Property loongarch_pch_pic_properties[] = { DEFINE_PROP_UINT32("pch_pic_irq_num", LoongArchPCHPIC, irq_num, 0), - DEFINE_PROP_END_OF_LIST(), }; static const VMStateDescription vmstate_loongarch_pch_pic = { diff --git a/hw/intc/loongson_ipi_common.c b/hw/intc/loongson_ipi_common.c index d3f894a5bd3..9a081565f51 100644 --- a/hw/intc/loongson_ipi_common.c +++ b/hw/intc/loongson_ipi_common.c @@ -317,7 +317,6 @@ static const VMStateDescription vmstate_loongson_ipi_common = { static const Property ipi_common_properties[] = { DEFINE_PROP_UINT32("num-cpu", LoongsonIPICommonState, num_cpu, 1), - DEFINE_PROP_END_OF_LIST(), }; static void loongson_ipi_common_class_init(ObjectClass *klass, void *data) diff --git a/hw/intc/m68k_irqc.c b/hw/intc/m68k_irqc.c index b5d10ab1f66..a82b80f5c6f 100644 --- a/hw/intc/m68k_irqc.c +++ b/hw/intc/m68k_irqc.c @@ -88,7 +88,6 @@ static const VMStateDescription vmstate_m68k_irqc = { static const Property m68k_irqc_properties[] = { DEFINE_PROP_LINK("m68k-cpu", M68KIRQCState, cpu, TYPE_M68K_CPU, ArchCPU *), - DEFINE_PROP_END_OF_LIST(), }; static void m68k_irqc_class_init(ObjectClass *oc, void *data) diff --git a/hw/intc/mips_gic.c b/hw/intc/mips_gic.c index 996db095c38..3f50eac38a1 100644 --- a/hw/intc/mips_gic.c +++ b/hw/intc/mips_gic.c @@ -441,7 +441,6 @@ static void mips_gic_realize(DeviceState *dev, Error **errp) static const Property mips_gic_properties[] = { DEFINE_PROP_UINT32("num-vp", MIPSGICState, num_vps, 1), DEFINE_PROP_UINT32("num-irq", MIPSGICState, num_irq, 256), - DEFINE_PROP_END_OF_LIST(), }; static void mips_gic_class_init(ObjectClass *klass, void *data) diff --git a/hw/intc/omap_intc.c b/hw/intc/omap_intc.c index 28606f102b4..095a3d504f4 100644 --- a/hw/intc/omap_intc.c +++ b/hw/intc/omap_intc.c @@ -377,7 +377,6 @@ void omap_intc_set_fclk(OMAPIntcState *intc, omap_clk clk) static const Property omap_intc_properties[] = { DEFINE_PROP_UINT32("size", OMAPIntcState, size, 0x100), - DEFINE_PROP_END_OF_LIST(), }; static void omap_intc_class_init(ObjectClass *klass, void *data) diff --git a/hw/intc/ompic.c b/hw/intc/ompic.c index 8ee1bd64bd1..42af4567c66 100644 --- a/hw/intc/ompic.c +++ b/hw/intc/ompic.c @@ -130,7 +130,6 @@ static void or1k_ompic_realize(DeviceState *dev, Error **errp) static const Property or1k_ompic_properties[] = { DEFINE_PROP_UINT32("num-cpus", OR1KOMPICState, num_cpus, 1), - DEFINE_PROP_END_OF_LIST(), }; static const VMStateDescription vmstate_or1k_ompic_cpu = { diff --git a/hw/intc/openpic.c b/hw/intc/openpic.c index 2257ae2ee78..78a82d0d30a 100644 --- a/hw/intc/openpic.c +++ b/hw/intc/openpic.c @@ -1609,7 +1609,6 @@ static void openpic_realize(DeviceState *dev, Error **errp) static const Property openpic_properties[] = { DEFINE_PROP_UINT32("model", OpenPICState, model, OPENPIC_MODEL_FSL_MPIC_20), DEFINE_PROP_UINT32("nb_cpus", OpenPICState, nb_cpus, 1), - DEFINE_PROP_END_OF_LIST(), }; static void openpic_class_init(ObjectClass *oc, void *data) diff --git a/hw/intc/openpic_kvm.c b/hw/intc/openpic_kvm.c index 135fe8301af..3f5d7e58860 100644 --- a/hw/intc/openpic_kvm.c +++ b/hw/intc/openpic_kvm.c @@ -265,7 +265,6 @@ int kvm_openpic_connect_vcpu(DeviceState *d, CPUState *cs) static const Property kvm_openpic_properties[] = { DEFINE_PROP_UINT32("model", KVMOpenPICState, model, OPENPIC_MODEL_FSL_MPIC_20), - DEFINE_PROP_END_OF_LIST(), }; static void kvm_openpic_class_init(ObjectClass *oc, void *data) diff --git a/hw/intc/pnv_xive.c b/hw/intc/pnv_xive.c index 581659839b2..fc5b5a97892 100644 --- a/hw/intc/pnv_xive.c +++ b/hw/intc/pnv_xive.c @@ -2066,7 +2066,6 @@ static const Property pnv_xive_properties[] = { DEFINE_PROP_UINT64("tm-bar", PnvXive, tm_base, 0), /* The PnvChip id identifies the XIVE interrupt controller. */ DEFINE_PROP_LINK("chip", PnvXive, chip, TYPE_PNV_CHIP, PnvChip *), - DEFINE_PROP_END_OF_LIST(), }; static void pnv_xive_class_init(ObjectClass *klass, void *data) diff --git a/hw/intc/pnv_xive2.c b/hw/intc/pnv_xive2.c index 5dd305453ae..ff36d4d03f9 100644 --- a/hw/intc/pnv_xive2.c +++ b/hw/intc/pnv_xive2.c @@ -2366,7 +2366,6 @@ static const Property pnv_xive2_properties[] = { DEFINE_PROP_UINT64("config", PnvXive2, config, PNV_XIVE2_CONFIGURATION), DEFINE_PROP_LINK("chip", PnvXive2, chip, TYPE_PNV_CHIP, PnvChip *), - DEFINE_PROP_END_OF_LIST(), }; static void pnv_xive2_instance_init(Object *obj) diff --git a/hw/intc/ppc-uic.c b/hw/intc/ppc-uic.c index d683413a83e..7de4bf9885c 100644 --- a/hw/intc/ppc-uic.c +++ b/hw/intc/ppc-uic.c @@ -262,7 +262,6 @@ static void ppc_uic_realize(DeviceState *dev, Error **errp) static const Property ppc_uic_properties[] = { DEFINE_PROP_UINT32("dcr-base", PPCUIC, dcr_base, 0xc0), DEFINE_PROP_BOOL("use-vectors", PPCUIC, use_vectors, true), - DEFINE_PROP_END_OF_LIST() }; static const VMStateDescription ppc_uic_vmstate = { diff --git a/hw/intc/riscv_aclint.c b/hw/intc/riscv_aclint.c index db195fb1ff1..db374a7c2d2 100644 --- a/hw/intc/riscv_aclint.c +++ b/hw/intc/riscv_aclint.c @@ -274,7 +274,6 @@ static const Property riscv_aclint_mtimer_properties[] = { aperture_size, RISCV_ACLINT_DEFAULT_MTIMER_SIZE), DEFINE_PROP_UINT32("timebase-freq", RISCVAclintMTimerState, timebase_freq, 0), - DEFINE_PROP_END_OF_LIST(), }; static void riscv_aclint_mtimer_realize(DeviceState *dev, Error **errp) @@ -466,7 +465,6 @@ static const Property riscv_aclint_swi_properties[] = { DEFINE_PROP_UINT32("hartid-base", RISCVAclintSwiState, hartid_base, 0), DEFINE_PROP_UINT32("num-harts", RISCVAclintSwiState, num_harts, 1), DEFINE_PROP_UINT32("sswi", RISCVAclintSwiState, sswi, false), - DEFINE_PROP_END_OF_LIST(), }; static void riscv_aclint_swi_realize(DeviceState *dev, Error **errp) diff --git a/hw/intc/riscv_aplic.c b/hw/intc/riscv_aplic.c index 353eec81360..e160816d265 100644 --- a/hw/intc/riscv_aplic.c +++ b/hw/intc/riscv_aplic.c @@ -912,7 +912,6 @@ static const Property riscv_aplic_properties[] = { DEFINE_PROP_UINT32("num-irqs", RISCVAPLICState, num_irqs, 0), DEFINE_PROP_BOOL("msimode", RISCVAPLICState, msimode, 0), DEFINE_PROP_BOOL("mmode", RISCVAPLICState, mmode, 0), - DEFINE_PROP_END_OF_LIST(), }; static const VMStateDescription vmstate_riscv_aplic = { diff --git a/hw/intc/riscv_imsic.c b/hw/intc/riscv_imsic.c index adc36151b4c..64b0da6d20a 100644 --- a/hw/intc/riscv_imsic.c +++ b/hw/intc/riscv_imsic.c @@ -393,7 +393,6 @@ static const Property riscv_imsic_properties[] = { DEFINE_PROP_UINT32("hartid", RISCVIMSICState, hartid, 0), DEFINE_PROP_UINT32("num-pages", RISCVIMSICState, num_pages, 0), DEFINE_PROP_UINT32("num-irqs", RISCVIMSICState, num_irqs, 0), - DEFINE_PROP_END_OF_LIST(), }; static const VMStateDescription vmstate_riscv_imsic = { diff --git a/hw/intc/rx_icu.c b/hw/intc/rx_icu.c index dfe11ade200..ca13c5fb37b 100644 --- a/hw/intc/rx_icu.c +++ b/hw/intc/rx_icu.c @@ -366,7 +366,6 @@ static const Property rxicu_properties[] = { qdev_prop_uint8, uint8_t), DEFINE_PROP_ARRAY("trigger-level", RXICUState, nr_sense, init_sense, qdev_prop_uint8, uint8_t), - DEFINE_PROP_END_OF_LIST(), }; static void rxicu_class_init(ObjectClass *klass, void *data) diff --git a/hw/intc/s390_flic.c b/hw/intc/s390_flic.c index 2963bd5bd68..3f3fa939d37 100644 --- a/hw/intc/s390_flic.c +++ b/hw/intc/s390_flic.c @@ -448,7 +448,6 @@ static void qemu_s390_flic_instance_init(Object *obj) static const Property qemu_s390_flic_properties[] = { DEFINE_PROP_BOOL("migrate-all-state", QEMUS390FLICState, migrate_all_state, true), - DEFINE_PROP_END_OF_LIST(), }; static void qemu_s390_flic_class_init(ObjectClass *oc, void *data) @@ -476,7 +475,6 @@ static const Property s390_flic_common_properties[] = { adapter_routes_max_batch, ADAPTER_ROUTES_MAX_GSI), DEFINE_PROP_BOOL("migration-enabled", S390FLICState, migration_enabled, true), - DEFINE_PROP_END_OF_LIST(), }; static void s390_flic_common_realize(DeviceState *dev, Error **errp) diff --git a/hw/intc/sifive_plic.c b/hw/intc/sifive_plic.c index 49895be803d..52946fb7bd9 100644 --- a/hw/intc/sifive_plic.c +++ b/hw/intc/sifive_plic.c @@ -444,7 +444,6 @@ static const Property sifive_plic_properties[] = { DEFINE_PROP_UINT32("context-base", SiFivePLICState, context_base, 0), DEFINE_PROP_UINT32("context-stride", SiFivePLICState, context_stride, 0), DEFINE_PROP_UINT32("aperture-size", SiFivePLICState, aperture_size, 0), - DEFINE_PROP_END_OF_LIST(), }; static void sifive_plic_class_init(ObjectClass *klass, void *data) diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c index 09f643d633a..897029a65a2 100644 --- a/hw/intc/spapr_xive.c +++ b/hw/intc/spapr_xive.c @@ -633,7 +633,6 @@ static const Property spapr_xive_properties[] = { DEFINE_PROP_UINT64("vc-base", SpaprXive, vc_base, SPAPR_XIVE_VC_BASE), DEFINE_PROP_UINT64("tm-base", SpaprXive, tm_base, SPAPR_XIVE_TM_BASE), DEFINE_PROP_UINT8("hv-prio", SpaprXive, hv_prio, 7), - DEFINE_PROP_END_OF_LIST(), }; static int spapr_xive_cpu_intc_create(SpaprInterruptController *intc, diff --git a/hw/intc/xics.c b/hw/intc/xics.c index 81bbfdd84b2..8852b68f876 100644 --- a/hw/intc/xics.c +++ b/hw/intc/xics.c @@ -348,7 +348,6 @@ static const Property icp_properties[] = { DEFINE_PROP_LINK(ICP_PROP_XICS, ICPState, xics, TYPE_XICS_FABRIC, XICSFabric *), DEFINE_PROP_LINK(ICP_PROP_CPU, ICPState, cs, TYPE_CPU, CPUState *), - DEFINE_PROP_END_OF_LIST(), }; static void icp_class_init(ObjectClass *klass, void *data) @@ -680,7 +679,6 @@ static const Property ics_properties[] = { DEFINE_PROP_UINT32("nr-irqs", ICSState, nr_irqs, 0), DEFINE_PROP_LINK(ICS_PROP_XICS, ICSState, xics, TYPE_XICS_FABRIC, XICSFabric *), - DEFINE_PROP_END_OF_LIST(), }; static void ics_class_init(ObjectClass *klass, void *data) diff --git a/hw/intc/xilinx_intc.c b/hw/intc/xilinx_intc.c index 3e860ab582a..d99cf567aeb 100644 --- a/hw/intc/xilinx_intc.c +++ b/hw/intc/xilinx_intc.c @@ -178,7 +178,6 @@ static void xilinx_intc_init(Object *obj) static const Property xilinx_intc_properties[] = { DEFINE_PROP_UINT32("kind-of-intr", XpsIntc, c_kind_of_intr, 0), - DEFINE_PROP_END_OF_LIST(), }; static void xilinx_intc_class_init(ObjectClass *klass, void *data) diff --git a/hw/intc/xive.c b/hw/intc/xive.c index 308e5743bdb..3cf8780b8a2 100644 --- a/hw/intc/xive.c +++ b/hw/intc/xive.c @@ -931,7 +931,6 @@ static const Property xive_tctx_properties[] = { DEFINE_PROP_LINK("cpu", XiveTCTX, cs, TYPE_CPU, CPUState *), DEFINE_PROP_LINK("presenter", XiveTCTX, xptr, TYPE_XIVE_PRESENTER, XivePresenter *), - DEFINE_PROP_END_OF_LIST(), }; static void xive_tctx_class_init(ObjectClass *klass, void *data) @@ -1414,7 +1413,6 @@ static const Property xive_source_properties[] = { DEFINE_PROP_UINT8("reset-pq", XiveSource, reset_pq, XIVE_ESB_OFF), DEFINE_PROP_LINK("xive", XiveSource, xive, TYPE_XIVE_NOTIFIER, XiveNotifier *), - DEFINE_PROP_END_OF_LIST(), }; static void xive_source_class_init(ObjectClass *klass, void *data) @@ -2005,7 +2003,6 @@ void xive_router_notify(XiveNotifier *xn, uint32_t lisn, bool pq_checked) static const Property xive_router_properties[] = { DEFINE_PROP_LINK("xive-fabric", XiveRouter, xfb, TYPE_XIVE_FABRIC, XiveFabric *), - DEFINE_PROP_END_OF_LIST(), }; static void xive_router_class_init(ObjectClass *klass, void *data) @@ -2175,7 +2172,6 @@ static const Property xive_end_source_properties[] = { DEFINE_PROP_UINT32("shift", XiveENDSource, esb_shift, XIVE_ESB_64K), DEFINE_PROP_LINK("xive", XiveENDSource, xrtr, TYPE_XIVE_ROUTER, XiveRouter *), - DEFINE_PROP_END_OF_LIST(), }; static void xive_end_source_class_init(ObjectClass *klass, void *data) diff --git a/hw/intc/xive2.c b/hw/intc/xive2.c index 3233d3f14e0..07a90c900fc 100644 --- a/hw/intc/xive2.c +++ b/hw/intc/xive2.c @@ -1031,7 +1031,6 @@ void xive2_router_notify(XiveNotifier *xn, uint32_t lisn, bool pq_checked) static const Property xive2_router_properties[] = { DEFINE_PROP_LINK("xive-fabric", Xive2Router, xfb, TYPE_XIVE_FABRIC, XiveFabric *), - DEFINE_PROP_END_OF_LIST(), }; static void xive2_router_class_init(ObjectClass *klass, void *data) @@ -1247,7 +1246,6 @@ static const Property xive2_end_source_properties[] = { DEFINE_PROP_UINT32("shift", Xive2EndSource, esb_shift, XIVE_ESB_64K), DEFINE_PROP_LINK("xive", Xive2EndSource, xrtr, TYPE_XIVE2_ROUTER, Xive2Router *), - DEFINE_PROP_END_OF_LIST(), }; static void xive2_end_source_class_init(ObjectClass *klass, void *data) diff --git a/hw/intc/xlnx-pmu-iomod-intc.c b/hw/intc/xlnx-pmu-iomod-intc.c index 21b9c836581..ccdab244b3a 100644 --- a/hw/intc/xlnx-pmu-iomod-intc.c +++ b/hw/intc/xlnx-pmu-iomod-intc.c @@ -478,7 +478,6 @@ static const Property xlnx_pmu_io_intc_properties[] = { DEFINE_PROP_UINT32("intc-intr-size", XlnxPMUIOIntc, cfg.intr_size, 0), DEFINE_PROP_UINT32("intc-level-edge", XlnxPMUIOIntc, cfg.level_edge, 0), DEFINE_PROP_UINT32("intc-positive", XlnxPMUIOIntc, cfg.positive, 0), - DEFINE_PROP_END_OF_LIST(), }; static void xlnx_pmu_io_intc_realize(DeviceState *dev, Error **errp) diff --git a/hw/ipack/ipack.c b/hw/ipack/ipack.c index 7ffc4ffe6fa..ed75f791832 100644 --- a/hw/ipack/ipack.c +++ b/hw/ipack/ipack.c @@ -75,7 +75,6 @@ static void ipack_device_unrealize(DeviceState *dev) static const Property ipack_device_props[] = { DEFINE_PROP_INT32("slot", IPackDevice, slot, -1), - DEFINE_PROP_END_OF_LIST() }; static void ipack_device_class_init(ObjectClass *klass, void *data) diff --git a/hw/ipmi/ipmi.c b/hw/ipmi/ipmi.c index 850b3bc4630..047bb90be9b 100644 --- a/hw/ipmi/ipmi.c +++ b/hw/ipmi/ipmi.c @@ -110,7 +110,6 @@ void ipmi_bmc_find_and_link(Object *obj, Object **bmc) static const Property ipmi_bmc_properties[] = { DEFINE_PROP_UINT8("slave_addr", IPMIBmc, slave_addr, 0x20), - DEFINE_PROP_END_OF_LIST(), }; static void bmc_class_init(ObjectClass *oc, void *data) diff --git a/hw/ipmi/ipmi_bmc_extern.c b/hw/ipmi/ipmi_bmc_extern.c index cfec1da87c6..d015500254a 100644 --- a/hw/ipmi/ipmi_bmc_extern.c +++ b/hw/ipmi/ipmi_bmc_extern.c @@ -517,7 +517,6 @@ static void ipmi_bmc_extern_finalize(Object *obj) static const Property ipmi_bmc_extern_properties[] = { DEFINE_PROP_CHR("chardev", IPMIBmcExtern, chr), - DEFINE_PROP_END_OF_LIST(), }; static void ipmi_bmc_extern_class_init(ObjectClass *oc, void *data) diff --git a/hw/ipmi/ipmi_bmc_sim.c b/hw/ipmi/ipmi_bmc_sim.c index 8a55893e89b..eb2eecd46ad 100644 --- a/hw/ipmi/ipmi_bmc_sim.c +++ b/hw/ipmi/ipmi_bmc_sim.c @@ -2203,7 +2203,6 @@ static const Property ipmi_sim_properties[] = { DEFINE_PROP_UINT32("mfg_id", IPMIBmcSim, mfg_id, 0), DEFINE_PROP_UINT16("product_id", IPMIBmcSim, product_id, 0), DEFINE_PROP_UUID_NODEFAULT("guid", IPMIBmcSim, uuid), - DEFINE_PROP_END_OF_LIST(), }; static void ipmi_sim_class_init(ObjectClass *oc, void *data) diff --git a/hw/ipmi/isa_ipmi_bt.c b/hw/ipmi/isa_ipmi_bt.c index 16062abb311..a1b66d5ee82 100644 --- a/hw/ipmi/isa_ipmi_bt.c +++ b/hw/ipmi/isa_ipmi_bt.c @@ -138,7 +138,6 @@ static void *isa_ipmi_bt_get_backend_data(IPMIInterface *ii) static const Property ipmi_isa_properties[] = { DEFINE_PROP_UINT32("ioport", ISAIPMIBTDevice, bt.io_base, 0xe4), DEFINE_PROP_INT32("irq", ISAIPMIBTDevice, isairq, 5), - DEFINE_PROP_END_OF_LIST(), }; static void isa_ipmi_bt_class_init(ObjectClass *oc, void *data) diff --git a/hw/ipmi/isa_ipmi_kcs.c b/hw/ipmi/isa_ipmi_kcs.c index 7e7a37659ef..d9ebdd5371f 100644 --- a/hw/ipmi/isa_ipmi_kcs.c +++ b/hw/ipmi/isa_ipmi_kcs.c @@ -145,7 +145,6 @@ static void *isa_ipmi_kcs_get_backend_data(IPMIInterface *ii) static const Property ipmi_isa_properties[] = { DEFINE_PROP_UINT32("ioport", ISAIPMIKCSDevice, kcs.io_base, 0xca2), DEFINE_PROP_INT32("irq", ISAIPMIKCSDevice, isairq, 5), - DEFINE_PROP_END_OF_LIST(), }; static void isa_ipmi_kcs_class_init(ObjectClass *oc, void *data) diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c index 378244aa8fc..0f94378a1d6 100644 --- a/hw/isa/lpc_ich9.c +++ b/hw/isa/lpc_ich9.c @@ -840,7 +840,6 @@ static const Property ich9_lpc_properties[] = { pm.swsmi_timer_enabled, true), DEFINE_PROP_BOOL("x-smi-periodic-timer", ICH9LPCState, pm.periodic_timer_enabled, true), - DEFINE_PROP_END_OF_LIST(), }; static void ich9_send_gpe(AcpiDeviceIf *adev, AcpiEventStatusBits ev) diff --git a/hw/isa/pc87312.c b/hw/isa/pc87312.c index 7bb2af817dc..5f5868442ab 100644 --- a/hw/isa/pc87312.c +++ b/hw/isa/pc87312.c @@ -330,7 +330,6 @@ static const VMStateDescription vmstate_pc87312 = { static const Property pc87312_properties[] = { DEFINE_PROP_UINT16("iobase", PC87312State, iobase, 0x398), DEFINE_PROP_UINT8("config", PC87312State, config, 1), - DEFINE_PROP_END_OF_LIST() }; static void pc87312_class_init(ObjectClass *klass, void *data) diff --git a/hw/isa/piix.c b/hw/isa/piix.c index 8ec9c63b8a0..eabf2567318 100644 --- a/hw/isa/piix.c +++ b/hw/isa/piix.c @@ -415,7 +415,6 @@ static const Property pci_piix_props[] = { DEFINE_PROP_BOOL("has-pit", PIIXState, has_pit, true), DEFINE_PROP_BOOL("has-usb", PIIXState, has_usb, true), DEFINE_PROP_BOOL("smm-enabled", PIIXState, smm_enabled, false), - DEFINE_PROP_END_OF_LIST(), }; static void pci_piix_class_init(ObjectClass *klass, void *data) diff --git a/hw/m68k/mcf5206.c b/hw/m68k/mcf5206.c index 45e5f746009..395c49fea76 100644 --- a/hw/m68k/mcf5206.c +++ b/hw/m68k/mcf5206.c @@ -603,7 +603,6 @@ static void mcf5206_mbar_realize(DeviceState *dev, Error **errp) static const Property mcf5206_mbar_properties[] = { DEFINE_PROP_LINK("m68k-cpu", m5206_mbar_state, cpu, TYPE_M68K_CPU, M68kCPU *), - DEFINE_PROP_END_OF_LIST(), }; static void mcf5206_mbar_class_init(ObjectClass *oc, void *data) diff --git a/hw/m68k/mcf_intc.c b/hw/m68k/mcf_intc.c index c24b0b715d6..008626f8130 100644 --- a/hw/m68k/mcf_intc.c +++ b/hw/m68k/mcf_intc.c @@ -180,7 +180,6 @@ static void mcf_intc_instance_init(Object *obj) static const Property mcf_intc_properties[] = { DEFINE_PROP_LINK("m68k-cpu", mcf_intc_state, cpu, TYPE_M68K_CPU, M68kCPU *), - DEFINE_PROP_END_OF_LIST(), }; static void mcf_intc_class_init(ObjectClass *oc, void *data) diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c index a37ce008740..e4fb5013de0 100644 --- a/hw/m68k/next-cube.c +++ b/hw/m68k/next-cube.c @@ -916,7 +916,6 @@ static void next_pc_realize(DeviceState *dev, Error **errp) */ static const Property next_pc_properties[] = { DEFINE_PROP_LINK("cpu", NeXTPC, cpu, TYPE_M68K_CPU, M68kCPU *), - DEFINE_PROP_END_OF_LIST(), }; static const VMStateDescription next_rtc_vmstate = { diff --git a/hw/m68k/q800-glue.c b/hw/m68k/q800-glue.c index 0d8cb8b1cb7..168665b3829 100644 --- a/hw/m68k/q800-glue.c +++ b/hw/m68k/q800-glue.c @@ -205,7 +205,6 @@ static const VMStateDescription vmstate_glue = { */ static const Property glue_properties[] = { DEFINE_PROP_LINK("cpu", GLUEState, cpu, TYPE_M68K_CPU, M68kCPU *), - DEFINE_PROP_END_OF_LIST(), }; static void glue_finalize(Object *obj) diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c index 12205c4d320..b553c7d6469 100644 --- a/hw/mem/cxl_type3.c +++ b/hw/mem/cxl_type3.c @@ -1234,7 +1234,6 @@ static const Property ct3_props[] = { speed, PCIE_LINK_SPEED_32), DEFINE_PROP_PCIE_LINK_WIDTH("x-width", CXLType3Dev, width, PCIE_LINK_WIDTH_16), - DEFINE_PROP_END_OF_LIST(), }; static uint64_t get_lsa_size(CXLType3Dev *ct3d) diff --git a/hw/mem/nvdimm.c b/hw/mem/nvdimm.c index 10506d52e4c..51362cfe92b 100644 --- a/hw/mem/nvdimm.c +++ b/hw/mem/nvdimm.c @@ -248,7 +248,6 @@ static void nvdimm_write_label_data(NVDIMMDevice *nvdimm, const void *buf, static const Property nvdimm_properties[] = { DEFINE_PROP_BOOL(NVDIMM_UNARMED_PROP, NVDIMMDevice, unarmed, false), - DEFINE_PROP_END_OF_LIST(), }; static void nvdimm_class_init(ObjectClass *oc, void *data) diff --git a/hw/mem/pc-dimm.c b/hw/mem/pc-dimm.c index 49c5f9fd44a..dca3db7a36f 100644 --- a/hw/mem/pc-dimm.c +++ b/hw/mem/pc-dimm.c @@ -157,7 +157,6 @@ static const Property pc_dimm_properties[] = { PC_DIMM_UNASSIGNED_SLOT), DEFINE_PROP_LINK(PC_DIMM_MEMDEV_PROP, PCDIMMDevice, hostmem, TYPE_MEMORY_BACKEND, HostMemoryBackend *), - DEFINE_PROP_END_OF_LIST(), }; static void pc_dimm_get_size(Object *obj, Visitor *v, const char *name, diff --git a/hw/mem/sparse-mem.c b/hw/mem/sparse-mem.c index 8d681adfc0b..375d7286848 100644 --- a/hw/mem/sparse-mem.c +++ b/hw/mem/sparse-mem.c @@ -103,7 +103,6 @@ static const Property sparse_mem_properties[] = { DEFINE_PROP_UINT64("length", SparseMemState, length, UINT64_MAX), /* Max amount of actual memory that can be used to back the sparse memory */ DEFINE_PROP_UINT64("maxsize", SparseMemState, maxsize, 10 * MiB), - DEFINE_PROP_END_OF_LIST(), }; MemoryRegion *sparse_mem_init(uint64_t addr, uint64_t length) diff --git a/hw/mips/cps.c b/hw/mips/cps.c index 1a2208666cc..f8c17f3f2b9 100644 --- a/hw/mips/cps.c +++ b/hw/mips/cps.c @@ -171,7 +171,6 @@ static const Property mips_cps_properties[] = { DEFINE_PROP_UINT32("num-irq", MIPSCPSState, num_irq, 256), DEFINE_PROP_STRING("cpu-type", MIPSCPSState, cpu_type), DEFINE_PROP_BOOL("cpu-big-endian", MIPSCPSState, cpu_is_bigendian, false), - DEFINE_PROP_END_OF_LIST() }; static void mips_cps_class_init(ObjectClass *klass, void *data) diff --git a/hw/misc/a9scu.c b/hw/misc/a9scu.c index e2d73edde88..088d4adb0d5 100644 --- a/hw/misc/a9scu.c +++ b/hw/misc/a9scu.c @@ -125,7 +125,6 @@ static const VMStateDescription vmstate_a9_scu = { static const Property a9_scu_properties[] = { DEFINE_PROP_UINT32("num-cpu", A9SCUState, num_cpu, 1), - DEFINE_PROP_END_OF_LIST(), }; static void a9_scu_class_init(ObjectClass *klass, void *data) diff --git a/hw/misc/allwinner-h3-dramc.c b/hw/misc/allwinner-h3-dramc.c index 247bf62c43c..13bba26d0e4 100644 --- a/hw/misc/allwinner-h3-dramc.c +++ b/hw/misc/allwinner-h3-dramc.c @@ -317,7 +317,6 @@ static void allwinner_h3_dramc_init(Object *obj) static const Property allwinner_h3_dramc_properties[] = { DEFINE_PROP_UINT64("ram-addr", AwH3DramCtlState, ram_addr, 0x0), DEFINE_PROP_UINT32("ram-size", AwH3DramCtlState, ram_size, 256 * MiB), - DEFINE_PROP_END_OF_LIST() }; static const VMStateDescription allwinner_h3_dramc_vmstate = { diff --git a/hw/misc/allwinner-r40-dramc.c b/hw/misc/allwinner-r40-dramc.c index a51284ff91f..97c3664e3a3 100644 --- a/hw/misc/allwinner-r40-dramc.c +++ b/hw/misc/allwinner-r40-dramc.c @@ -467,7 +467,6 @@ static void allwinner_r40_dramc_init(Object *obj) static const Property allwinner_r40_dramc_properties[] = { DEFINE_PROP_UINT64("ram-addr", AwR40DramCtlState, ram_addr, 0x0), DEFINE_PROP_UINT32("ram-size", AwR40DramCtlState, ram_size, 256), /* MiB */ - DEFINE_PROP_END_OF_LIST() }; static const VMStateDescription allwinner_r40_dramc_vmstate = { diff --git a/hw/misc/allwinner-sid.c b/hw/misc/allwinner-sid.c index 3a09dca1119..042b747f30b 100644 --- a/hw/misc/allwinner-sid.c +++ b/hw/misc/allwinner-sid.c @@ -129,7 +129,6 @@ static void allwinner_sid_init(Object *obj) static const Property allwinner_sid_properties[] = { DEFINE_PROP_UUID_NODEFAULT("identifier", AwSidState, identifier), - DEFINE_PROP_END_OF_LIST() }; static const VMStateDescription allwinner_sid_vmstate = { diff --git a/hw/misc/applesmc.c b/hw/misc/applesmc.c index 9d0e273e336..97ea842d60c 100644 --- a/hw/misc/applesmc.c +++ b/hw/misc/applesmc.c @@ -354,7 +354,6 @@ static const Property applesmc_isa_properties[] = { DEFINE_PROP_UINT32(APPLESMC_PROP_IO_BASE, AppleSMCState, iobase, APPLESMC_DEFAULT_IOBASE), DEFINE_PROP_STRING("osk", AppleSMCState, osk), - DEFINE_PROP_END_OF_LIST(), }; static void build_applesmc_aml(AcpiDevAmlIf *adev, Aml *scope) diff --git a/hw/misc/arm11scu.c b/hw/misc/arm11scu.c index 37feed9da73..02493cec31b 100644 --- a/hw/misc/arm11scu.c +++ b/hw/misc/arm11scu.c @@ -77,7 +77,6 @@ static void arm11_scu_init(Object *obj) static const Property arm11_scu_properties[] = { DEFINE_PROP_UINT32("num-cpu", ARM11SCUState, num_cpu, 1), - DEFINE_PROP_END_OF_LIST() }; static void arm11_scu_class_init(ObjectClass *oc, void *data) diff --git a/hw/misc/arm_l2x0.c b/hw/misc/arm_l2x0.c index 9c209f13b03..39b4642da7d 100644 --- a/hw/misc/arm_l2x0.c +++ b/hw/misc/arm_l2x0.c @@ -175,7 +175,6 @@ static void l2x0_priv_init(Object *obj) static const Property l2x0_properties[] = { DEFINE_PROP_UINT32("cache-type", L2x0State, cache_type, 0x1c100100), - DEFINE_PROP_END_OF_LIST(), }; static void l2x0_class_init(ObjectClass *klass, void *data) diff --git a/hw/misc/arm_sysctl.c b/hw/misc/arm_sysctl.c index 69e379fa107..1c25d51b968 100644 --- a/hw/misc/arm_sysctl.c +++ b/hw/misc/arm_sysctl.c @@ -632,7 +632,6 @@ static const Property arm_sysctl_properties[] = { /* Daughterboard clock reset values (as reported via SYS_CFG) */ DEFINE_PROP_ARRAY("db-clock", arm_sysctl_state, db_num_clocks, db_clock_reset, qdev_prop_uint32, uint32_t), - DEFINE_PROP_END_OF_LIST(), }; static void arm_sysctl_class_init(ObjectClass *klass, void *data) diff --git a/hw/misc/armsse-cpuid.c b/hw/misc/armsse-cpuid.c index b05bcdcabc4..58cb37333f0 100644 --- a/hw/misc/armsse-cpuid.c +++ b/hw/misc/armsse-cpuid.c @@ -94,7 +94,6 @@ static const MemoryRegionOps armsse_cpuid_ops = { static const Property armsse_cpuid_props[] = { DEFINE_PROP_UINT32("CPUID", ARMSSECPUID, cpuid, 0), - DEFINE_PROP_END_OF_LIST() }; static void armsse_cpuid_init(Object *obj) diff --git a/hw/misc/aspeed_hace.c b/hw/misc/aspeed_hace.c index 5cefbadf9a0..e3f7df2e862 100644 --- a/hw/misc/aspeed_hace.c +++ b/hw/misc/aspeed_hace.c @@ -439,7 +439,6 @@ static void aspeed_hace_realize(DeviceState *dev, Error **errp) static const Property aspeed_hace_properties[] = { DEFINE_PROP_LINK("dram", AspeedHACEState, dram_mr, TYPE_MEMORY_REGION, MemoryRegion *), - DEFINE_PROP_END_OF_LIST(), }; diff --git a/hw/misc/aspeed_i3c.c b/hw/misc/aspeed_i3c.c index 7f5a3898644..ab39c6435b5 100644 --- a/hw/misc/aspeed_i3c.c +++ b/hw/misc/aspeed_i3c.c @@ -325,7 +325,6 @@ static void aspeed_i3c_realize(DeviceState *dev, Error **errp) static const Property aspeed_i3c_device_properties[] = { DEFINE_PROP_UINT8("device-id", AspeedI3CDevice, id, 0), - DEFINE_PROP_END_OF_LIST(), }; static void aspeed_i3c_device_class_init(ObjectClass *klass, void *data) diff --git a/hw/misc/aspeed_lpc.c b/hw/misc/aspeed_lpc.c index bb9066b0f07..228d250dc03 100644 --- a/hw/misc/aspeed_lpc.c +++ b/hw/misc/aspeed_lpc.c @@ -456,7 +456,6 @@ static const VMStateDescription vmstate_aspeed_lpc = { static const Property aspeed_lpc_properties[] = { DEFINE_PROP_UINT32("hicr7", AspeedLPCState, hicr7, 0), - DEFINE_PROP_END_OF_LIST(), }; static void aspeed_lpc_class_init(ObjectClass *klass, void *data) diff --git a/hw/misc/aspeed_sbc.c b/hw/misc/aspeed_sbc.c index b97cf51fa19..e4a6bd15818 100644 --- a/hw/misc/aspeed_sbc.c +++ b/hw/misc/aspeed_sbc.c @@ -139,7 +139,6 @@ static const VMStateDescription vmstate_aspeed_sbc = { static const Property aspeed_sbc_properties[] = { DEFINE_PROP_BOOL("emmc-abr", AspeedSBCState, emmc_abr, 0), DEFINE_PROP_UINT32("signing-settings", AspeedSBCState, signing_settings, 0), - DEFINE_PROP_END_OF_LIST(), }; static void aspeed_sbc_class_init(ObjectClass *klass, void *data) diff --git a/hw/misc/aspeed_scu.c b/hw/misc/aspeed_scu.c index ac33b8d6cbd..bac1441b061 100644 --- a/hw/misc/aspeed_scu.c +++ b/hw/misc/aspeed_scu.c @@ -607,7 +607,6 @@ static const Property aspeed_scu_properties[] = { DEFINE_PROP_UINT32("hw-strap1", AspeedSCUState, hw_strap1, 0), DEFINE_PROP_UINT32("hw-strap2", AspeedSCUState, hw_strap2, 0), DEFINE_PROP_UINT32("hw-prot-key", AspeedSCUState, hw_prot_key, 0), - DEFINE_PROP_END_OF_LIST(), }; static void aspeed_scu_class_init(ObjectClass *klass, void *data) diff --git a/hw/misc/aspeed_sdmc.c b/hw/misc/aspeed_sdmc.c index 4980080f741..f359640a9a5 100644 --- a/hw/misc/aspeed_sdmc.c +++ b/hw/misc/aspeed_sdmc.c @@ -297,7 +297,6 @@ static const VMStateDescription vmstate_aspeed_sdmc = { static const Property aspeed_sdmc_properties[] = { DEFINE_PROP_UINT64("max-ram-size", AspeedSDMCState, max_ram_size, 0), DEFINE_PROP_BOOL("unlocked", AspeedSDMCState, unlocked, false), - DEFINE_PROP_END_OF_LIST(), }; static void aspeed_sdmc_class_init(ObjectClass *klass, void *data) diff --git a/hw/misc/bcm2835_cprman.c b/hw/misc/bcm2835_cprman.c index 1a20cd0bc8a..aa14cd931f5 100644 --- a/hw/misc/bcm2835_cprman.c +++ b/hw/misc/bcm2835_cprman.c @@ -780,7 +780,6 @@ static const VMStateDescription cprman_vmstate = { static const Property cprman_properties[] = { DEFINE_PROP_UINT32("xosc-freq-hz", BCM2835CprmanState, xosc_freq, 19200000), - DEFINE_PROP_END_OF_LIST() }; static void cprman_class_init(ObjectClass *klass, void *data) diff --git a/hw/misc/bcm2835_property.c b/hw/misc/bcm2835_property.c index 09a6f2c6e3e..fde66cd590d 100644 --- a/hw/misc/bcm2835_property.c +++ b/hw/misc/bcm2835_property.c @@ -554,7 +554,6 @@ static void bcm2835_property_realize(DeviceState *dev, Error **errp) static const Property bcm2835_property_props[] = { DEFINE_PROP_UINT32("board-rev", BCM2835PropertyState, board_rev, 0), DEFINE_PROP_STRING("command-line", BCM2835PropertyState, command_line), - DEFINE_PROP_END_OF_LIST() }; static void bcm2835_property_class_init(ObjectClass *klass, void *data) diff --git a/hw/misc/debugexit.c b/hw/misc/debugexit.c index 639a8cc3e3e..260537bba3c 100644 --- a/hw/misc/debugexit.c +++ b/hw/misc/debugexit.c @@ -59,7 +59,6 @@ static void debug_exit_realizefn(DeviceState *d, Error **errp) static const Property debug_exit_properties[] = { DEFINE_PROP_UINT32("iobase", ISADebugExitState, iobase, 0x501), DEFINE_PROP_UINT32("iosize", ISADebugExitState, iosize, 0x02), - DEFINE_PROP_END_OF_LIST(), }; static void debug_exit_class_initfn(ObjectClass *klass, void *data) diff --git a/hw/misc/eccmemctl.c b/hw/misc/eccmemctl.c index 4fc88bd4e57..d7452c4cc8a 100644 --- a/hw/misc/eccmemctl.c +++ b/hw/misc/eccmemctl.c @@ -327,7 +327,6 @@ static void ecc_realize(DeviceState *dev, Error **errp) static const Property ecc_properties[] = { DEFINE_PROP_UINT32("version", ECCState, version, -1), - DEFINE_PROP_END_OF_LIST(), }; static void ecc_class_init(ObjectClass *klass, void *data) diff --git a/hw/misc/empty_slot.c b/hw/misc/empty_slot.c index 79572c5be03..221ea7cb54d 100644 --- a/hw/misc/empty_slot.c +++ b/hw/misc/empty_slot.c @@ -82,7 +82,6 @@ static void empty_slot_realize(DeviceState *dev, Error **errp) static const Property empty_slot_properties[] = { DEFINE_PROP_UINT64("size", EmptySlot, size, 0), DEFINE_PROP_STRING("name", EmptySlot, name), - DEFINE_PROP_END_OF_LIST(), }; static void empty_slot_class_init(ObjectClass *klass, void *data) diff --git a/hw/misc/iotkit-secctl.c b/hw/misc/iotkit-secctl.c index abb6a963cae..04ced3559c2 100644 --- a/hw/misc/iotkit-secctl.c +++ b/hw/misc/iotkit-secctl.c @@ -816,7 +816,6 @@ static const VMStateDescription iotkit_secctl_vmstate = { static const Property iotkit_secctl_props[] = { DEFINE_PROP_UINT32("sse-version", IoTKitSecCtl, sse_version, 0), - DEFINE_PROP_END_OF_LIST() }; static void iotkit_secctl_class_init(ObjectClass *klass, void *data) diff --git a/hw/misc/iotkit-sysctl.c b/hw/misc/iotkit-sysctl.c index 23b49d7dff3..57ffdc3d025 100644 --- a/hw/misc/iotkit-sysctl.c +++ b/hw/misc/iotkit-sysctl.c @@ -842,7 +842,6 @@ static const Property iotkit_sysctl_props[] = { 0x10000000), DEFINE_PROP_UINT32("INITSVTOR1_RST", IoTKitSysCtl, initsvtor1_rst, 0x10000000), - DEFINE_PROP_END_OF_LIST() }; static void iotkit_sysctl_class_init(ObjectClass *klass, void *data) diff --git a/hw/misc/iotkit-sysinfo.c b/hw/misc/iotkit-sysinfo.c index 7d4eea6bfbf..75260f7fabb 100644 --- a/hw/misc/iotkit-sysinfo.c +++ b/hw/misc/iotkit-sysinfo.c @@ -136,7 +136,6 @@ static const Property iotkit_sysinfo_props[] = { DEFINE_PROP_UINT32("SYS_CONFIG", IoTKitSysInfo, sys_config, 0), DEFINE_PROP_UINT32("sse-version", IoTKitSysInfo, sse_version, 0), DEFINE_PROP_UINT32("IIDR", IoTKitSysInfo, iidr, 0), - DEFINE_PROP_END_OF_LIST() }; static void iotkit_sysinfo_init(Object *obj) diff --git a/hw/misc/ivshmem.c b/hw/misc/ivshmem.c index 6d735ec29fe..8f9e1f2fc63 100644 --- a/hw/misc/ivshmem.c +++ b/hw/misc/ivshmem.c @@ -1026,7 +1026,6 @@ static const Property ivshmem_plain_properties[] = { DEFINE_PROP_ON_OFF_AUTO("master", IVShmemState, master, ON_OFF_AUTO_OFF), DEFINE_PROP_LINK("memdev", IVShmemState, hostmem, TYPE_MEMORY_BACKEND, HostMemoryBackend *), - DEFINE_PROP_END_OF_LIST(), }; static void ivshmem_plain_realize(PCIDevice *dev, Error **errp) @@ -1083,7 +1082,6 @@ static const Property ivshmem_doorbell_properties[] = { DEFINE_PROP_BIT("ioeventfd", IVShmemState, features, IVSHMEM_IOEVENTFD, true), DEFINE_PROP_ON_OFF_AUTO("master", IVShmemState, master, ON_OFF_AUTO_OFF), - DEFINE_PROP_END_OF_LIST(), }; static void ivshmem_doorbell_init(Object *obj) diff --git a/hw/misc/led.c b/hw/misc/led.c index 76efdbc3f16..9364d9945ec 100644 --- a/hw/misc/led.c +++ b/hw/misc/led.c @@ -105,7 +105,6 @@ static const Property led_properties[] = { DEFINE_PROP_STRING("color", LEDState, color), DEFINE_PROP_STRING("description", LEDState, description), DEFINE_PROP_BOOL("gpio-active-high", LEDState, gpio_active_high, true), - DEFINE_PROP_END_OF_LIST(), }; static void led_class_init(ObjectClass *klass, void *data) diff --git a/hw/misc/mac_via.c b/hw/misc/mac_via.c index a376a2b8a02..5d16bff12cb 100644 --- a/hw/misc/mac_via.c +++ b/hw/misc/mac_via.c @@ -1324,7 +1324,6 @@ static const VMStateDescription vmstate_q800_via1 = { static const Property mos6522_q800_via1_properties[] = { DEFINE_PROP_DRIVE("drive", MOS6522Q800VIA1State, blk), - DEFINE_PROP_END_OF_LIST(), }; static void mos6522_q800_via1_class_init(ObjectClass *oc, void *data) diff --git a/hw/misc/macio/cuda.c b/hw/misc/macio/cuda.c index cfc8afd1dc2..270adcb0cdc 100644 --- a/hw/misc/macio/cuda.c +++ b/hw/misc/macio/cuda.c @@ -556,7 +556,6 @@ static void cuda_init(Object *obj) static const Property cuda_properties[] = { DEFINE_PROP_UINT64("timebase-frequency", CUDAState, tb_frequency, 0), - DEFINE_PROP_END_OF_LIST() }; static void cuda_class_init(ObjectClass *oc, void *data) diff --git a/hw/misc/macio/macio.c b/hw/misc/macio/macio.c index 7e3d5aa977e..194b152effe 100644 --- a/hw/misc/macio/macio.c +++ b/hw/misc/macio/macio.c @@ -408,7 +408,6 @@ static const VMStateDescription vmstate_macio_newworld = { static const Property macio_newworld_properties[] = { DEFINE_PROP_BOOL("has-pmu", NewWorldMacIOState, has_pmu, false), DEFINE_PROP_BOOL("has-adb", NewWorldMacIOState, has_adb, false), - DEFINE_PROP_END_OF_LIST() }; static void macio_newworld_class_init(ObjectClass *oc, void *data) @@ -424,7 +423,6 @@ static void macio_newworld_class_init(ObjectClass *oc, void *data) static const Property macio_properties[] = { DEFINE_PROP_UINT64("frequency", MacIOState, frequency, 0), - DEFINE_PROP_END_OF_LIST() }; static void macio_class_init(ObjectClass *klass, void *data) diff --git a/hw/misc/macio/pmu.c b/hw/misc/macio/pmu.c index 64bf44f67f6..47ebb8e8c0f 100644 --- a/hw/misc/macio/pmu.c +++ b/hw/misc/macio/pmu.c @@ -762,7 +762,6 @@ static void pmu_init(Object *obj) static const Property pmu_properties[] = { DEFINE_PROP_BOOL("has-adb", PMUState, has_adb, true), - DEFINE_PROP_END_OF_LIST() }; static void pmu_class_init(ObjectClass *oc, void *data) diff --git a/hw/misc/mips_cmgcr.c b/hw/misc/mips_cmgcr.c index 80ca224f76c..95f19912b46 100644 --- a/hw/misc/mips_cmgcr.c +++ b/hw/misc/mips_cmgcr.c @@ -219,7 +219,6 @@ static const Property mips_gcr_properties[] = { MemoryRegion *), DEFINE_PROP_LINK("cpc", MIPSGCRState, cpc_mr, TYPE_MEMORY_REGION, MemoryRegion *), - DEFINE_PROP_END_OF_LIST(), }; static void mips_gcr_realize(DeviceState *dev, Error **errp) diff --git a/hw/misc/mips_cpc.c b/hw/misc/mips_cpc.c index 86ff0f7ad89..772b8c0017d 100644 --- a/hw/misc/mips_cpc.c +++ b/hw/misc/mips_cpc.c @@ -166,7 +166,6 @@ static const VMStateDescription vmstate_mips_cpc = { static const Property mips_cpc_properties[] = { DEFINE_PROP_UINT32("num-vp", MIPSCPCState, num_vp, 0x1), DEFINE_PROP_UINT64("vp-start-running", MIPSCPCState, vp_start_running, 0x1), - DEFINE_PROP_END_OF_LIST(), }; static void mips_cpc_class_init(ObjectClass *klass, void *data) diff --git a/hw/misc/mips_itu.c b/hw/misc/mips_itu.c index d84a7dbf152..2d126ebaf85 100644 --- a/hw/misc/mips_itu.c +++ b/hw/misc/mips_itu.c @@ -538,7 +538,6 @@ static const Property mips_itu_properties[] = { ITC_FIFO_NUM_MAX), DEFINE_PROP_UINT32("num-semaphores", MIPSITUState, num_semaphores, ITC_SEMAPH_NUM_MAX), - DEFINE_PROP_END_OF_LIST(), }; static void mips_itu_class_init(ObjectClass *klass, void *data) diff --git a/hw/misc/mos6522.c b/hw/misc/mos6522.c index 0225a5869bf..0b8f6a4cb4c 100644 --- a/hw/misc/mos6522.c +++ b/hw/misc/mos6522.c @@ -698,7 +698,6 @@ static void mos6522_finalize(Object *obj) static const Property mos6522_properties[] = { DEFINE_PROP_UINT64("frequency", MOS6522State, frequency, 0), - DEFINE_PROP_END_OF_LIST() }; static void mos6522_class_init(ObjectClass *oc, void *data) diff --git a/hw/misc/mps2-fpgaio.c b/hw/misc/mps2-fpgaio.c index 2e8d1c721c1..d07568248d6 100644 --- a/hw/misc/mps2-fpgaio.c +++ b/hw/misc/mps2-fpgaio.c @@ -326,7 +326,6 @@ static const Property mps2_fpgaio_properties[] = { DEFINE_PROP_UINT32("num-leds", MPS2FPGAIO, num_leds, 2), DEFINE_PROP_BOOL("has-switches", MPS2FPGAIO, has_switches, false), DEFINE_PROP_BOOL("has-dbgctrl", MPS2FPGAIO, has_dbgctrl, false), - DEFINE_PROP_END_OF_LIST(), }; static void mps2_fpgaio_class_init(ObjectClass *klass, void *data) diff --git a/hw/misc/mps2-scc.c b/hw/misc/mps2-scc.c index f378b755714..5f8d6bca43b 100644 --- a/hw/misc/mps2-scc.c +++ b/hw/misc/mps2-scc.c @@ -472,7 +472,6 @@ static const Property mps2_scc_properties[] = { */ DEFINE_PROP_ARRAY("oscclk", MPS2SCC, num_oscclk, oscclk_reset, qdev_prop_uint32, uint32_t), - DEFINE_PROP_END_OF_LIST(), }; static void mps2_scc_class_init(ObjectClass *klass, void *data) diff --git a/hw/misc/msf2-sysreg.c b/hw/misc/msf2-sysreg.c index 0d7a713c766..20009adbd95 100644 --- a/hw/misc/msf2-sysreg.c +++ b/hw/misc/msf2-sysreg.c @@ -122,7 +122,6 @@ static const Property msf2_sysreg_properties[] = { /* default divisors in Libero GUI */ DEFINE_PROP_UINT8("apb0divisor", MSF2SysregState, apb0div, 2), DEFINE_PROP_UINT8("apb1divisor", MSF2SysregState, apb1div, 2), - DEFINE_PROP_END_OF_LIST(), }; static void msf2_sysreg_realize(DeviceState *dev, Error **errp) diff --git a/hw/misc/npcm7xx_gcr.c b/hw/misc/npcm7xx_gcr.c index 17aeaf22cbd..07464a4dc93 100644 --- a/hw/misc/npcm7xx_gcr.c +++ b/hw/misc/npcm7xx_gcr.c @@ -232,7 +232,6 @@ static const VMStateDescription vmstate_npcm7xx_gcr = { static const Property npcm7xx_gcr_properties[] = { DEFINE_PROP_UINT32("disabled-modules", NPCM7xxGCRState, reset_mdlr, 0), DEFINE_PROP_UINT32("power-on-straps", NPCM7xxGCRState, reset_pwron, 0), - DEFINE_PROP_END_OF_LIST(), }; static void npcm7xx_gcr_class_init(ObjectClass *klass, void *data) diff --git a/hw/misc/nrf51_rng.c b/hw/misc/nrf51_rng.c index 2b550a6bcab..1e67acdf234 100644 --- a/hw/misc/nrf51_rng.c +++ b/hw/misc/nrf51_rng.c @@ -224,7 +224,6 @@ static const Property nrf51_rng_properties[] = { period_unfiltered_us, 167), DEFINE_PROP_UINT16("period_filtered_us", NRF51RNGState, period_filtered_us, 660), - DEFINE_PROP_END_OF_LIST(), }; static const VMStateDescription vmstate_rng = { diff --git a/hw/misc/pci-testdev.c b/hw/misc/pci-testdev.c index 7927397a23a..ca6a3884310 100644 --- a/hw/misc/pci-testdev.c +++ b/hw/misc/pci-testdev.c @@ -321,7 +321,6 @@ static void qdev_pci_testdev_reset(DeviceState *dev) static const Property pci_testdev_properties[] = { DEFINE_PROP_SIZE("membar", PCITestDevState, membar_size, 0), - DEFINE_PROP_END_OF_LIST(), }; static void pci_testdev_class_init(ObjectClass *klass, void *data) diff --git a/hw/misc/pvpanic-isa.c b/hw/misc/pvpanic-isa.c index 824a2e4528c..f9a3156a5c0 100644 --- a/hw/misc/pvpanic-isa.c +++ b/hw/misc/pvpanic-isa.c @@ -102,7 +102,6 @@ static const Property pvpanic_isa_properties[] = { DEFINE_PROP_UINT16(PVPANIC_IOPORT_PROP, PVPanicISAState, ioport, 0x505), DEFINE_PROP_UINT8("events", PVPanicISAState, pvpanic.events, PVPANIC_EVENTS), - DEFINE_PROP_END_OF_LIST(), }; static void pvpanic_isa_class_init(ObjectClass *klass, void *data) diff --git a/hw/misc/pvpanic-pci.c b/hw/misc/pvpanic-pci.c index 1c3eafc1377..967842359f0 100644 --- a/hw/misc/pvpanic-pci.c +++ b/hw/misc/pvpanic-pci.c @@ -56,7 +56,6 @@ static void pvpanic_pci_realizefn(PCIDevice *dev, Error **errp) static const Property pvpanic_pci_properties[] = { DEFINE_PROP_UINT8("events", PVPanicPCIState, pvpanic.events, PVPANIC_EVENTS), - DEFINE_PROP_END_OF_LIST(), }; static void pvpanic_pci_class_init(ObjectClass *klass, void *data) diff --git a/hw/misc/sifive_e_aon.c b/hw/misc/sifive_e_aon.c index c48429b1315..165e41dfc3d 100644 --- a/hw/misc/sifive_e_aon.c +++ b/hw/misc/sifive_e_aon.c @@ -292,7 +292,6 @@ static void sifive_e_aon_init(Object *obj) static const Property sifive_e_aon_properties[] = { DEFINE_PROP_UINT64("wdogclk-frequency", SiFiveEAONState, wdogclk_freq, SIFIVE_E_LFCLK_DEFAULT_FREQ), - DEFINE_PROP_END_OF_LIST(), }; static void sifive_e_aon_class_init(ObjectClass *oc, void *data) diff --git a/hw/misc/sifive_u_otp.c b/hw/misc/sifive_u_otp.c index 32cd8e8dfbd..955134af0d0 100644 --- a/hw/misc/sifive_u_otp.c +++ b/hw/misc/sifive_u_otp.c @@ -197,7 +197,6 @@ static const MemoryRegionOps sifive_u_otp_ops = { static const Property sifive_u_otp_properties[] = { DEFINE_PROP_UINT32("serial", SiFiveUOTPState, serial, 0), DEFINE_PROP_DRIVE("drive", SiFiveUOTPState, blk), - DEFINE_PROP_END_OF_LIST(), }; static void sifive_u_otp_realize(DeviceState *dev, Error **errp) diff --git a/hw/misc/stm32l4x5_rcc.c b/hw/misc/stm32l4x5_rcc.c index b61241d1954..fd8466dff34 100644 --- a/hw/misc/stm32l4x5_rcc.c +++ b/hw/misc/stm32l4x5_rcc.c @@ -1433,7 +1433,6 @@ static const Property stm32l4x5_rcc_properties[] = { sai1_extclk_frequency, 0), DEFINE_PROP_UINT64("sai2_extclk_frequency", Stm32l4x5RccState, sai2_extclk_frequency, 0), - DEFINE_PROP_END_OF_LIST(), }; static void stm32l4x5_rcc_class_init(ObjectClass *klass, void *data) diff --git a/hw/misc/tz-mpc.c b/hw/misc/tz-mpc.c index b06eb9f119f..6d827d21dc2 100644 --- a/hw/misc/tz-mpc.c +++ b/hw/misc/tz-mpc.c @@ -590,7 +590,6 @@ static const VMStateDescription tz_mpc_vmstate = { static const Property tz_mpc_properties[] = { DEFINE_PROP_LINK("downstream", TZMPC, downstream, TYPE_MEMORY_REGION, MemoryRegion *), - DEFINE_PROP_END_OF_LIST(), }; static void tz_mpc_class_init(ObjectClass *klass, void *data) diff --git a/hw/misc/tz-msc.c b/hw/misc/tz-msc.c index 96413a502da..505df4e1902 100644 --- a/hw/misc/tz-msc.c +++ b/hw/misc/tz-msc.c @@ -283,7 +283,6 @@ static const Property tz_msc_properties[] = { TYPE_MEMORY_REGION, MemoryRegion *), DEFINE_PROP_LINK("idau", TZMSC, idau, TYPE_IDAU_INTERFACE, IDAUInterface *), - DEFINE_PROP_END_OF_LIST(), }; static void tz_msc_class_init(ObjectClass *klass, void *data) diff --git a/hw/misc/tz-ppc.c b/hw/misc/tz-ppc.c index 1943d8d165a..1daa54c5e69 100644 --- a/hw/misc/tz-ppc.c +++ b/hw/misc/tz-ppc.c @@ -323,7 +323,6 @@ static const Property tz_ppc_properties[] = { DEFINE_PORT(13), DEFINE_PORT(14), DEFINE_PORT(15), - DEFINE_PROP_END_OF_LIST(), }; static void tz_ppc_class_init(ObjectClass *klass, void *data) diff --git a/hw/misc/unimp.c b/hw/misc/unimp.c index 62e1153627f..257282a3a9d 100644 --- a/hw/misc/unimp.c +++ b/hw/misc/unimp.c @@ -73,7 +73,6 @@ static void unimp_realize(DeviceState *dev, Error **errp) static const Property unimp_properties[] = { DEFINE_PROP_UINT64("size", UnimplementedDeviceState, size, 0), DEFINE_PROP_STRING("name", UnimplementedDeviceState, name), - DEFINE_PROP_END_OF_LIST(), }; static void unimp_class_init(ObjectClass *klass, void *data) diff --git a/hw/misc/xlnx-versal-cframe-reg.c b/hw/misc/xlnx-versal-cframe-reg.c index 8281a9bafff..8db0f7e6589 100644 --- a/hw/misc/xlnx-versal-cframe-reg.c +++ b/hw/misc/xlnx-versal-cframe-reg.c @@ -737,7 +737,6 @@ static const Property cframe_regs_props[] = { cfg.blktype_num_frames[5], 0), DEFINE_PROP_UINT32("blktype6-frames", XlnxVersalCFrameReg, cfg.blktype_num_frames[6], 0), - DEFINE_PROP_END_OF_LIST(), }; static void cframe_bcast_reg_init(Object *obj) @@ -802,7 +801,6 @@ static const Property cframe_bcast_regs_props[] = { TYPE_XLNX_CFI_IF, XlnxCfiIf *), DEFINE_PROP_LINK("cframe14", XlnxVersalCFrameBcastReg, cfg.cframe[14], TYPE_XLNX_CFI_IF, XlnxCfiIf *), - DEFINE_PROP_END_OF_LIST(), }; static void cframe_reg_class_init(ObjectClass *klass, void *data) diff --git a/hw/misc/xlnx-versal-cfu.c b/hw/misc/xlnx-versal-cfu.c index 7cfdabdb8e1..26d06e2557d 100644 --- a/hw/misc/xlnx-versal-cfu.c +++ b/hw/misc/xlnx-versal-cfu.c @@ -457,13 +457,11 @@ static const Property cfu_props[] = { TYPE_XLNX_CFI_IF, XlnxCfiIf *), DEFINE_PROP_LINK("cframe14", XlnxVersalCFUAPB, cfg.cframe[14], TYPE_XLNX_CFI_IF, XlnxCfiIf *), - DEFINE_PROP_END_OF_LIST(), }; static const Property cfu_sfr_props[] = { DEFINE_PROP_LINK("cfu", XlnxVersalCFUSFR, cfg.cfu, TYPE_XLNX_VERSAL_CFU_APB, XlnxVersalCFUAPB *), - DEFINE_PROP_END_OF_LIST(), }; static const VMStateDescription vmstate_cfu_apb = { diff --git a/hw/misc/xlnx-versal-trng.c b/hw/misc/xlnx-versal-trng.c index 2f6af4f6800..0419f648b7a 100644 --- a/hw/misc/xlnx-versal-trng.c +++ b/hw/misc/xlnx-versal-trng.c @@ -666,8 +666,6 @@ static const Property trng_props[] = { DEFINE_PROP_UINT32("hw-version", XlnxVersalTRng, hw_version, 0x0200), DEFINE_PROP("fips-fault-events", XlnxVersalTRng, forced_faults, trng_prop_fault_events, uint32_t), - - DEFINE_PROP_END_OF_LIST(), }; static const VMStateDescription vmstate_trng = { diff --git a/hw/misc/xlnx-versal-xramc.c b/hw/misc/xlnx-versal-xramc.c index a06b9fbc05a..d1e76be027c 100644 --- a/hw/misc/xlnx-versal-xramc.c +++ b/hw/misc/xlnx-versal-xramc.c @@ -220,7 +220,6 @@ static const VMStateDescription vmstate_xram_ctrl = { static const Property xram_ctrl_properties[] = { DEFINE_PROP_UINT64("size", XlnxXramCtrl, cfg.size, 1 * MiB), - DEFINE_PROP_END_OF_LIST(), }; static void xram_ctrl_class_init(ObjectClass *klass, void *data) diff --git a/hw/misc/zynq_slcr.c b/hw/misc/zynq_slcr.c index ffa14ecb84f..f4fa3b18405 100644 --- a/hw/misc/zynq_slcr.c +++ b/hw/misc/zynq_slcr.c @@ -625,7 +625,6 @@ static const VMStateDescription vmstate_zynq_slcr = { static const Property zynq_slcr_props[] = { DEFINE_PROP_UINT8("boot-mode", ZynqSLCRState, boot_mode, 1), - DEFINE_PROP_END_OF_LIST(), }; static void zynq_slcr_class_init(ObjectClass *klass, void *data) diff --git a/hw/net/allwinner-sun8i-emac.c b/hw/net/allwinner-sun8i-emac.c index 3f03060bf57..314a28af6df 100644 --- a/hw/net/allwinner-sun8i-emac.c +++ b/hw/net/allwinner-sun8i-emac.c @@ -834,7 +834,6 @@ static const Property allwinner_sun8i_emac_properties[] = { DEFINE_PROP_UINT8("phy-addr", AwSun8iEmacState, mii_phy_addr, 0), DEFINE_PROP_LINK("dma-memory", AwSun8iEmacState, dma_mr, TYPE_MEMORY_REGION, MemoryRegion *), - DEFINE_PROP_END_OF_LIST(), }; static int allwinner_sun8i_emac_post_load(void *opaque, int version_id) diff --git a/hw/net/allwinner_emac.c b/hw/net/allwinner_emac.c index 39c10426cfe..3eb9e09dc5c 100644 --- a/hw/net/allwinner_emac.c +++ b/hw/net/allwinner_emac.c @@ -465,7 +465,6 @@ static void aw_emac_realize(DeviceState *dev, Error **errp) static const Property aw_emac_properties[] = { DEFINE_NIC_PROPERTIES(AwEmacState, conf), DEFINE_PROP_UINT8("phy-addr", AwEmacState, phy_addr, 0), - DEFINE_PROP_END_OF_LIST(), }; static const VMStateDescription vmstate_mii = { diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c index 3fce01315fe..0282bd1d7fc 100644 --- a/hw/net/cadence_gem.c +++ b/hw/net/cadence_gem.c @@ -1799,7 +1799,6 @@ static const Property gem_properties[] = { jumbo_max_len, 10240), DEFINE_PROP_LINK("dma", CadenceGEMState, dma_mr, TYPE_MEMORY_REGION, MemoryRegion *), - DEFINE_PROP_END_OF_LIST(), }; static void gem_class_init(ObjectClass *klass, void *data) diff --git a/hw/net/can/xlnx-versal-canfd.c b/hw/net/can/xlnx-versal-canfd.c index 97fa46c4b3b..dc242e92155 100644 --- a/hw/net/can/xlnx-versal-canfd.c +++ b/hw/net/can/xlnx-versal-canfd.c @@ -2052,7 +2052,6 @@ static const Property canfd_core_properties[] = { CANFD_DEFAULT_CLOCK), DEFINE_PROP_LINK("canfdbus", XlnxVersalCANFDState, canfdbus, TYPE_CAN_BUS, CanBusState *), - DEFINE_PROP_END_OF_LIST(), }; static void canfd_class_init(ObjectClass *klass, void *data) diff --git a/hw/net/can/xlnx-zynqmp-can.c b/hw/net/can/xlnx-zynqmp-can.c index 61c104c18b5..9fbdeea368f 100644 --- a/hw/net/can/xlnx-zynqmp-can.c +++ b/hw/net/can/xlnx-zynqmp-can.c @@ -1174,7 +1174,6 @@ static const Property xlnx_zynqmp_can_properties[] = { CAN_DEFAULT_CLOCK), DEFINE_PROP_LINK("canbus", XlnxZynqMPCANState, canbus, TYPE_CAN_BUS, CanBusState *), - DEFINE_PROP_END_OF_LIST(), }; static void xlnx_zynqmp_can_class_init(ObjectClass *klass, void *data) diff --git a/hw/net/dp8393x.c b/hw/net/dp8393x.c index e3ca11991b4..c80ddb12e38 100644 --- a/hw/net/dp8393x.c +++ b/hw/net/dp8393x.c @@ -937,7 +937,6 @@ static const Property dp8393x_properties[] = { TYPE_MEMORY_REGION, MemoryRegion *), DEFINE_PROP_UINT8("it_shift", dp8393xState, it_shift, 0), DEFINE_PROP_BOOL("big_endian", dp8393xState, big_endian, false), - DEFINE_PROP_END_OF_LIST(), }; static void dp8393x_class_init(ObjectClass *klass, void *data) diff --git a/hw/net/e1000.c b/hw/net/e1000.c index ef0af31751a..7348d396323 100644 --- a/hw/net/e1000.c +++ b/hw/net/e1000.c @@ -1685,7 +1685,6 @@ static const Property e1000_properties[] = { compat_flags, E1000_FLAG_TSO_BIT, true), DEFINE_PROP_BIT("init-vet", E1000State, compat_flags, E1000_FLAG_VET_BIT, true), - DEFINE_PROP_END_OF_LIST(), }; typedef struct E1000Info { diff --git a/hw/net/e1000e.c b/hw/net/e1000e.c index e2b7576f678..544a39eae96 100644 --- a/hw/net/e1000e.c +++ b/hw/net/e1000e.c @@ -672,7 +672,6 @@ static const Property e1000e_properties[] = { e1000e_prop_subsys, uint16_t), DEFINE_PROP_BOOL("init-vet", E1000EState, init_vet, true), DEFINE_PROP_BOOL("migrate-timadj", E1000EState, timadj, true), - DEFINE_PROP_END_OF_LIST(), }; static void e1000e_class_init(ObjectClass *class, void *data) diff --git a/hw/net/eepro100.c b/hw/net/eepro100.c index b8cb8d5cf10..5801cb06351 100644 --- a/hw/net/eepro100.c +++ b/hw/net/eepro100.c @@ -2060,7 +2060,6 @@ static E100PCIDeviceInfo *eepro100_get_class(EEPRO100State *s) static const Property e100_properties[] = { DEFINE_NIC_PROPERTIES(EEPRO100State, conf), - DEFINE_PROP_END_OF_LIST(), }; static void eepro100_class_init(ObjectClass *klass, void *data) diff --git a/hw/net/fsl_etsec/etsec.c b/hw/net/fsl_etsec/etsec.c index 764be2c6a25..781b9003954 100644 --- a/hw/net/fsl_etsec/etsec.c +++ b/hw/net/fsl_etsec/etsec.c @@ -416,7 +416,6 @@ static void etsec_instance_init(Object *obj) static const Property etsec_properties[] = { DEFINE_NIC_PROPERTIES(eTSEC, conf), - DEFINE_PROP_END_OF_LIST(), }; static void etsec_class_init(ObjectClass *klass, void *data) diff --git a/hw/net/ftgmac100.c b/hw/net/ftgmac100.c index 4adc7fb10c4..40a13d16677 100644 --- a/hw/net/ftgmac100.c +++ b/hw/net/ftgmac100.c @@ -1258,7 +1258,6 @@ static const Property ftgmac100_properties[] = { DEFINE_PROP_BOOL("aspeed", FTGMAC100State, aspeed, false), DEFINE_NIC_PROPERTIES(FTGMAC100State, conf), DEFINE_PROP_BOOL("dma64", FTGMAC100State, dma64, false), - DEFINE_PROP_END_OF_LIST(), }; static void ftgmac100_class_init(ObjectClass *klass, void *data) @@ -1418,7 +1417,6 @@ static const VMStateDescription vmstate_aspeed_mii = { static const Property aspeed_mii_properties[] = { DEFINE_PROP_LINK("nic", AspeedMiiState, nic, TYPE_FTGMAC100, FTGMAC100State *), - DEFINE_PROP_END_OF_LIST(), }; static void aspeed_mii_class_init(ObjectClass *klass, void *data) diff --git a/hw/net/igb.c b/hw/net/igb.c index ad0f748d822..ae973f40d6f 100644 --- a/hw/net/igb.c +++ b/hw/net/igb.c @@ -594,7 +594,6 @@ static const VMStateDescription igb_vmstate = { static const Property igb_properties[] = { DEFINE_NIC_PROPERTIES(IGBState, conf), DEFINE_PROP_BOOL("x-pcie-flr-init", IGBState, has_flr, true), - DEFINE_PROP_END_OF_LIST(), }; static void igb_class_init(ObjectClass *class, void *data) diff --git a/hw/net/imx_fec.c b/hw/net/imx_fec.c index 9b649684772..e0342d93634 100644 --- a/hw/net/imx_fec.c +++ b/hw/net/imx_fec.c @@ -1229,7 +1229,6 @@ static const Property imx_eth_properties[] = { DEFINE_PROP_BOOL("phy-connected", IMXFECState, phy_connected, true), DEFINE_PROP_LINK("phy-consumer", IMXFECState, phy_consumer, TYPE_IMX_FEC, IMXFECState *), - DEFINE_PROP_END_OF_LIST(), }; static void imx_eth_class_init(ObjectClass *klass, void *data) diff --git a/hw/net/lan9118.c b/hw/net/lan9118.c index 237e9b97d59..afee68c7db6 100644 --- a/hw/net/lan9118.c +++ b/hw/net/lan9118.c @@ -1307,7 +1307,6 @@ static void lan9118_realize(DeviceState *dev, Error **errp) static const Property lan9118_properties[] = { DEFINE_NIC_PROPERTIES(lan9118_state, conf), DEFINE_PROP_UINT32("mode_16bit", lan9118_state, mode_16bit, 0), - DEFINE_PROP_END_OF_LIST(), }; static void lan9118_class_init(ObjectClass *klass, void *data) diff --git a/hw/net/lance.c b/hw/net/lance.c index 9ed9c94cff6..a0945e1c881 100644 --- a/hw/net/lance.c +++ b/hw/net/lance.c @@ -141,7 +141,6 @@ static const Property lance_properties[] = { DEFINE_PROP_LINK("dma", SysBusPCNetState, state.dma_opaque, TYPE_DEVICE, DeviceState *), DEFINE_NIC_PROPERTIES(SysBusPCNetState, state.conf), - DEFINE_PROP_END_OF_LIST(), }; static void lance_class_init(ObjectClass *klass, void *data) diff --git a/hw/net/lasi_i82596.c b/hw/net/lasi_i82596.c index 248e3841dba..95f56311d9b 100644 --- a/hw/net/lasi_i82596.c +++ b/hw/net/lasi_i82596.c @@ -160,7 +160,6 @@ static void lasi_82596_instance_init(Object *obj) static const Property lasi_82596_properties[] = { DEFINE_NIC_PROPERTIES(SysBusI82596State, state.conf), - DEFINE_PROP_END_OF_LIST(), }; static void lasi_82596_class_init(ObjectClass *klass, void *data) diff --git a/hw/net/mcf_fec.c b/hw/net/mcf_fec.c index 55bad4c0697..d5572a81d3f 100644 --- a/hw/net/mcf_fec.c +++ b/hw/net/mcf_fec.c @@ -662,7 +662,6 @@ static void mcf_fec_instance_init(Object *obj) static const Property mcf_fec_properties[] = { DEFINE_NIC_PROPERTIES(mcf_fec_state, conf), - DEFINE_PROP_END_OF_LIST(), }; static void mcf_fec_class_init(ObjectClass *oc, void *data) diff --git a/hw/net/mipsnet.c b/hw/net/mipsnet.c index c9ef1beb7b3..8852b6f3a12 100644 --- a/hw/net/mipsnet.c +++ b/hw/net/mipsnet.c @@ -268,7 +268,6 @@ static void mipsnet_sysbus_reset(DeviceState *dev) static const Property mipsnet_properties[] = { DEFINE_NIC_PROPERTIES(MIPSnetState, conf), - DEFINE_PROP_END_OF_LIST(), }; static void mipsnet_class_init(ObjectClass *klass, void *data) diff --git a/hw/net/msf2-emac.c b/hw/net/msf2-emac.c index 8d9015f962b..80f75f19ddf 100644 --- a/hw/net/msf2-emac.c +++ b/hw/net/msf2-emac.c @@ -550,7 +550,6 @@ static const Property msf2_emac_properties[] = { DEFINE_PROP_LINK("ahb-bus", MSF2EmacState, dma_mr, TYPE_MEMORY_REGION, MemoryRegion *), DEFINE_NIC_PROPERTIES(MSF2EmacState, conf), - DEFINE_PROP_END_OF_LIST(), }; static const VMStateDescription vmstate_msf2_emac = { diff --git a/hw/net/mv88w8618_eth.c b/hw/net/mv88w8618_eth.c index ccb11512dba..a1f51f7ade0 100644 --- a/hw/net/mv88w8618_eth.c +++ b/hw/net/mv88w8618_eth.c @@ -375,7 +375,6 @@ static const Property mv88w8618_eth_properties[] = { DEFINE_NIC_PROPERTIES(mv88w8618_eth_state, conf), DEFINE_PROP_LINK("dma-memory", mv88w8618_eth_state, dma_mr, TYPE_MEMORY_REGION, MemoryRegion *), - DEFINE_PROP_END_OF_LIST(), }; static void mv88w8618_eth_class_init(ObjectClass *klass, void *data) diff --git a/hw/net/ne2000-isa.c b/hw/net/ne2000-isa.c index 1cd070d4199..c445f2a2223 100644 --- a/hw/net/ne2000-isa.c +++ b/hw/net/ne2000-isa.c @@ -83,7 +83,6 @@ static const Property ne2000_isa_properties[] = { DEFINE_PROP_UINT32("iobase", ISANE2000State, iobase, 0x300), DEFINE_PROP_UINT32("irq", ISANE2000State, isairq, 9), DEFINE_NIC_PROPERTIES(ISANE2000State, ne2000.c), - DEFINE_PROP_END_OF_LIST(), }; static void isa_ne2000_class_initfn(ObjectClass *klass, void *data) diff --git a/hw/net/ne2000-pci.c b/hw/net/ne2000-pci.c index 12fa579d228..929e9a19308 100644 --- a/hw/net/ne2000-pci.c +++ b/hw/net/ne2000-pci.c @@ -98,7 +98,6 @@ static void ne2000_instance_init(Object *obj) static const Property ne2000_properties[] = { DEFINE_NIC_PROPERTIES(PCINE2000State, ne2000.c), - DEFINE_PROP_END_OF_LIST(), }; static void ne2000_class_init(ObjectClass *klass, void *data) diff --git a/hw/net/npcm7xx_emc.c b/hw/net/npcm7xx_emc.c index f06e908d044..cc38080c7d4 100644 --- a/hw/net/npcm7xx_emc.c +++ b/hw/net/npcm7xx_emc.c @@ -847,7 +847,6 @@ static const VMStateDescription vmstate_npcm7xx_emc = { static const Property npcm7xx_emc_properties[] = { DEFINE_NIC_PROPERTIES(NPCM7xxEMCState, conf), - DEFINE_PROP_END_OF_LIST(), }; static void npcm7xx_emc_class_init(ObjectClass *klass, void *data) diff --git a/hw/net/npcm_gmac.c b/hw/net/npcm_gmac.c index 1db29307d7a..6d7f8398b65 100644 --- a/hw/net/npcm_gmac.c +++ b/hw/net/npcm_gmac.c @@ -914,7 +914,6 @@ static const VMStateDescription vmstate_npcm_gmac = { static const Property npcm_gmac_properties[] = { DEFINE_NIC_PROPERTIES(NPCMGMACState, conf), - DEFINE_PROP_END_OF_LIST(), }; static void npcm_gmac_class_init(ObjectClass *klass, void *data) diff --git a/hw/net/opencores_eth.c b/hw/net/opencores_eth.c index 003b452bc9b..54daab7b04c 100644 --- a/hw/net/opencores_eth.c +++ b/hw/net/opencores_eth.c @@ -745,7 +745,6 @@ static void qdev_open_eth_reset(DeviceState *dev) static const Property open_eth_properties[] = { DEFINE_NIC_PROPERTIES(OpenEthState, conf), - DEFINE_PROP_END_OF_LIST(), }; static void open_eth_class_init(ObjectClass *klass, void *data) diff --git a/hw/net/pcnet-pci.c b/hw/net/pcnet-pci.c index 83ba8cd9493..b8e9ff95e88 100644 --- a/hw/net/pcnet-pci.c +++ b/hw/net/pcnet-pci.c @@ -254,7 +254,6 @@ static void pcnet_instance_init(Object *obj) static const Property pcnet_properties[] = { DEFINE_NIC_PROPERTIES(PCIPCNetState, state.conf), - DEFINE_PROP_END_OF_LIST(), }; static void pcnet_class_init(ObjectClass *klass, void *data) diff --git a/hw/net/rocker/rocker.c b/hw/net/rocker/rocker.c index efc20396aa4..aa5d87fbc5a 100644 --- a/hw/net/rocker/rocker.c +++ b/hw/net/rocker/rocker.c @@ -1468,7 +1468,6 @@ static const Property rocker_properties[] = { switch_id, 0), DEFINE_PROP_ARRAY("ports", Rocker, fp_ports, fp_ports_peers, qdev_prop_netdev, NICPeers), - DEFINE_PROP_END_OF_LIST(), }; static const VMStateDescription rocker_vmsd = { diff --git a/hw/net/rtl8139.c b/hw/net/rtl8139.c index 064a73b6b49..3245aa1f1d8 100644 --- a/hw/net/rtl8139.c +++ b/hw/net/rtl8139.c @@ -3412,7 +3412,6 @@ static void rtl8139_instance_init(Object *obj) static const Property rtl8139_properties[] = { DEFINE_NIC_PROPERTIES(RTL8139State, conf), - DEFINE_PROP_END_OF_LIST(), }; static void rtl8139_class_init(ObjectClass *klass, void *data) diff --git a/hw/net/smc91c111.c b/hw/net/smc91c111.c index a853c30fa20..b18d5c23c39 100644 --- a/hw/net/smc91c111.c +++ b/hw/net/smc91c111.c @@ -790,7 +790,6 @@ static void smc91c111_realize(DeviceState *dev, Error **errp) static const Property smc91c111_properties[] = { DEFINE_NIC_PROPERTIES(smc91c111_state, conf), - DEFINE_PROP_END_OF_LIST(), }; static void smc91c111_class_init(ObjectClass *klass, void *data) diff --git a/hw/net/spapr_llan.c b/hw/net/spapr_llan.c index d381c041db3..da98a7ec3ea 100644 --- a/hw/net/spapr_llan.c +++ b/hw/net/spapr_llan.c @@ -791,7 +791,6 @@ static const Property spapr_vlan_properties[] = { DEFINE_NIC_PROPERTIES(SpaprVioVlan, nicconf), DEFINE_PROP_BIT("use-rx-buffer-pools", SpaprVioVlan, compat_flags, SPAPRVLAN_FLAG_RX_BUF_POOLS_BIT, true), - DEFINE_PROP_END_OF_LIST(), }; static bool spapr_vlan_rx_buffer_pools_needed(void *opaque) diff --git a/hw/net/stellaris_enet.c b/hw/net/stellaris_enet.c index 4af1afa7337..a420732d48f 100644 --- a/hw/net/stellaris_enet.c +++ b/hw/net/stellaris_enet.c @@ -499,7 +499,6 @@ static void stellaris_enet_realize(DeviceState *dev, Error **errp) static const Property stellaris_enet_properties[] = { DEFINE_NIC_PROPERTIES(stellaris_enet_state, conf), - DEFINE_PROP_END_OF_LIST(), }; static void stellaris_enet_class_init(ObjectClass *klass, void *data) diff --git a/hw/net/sungem.c b/hw/net/sungem.c index bcc7a18382c..e1c672acd3a 100644 --- a/hw/net/sungem.c +++ b/hw/net/sungem.c @@ -1427,7 +1427,6 @@ static const Property sungem_properties[] = { * override. */ DEFINE_PROP_UINT32("phy_addr", SunGEMState, phy_addr, 0), - DEFINE_PROP_END_OF_LIST(), }; static const VMStateDescription vmstate_sungem = { diff --git a/hw/net/sunhme.c b/hw/net/sunhme.c index 86f472fcbe7..539e0d5e463 100644 --- a/hw/net/sunhme.c +++ b/hw/net/sunhme.c @@ -179,7 +179,6 @@ struct SunHMEState { static const Property sunhme_properties[] = { DEFINE_NIC_PROPERTIES(SunHMEState, conf), - DEFINE_PROP_END_OF_LIST(), }; static void sunhme_reset_tx(SunHMEState *s) diff --git a/hw/net/tulip.c b/hw/net/tulip.c index f35b58a88c2..d753dc790d3 100644 --- a/hw/net/tulip.c +++ b/hw/net/tulip.c @@ -1009,7 +1009,6 @@ static void tulip_instance_init(Object *obj) static const Property tulip_properties[] = { DEFINE_NIC_PROPERTIES(TULIPState, c), - DEFINE_PROP_END_OF_LIST(), }; static void tulip_class_init(ObjectClass *klass, void *data) diff --git a/hw/net/virtio-net.c b/hw/net/virtio-net.c index 4fd1f9accab..e2d3d188045 100644 --- a/hw/net/virtio-net.c +++ b/hw/net/virtio-net.c @@ -4057,7 +4057,6 @@ static const Property virtio_net_properties[] = { VIRTIO_NET_F_GUEST_USO6, true), DEFINE_PROP_BIT64("host_uso", VirtIONet, host_features, VIRTIO_NET_F_HOST_USO, true), - DEFINE_PROP_END_OF_LIST(), }; static void virtio_net_class_init(ObjectClass *klass, void *data) diff --git a/hw/net/vmxnet3.c b/hw/net/vmxnet3.c index f69547cad5e..4c77d69b78e 100644 --- a/hw/net/vmxnet3.c +++ b/hw/net/vmxnet3.c @@ -2477,7 +2477,6 @@ static const Property vmxnet3_properties[] = { VMXNET3_COMPAT_FLAG_OLD_MSI_OFFSETS_BIT, false), DEFINE_PROP_BIT("x-disable-pcie", VMXNET3State, compat_flags, VMXNET3_COMPAT_FLAG_DISABLE_PCIE_BIT, false), - DEFINE_PROP_END_OF_LIST(), }; static void vmxnet3_realize(DeviceState *qdev, Error **errp) diff --git a/hw/net/xen_nic.c b/hw/net/xen_nic.c index 5a5259150a1..97ebd9fa307 100644 --- a/hw/net/xen_nic.c +++ b/hw/net/xen_nic.c @@ -558,7 +558,6 @@ static void xen_netdev_unrealize(XenDevice *xendev) static const Property xen_netdev_properties[] = { DEFINE_NIC_PROPERTIES(XenNetDev, conf), DEFINE_PROP_INT32("idx", XenNetDev, dev, -1), - DEFINE_PROP_END_OF_LIST(), }; static void xen_netdev_class_init(ObjectClass *class, void *data) diff --git a/hw/net/xgmac.c b/hw/net/xgmac.c index 6e0f96f4858..e3cc4c60ebd 100644 --- a/hw/net/xgmac.c +++ b/hw/net/xgmac.c @@ -416,7 +416,6 @@ static void xgmac_enet_realize(DeviceState *dev, Error **errp) static const Property xgmac_properties[] = { DEFINE_NIC_PROPERTIES(XgmacState, conf), - DEFINE_PROP_END_OF_LIST(), }; static void xgmac_enet_class_init(ObjectClass *klass, void *data) diff --git a/hw/net/xilinx_axienet.c b/hw/net/xilinx_axienet.c index 9d0c618e2f8..457952af196 100644 --- a/hw/net/xilinx_axienet.c +++ b/hw/net/xilinx_axienet.c @@ -1005,7 +1005,6 @@ static const Property xilinx_enet_properties[] = { tx_data_dev, TYPE_STREAM_SINK, StreamSink *), DEFINE_PROP_LINK("axistream-control-connected", XilinxAXIEnet, tx_control_dev, TYPE_STREAM_SINK, StreamSink *), - DEFINE_PROP_END_OF_LIST(), }; static void xilinx_enet_class_init(ObjectClass *klass, void *data) diff --git a/hw/net/xilinx_ethlite.c b/hw/net/xilinx_ethlite.c index 9413731d20d..f3eb2af1934 100644 --- a/hw/net/xilinx_ethlite.c +++ b/hw/net/xilinx_ethlite.c @@ -255,7 +255,6 @@ static const Property xilinx_ethlite_properties[] = { DEFINE_PROP_UINT32("tx-ping-pong", struct xlx_ethlite, c_tx_pingpong, 1), DEFINE_PROP_UINT32("rx-ping-pong", struct xlx_ethlite, c_rx_pingpong, 1), DEFINE_NIC_PROPERTIES(struct xlx_ethlite, conf), - DEFINE_PROP_END_OF_LIST(), }; static void xilinx_ethlite_class_init(ObjectClass *klass, void *data) diff --git a/hw/nubus/nubus-bridge.c b/hw/nubus/nubus-bridge.c index 83893e5a463..8fe43627237 100644 --- a/hw/nubus/nubus-bridge.c +++ b/hw/nubus/nubus-bridge.c @@ -26,7 +26,6 @@ static void nubus_bridge_init(Object *obj) static const Property nubus_bridge_properties[] = { DEFINE_PROP_UINT16("slot-available-mask", NubusBridge, bus.slot_available_mask, 0xffff), - DEFINE_PROP_END_OF_LIST() }; static void nubus_bridge_class_init(ObjectClass *klass, void *data) diff --git a/hw/nubus/nubus-device.c b/hw/nubus/nubus-device.c index 7cafc134272..6755c3dc438 100644 --- a/hw/nubus/nubus-device.c +++ b/hw/nubus/nubus-device.c @@ -110,7 +110,6 @@ static void nubus_device_realize(DeviceState *dev, Error **errp) static const Property nubus_device_properties[] = { DEFINE_PROP_INT32("slot", NubusDevice, slot, -1), DEFINE_PROP_STRING("romfile", NubusDevice, romfile), - DEFINE_PROP_END_OF_LIST() }; static void nubus_device_class_init(ObjectClass *oc, void *data) diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c index 33a3062466e..d9c8dace1e1 100644 --- a/hw/nvme/ctrl.c +++ b/hw/nvme/ctrl.c @@ -8965,7 +8965,6 @@ static const Property nvme_props[] = { DEFINE_PROP_BOOL("atomic.dn", NvmeCtrl, params.atomic_dn, 0), DEFINE_PROP_UINT16("atomic.awun", NvmeCtrl, params.atomic_awun, 0), DEFINE_PROP_UINT16("atomic.awupf", NvmeCtrl, params.atomic_awupf, 0), - DEFINE_PROP_END_OF_LIST(), }; static void nvme_get_smart_warning(Object *obj, Visitor *v, const char *name, diff --git a/hw/nvme/ns.c b/hw/nvme/ns.c index 192b80f18db..0a7881b21f3 100644 --- a/hw/nvme/ns.c +++ b/hw/nvme/ns.c @@ -834,7 +834,6 @@ static const Property nvme_ns_props[] = { DEFINE_PROP_BOOL("eui64-default", NvmeNamespace, params.eui64_default, false), DEFINE_PROP_STRING("fdp.ruhs", NvmeNamespace, params.fdp.ruhs), - DEFINE_PROP_END_OF_LIST(), }; static void nvme_ns_class_init(ObjectClass *oc, void *data) diff --git a/hw/nvme/subsys.c b/hw/nvme/subsys.c index 3171c3888c2..2ae56f12a59 100644 --- a/hw/nvme/subsys.c +++ b/hw/nvme/subsys.c @@ -223,7 +223,6 @@ static const Property nvme_subsystem_props[] = { NVME_DEFAULT_RU_SIZE), DEFINE_PROP_UINT32("fdp.nrg", NvmeSubsystem, params.fdp.nrg, 1), DEFINE_PROP_UINT16("fdp.nruh", NvmeSubsystem, params.fdp.nruh, 0), - DEFINE_PROP_END_OF_LIST(), }; static void nvme_subsys_class_init(ObjectClass *oc, void *data) diff --git a/hw/nvram/ds1225y.c b/hw/nvram/ds1225y.c index 19bf8d2091b..6b2aa8c7d26 100644 --- a/hw/nvram/ds1225y.c +++ b/hw/nvram/ds1225y.c @@ -145,7 +145,6 @@ static void nvram_sysbus_realize(DeviceState *dev, Error **errp) static const Property nvram_sysbus_properties[] = { DEFINE_PROP_UINT32("size", SysBusNvRamState, nvram.chip_size, 0x2000), DEFINE_PROP_STRING("filename", SysBusNvRamState, nvram.filename), - DEFINE_PROP_END_OF_LIST(), }; static void nvram_sysbus_class_init(ObjectClass *klass, void *data) diff --git a/hw/nvram/eeprom_at24c.c b/hw/nvram/eeprom_at24c.c index 669920b2b92..5f525d37e47 100644 --- a/hw/nvram/eeprom_at24c.c +++ b/hw/nvram/eeprom_at24c.c @@ -239,7 +239,6 @@ static const Property at24c_eeprom_props[] = { DEFINE_PROP_UINT8("address-size", EEPROMState, asize, 0), DEFINE_PROP_BOOL("writable", EEPROMState, writable, true), DEFINE_PROP_DRIVE("drive", EEPROMState, blk), - DEFINE_PROP_END_OF_LIST() }; static diff --git a/hw/nvram/fw_cfg.c b/hw/nvram/fw_cfg.c index 7461d99ff2e..327d623d8d6 100644 --- a/hw/nvram/fw_cfg.c +++ b/hw/nvram/fw_cfg.c @@ -1084,7 +1084,6 @@ static void fw_cfg_machine_ready(struct Notifier *n, void *data) static const Property fw_cfg_properties[] = { DEFINE_PROP_BOOL("acpi-mr-restore", FWCfgState, acpi_mr_restore, true), - DEFINE_PROP_END_OF_LIST(), }; static void fw_cfg_common_realize(DeviceState *dev, Error **errp) @@ -1278,7 +1277,6 @@ static const Property fw_cfg_io_properties[] = { true), DEFINE_PROP_UINT16("x-file-slots", FWCfgIoState, parent_obj.file_slots, FW_CFG_FILE_SLOTS_DFLT), - DEFINE_PROP_END_OF_LIST(), }; static void fw_cfg_io_realize(DeviceState *dev, Error **errp) @@ -1328,7 +1326,6 @@ static const Property fw_cfg_mem_properties[] = { true), DEFINE_PROP_UINT16("x-file-slots", FWCfgMemState, parent_obj.file_slots, FW_CFG_FILE_SLOTS_DFLT), - DEFINE_PROP_END_OF_LIST(), }; static void fw_cfg_mem_realize(DeviceState *dev, Error **errp) diff --git a/hw/nvram/mac_nvram.c b/hw/nvram/mac_nvram.c index d62ad719c84..db42817e1f9 100644 --- a/hw/nvram/mac_nvram.c +++ b/hw/nvram/mac_nvram.c @@ -138,7 +138,6 @@ static const Property macio_nvram_properties[] = { DEFINE_PROP_UINT32("size", MacIONVRAMState, size, 0), DEFINE_PROP_UINT32("it_shift", MacIONVRAMState, it_shift, 0), DEFINE_PROP_DRIVE("drive", MacIONVRAMState, blk), - DEFINE_PROP_END_OF_LIST() }; static void macio_nvram_class_init(ObjectClass *oc, void *data) diff --git a/hw/nvram/nrf51_nvm.c b/hw/nvram/nrf51_nvm.c index 236049462bf..2ed40788582 100644 --- a/hw/nvram/nrf51_nvm.c +++ b/hw/nvram/nrf51_nvm.c @@ -356,7 +356,6 @@ static void nrf51_nvm_reset(DeviceState *dev) static const Property nrf51_nvm_properties[] = { DEFINE_PROP_UINT32("flash-size", NRF51NVMState, flash_size, 0x40000), - DEFINE_PROP_END_OF_LIST(), }; static const VMStateDescription vmstate_nvm = { diff --git a/hw/nvram/spapr_nvram.c b/hw/nvram/spapr_nvram.c index 2251ff2f4c8..1230884f526 100644 --- a/hw/nvram/spapr_nvram.c +++ b/hw/nvram/spapr_nvram.c @@ -255,7 +255,6 @@ static const VMStateDescription vmstate_spapr_nvram = { static const Property spapr_nvram_properties[] = { DEFINE_SPAPR_PROPERTIES(SpaprNvram, sdev), DEFINE_PROP_DRIVE("drive", SpaprNvram, blk), - DEFINE_PROP_END_OF_LIST(), }; static void spapr_nvram_class_init(ObjectClass *klass, void *data) diff --git a/hw/nvram/xlnx-bbram.c b/hw/nvram/xlnx-bbram.c index 4fa528f0480..d3f238fc837 100644 --- a/hw/nvram/xlnx-bbram.c +++ b/hw/nvram/xlnx-bbram.c @@ -523,7 +523,6 @@ static const VMStateDescription vmstate_bbram_ctrl = { static const Property bbram_ctrl_props[] = { DEFINE_PROP("drive", XlnxBBRam, blk, bbram_prop_drive, BlockBackend *), DEFINE_PROP_UINT32("crc-zpads", XlnxBBRam, crc_zpads, 1), - DEFINE_PROP_END_OF_LIST(), }; static void bbram_ctrl_class_init(ObjectClass *klass, void *data) diff --git a/hw/nvram/xlnx-efuse.c b/hw/nvram/xlnx-efuse.c index 5dae9e8e9a0..f1787d0db57 100644 --- a/hw/nvram/xlnx-efuse.c +++ b/hw/nvram/xlnx-efuse.c @@ -272,7 +272,6 @@ static const Property efuse_properties[] = { DEFINE_PROP_BOOL("init-factory-tbits", XlnxEFuse, init_tbits, true), DEFINE_PROP_ARRAY("read-only", XlnxEFuse, ro_bits_cnt, ro_bits, qdev_prop_uint32, uint32_t), - DEFINE_PROP_END_OF_LIST(), }; static void efuse_class_init(ObjectClass *klass, void *data) diff --git a/hw/nvram/xlnx-versal-efuse-cache.c b/hw/nvram/xlnx-versal-efuse-cache.c index 1aea27afd3c..2fb599422ca 100644 --- a/hw/nvram/xlnx-versal-efuse-cache.c +++ b/hw/nvram/xlnx-versal-efuse-cache.c @@ -87,8 +87,6 @@ static const Property efuse_cache_props[] = { DEFINE_PROP_LINK("efuse", XlnxVersalEFuseCache, efuse, TYPE_XLNX_EFUSE, XlnxEFuse *), - - DEFINE_PROP_END_OF_LIST(), }; static void efuse_cache_class_init(ObjectClass *klass, void *data) diff --git a/hw/nvram/xlnx-versal-efuse-ctrl.c b/hw/nvram/xlnx-versal-efuse-ctrl.c index 599aa126fb3..3246eb3ca6e 100644 --- a/hw/nvram/xlnx-versal-efuse-ctrl.c +++ b/hw/nvram/xlnx-versal-efuse-ctrl.c @@ -750,8 +750,6 @@ static const Property efuse_ctrl_props[] = { DEFINE_PROP_ARRAY("pg0-lock", XlnxVersalEFuseCtrl, extra_pg0_lock_n16, extra_pg0_lock_spec, qdev_prop_uint16, uint16_t), - - DEFINE_PROP_END_OF_LIST(), }; static void efuse_ctrl_class_init(ObjectClass *klass, void *data) diff --git a/hw/nvram/xlnx-zynqmp-efuse.c b/hw/nvram/xlnx-zynqmp-efuse.c index af531879056..15024daf4fc 100644 --- a/hw/nvram/xlnx-zynqmp-efuse.c +++ b/hw/nvram/xlnx-zynqmp-efuse.c @@ -837,8 +837,6 @@ static const Property zynqmp_efuse_props[] = { DEFINE_PROP_LINK("efuse", XlnxZynqMPEFuse, efuse, TYPE_XLNX_EFUSE, XlnxEFuse *), - - DEFINE_PROP_END_OF_LIST(), }; static void zynqmp_efuse_class_init(ObjectClass *klass, void *data) diff --git a/hw/pci-bridge/cxl_downstream.c b/hw/pci-bridge/cxl_downstream.c index cfe50e60e9f..e337f1ac501 100644 --- a/hw/pci-bridge/cxl_downstream.c +++ b/hw/pci-bridge/cxl_downstream.c @@ -217,7 +217,6 @@ static const Property cxl_dsp_props[] = { speed, PCIE_LINK_SPEED_64), DEFINE_PROP_PCIE_LINK_WIDTH("x-width", PCIESlot, width, PCIE_LINK_WIDTH_16), - DEFINE_PROP_END_OF_LIST() }; static void cxl_dsp_class_init(ObjectClass *oc, void *data) diff --git a/hw/pci-bridge/cxl_root_port.c b/hw/pci-bridge/cxl_root_port.c index 5824ba3c750..c0037f2cfbf 100644 --- a/hw/pci-bridge/cxl_root_port.c +++ b/hw/pci-bridge/cxl_root_port.c @@ -211,7 +211,6 @@ static const Property gen_rp_props[] = { speed, PCIE_LINK_SPEED_64), DEFINE_PROP_PCIE_LINK_WIDTH("x-width", PCIESlot, width, PCIE_LINK_WIDTH_32), - DEFINE_PROP_END_OF_LIST() }; static void cxl_rp_dvsec_write_config(PCIDevice *dev, uint32_t addr, diff --git a/hw/pci-bridge/cxl_upstream.c b/hw/pci-bridge/cxl_upstream.c index ef94aa36543..28b109c49af 100644 --- a/hw/pci-bridge/cxl_upstream.c +++ b/hw/pci-bridge/cxl_upstream.c @@ -369,7 +369,6 @@ static const Property cxl_upstream_props[] = { speed, PCIE_LINK_SPEED_32), DEFINE_PROP_PCIE_LINK_WIDTH("x-width", CXLUpstreamPort, width, PCIE_LINK_WIDTH_16), - DEFINE_PROP_END_OF_LIST() }; static void cxl_upstream_class_init(ObjectClass *oc, void *data) diff --git a/hw/pci-bridge/gen_pcie_root_port.c b/hw/pci-bridge/gen_pcie_root_port.c index c319ca82638..3c0b41ef1a5 100644 --- a/hw/pci-bridge/gen_pcie_root_port.c +++ b/hw/pci-bridge/gen_pcie_root_port.c @@ -145,7 +145,6 @@ static const Property gen_rp_props[] = { speed, PCIE_LINK_SPEED_16), DEFINE_PROP_PCIE_LINK_WIDTH("x-width", PCIESlot, width, PCIE_LINK_WIDTH_32), - DEFINE_PROP_END_OF_LIST() }; static void gen_rp_dev_class_init(ObjectClass *klass, void *data) diff --git a/hw/pci-bridge/pci_bridge_dev.c b/hw/pci-bridge/pci_bridge_dev.c index 35a37e056a7..0a91a8ae6c4 100644 --- a/hw/pci-bridge/pci_bridge_dev.c +++ b/hw/pci-bridge/pci_bridge_dev.c @@ -186,7 +186,6 @@ static const Property pci_bridge_dev_properties[] = { res_reserve.mem_pref_32, -1), DEFINE_PROP_SIZE("pref64-reserve", PCIBridgeDev, res_reserve.mem_pref_64, -1), - DEFINE_PROP_END_OF_LIST(), }; static bool pci_device_shpc_present(void *opaque, int version_id) diff --git a/hw/pci-bridge/pci_expander_bridge.c b/hw/pci-bridge/pci_expander_bridge.c index 01997c1ab3b..af4591a9c39 100644 --- a/hw/pci-bridge/pci_expander_bridge.c +++ b/hw/pci-bridge/pci_expander_bridge.c @@ -425,7 +425,6 @@ static const Property pxb_dev_properties[] = { DEFINE_PROP_UINT8("bus_nr", PXBDev, bus_nr, 0), DEFINE_PROP_UINT16("numa_node", PXBDev, numa_node, NUMA_NODE_UNASSIGNED), DEFINE_PROP_BOOL("bypass_iommu", PXBDev, bypass_iommu, false), - DEFINE_PROP_END_OF_LIST(), }; static void pxb_dev_class_init(ObjectClass *klass, void *data) @@ -509,7 +508,6 @@ static void pxb_cxl_dev_realize(PCIDevice *dev, Error **errp) static const Property pxb_cxl_dev_properties[] = { DEFINE_PROP_BOOL("hdm_for_passthrough", PXBCXLDev, hdm_for_passthrough, false), - DEFINE_PROP_END_OF_LIST(), }; static void pxb_cxl_dev_class_init(ObjectClass *klass, void *data) diff --git a/hw/pci-bridge/pcie_pci_bridge.c b/hw/pci-bridge/pcie_pci_bridge.c index 8834ff3dbfe..fd4514a595c 100644 --- a/hw/pci-bridge/pcie_pci_bridge.c +++ b/hw/pci-bridge/pcie_pci_bridge.c @@ -126,7 +126,6 @@ static void pcie_pci_bridge_write_config(PCIDevice *d, static const Property pcie_pci_bridge_dev_properties[] = { DEFINE_PROP_ON_OFF_AUTO("msi", PCIEPCIBridge, msi, ON_OFF_AUTO_AUTO), - DEFINE_PROP_END_OF_LIST(), }; static const VMStateDescription pcie_pci_bridge_dev_vmstate = { diff --git a/hw/pci-bridge/pcie_root_port.c b/hw/pci-bridge/pcie_root_port.c index a7f87a1bc48..dd40b366bfa 100644 --- a/hw/pci-bridge/pcie_root_port.c +++ b/hw/pci-bridge/pcie_root_port.c @@ -152,7 +152,6 @@ static const Property rp_props[] = { DEFINE_PROP_BIT(COMPAT_PROP_PCP, PCIDevice, cap_present, QEMU_PCIE_SLTCAP_PCP_BITNR, true), DEFINE_PROP_BOOL("disable-acs", PCIESlot, disable_acs, false), - DEFINE_PROP_END_OF_LIST() }; static void rp_instance_post_init(Object *obj) diff --git a/hw/pci-bridge/xio3130_downstream.c b/hw/pci-bridge/xio3130_downstream.c index 92e5fb72ecd..d4e94f26571 100644 --- a/hw/pci-bridge/xio3130_downstream.c +++ b/hw/pci-bridge/xio3130_downstream.c @@ -137,7 +137,6 @@ static void xio3130_downstream_exitfn(PCIDevice *d) static const Property xio3130_downstream_props[] = { DEFINE_PROP_BIT(COMPAT_PROP_PCP, PCIDevice, cap_present, QEMU_PCIE_SLTCAP_PCP_BITNR, true), - DEFINE_PROP_END_OF_LIST() }; static const VMStateDescription vmstate_xio3130_downstream = { diff --git a/hw/pci-host/dino.c b/hw/pci-host/dino.c index ead9893f213..58fdbf7bc90 100644 --- a/hw/pci-host/dino.c +++ b/hw/pci-host/dino.c @@ -495,7 +495,6 @@ static void dino_pcihost_init(Object *obj) static const Property dino_pcihost_properties[] = { DEFINE_PROP_LINK("memory-as", DinoState, memory_as, TYPE_MEMORY_REGION, MemoryRegion *), - DEFINE_PROP_END_OF_LIST(), }; static void dino_pcihost_class_init(ObjectClass *klass, void *data) diff --git a/hw/pci-host/gpex.c b/hw/pci-host/gpex.c index 8a955ca1305..c6aa8e87a22 100644 --- a/hw/pci-host/gpex.c +++ b/hw/pci-host/gpex.c @@ -166,7 +166,6 @@ static const Property gpex_host_properties[] = { gpex_cfg.mmio64.base, 0), DEFINE_PROP_SIZE(PCI_HOST_ABOVE_4G_MMIO_SIZE, GPEXHost, gpex_cfg.mmio64.size, 0), - DEFINE_PROP_END_OF_LIST(), }; static void gpex_host_class_init(ObjectClass *klass, void *data) diff --git a/hw/pci-host/grackle.c b/hw/pci-host/grackle.c index d64de737744..84e5ee8c6ef 100644 --- a/hw/pci-host/grackle.c +++ b/hw/pci-host/grackle.c @@ -131,7 +131,6 @@ static char *grackle_ofw_unit_address(const SysBusDevice *dev) static const Property grackle_properties[] = { DEFINE_PROP_UINT32("ofw-addr", GrackleState, ofw_addr, -1), - DEFINE_PROP_END_OF_LIST() }; static void grackle_class_init(ObjectClass *klass, void *data) diff --git a/hw/pci-host/gt64120.c b/hw/pci-host/gt64120.c index 3c73ebe83ff..d5c13a89b68 100644 --- a/hw/pci-host/gt64120.c +++ b/hw/pci-host/gt64120.c @@ -1277,7 +1277,6 @@ static const TypeInfo gt64120_pci_info = { static const Property gt64120_properties[] = { DEFINE_PROP_BOOL("cpu-little-endian", GT64120State, cpu_little_endian, false), - DEFINE_PROP_END_OF_LIST(), }; static void gt64120_class_init(ObjectClass *klass, void *data) diff --git a/hw/pci-host/i440fx.c b/hw/pci-host/i440fx.c index 40780fbc525..1e69691c6d1 100644 --- a/hw/pci-host/i440fx.c +++ b/hw/pci-host/i440fx.c @@ -362,7 +362,6 @@ static const Property i440fx_props[] = { above_4g_mem_size, 0), DEFINE_PROP_BOOL("x-pci-hole64-fix", I440FXState, pci_hole64_fix, true), DEFINE_PROP_STRING(I440FX_HOST_PROP_PCI_TYPE, I440FXState, pci_type), - DEFINE_PROP_END_OF_LIST(), }; static void i440fx_pcihost_class_init(ObjectClass *klass, void *data) diff --git a/hw/pci-host/mv64361.c b/hw/pci-host/mv64361.c index 2518d5abe6b..9c41c155fb4 100644 --- a/hw/pci-host/mv64361.c +++ b/hw/pci-host/mv64361.c @@ -100,7 +100,6 @@ static void mv64361_pcihost_realize(DeviceState *dev, Error **errp) static const Property mv64361_pcihost_props[] = { DEFINE_PROP_UINT8("index", MV64361PCIState, index, 0), - DEFINE_PROP_END_OF_LIST() }; static void mv64361_pcihost_class_init(ObjectClass *klass, void *data) diff --git a/hw/pci-host/pnv_phb.c b/hw/pci-host/pnv_phb.c index 888f0786a07..97cfb52119d 100644 --- a/hw/pci-host/pnv_phb.c +++ b/hw/pci-host/pnv_phb.c @@ -192,8 +192,6 @@ static const Property pnv_phb_properties[] = { DEFINE_PROP_LINK("pec", PnvPHB, pec, TYPE_PNV_PHB4_PEC, PnvPhb4PecState *), - - DEFINE_PROP_END_OF_LIST(), }; static void pnv_phb_class_init(ObjectClass *klass, void *data) @@ -304,8 +302,6 @@ static void pnv_phb_root_port_realize(DeviceState *dev, Error **errp) static const Property pnv_phb_root_port_properties[] = { DEFINE_PROP_UINT32("version", PnvPHBRootPort, version, 0), - - DEFINE_PROP_END_OF_LIST(), }; static void pnv_phb_root_port_class_init(ObjectClass *klass, void *data) diff --git a/hw/pci-host/pnv_phb3.c b/hw/pci-host/pnv_phb3.c index 529b33b5a2a..cd178f7eaf3 100644 --- a/hw/pci-host/pnv_phb3.c +++ b/hw/pci-host/pnv_phb3.c @@ -1095,7 +1095,6 @@ static const Property pnv_phb3_properties[] = { DEFINE_PROP_UINT32("chip-id", PnvPHB3, chip_id, 0), DEFINE_PROP_LINK("chip", PnvPHB3, chip, TYPE_PNV_CHIP, PnvChip *), DEFINE_PROP_LINK("phb-base", PnvPHB3, phb_base, TYPE_PNV_PHB, PnvPHB *), - DEFINE_PROP_END_OF_LIST(), }; static void pnv_phb3_class_init(ObjectClass *klass, void *data) diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c index 482fe25803c..178c73f519b 100644 --- a/hw/pci-host/pnv_phb4.c +++ b/hw/pci-host/pnv_phb4.c @@ -1694,7 +1694,6 @@ static const Property pnv_phb4_properties[] = { DEFINE_PROP_LINK("pec", PnvPHB4, pec, TYPE_PNV_PHB4_PEC, PnvPhb4PecState *), DEFINE_PROP_LINK("phb-base", PnvPHB4, phb_base, TYPE_PNV_PHB, PnvPHB *), - DEFINE_PROP_END_OF_LIST(), }; static void pnv_phb4_class_init(ObjectClass *klass, void *data) diff --git a/hw/pci-host/pnv_phb4_pec.c b/hw/pci-host/pnv_phb4_pec.c index f8975403d33..e4d33fa0606 100644 --- a/hw/pci-host/pnv_phb4_pec.c +++ b/hw/pci-host/pnv_phb4_pec.c @@ -288,7 +288,6 @@ static const Property pnv_pec_properties[] = { DEFINE_PROP_UINT32("chip-id", PnvPhb4PecState, chip_id, 0), DEFINE_PROP_LINK("chip", PnvPhb4PecState, chip, TYPE_PNV_CHIP, PnvChip *), - DEFINE_PROP_END_OF_LIST(), }; static uint32_t pnv_pec_xscom_pci_base(PnvPhb4PecState *pec) diff --git a/hw/pci-host/ppce500.c b/hw/pci-host/ppce500.c index 54071fc125a..345ce4c5262 100644 --- a/hw/pci-host/ppce500.c +++ b/hw/pci-host/ppce500.c @@ -510,7 +510,6 @@ static void e500_host_bridge_class_init(ObjectClass *klass, void *data) static const Property pcihost_properties[] = { DEFINE_PROP_UINT32("first_slot", PPCE500PCIState, first_slot, 0x11), DEFINE_PROP_UINT32("first_pin_irq", PPCE500PCIState, first_pin_irq, 0x1), - DEFINE_PROP_END_OF_LIST(), }; static void e500_pcihost_class_init(ObjectClass *klass, void *data) diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c index af0b77ea1e6..06be3d77cb9 100644 --- a/hw/pci-host/q35.c +++ b/hw/pci-host/q35.c @@ -182,7 +182,6 @@ static const Property q35_host_props[] = { DEFINE_PROP_BOOL(PCI_HOST_PROP_SMM_RANGES, Q35PCIHost, mch.has_smm_ranges, true), DEFINE_PROP_BOOL("x-pci-hole64-fix", Q35PCIHost, pci_hole64_fix, true), - DEFINE_PROP_END_OF_LIST(), }; static void q35_host_class_init(ObjectClass *klass, void *data) @@ -666,7 +665,6 @@ static const Property mch_props[] = { DEFINE_PROP_UINT16("extended-tseg-mbytes", MCHPCIState, ext_tseg_mbytes, 16), DEFINE_PROP_BOOL("smbase-smram", MCHPCIState, has_smram_at_smbase, true), - DEFINE_PROP_END_OF_LIST(), }; static void mch_class_init(ObjectClass *klass, void *data) diff --git a/hw/pci-host/raven.c b/hw/pci-host/raven.c index b0a4a669f59..918a3237a9e 100644 --- a/hw/pci-host/raven.c +++ b/hw/pci-host/raven.c @@ -429,7 +429,6 @@ static const Property raven_pcihost_properties[] = { /* Temporary workaround until legacy prep machine is removed */ DEFINE_PROP_BOOL("is-legacy-prep", PREPPCIState, is_legacy_prep, false), - DEFINE_PROP_END_OF_LIST() }; static void raven_pcihost_class_init(ObjectClass *klass, void *data) diff --git a/hw/pci-host/sabre.c b/hw/pci-host/sabre.c index 623afed6447..56f057a63f1 100644 --- a/hw/pci-host/sabre.c +++ b/hw/pci-host/sabre.c @@ -495,7 +495,6 @@ static char *sabre_ofw_unit_address(const SysBusDevice *dev) static const Property sabre_properties[] = { DEFINE_PROP_UINT64("special-base", SabreState, special_base, 0), DEFINE_PROP_UINT64("mem-base", SabreState, mem_base, 0), - DEFINE_PROP_END_OF_LIST(), }; static void sabre_class_init(ObjectClass *klass, void *data) diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c index bd670cfa9db..37e2461bbbf 100644 --- a/hw/pci-host/uninorth.c +++ b/hw/pci-host/uninorth.c @@ -425,7 +425,6 @@ static const TypeInfo unin_internal_pci_host_info = { static const Property pci_unin_main_pci_host_props[] = { DEFINE_PROP_UINT32("ofw-addr", UNINHostState, ofw_addr, -1), - DEFINE_PROP_END_OF_LIST() }; static void pci_unin_main_class_init(ObjectClass *klass, void *data) diff --git a/hw/pci-host/versatile.c b/hw/pci-host/versatile.c index 5d596406916..c3fbf4cbf94 100644 --- a/hw/pci-host/versatile.c +++ b/hw/pci-host/versatile.c @@ -501,7 +501,6 @@ static const TypeInfo versatile_pci_host_info = { static const Property pci_vpb_properties[] = { DEFINE_PROP_UINT8("broken-irq-mapping", PCIVPBState, irq_mapping_prop, PCI_VPB_IRQMAP_ASSUME_OK), - DEFINE_PROP_END_OF_LIST() }; static void pci_vpb_class_init(ObjectClass *klass, void *data) diff --git a/hw/pci-host/xilinx-pcie.c b/hw/pci-host/xilinx-pcie.c index 848403970bc..18688485f48 100644 --- a/hw/pci-host/xilinx-pcie.c +++ b/hw/pci-host/xilinx-pcie.c @@ -163,7 +163,6 @@ static const Property xilinx_pcie_host_props[] = { DEFINE_PROP_SIZE("mmio_base", XilinxPCIEHost, mmio_base, 0), DEFINE_PROP_SIZE("mmio_size", XilinxPCIEHost, mmio_size, 1 * MiB), DEFINE_PROP_BOOL("link_up", XilinxPCIEHost, link_up, true), - DEFINE_PROP_END_OF_LIST(), }; static void xilinx_pcie_host_class_init(ObjectClass *klass, void *data) diff --git a/hw/pci/pci.c b/hw/pci/pci.c index 90248481b18..714208aa986 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -104,7 +104,6 @@ static const Property pci_props[] = { DEFINE_PROP_BIT("x-pcie-ext-tag", PCIDevice, cap_present, QEMU_PCIE_EXT_TAG_BITNR, true), { .name = "busnr", .info = &prop_pci_busnr }, - DEFINE_PROP_END_OF_LIST() }; static const VMStateDescription vmstate_pcibus = { diff --git a/hw/pci/pci_bridge.c b/hw/pci/pci_bridge.c index dd4fd3674f5..aee4dd7d1f6 100644 --- a/hw/pci/pci_bridge.c +++ b/hw/pci/pci_bridge.c @@ -480,7 +480,6 @@ int pci_bridge_qemu_reserve_cap_init(PCIDevice *dev, int cap_offset, static const Property pci_bridge_properties[] = { DEFINE_PROP_BOOL("x-pci-express-writeable-slt-bug", PCIBridge, pcie_writeable_slt_bug, false), - DEFINE_PROP_END_OF_LIST(), }; static void pci_bridge_class_init(ObjectClass *klass, void *data) diff --git a/hw/pci/pci_host.c b/hw/pci/pci_host.c index 321e7be709c..4510890dfc1 100644 --- a/hw/pci/pci_host.c +++ b/hw/pci/pci_host.c @@ -244,7 +244,6 @@ static const Property pci_host_properties_common[] = { DEFINE_PROP_BOOL("x-config-reg-migration-enabled", PCIHostState, mig_enabled, true), DEFINE_PROP_BOOL(PCI_HOST_BYPASS_IOMMU, PCIHostState, bypass_iommu, false), - DEFINE_PROP_END_OF_LIST(), }; static void pci_host_class_init(ObjectClass *klass, void *data) diff --git a/hw/pci/pcie_port.c b/hw/pci/pcie_port.c index bac2822e988..c73db30e989 100644 --- a/hw/pci/pcie_port.c +++ b/hw/pci/pcie_port.c @@ -116,7 +116,6 @@ static const Property pcie_port_props[] = { DEFINE_PROP_UINT16("aer_log_max", PCIEPort, parent_obj.parent_obj.exp.aer_log.log_max, PCIE_AER_LOG_MAX_DEFAULT), - DEFINE_PROP_END_OF_LIST() }; static void pcie_port_class_init(ObjectClass *oc, void *data) @@ -210,7 +209,6 @@ static const Property pcie_slot_props[] = { DEFINE_PROP_BOOL("hotplug", PCIESlot, hotplug, true), DEFINE_PROP_BOOL("x-do-not-expose-native-hotplug-cap", PCIESlot, hide_native_hotplug_cap, false), - DEFINE_PROP_END_OF_LIST() }; static void pcie_slot_class_init(ObjectClass *oc, void *data) diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index b90a052ce0d..770516d7e52 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -2431,7 +2431,6 @@ static const Property pnv_chip_properties[] = { DEFINE_PROP_UINT32("nr-threads", PnvChip, nr_threads, 1), DEFINE_PROP_BOOL("big-core", PnvChip, big_core, false), DEFINE_PROP_BOOL("lpar-per-core", PnvChip, lpar_per_core, false), - DEFINE_PROP_END_OF_LIST(), }; static void pnv_chip_class_init(ObjectClass *klass, void *data) diff --git a/hw/ppc/pnv_adu.c b/hw/ppc/pnv_adu.c index 646736f7e98..d09a167466b 100644 --- a/hw/ppc/pnv_adu.c +++ b/hw/ppc/pnv_adu.c @@ -187,7 +187,6 @@ static void pnv_adu_realize(DeviceState *dev, Error **errp) static const Property pnv_adu_properties[] = { DEFINE_PROP_LINK("lpc", PnvADU, lpc, TYPE_PNV_LPC, PnvLpcController *), - DEFINE_PROP_END_OF_LIST(), }; static void pnv_adu_class_init(ObjectClass *klass, void *data) diff --git a/hw/ppc/pnv_chiptod.c b/hw/ppc/pnv_chiptod.c index 840ef23128d..011822ea1d5 100644 --- a/hw/ppc/pnv_chiptod.c +++ b/hw/ppc/pnv_chiptod.c @@ -454,7 +454,6 @@ static const Property pnv_chiptod_properties[] = { DEFINE_PROP_BOOL("primary", PnvChipTOD, primary, false), DEFINE_PROP_BOOL("secondary", PnvChipTOD, secondary, false), DEFINE_PROP_LINK("chip", PnvChipTOD , chip, TYPE_PNV_CHIP, PnvChip *), - DEFINE_PROP_END_OF_LIST(), }; static void pnv_chiptod_power9_class_init(ObjectClass *klass, void *data) diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c index 22864c92f38..a5ebd392e17 100644 --- a/hw/ppc/pnv_core.c +++ b/hw/ppc/pnv_core.c @@ -443,7 +443,6 @@ static const Property pnv_core_properties[] = { false), DEFINE_PROP_BOOL("lpar-per-core", PnvCore, lpar_per_core, false), DEFINE_PROP_LINK("chip", PnvCore, chip, TYPE_PNV_CHIP, PnvChip *), - DEFINE_PROP_END_OF_LIST(), }; static void pnv_core_power8_class_init(ObjectClass *oc, void *data) @@ -695,7 +694,6 @@ static void pnv_quad_power10_realize(DeviceState *dev, Error **errp) static const Property pnv_quad_properties[] = { DEFINE_PROP_UINT32("quad-id", PnvQuad, quad_id, 0), - DEFINE_PROP_END_OF_LIST(), }; static void pnv_quad_power9_class_init(ObjectClass *oc, void *data) diff --git a/hw/ppc/pnv_homer.c b/hw/ppc/pnv_homer.c index b1f83e2cf27..11c8da8bed0 100644 --- a/hw/ppc/pnv_homer.c +++ b/hw/ppc/pnv_homer.c @@ -414,7 +414,6 @@ static void pnv_homer_realize(DeviceState *dev, Error **errp) static const Property pnv_homer_properties[] = { DEFINE_PROP_LINK("chip", PnvHomer, chip, TYPE_PNV_CHIP, PnvChip *), - DEFINE_PROP_END_OF_LIST(), }; static void pnv_homer_class_init(ObjectClass *klass, void *data) diff --git a/hw/ppc/pnv_i2c.c b/hw/ppc/pnv_i2c.c index 4bd61abeed9..13f16906dc4 100644 --- a/hw/ppc/pnv_i2c.c +++ b/hw/ppc/pnv_i2c.c @@ -547,7 +547,6 @@ static const Property pnv_i2c_properties[] = { DEFINE_PROP_LINK("chip", PnvI2C, chip, TYPE_PNV_CHIP, PnvChip *), DEFINE_PROP_UINT32("engine", PnvI2C, engine, 1), DEFINE_PROP_UINT32("num-busses", PnvI2C, num_busses, 1), - DEFINE_PROP_END_OF_LIST(), }; static void pnv_i2c_class_init(ObjectClass *klass, void *data) diff --git a/hw/ppc/pnv_lpc.c b/hw/ppc/pnv_lpc.c index 4d471671630..0480a60f3f7 100644 --- a/hw/ppc/pnv_lpc.c +++ b/hw/ppc/pnv_lpc.c @@ -830,7 +830,6 @@ static void pnv_lpc_realize(DeviceState *dev, Error **errp) static const Property pnv_lpc_properties[] = { DEFINE_PROP_BOOL("psi-serirq", PnvLpcController, psi_has_serirq, false), - DEFINE_PROP_END_OF_LIST(), }; static void pnv_lpc_class_init(ObjectClass *klass, void *data) diff --git a/hw/ppc/pnv_pnor.c b/hw/ppc/pnv_pnor.c index eed6d326505..5bb755df76d 100644 --- a/hw/ppc/pnv_pnor.c +++ b/hw/ppc/pnv_pnor.c @@ -115,7 +115,6 @@ static void pnv_pnor_realize(DeviceState *dev, Error **errp) static const Property pnv_pnor_properties[] = { DEFINE_PROP_INT64("size", PnvPnor, size, 128 * MiB), DEFINE_PROP_DRIVE("drive", PnvPnor, blk), - DEFINE_PROP_END_OF_LIST(), }; static void pnv_pnor_class_init(ObjectClass *klass, void *data) diff --git a/hw/ppc/pnv_psi.c b/hw/ppc/pnv_psi.c index e7d6ceee99e..cd5021c4f55 100644 --- a/hw/ppc/pnv_psi.c +++ b/hw/ppc/pnv_psi.c @@ -555,7 +555,6 @@ static int pnv_psi_dt_xscom(PnvXScomInterface *dev, void *fdt, int xscom_offset) static const Property pnv_psi_properties[] = { DEFINE_PROP_UINT64("bar", PnvPsi, bar, 0), DEFINE_PROP_UINT64("fsp-bar", PnvPsi, fsp_bar, 0), - DEFINE_PROP_END_OF_LIST(), }; static void pnv_psi_power8_class_init(ObjectClass *klass, void *data) diff --git a/hw/ppc/ppc405_uc.c b/hw/ppc/ppc405_uc.c index 801f97811f5..f8c9cec9ceb 100644 --- a/hw/ppc/ppc405_uc.c +++ b/hw/ppc/ppc405_uc.c @@ -967,7 +967,6 @@ static void ppc405_cpc_realize(DeviceState *dev, Error **errp) static const Property ppc405_cpc_properties[] = { DEFINE_PROP_UINT32("sys-clk", Ppc405CpcState, sysclk, 0), - DEFINE_PROP_END_OF_LIST(), }; static void ppc405_cpc_class_init(ObjectClass *oc, void *data) diff --git a/hw/ppc/ppc440_uc.c b/hw/ppc/ppc440_uc.c index 05a5ef6f773..0d6f8d8a04a 100644 --- a/hw/ppc/ppc440_uc.c +++ b/hw/ppc/ppc440_uc.c @@ -1025,7 +1025,6 @@ static const Property ppc460ex_pcie_props[] = { DEFINE_PROP_INT32("dcrn-base", PPC460EXPCIEState, dcrn_base, -1), DEFINE_PROP_LINK("cpu", PPC460EXPCIEState, cpu, TYPE_POWERPC_CPU, PowerPCCPU *), - DEFINE_PROP_END_OF_LIST(), }; static void ppc460ex_pcie_class_init(ObjectClass *klass, void *data) diff --git a/hw/ppc/ppc4xx_devs.c b/hw/ppc/ppc4xx_devs.c index 530a392f2a0..9ce97775109 100644 --- a/hw/ppc/ppc4xx_devs.c +++ b/hw/ppc/ppc4xx_devs.c @@ -234,7 +234,6 @@ static void ppc4xx_mal_finalize(Object *obj) static const Property ppc4xx_mal_properties[] = { DEFINE_PROP_UINT8("txc-num", Ppc4xxMalState, txcnum, 0), DEFINE_PROP_UINT8("rxc-num", Ppc4xxMalState, rxcnum, 0), - DEFINE_PROP_END_OF_LIST(), }; static void ppc4xx_mal_class_init(ObjectClass *oc, void *data) @@ -542,7 +541,6 @@ bool ppc4xx_dcr_realize(Ppc4xxDcrDeviceState *dev, PowerPCCPU *cpu, static const Property ppc4xx_dcr_properties[] = { DEFINE_PROP_LINK("cpu", Ppc4xxDcrDeviceState, cpu, TYPE_POWERPC_CPU, PowerPCCPU *), - DEFINE_PROP_END_OF_LIST(), }; static void ppc4xx_dcr_class_init(ObjectClass *oc, void *data) diff --git a/hw/ppc/ppc4xx_sdram.c b/hw/ppc/ppc4xx_sdram.c index 6cfb07a11fd..562bff8d53e 100644 --- a/hw/ppc/ppc4xx_sdram.c +++ b/hw/ppc/ppc4xx_sdram.c @@ -429,7 +429,6 @@ static const Property ppc4xx_sdram_ddr_props[] = { DEFINE_PROP_LINK("dram", Ppc4xxSdramDdrState, dram_mr, TYPE_MEMORY_REGION, MemoryRegion *), DEFINE_PROP_UINT32("nbanks", Ppc4xxSdramDdrState, nbanks, 4), - DEFINE_PROP_END_OF_LIST(), }; static void ppc4xx_sdram_ddr_class_init(ObjectClass *oc, void *data) @@ -714,7 +713,6 @@ static const Property ppc4xx_sdram_ddr2_props[] = { DEFINE_PROP_LINK("dram", Ppc4xxSdramDdr2State, dram_mr, TYPE_MEMORY_REGION, MemoryRegion *), DEFINE_PROP_UINT32("nbanks", Ppc4xxSdramDdr2State, nbanks, 4), - DEFINE_PROP_END_OF_LIST(), }; static void ppc4xx_sdram_ddr2_class_init(ObjectClass *oc, void *data) diff --git a/hw/ppc/prep_systemio.c b/hw/ppc/prep_systemio.c index ca475c69f45..6e2ae98625c 100644 --- a/hw/ppc/prep_systemio.c +++ b/hw/ppc/prep_systemio.c @@ -288,7 +288,6 @@ static const VMStateDescription vmstate_prep_systemio = { static const Property prep_systemio_properties[] = { DEFINE_PROP_UINT8("ibm-planar-id", PrepSystemIoState, ibm_planar_id, 0), DEFINE_PROP_UINT8("equipment", PrepSystemIoState, equipment, 0), - DEFINE_PROP_END_OF_LIST() }; static void prep_systemio_class_initfn(ObjectClass *klass, void *data) diff --git a/hw/ppc/rs6000_mc.c b/hw/ppc/rs6000_mc.c index bee9bc62d46..0e5d53b8b69 100644 --- a/hw/ppc/rs6000_mc.c +++ b/hw/ppc/rs6000_mc.c @@ -210,7 +210,6 @@ static const VMStateDescription vmstate_rs6000mc = { static const Property rs6000mc_properties[] = { DEFINE_PROP_UINT32("ram-size", RS6000MCState, ram_size, 0), DEFINE_PROP_BOOL("auto-configure", RS6000MCState, autoconfigure, true), - DEFINE_PROP_END_OF_LIST() }; static void rs6000mc_class_initfn(ObjectClass *klass, void *data) diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c index 88d743a3c3f..559dd918e13 100644 --- a/hw/ppc/spapr_cpu_core.c +++ b/hw/ppc/spapr_cpu_core.c @@ -363,7 +363,6 @@ static void spapr_cpu_core_realize(DeviceState *dev, Error **errp) static const Property spapr_cpu_core_properties[] = { DEFINE_PROP_INT32("node-id", SpaprCpuCore, node_id, CPU_UNSET_NUMA_NODE_ID), - DEFINE_PROP_END_OF_LIST() }; static void spapr_cpu_core_class_init(ObjectClass *oc, void *data) diff --git a/hw/ppc/spapr_nvdimm.c b/hw/ppc/spapr_nvdimm.c index 8bcce4146a5..6f875d73b25 100644 --- a/hw/ppc/spapr_nvdimm.c +++ b/hw/ppc/spapr_nvdimm.c @@ -887,7 +887,6 @@ static void spapr_nvdimm_unrealize(NVDIMMDevice *dimm) #ifdef CONFIG_LIBPMEM static const Property spapr_nvdimm_properties[] = { DEFINE_PROP_BOOL("pmem-override", SpaprNVDIMMDevice, pmem_override, false), - DEFINE_PROP_END_OF_LIST(), }; #endif diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c index 3edff528ca1..0dcbd5900cc 100644 --- a/hw/ppc/spapr_pci.c +++ b/hw/ppc/spapr_pci.c @@ -2055,7 +2055,6 @@ static const Property spapr_phb_properties[] = { pcie_ecs, true), DEFINE_PROP_BOOL("pre-5.1-associativity", SpaprPhbState, pre_5_1_assoc, false), - DEFINE_PROP_END_OF_LIST(), }; static const VMStateDescription vmstate_spapr_pci_lsi = { diff --git a/hw/ppc/spapr_rng.c b/hw/ppc/spapr_rng.c index 51c3a54d45d..6935f00832d 100644 --- a/hw/ppc/spapr_rng.c +++ b/hw/ppc/spapr_rng.c @@ -134,7 +134,6 @@ static const Property spapr_rng_properties[] = { DEFINE_PROP_BOOL("use-kvm", SpaprRngState, use_kvm, false), DEFINE_PROP_LINK("rng", SpaprRngState, backend, TYPE_RNG_BACKEND, RngBackend *), - DEFINE_PROP_END_OF_LIST(), }; static void spapr_rng_class_init(ObjectClass *oc, void *data) diff --git a/hw/ppc/spapr_tpm_proxy.c b/hw/ppc/spapr_tpm_proxy.c index 37521b88cbb..2a17a5108bd 100644 --- a/hw/ppc/spapr_tpm_proxy.c +++ b/hw/ppc/spapr_tpm_proxy.c @@ -147,7 +147,6 @@ static void spapr_tpm_proxy_unrealize(DeviceState *d) static const Property spapr_tpm_proxy_properties[] = { DEFINE_PROP_STRING("host-path", SpaprTpmProxy, host_path), - DEFINE_PROP_END_OF_LIST(), }; static void spapr_tpm_proxy_class_init(ObjectClass *k, void *data) diff --git a/hw/remote/proxy.c b/hw/remote/proxy.c index 6f84fdd3faf..ee9a22bba36 100644 --- a/hw/remote/proxy.c +++ b/hw/remote/proxy.c @@ -193,7 +193,6 @@ static void pci_proxy_write_config(PCIDevice *d, uint32_t addr, uint32_t val, static const Property proxy_properties[] = { DEFINE_PROP_STRING("fd", PCIProxyDev, fd), - DEFINE_PROP_END_OF_LIST(), }; static void pci_proxy_dev_class_init(ObjectClass *klass, void *data) diff --git a/hw/riscv/opentitan.c b/hw/riscv/opentitan.c index 8ce85ea9f73..bc26b5313a6 100644 --- a/hw/riscv/opentitan.c +++ b/hw/riscv/opentitan.c @@ -308,7 +308,6 @@ static void lowrisc_ibex_soc_realize(DeviceState *dev_soc, Error **errp) static const Property lowrisc_ibex_soc_props[] = { DEFINE_PROP_UINT32("resetvec", LowRISCIbexSoCState, resetvec, 0x20000400), - DEFINE_PROP_END_OF_LIST() }; static void lowrisc_ibex_soc_class_init(ObjectClass *oc, void *data) diff --git a/hw/riscv/riscv-iommu-pci.c b/hw/riscv/riscv-iommu-pci.c index a695314bbeb..257a5faa5f6 100644 --- a/hw/riscv/riscv-iommu-pci.c +++ b/hw/riscv/riscv-iommu-pci.c @@ -163,7 +163,6 @@ static const Property riscv_iommu_pci_properties[] = { DEFINE_PROP_UINT16("device-id", RISCVIOMMUStatePci, device_id, PCI_DEVICE_ID_REDHAT_RISCV_IOMMU), DEFINE_PROP_UINT8("revision", RISCVIOMMUStatePci, revision, 0x01), - DEFINE_PROP_END_OF_LIST(), }; static void riscv_iommu_pci_class_init(ObjectClass *klass, void *data) diff --git a/hw/riscv/riscv-iommu.c b/hw/riscv/riscv-iommu.c index 07fed36986c..41f3e6cf7cf 100644 --- a/hw/riscv/riscv-iommu.c +++ b/hw/riscv/riscv-iommu.c @@ -2248,7 +2248,6 @@ static const Property riscv_iommu_properties[] = { DEFINE_PROP_BOOL("g-stage", RISCVIOMMUState, enable_g_stage, TRUE), DEFINE_PROP_LINK("downstream-mr", RISCVIOMMUState, target_mr, TYPE_MEMORY_REGION, MemoryRegion *), - DEFINE_PROP_END_OF_LIST(), }; static void riscv_iommu_class_init(ObjectClass *klass, void* data) diff --git a/hw/riscv/riscv_hart.c b/hw/riscv/riscv_hart.c index 0df454772fa..74b91ac60ca 100644 --- a/hw/riscv/riscv_hart.c +++ b/hw/riscv/riscv_hart.c @@ -33,7 +33,6 @@ static const Property riscv_harts_props[] = { DEFINE_PROP_STRING("cpu-type", RISCVHartArrayState, cpu_type), DEFINE_PROP_UINT64("resetvec", RISCVHartArrayState, resetvec, DEFAULT_RSTVEC), - DEFINE_PROP_END_OF_LIST(), }; static void riscv_harts_cpu_reset(void *opaque) diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index 124ffd48424..f5c01dbbd00 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -939,7 +939,6 @@ static void sifive_u_soc_realize(DeviceState *dev, Error **errp) static const Property sifive_u_soc_props[] = { DEFINE_PROP_UINT32("serial", SiFiveUSoCState, serial, OTP_SERIAL), DEFINE_PROP_STRING("cpu-type", SiFiveUSoCState, cpu_type), - DEFINE_PROP_END_OF_LIST() }; static void sifive_u_soc_class_init(ObjectClass *oc, void *data) diff --git a/hw/rtc/allwinner-rtc.c b/hw/rtc/allwinner-rtc.c index 838db721362..b56098b0a98 100644 --- a/hw/rtc/allwinner-rtc.c +++ b/hw/rtc/allwinner-rtc.c @@ -313,7 +313,6 @@ static const VMStateDescription allwinner_rtc_vmstate = { static const Property allwinner_rtc_properties[] = { DEFINE_PROP_INT32("base-year", AwRtcState, base_year, 0), - DEFINE_PROP_END_OF_LIST(), }; static void allwinner_rtc_class_init(ObjectClass *klass, void *data) diff --git a/hw/rtc/goldfish_rtc.c b/hw/rtc/goldfish_rtc.c index 389f192efa4..cd11bf8208f 100644 --- a/hw/rtc/goldfish_rtc.c +++ b/hw/rtc/goldfish_rtc.c @@ -289,7 +289,6 @@ static void goldfish_rtc_realize(DeviceState *d, Error **errp) static const Property goldfish_rtc_properties[] = { DEFINE_PROP_BOOL("big-endian", GoldfishRTCState, big_endian, false), - DEFINE_PROP_END_OF_LIST(), }; static void goldfish_rtc_class_init(ObjectClass *klass, void *data) diff --git a/hw/rtc/m48t59-isa.c b/hw/rtc/m48t59-isa.c index 51f80d27ef3..38bc8dcf100 100644 --- a/hw/rtc/m48t59-isa.c +++ b/hw/rtc/m48t59-isa.c @@ -81,7 +81,6 @@ static const Property m48t59_isa_properties[] = { DEFINE_PROP_INT32("base-year", M48txxISAState, state.base_year, 0), DEFINE_PROP_UINT32("iobase", M48txxISAState, io_base, 0x74), DEFINE_PROP_UINT8("irq", M48txxISAState, isairq, 8), - DEFINE_PROP_END_OF_LIST(), }; static void m48t59_reset_isa(DeviceState *d) diff --git a/hw/rtc/m48t59.c b/hw/rtc/m48t59.c index 5a2c7b4abdd..57c17e51336 100644 --- a/hw/rtc/m48t59.c +++ b/hw/rtc/m48t59.c @@ -620,7 +620,6 @@ static void m48txx_sysbus_toggle_lock(Nvram *obj, int lock) static const Property m48t59_sysbus_properties[] = { DEFINE_PROP_INT32("base-year", M48txxSysBusState, state.base_year, 0), - DEFINE_PROP_END_OF_LIST(), }; static void m48txx_sysbus_class_init(ObjectClass *klass, void *data) diff --git a/hw/rtc/mc146818rtc.c b/hw/rtc/mc146818rtc.c index 973ed9914d0..37f247fce88 100644 --- a/hw/rtc/mc146818rtc.c +++ b/hw/rtc/mc146818rtc.c @@ -966,7 +966,6 @@ static const Property mc146818rtc_properties[] = { DEFINE_PROP_UINT8("irq", MC146818RtcState, isairq, RTC_ISA_IRQ), DEFINE_PROP_LOSTTICKPOLICY("lost_tick_policy", MC146818RtcState, lost_tick_policy, LOST_TICK_POLICY_DISCARD), - DEFINE_PROP_END_OF_LIST(), }; static void rtc_reset_enter(Object *obj, ResetType type) diff --git a/hw/rtc/pl031.c b/hw/rtc/pl031.c index 1dc8e6e00ff..32ce5bbb99f 100644 --- a/hw/rtc/pl031.c +++ b/hw/rtc/pl031.c @@ -330,7 +330,6 @@ static const Property pl031_properties[] = { */ DEFINE_PROP_BOOL("migrate-tick-offset", PL031State, migrate_tick_offset, true), - DEFINE_PROP_END_OF_LIST() }; static void pl031_class_init(ObjectClass *klass, void *data) diff --git a/hw/rx/rx62n.c b/hw/rx/rx62n.c index dfa27bc94ef..da1a1cc00ed 100644 --- a/hw/rx/rx62n.c +++ b/hw/rx/rx62n.c @@ -262,7 +262,6 @@ static const Property rx62n_properties[] = { MemoryRegion *), DEFINE_PROP_BOOL("load-kernel", RX62NState, kernel, false), DEFINE_PROP_UINT32("xtal-frequency-hz", RX62NState, xtal_freq_hz, 0), - DEFINE_PROP_END_OF_LIST(), }; static void rx62n_class_init(ObjectClass *klass, void *data) diff --git a/hw/s390x/ccw-device.c b/hw/s390x/ccw-device.c index 0d10c3ed552..494faebb5a8 100644 --- a/hw/s390x/ccw-device.c +++ b/hw/s390x/ccw-device.c @@ -85,7 +85,6 @@ static const Property ccw_device_properties[] = { DEFINE_PROP_CSS_DEV_ID("devno", CcwDevice, devno), DEFINE_PROP_CSS_DEV_ID_RO("dev_id", CcwDevice, dev_id), DEFINE_PROP_CSS_DEV_ID_RO("subch_id", CcwDevice, subch_id), - DEFINE_PROP_END_OF_LIST(), }; static void ccw_device_reset_hold(Object *obj, ResetType type) diff --git a/hw/s390x/css-bridge.c b/hw/s390x/css-bridge.c index 860a04a7da2..04ab1f6402c 100644 --- a/hw/s390x/css-bridge.c +++ b/hw/s390x/css-bridge.c @@ -123,7 +123,6 @@ VirtualCssBus *virtual_css_bus_init(void) static const Property virtual_css_bridge_properties[] = { DEFINE_PROP_BOOL("css_dev_path", VirtualCssBridge, css_dev_path, true), - DEFINE_PROP_END_OF_LIST(), }; static bool prop_get_true(Object *obj, Error **errp) diff --git a/hw/s390x/ipl.c b/hw/s390x/ipl.c index 88a97f00854..0344c02ecec 100644 --- a/hw/s390x/ipl.c +++ b/hw/s390x/ipl.c @@ -299,7 +299,6 @@ static const Property s390_ipl_properties[] = { DEFINE_PROP_BOOL("enforce_bios", S390IPLState, enforce_bios, false), DEFINE_PROP_BOOL("iplbext_migration", S390IPLState, iplbext_migration, true), - DEFINE_PROP_END_OF_LIST(), }; static void s390_ipl_set_boot_menu(S390IPLState *ipl) diff --git a/hw/s390x/s390-pci-bus.c b/hw/s390x/s390-pci-bus.c index 22e6be67aff..5fbbf41a3db 100644 --- a/hw/s390x/s390-pci-bus.c +++ b/hw/s390x/s390-pci-bus.c @@ -1488,7 +1488,6 @@ static const Property s390_pci_device_properties[] = { DEFINE_PROP_BOOL("interpret", S390PCIBusDevice, interp, true), DEFINE_PROP_BOOL("forwarding-assist", S390PCIBusDevice, forwarding_assist, true), - DEFINE_PROP_END_OF_LIST(), }; static const VMStateDescription s390_pci_device_vmstate = { diff --git a/hw/s390x/s390-skeys.c b/hw/s390x/s390-skeys.c index 6d0a47ed731..4409e62b6a5 100644 --- a/hw/s390x/s390-skeys.c +++ b/hw/s390x/s390-skeys.c @@ -477,7 +477,6 @@ static void s390_skeys_realize(DeviceState *dev, Error **errp) static const Property s390_skeys_props[] = { DEFINE_PROP_BOOL("migration-enabled", S390SKeysState, migration_enabled, true), - DEFINE_PROP_END_OF_LIST(), }; static void s390_skeys_class_init(ObjectClass *oc, void *data) diff --git a/hw/s390x/s390-stattrib.c b/hw/s390x/s390-stattrib.c index 6c69c01e1f1..8e07acbddc9 100644 --- a/hw/s390x/s390-stattrib.c +++ b/hw/s390x/s390-stattrib.c @@ -362,7 +362,6 @@ static void s390_stattrib_realize(DeviceState *dev, Error **errp) static const Property s390_stattrib_props[] = { DEFINE_PROP_BOOL("migration-enabled", S390StAttribState, migration_enabled, true), - DEFINE_PROP_END_OF_LIST(), }; static void s390_stattrib_class_init(ObjectClass *oc, void *data) diff --git a/hw/s390x/vhost-scsi-ccw.c b/hw/s390x/vhost-scsi-ccw.c index 0be0f8a82c4..e6bf0c55bc2 100644 --- a/hw/s390x/vhost-scsi-ccw.c +++ b/hw/s390x/vhost-scsi-ccw.c @@ -44,7 +44,6 @@ static void vhost_ccw_scsi_instance_init(Object *obj) static const Property vhost_ccw_scsi_properties[] = { DEFINE_PROP_UINT32("max_revision", VirtioCcwDevice, max_rev, VIRTIO_CCW_MAX_REV), - DEFINE_PROP_END_OF_LIST(), }; static void vhost_ccw_scsi_class_init(ObjectClass *klass, void *data) diff --git a/hw/s390x/vhost-user-fs-ccw.c b/hw/s390x/vhost-user-fs-ccw.c index 934378aaec4..6a9654d77b4 100644 --- a/hw/s390x/vhost-user-fs-ccw.c +++ b/hw/s390x/vhost-user-fs-ccw.c @@ -28,7 +28,6 @@ static const Property vhost_user_fs_ccw_properties[] = { VIRTIO_CCW_FLAG_USE_IOEVENTFD_BIT, true), DEFINE_PROP_UINT32("max_revision", VirtioCcwDevice, max_rev, VIRTIO_CCW_MAX_REV), - DEFINE_PROP_END_OF_LIST(), }; static void vhost_user_fs_ccw_realize(VirtioCcwDevice *ccw_dev, Error **errp) diff --git a/hw/s390x/vhost-vsock-ccw.c b/hw/s390x/vhost-vsock-ccw.c index 3ba4008b4b6..875ccf3485e 100644 --- a/hw/s390x/vhost-vsock-ccw.c +++ b/hw/s390x/vhost-vsock-ccw.c @@ -25,7 +25,6 @@ struct VHostVSockCCWState { static const Property vhost_vsock_ccw_properties[] = { DEFINE_PROP_UINT32("max_revision", VirtioCcwDevice, max_rev, VIRTIO_CCW_MAX_REV), - DEFINE_PROP_END_OF_LIST(), }; static void vhost_vsock_ccw_realize(VirtioCcwDevice *ccw_dev, Error **errp) diff --git a/hw/s390x/virtio-ccw-9p.c b/hw/s390x/virtio-ccw-9p.c index c10b084d408..287ae2ba767 100644 --- a/hw/s390x/virtio-ccw-9p.c +++ b/hw/s390x/virtio-ccw-9p.c @@ -46,7 +46,6 @@ static const Property virtio_ccw_9p_properties[] = { VIRTIO_CCW_FLAG_USE_IOEVENTFD_BIT, true), DEFINE_PROP_UINT32("max_revision", VirtioCcwDevice, max_rev, VIRTIO_CCW_MAX_REV), - DEFINE_PROP_END_OF_LIST(), }; static void virtio_ccw_9p_class_init(ObjectClass *klass, void *data) diff --git a/hw/s390x/virtio-ccw-balloon.c b/hw/s390x/virtio-ccw-balloon.c index bbbed494b3f..1180efaf6d5 100644 --- a/hw/s390x/virtio-ccw-balloon.c +++ b/hw/s390x/virtio-ccw-balloon.c @@ -51,7 +51,6 @@ static const Property virtio_ccw_balloon_properties[] = { VIRTIO_CCW_FLAG_USE_IOEVENTFD_BIT, true), DEFINE_PROP_UINT32("max_revision", VirtioCcwDevice, max_rev, VIRTIO_CCW_MAX_REV), - DEFINE_PROP_END_OF_LIST(), }; static void virtio_ccw_balloon_class_init(ObjectClass *klass, void *data) diff --git a/hw/s390x/virtio-ccw-blk.c b/hw/s390x/virtio-ccw-blk.c index 31828512346..db9d442ffb5 100644 --- a/hw/s390x/virtio-ccw-blk.c +++ b/hw/s390x/virtio-ccw-blk.c @@ -49,7 +49,6 @@ static const Property virtio_ccw_blk_properties[] = { DEFINE_PROP_UINT32("max_revision", VirtioCcwDevice, max_rev, VIRTIO_CCW_MAX_REV), DEFINE_PROP_CCW_LOADPARM("loadparm", CcwDevice, loadparm), - DEFINE_PROP_END_OF_LIST(), }; static void virtio_ccw_blk_class_init(ObjectClass *klass, void *data) diff --git a/hw/s390x/virtio-ccw-crypto.c b/hw/s390x/virtio-ccw-crypto.c index b4cd7605c95..b693f87c70e 100644 --- a/hw/s390x/virtio-ccw-crypto.c +++ b/hw/s390x/virtio-ccw-crypto.c @@ -49,7 +49,6 @@ static const Property virtio_ccw_crypto_properties[] = { VIRTIO_CCW_FLAG_USE_IOEVENTFD_BIT, true), DEFINE_PROP_UINT32("max_revision", VirtioCcwDevice, max_rev, VIRTIO_CCW_MAX_REV), - DEFINE_PROP_END_OF_LIST(), }; static void virtio_ccw_crypto_class_init(ObjectClass *klass, void *data) diff --git a/hw/s390x/virtio-ccw-gpu.c b/hw/s390x/virtio-ccw-gpu.c index c44dc2d3559..a6b14c25d97 100644 --- a/hw/s390x/virtio-ccw-gpu.c +++ b/hw/s390x/virtio-ccw-gpu.c @@ -47,7 +47,6 @@ static const Property virtio_ccw_gpu_properties[] = { VIRTIO_CCW_FLAG_USE_IOEVENTFD_BIT, true), DEFINE_PROP_UINT32("max_revision", VirtioCcwDevice, max_rev, VIRTIO_CCW_MAX_REV), - DEFINE_PROP_END_OF_LIST(), }; static void virtio_ccw_gpu_class_init(ObjectClass *klass, void *data) diff --git a/hw/s390x/virtio-ccw-input.c b/hw/s390x/virtio-ccw-input.c index 040a9e04a9f..6ca10d58eeb 100644 --- a/hw/s390x/virtio-ccw-input.c +++ b/hw/s390x/virtio-ccw-input.c @@ -48,7 +48,6 @@ static const Property virtio_ccw_input_properties[] = { VIRTIO_CCW_FLAG_USE_IOEVENTFD_BIT, true), DEFINE_PROP_UINT32("max_revision", VirtioCcwDevice, max_rev, VIRTIO_CCW_MAX_REV), - DEFINE_PROP_END_OF_LIST(), }; static void virtio_ccw_input_class_init(ObjectClass *klass, void *data) diff --git a/hw/s390x/virtio-ccw-net.c b/hw/s390x/virtio-ccw-net.c index c41d347034e..80a5581baf8 100644 --- a/hw/s390x/virtio-ccw-net.c +++ b/hw/s390x/virtio-ccw-net.c @@ -52,7 +52,6 @@ static const Property virtio_ccw_net_properties[] = { DEFINE_PROP_UINT32("max_revision", VirtioCcwDevice, max_rev, VIRTIO_CCW_MAX_REV), DEFINE_PROP_CCW_LOADPARM("loadparm", CcwDevice, loadparm), - DEFINE_PROP_END_OF_LIST(), }; static void virtio_ccw_net_class_init(ObjectClass *klass, void *data) diff --git a/hw/s390x/virtio-ccw-rng.c b/hw/s390x/virtio-ccw-rng.c index c9a15c4eb68..ccd124ee917 100644 --- a/hw/s390x/virtio-ccw-rng.c +++ b/hw/s390x/virtio-ccw-rng.c @@ -48,7 +48,6 @@ static const Property virtio_ccw_rng_properties[] = { VIRTIO_CCW_FLAG_USE_IOEVENTFD_BIT, true), DEFINE_PROP_UINT32("max_revision", VirtioCcwDevice, max_rev, VIRTIO_CCW_MAX_REV), - DEFINE_PROP_END_OF_LIST(), }; static void virtio_ccw_rng_class_init(ObjectClass *klass, void *data) diff --git a/hw/s390x/virtio-ccw-scsi.c b/hw/s390x/virtio-ccw-scsi.c index bec9a735188..bfcea3cfe78 100644 --- a/hw/s390x/virtio-ccw-scsi.c +++ b/hw/s390x/virtio-ccw-scsi.c @@ -58,7 +58,6 @@ static const Property virtio_ccw_scsi_properties[] = { VIRTIO_CCW_FLAG_USE_IOEVENTFD_BIT, true), DEFINE_PROP_UINT32("max_revision", VirtioCcwDevice, max_rev, VIRTIO_CCW_MAX_REV), - DEFINE_PROP_END_OF_LIST(), }; static void virtio_ccw_scsi_class_init(ObjectClass *klass, void *data) diff --git a/hw/s390x/virtio-ccw-serial.c b/hw/s390x/virtio-ccw-serial.c index 037d4f9db1c..59743d1e256 100644 --- a/hw/s390x/virtio-ccw-serial.c +++ b/hw/s390x/virtio-ccw-serial.c @@ -58,7 +58,6 @@ static const Property virtio_ccw_serial_properties[] = { VIRTIO_CCW_FLAG_USE_IOEVENTFD_BIT, true), DEFINE_PROP_UINT32("max_revision", VirtioCcwDevice, max_rev, VIRTIO_CCW_MAX_REV), - DEFINE_PROP_END_OF_LIST(), }; static void virtio_ccw_serial_class_init(ObjectClass *klass, void *data) diff --git a/hw/scsi/mptsas.c b/hw/scsi/mptsas.c index a06113d9083..de628ae89b1 100644 --- a/hw/scsi/mptsas.c +++ b/hw/scsi/mptsas.c @@ -1414,7 +1414,6 @@ static const Property mptsas_properties[] = { DEFINE_PROP_UINT64("sas_address", MPTSASState, sas_addr, 0), /* TODO: test MSI support under Windows */ DEFINE_PROP_ON_OFF_AUTO("msi", MPTSASState, msi, ON_OFF_AUTO_AUTO), - DEFINE_PROP_END_OF_LIST(), }; static void mptsas1068_class_init(ObjectClass *oc, void *data) diff --git a/hw/scsi/scsi-bus.c b/hw/scsi/scsi-bus.c index 2f1678d51e7..181720b7a8c 100644 --- a/hw/scsi/scsi-bus.c +++ b/hw/scsi/scsi-bus.c @@ -1947,7 +1947,6 @@ static const Property scsi_props[] = { DEFINE_PROP_UINT32("channel", SCSIDevice, channel, 0), DEFINE_PROP_UINT32("scsi-id", SCSIDevice, id, -1), DEFINE_PROP_UINT32("lun", SCSIDevice, lun, -1), - DEFINE_PROP_END_OF_LIST(), }; static void scsi_device_class_init(ObjectClass *klass, void *data) diff --git a/hw/scsi/scsi-disk.c b/hw/scsi/scsi-disk.c index a47b80907f1..16351b49883 100644 --- a/hw/scsi/scsi-disk.c +++ b/hw/scsi/scsi-disk.c @@ -3227,7 +3227,6 @@ static const Property scsi_hd_properties[] = { quirks, SCSI_DISK_QUIRK_MODE_PAGE_VENDOR_SPECIFIC_APPLE, 0), DEFINE_BLOCK_CHS_PROPERTIES(SCSIDiskState, qdev.conf), - DEFINE_PROP_END_OF_LIST(), }; static const VMStateDescription vmstate_scsi_disk_state = { @@ -3285,7 +3284,6 @@ static const Property scsi_cd_properties[] = { 0), DEFINE_PROP_BIT("quirk_mode_page_truncated", SCSIDiskState, quirks, SCSI_DISK_QUIRK_MODE_PAGE_TRUNCATED, 0), - DEFINE_PROP_END_OF_LIST(), }; static void scsi_cd_class_initfn(ObjectClass *klass, void *data) @@ -3323,7 +3321,6 @@ static const Property scsi_block_properties[] = { -1), DEFINE_PROP_UINT32("io_timeout", SCSIDiskState, qdev.io_timeout, DEFAULT_IO_TIMEOUT), - DEFINE_PROP_END_OF_LIST(), }; static void scsi_block_class_initfn(ObjectClass *klass, void *data) diff --git a/hw/scsi/scsi-generic.c b/hw/scsi/scsi-generic.c index d7ae7549d06..0290a196ccd 100644 --- a/hw/scsi/scsi-generic.c +++ b/hw/scsi/scsi-generic.c @@ -777,7 +777,6 @@ static const Property scsi_generic_properties[] = { DEFINE_PROP_BOOL("share-rw", SCSIDevice, conf.share_rw, false), DEFINE_PROP_UINT32("io_timeout", SCSIDevice, io_timeout, DEFAULT_IO_TIMEOUT), - DEFINE_PROP_END_OF_LIST(), }; static int scsi_generic_parse_cdb(SCSIDevice *dev, SCSICommand *cmd, diff --git a/hw/scsi/spapr_vscsi.c b/hw/scsi/spapr_vscsi.c index 7c55e4d40f2..6962194eaac 100644 --- a/hw/scsi/spapr_vscsi.c +++ b/hw/scsi/spapr_vscsi.c @@ -1252,7 +1252,6 @@ static int spapr_vscsi_devnode(SpaprVioDevice *dev, void *fdt, int node_off) static const Property spapr_vscsi_properties[] = { DEFINE_SPAPR_PROPERTIES(VSCSIState, vdev), - DEFINE_PROP_END_OF_LIST(), }; static const VMStateDescription vmstate_spapr_vscsi = { diff --git a/hw/scsi/vhost-scsi.c b/hw/scsi/vhost-scsi.c index effb8dab1f0..9f760663a00 100644 --- a/hw/scsi/vhost-scsi.c +++ b/hw/scsi/vhost-scsi.c @@ -362,7 +362,6 @@ static const Property vhost_scsi_properties[] = { DEFINE_PROP_BOOL("migratable", VHostSCSICommon, migratable, false), DEFINE_PROP_BOOL("worker_per_virtqueue", VirtIOSCSICommon, conf.worker_per_virtqueue, false), - DEFINE_PROP_END_OF_LIST(), }; static void vhost_scsi_class_init(ObjectClass *klass, void *data) diff --git a/hw/scsi/vhost-user-scsi.c b/hw/scsi/vhost-user-scsi.c index d5265c57bce..689bc6c13ec 100644 --- a/hw/scsi/vhost-user-scsi.c +++ b/hw/scsi/vhost-user-scsi.c @@ -360,7 +360,6 @@ static const Property vhost_user_scsi_properties[] = { DEFINE_PROP_BIT64("t10_pi", VHostSCSICommon, host_features, VIRTIO_SCSI_F_T10_PI, false), - DEFINE_PROP_END_OF_LIST(), }; static void vhost_user_scsi_reset(VirtIODevice *vdev) diff --git a/hw/scsi/virtio-scsi.c b/hw/scsi/virtio-scsi.c index c0a4f1a6208..eb70a7a46e5 100644 --- a/hw/scsi/virtio-scsi.c +++ b/hw/scsi/virtio-scsi.c @@ -1302,7 +1302,6 @@ static const Property virtio_scsi_properties[] = { VIRTIO_SCSI_F_CHANGE, true), DEFINE_PROP_LINK("iothread", VirtIOSCSI, parent_obj.conf.iothread, TYPE_IOTHREAD, IOThread *), - DEFINE_PROP_END_OF_LIST(), }; static const VMStateDescription vmstate_virtio_scsi = { diff --git a/hw/scsi/vmw_pvscsi.c b/hw/scsi/vmw_pvscsi.c index 46cec531cc2..f07e377cb88 100644 --- a/hw/scsi/vmw_pvscsi.c +++ b/hw/scsi/vmw_pvscsi.c @@ -1302,7 +1302,6 @@ static const Property pvscsi_properties[] = { PVSCSI_COMPAT_OLD_PCI_CONFIGURATION_BIT, false), DEFINE_PROP_BIT("x-disable-pcie", PVSCSIState, compat_flags, PVSCSI_COMPAT_DISABLE_PCIE_BIT, false), - DEFINE_PROP_END_OF_LIST(), }; static void pvscsi_realize(DeviceState *qdev, Error **errp) diff --git a/hw/sd/allwinner-sdhost.c b/hw/sd/allwinner-sdhost.c index be39ec2e71a..0b235bccfd2 100644 --- a/hw/sd/allwinner-sdhost.c +++ b/hw/sd/allwinner-sdhost.c @@ -811,7 +811,6 @@ static const VMStateDescription vmstate_allwinner_sdhost = { static const Property allwinner_sdhost_properties[] = { DEFINE_PROP_LINK("dma-memory", AwSdHostState, dma_mr, TYPE_MEMORY_REGION, MemoryRegion *), - DEFINE_PROP_END_OF_LIST(), }; static void allwinner_sdhost_init(Object *obj) diff --git a/hw/sd/aspeed_sdhci.c b/hw/sd/aspeed_sdhci.c index 99703f18429..12cbbae5e77 100644 --- a/hw/sd/aspeed_sdhci.c +++ b/hw/sd/aspeed_sdhci.c @@ -206,7 +206,6 @@ static const VMStateDescription vmstate_aspeed_sdhci = { static const Property aspeed_sdhci_properties[] = { DEFINE_PROP_UINT8("num-slots", AspeedSDHCIState, num_slots, 0), - DEFINE_PROP_END_OF_LIST(), }; static void aspeed_sdhci_class_init(ObjectClass *classp, void *data) diff --git a/hw/sd/sd.c b/hw/sd/sd.c index b994ef581e6..779bac6631f 100644 --- a/hw/sd/sd.c +++ b/hw/sd/sd.c @@ -2800,19 +2800,16 @@ static void emmc_realize(DeviceState *dev, Error **errp) static const Property sdmmc_common_properties[] = { DEFINE_PROP_DRIVE("drive", SDState, blk), - DEFINE_PROP_END_OF_LIST() }; static const Property sd_properties[] = { DEFINE_PROP_UINT8("spec_version", SDState, spec_version, SD_PHY_SPECv3_01_VERS), - DEFINE_PROP_END_OF_LIST() }; static const Property emmc_properties[] = { DEFINE_PROP_UINT64("boot-partition-size", SDState, boot_part_size, 0), DEFINE_PROP_UINT8("boot-config", SDState, boot_config, 0x0), - DEFINE_PROP_END_OF_LIST() }; static void sdmmc_common_class_init(ObjectClass *klass, void *data) diff --git a/hw/sd/sdhci-pci.c b/hw/sd/sdhci-pci.c index 83892a7a152..5268c0dee50 100644 --- a/hw/sd/sdhci-pci.c +++ b/hw/sd/sdhci-pci.c @@ -24,7 +24,6 @@ static const Property sdhci_pci_properties[] = { DEFINE_SDHCI_COMMON_PROPERTIES(SDHCIState), - DEFINE_PROP_END_OF_LIST(), }; static void sdhci_pci_realize(PCIDevice *dev, Error **errp) diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index e697ee05b38..64a936fcf06 100644 --- a/hw/sd/sdhci.c +++ b/hw/sd/sdhci.c @@ -1550,7 +1550,6 @@ static const Property sdhci_sysbus_properties[] = { false), DEFINE_PROP_LINK("dma", SDHCIState, dma_mr, TYPE_MEMORY_REGION, MemoryRegion *), - DEFINE_PROP_END_OF_LIST(), }; static void sdhci_sysbus_init(Object *obj) diff --git a/hw/sparc/sun4m_iommu.c b/hw/sparc/sun4m_iommu.c index 3d6fcdf5760..8c1fc82534f 100644 --- a/hw/sparc/sun4m_iommu.c +++ b/hw/sparc/sun4m_iommu.c @@ -370,7 +370,6 @@ static void iommu_init(Object *obj) static const Property iommu_properties[] = { DEFINE_PROP_UINT32("version", IOMMUState, version, 0), - DEFINE_PROP_END_OF_LIST(), }; static void iommu_class_init(ObjectClass *klass, void *data) diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c index 05b8c7369e2..b6f65e8d2fe 100644 --- a/hw/sparc64/sun4u.c +++ b/hw/sparc64/sun4u.c @@ -377,7 +377,6 @@ static void ebus_realize(PCIDevice *pci_dev, Error **errp) static const Property ebus_properties[] = { DEFINE_PROP_UINT64("console-serial-base", EbusState, console_serial_base, 0), - DEFINE_PROP_END_OF_LIST(), }; static void ebus_class_init(ObjectClass *klass, void *data) @@ -529,7 +528,6 @@ static void ram_init(hwaddr addr, ram_addr_t RAM_size) static const Property ram_properties[] = { DEFINE_PROP_UINT64("size", RamDevice, size, 0), - DEFINE_PROP_END_OF_LIST(), }; static void ram_class_init(ObjectClass *klass, void *data) diff --git a/hw/ssi/aspeed_smc.c b/hw/ssi/aspeed_smc.c index bbdd4e47869..faef1a8e5b8 100644 --- a/hw/ssi/aspeed_smc.c +++ b/hw/ssi/aspeed_smc.c @@ -1292,7 +1292,6 @@ static const Property aspeed_smc_properties[] = { DEFINE_PROP_UINT64("dram-base", AspeedSMCState, dram_base, 0), DEFINE_PROP_LINK("dram", AspeedSMCState, dram_mr, TYPE_MEMORY_REGION, MemoryRegion *), - DEFINE_PROP_END_OF_LIST(), }; static void aspeed_smc_class_init(ObjectClass *klass, void *data) @@ -1340,7 +1339,6 @@ static const Property aspeed_smc_flash_properties[] = { DEFINE_PROP_UINT8("cs", AspeedSMCFlash, cs, 0), DEFINE_PROP_LINK("controller", AspeedSMCFlash, controller, TYPE_ASPEED_SMC, AspeedSMCState *), - DEFINE_PROP_END_OF_LIST(), }; static void aspeed_smc_flash_class_init(ObjectClass *klass, void *data) diff --git a/hw/ssi/ibex_spi_host.c b/hw/ssi/ibex_spi_host.c index 60a0b17b628..46c7b633c26 100644 --- a/hw/ssi/ibex_spi_host.c +++ b/hw/ssi/ibex_spi_host.c @@ -563,7 +563,6 @@ static const MemoryRegionOps ibex_spi_ops = { static const Property ibex_spi_properties[] = { DEFINE_PROP_UINT32("num_cs", IbexSPIHostState, num_cs, 1), - DEFINE_PROP_END_OF_LIST(), }; static const VMStateDescription vmstate_ibex = { diff --git a/hw/ssi/npcm7xx_fiu.c b/hw/ssi/npcm7xx_fiu.c index fdd3ad2fdc7..21fc4890383 100644 --- a/hw/ssi/npcm7xx_fiu.c +++ b/hw/ssi/npcm7xx_fiu.c @@ -543,7 +543,6 @@ static const VMStateDescription vmstate_npcm7xx_fiu = { static const Property npcm7xx_fiu_properties[] = { DEFINE_PROP_INT32("cs-count", NPCM7xxFIUState, cs_count, 0), - DEFINE_PROP_END_OF_LIST(), }; static void npcm7xx_fiu_class_init(ObjectClass *klass, void *data) diff --git a/hw/ssi/pnv_spi.c b/hw/ssi/pnv_spi.c index 4ca9c469a4b..15e25bd1be3 100644 --- a/hw/ssi/pnv_spi.c +++ b/hw/ssi/pnv_spi.c @@ -1198,7 +1198,6 @@ static const MemoryRegionOps pnv_spi_xscom_ops = { static const Property pnv_spi_properties[] = { DEFINE_PROP_UINT32("spic_num", PnvSpi, spic_num, 0), DEFINE_PROP_UINT8("transfer_len", PnvSpi, transfer_len, 4), - DEFINE_PROP_END_OF_LIST(), }; static void pnv_spi_realize(DeviceState *dev, Error **errp) diff --git a/hw/ssi/sifive_spi.c b/hw/ssi/sifive_spi.c index 74587477793..76f8654f412 100644 --- a/hw/ssi/sifive_spi.c +++ b/hw/ssi/sifive_spi.c @@ -330,7 +330,6 @@ static void sifive_spi_realize(DeviceState *dev, Error **errp) static const Property sifive_spi_properties[] = { DEFINE_PROP_UINT32("num-cs", SiFiveSPIState, num_cs, 1), - DEFINE_PROP_END_OF_LIST(), }; static void sifive_spi_class_init(ObjectClass *klass, void *data) diff --git a/hw/ssi/ssi.c b/hw/ssi/ssi.c index cab0014c3f0..872c4e8036e 100644 --- a/hw/ssi/ssi.c +++ b/hw/ssi/ssi.c @@ -110,7 +110,6 @@ static void ssi_peripheral_realize(DeviceState *dev, Error **errp) static const Property ssi_peripheral_properties[] = { DEFINE_PROP_UINT8("cs", SSIPeripheral, cs_index, 0), - DEFINE_PROP_END_OF_LIST(), }; static void ssi_peripheral_class_init(ObjectClass *klass, void *data) diff --git a/hw/ssi/xilinx_spi.c b/hw/ssi/xilinx_spi.c index 588c1ec071c..fd1ff12eb1d 100644 --- a/hw/ssi/xilinx_spi.c +++ b/hw/ssi/xilinx_spi.c @@ -363,7 +363,6 @@ static const VMStateDescription vmstate_xilinx_spi = { static const Property xilinx_spi_properties[] = { DEFINE_PROP_UINT8("num-ss-bits", XilinxSPI, num_cs, 1), - DEFINE_PROP_END_OF_LIST(), }; static void xilinx_spi_class_init(ObjectClass *klass, void *data) diff --git a/hw/ssi/xilinx_spips.c b/hw/ssi/xilinx_spips.c index f72cb3cbc87..984c1780872 100644 --- a/hw/ssi/xilinx_spips.c +++ b/hw/ssi/xilinx_spips.c @@ -1422,14 +1422,12 @@ static const VMStateDescription vmstate_xlnx_zynqmp_qspips = { static const Property xilinx_zynqmp_qspips_properties[] = { DEFINE_PROP_UINT32("dma-burst-size", XlnxZynqMPQSPIPS, dma_burst_size, 64), - DEFINE_PROP_END_OF_LIST(), }; static const Property xilinx_spips_properties[] = { DEFINE_PROP_UINT8("num-busses", XilinxSPIPS, num_busses, 1), DEFINE_PROP_UINT8("num-ss-bits", XilinxSPIPS, num_cs, 4), DEFINE_PROP_UINT8("num-txrx-bytes", XilinxSPIPS, num_txrx_bytes, 1), - DEFINE_PROP_END_OF_LIST(), }; static void xilinx_qspips_class_init(ObjectClass *klass, void * data) diff --git a/hw/ssi/xlnx-versal-ospi.c b/hw/ssi/xlnx-versal-ospi.c index e51abe9de2c..9e96c9b69af 100644 --- a/hw/ssi/xlnx-versal-ospi.c +++ b/hw/ssi/xlnx-versal-ospi.c @@ -1829,7 +1829,6 @@ static const Property xlnx_versal_ospi_properties[] = { DEFINE_PROP_BOOL("dac-with-indac", XlnxVersalOspi, dac_with_indac, false), DEFINE_PROP_BOOL("indac-write-disabled", XlnxVersalOspi, ind_write_disabled, false), - DEFINE_PROP_END_OF_LIST(), }; static void xlnx_versal_ospi_class_init(ObjectClass *klass, void *data) diff --git a/hw/timer/a9gtimer.c b/hw/timer/a9gtimer.c index c0a91bab0c8..0c4eef2636a 100644 --- a/hw/timer/a9gtimer.c +++ b/hw/timer/a9gtimer.c @@ -375,7 +375,6 @@ static const VMStateDescription vmstate_a9_gtimer = { static const Property a9_gtimer_properties[] = { DEFINE_PROP_UINT32("num-cpu", A9GTimerState, num_cpu, 0), - DEFINE_PROP_END_OF_LIST() }; static void a9_gtimer_class_init(ObjectClass *klass, void *data) diff --git a/hw/timer/allwinner-a10-pit.c b/hw/timer/allwinner-a10-pit.c index 2904ccfb423..ddaf2128c2d 100644 --- a/hw/timer/allwinner-a10-pit.c +++ b/hw/timer/allwinner-a10-pit.c @@ -193,7 +193,6 @@ static const Property a10_pit_properties[] = { DEFINE_PROP_UINT32("clk1-freq", AwA10PITState, clk_freq[1], 0), DEFINE_PROP_UINT32("clk2-freq", AwA10PITState, clk_freq[2], 0), DEFINE_PROP_UINT32("clk3-freq", AwA10PITState, clk_freq[3], 0), - DEFINE_PROP_END_OF_LIST(), }; static const VMStateDescription vmstate_a10_pit = { diff --git a/hw/timer/arm_mptimer.c b/hw/timer/arm_mptimer.c index 6244a7a84f3..803dad1e8a6 100644 --- a/hw/timer/arm_mptimer.c +++ b/hw/timer/arm_mptimer.c @@ -302,7 +302,6 @@ static const VMStateDescription vmstate_arm_mptimer = { static const Property arm_mptimer_properties[] = { DEFINE_PROP_UINT32("num-cpu", ARMMPTimerState, num_cpu, 0), - DEFINE_PROP_END_OF_LIST() }; static void arm_mptimer_class_init(ObjectClass *klass, void *data) diff --git a/hw/timer/arm_timer.c b/hw/timer/arm_timer.c index dfa034296c0..1213b77aa09 100644 --- a/hw/timer/arm_timer.c +++ b/hw/timer/arm_timer.c @@ -390,7 +390,6 @@ static const TypeInfo icp_pit_info = { static const Property sp804_properties[] = { DEFINE_PROP_UINT32("freq0", SP804State, freq0, 1000000), DEFINE_PROP_UINT32("freq1", SP804State, freq1, 1000000), - DEFINE_PROP_END_OF_LIST(), }; static void sp804_class_init(ObjectClass *klass, void *data) diff --git a/hw/timer/aspeed_timer.c b/hw/timer/aspeed_timer.c index 4c16b5016e0..4868651ad48 100644 --- a/hw/timer/aspeed_timer.c +++ b/hw/timer/aspeed_timer.c @@ -677,7 +677,6 @@ static const VMStateDescription vmstate_aspeed_timer_state = { static const Property aspeed_timer_properties[] = { DEFINE_PROP_LINK("scu", AspeedTimerCtrlState, scu, TYPE_ASPEED_SCU, AspeedSCUState *), - DEFINE_PROP_END_OF_LIST(), }; static void timer_class_init(ObjectClass *klass, void *data) diff --git a/hw/timer/avr_timer16.c b/hw/timer/avr_timer16.c index 2e3ce83c431..96baf9cf605 100644 --- a/hw/timer/avr_timer16.c +++ b/hw/timer/avr_timer16.c @@ -546,7 +546,6 @@ static const Property avr_timer16_properties[] = { DEFINE_PROP_UINT8("id", struct AVRTimer16State, id, 0), DEFINE_PROP_UINT64("cpu-frequency-hz", struct AVRTimer16State, cpu_freq_hz, 0), - DEFINE_PROP_END_OF_LIST(), }; static void avr_timer16_pr(void *opaque, int irq, int level) diff --git a/hw/timer/grlib_gptimer.c b/hw/timer/grlib_gptimer.c index a7428ed938c..f0802b6eb6d 100644 --- a/hw/timer/grlib_gptimer.c +++ b/hw/timer/grlib_gptimer.c @@ -407,7 +407,6 @@ static const Property grlib_gptimer_properties[] = { DEFINE_PROP_UINT32("frequency", GPTimerUnit, freq_hz, 40000000), DEFINE_PROP_UINT32("irq-line", GPTimerUnit, irq_line, 8), DEFINE_PROP_UINT32("nr-timers", GPTimerUnit, nr_timers, 2), - DEFINE_PROP_END_OF_LIST(), }; static void grlib_gptimer_class_init(ObjectClass *klass, void *data) diff --git a/hw/timer/hpet.c b/hw/timer/hpet.c index 46886c379ed..2a45410c0da 100644 --- a/hw/timer/hpet.c +++ b/hw/timer/hpet.c @@ -750,7 +750,6 @@ static const Property hpet_device_properties[] = { DEFINE_PROP_BIT("msi", HPETState, flags, HPET_MSI_SUPPORT, false), DEFINE_PROP_UINT32(HPET_INTCAP, HPETState, intcap, 0), DEFINE_PROP_BOOL("hpet-offset-saved", HPETState, hpet_offset_saved, true), - DEFINE_PROP_END_OF_LIST(), }; static void hpet_device_class_init(ObjectClass *klass, void *data) diff --git a/hw/timer/i8254_common.c b/hw/timer/i8254_common.c index 953c1e11eb3..29105afcc33 100644 --- a/hw/timer/i8254_common.c +++ b/hw/timer/i8254_common.c @@ -240,7 +240,6 @@ static const VMStateDescription vmstate_pit_common = { static const Property pit_common_properties[] = { DEFINE_PROP_UINT32("iobase", PITCommonState, iobase, -1), - DEFINE_PROP_END_OF_LIST(), }; static void pit_common_class_init(ObjectClass *klass, void *data) diff --git a/hw/timer/ibex_timer.c b/hw/timer/ibex_timer.c index fba4466a898..3ebc8700973 100644 --- a/hw/timer/ibex_timer.c +++ b/hw/timer/ibex_timer.c @@ -265,7 +265,6 @@ static const VMStateDescription vmstate_ibex_timer = { static const Property ibex_timer_properties[] = { DEFINE_PROP_UINT32("timebase-freq", IbexTimerState, timebase_freq, 10000), - DEFINE_PROP_END_OF_LIST(), }; static void ibex_timer_init(Object *obj) diff --git a/hw/timer/mss-timer.c b/hw/timer/mss-timer.c index e5c5cd6a84e..594da64eae6 100644 --- a/hw/timer/mss-timer.c +++ b/hw/timer/mss-timer.c @@ -283,7 +283,6 @@ static const Property mss_timer_properties[] = { /* Libero GUI shows 100Mhz as default for clocks */ DEFINE_PROP_UINT32("clock-frequency", MSSTimerState, freq_hz, 100 * 1000000), - DEFINE_PROP_END_OF_LIST(), }; static void mss_timer_class_init(ObjectClass *klass, void *data) diff --git a/hw/timer/nrf51_timer.c b/hw/timer/nrf51_timer.c index 48fccec1bfc..11ad8b575e4 100644 --- a/hw/timer/nrf51_timer.c +++ b/hw/timer/nrf51_timer.c @@ -381,7 +381,6 @@ static const VMStateDescription vmstate_nrf51_timer = { static const Property nrf51_timer_properties[] = { DEFINE_PROP_UINT8("id", NRF51TimerState, id, 0), - DEFINE_PROP_END_OF_LIST(), }; static void nrf51_timer_class_init(ObjectClass *klass, void *data) diff --git a/hw/timer/pxa2xx_timer.c b/hw/timer/pxa2xx_timer.c index 345145bfa80..6ec3fa54dd8 100644 --- a/hw/timer/pxa2xx_timer.c +++ b/hw/timer/pxa2xx_timer.c @@ -553,7 +553,6 @@ static const Property pxa25x_timer_dev_properties[] = { DEFINE_PROP_UINT32("freq", PXA2xxTimerInfo, freq, PXA25X_FREQ), DEFINE_PROP_BIT("tm4", PXA2xxTimerInfo, flags, PXA2XX_TIMER_HAVE_TM4, false), - DEFINE_PROP_END_OF_LIST(), }; static void pxa25x_timer_dev_class_init(ObjectClass *klass, void *data) diff --git a/hw/timer/renesas_cmt.c b/hw/timer/renesas_cmt.c index 6d451fa86b3..93e7f58cc20 100644 --- a/hw/timer/renesas_cmt.c +++ b/hw/timer/renesas_cmt.c @@ -255,7 +255,6 @@ static const VMStateDescription vmstate_rcmt = { static const Property rcmt_properties[] = { DEFINE_PROP_UINT64("input-freq", RCMTState, input_freq, 0), - DEFINE_PROP_END_OF_LIST(), }; static void rcmt_class_init(ObjectClass *klass, void *data) diff --git a/hw/timer/renesas_tmr.c b/hw/timer/renesas_tmr.c index 890f803cf8f..884349c2cc2 100644 --- a/hw/timer/renesas_tmr.c +++ b/hw/timer/renesas_tmr.c @@ -465,7 +465,6 @@ static const VMStateDescription vmstate_rtmr = { static const Property rtmr_properties[] = { DEFINE_PROP_UINT64("input-freq", RTMRState, input_freq, 0), - DEFINE_PROP_END_OF_LIST(), }; static void rtmr_class_init(ObjectClass *klass, void *data) diff --git a/hw/timer/sifive_pwm.c b/hw/timer/sifive_pwm.c index 042c89c67a9..fc796e9bc30 100644 --- a/hw/timer/sifive_pwm.c +++ b/hw/timer/sifive_pwm.c @@ -408,7 +408,6 @@ static const Property sifive_pwm_properties[] = { /* 0.5Ghz per spec after FSBL */ DEFINE_PROP_UINT64("clock-frequency", struct SiFivePwmState, freq_hz, 500000000ULL), - DEFINE_PROP_END_OF_LIST(), }; static void sifive_pwm_init(Object *obj) diff --git a/hw/timer/slavio_timer.c b/hw/timer/slavio_timer.c index 32991f44363..65b24e4f06b 100644 --- a/hw/timer/slavio_timer.c +++ b/hw/timer/slavio_timer.c @@ -422,7 +422,6 @@ static void slavio_timer_init(Object *obj) static const Property slavio_timer_properties[] = { DEFINE_PROP_UINT32("num_cpus", SLAVIO_TIMERState, num_cpus, 0), - DEFINE_PROP_END_OF_LIST(), }; static void slavio_timer_class_init(ObjectClass *klass, void *data) diff --git a/hw/timer/sse-timer.c b/hw/timer/sse-timer.c index 6b7a67941c4..e106739ea9c 100644 --- a/hw/timer/sse-timer.c +++ b/hw/timer/sse-timer.c @@ -442,7 +442,6 @@ static const VMStateDescription sse_timer_vmstate = { static const Property sse_timer_properties[] = { DEFINE_PROP_LINK("counter", SSETimer, counter, TYPE_SSE_COUNTER, SSECounter *), - DEFINE_PROP_END_OF_LIST(), }; static void sse_timer_class_init(ObjectClass *klass, void *data) diff --git a/hw/timer/stm32f2xx_timer.c b/hw/timer/stm32f2xx_timer.c index d9d745cd76f..4707190d6a2 100644 --- a/hw/timer/stm32f2xx_timer.c +++ b/hw/timer/stm32f2xx_timer.c @@ -301,7 +301,6 @@ static const VMStateDescription vmstate_stm32f2xx_timer = { static const Property stm32f2xx_timer_properties[] = { DEFINE_PROP_UINT64("clock-frequency", struct STM32F2XXTimerState, freq_hz, 1000000000), - DEFINE_PROP_END_OF_LIST(), }; static void stm32f2xx_timer_init(Object *obj) diff --git a/hw/timer/xilinx_timer.c b/hw/timer/xilinx_timer.c index 7fe3e83baa5..4955fe1b01b 100644 --- a/hw/timer/xilinx_timer.c +++ b/hw/timer/xilinx_timer.c @@ -245,7 +245,6 @@ static void xilinx_timer_init(Object *obj) static const Property xilinx_timer_properties[] = { DEFINE_PROP_UINT32("clock-frequency", XpsTimerState, freq_hz, 62 * 1000000), DEFINE_PROP_UINT8("one-timer-only", XpsTimerState, one_timer_only, 0), - DEFINE_PROP_END_OF_LIST(), }; static void xilinx_timer_class_init(ObjectClass *klass, void *data) diff --git a/hw/tpm/tpm_crb.c b/hw/tpm/tpm_crb.c index 2bf6e7ffe96..e652679a1fc 100644 --- a/hw/tpm/tpm_crb.c +++ b/hw/tpm/tpm_crb.c @@ -229,7 +229,6 @@ static const VMStateDescription vmstate_tpm_crb = { static const Property tpm_crb_properties[] = { DEFINE_PROP_TPMBE("tpmdev", CRBState, tpmbe), DEFINE_PROP_BOOL("ppi", CRBState, ppi_enabled, true), - DEFINE_PROP_END_OF_LIST(), }; static void tpm_crb_reset(void *dev) diff --git a/hw/tpm/tpm_spapr.c b/hw/tpm/tpm_spapr.c index e15b67dd45e..797fd8b290e 100644 --- a/hw/tpm/tpm_spapr.c +++ b/hw/tpm/tpm_spapr.c @@ -367,7 +367,6 @@ static const VMStateDescription vmstate_spapr_vtpm = { static const Property tpm_spapr_properties[] = { DEFINE_SPAPR_PROPERTIES(SpaprTpmState, vdev), DEFINE_PROP_TPMBE("tpmdev", SpaprTpmState, be_driver), - DEFINE_PROP_END_OF_LIST(), }; static void tpm_spapr_realizefn(SpaprVioDevice *dev, Error **errp) diff --git a/hw/tpm/tpm_tis_i2c.c b/hw/tpm/tpm_tis_i2c.c index b27af230cdc..504328e3b0d 100644 --- a/hw/tpm/tpm_tis_i2c.c +++ b/hw/tpm/tpm_tis_i2c.c @@ -493,7 +493,6 @@ static int tpm_tis_i2c_send(I2CSlave *i2c, uint8_t data) static const Property tpm_tis_i2c_properties[] = { DEFINE_PROP_TPMBE("tpmdev", TPMStateI2C, state.be_driver), - DEFINE_PROP_END_OF_LIST(), }; static void tpm_tis_i2c_realizefn(DeviceState *dev, Error **errp) diff --git a/hw/tpm/tpm_tis_isa.c b/hw/tpm/tpm_tis_isa.c index 9b2160972a9..876cb02cb51 100644 --- a/hw/tpm/tpm_tis_isa.c +++ b/hw/tpm/tpm_tis_isa.c @@ -95,7 +95,6 @@ static const Property tpm_tis_isa_properties[] = { DEFINE_PROP_UINT32("irq", TPMStateISA, state.irq_num, TPM_TIS_IRQ), DEFINE_PROP_TPMBE("tpmdev", TPMStateISA, state.be_driver), DEFINE_PROP_BOOL("ppi", TPMStateISA, state.ppi_enabled, true), - DEFINE_PROP_END_OF_LIST(), }; static void tpm_tis_isa_initfn(Object *obj) diff --git a/hw/tpm/tpm_tis_sysbus.c b/hw/tpm/tpm_tis_sysbus.c index 88c1f1e4788..ee0bfe9538e 100644 --- a/hw/tpm/tpm_tis_sysbus.c +++ b/hw/tpm/tpm_tis_sysbus.c @@ -93,7 +93,6 @@ static void tpm_tis_sysbus_reset(DeviceState *dev) static const Property tpm_tis_sysbus_properties[] = { DEFINE_PROP_UINT32("irq", TPMStateSysBus, state.irq_num, TPM_TIS_IRQ), DEFINE_PROP_TPMBE("tpmdev", TPMStateSysBus, state.be_driver), - DEFINE_PROP_END_OF_LIST(), }; static void tpm_tis_sysbus_initfn(Object *obj) diff --git a/hw/ufs/lu.c b/hw/ufs/lu.c index 74ff52ad096..4100ea28e29 100644 --- a/hw/ufs/lu.c +++ b/hw/ufs/lu.c @@ -277,7 +277,6 @@ static UfsReqResult ufs_process_scsi_cmd(UfsLu *lu, UfsRequest *req) static const Property ufs_lu_props[] = { DEFINE_PROP_DRIVE("drive", UfsLu, conf.blk), DEFINE_PROP_UINT8("lun", UfsLu, lun, 0), - DEFINE_PROP_END_OF_LIST(), }; static bool ufs_add_lu(UfsHc *u, UfsLu *lu, Error **errp) diff --git a/hw/ufs/ufs.c b/hw/ufs/ufs.c index fe77158439d..8d26d137918 100644 --- a/hw/ufs/ufs.c +++ b/hw/ufs/ufs.c @@ -1758,7 +1758,6 @@ static const Property ufs_props[] = { DEFINE_PROP_UINT8("nutmrs", UfsHc, params.nutmrs, 8), DEFINE_PROP_BOOL("mcq", UfsHc, params.mcq, false), DEFINE_PROP_UINT8("mcq-maxq", UfsHc, params.mcq_maxq, 2), - DEFINE_PROP_END_OF_LIST(), }; static const VMStateDescription ufs_vmstate = { diff --git a/hw/usb/bus.c b/hw/usb/bus.c index 80e6a928202..7e4ff36fed2 100644 --- a/hw/usb/bus.c +++ b/hw/usb/bus.c @@ -24,7 +24,6 @@ static const Property usb_props[] = { DEFINE_PROP_BIT("msos-desc", USBDevice, flags, USB_DEV_FLAG_MSOS_DESC_ENABLE, true), DEFINE_PROP_STRING("pcap", USBDevice, pcap_filename), - DEFINE_PROP_END_OF_LIST() }; static void usb_bus_class_init(ObjectClass *klass, void *data) diff --git a/hw/usb/canokey.c b/hw/usb/canokey.c index 7cb600e3c86..fae212f0530 100644 --- a/hw/usb/canokey.c +++ b/hw/usb/canokey.c @@ -298,7 +298,6 @@ static void canokey_unrealize(USBDevice *base) static const Property canokey_properties[] = { DEFINE_PROP_STRING("file", CanoKeyState, file), - DEFINE_PROP_END_OF_LIST(), }; static void canokey_class_init(ObjectClass *klass, void *data) diff --git a/hw/usb/ccid-card-emulated.c b/hw/usb/ccid-card-emulated.c index dd58333943b..b1e330f21d7 100644 --- a/hw/usb/ccid-card-emulated.c +++ b/hw/usb/ccid-card-emulated.c @@ -589,7 +589,6 @@ static const Property emulated_card_properties[] = { DEFINE_PROP_STRING("cert3", EmulatedState, cert3), DEFINE_PROP_STRING("db", EmulatedState, db), DEFINE_PROP_UINT8("debug", EmulatedState, debug, 0), - DEFINE_PROP_END_OF_LIST(), }; static void emulated_class_initfn(ObjectClass *klass, void *data) diff --git a/hw/usb/ccid-card-passthru.c b/hw/usb/ccid-card-passthru.c index f97dcf767f5..bf81485f876 100644 --- a/hw/usb/ccid-card-passthru.c +++ b/hw/usb/ccid-card-passthru.c @@ -391,7 +391,6 @@ static const VMStateDescription passthru_vmstate = { static const Property passthru_card_properties[] = { DEFINE_PROP_CHR("chardev", PassthruState, cs), DEFINE_PROP_UINT8("debug", PassthruState, debug, 0), - DEFINE_PROP_END_OF_LIST(), }; static void passthru_class_initfn(ObjectClass *klass, void *data) diff --git a/hw/usb/dev-audio.c b/hw/usb/dev-audio.c index 6007f16d30b..40f031252a7 100644 --- a/hw/usb/dev-audio.c +++ b/hw/usb/dev-audio.c @@ -995,7 +995,6 @@ static const Property usb_audio_properties[] = { DEFINE_PROP_UINT32("debug", USBAudioState, debug, 0), DEFINE_PROP_UINT32("buffer", USBAudioState, buffer_user, 0), DEFINE_PROP_BOOL("multi", USBAudioState, multi, false), - DEFINE_PROP_END_OF_LIST(), }; static void usb_audio_class_init(ObjectClass *klass, void *data) diff --git a/hw/usb/dev-hid.c b/hw/usb/dev-hid.c index d83f67b9849..accdd460e3b 100644 --- a/hw/usb/dev-hid.c +++ b/hw/usb/dev-hid.c @@ -797,7 +797,6 @@ static const Property usb_tablet_properties[] = { DEFINE_PROP_UINT32("usb_version", USBHIDState, usb_version, 2), DEFINE_PROP_STRING("display", USBHIDState, display), DEFINE_PROP_UINT32("head", USBHIDState, head, 0), - DEFINE_PROP_END_OF_LIST(), }; static void usb_tablet_class_initfn(ObjectClass *klass, void *data) @@ -820,7 +819,6 @@ static const TypeInfo usb_tablet_info = { static const Property usb_mouse_properties[] = { DEFINE_PROP_UINT32("usb_version", USBHIDState, usb_version, 2), - DEFINE_PROP_END_OF_LIST(), }; static void usb_mouse_class_initfn(ObjectClass *klass, void *data) @@ -844,7 +842,6 @@ static const TypeInfo usb_mouse_info = { static const Property usb_keyboard_properties[] = { DEFINE_PROP_UINT32("usb_version", USBHIDState, usb_version, 2), DEFINE_PROP_STRING("display", USBHIDState, display), - DEFINE_PROP_END_OF_LIST(), }; static void usb_keyboard_class_initfn(ObjectClass *klass, void *data) diff --git a/hw/usb/dev-hub.c b/hw/usb/dev-hub.c index 317ca0b0811..3880e2aca8e 100644 --- a/hw/usb/dev-hub.c +++ b/hw/usb/dev-hub.c @@ -668,7 +668,6 @@ static const VMStateDescription vmstate_usb_hub = { static const Property usb_hub_properties[] = { DEFINE_PROP_UINT32("ports", USBHubState, num_ports, 8), DEFINE_PROP_BOOL("port-power", USBHubState, port_power, false), - DEFINE_PROP_END_OF_LIST(), }; static void usb_hub_class_initfn(ObjectClass *klass, void *data) diff --git a/hw/usb/dev-mtp.c b/hw/usb/dev-mtp.c index 7994727e5ea..326c92a43d0 100644 --- a/hw/usb/dev-mtp.c +++ b/hw/usb/dev-mtp.c @@ -2082,7 +2082,6 @@ static const Property mtp_properties[] = { DEFINE_PROP_STRING("rootdir", MTPState, root), DEFINE_PROP_STRING("desc", MTPState, desc), DEFINE_PROP_BOOL("readonly", MTPState, readonly, true), - DEFINE_PROP_END_OF_LIST(), }; static void usb_mtp_class_initfn(ObjectClass *klass, void *data) diff --git a/hw/usb/dev-network.c b/hw/usb/dev-network.c index 6c4f5776d48..81863105acf 100644 --- a/hw/usb/dev-network.c +++ b/hw/usb/dev-network.c @@ -1409,7 +1409,6 @@ static const VMStateDescription vmstate_usb_net = { static const Property net_properties[] = { DEFINE_NIC_PROPERTIES(USBNetState, conf), - DEFINE_PROP_END_OF_LIST(), }; static void usb_net_class_initfn(ObjectClass *klass, void *data) diff --git a/hw/usb/dev-serial.c b/hw/usb/dev-serial.c index 0c3e9160ec3..a0821db902f 100644 --- a/hw/usb/dev-serial.c +++ b/hw/usb/dev-serial.c @@ -637,7 +637,6 @@ static const VMStateDescription vmstate_usb_serial = { static const Property serial_properties[] = { DEFINE_PROP_CHR("chardev", USBSerialState, cs), DEFINE_PROP_BOOL("always-plugged", USBSerialState, always_plugged, false), - DEFINE_PROP_END_OF_LIST(), }; static void usb_serial_dev_class_init(ObjectClass *klass, void *data) @@ -679,7 +678,6 @@ static const TypeInfo serial_info = { static const Property braille_properties[] = { DEFINE_PROP_CHR("chardev", USBSerialState, cs), - DEFINE_PROP_END_OF_LIST(), }; static void usb_braille_class_initfn(ObjectClass *klass, void *data) diff --git a/hw/usb/dev-smartcard-reader.c b/hw/usb/dev-smartcard-reader.c index c3c02f0aad1..73deb3ce839 100644 --- a/hw/usb/dev-smartcard-reader.c +++ b/hw/usb/dev-smartcard-reader.c @@ -1173,7 +1173,6 @@ static Answer *ccid_peek_next_answer(USBCCIDState *s) static const Property ccid_props[] = { DEFINE_PROP_UINT32("slot", struct CCIDCardState, slot, 0), - DEFINE_PROP_END_OF_LIST(), }; static const TypeInfo ccid_bus_info = { @@ -1433,7 +1432,6 @@ static const VMStateDescription ccid_vmstate = { static const Property ccid_properties[] = { DEFINE_PROP_UINT8("debug", USBCCIDState, debug, 0), - DEFINE_PROP_END_OF_LIST(), }; static void ccid_class_initfn(ObjectClass *klass, void *data) diff --git a/hw/usb/dev-storage-classic.c b/hw/usb/dev-storage-classic.c index ca037ba96f9..818f58db2fa 100644 --- a/hw/usb/dev-storage-classic.c +++ b/hw/usb/dev-storage-classic.c @@ -72,7 +72,6 @@ static const Property msd_properties[] = { DEFINE_BLOCK_ERROR_PROPERTIES(MSDState, conf), DEFINE_PROP_BOOL("removable", MSDState, removable, false), DEFINE_PROP_BOOL("commandlog", MSDState, commandlog, false), - DEFINE_PROP_END_OF_LIST(), }; static void usb_msd_class_storage_initfn(ObjectClass *klass, void *data) diff --git a/hw/usb/dev-uas.c b/hw/usb/dev-uas.c index 57e8d200514..44e30013d73 100644 --- a/hw/usb/dev-uas.c +++ b/hw/usb/dev-uas.c @@ -955,7 +955,6 @@ static const VMStateDescription vmstate_usb_uas = { static const Property uas_properties[] = { DEFINE_PROP_UINT32("log-scsi-req", UASDevice, requestlog, 0), - DEFINE_PROP_END_OF_LIST(), }; static void usb_uas_class_initfn(ObjectClass *klass, void *data) diff --git a/hw/usb/hcd-dwc2.c b/hw/usb/hcd-dwc2.c index 6a10f3e9cd8..e8152719f8e 100644 --- a/hw/usb/hcd-dwc2.c +++ b/hw/usb/hcd-dwc2.c @@ -1450,7 +1450,6 @@ const VMStateDescription vmstate_dwc2_state = { static const Property dwc2_usb_properties[] = { DEFINE_PROP_UINT32("usb_version", DWC2State, usb_version, 2), - DEFINE_PROP_END_OF_LIST(), }; static void dwc2_class_init(ObjectClass *klass, void *data) diff --git a/hw/usb/hcd-dwc3.c b/hw/usb/hcd-dwc3.c index ff970bd9891..9ce9ba0b046 100644 --- a/hw/usb/hcd-dwc3.c +++ b/hw/usb/hcd-dwc3.c @@ -659,7 +659,6 @@ static const VMStateDescription vmstate_usb_dwc3 = { static const Property usb_dwc3_properties[] = { DEFINE_PROP_UINT32("DWC_USB3_USERID", USBDWC3, cfg.dwc_usb3_user, 0x12345678), - DEFINE_PROP_END_OF_LIST(), }; static void usb_dwc3_class_init(ObjectClass *klass, void *data) diff --git a/hw/usb/hcd-ehci-pci.c b/hw/usb/hcd-ehci-pci.c index 374f25c5ede..d410c38a8a2 100644 --- a/hw/usb/hcd-ehci-pci.c +++ b/hw/usb/hcd-ehci-pci.c @@ -137,7 +137,6 @@ static void usb_ehci_pci_write_config(PCIDevice *dev, uint32_t addr, static const Property ehci_pci_properties[] = { DEFINE_PROP_UINT32("maxframes", EHCIPCIState, ehci.maxframes, 128), - DEFINE_PROP_END_OF_LIST(), }; static const VMStateDescription vmstate_ehci_pci = { diff --git a/hw/usb/hcd-ehci-sysbus.c b/hw/usb/hcd-ehci-sysbus.c index f4e08aab89c..768c3dd797f 100644 --- a/hw/usb/hcd-ehci-sysbus.c +++ b/hw/usb/hcd-ehci-sysbus.c @@ -34,7 +34,6 @@ static const Property ehci_sysbus_properties[] = { DEFINE_PROP_UINT32("maxframes", EHCISysBusState, ehci.maxframes, 128), DEFINE_PROP_BOOL("companion-enable", EHCISysBusState, ehci.companion_enable, false), - DEFINE_PROP_END_OF_LIST(), }; static void usb_ehci_sysbus_realize(DeviceState *dev, Error **errp) diff --git a/hw/usb/hcd-ohci-pci.c b/hw/usb/hcd-ohci-pci.c index 459644cc1bb..b3684a2ef6b 100644 --- a/hw/usb/hcd-ohci-pci.c +++ b/hw/usb/hcd-ohci-pci.c @@ -113,7 +113,6 @@ static const Property ohci_pci_properties[] = { DEFINE_PROP_STRING("masterbus", OHCIPCIState, masterbus), DEFINE_PROP_UINT32("num-ports", OHCIPCIState, num_ports, 3), DEFINE_PROP_UINT32("firstport", OHCIPCIState, firstport, 0), - DEFINE_PROP_END_OF_LIST(), }; static const VMStateDescription vmstate_ohci = { diff --git a/hw/usb/hcd-ohci-sysbus.c b/hw/usb/hcd-ohci-sysbus.c index 81cf2e558d1..15311949b39 100644 --- a/hw/usb/hcd-ohci-sysbus.c +++ b/hw/usb/hcd-ohci-sysbus.c @@ -62,7 +62,6 @@ static const Property ohci_sysbus_properties[] = { DEFINE_PROP_UINT32("num-ports", OHCISysBusState, num_ports, 3), DEFINE_PROP_UINT32("firstport", OHCISysBusState, firstport, 0), DEFINE_PROP_DMAADDR("dma-offset", OHCISysBusState, dma_offset, 0), - DEFINE_PROP_END_OF_LIST(), }; static void ohci_sysbus_class_init(ObjectClass *klass, void *data) diff --git a/hw/usb/hcd-uhci.c b/hw/usb/hcd-uhci.c index 245352c2317..142f24f2ea0 100644 --- a/hw/usb/hcd-uhci.c +++ b/hw/usb/hcd-uhci.c @@ -1232,12 +1232,10 @@ static const Property uhci_properties_companion[] = { DEFINE_PROP_UINT32("firstport", UHCIState, firstport, 0), DEFINE_PROP_UINT32("bandwidth", UHCIState, frame_bandwidth, 1280), DEFINE_PROP_UINT32("maxframes", UHCIState, maxframes, 128), - DEFINE_PROP_END_OF_LIST(), }; static const Property uhci_properties_standalone[] = { DEFINE_PROP_UINT32("bandwidth", UHCIState, frame_bandwidth, 1280), DEFINE_PROP_UINT32("maxframes", UHCIState, maxframes, 128), - DEFINE_PROP_END_OF_LIST(), }; static void uhci_class_init(ObjectClass *klass, void *data) diff --git a/hw/usb/hcd-xhci-nec.c b/hw/usb/hcd-xhci-nec.c index f06e7403e2d..b1df95b52a5 100644 --- a/hw/usb/hcd-xhci-nec.c +++ b/hw/usb/hcd-xhci-nec.c @@ -41,7 +41,6 @@ static const Property nec_xhci_properties[] = { DEFINE_PROP_ON_OFF_AUTO("msix", XHCIPciState, msix, ON_OFF_AUTO_AUTO), DEFINE_PROP_UINT32("intrs", XHCINecState, intrs, XHCI_MAXINTRS), DEFINE_PROP_UINT32("slots", XHCINecState, slots, XHCI_MAXSLOTS), - DEFINE_PROP_END_OF_LIST(), }; static void nec_xhci_instance_init(Object *obj) diff --git a/hw/usb/hcd-xhci-sysbus.c b/hw/usb/hcd-xhci-sysbus.c index f4dbad7cc69..ce433223963 100644 --- a/hw/usb/hcd-xhci-sysbus.c +++ b/hw/usb/hcd-xhci-sysbus.c @@ -85,7 +85,6 @@ void xhci_sysbus_build_aml(Aml *scope, uint32_t mmio, unsigned int irq) static const Property xhci_sysbus_props[] = { DEFINE_PROP_UINT32("intrs", XHCISysbusState, xhci.numintrs, XHCI_MAXINTRS), DEFINE_PROP_UINT32("slots", XHCISysbusState, xhci.numslots, XHCI_MAXSLOTS), - DEFINE_PROP_END_OF_LIST(), }; static const VMStateDescription vmstate_xhci_sysbus = { diff --git a/hw/usb/hcd-xhci.c b/hw/usb/hcd-xhci.c index 3c5006f4254..3719c0f190d 100644 --- a/hw/usb/hcd-xhci.c +++ b/hw/usb/hcd-xhci.c @@ -3612,7 +3612,6 @@ static const Property xhci_properties[] = { DEFINE_PROP_UINT32("p3", XHCIState, numports_3, 4), DEFINE_PROP_LINK("host", XHCIState, hostOpaque, TYPE_DEVICE, DeviceState *), - DEFINE_PROP_END_OF_LIST(), }; static void xhci_class_init(ObjectClass *klass, void *data) diff --git a/hw/usb/host-libusb.c b/hw/usb/host-libusb.c index 85d33b51bab..0c753f5cc51 100644 --- a/hw/usb/host-libusb.c +++ b/hw/usb/host-libusb.c @@ -1779,7 +1779,6 @@ static const Property usb_host_dev_properties[] = { USB_HOST_OPT_PIPELINE, true), DEFINE_PROP_BOOL("suppress-remote-wake", USBHostDevice, suppress_remote_wake, true), - DEFINE_PROP_END_OF_LIST(), }; static void usb_host_class_initfn(ObjectClass *klass, void *data) diff --git a/hw/usb/redirect.c b/hw/usb/redirect.c index f72a612d5a2..96fb9638092 100644 --- a/hw/usb/redirect.c +++ b/hw/usb/redirect.c @@ -2580,7 +2580,6 @@ static const Property usbredir_properties[] = { DEFINE_PROP_BOOL("streams", USBRedirDevice, enable_streams, true), DEFINE_PROP_BOOL("suppress-remote-wake", USBRedirDevice, suppress_remote_wake, true), - DEFINE_PROP_END_OF_LIST(), }; static void usbredir_class_initfn(ObjectClass *klass, void *data) diff --git a/hw/usb/u2f-emulated.c b/hw/usb/u2f-emulated.c index df86ce97fca..e1dd19ee92b 100644 --- a/hw/usb/u2f-emulated.c +++ b/hw/usb/u2f-emulated.c @@ -375,7 +375,6 @@ static const Property u2f_emulated_properties[] = { DEFINE_PROP_STRING("privkey", U2FEmulatedState, privkey), DEFINE_PROP_STRING("entropy", U2FEmulatedState, entropy), DEFINE_PROP_STRING("counter", U2FEmulatedState, counter), - DEFINE_PROP_END_OF_LIST(), }; static void u2f_emulated_class_init(ObjectClass *klass, void *data) diff --git a/hw/usb/u2f-passthru.c b/hw/usb/u2f-passthru.c index ec4f6165d8e..8df5215a1fa 100644 --- a/hw/usb/u2f-passthru.c +++ b/hw/usb/u2f-passthru.c @@ -518,7 +518,6 @@ static const VMStateDescription u2f_passthru_vmstate = { static const Property u2f_passthru_properties[] = { DEFINE_PROP_STRING("hidraw", U2FPassthruState, hidraw), - DEFINE_PROP_END_OF_LIST(), }; static void u2f_passthru_class_init(ObjectClass *klass, void *data) diff --git a/hw/vfio/ap.c b/hw/vfio/ap.c index 2e6ea2dd931..529aad6332c 100644 --- a/hw/vfio/ap.c +++ b/hw/vfio/ap.c @@ -197,7 +197,6 @@ static const Property vfio_ap_properties[] = { DEFINE_PROP_LINK("iommufd", VFIOAPDevice, vdev.iommufd, TYPE_IOMMUFD_BACKEND, IOMMUFDBackend *), #endif - DEFINE_PROP_END_OF_LIST(), }; static void vfio_ap_reset(DeviceState *dev) diff --git a/hw/vfio/ccw.c b/hw/vfio/ccw.c index b96ab27e129..bac56e8dd9a 100644 --- a/hw/vfio/ccw.c +++ b/hw/vfio/ccw.c @@ -663,7 +663,6 @@ static const Property vfio_ccw_properties[] = { TYPE_IOMMUFD_BACKEND, IOMMUFDBackend *), #endif DEFINE_PROP_CCW_LOADPARM("loadparm", CcwDevice, loadparm), - DEFINE_PROP_END_OF_LIST(), }; static const VMStateDescription vfio_ccw_vmstate = { diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c index 93aca850e31..0c5621da360 100644 --- a/hw/vfio/pci.c +++ b/hw/vfio/pci.c @@ -3409,7 +3409,6 @@ static const Property vfio_pci_dev_properties[] = { TYPE_IOMMUFD_BACKEND, IOMMUFDBackend *), #endif DEFINE_PROP_BOOL("skip-vsc-check", VFIOPCIDevice, skip_vsc_check, true), - DEFINE_PROP_END_OF_LIST(), }; #ifdef CONFIG_IOMMUFD @@ -3455,7 +3454,6 @@ static const Property vfio_pci_dev_nohotplug_properties[] = { DEFINE_PROP_BOOL("ramfb", VFIOPCIDevice, enable_ramfb, false), DEFINE_PROP_ON_OFF_AUTO("x-ramfb-migrate", VFIOPCIDevice, ramfb_migrate, ON_OFF_AUTO_AUTO), - DEFINE_PROP_END_OF_LIST(), }; static void vfio_pci_nohotplug_dev_class_init(ObjectClass *klass, void *data) diff --git a/hw/vfio/platform.c b/hw/vfio/platform.c index 766e8a86efd..7bc52a6f56c 100644 --- a/hw/vfio/platform.c +++ b/hw/vfio/platform.c @@ -640,7 +640,6 @@ static const Property vfio_platform_dev_properties[] = { DEFINE_PROP_LINK("iommufd", VFIOPlatformDevice, vbasedev.iommufd, TYPE_IOMMUFD_BACKEND, IOMMUFDBackend *), #endif - DEFINE_PROP_END_OF_LIST(), }; static void vfio_platform_instance_init(Object *obj) diff --git a/hw/virtio/vdpa-dev.c b/hw/virtio/vdpa-dev.c index 61849b3b0e1..d7b6af03f62 100644 --- a/hw/virtio/vdpa-dev.c +++ b/hw/virtio/vdpa-dev.c @@ -340,7 +340,6 @@ static void vhost_vdpa_device_set_status(VirtIODevice *vdev, uint8_t status) static const Property vhost_vdpa_device_properties[] = { DEFINE_PROP_STRING("vhostdev", VhostVdpaDevice, vhostdev), DEFINE_PROP_UINT16("queue-size", VhostVdpaDevice, queue_size, 0), - DEFINE_PROP_END_OF_LIST(), }; static const VMStateDescription vmstate_vhost_vdpa_device = { diff --git a/hw/virtio/vhost-scsi-pci.c b/hw/virtio/vhost-scsi-pci.c index 7536b37f184..3778f6131ef 100644 --- a/hw/virtio/vhost-scsi-pci.c +++ b/hw/virtio/vhost-scsi-pci.c @@ -41,7 +41,6 @@ struct VHostSCSIPCI { static const Property vhost_scsi_pci_properties[] = { DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, DEV_NVECTORS_UNSPECIFIED), - DEFINE_PROP_END_OF_LIST(), }; static void vhost_scsi_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) diff --git a/hw/virtio/vhost-user-blk-pci.c b/hw/virtio/vhost-user-blk-pci.c index 99f14720234..1767ef2c9c9 100644 --- a/hw/virtio/vhost-user-blk-pci.c +++ b/hw/virtio/vhost-user-blk-pci.c @@ -47,7 +47,6 @@ static const Property vhost_user_blk_pci_properties[] = { DEFINE_PROP_UINT32("class", VirtIOPCIProxy, class_code, 0), DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, DEV_NVECTORS_UNSPECIFIED), - DEFINE_PROP_END_OF_LIST(), }; static void vhost_user_blk_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) diff --git a/hw/virtio/vhost-user-device.c b/hw/virtio/vhost-user-device.c index 3222b67bd9d..86eba138b4e 100644 --- a/hw/virtio/vhost-user-device.c +++ b/hw/virtio/vhost-user-device.c @@ -35,7 +35,6 @@ static const Property vud_properties[] = { DEFINE_PROP_UINT32("vq_size", VHostUserBase, vq_size, 64), DEFINE_PROP_UINT32("num_vqs", VHostUserBase, num_vqs, 1), DEFINE_PROP_UINT32("config_size", VHostUserBase, config_size, 0), - DEFINE_PROP_END_OF_LIST(), }; static void vud_class_init(ObjectClass *klass, void *data) diff --git a/hw/virtio/vhost-user-fs-pci.c b/hw/virtio/vhost-user-fs-pci.c index 9ba6c406550..116eaab9071 100644 --- a/hw/virtio/vhost-user-fs-pci.c +++ b/hw/virtio/vhost-user-fs-pci.c @@ -32,7 +32,6 @@ DECLARE_INSTANCE_CHECKER(VHostUserFSPCI, VHOST_USER_FS_PCI, static const Property vhost_user_fs_pci_properties[] = { DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, DEV_NVECTORS_UNSPECIFIED), - DEFINE_PROP_END_OF_LIST(), }; static void vhost_user_fs_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) diff --git a/hw/virtio/vhost-user-fs.c b/hw/virtio/vhost-user-fs.c index c0462329a58..f8714b56600 100644 --- a/hw/virtio/vhost-user-fs.c +++ b/hw/virtio/vhost-user-fs.c @@ -409,7 +409,6 @@ static const Property vuf_properties[] = { DEFINE_PROP_UINT16("num-request-queues", VHostUserFS, conf.num_request_queues, 1), DEFINE_PROP_UINT16("queue-size", VHostUserFS, conf.queue_size, 128), - DEFINE_PROP_END_OF_LIST(), }; static void vuf_instance_init(Object *obj) diff --git a/hw/virtio/vhost-user-gpio.c b/hw/virtio/vhost-user-gpio.c index c997c66d80b..4a08814904d 100644 --- a/hw/virtio/vhost-user-gpio.c +++ b/hw/virtio/vhost-user-gpio.c @@ -16,7 +16,6 @@ static const Property vgpio_properties[] = { DEFINE_PROP_CHR("chardev", VHostUserBase, chardev), - DEFINE_PROP_END_OF_LIST(), }; static void vgpio_realize(DeviceState *dev, Error **errp) diff --git a/hw/virtio/vhost-user-i2c.c b/hw/virtio/vhost-user-i2c.c index b0a5cbf3eab..1c7cde503c3 100644 --- a/hw/virtio/vhost-user-i2c.c +++ b/hw/virtio/vhost-user-i2c.c @@ -16,7 +16,6 @@ static const Property vi2c_properties[] = { DEFINE_PROP_CHR("chardev", VHostUserBase, chardev), - DEFINE_PROP_END_OF_LIST(), }; static void vi2c_realize(DeviceState *dev, Error **errp) diff --git a/hw/virtio/vhost-user-input.c b/hw/virtio/vhost-user-input.c index c57cc461bb1..917405329f2 100644 --- a/hw/virtio/vhost-user-input.c +++ b/hw/virtio/vhost-user-input.c @@ -9,7 +9,6 @@ static const Property vinput_properties[] = { DEFINE_PROP_CHR("chardev", VHostUserBase, chardev), - DEFINE_PROP_END_OF_LIST(), }; static void vinput_realize(DeviceState *dev, Error **errp) diff --git a/hw/virtio/vhost-user-rng-pci.c b/hw/virtio/vhost-user-rng-pci.c index 0016ee74ce8..a4e690148d6 100644 --- a/hw/virtio/vhost-user-rng-pci.c +++ b/hw/virtio/vhost-user-rng-pci.c @@ -26,7 +26,6 @@ DECLARE_INSTANCE_CHECKER(VHostUserRNGPCI, VHOST_USER_RNG_PCI, static const Property vhost_user_rng_pci_properties[] = { DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, DEV_NVECTORS_UNSPECIFIED), - DEFINE_PROP_END_OF_LIST(), }; static void vhost_user_rng_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) diff --git a/hw/virtio/vhost-user-rng.c b/hw/virtio/vhost-user-rng.c index c9985b5fadd..5aa432e5e1a 100644 --- a/hw/virtio/vhost-user-rng.c +++ b/hw/virtio/vhost-user-rng.c @@ -22,7 +22,6 @@ static const VMStateDescription vu_rng_vmstate = { static const Property vrng_properties[] = { DEFINE_PROP_CHR("chardev", VHostUserBase, chardev), - DEFINE_PROP_END_OF_LIST(), }; static void vu_rng_base_realize(DeviceState *dev, Error **errp) diff --git a/hw/virtio/vhost-user-scmi.c b/hw/virtio/vhost-user-scmi.c index a15e6916efa..410a936ca74 100644 --- a/hw/virtio/vhost-user-scmi.c +++ b/hw/virtio/vhost-user-scmi.c @@ -279,7 +279,6 @@ static const VMStateDescription vu_scmi_vmstate = { static const Property vu_scmi_properties[] = { DEFINE_PROP_CHR("chardev", VHostUserSCMI, chardev), - DEFINE_PROP_END_OF_LIST(), }; static void vu_scmi_class_init(ObjectClass *klass, void *data) diff --git a/hw/virtio/vhost-user-scsi-pci.c b/hw/virtio/vhost-user-scsi-pci.c index b2f6451f483..34e1a701b1a 100644 --- a/hw/virtio/vhost-user-scsi-pci.c +++ b/hw/virtio/vhost-user-scsi-pci.c @@ -47,7 +47,6 @@ struct VHostUserSCSIPCI { static const Property vhost_user_scsi_pci_properties[] = { DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, DEV_NVECTORS_UNSPECIFIED), - DEFINE_PROP_END_OF_LIST(), }; static void vhost_user_scsi_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) diff --git a/hw/virtio/vhost-user-snd.c b/hw/virtio/vhost-user-snd.c index 8810a9f6998..8610370af80 100644 --- a/hw/virtio/vhost-user-snd.c +++ b/hw/virtio/vhost-user-snd.c @@ -23,7 +23,6 @@ static const VMStateDescription vu_snd_vmstate = { static const Property vsnd_properties[] = { DEFINE_PROP_CHR("chardev", VHostUserBase, chardev), - DEFINE_PROP_END_OF_LIST(), }; static void vu_snd_base_realize(DeviceState *dev, Error **errp) diff --git a/hw/virtio/vhost-user-vsock-pci.c b/hw/virtio/vhost-user-vsock-pci.c index 529d967059f..f730a05e781 100644 --- a/hw/virtio/vhost-user-vsock-pci.c +++ b/hw/virtio/vhost-user-vsock-pci.c @@ -33,7 +33,6 @@ struct VHostUserVSockPCI { static const Property vhost_user_vsock_pci_properties[] = { DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 3), - DEFINE_PROP_END_OF_LIST(), }; static void vhost_user_vsock_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) diff --git a/hw/virtio/vhost-user-vsock.c b/hw/virtio/vhost-user-vsock.c index 97885bfeab7..293273080b4 100644 --- a/hw/virtio/vhost-user-vsock.c +++ b/hw/virtio/vhost-user-vsock.c @@ -150,7 +150,6 @@ static void vuv_device_unrealize(DeviceState *dev) static const Property vuv_properties[] = { DEFINE_PROP_CHR("chardev", VHostUserVSock, conf.chardev), - DEFINE_PROP_END_OF_LIST(), }; static void vuv_class_init(ObjectClass *klass, void *data) diff --git a/hw/virtio/vhost-vsock-common.c b/hw/virtio/vhost-vsock-common.c index cb2253c39fa..9ac587d20c1 100644 --- a/hw/virtio/vhost-vsock-common.c +++ b/hw/virtio/vhost-vsock-common.c @@ -288,7 +288,6 @@ static struct vhost_dev *vhost_vsock_common_get_vhost(VirtIODevice *vdev) static const Property vhost_vsock_common_properties[] = { DEFINE_PROP_ON_OFF_AUTO("seqpacket", VHostVSockCommon, seqpacket, ON_OFF_AUTO_AUTO), - DEFINE_PROP_END_OF_LIST(), }; static void vhost_vsock_common_class_init(ObjectClass *klass, void *data) diff --git a/hw/virtio/vhost-vsock-pci.c b/hw/virtio/vhost-vsock-pci.c index 1d9abd02bd9..6c618ee9083 100644 --- a/hw/virtio/vhost-vsock-pci.c +++ b/hw/virtio/vhost-vsock-pci.c @@ -37,7 +37,6 @@ struct VHostVSockPCI { static const Property vhost_vsock_pci_properties[] = { DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 3), - DEFINE_PROP_END_OF_LIST(), }; static void vhost_vsock_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) diff --git a/hw/virtio/vhost-vsock.c b/hw/virtio/vhost-vsock.c index ce80e84494b..940b30fa27c 100644 --- a/hw/virtio/vhost-vsock.c +++ b/hw/virtio/vhost-vsock.c @@ -208,7 +208,6 @@ static void vhost_vsock_device_unrealize(DeviceState *dev) static const Property vhost_vsock_properties[] = { DEFINE_PROP_UINT64("guest-cid", VHostVSock, conf.guest_cid, 0), DEFINE_PROP_STRING("vhostfd", VHostVSock, conf.vhostfd), - DEFINE_PROP_END_OF_LIST(), }; static void vhost_vsock_class_init(ObjectClass *klass, void *data) diff --git a/hw/virtio/virtio-9p-pci.c b/hw/virtio/virtio-9p-pci.c index b33faf2fbbc..aa1dce8f284 100644 --- a/hw/virtio/virtio-9p-pci.c +++ b/hw/virtio/virtio-9p-pci.c @@ -47,7 +47,6 @@ static const Property virtio_9p_pci_properties[] = { DEFINE_PROP_BIT("ioeventfd", VirtIOPCIProxy, flags, VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true), DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 2), - DEFINE_PROP_END_OF_LIST(), }; static void virtio_9p_pci_class_init(ObjectClass *klass, void *data) diff --git a/hw/virtio/virtio-balloon.c b/hw/virtio/virtio-balloon.c index ab2ee304756..ec4aa945f2e 100644 --- a/hw/virtio/virtio-balloon.c +++ b/hw/virtio/virtio-balloon.c @@ -1032,7 +1032,6 @@ static const Property virtio_balloon_properties[] = { qemu_4_0_config_size, false), DEFINE_PROP_LINK("iothread", VirtIOBalloon, iothread, TYPE_IOTHREAD, IOThread *), - DEFINE_PROP_END_OF_LIST(), }; static void virtio_balloon_class_init(ObjectClass *klass, void *data) diff --git a/hw/virtio/virtio-blk-pci.c b/hw/virtio/virtio-blk-pci.c index abdcc11b2eb..fc06cec6566 100644 --- a/hw/virtio/virtio-blk-pci.c +++ b/hw/virtio/virtio-blk-pci.c @@ -44,7 +44,6 @@ static const Property virtio_blk_pci_properties[] = { VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true), DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, DEV_NVECTORS_UNSPECIFIED), - DEFINE_PROP_END_OF_LIST(), }; static void virtio_blk_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) diff --git a/hw/virtio/virtio-crypto-pci.c b/hw/virtio/virtio-crypto-pci.c index 23c85fe5864..8699481375d 100644 --- a/hw/virtio/virtio-crypto-pci.c +++ b/hw/virtio/virtio-crypto-pci.c @@ -41,7 +41,6 @@ static const Property virtio_crypto_pci_properties[] = { DEFINE_PROP_BIT("ioeventfd", VirtIOPCIProxy, flags, VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true), DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 2), - DEFINE_PROP_END_OF_LIST(), }; static void virtio_crypto_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) diff --git a/hw/virtio/virtio-crypto.c b/hw/virtio/virtio-crypto.c index 9ae0b02598b..617163f127d 100644 --- a/hw/virtio/virtio-crypto.c +++ b/hw/virtio/virtio-crypto.c @@ -1131,7 +1131,6 @@ static const VMStateDescription vmstate_virtio_crypto = { static const Property virtio_crypto_properties[] = { DEFINE_PROP_LINK("cryptodev", VirtIOCrypto, conf.cryptodev, TYPE_CRYPTODEV_BACKEND, CryptoDevBackend *), - DEFINE_PROP_END_OF_LIST(), }; static void virtio_crypto_get_config(VirtIODevice *vdev, uint8_t *config) diff --git a/hw/virtio/virtio-input-pci.c b/hw/virtio/virtio-input-pci.c index 55c0b0555b0..9e3c1067776 100644 --- a/hw/virtio/virtio-input-pci.c +++ b/hw/virtio/virtio-input-pci.c @@ -39,7 +39,6 @@ struct VirtIOInputHIDPCI { static const Property virtio_input_pci_properties[] = { DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 2), - DEFINE_PROP_END_OF_LIST(), }; static void virtio_input_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) diff --git a/hw/virtio/virtio-iommu-pci.c b/hw/virtio/virtio-iommu-pci.c index 92adf636842..97e03ce803b 100644 --- a/hw/virtio/virtio-iommu-pci.c +++ b/hw/virtio/virtio-iommu-pci.c @@ -39,7 +39,6 @@ static const Property virtio_iommu_pci_properties[] = { DEFINE_PROP_ARRAY("reserved-regions", VirtIOIOMMUPCI, vdev.nr_prop_resv_regions, vdev.prop_resv_regions, qdev_prop_reserved_region, ReservedRegion), - DEFINE_PROP_END_OF_LIST(), }; static void virtio_iommu_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) diff --git a/hw/virtio/virtio-iommu.c b/hw/virtio/virtio-iommu.c index 576ad8383f8..0988d212092 100644 --- a/hw/virtio/virtio-iommu.c +++ b/hw/virtio/virtio-iommu.c @@ -1662,7 +1662,6 @@ static const Property virtio_iommu_properties[] = { DEFINE_PROP_GRANULE_MODE("granule", VirtIOIOMMU, granule_mode, GRANULE_MODE_HOST), DEFINE_PROP_UINT8("aw-bits", VirtIOIOMMU, aw_bits, 64), - DEFINE_PROP_END_OF_LIST(), }; static void virtio_iommu_class_init(ObjectClass *klass, void *data) diff --git a/hw/virtio/virtio-mem.c b/hw/virtio/virtio-mem.c index 3f6f46fad77..317d056eba7 100644 --- a/hw/virtio/virtio-mem.c +++ b/hw/virtio/virtio-mem.c @@ -1694,7 +1694,6 @@ static const Property virtio_mem_properties[] = { early_migration, true), DEFINE_PROP_BOOL(VIRTIO_MEM_DYNAMIC_MEMSLOTS_PROP, VirtIOMEM, dynamic_memslots, false), - DEFINE_PROP_END_OF_LIST(), }; static uint64_t virtio_mem_rdm_get_min_granularity(const RamDiscardManager *rdm, diff --git a/hw/virtio/virtio-mmio.c b/hw/virtio/virtio-mmio.c index 49d9fe8f302..27d2f4b3b08 100644 --- a/hw/virtio/virtio-mmio.c +++ b/hw/virtio/virtio-mmio.c @@ -757,7 +757,6 @@ static const Property virtio_mmio_properties[] = { DEFINE_PROP_BOOL("force-legacy", VirtIOMMIOProxy, legacy, true), DEFINE_PROP_BIT("ioeventfd", VirtIOMMIOProxy, flags, VIRTIO_IOMMIO_FLAG_USE_IOEVENTFD_BIT, true), - DEFINE_PROP_END_OF_LIST(), }; static void virtio_mmio_realizefn(DeviceState *d, Error **errp) diff --git a/hw/virtio/virtio-net-pci.c b/hw/virtio/virtio-net-pci.c index e86094ae221..e18953ad674 100644 --- a/hw/virtio/virtio-net-pci.c +++ b/hw/virtio/virtio-net-pci.c @@ -43,7 +43,6 @@ static const Property virtio_net_properties[] = { VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true), DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, DEV_NVECTORS_UNSPECIFIED), - DEFINE_PROP_END_OF_LIST(), }; static void virtio_net_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) diff --git a/hw/virtio/virtio-nsm.c b/hw/virtio/virtio-nsm.c index 685c5483610..098e1aeac6e 100644 --- a/hw/virtio/virtio-nsm.c +++ b/hw/virtio/virtio-nsm.c @@ -1707,7 +1707,6 @@ static const VMStateDescription vmstate_virtio_nsm = { static const Property virtio_nsm_properties[] = { DEFINE_PROP_STRING("module-id", VirtIONSM, module_id), - DEFINE_PROP_END_OF_LIST(), }; static void virtio_nsm_class_init(ObjectClass *klass, void *data) diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c index de41cb5ef22..cb61adc659f 100644 --- a/hw/virtio/virtio-pci.c +++ b/hw/virtio/virtio-pci.c @@ -2378,7 +2378,6 @@ static const Property virtio_pci_properties[] = { VIRTIO_PCI_FLAG_INIT_FLR_BIT, true), DEFINE_PROP_BIT("aer", VirtIOPCIProxy, flags, VIRTIO_PCI_FLAG_AER_BIT, false), - DEFINE_PROP_END_OF_LIST(), }; static void virtio_pci_dc_realize(DeviceState *qdev, Error **errp) @@ -2435,7 +2434,6 @@ static const Property virtio_pci_generic_properties[] = { DEFINE_PROP_ON_OFF_AUTO("disable-legacy", VirtIOPCIProxy, disable_legacy, ON_OFF_AUTO_AUTO), DEFINE_PROP_BOOL("disable-modern", VirtIOPCIProxy, disable_modern, false), - DEFINE_PROP_END_OF_LIST(), }; static void virtio_pci_base_class_init(ObjectClass *klass, void *data) diff --git a/hw/virtio/virtio-pmem.c b/hw/virtio/virtio-pmem.c index f6f3b5ddaf5..9759023ab37 100644 --- a/hw/virtio/virtio-pmem.c +++ b/hw/virtio/virtio-pmem.c @@ -159,7 +159,6 @@ static const Property virtio_pmem_properties[] = { DEFINE_PROP_UINT64(VIRTIO_PMEM_ADDR_PROP, VirtIOPMEM, start, 0), DEFINE_PROP_LINK(VIRTIO_PMEM_MEMDEV_PROP, VirtIOPMEM, memdev, TYPE_MEMORY_BACKEND, HostMemoryBackend *), - DEFINE_PROP_END_OF_LIST(), }; static void virtio_pmem_class_init(ObjectClass *klass, void *data) diff --git a/hw/virtio/virtio-rng-pci.c b/hw/virtio/virtio-rng-pci.c index 398f4322370..a94ff767b2d 100644 --- a/hw/virtio/virtio-rng-pci.c +++ b/hw/virtio/virtio-rng-pci.c @@ -37,7 +37,6 @@ static const Property virtio_rng_properties[] = { VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true), DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, DEV_NVECTORS_UNSPECIFIED), - DEFINE_PROP_END_OF_LIST(), }; static void virtio_rng_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) diff --git a/hw/virtio/virtio-rng.c b/hw/virtio/virtio-rng.c index 13a1a0b236a..0660e872f7c 100644 --- a/hw/virtio/virtio-rng.c +++ b/hw/virtio/virtio-rng.c @@ -258,7 +258,6 @@ static const Property virtio_rng_properties[] = { DEFINE_PROP_UINT64("max-bytes", VirtIORNG, conf.max_bytes, INT64_MAX), DEFINE_PROP_UINT32("period", VirtIORNG, conf.period_ms, 1 << 16), DEFINE_PROP_LINK("rng", VirtIORNG, conf.rng, TYPE_RNG_BACKEND, RngBackend *), - DEFINE_PROP_END_OF_LIST(), }; static void virtio_rng_class_init(ObjectClass *klass, void *data) diff --git a/hw/virtio/virtio-scsi-pci.c b/hw/virtio/virtio-scsi-pci.c index 733b5756db1..d44fd2fffbe 100644 --- a/hw/virtio/virtio-scsi-pci.c +++ b/hw/virtio/virtio-scsi-pci.c @@ -40,7 +40,6 @@ static const Property virtio_scsi_pci_properties[] = { VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true), DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, DEV_NVECTORS_UNSPECIFIED), - DEFINE_PROP_END_OF_LIST(), }; static void virtio_scsi_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) diff --git a/hw/virtio/virtio-serial-pci.c b/hw/virtio/virtio-serial-pci.c index bda643ec546..b5b77eb2661 100644 --- a/hw/virtio/virtio-serial-pci.c +++ b/hw/virtio/virtio-serial-pci.c @@ -74,7 +74,6 @@ static const Property virtio_serial_pci_properties[] = { VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true), DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 2), DEFINE_PROP_UINT32("class", VirtIOPCIProxy, class_code, 0), - DEFINE_PROP_END_OF_LIST(), }; static void virtio_serial_pci_class_init(ObjectClass *klass, void *data) diff --git a/hw/virtio/virtio.c b/hw/virtio/virtio.c index 7fcdb55ba49..b871295b949 100644 --- a/hw/virtio/virtio.c +++ b/hw/virtio/virtio.c @@ -4018,7 +4018,6 @@ static const Property virtio_properties[] = { DEFINE_PROP_BOOL("use-disabled-flag", VirtIODevice, use_disabled_flag, true), DEFINE_PROP_BOOL("x-disable-legacy-check", VirtIODevice, disable_legacy_check, false), - DEFINE_PROP_END_OF_LIST(), }; static int virtio_device_start_ioeventfd_impl(VirtIODevice *vdev) diff --git a/hw/watchdog/sbsa_gwdt.c b/hw/watchdog/sbsa_gwdt.c index 2e25d4b4e9a..6b6fc31f227 100644 --- a/hw/watchdog/sbsa_gwdt.c +++ b/hw/watchdog/sbsa_gwdt.c @@ -270,7 +270,6 @@ static const Property wdt_sbsa_gwdt_props[] = { */ DEFINE_PROP_UINT64("clock-frequency", struct SBSA_GWDTState, freq, 62500000), - DEFINE_PROP_END_OF_LIST(), }; static void wdt_sbsa_gwdt_class_init(ObjectClass *klass, void *data) diff --git a/hw/watchdog/wdt_aspeed.c b/hw/watchdog/wdt_aspeed.c index c95877e5c73..78dedb065eb 100644 --- a/hw/watchdog/wdt_aspeed.c +++ b/hw/watchdog/wdt_aspeed.c @@ -291,7 +291,6 @@ static void aspeed_wdt_realize(DeviceState *dev, Error **errp) static const Property aspeed_wdt_properties[] = { DEFINE_PROP_LINK("scu", AspeedWDTState, scu, TYPE_ASPEED_SCU, AspeedSCUState *), - DEFINE_PROP_END_OF_LIST(), }; static void aspeed_wdt_class_init(ObjectClass *klass, void *data) diff --git a/hw/watchdog/wdt_imx2.c b/hw/watchdog/wdt_imx2.c index 61fbd91ee4f..878e5098b67 100644 --- a/hw/watchdog/wdt_imx2.c +++ b/hw/watchdog/wdt_imx2.c @@ -284,7 +284,6 @@ static void imx2_wdt_realize(DeviceState *dev, Error **errp) static const Property imx2_wdt_properties[] = { DEFINE_PROP_BOOL("pretimeout-support", IMX2WdtState, pretimeout_support, false), - DEFINE_PROP_END_OF_LIST() }; static void imx2_wdt_class_init(ObjectClass *klass, void *data) diff --git a/hw/xen/xen-bus.c b/hw/xen/xen-bus.c index 0d7defb8cd3..2007ec08923 100644 --- a/hw/xen/xen-bus.c +++ b/hw/xen/xen-bus.c @@ -1095,7 +1095,6 @@ unrealize: static const Property xen_device_props[] = { DEFINE_PROP_UINT16("frontend-id", XenDevice, frontend_id, DOMID_INVALID), - DEFINE_PROP_END_OF_LIST() }; static void xen_device_class_init(ObjectClass *class, void *data) diff --git a/hw/xen/xen_pt.c b/hw/xen/xen_pt.c index 557aa98be41..e2bd4c7d411 100644 --- a/hw/xen/xen_pt.c +++ b/hw/xen/xen_pt.c @@ -934,7 +934,6 @@ static void xen_pt_unregister_device(PCIDevice *d) static const Property xen_pci_passthrough_properties[] = { DEFINE_PROP_PCI_HOST_DEVADDR("hostaddr", XenPCIPassthroughState, hostaddr), DEFINE_PROP_BOOL("permissive", XenPCIPassthroughState, permissive, false), - DEFINE_PROP_END_OF_LIST(), }; static void xen_pci_passthrough_instance_init(Object *obj) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 1afa07511e3..0e882c474ec 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -2652,7 +2652,6 @@ static const Property arm_cpu_properties[] = { DEFINE_PROP_INT32("core-count", ARMCPU, core_count, -1), /* True to default to the backward-compat old CNTFRQ rather than 1Ghz */ DEFINE_PROP_BOOL("backcompat-cntfrq", ARMCPU, backcompat_cntfrq, false), - DEFINE_PROP_END_OF_LIST() }; static const gchar *arm_gdb_arch_name(CPUState *cs) diff --git a/target/avr/cpu.c b/target/avr/cpu.c index a7529a1b3d9..64dc15655b7 100644 --- a/target/avr/cpu.c +++ b/target/avr/cpu.c @@ -151,7 +151,6 @@ static void avr_cpu_initfn(Object *obj) static const Property avr_cpu_properties[] = { DEFINE_PROP_UINT32("init-sp", AVRCPU, init_sp, 0), - DEFINE_PROP_END_OF_LIST() }; static ObjectClass *avr_cpu_class_by_name(const char *cpu_model) diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c index a70007245e4..8c89a8ce311 100644 --- a/target/hexagon/cpu.c +++ b/target/hexagon/cpu.c @@ -53,7 +53,6 @@ static const Property hexagon_cpu_properties[] = { DEFINE_PROP_UNSIGNED("lldb-stack-adjust", HexagonCPU, lldb_stack_adjust, 0, qdev_prop_uint32, target_ulong), DEFINE_PROP_BOOL("short-circuit", HexagonCPU, short_circuit, true), - DEFINE_PROP_END_OF_LIST() }; const char * const hexagon_regnames[TOTAL_PER_THREAD_REGS] = { diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 52533994592..c28adee34f7 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -5387,7 +5387,6 @@ static X86CPUVersion x86_cpu_model_resolve_version(const X86CPUModel *model) static const Property max_x86_cpu_properties[] = { DEFINE_PROP_BOOL("migratable", X86CPU, migratable, true), DEFINE_PROP_BOOL("host-cache-info", X86CPU, cache_info_passthrough, false), - DEFINE_PROP_END_OF_LIST() }; static void max_x86_cpu_realize(DeviceState *dev, Error **errp) @@ -8548,7 +8547,6 @@ static const Property x86_cpu_properties[] = { DEFINE_PROP_BOOL("x-intel-pt-auto-level", X86CPU, intel_pt_auto_level, true), DEFINE_PROP_BOOL("x-l1-cache-per-thread", X86CPU, l1_cache_per_core, true), - DEFINE_PROP_END_OF_LIST() }; #ifndef CONFIG_USER_ONLY diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c index 0e41e39c0e2..83554f62d36 100644 --- a/target/microblaze/cpu.c +++ b/target/microblaze/cpu.c @@ -403,7 +403,6 @@ static const Property mb_properties[] = { /* * End of properties reserved by Xilinx DTS conversion tool. */ - DEFINE_PROP_END_OF_LIST(), }; static ObjectClass *mb_cpu_class_by_name(const char *cpu_model) diff --git a/target/mips/cpu.c b/target/mips/cpu.c index 02c0e1b0f9b..aa3d905e708 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -541,7 +541,6 @@ static const struct SysemuCPUOps mips_sysemu_ops = { static const Property mips_cpu_properties[] = { DEFINE_PROP_BOOL("big-endian", MIPSCPU, is_big_endian, TARGET_BIG_ENDIAN), - DEFINE_PROP_END_OF_LIST(), }; #ifdef CONFIG_TCG diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c index 263f9e84ed6..9b367ed2d55 100644 --- a/target/s390x/cpu.c +++ b/target/s390x/cpu.c @@ -318,7 +318,6 @@ static const Property s390x_cpu_properties[] = { DEFINE_PROP_BOOL("dedicated", S390CPU, env.dedicated, false), DEFINE_PROP_CPUS390ENTITLEMENT("entitlement", S390CPU, env.entitlement, S390_CPU_ENTITLEMENT_AUTO), - DEFINE_PROP_END_OF_LIST() }; #endif diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index 8f494c286ae..a65a6466a7e 100644 --- a/target/sparc/cpu.c +++ b/target/sparc/cpu.c @@ -917,7 +917,6 @@ static const Property sparc_cpu_properties[] = { DEFINE_PROP_UINT32("mmu-version", SPARCCPU, env.def.mmu_version, 0), DEFINE_PROP("nwindows", SPARCCPU, env.def.nwindows, qdev_prop_nwindows, uint32_t), - DEFINE_PROP_END_OF_LIST() }; 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helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -31 X-Spam_score: -3.2 X-Spam_bar: --- X-Spam_report: (-3.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-1.116, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Richard Henderson Before, via pahole: arm32, a 32-bit host which aligns uint64_t: struct Property { const char * name; /* 0 4 */ const PropertyInfo * info; /* 4 4 */ ptrdiff_t offset; /* 8 4 */ uint8_t bitnr; /* 12 1 */ /* XXX 3 bytes hole, try to pack */ uint64_t bitmask; /* 16 8 */ _Bool set_default; /* 24 1 */ /* XXX 7 bytes hole, try to pack */ union { int64_t i; /* 32 8 */ uint64_t u; /* 32 8 */ } defval; /* 32 8 */ int arrayoffset; /* 40 4 */ const PropertyInfo * arrayinfo; /* 44 4 */ int arrayfieldsize; /* 48 4 */ const char * link_type; /* 52 4 */ /* size: 56, cachelines: 1, members: 11 */ /* sum members: 46, holes: 2, sum holes: 10 */ }; arm64, an arbitrary 64-bit host: struct Property { const char * name; /* 0 8 */ const PropertyInfo * info; /* 8 8 */ ptrdiff_t offset; /* 16 8 */ uint8_t bitnr; /* 24 1 */ /* XXX 7 bytes hole, try to pack */ uint64_t bitmask; /* 32 8 */ _Bool set_default; /* 40 1 */ /* XXX 7 bytes hole, try to pack */ union { int64_t i; /* 48 8 */ uint64_t u; /* 48 8 */ } defval; /* 48 8 */ int arrayoffset; /* 56 4 */ /* XXX 4 bytes hole, try to pack */ const PropertyInfo * arrayinfo; /* 64 8 */ int arrayfieldsize; /* 72 4 */ /* XXX 4 bytes hole, try to pack */ const char * link_type; /* 80 8 */ /* size: 88, cachelines: 2, members: 11 */ /* sum members: 66, holes: 4, sum holes: 22 */ }; Afterward there are no holes in either structure. For arm32, size 48, padding 2, saved 8 bytes. For arm64, size 72, padding 6, saved 16 bytes. Saves 20k from qemu-system-aarch64 on a 64-bit host. Signed-off-by: Richard Henderson Link: https://lore.kernel.org/r/20241216035109.3486070-22-richard.henderson@linaro.org Signed-off-by: Paolo Bonzini --- include/hw/qdev-properties.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/include/hw/qdev-properties.h b/include/hw/qdev-properties.h index ef3fd7b4ae2..3680cd239fb 100644 --- a/include/hw/qdev-properties.h +++ b/include/hw/qdev-properties.h @@ -16,17 +16,17 @@ struct Property { const char *name; const PropertyInfo *info; ptrdiff_t offset; - uint8_t bitnr; + const char *link_type; uint64_t bitmask; - bool set_default; union { int64_t i; uint64_t u; } defval; - int arrayoffset; const PropertyInfo *arrayinfo; + int arrayoffset; int arrayfieldsize; - const char *link_type; + uint8_t bitnr; + bool set_default; }; struct PropertyInfo { From patchwork Thu Dec 19 08:32:09 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 13914840 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2953CE77184 for ; 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/* Takes ownership of @values */ void qdev_prop_set_array(DeviceState *dev, const char *name, QList *values); -void *object_field_prop_ptr(Object *obj, Property *prop); +void *object_field_prop_ptr(Object *obj, const Property *prop); void qdev_prop_register_global(GlobalProperty *prop); const GlobalProperty *qdev_find_global_prop(Object *obj, diff --git a/hw/core/qdev-properties.c b/hw/core/qdev-properties.c index a3d49e20202..61929b2865a 100644 --- a/hw/core/qdev-properties.c +++ b/hw/core/qdev-properties.c @@ -51,7 +51,7 @@ void qdev_prop_allow_set_link_before_realize(const Object *obj, } } -void *object_field_prop_ptr(Object *obj, Property *prop) +void *object_field_prop_ptr(Object *obj, const Property *prop) { void *ptr = obj; ptr += prop->offset; From patchwork Thu Dec 19 08:32:10 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 13914806 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BE32AE7718C for ; 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Thu, 19 Dec 2024 00:33:19 -0800 (PST) X-Google-Smtp-Source: AGHT+IFyOEAzzbAZB7fZ7XYd/3ZVSXNKlsaiYFHZyTUHlIqM5M3NCaIhdrEGs4TeDStthbDaktxzLw== X-Received: by 2002:a5d:6da1:0:b0:388:c75d:be97 with SMTP id ffacd0b85a97d-38a19af8799mr2341148f8f.11.1734597198765; Thu, 19 Dec 2024 00:33:18 -0800 (PST) Received: from [192.168.10.47] ([151.81.118.45]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38a1c828e7asm986991f8f.21.2024.12.19.00.33.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Dec 2024 00:33:14 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: Richard Henderson Subject: [PULL 23/41] hw/core/qdev-properties: Constify Property argument to PropertyInfo.print Date: Thu, 19 Dec 2024 09:32:10 +0100 Message-ID: <20241219083228.363430-24-pbonzini@redhat.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241219083228.363430-1-pbonzini@redhat.com> References: <20241219083228.363430-1-pbonzini@redhat.com> MIME-Version: 1.0 Received-SPF: pass client-ip=170.10.129.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -31 X-Spam_score: -3.2 X-Spam_bar: --- X-Spam_report: (-3.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-1.116, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Richard Henderson There is exactly one instance of this method: print_pci_devfn. Signed-off-by: Richard Henderson Link: https://lore.kernel.org/r/20241216035109.3486070-24-richard.henderson@linaro.org Signed-off-by: Paolo Bonzini --- include/hw/qdev-properties.h | 2 +- hw/core/qdev-properties-system.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/include/hw/qdev-properties.h b/include/hw/qdev-properties.h index 447767688b6..bf27375a3cc 100644 --- a/include/hw/qdev-properties.h +++ b/include/hw/qdev-properties.h @@ -34,7 +34,7 @@ struct PropertyInfo { const char *description; const QEnumLookup *enum_table; bool realized_set_allowed; /* allow setting property on realized device */ - int (*print)(Object *obj, Property *prop, char *dest, size_t len); + int (*print)(Object *obj, const Property *prop, char *dest, size_t len); void (*set_default_value)(ObjectProperty *op, const Property *prop); ObjectProperty *(*create)(ObjectClass *oc, const char *name, const Property *prop); diff --git a/hw/core/qdev-properties-system.c b/hw/core/qdev-properties-system.c index 22ea1ed3583..1034e9b5809 100644 --- a/hw/core/qdev-properties-system.c +++ b/hw/core/qdev-properties-system.c @@ -869,7 +869,7 @@ out: visit_end_alternate(v, (void **) &alt); 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Thu, 19 Dec 2024 00:33:21 -0800 (PST) X-Google-Smtp-Source: AGHT+IFfQu5P3fhr0xWGkdS4xbN5P7MhztBfQr4NoU/LdwvR0ikeOgNFyq5z48Sv6jrUBQebNcvx0g== X-Received: by 2002:a5d:64e7:0:b0:385:e0d6:fb6e with SMTP id ffacd0b85a97d-388e4d8dd78mr4888485f8f.37.1734597200526; Thu, 19 Dec 2024 00:33:20 -0800 (PST) Received: from [192.168.10.47] ([151.81.118.45]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-436611ea423sm11344415e9.2.2024.12.19.00.33.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Dec 2024 00:33:19 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: Richard Henderson Subject: [PULL 24/41] Constify all opaque Property pointers Date: Thu, 19 Dec 2024 09:32:11 +0100 Message-ID: <20241219083228.363430-25-pbonzini@redhat.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241219083228.363430-1-pbonzini@redhat.com> References: <20241219083228.363430-1-pbonzini@redhat.com> MIME-Version: 1.0 Received-SPF: pass client-ip=170.10.133.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -31 X-Spam_score: -3.2 X-Spam_bar: --- X-Spam_report: (-3.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-1.116, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Richard Henderson s/ Property [*]/ const Property */ Basically all of these only feed object_field_prop_ptr, which now takes a const pointer itself. Signed-off-by: Richard Henderson Link: https://lore.kernel.org/r/20241216035109.3486070-25-richard.henderson@linaro.org Signed-off-by: Paolo Bonzini --- backends/tpm/tpm_util.c | 4 +- hw/block/xen-block.c | 4 +- hw/core/qdev-properties-system.c | 48 ++++++++++---------- hw/core/qdev-properties.c | 78 ++++++++++++++++---------------- hw/misc/xlnx-versal-trng.c | 2 +- hw/nvme/nguid.c | 4 +- hw/s390x/css.c | 4 +- hw/s390x/s390-pci-bus.c | 4 +- hw/vfio/pci-quirks.c | 4 +- 9 files changed, 76 insertions(+), 76 deletions(-) diff --git a/backends/tpm/tpm_util.c b/backends/tpm/tpm_util.c index cf138551df1..485982b17b6 100644 --- a/backends/tpm/tpm_util.c +++ b/backends/tpm/tpm_util.c @@ -46,7 +46,7 @@ static void get_tpm(Object *obj, Visitor *v, const char *name, void *opaque, static void set_tpm(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { - Property *prop = opaque; + const Property *prop = opaque; TPMBackend *s, **be = object_field_prop_ptr(obj, prop); char *str; @@ -66,7 +66,7 @@ static void set_tpm(Object *obj, Visitor *v, const char *name, void *opaque, static void release_tpm(Object *obj, const char *name, void *opaque) { - Property *prop = opaque; + const Property *prop = opaque; TPMBackend **be = object_field_prop_ptr(obj, prop); if (*be) { diff --git a/hw/block/xen-block.c b/hw/block/xen-block.c index 56a67136604..ec3413f116a 100644 --- a/hw/block/xen-block.c +++ b/hw/block/xen-block.c @@ -485,7 +485,7 @@ static char *disk_to_vbd_name(unsigned int disk) static void xen_block_get_vdev(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { - Property *prop = opaque; + const Property *prop = opaque; XenBlockVdev *vdev = object_field_prop_ptr(obj, prop); char *str; @@ -545,7 +545,7 @@ static int vbd_name_to_disk(const char *name, const char **endp, static void xen_block_set_vdev(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { - Property *prop = opaque; + const Property *prop = opaque; XenBlockVdev *vdev = object_field_prop_ptr(obj, prop); char *str, *p; const char *end; diff --git a/hw/core/qdev-properties-system.c b/hw/core/qdev-properties-system.c index 1034e9b5809..1bae1352766 100644 --- a/hw/core/qdev-properties-system.c +++ b/hw/core/qdev-properties-system.c @@ -90,7 +90,7 @@ bool qdev_prop_sanitize_s390x_loadparm(uint8_t *loadparm, const char *str, static void get_drive(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { - Property *prop = opaque; + const Property *prop = opaque; void **ptr = object_field_prop_ptr(obj, prop); const char *value; char *p; @@ -116,7 +116,7 @@ static void set_drive_helper(Object *obj, Visitor *v, const char *name, void *opaque, bool iothread, Error **errp) { DeviceState *dev = DEVICE(obj); - Property *prop = opaque; + const Property *prop = opaque; void **ptr = object_field_prop_ptr(obj, prop); char *str; BlockBackend *blk; @@ -225,7 +225,7 @@ static void set_drive_iothread(Object *obj, Visitor *v, const char *name, static void release_drive(Object *obj, const char *name, void *opaque) { DeviceState *dev = DEVICE(obj); - Property *prop = opaque; + const Property *prop = opaque; BlockBackend **ptr = object_field_prop_ptr(obj, prop); if (*ptr) { @@ -269,7 +269,7 @@ static void set_chr(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { ERRP_GUARD(); - Property *prop = opaque; + const Property *prop = opaque; CharBackend *be = object_field_prop_ptr(obj, prop); Chardev *s; char *str; @@ -305,7 +305,7 @@ static void set_chr(Object *obj, Visitor *v, const char *name, void *opaque, static void release_chr(Object *obj, const char *name, void *opaque) { - Property *prop = opaque; + const Property *prop = opaque; CharBackend *be = object_field_prop_ptr(obj, prop); qemu_chr_fe_deinit(be, false); @@ -329,7 +329,7 @@ const PropertyInfo qdev_prop_chr = { static void get_mac(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { - Property *prop = opaque; + const Property *prop = opaque; MACAddr *mac = object_field_prop_ptr(obj, prop); char buffer[2 * 6 + 5 + 1]; char *p = buffer; @@ -344,7 +344,7 @@ static void get_mac(Object *obj, Visitor *v, const char *name, void *opaque, static void set_mac(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { - Property *prop = opaque; + const Property *prop = opaque; MACAddr *mac = object_field_prop_ptr(obj, prop); int i, pos; char *str; @@ -406,7 +406,7 @@ void qdev_prop_set_macaddr(DeviceState *dev, const char *name, static void get_netdev(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { - Property *prop = opaque; + const Property *prop = opaque; NICPeers *peers_ptr = object_field_prop_ptr(obj, prop); char *p = g_strdup(peers_ptr->ncs[0] ? peers_ptr->ncs[0]->name : ""); @@ -417,7 +417,7 @@ static void get_netdev(Object *obj, Visitor *v, const char *name, static void set_netdev(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { - Property *prop = opaque; + const Property *prop = opaque; NICPeers *peers_ptr = object_field_prop_ptr(obj, prop); NetClientState **ncs = peers_ptr->ncs; NetClientState *peers[MAX_QUEUE_NUM]; @@ -485,7 +485,7 @@ const PropertyInfo qdev_prop_netdev = { static void get_audiodev(Object *obj, Visitor *v, const char* name, void *opaque, Error **errp) { - Property *prop = opaque; + const Property *prop = opaque; QEMUSoundCard *card = object_field_prop_ptr(obj, prop); char *p = g_strdup(audio_get_id(card)); @@ -496,7 +496,7 @@ static void get_audiodev(Object *obj, Visitor *v, const char* name, static void set_audiodev(Object *obj, Visitor *v, const char* name, void *opaque, Error **errp) { - Property *prop = opaque; + const Property *prop = opaque; QEMUSoundCard *card = object_field_prop_ptr(obj, prop); AudioState *state; g_autofree char *str = NULL; @@ -578,7 +578,7 @@ static void qdev_propinfo_set_losttickpolicy(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { - Property *prop = opaque; + const Property *prop = opaque; int *ptr = object_field_prop_ptr(obj, prop); int value; @@ -614,7 +614,7 @@ const PropertyInfo qdev_prop_losttickpolicy = { static void set_blocksize(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { - Property *prop = opaque; + const Property *prop = opaque; uint32_t *ptr = object_field_prop_ptr(obj, prop); uint64_t value; @@ -737,7 +737,7 @@ const PropertyInfo qdev_prop_zero_page_detection = { static void get_reserved_region(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { - Property *prop = opaque; + const Property *prop = opaque; ReservedRegion *rr = object_field_prop_ptr(obj, prop); char buffer[64]; char *p = buffer; @@ -753,7 +753,7 @@ static void get_reserved_region(Object *obj, Visitor *v, const char *name, static void set_reserved_region(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { - Property *prop = opaque; + const Property *prop = opaque; ReservedRegion *rr = object_field_prop_ptr(obj, prop); const char *endptr; uint64_t lob, upb; @@ -815,7 +815,7 @@ const PropertyInfo qdev_prop_reserved_region = { static void set_pci_devfn(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { - Property *prop = opaque; + const Property *prop = opaque; g_autofree GenericAlternate *alt; int32_t value, *ptr = object_field_prop_ptr(obj, prop); unsigned int slot, fn, n; @@ -895,7 +895,7 @@ const PropertyInfo qdev_prop_pci_devfn = { static void get_pci_host_devaddr(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { - Property *prop = opaque; + const Property *prop = opaque; PCIHostDeviceAddress *addr = object_field_prop_ptr(obj, prop); char buffer[] = "ffff:ff:ff.f"; char *p = buffer; @@ -921,7 +921,7 @@ static void get_pci_host_devaddr(Object *obj, Visitor *v, const char *name, static void set_pci_host_devaddr(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { - Property *prop = opaque; + const Property *prop = opaque; PCIHostDeviceAddress *addr = object_field_prop_ptr(obj, prop); char *str, *p; char *e; @@ -1011,7 +1011,7 @@ const PropertyInfo qdev_prop_off_auto_pcibar = { static void get_prop_pcielinkspeed(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { - Property *prop = opaque; + const Property *prop = opaque; PCIExpLinkSpeed *p = object_field_prop_ptr(obj, prop); int speed; @@ -1045,7 +1045,7 @@ static void get_prop_pcielinkspeed(Object *obj, Visitor *v, const char *name, static void set_prop_pcielinkspeed(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { - Property *prop = opaque; + const Property *prop = opaque; PCIExpLinkSpeed *p = object_field_prop_ptr(obj, prop); int speed; @@ -1093,7 +1093,7 @@ const PropertyInfo qdev_prop_pcie_link_speed = { static void get_prop_pcielinkwidth(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { - Property *prop = opaque; + const Property *prop = opaque; PCIExpLinkWidth *p = object_field_prop_ptr(obj, prop); int width; @@ -1130,7 +1130,7 @@ static void get_prop_pcielinkwidth(Object *obj, Visitor *v, const char *name, static void set_prop_pcielinkwidth(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { - Property *prop = opaque; + const Property *prop = opaque; PCIExpLinkWidth *p = object_field_prop_ptr(obj, prop); int width; @@ -1181,7 +1181,7 @@ const PropertyInfo qdev_prop_pcie_link_width = { static void get_uuid(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { - Property *prop = opaque; + const Property *prop = opaque; QemuUUID *uuid = object_field_prop_ptr(obj, prop); char buffer[UUID_STR_LEN]; char *p = buffer; @@ -1196,7 +1196,7 @@ static void get_uuid(Object *obj, Visitor *v, const char *name, void *opaque, static void set_uuid(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { - Property *prop = opaque; + const Property *prop = opaque; QemuUUID *uuid = object_field_prop_ptr(obj, prop); char *str; diff --git a/hw/core/qdev-properties.c b/hw/core/qdev-properties.c index 61929b2865a..434a76f5036 100644 --- a/hw/core/qdev-properties.c +++ b/hw/core/qdev-properties.c @@ -61,7 +61,7 @@ void *object_field_prop_ptr(Object *obj, const Property *prop) static void field_prop_get(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { - Property *prop = opaque; + const Property *prop = opaque; return prop->info->get(obj, v, name, opaque, errp); } @@ -78,7 +78,7 @@ static ObjectPropertyAccessor *field_prop_getter(const PropertyInfo *info) static void field_prop_set(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { - Property *prop = opaque; + const Property *prop = opaque; if (!qdev_prop_allow_set(obj, name, prop->info, errp)) { return; @@ -100,7 +100,7 @@ static ObjectPropertyAccessor *field_prop_setter(const PropertyInfo *info) void qdev_propinfo_get_enum(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { - Property *prop = opaque; + const Property *prop = opaque; int *ptr = object_field_prop_ptr(obj, prop); visit_type_enum(v, name, ptr, prop->info->enum_table, errp); @@ -109,7 +109,7 @@ void qdev_propinfo_get_enum(Object *obj, Visitor *v, const char *name, void qdev_propinfo_set_enum(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { - Property *prop = opaque; + const Property *prop = opaque; int *ptr = object_field_prop_ptr(obj, prop); visit_type_enum(v, name, ptr, prop->info->enum_table, errp); @@ -131,13 +131,13 @@ const PropertyInfo qdev_prop_enum = { /* Bit */ -static uint32_t qdev_get_prop_mask(Property *prop) +static uint32_t qdev_get_prop_mask(const Property *prop) { assert(prop->info == &qdev_prop_bit); return 0x1 << prop->bitnr; } -static void bit_prop_set(Object *obj, Property *props, bool val) +static void bit_prop_set(Object *obj, const Property *props, bool val) { uint32_t *p = object_field_prop_ptr(obj, props); uint32_t mask = qdev_get_prop_mask(props); @@ -151,7 +151,7 @@ static void bit_prop_set(Object *obj, Property *props, bool val) static void prop_get_bit(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { - Property *prop = opaque; + const Property *prop = opaque; uint32_t *p = object_field_prop_ptr(obj, prop); bool value = (*p & qdev_get_prop_mask(prop)) != 0; @@ -161,7 +161,7 @@ static void prop_get_bit(Object *obj, Visitor *v, const char *name, static void prop_set_bit(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { - Property *prop = opaque; + const Property *prop = opaque; bool value; if (!visit_type_bool(v, name, &value, errp)) { @@ -185,13 +185,13 @@ const PropertyInfo qdev_prop_bit = { /* Bit64 */ -static uint64_t qdev_get_prop_mask64(Property *prop) +static uint64_t qdev_get_prop_mask64(const Property *prop) { assert(prop->info == &qdev_prop_bit64); return 0x1ull << prop->bitnr; } -static void bit64_prop_set(Object *obj, Property *props, bool val) +static void bit64_prop_set(Object *obj, const Property *props, bool val) { uint64_t *p = object_field_prop_ptr(obj, props); uint64_t mask = qdev_get_prop_mask64(props); @@ -205,7 +205,7 @@ static void bit64_prop_set(Object *obj, Property *props, bool val) static void prop_get_bit64(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { - Property *prop = opaque; + const Property *prop = opaque; uint64_t *p = object_field_prop_ptr(obj, prop); bool value = (*p & qdev_get_prop_mask64(prop)) != 0; @@ -215,7 +215,7 @@ static void prop_get_bit64(Object *obj, Visitor *v, const char *name, static void prop_set_bit64(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { - Property *prop = opaque; + const Property *prop = opaque; bool value; if (!visit_type_bool(v, name, &value, errp)) { @@ -237,7 +237,7 @@ const PropertyInfo qdev_prop_bit64 = { static void get_bool(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { - Property *prop = opaque; + const Property *prop = opaque; bool *ptr = object_field_prop_ptr(obj, prop); visit_type_bool(v, name, ptr, errp); @@ -246,7 +246,7 @@ static void get_bool(Object *obj, Visitor *v, const char *name, void *opaque, static void set_bool(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { - Property *prop = opaque; + const Property *prop = opaque; bool *ptr = object_field_prop_ptr(obj, prop); visit_type_bool(v, name, ptr, errp); @@ -264,7 +264,7 @@ const PropertyInfo qdev_prop_bool = { static void get_uint8(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { - Property *prop = opaque; + const Property *prop = opaque; uint8_t *ptr = object_field_prop_ptr(obj, prop); visit_type_uint8(v, name, ptr, errp); @@ -273,7 +273,7 @@ static void get_uint8(Object *obj, Visitor *v, const char *name, void *opaque, static void set_uint8(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { - Property *prop = opaque; + const Property *prop = opaque; uint8_t *ptr = object_field_prop_ptr(obj, prop); visit_type_uint8(v, name, ptr, errp); @@ -303,7 +303,7 @@ const PropertyInfo qdev_prop_uint8 = { static void get_uint16(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { - Property *prop = opaque; + const Property *prop = opaque; uint16_t *ptr = object_field_prop_ptr(obj, prop); visit_type_uint16(v, name, ptr, errp); @@ -312,7 +312,7 @@ static void get_uint16(Object *obj, Visitor *v, const char *name, static void set_uint16(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { - Property *prop = opaque; + const Property *prop = opaque; uint16_t *ptr = object_field_prop_ptr(obj, prop); visit_type_uint16(v, name, ptr, errp); @@ -330,7 +330,7 @@ const PropertyInfo qdev_prop_uint16 = { static void get_uint32(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { - Property *prop = opaque; + const Property *prop = opaque; uint32_t *ptr = object_field_prop_ptr(obj, prop); visit_type_uint32(v, name, ptr, errp); @@ -339,7 +339,7 @@ static void get_uint32(Object *obj, Visitor *v, const char *name, static void set_uint32(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { - Property *prop = opaque; + const Property *prop = opaque; uint32_t *ptr = object_field_prop_ptr(obj, prop); visit_type_uint32(v, name, ptr, errp); @@ -348,7 +348,7 @@ static void set_uint32(Object *obj, Visitor *v, const char *name, void qdev_propinfo_get_int32(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { - Property *prop = opaque; + const Property *prop = opaque; int32_t *ptr = object_field_prop_ptr(obj, prop); visit_type_int32(v, name, ptr, errp); @@ -357,7 +357,7 @@ void qdev_propinfo_get_int32(Object *obj, Visitor *v, const char *name, static void set_int32(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { - Property *prop = opaque; + const Property *prop = opaque; int32_t *ptr = object_field_prop_ptr(obj, prop); visit_type_int32(v, name, ptr, errp); @@ -382,7 +382,7 @@ const PropertyInfo qdev_prop_int32 = { static void get_uint64(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { - Property *prop = opaque; + const Property *prop = opaque; uint64_t *ptr = object_field_prop_ptr(obj, prop); visit_type_uint64(v, name, ptr, errp); @@ -391,7 +391,7 @@ static void get_uint64(Object *obj, Visitor *v, const char *name, static void set_uint64(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { - Property *prop = opaque; + const Property *prop = opaque; uint64_t *ptr = object_field_prop_ptr(obj, prop); visit_type_uint64(v, name, ptr, errp); @@ -400,7 +400,7 @@ static void set_uint64(Object *obj, Visitor *v, const char *name, static void get_int64(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { - Property *prop = opaque; + const Property *prop = opaque; int64_t *ptr = object_field_prop_ptr(obj, prop); visit_type_int64(v, name, ptr, errp); @@ -409,7 +409,7 @@ static void get_int64(Object *obj, Visitor *v, const char *name, static void set_int64(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { - Property *prop = opaque; + const Property *prop = opaque; int64_t *ptr = object_field_prop_ptr(obj, prop); visit_type_int64(v, name, ptr, errp); @@ -432,7 +432,7 @@ const PropertyInfo qdev_prop_int64 = { static void set_uint64_checkmask(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { - Property *prop = opaque; + const Property *prop = opaque; uint64_t *ptr = object_field_prop_ptr(obj, prop); visit_type_uint64(v, name, ptr, errp); @@ -452,14 +452,14 @@ const PropertyInfo qdev_prop_uint64_checkmask = { static void release_string(Object *obj, const char *name, void *opaque) { - Property *prop = opaque; + const Property *prop = opaque; g_free(*(char **)object_field_prop_ptr(obj, prop)); } static void get_string(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { - Property *prop = opaque; + const Property *prop = opaque; char **ptr = object_field_prop_ptr(obj, prop); if (!*ptr) { @@ -473,7 +473,7 @@ static void get_string(Object *obj, Visitor *v, const char *name, static void set_string(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { - Property *prop = opaque; + const Property *prop = opaque; char **ptr = object_field_prop_ptr(obj, prop); char *str; @@ -507,7 +507,7 @@ const PropertyInfo qdev_prop_on_off_auto = { void qdev_propinfo_get_size32(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { - Property *prop = opaque; + const Property *prop = opaque; uint32_t *ptr = object_field_prop_ptr(obj, prop); uint64_t value = *ptr; @@ -517,7 +517,7 @@ void qdev_propinfo_get_size32(Object *obj, Visitor *v, const char *name, static void set_size32(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { - Property *prop = opaque; + const Property *prop = opaque; uint32_t *ptr = object_field_prop_ptr(obj, prop); uint64_t value; @@ -557,7 +557,7 @@ struct ArrayElementList { * specific element of the array. Arrays are backed by an uint32_t length field * and an element array. @elem points at an element in this element array. */ -static Property array_elem_prop(Object *obj, Property *parent_prop, +static Property array_elem_prop(Object *obj, const Property *parent_prop, const char *name, char *elem) { return (Property) { @@ -582,7 +582,7 @@ static Property array_elem_prop(Object *obj, Property *parent_prop, */ static void release_prop_array(Object *obj, const char *name, void *opaque) { - Property *prop = opaque; + const Property *prop = opaque; uint32_t *alenptr = object_field_prop_ptr(obj, prop); void **arrayptr = (void *)obj + prop->arrayoffset; char *elem = *arrayptr; @@ -609,7 +609,7 @@ static void set_prop_array(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { ERRP_GUARD(); - Property *prop = opaque; + const Property *prop = opaque; uint32_t *alenptr = object_field_prop_ptr(obj, prop); void **arrayptr = (void *)obj + prop->arrayoffset; ArrayElementList *list, *elem, *next; @@ -685,7 +685,7 @@ static void get_prop_array(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { ERRP_GUARD(); - Property *prop = opaque; + const Property *prop = opaque; uint32_t *alenptr = object_field_prop_ptr(obj, prop); void **arrayptr = (void *)obj + prop->arrayoffset; char *elemptr = *arrayptr; @@ -928,7 +928,7 @@ void qdev_prop_set_globals(DeviceState *dev) static void get_size(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { - Property *prop = opaque; + const Property *prop = opaque; uint64_t *ptr = object_field_prop_ptr(obj, prop); visit_type_size(v, name, ptr, errp); @@ -937,7 +937,7 @@ static void get_size(Object *obj, Visitor *v, const char *name, void *opaque, static void set_size(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { - Property *prop = opaque; + const Property *prop = opaque; uint64_t *ptr = object_field_prop_ptr(obj, prop); visit_type_size(v, name, ptr, errp); @@ -1020,7 +1020,7 @@ static void qdev_get_legacy_property(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { - Property *prop = opaque; + const Property *prop = opaque; char buffer[1024]; char *ptr = buffer; diff --git a/hw/misc/xlnx-versal-trng.c b/hw/misc/xlnx-versal-trng.c index 0419f648b7a..dbd9b58a4ec 100644 --- a/hw/misc/xlnx-versal-trng.c +++ b/hw/misc/xlnx-versal-trng.c @@ -641,7 +641,7 @@ static void trng_prop_fault_event_set(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { - Property *prop = opaque; + const Property *prop = opaque; uint32_t *events = object_field_prop_ptr(obj, prop); if (!visit_type_uint32(v, name, events, errp)) { diff --git a/hw/nvme/nguid.c b/hw/nvme/nguid.c index 829832bd9f4..be63cb75e16 100644 --- a/hw/nvme/nguid.c +++ b/hw/nvme/nguid.c @@ -149,7 +149,7 @@ static void nvme_nguid_stringify(const NvmeNGUID *nguid, char *out) static void get_nguid(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { - Property *prop = opaque; + const Property *prop = opaque; NvmeNGUID *nguid = object_field_prop_ptr(obj, prop); char buffer[NGUID_STR_LEN]; char *p = buffer; @@ -162,7 +162,7 @@ static void get_nguid(Object *obj, Visitor *v, const char *name, void *opaque, static void set_nguid(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { - Property *prop = opaque; + const Property *prop = opaque; NvmeNGUID *nguid = object_field_prop_ptr(obj, prop); char *str; diff --git a/hw/s390x/css.c b/hw/s390x/css.c index b2d5327dbf4..4e27b2961b8 100644 --- a/hw/s390x/css.c +++ b/hw/s390x/css.c @@ -2463,7 +2463,7 @@ void css_reset(void) static void get_css_devid(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { - Property *prop = opaque; + const Property *prop = opaque; CssDevId *dev_id = object_field_prop_ptr(obj, prop); char buffer[] = "xx.x.xxxx"; char *p = buffer; @@ -2492,7 +2492,7 @@ static void get_css_devid(Object *obj, Visitor *v, const char *name, static void set_css_devid(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { - Property *prop = opaque; + const Property *prop = opaque; CssDevId *dev_id = object_field_prop_ptr(obj, prop); char *str; int num, n1, n2; diff --git a/hw/s390x/s390-pci-bus.c b/hw/s390x/s390-pci-bus.c index 5fbbf41a3db..94b1a5f6398 100644 --- a/hw/s390x/s390-pci-bus.c +++ b/hw/s390x/s390-pci-bus.c @@ -1453,7 +1453,7 @@ static void s390_pci_device_reset(DeviceState *dev) static void s390_pci_get_fid(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { - Property *prop = opaque; + const Property *prop = opaque; uint32_t *ptr = object_field_prop_ptr(obj, prop); visit_type_uint32(v, name, ptr, errp); @@ -1463,7 +1463,7 @@ static void s390_pci_set_fid(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { S390PCIBusDevice *zpci = S390_PCI_DEVICE(obj); - Property *prop = opaque; + const Property *prop = opaque; uint32_t *ptr = object_field_prop_ptr(obj, prop); if (!visit_type_uint32(v, name, ptr, errp)) { diff --git a/hw/vfio/pci-quirks.c b/hw/vfio/pci-quirks.c index d37f722cce0..c8e60475d51 100644 --- a/hw/vfio/pci-quirks.c +++ b/hw/vfio/pci-quirks.c @@ -1499,7 +1499,7 @@ static void get_nv_gpudirect_clique_id(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { - Property *prop = opaque; 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helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -31 X-Spam_score: -3.2 X-Spam_bar: --- X-Spam_report: (-3.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-1.116, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Parameterize the implementation of ClassInitImpl so that it is possible to call up the chain of implementations, one superclass at a time starting at ClassInitImpl. In order to avoid having to implement (for example) ClassInitImpl, also remove the dummy PL011Class and PL011LuminaryClass structs and specify the same ObjectType::Class as the superclass. In the future this default behavior can be handled by a procedural macro, by looking at the first field in the struct. Note that the new trait is safe: the calls are started by rust_class_init<>(), which is not public and can convert the class pointer to a Rust reference. Since CLASS_BASE_INIT applies to the type that is being defined, and only to it, move it to ObjectImpl. Reviewed-by: Zhao Liu Signed-off-by: Paolo Bonzini --- rust/hw/char/pl011/src/device.rs | 19 +---- rust/qemu-api/src/definitions.rs | 111 ++++++++++++++++++++++++------ rust/qemu-api/src/device_class.rs | 50 +++++--------- rust/qemu-api/src/sysbus.rs | 18 ++++- rust/qemu-api/tests/tests.rs | 9 +-- 5 files changed, 127 insertions(+), 80 deletions(-) diff --git a/rust/hw/char/pl011/src/device.rs b/rust/hw/char/pl011/src/device.rs index 3e29442a625..d9e9f35f456 100644 --- a/rust/hw/char/pl011/src/device.rs +++ b/rust/hw/char/pl011/src/device.rs @@ -13,7 +13,6 @@ c_str, definitions::ObjectImpl, device_class::DeviceImpl, - impl_device_class, irq::InterruptSource, prelude::*, }; @@ -108,7 +107,7 @@ pub struct PL011State { } unsafe impl ObjectType for PL011State { - type Class = PL011Class; + type Class = ::Class; const TYPE_NAME: &'static CStr = crate::TYPE_PL011; } @@ -118,11 +117,6 @@ impl ObjectImpl for PL011State { const INSTANCE_INIT: Option = Some(Self::init); } -#[repr(C)] -pub struct PL011Class { - _inner: [u8; 0], -} - impl DeviceImpl for PL011State { fn properties() -> &'static [Property] { &device_class::PL011_PROPERTIES @@ -134,8 +128,6 @@ fn vmsd() -> Option<&'static VMStateDescription> { const RESET: Option = Some(Self::reset); } -impl_device_class!(PL011State); - impl PL011State { /// Initializes a pre-allocated, unitialized instance of `PL011State`. /// @@ -627,11 +619,6 @@ pub struct PL011Luminary { parent_obj: PL011State, } -#[repr(C)] -pub struct PL011LuminaryClass { - _inner: [u8; 0], -} - impl PL011Luminary { /// Initializes a pre-allocated, unitialized instance of `PL011Luminary`. /// @@ -646,7 +633,7 @@ unsafe fn init(&mut self) { } unsafe impl ObjectType for PL011Luminary { - type Class = PL011LuminaryClass; + type Class = ::Class; const TYPE_NAME: &'static CStr = crate::TYPE_PL011_LUMINARY; } @@ -657,5 +644,3 @@ impl ObjectImpl for PL011Luminary { } impl DeviceImpl for PL011Luminary {} - -impl_device_class!(PL011Luminary); diff --git a/rust/qemu-api/src/definitions.rs b/rust/qemu-api/src/definitions.rs index df91a2e31a9..13f8f6fd2a9 100644 --- a/rust/qemu-api/src/definitions.rs +++ b/rust/qemu-api/src/definitions.rs @@ -26,6 +26,16 @@ T::INSTANCE_POST_INIT.unwrap()(unsafe { &mut *obj.cast::() }) } +unsafe extern "C" fn rust_class_init>( + klass: *mut ObjectClass, + _data: *mut c_void, +) { + // SAFETY: klass is a T::Class, since rust_class_init + // is called from QOM core as the class_init function + // for class T + T::class_init(unsafe { &mut *klass.cast::() }) +} + /// Trait exposed by all structs corresponding to QOM objects. /// /// # Safety @@ -50,7 +60,8 @@ /// - likewise, the first field of the `Class` must be of the class struct /// corresponding to the superclass, which is `ObjectImpl::ParentType::Class`. pub unsafe trait ObjectType: Sized { - /// The QOM class object corresponding to this struct. Not used yet. + /// The QOM class object corresponding to this struct. This is used + /// to automatically generate a `class_init` method. type Class; /// The name of the type, which can be passed to `object_new()` to @@ -59,7 +70,7 @@ pub unsafe trait ObjectType: Sized { } /// Trait a type must implement to be registered with QEMU. -pub trait ObjectImpl: ObjectType + ClassInitImpl { +pub trait ObjectImpl: ObjectType + ClassInitImpl { /// The parent of the type. This should match the first field of /// the struct that implements `ObjectImpl`: type ParentType: ObjectType; @@ -80,6 +91,15 @@ pub trait ObjectImpl: ObjectType + ClassInitImpl { /// `INSTANCE_INIT` functions have been called. const INSTANCE_POST_INIT: Option = None; + /// Called on descendent classes after all parent class initialization + /// has occurred, but before the class itself is initialized. This + /// is only useful if a class is not a leaf, and can be used to undo + /// the effects of copying the contents of the parent's class struct + /// to the descendants. + const CLASS_BASE_INIT: Option< + unsafe extern "C" fn(klass: *mut ObjectClass, data: *mut c_void), + > = None; + const TYPE_INFO: TypeInfo = TypeInfo { name: Self::TYPE_NAME.as_ptr(), parent: Self::ParentType::TYPE_NAME.as_ptr(), @@ -96,37 +116,86 @@ pub trait ObjectImpl: ObjectType + ClassInitImpl { instance_finalize: Self::INSTANCE_FINALIZE, abstract_: Self::ABSTRACT, class_size: core::mem::size_of::(), - class_init: ::CLASS_INIT, - class_base_init: ::CLASS_BASE_INIT, + class_init: Some(rust_class_init::), + class_base_init: Self::CLASS_BASE_INIT, class_data: core::ptr::null_mut(), interfaces: core::ptr::null_mut(), }; } -/// Trait used to fill in a class struct. +/// Internal trait used to automatically fill in a class struct. /// /// Each QOM class that has virtual methods describes them in a /// _class struct_. Class structs include a parent field corresponding /// to the vtable of the parent class, all the way up to [`ObjectClass`]. -/// Each QOM type has one such class struct. +/// Each QOM type has one such class struct; this trait takes care of +/// initializing the `T` part of the class struct, for the type that +/// implements the trait. /// -/// The Rust implementation of methods will usually come from a trait -/// like [`ObjectImpl`] or [`DeviceImpl`](crate::device_class::DeviceImpl). -pub trait ClassInitImpl { - /// Function that is called after all parent class initialization - /// has occurred. On entry, the virtual method pointers are set to +/// Each struct will implement this trait with `T` equal to each +/// superclass. For example, a device should implement at least +/// `ClassInitImpl<`[`DeviceClass`](crate::bindings::DeviceClass)`>`. +/// Such implementations are made in one of two ways. +/// +/// For most superclasses, `ClassInitImpl` is provided by the `qemu-api` +/// crate itself. The Rust implementation of methods will come from a +/// trait like [`ObjectImpl`] or +/// [`DeviceImpl`](crate::device_class::DeviceImpl), and `ClassInitImpl` is +/// provided by blanket implementations that operate on all implementors of the +/// `*Impl`* trait. For example: +/// +/// ```ignore +/// impl ClassInitImpl for T +/// where +/// T: DeviceImpl, +/// ``` +/// +/// The other case is when manual implementation of the trait is needed. +/// This covers the following cases: +/// +/// * if a class implements a QOM interface, the Rust code _has_ to define its +/// own class struct `FooClass` and implement `ClassInitImpl`. +/// `ClassInitImpl`'s `class_init` method will then forward to +/// multiple other `class_init`s, for the interfaces as well as the +/// superclass. (Note that there is no Rust example yet for using interfaces). +/// +/// * for classes implemented outside the ``qemu-api`` crate, it's not possible +/// to add blanket implementations like the above one, due to orphan rules. In +/// that case, the easiest solution is to implement +/// `ClassInitImpl` for each subclass and not have a +/// `YourSuperclassImpl` trait at all. +/// +/// ```ignore +/// impl ClassInitImpl for YourSubclass { +/// fn class_init(klass: &mut YourSuperclass) { +/// klass.some_method = Some(Self::some_method); +/// >::class_init(&mut klass.parent_class); +/// } +/// } +/// ``` +/// +/// While this method incurs a small amount of code duplication, +/// it is generally limited to the recursive call on the last line. +/// This is because classes defined in Rust do not need the same +/// glue code that is needed when the classes are defined in C code. +/// You may consider using a macro if you have many subclasses. +pub trait ClassInitImpl { + /// Initialize `klass` to point to the virtual method implementations + /// for `Self`. On entry, the virtual method pointers are set to /// the default values coming from the parent classes; the function /// can change them to override virtual methods of a parent class. - const CLASS_INIT: Option; - - /// Called on descendent classes after all parent class initialization - /// has occurred, but before the class itself is initialized. This - /// is only useful if a class is not a leaf, and can be used to undo - /// the effects of copying the contents of the parent's class struct - /// to the descendants. - const CLASS_BASE_INIT: Option< - unsafe extern "C" fn(klass: *mut ObjectClass, data: *mut c_void), - >; + /// + /// The virtual method implementations usually come from another + /// trait, for example [`DeviceImpl`](crate::device_class::DeviceImpl) + /// when `T` is [`DeviceClass`](crate::bindings::DeviceClass). + /// + /// On entry, `klass`'s parent class is initialized, while the other fields + /// are all zero; it is therefore assumed that all fields in `T` can be + /// zeroed, otherwise it would not be possible to provide the class as a + /// `&mut T`. TODO: add a bound of [`Zeroable`](crate::zeroable::Zeroable) + /// to T; this is more easily done once Zeroable does not require a manual + /// implementation (Rust 1.75.0). + fn class_init(klass: &mut T); } #[macro_export] diff --git a/rust/qemu-api/src/device_class.rs b/rust/qemu-api/src/device_class.rs index c98f0b2c7da..dcec5488291 100644 --- a/rust/qemu-api/src/device_class.rs +++ b/rust/qemu-api/src/device_class.rs @@ -2,10 +2,11 @@ // Author(s): Manos Pitsidianakis // SPDX-License-Identifier: GPL-2.0-or-later -use std::{ffi::CStr, os::raw::c_void}; +use std::ffi::CStr; use crate::{ - bindings::{self, DeviceClass, DeviceState, Error, ObjectClass, Property, VMStateDescription}, + bindings::{self, DeviceClass, DeviceState, Error, Property, VMStateDescription}, + definitions::ClassInitImpl, prelude::*, }; @@ -44,7 +45,7 @@ fn vmsd() -> Option<&'static VMStateDescription> { /// # Safety /// /// This function is only called through the QOM machinery and -/// the `impl_device_class!` macro. +/// used by the `ClassInitImpl` trait. /// We expect the FFI user of this function to pass a valid pointer that /// can be downcasted to type `T`. We also expect the device is /// readable/writeable from one thread at any time. @@ -65,48 +66,31 @@ fn vmsd() -> Option<&'static VMStateDescription> { T::RESET.unwrap()(unsafe { &mut *state }); } -/// # Safety -/// -/// We expect the FFI user of this function to pass a valid pointer that -/// can be downcasted to type `DeviceClass`, because `T` implements -/// `DeviceImpl`. -pub unsafe extern "C" fn rust_device_class_init( - klass: *mut ObjectClass, - _: *mut c_void, -) { - let mut dc = ::core::ptr::NonNull::new(klass.cast::()).unwrap(); - unsafe { - let dc = dc.as_mut(); +impl ClassInitImpl for T +where + T: DeviceImpl, +{ + fn class_init(dc: &mut DeviceClass) { if ::REALIZE.is_some() { dc.realize = Some(rust_realize_fn::); } if ::RESET.is_some() { - bindings::device_class_set_legacy_reset(dc, Some(rust_reset_fn::)); + unsafe { + bindings::device_class_set_legacy_reset(dc, Some(rust_reset_fn::)); + } } if let Some(vmsd) = ::vmsd() { dc.vmsd = vmsd; } let prop = ::properties(); if !prop.is_empty() { - bindings::device_class_set_props_n(dc, prop.as_ptr(), prop.len()); + unsafe { + bindings::device_class_set_props_n(dc, prop.as_ptr(), prop.len()); + } } } } -#[macro_export] -macro_rules! impl_device_class { - ($type:ty) => { - impl $crate::definitions::ClassInitImpl for $type { - const CLASS_INIT: Option< - unsafe extern "C" fn(klass: *mut ObjectClass, data: *mut ::std::os::raw::c_void), - > = Some($crate::device_class::rust_device_class_init::<$type>); - const CLASS_BASE_INIT: Option< - unsafe extern "C" fn(klass: *mut ObjectClass, data: *mut ::std::os::raw::c_void), - > = None; - } - }; -} - #[macro_export] macro_rules! define_property { ($name:expr, $state:ty, $field:ident, $prop:expr, $type:ty, default = $defval:expr$(,)*) => { @@ -148,8 +132,8 @@ macro_rules! declare_properties { }; } -unsafe impl ObjectType for bindings::DeviceState { - type Class = bindings::DeviceClass; +unsafe impl ObjectType for DeviceState { + type Class = DeviceClass; const TYPE_NAME: &'static CStr = unsafe { CStr::from_bytes_with_nul_unchecked(bindings::TYPE_DEVICE) }; } diff --git a/rust/qemu-api/src/sysbus.rs b/rust/qemu-api/src/sysbus.rs index 5ee068541cf..5d15b317405 100644 --- a/rust/qemu-api/src/sysbus.rs +++ b/rust/qemu-api/src/sysbus.rs @@ -6,7 +6,13 @@ pub use bindings::{SysBusDevice, SysBusDeviceClass}; -use crate::{bindings, cell::bql_locked, irq::InterruptSource, prelude::*}; +use crate::{ + bindings::{self, DeviceClass}, + cell::bql_locked, + definitions::ClassInitImpl, + irq::InterruptSource, + prelude::*, +}; unsafe impl ObjectType for SysBusDevice { type Class = SysBusDeviceClass; @@ -14,6 +20,16 @@ unsafe impl ObjectType for SysBusDevice { unsafe { CStr::from_bytes_with_nul_unchecked(bindings::TYPE_SYS_BUS_DEVICE) }; } +// TODO: add SysBusDeviceImpl +impl ClassInitImpl for T +where + T: ClassInitImpl, +{ + fn class_init(sdc: &mut SysBusDeviceClass) { + >::class_init(&mut sdc.parent_class); + } +} + impl SysBusDevice { /// Return `self` cast to a mutable pointer, for use in calls to C code. const fn as_mut_ptr(&self) -> *mut SysBusDevice { diff --git a/rust/qemu-api/tests/tests.rs b/rust/qemu-api/tests/tests.rs index 278efe967fe..ed3a555e76d 100644 --- a/rust/qemu-api/tests/tests.rs +++ b/rust/qemu-api/tests/tests.rs @@ -26,11 +26,6 @@ pub struct DummyState { pub migrate_clock: bool, } - #[repr(C)] - pub struct DummyClass { - pub _parent: DeviceClass, - } - declare_properties! { DUMMY_PROPERTIES, define_property!( @@ -43,7 +38,7 @@ pub struct DummyClass { } unsafe impl ObjectType for DummyState { - type Class = DummyClass; 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helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -31 X-Spam_score: -3.2 X-Spam_bar: --- X-Spam_report: (-3.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-1.116, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Add a blanket definition of ClassInitImpl that thunks ObjectImpl::UNPARENT and overrides it in ObjectClass if it is not None. ClassInitImpl can now call its superclass's ClassInitImpl, so that the C and Rust hierarchies match more closely. This is mostly done as an example of implementing the metaclass hierarchy under ClassInitImpl. Reviewed-by: Zhao Liu Signed-off-by: Paolo Bonzini --- rust/qemu-api/src/definitions.rs | 44 ++++++++++++++++++++++++++++--- rust/qemu-api/src/device_class.rs | 6 +++-- 2 files changed, 45 insertions(+), 5 deletions(-) diff --git a/rust/qemu-api/src/definitions.rs b/rust/qemu-api/src/definitions.rs index 13f8f6fd2a9..a2481c1fe70 100644 --- a/rust/qemu-api/src/definitions.rs +++ b/rust/qemu-api/src/definitions.rs @@ -6,7 +6,7 @@ use std::{ffi::CStr, os::raw::c_void}; -use crate::bindings::{Object, ObjectClass, TypeInfo}; +use crate::bindings::{self, Object, ObjectClass, TypeInfo}; unsafe extern "C" fn rust_instance_init(obj: *mut Object) { // SAFETY: obj is an instance of T, since rust_instance_init @@ -121,6 +121,9 @@ pub trait ObjectImpl: ObjectType + ClassInitImpl { class_data: core::ptr::null_mut(), interfaces: core::ptr::null_mut(), }; + + // methods on ObjectClass + const UNPARENT: Option = None; } /// Internal trait used to automatically fill in a class struct. @@ -134,7 +137,8 @@ pub trait ObjectImpl: ObjectType + ClassInitImpl { /// /// Each struct will implement this trait with `T` equal to each /// superclass. For example, a device should implement at least -/// `ClassInitImpl<`[`DeviceClass`](crate::bindings::DeviceClass)`>`. +/// `ClassInitImpl<`[`DeviceClass`](crate::bindings::DeviceClass)`>` and +/// `ClassInitImpl<`[`ObjectClass`](crate::bindings::ObjectClass)`>`. /// Such implementations are made in one of two ways. /// /// For most superclasses, `ClassInitImpl` is provided by the `qemu-api` @@ -147,9 +151,13 @@ pub trait ObjectImpl: ObjectType + ClassInitImpl { /// ```ignore /// impl ClassInitImpl for T /// where -/// T: DeviceImpl, +/// T: ClassInitImpl + DeviceImpl, /// ``` /// +/// The bound on `ClassInitImpl` is needed so that, +/// after initializing the `DeviceClass` part of the class struct, +/// the parent [`ObjectClass`] is initialized as well. +/// /// The other case is when manual implementation of the trait is needed. /// This covers the following cases: /// @@ -235,3 +243,33 @@ extern "C" fn ctor_fn() { } }; } + +/// # Safety +/// +/// We expect the FFI user of this function to pass a valid pointer that +/// can be downcasted to type `T`. We also expect the device is +/// readable/writeable from one thread at any time. +unsafe extern "C" fn rust_unparent_fn(dev: *mut Object) { + unsafe { + assert!(!dev.is_null()); + let state = core::ptr::NonNull::new_unchecked(dev.cast::()); + T::UNPARENT.unwrap()(state.as_ref()); + } +} + +impl ClassInitImpl for T +where + T: ObjectImpl, +{ + fn class_init(oc: &mut ObjectClass) { + if ::UNPARENT.is_some() { + oc.unparent = Some(rust_unparent_fn::); + } + } +} + +unsafe impl ObjectType for Object { + type Class = ObjectClass; + const TYPE_NAME: &'static CStr = + unsafe { CStr::from_bytes_with_nul_unchecked(bindings::TYPE_OBJECT) }; +} diff --git a/rust/qemu-api/src/device_class.rs b/rust/qemu-api/src/device_class.rs index dcec5488291..a9965d1f123 100644 --- a/rust/qemu-api/src/device_class.rs +++ b/rust/qemu-api/src/device_class.rs @@ -5,7 +5,7 @@ use std::ffi::CStr; use crate::{ - bindings::{self, DeviceClass, DeviceState, Error, Property, VMStateDescription}, + bindings::{self, DeviceClass, DeviceState, Error, ObjectClass, Property, VMStateDescription}, definitions::ClassInitImpl, prelude::*, }; @@ -68,7 +68,7 @@ fn vmsd() -> Option<&'static VMStateDescription> { impl ClassInitImpl for T where - T: DeviceImpl, + T: ClassInitImpl + DeviceImpl, { fn class_init(dc: &mut DeviceClass) { if ::REALIZE.is_some() { @@ -88,6 +88,8 @@ fn class_init(dc: &mut DeviceClass) { bindings::device_class_set_props_n(dc, prop.as_ptr(), prop.len()); } } + + >::class_init(&mut dc.parent_class); } } From patchwork Thu Dec 19 08:32:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 13914808 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 71BD4E7718A for ; Thu, 19 Dec 2024 08:34:01 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tOByR-0005eq-TX; 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Thu, 19 Dec 2024 00:33:26 -0800 (PST) X-Google-Smtp-Source: AGHT+IELv+0okT3YyluCSaV6T+pO+CmxsHf8UVXLFilooXvgj2/Y7XlN1meiK7tZIqCbxvoUSPj8uA== X-Received: by 2002:a5d:648c:0:b0:385:e4a7:df09 with SMTP id ffacd0b85a97d-38a19b34d45mr2547313f8f.44.1734597206023; Thu, 19 Dec 2024 00:33:26 -0800 (PST) Received: from [192.168.10.47] ([151.81.118.45]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38a1c8474b6sm989965f8f.51.2024.12.19.00.33.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Dec 2024 00:33:25 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: Zhao Liu Subject: [PULL 27/41] rust: rename qemu-api modules to follow C code a bit more Date: Thu, 19 Dec 2024 09:32:14 +0100 Message-ID: <20241219083228.363430-28-pbonzini@redhat.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241219083228.363430-1-pbonzini@redhat.com> References: <20241219083228.363430-1-pbonzini@redhat.com> MIME-Version: 1.0 Received-SPF: pass client-ip=170.10.133.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -31 X-Spam_score: -3.2 X-Spam_bar: --- X-Spam_report: (-3.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-1.116, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org A full match would mean calling them qom::object and hw::core::qdev. For now, keep the names shorter but still a bit easier to find. Reviewed-by: Zhao Liu Signed-off-by: Paolo Bonzini --- rust/hw/char/pl011/src/device.rs | 4 +- rust/qemu-api-macros/src/lib.rs | 2 +- rust/qemu-api/meson.build | 5 +- rust/qemu-api/src/lib.rs | 5 +- rust/qemu-api/src/module.rs | 43 +++++++++++ rust/qemu-api/src/prelude.rs | 2 +- .../qemu-api/src/{device_class.rs => qdev.rs} | 4 +- rust/qemu-api/src/{definitions.rs => qom.rs} | 76 ++++++++----------- rust/qemu-api/src/sysbus.rs | 2 +- rust/qemu-api/tests/tests.rs | 4 +- 10 files changed, 91 insertions(+), 56 deletions(-) create mode 100644 rust/qemu-api/src/module.rs rename rust/qemu-api/src/{device_class.rs => qdev.rs} (97%) rename rust/qemu-api/src/{definitions.rs => qom.rs} (84%) diff --git a/rust/hw/char/pl011/src/device.rs b/rust/hw/char/pl011/src/device.rs index d9e9f35f456..3fed8b4ad25 100644 --- a/rust/hw/char/pl011/src/device.rs +++ b/rust/hw/char/pl011/src/device.rs @@ -11,10 +11,10 @@ use qemu_api::{ bindings::{self, *}, c_str, - definitions::ObjectImpl, - device_class::DeviceImpl, irq::InterruptSource, prelude::*, + qdev::DeviceImpl, + qom::ObjectImpl, }; use crate::{ diff --git a/rust/qemu-api-macros/src/lib.rs b/rust/qemu-api-macros/src/lib.rs index cf99ac04b8f..74a8bc7503e 100644 --- a/rust/qemu-api-macros/src/lib.rs +++ b/rust/qemu-api-macros/src/lib.rs @@ -40,7 +40,7 @@ pub fn derive_object(input: TokenStream) -> TokenStream { let expanded = quote! { ::qemu_api::module_init! { MODULE_INIT_QOM => unsafe { - ::qemu_api::bindings::type_register_static(&<#name as ::qemu_api::definitions::ObjectImpl>::TYPE_INFO); + ::qemu_api::bindings::type_register_static(&<#name as ::qemu_api::qom::ObjectImpl>::TYPE_INFO); } } }; diff --git a/rust/qemu-api/meson.build b/rust/qemu-api/meson.build index adcee661150..7ff408ad68e 100644 --- a/rust/qemu-api/meson.build +++ b/rust/qemu-api/meson.build @@ -19,11 +19,12 @@ _qemu_api_rs = static_library( 'src/bitops.rs', 'src/cell.rs', 'src/c_str.rs', - 'src/definitions.rs', - 'src/device_class.rs', 'src/irq.rs', + 'src/module.rs', 'src/offset_of.rs', 'src/prelude.rs', + 'src/qdev.rs', + 'src/qom.rs', 'src/sysbus.rs', 'src/vmstate.rs', 'src/zeroable.rs', diff --git a/rust/qemu-api/src/lib.rs b/rust/qemu-api/src/lib.rs index 9e007e16354..124bece0449 100644 --- a/rust/qemu-api/src/lib.rs +++ b/rust/qemu-api/src/lib.rs @@ -15,10 +15,11 @@ pub mod bitops; pub mod c_str; pub mod cell; -pub mod definitions; -pub mod device_class; pub mod irq; +pub mod module; pub mod offset_of; +pub mod qdev; +pub mod qom; pub mod sysbus; pub mod vmstate; pub mod zeroable; diff --git a/rust/qemu-api/src/module.rs b/rust/qemu-api/src/module.rs new file mode 100644 index 00000000000..fa5cea3598f --- /dev/null +++ b/rust/qemu-api/src/module.rs @@ -0,0 +1,43 @@ +// Copyright 2024, Linaro Limited +// Author(s): Manos Pitsidianakis +// SPDX-License-Identifier: GPL-2.0-or-later + +//! Macro to register blocks of code that run as QEMU starts up. + +#[macro_export] +macro_rules! module_init { + ($type:ident => $body:block) => { + const _: () = { + #[used] + #[cfg_attr( + not(any(target_vendor = "apple", target_os = "windows")), + link_section = ".init_array" + )] + #[cfg_attr(target_vendor = "apple", link_section = "__DATA,__mod_init_func")] + #[cfg_attr(target_os = "windows", link_section = ".CRT$XCU")] + pub static LOAD_MODULE: extern "C" fn() = { + extern "C" fn init_fn() { + $body + } + + extern "C" fn ctor_fn() { + unsafe { + $crate::bindings::register_module_init( + Some(init_fn), + $crate::bindings::module_init_type::$type, + ); + } + } + + ctor_fn + }; + }; + }; + + // shortcut because it's quite common that $body needs unsafe {} + ($type:ident => unsafe $body:block) => { + $crate::module_init! { + $type => { unsafe { $body } } + } + }; +} diff --git a/rust/qemu-api/src/prelude.rs b/rust/qemu-api/src/prelude.rs index 1b8677b2d9a..5cc41f081f9 100644 --- a/rust/qemu-api/src/prelude.rs +++ b/rust/qemu-api/src/prelude.rs @@ -7,4 +7,4 @@ pub use crate::cell::BqlCell; pub use crate::cell::BqlRefCell; -pub use crate::definitions::ObjectType; +pub use crate::qom::ObjectType; diff --git a/rust/qemu-api/src/device_class.rs b/rust/qemu-api/src/qdev.rs similarity index 97% rename from rust/qemu-api/src/device_class.rs rename to rust/qemu-api/src/qdev.rs index a9965d1f123..ad4c12d097e 100644 --- a/rust/qemu-api/src/device_class.rs +++ b/rust/qemu-api/src/qdev.rs @@ -2,12 +2,14 @@ // Author(s): Manos Pitsidianakis // SPDX-License-Identifier: GPL-2.0-or-later +//! Bindings to create devices and access device functionality from Rust. + use std::ffi::CStr; use crate::{ bindings::{self, DeviceClass, DeviceState, Error, ObjectClass, Property, VMStateDescription}, - definitions::ClassInitImpl, prelude::*, + qom::ClassInitImpl, }; /// Trait providing the contents of [`DeviceClass`]. diff --git a/rust/qemu-api/src/definitions.rs b/rust/qemu-api/src/qom.rs similarity index 84% rename from rust/qemu-api/src/definitions.rs rename to rust/qemu-api/src/qom.rs index a2481c1fe70..2222d1a5ab9 100644 --- a/rust/qemu-api/src/definitions.rs +++ b/rust/qemu-api/src/qom.rs @@ -2,7 +2,34 @@ // Author(s): Manos Pitsidianakis // SPDX-License-Identifier: GPL-2.0-or-later -//! Definitions required by QEMU when registering a device. +//! Bindings to access QOM functionality from Rust. +//! +//! This module provides automatic creation and registration of `TypeInfo` +//! for classes that are written in Rust, and mapping between Rust traits +//! and QOM vtables. +//! +//! # Structure of a class +//! +//! A leaf class only needs a struct holding instance state. The struct must +//! implement the [`ObjectType`] trait, as well as any `*Impl` traits that exist +//! for its superclasses. +//! +//! If a class has subclasses, it will also provide a struct for instance data, +//! with the same characteristics as for concrete classes, but it also needs +//! additional components to support virtual methods: +//! +//! * a struct for class data, for example `DeviceClass`. This corresponds to +//! the C "class struct" and holds the vtable that is used by instances of the +//! class and its subclasses. It must start with its parent's class struct. +//! +//! * a trait for virtual method implementations, for example `DeviceImpl`. +//! Child classes implement this trait to provide their own behavior for +//! virtual methods. The trait's methods take `&self` to access instance data. +//! +//! * an implementation of [`ClassInitImpl`], for example +//! `ClassInitImpl`. This fills the vtable in the class struct; +//! the source for this is the `*Impl` trait; the associated consts and +//! functions if needed are wrapped to map C types into Rust types. use std::{ffi::CStr, os::raw::c_void}; @@ -143,10 +170,9 @@ pub trait ObjectImpl: ObjectType + ClassInitImpl { /// /// For most superclasses, `ClassInitImpl` is provided by the `qemu-api` /// crate itself. The Rust implementation of methods will come from a -/// trait like [`ObjectImpl`] or -/// [`DeviceImpl`](crate::device_class::DeviceImpl), and `ClassInitImpl` is -/// provided by blanket implementations that operate on all implementors of the -/// `*Impl`* trait. For example: +/// trait like [`ObjectImpl`] or [`DeviceImpl`](crate::qdev::DeviceImpl), +/// and `ClassInitImpl` is provided by blanket implementations that +/// operate on all implementors of the `*Impl`* trait. For example: /// /// ```ignore /// impl ClassInitImpl for T @@ -194,7 +220,7 @@ pub trait ClassInitImpl { /// can change them to override virtual methods of a parent class. /// /// The virtual method implementations usually come from another - /// trait, for example [`DeviceImpl`](crate::device_class::DeviceImpl) + /// trait, for example [`DeviceImpl`](crate::qdev::DeviceImpl) /// when `T` is [`DeviceClass`](crate::bindings::DeviceClass). /// /// On entry, `klass`'s parent class is initialized, while the other fields @@ -206,44 +232,6 @@ pub trait ClassInitImpl { fn class_init(klass: &mut T); } -#[macro_export] -macro_rules! module_init { - ($type:ident => $body:block) => { - const _: () = { - #[used] - #[cfg_attr( - not(any(target_vendor = "apple", target_os = "windows")), - link_section = ".init_array" - )] - #[cfg_attr(target_vendor = "apple", link_section = "__DATA,__mod_init_func")] - #[cfg_attr(target_os = "windows", link_section = ".CRT$XCU")] - pub static LOAD_MODULE: extern "C" fn() = { - extern "C" fn init_fn() { - $body - } - - extern "C" fn ctor_fn() { - unsafe { - $crate::bindings::register_module_init( - Some(init_fn), - $crate::bindings::module_init_type::$type, - ); - } - } - - ctor_fn - }; - }; - }; - - // shortcut because it's quite common that $body needs unsafe {} - ($type:ident => unsafe $body:block) => { - $crate::module_init! { - $type => { unsafe { $body } } - } - }; -} - /// # Safety /// /// We expect the FFI user of this function to pass a valid pointer that diff --git a/rust/qemu-api/src/sysbus.rs b/rust/qemu-api/src/sysbus.rs index 5d15b317405..fa69cadd7c1 100644 --- a/rust/qemu-api/src/sysbus.rs +++ b/rust/qemu-api/src/sysbus.rs @@ -9,9 +9,9 @@ use crate::{ bindings::{self, DeviceClass}, cell::bql_locked, - definitions::ClassInitImpl, irq::InterruptSource, prelude::*, + qom::ClassInitImpl, }; unsafe impl ObjectType for SysBusDevice { diff --git a/rust/qemu-api/tests/tests.rs b/rust/qemu-api/tests/tests.rs index ed3a555e76d..78f7da474b2 100644 --- a/rust/qemu-api/tests/tests.rs +++ b/rust/qemu-api/tests/tests.rs @@ -5,8 +5,8 @@ use std::ffi::CStr; use qemu_api::{ - bindings::*, c_str, declare_properties, define_property, definitions::ObjectImpl, - device_class::DeviceImpl, impl_device_class, prelude::*, zeroable::Zeroable, + bindings::*, c_str, declare_properties, define_property, prelude::*, qdev::DeviceImpl, + qom::ObjectImpl, zeroable::Zeroable, }; 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helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -31 X-Spam_score: -3.2 X-Spam_bar: --- X-Spam_report: (-3.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-1.116, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Long term we do not want device code to use "bindings" at all, so make it possible to get the relevant types from the other modules of qemu-api. Reviewed-by: Zhao Liu Signed-off-by: Paolo Bonzini --- rust/qemu-api/src/qdev.rs | 7 +++++-- rust/qemu-api/src/qom.rs | 12 +++++++----- rust/qemu-api/src/sysbus.rs | 5 +---- rust/qemu-api/src/vmstate.rs | 9 +++++---- rust/qemu-api/tests/tests.rs | 9 +++++++-- 5 files changed, 25 insertions(+), 17 deletions(-) diff --git a/rust/qemu-api/src/qdev.rs b/rust/qemu-api/src/qdev.rs index ad4c12d097e..07a502a8371 100644 --- a/rust/qemu-api/src/qdev.rs +++ b/rust/qemu-api/src/qdev.rs @@ -6,10 +6,13 @@ use std::ffi::CStr; +pub use bindings::{DeviceClass, DeviceState, Property}; + use crate::{ - bindings::{self, DeviceClass, DeviceState, Error, ObjectClass, Property, VMStateDescription}, + bindings::{self, Error}, prelude::*, - qom::ClassInitImpl, + qom::{ClassInitImpl, ObjectClass}, + vmstate::VMStateDescription, }; /// Trait providing the contents of [`DeviceClass`]. diff --git a/rust/qemu-api/src/qom.rs b/rust/qemu-api/src/qom.rs index 2222d1a5ab9..a663647ffe5 100644 --- a/rust/qemu-api/src/qom.rs +++ b/rust/qemu-api/src/qom.rs @@ -33,7 +33,9 @@ use std::{ffi::CStr, os::raw::c_void}; -use crate::bindings::{self, Object, ObjectClass, TypeInfo}; +pub use bindings::{Object, ObjectClass}; + +use crate::bindings::{self, TypeInfo}; unsafe extern "C" fn rust_instance_init(obj: *mut Object) { // SAFETY: obj is an instance of T, since rust_instance_init @@ -164,9 +166,9 @@ pub trait ObjectImpl: ObjectType + ClassInitImpl { /// /// Each struct will implement this trait with `T` equal to each /// superclass. For example, a device should implement at least -/// `ClassInitImpl<`[`DeviceClass`](crate::bindings::DeviceClass)`>` and -/// `ClassInitImpl<`[`ObjectClass`](crate::bindings::ObjectClass)`>`. -/// Such implementations are made in one of two ways. +/// `ClassInitImpl<`[`DeviceClass`](crate::qdev::DeviceClass)`>` and +/// `ClassInitImpl<`[`ObjectClass`]`>`. Such implementations are made +/// in one of two ways. /// /// For most superclasses, `ClassInitImpl` is provided by the `qemu-api` /// crate itself. The Rust implementation of methods will come from a @@ -221,7 +223,7 @@ pub trait ClassInitImpl { /// /// The virtual method implementations usually come from another /// trait, for example [`DeviceImpl`](crate::qdev::DeviceImpl) - /// when `T` is [`DeviceClass`](crate::bindings::DeviceClass). + /// when `T` is [`DeviceClass`](crate::qdev::DeviceClass). /// /// On entry, `klass`'s parent class is initialized, while the other fields /// are all zero; it is therefore assumed that all fields in `T` can be diff --git a/rust/qemu-api/src/sysbus.rs b/rust/qemu-api/src/sysbus.rs index fa69cadd7c1..9abc687a261 100644 --- a/rust/qemu-api/src/sysbus.rs +++ b/rust/qemu-api/src/sysbus.rs @@ -7,10 +7,7 @@ pub use bindings::{SysBusDevice, SysBusDeviceClass}; use crate::{ - bindings::{self, DeviceClass}, - cell::bql_locked, - irq::InterruptSource, - prelude::*, + bindings, cell::bql_locked, irq::InterruptSource, prelude::*, qdev::DeviceClass, qom::ClassInitImpl, }; diff --git a/rust/qemu-api/src/vmstate.rs b/rust/qemu-api/src/vmstate.rs index bedcf1e8f39..25c68b703ea 100644 --- a/rust/qemu-api/src/vmstate.rs +++ b/rust/qemu-api/src/vmstate.rs @@ -10,6 +10,8 @@ //! [`vmstate_fields`](crate::vmstate_fields) are meant to be used when //! declaring a device model state struct. +pub use crate::bindings::VMStateDescription; + #[doc(alias = "VMSTATE_UNUSED_BUFFER")] #[macro_export] macro_rules! vmstate_unused_buffer { @@ -328,7 +330,7 @@ macro_rules! vmstate_fields { } /// A transparent wrapper type for the `subsections` field of -/// [`VMStateDescription`](crate::bindings::VMStateDescription). +/// [`VMStateDescription`]. /// /// This is necessary to be able to declare subsection descriptions as statics, /// because the only way to implement `Sync` for a foreign type (and `*const` @@ -342,9 +344,8 @@ macro_rules! vmstate_fields { unsafe impl Sync for VMStateSubsectionsWrapper {} -/// Helper macro to declare a list of subsections -/// ([`VMStateDescription`](`crate::bindings::VMStateDescription`)) into a -/// static and return a pointer to the array of pointers it created. +/// Helper macro to declare a list of subsections ([`VMStateDescription`]) +/// into a static and return a pointer to the array of pointers it created. #[macro_export] macro_rules! vmstate_subsections { ($($subsection:expr),*$(,)*) => {{ diff --git a/rust/qemu-api/tests/tests.rs b/rust/qemu-api/tests/tests.rs index 78f7da474b2..68557fb85c7 100644 --- a/rust/qemu-api/tests/tests.rs +++ b/rust/qemu-api/tests/tests.rs @@ -5,8 +5,13 @@ use std::ffi::CStr; use qemu_api::{ - bindings::*, c_str, declare_properties, define_property, prelude::*, qdev::DeviceImpl, - qom::ObjectImpl, zeroable::Zeroable, + bindings::*, + c_str, declare_properties, define_property, + prelude::*, + qdev::{DeviceImpl, DeviceState, Property}, + qom::ObjectImpl, + vmstate::VMStateDescription, + zeroable::Zeroable, }; #[test] From patchwork Thu Dec 19 08:32:16 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 13914820 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3E5C2E77184 for ; Thu, 19 Dec 2024 08:35:52 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tOByY-0005ua-Bv; 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Thu, 19 Dec 2024 00:33:33 -0800 (PST) X-Google-Smtp-Source: AGHT+IHapKmpVr0C+lCqozoqQNf3FxXQeibCMK1ky1BND1hEDI9XpgIToHEEj/Ar2Q0WqoLriYZmuw== X-Received: by 2002:a5d:47cf:0:b0:385:d852:29ed with SMTP id ffacd0b85a97d-388e4d8e083mr5137209f8f.36.1734597212541; Thu, 19 Dec 2024 00:33:32 -0800 (PST) Received: from [192.168.10.47] ([151.81.118.45]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-436612008bcsm11157875e9.16.2024.12.19.00.33.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Dec 2024 00:33:30 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: Zhao Liu Subject: [PULL 29/41] rust: tests: allow writing more than one test Date: Thu, 19 Dec 2024 09:32:16 +0100 Message-ID: <20241219083228.363430-30-pbonzini@redhat.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241219083228.363430-1-pbonzini@redhat.com> References: <20241219083228.363430-1-pbonzini@redhat.com> MIME-Version: 1.0 Received-SPF: pass client-ip=170.10.133.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -31 X-Spam_score: -3.2 X-Spam_bar: --- X-Spam_report: (-3.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-1.116, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Reviewed-by: Zhao Liu Signed-off-by: Paolo Bonzini --- rust/qemu-api/tests/tests.rs | 115 ++++++++++++++++++++--------------- 1 file changed, 67 insertions(+), 48 deletions(-) diff --git a/rust/qemu-api/tests/tests.rs b/rust/qemu-api/tests/tests.rs index 68557fb85c7..953cb15975b 100644 --- a/rust/qemu-api/tests/tests.rs +++ b/rust/qemu-api/tests/tests.rs @@ -2,7 +2,7 @@ // Author(s): Manos Pitsidianakis // SPDX-License-Identifier: GPL-2.0-or-later -use std::ffi::CStr; +use std::{cell::Cell, ffi::CStr, sync::Mutex}; use qemu_api::{ bindings::*, @@ -14,55 +14,74 @@ zeroable::Zeroable, }; +// Test that macros can compile. +pub static VMSTATE: VMStateDescription = VMStateDescription { + name: c_str!("name").as_ptr(), + unmigratable: true, + ..Zeroable::ZERO +}; + +#[derive(qemu_api_macros::offsets)] +#[repr(C)] +#[derive(qemu_api_macros::Object)] +pub struct DummyState { + parent: DeviceState, + migrate_clock: bool, +} + +declare_properties! { + DUMMY_PROPERTIES, + define_property!( + c_str!("migrate-clk"), + DummyState, + migrate_clock, + unsafe { &qdev_prop_bool }, + bool + ), +} + +unsafe impl ObjectType for DummyState { + type Class = ::Class; + const TYPE_NAME: &'static CStr = c_str!("dummy"); +} + +impl ObjectImpl for DummyState { + type ParentType = DeviceState; + const ABSTRACT: bool = false; +} + +impl DeviceImpl for DummyState { + fn properties() -> &'static [Property] { + &DUMMY_PROPERTIES + } + fn vmsd() -> Option<&'static VMStateDescription> { + Some(&VMSTATE) + } +} + +fn init_qom() { + // Tests can run in parallel; currently they do not need the + // Big QEMU Lock, so use an independent mutex (LazyLock is + // not available until Rust 1.80.0) to serialize calls to + // `type_register()`. If the tests start needing the BQL, + // bql_lock()/bql_unlock() can be wrapped in a similar way + // to `Mutex<>` and this can be changed to use a BqlCell. + static ONCE: Mutex> = Mutex::new(Cell::new(false)); + + let g = ONCE.lock().unwrap(); + if !g.get() { + unsafe { + module_call_init(module_init_type::MODULE_INIT_QOM); + } + g.set(true); + } +} + #[test] -fn test_device_decl_macros() { - // Test that macros can compile. - pub static VMSTATE: VMStateDescription = VMStateDescription { - name: c_str!("name").as_ptr(), - unmigratable: true, - ..Zeroable::ZERO - }; - - #[derive(qemu_api_macros::offsets)] - #[repr(C)] - #[derive(qemu_api_macros::Object)] - pub struct DummyState { - pub _parent: DeviceState, - pub migrate_clock: bool, - } - - declare_properties! { - DUMMY_PROPERTIES, - define_property!( - c_str!("migrate-clk"), - DummyState, - migrate_clock, - unsafe { &qdev_prop_bool }, - bool - ), - } - - unsafe impl ObjectType for DummyState { - type Class = ::Class; - const TYPE_NAME: &'static CStr = c_str!("dummy"); - } - - impl ObjectImpl for DummyState { - type ParentType = DeviceState; - const ABSTRACT: bool = false; - } - - impl DeviceImpl for DummyState { - fn properties() -> &'static [Property] { - &DUMMY_PROPERTIES - } - fn vmsd() -> Option<&'static VMStateDescription> { - Some(&VMSTATE) - } - } - +/// Create and immediately drop an instance. +fn test_object_new() { + init_qom(); unsafe { - module_call_init(module_init_type::MODULE_INIT_QOM); object_unref(object_new(DummyState::TYPE_NAME.as_ptr()).cast()); } } From patchwork Thu Dec 19 08:32:17 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 13914809 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5D48DE77184 for ; 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Thu, 19 Dec 2024 00:33:34 -0800 (PST) X-Google-Smtp-Source: AGHT+IFb4wdZIV6TntoyBuhA0U9kU+314TdlbN0B2hR9+YHjFbfl8YkfjsFoMcqlA10Ols9g1JW9Fw== X-Received: by 2002:a05:600c:3106:b0:431:12a8:7f1a with SMTP id 5b1f17b1804b1-4365536801amr56419755e9.16.1734597213671; Thu, 19 Dec 2024 00:33:33 -0800 (PST) Received: from [192.168.10.47] ([151.81.118.45]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-436611ea3d5sm11342085e9.5.2024.12.19.00.33.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Dec 2024 00:33:33 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: Zhao Liu Subject: [PULL 30/41] rust: qom: add casting functionality Date: Thu, 19 Dec 2024 09:32:17 +0100 Message-ID: <20241219083228.363430-31-pbonzini@redhat.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241219083228.363430-1-pbonzini@redhat.com> References: <20241219083228.363430-1-pbonzini@redhat.com> MIME-Version: 1.0 Received-SPF: pass client-ip=170.10.133.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -31 X-Spam_score: -3.2 X-Spam_bar: --- X-Spam_report: (-3.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-1.116, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Add traits that let client cast typecast safely between object types. In particular, an upcast is compile-time guaranteed to succeed, and a YOLO C-style downcast must be marked as unsafe. The traits are based on an IsA<> trait that declares what is a subclass of what, which is an idea taken from glib-rs (https://docs.rs/glib/latest/glib/object/trait.IsA.html). The four primitives are also taken from there (https://docs.rs/glib/latest/glib/object/trait.Cast.html). However, the implementation of casting itself is a bit different and uses the Deref trait. This removes some pointer arithmetic from the pl011 device; it is also a prerequisite for the definition of methods, so that they can be invoked on all subclass structs. This will use the IsA<> trait to detect the structs that support the methods. glib also has a "monadic" casting trait which could be implemented on Option (as in https://docs.rs/glib/latest/glib/object/trait.CastNone.html) and perhaps even Result. For now I'm leaving it out, as the patch is already big enough and the benefit seems debatable. Reviewed-by: Zhao Liu Signed-off-by: Paolo Bonzini --- rust/Cargo.toml | 1 + rust/hw/char/pl011/src/device.rs | 12 +- rust/qemu-api/src/prelude.rs | 7 + rust/qemu-api/src/qdev.rs | 1 + rust/qemu-api/src/qom.rs | 283 ++++++++++++++++++++++++++++++- rust/qemu-api/src/sysbus.rs | 7 +- rust/qemu-api/tests/tests.rs | 70 +++++++- 7 files changed, 368 insertions(+), 13 deletions(-) diff --git a/rust/Cargo.toml b/rust/Cargo.toml index 6ec19b67297..5b6b6ca4382 100644 --- a/rust/Cargo.toml +++ b/rust/Cargo.toml @@ -38,6 +38,7 @@ should_implement_trait = "deny" unused_self = "allow" # default-allow lints +as_ptr_cast_mut = "deny" as_underscore = "deny" assertions_on_result_states = "deny" bool_to_int_with_if = "deny" diff --git a/rust/hw/char/pl011/src/device.rs b/rust/hw/char/pl011/src/device.rs index 3fed8b4ad25..e85d13c5a2b 100644 --- a/rust/hw/char/pl011/src/device.rs +++ b/rust/hw/char/pl011/src/device.rs @@ -106,6 +106,8 @@ pub struct PL011State { device_id: DeviceId, } +qom_isa!(PL011State : SysBusDevice, DeviceState, Object); + unsafe impl ObjectType for PL011State { type Class = ::Class; const TYPE_NAME: &'static CStr = crate::TYPE_PL011; @@ -140,8 +142,6 @@ impl PL011State { unsafe fn init(&mut self) { const CLK_NAME: &CStr = c_str!("clk"); - let sbd = unsafe { &mut *(addr_of_mut!(*self).cast::()) }; - // SAFETY: // // self and self.iomem are guaranteed to be valid at this point since callers @@ -155,15 +155,16 @@ unsafe fn init(&mut self) { Self::TYPE_NAME.as_ptr(), 0x1000, ); + + let sbd: &mut SysBusDevice = self.upcast_mut(); sysbus_init_mmio(sbd, addr_of_mut!(self.iomem)); } for irq in self.interrupts.iter() { + let sbd: &SysBusDevice = self.upcast(); sbd.init_irq(irq); } - let dev = addr_of_mut!(*self).cast::(); - // SAFETY: // // self.clock is not initialized at this point; but since `NonNull<_>` is Copy, @@ -172,6 +173,7 @@ unsafe fn init(&mut self) { // calls this function to initialize the fields; therefore no code is // able to access an invalid self.clock value. unsafe { + let dev: &mut DeviceState = self.upcast_mut(); self.clock = NonNull::new(qdev_init_clock_in( dev, CLK_NAME.as_ptr(), @@ -632,6 +634,8 @@ unsafe fn init(&mut self) { } } +qom_isa!(PL011Luminary : PL011State, SysBusDevice, DeviceState, Object); + unsafe impl ObjectType for PL011Luminary { type Class = ::Class; const TYPE_NAME: &'static CStr = crate::TYPE_PL011_LUMINARY; diff --git a/rust/qemu-api/src/prelude.rs b/rust/qemu-api/src/prelude.rs index 5cc41f081f9..a0a71fcd6bc 100644 --- a/rust/qemu-api/src/prelude.rs +++ b/rust/qemu-api/src/prelude.rs @@ -7,4 +7,11 @@ pub use crate::cell::BqlCell; pub use crate::cell::BqlRefCell; +pub use crate::qom::IsA; +pub use crate::qom::Object; +pub use crate::qom::ObjectCast; +pub use crate::qom::ObjectCastMut; +pub use crate::qom::ObjectDeref; pub use crate::qom::ObjectType; + +pub use crate::qom_isa; diff --git a/rust/qemu-api/src/qdev.rs b/rust/qemu-api/src/qdev.rs index 07a502a8371..686054e737a 100644 --- a/rust/qemu-api/src/qdev.rs +++ b/rust/qemu-api/src/qdev.rs @@ -144,3 +144,4 @@ unsafe impl ObjectType for DeviceState { const TYPE_NAME: &'static CStr = unsafe { CStr::from_bytes_with_nul_unchecked(bindings::TYPE_DEVICE) }; } +qom_isa!(DeviceState: Object); diff --git a/rust/qemu-api/src/qom.rs b/rust/qemu-api/src/qom.rs index a663647ffe5..74ea5721f77 100644 --- a/rust/qemu-api/src/qom.rs +++ b/rust/qemu-api/src/qom.rs @@ -4,15 +4,22 @@ //! Bindings to access QOM functionality from Rust. //! -//! This module provides automatic creation and registration of `TypeInfo` -//! for classes that are written in Rust, and mapping between Rust traits -//! and QOM vtables. +//! The QEMU Object Model (QOM) provides inheritance and dynamic typing for QEMU +//! devices. This module makes QOM's features available in Rust through two main +//! mechanisms: +//! +//! * Automatic creation and registration of `TypeInfo` for classes that are +//! written in Rust, as well as mapping between Rust traits and QOM vtables. +//! +//! * Type-safe casting between parent and child classes, through the [`IsA`] +//! trait and methods such as [`upcast`](ObjectCast::upcast) and +//! [`downcast`](ObjectCast::downcast). //! //! # Structure of a class //! //! A leaf class only needs a struct holding instance state. The struct must -//! implement the [`ObjectType`] trait, as well as any `*Impl` traits that exist -//! for its superclasses. +//! implement the [`ObjectType`] and [`IsA`] traits, as well as any `*Impl` +//! traits that exist for its superclasses. //! //! If a class has subclasses, it will also provide a struct for instance data, //! with the same characteristics as for concrete classes, but it also needs @@ -31,11 +38,57 @@ //! the source for this is the `*Impl` trait; the associated consts and //! functions if needed are wrapped to map C types into Rust types. -use std::{ffi::CStr, os::raw::c_void}; +use std::{ + ffi::CStr, + ops::{Deref, DerefMut}, + os::raw::c_void, +}; pub use bindings::{Object, ObjectClass}; -use crate::bindings::{self, TypeInfo}; +use crate::bindings::{self, object_dynamic_cast, TypeInfo}; + +/// Marker trait: `Self` can be statically upcasted to `P` (i.e. `P` is a direct +/// or indirect parent of `Self`). +/// +/// # Safety +/// +/// The struct `Self` must be `#[repr(C)]` and must begin, directly or +/// indirectly, with a field of type `P`. This ensures that invalid casts, +/// which rely on `IsA<>` for static checking, are rejected at compile time. +pub unsafe trait IsA: ObjectType {} + +// SAFETY: it is always safe to cast to your own type +unsafe impl IsA for T {} + +/// Macro to mark superclasses of QOM classes. This enables type-safe +/// up- and downcasting. +/// +/// # Safety +/// +/// This macro is a thin wrapper around the [`IsA`] trait and performs +/// no checking whatsoever of what is declared. It is the caller's +/// responsibility to have $struct begin, directly or indirectly, with +/// a field of type `$parent`. +#[macro_export] +macro_rules! qom_isa { + ($struct:ty : $($parent:ty),* ) => { + $( + // SAFETY: it is the caller responsibility to have $parent as the + // first field + unsafe impl $crate::qom::IsA<$parent> for $struct {} + + impl AsRef<$parent> for $struct { + fn as_ref(&self) -> &$parent { + // SAFETY: follows the same rules as for IsA, which is + // declared above. + let ptr: *const Self = self; + unsafe { &*ptr.cast::<$parent>() } + } + } + )* + }; +} unsafe extern "C" fn rust_instance_init(obj: *mut Object) { // SAFETY: obj is an instance of T, since rust_instance_init @@ -96,8 +149,224 @@ pub unsafe trait ObjectType: Sized { /// The name of the type, which can be passed to `object_new()` to /// generate an instance of this type. const TYPE_NAME: &'static CStr; + + /// Return the receiver as an Object. This is always safe, even + /// if this type represents an interface. + fn as_object(&self) -> &Object { + unsafe { &*self.as_object_ptr() } + } + + /// Return the receiver as a const raw pointer to Object. + /// This is preferrable to `as_object_mut_ptr()` if a C + /// function only needs a `const Object *`. + fn as_object_ptr(&self) -> *const Object { + self.as_ptr().cast() + } + + /// Return the receiver as a mutable raw pointer to Object. + /// + /// # Safety + /// + /// This cast is always safe, but because the result is mutable + /// and the incoming reference is not, this should only be used + /// for calls to C functions, and only if needed. + unsafe fn as_object_mut_ptr(&self) -> *mut Object { + self.as_object_ptr() as *mut _ + } } +/// This trait provides safe casting operations for QOM objects to raw pointers, +/// to be used for example for FFI. The trait can be applied to any kind of +/// reference or smart pointers, and enforces correctness through the [`IsA`] +/// trait. +pub trait ObjectDeref: Deref +where + Self::Target: ObjectType, +{ + /// Convert to a const Rust pointer, to be used for example for FFI. + /// The target pointer type must be the type of `self` or a superclass + fn as_ptr(&self) -> *const U + where + Self::Target: IsA, + { + let ptr: *const Self::Target = self.deref(); + ptr.cast::() + } + + /// Convert to a mutable Rust pointer, to be used for example for FFI. + /// The target pointer type must be the type of `self` or a superclass. + /// Used to implement interior mutability for objects. + /// + /// # Safety + /// + /// This method is unsafe because it overrides const-ness of `&self`. + /// Bindings to C APIs will use it a lot, but otherwise it should not + /// be necessary. + unsafe fn as_mut_ptr(&self) -> *mut U + where + Self::Target: IsA, + { + #[allow(clippy::as_ptr_cast_mut)] + { + self.as_ptr::() as *mut _ + } + } +} + +/// Trait that adds extra functionality for `&T` where `T` is a QOM +/// object type. Allows conversion to/from C objects in generic code. +pub trait ObjectCast: ObjectDeref + Copy +where + Self::Target: ObjectType, +{ + /// Safely convert from a derived type to one of its parent types. + /// + /// This is always safe; the [`IsA`] trait provides static verification + /// trait that `Self` dereferences to `U` or a child of `U`. + fn upcast<'a, U: ObjectType>(self) -> &'a U + where + Self::Target: IsA, + Self: 'a, + { + // SAFETY: soundness is declared via IsA, which is an unsafe trait + unsafe { self.unsafe_cast::() } + } + + /// Attempt to convert to a derived type. + /// + /// Returns `None` if the object is not actually of type `U`. This is + /// verified at runtime by checking the object's type information. + fn downcast<'a, U: IsA>(self) -> Option<&'a U> + where + Self: 'a, + { + self.dynamic_cast::() + } + + /// Attempt to convert between any two types in the QOM hierarchy. + /// + /// Returns `None` if the object is not actually of type `U`. This is + /// verified at runtime by checking the object's type information. + fn dynamic_cast<'a, U: ObjectType>(self) -> Option<&'a U> + where + Self: 'a, + { + unsafe { + // SAFETY: upcasting to Object is always valid, and the + // return type is either NULL or the argument itself + let result: *const U = + object_dynamic_cast(self.as_object_mut_ptr(), U::TYPE_NAME.as_ptr()).cast(); + + result.as_ref() + } + } + + /// Convert to any QOM type without verification. + /// + /// # Safety + /// + /// What safety? You need to know yourself that the cast is correct; only + /// use when performance is paramount. It is still better than a raw + /// pointer `cast()`, which does not even check that you remain in the + /// realm of QOM `ObjectType`s. + /// + /// `unsafe_cast::()` is always safe. + unsafe fn unsafe_cast<'a, U: ObjectType>(self) -> &'a U + where + Self: 'a, + { + unsafe { &*(self.as_ptr::().cast::()) } + } +} + +impl ObjectDeref for &T {} +impl ObjectCast for &T {} + +/// Trait for mutable type casting operations in the QOM hierarchy. +/// +/// This trait provides the mutable counterparts to [`ObjectCast`]'s conversion +/// functions. Unlike `ObjectCast`, this trait returns `Result` for fallible +/// conversions to preserve the original smart pointer if the cast fails. This +/// is necessary because mutable references cannot be copied, so a failed cast +/// must return ownership of the original reference. For example: +/// +/// ```ignore +/// let mut dev = get_device(); +/// // If this fails, we need the original `dev` back to try something else +/// match dev.dynamic_cast_mut::() { +/// Ok(foodev) => /* use foodev */, +/// Err(dev) => /* still have ownership of dev */ +/// } +/// ``` +pub trait ObjectCastMut: Sized + ObjectDeref + DerefMut +where + Self::Target: ObjectType, +{ + /// Safely convert from a derived type to one of its parent types. + /// + /// This is always safe; the [`IsA`] trait provides static verification + /// that `Self` dereferences to `U` or a child of `U`. + fn upcast_mut<'a, U: ObjectType>(self) -> &'a mut U + where + Self::Target: IsA, + Self: 'a, + { + // SAFETY: soundness is declared via IsA, which is an unsafe trait + unsafe { self.unsafe_cast_mut::() } + } + + /// Attempt to convert to a derived type. + /// + /// Returns `Ok(..)` if the object is of type `U`, or `Err(self)` if the + /// object if the conversion failed. This is verified at runtime by + /// checking the object's type information. + fn downcast_mut<'a, U: IsA>(self) -> Result<&'a mut U, Self> + where + Self: 'a, + { + self.dynamic_cast_mut::() + } + + /// Attempt to convert between any two types in the QOM hierarchy. + /// + /// Returns `Ok(..)` if the object is of type `U`, or `Err(self)` if the + /// object if the conversion failed. This is verified at runtime by + /// checking the object's type information. + fn dynamic_cast_mut<'a, U: ObjectType>(self) -> Result<&'a mut U, Self> + where + Self: 'a, + { + unsafe { + // SAFETY: upcasting to Object is always valid, and the + // return type is either NULL or the argument itself + let result: *mut U = + object_dynamic_cast(self.as_object_mut_ptr(), U::TYPE_NAME.as_ptr()).cast(); + + result.as_mut().ok_or(self) + } + } + + /// Convert to any QOM type without verification. + /// + /// # Safety + /// + /// What safety? You need to know yourself that the cast is correct; only + /// use when performance is paramount. It is still better than a raw + /// pointer `cast()`, which does not even check that you remain in the + /// realm of QOM `ObjectType`s. + /// + /// `unsafe_cast::()` is always safe. + unsafe fn unsafe_cast_mut<'a, U: ObjectType>(self) -> &'a mut U + where + Self: 'a, + { + unsafe { &mut *self.as_mut_ptr::().cast::() } + } +} + +impl ObjectDeref for &mut T {} +impl ObjectCastMut for &mut T {} + /// Trait a type must implement to be registered with QEMU. pub trait ObjectImpl: ObjectType + ClassInitImpl { /// The parent of the type. This should match the first field of diff --git a/rust/qemu-api/src/sysbus.rs b/rust/qemu-api/src/sysbus.rs index 9abc687a261..8193734bde4 100644 --- a/rust/qemu-api/src/sysbus.rs +++ b/rust/qemu-api/src/sysbus.rs @@ -7,7 +7,11 @@ pub use bindings::{SysBusDevice, SysBusDeviceClass}; use crate::{ - bindings, cell::bql_locked, irq::InterruptSource, prelude::*, qdev::DeviceClass, + bindings, + cell::bql_locked, + irq::InterruptSource, + prelude::*, + qdev::{DeviceClass, DeviceState}, qom::ClassInitImpl, }; @@ -16,6 +20,7 @@ unsafe impl ObjectType for SysBusDevice { const TYPE_NAME: &'static CStr = unsafe { CStr::from_bytes_with_nul_unchecked(bindings::TYPE_SYS_BUS_DEVICE) }; } +qom_isa!(SysBusDevice: DeviceState, Object); // TODO: add SysBusDeviceImpl impl ClassInitImpl for T diff --git a/rust/qemu-api/tests/tests.rs b/rust/qemu-api/tests/tests.rs index 953cb15975b..5d9f13b15d4 100644 --- a/rust/qemu-api/tests/tests.rs +++ b/rust/qemu-api/tests/tests.rs @@ -2,7 +2,13 @@ // Author(s): Manos Pitsidianakis // SPDX-License-Identifier: GPL-2.0-or-later -use std::{cell::Cell, ffi::CStr, sync::Mutex}; +use std::{ + cell::Cell, + ffi::CStr, + os::raw::c_void, + ptr::{addr_of, addr_of_mut}, + sync::Mutex, +}; use qemu_api::{ bindings::*, @@ -29,6 +35,8 @@ pub struct DummyState { migrate_clock: bool, } +qom_isa!(DummyState: Object, DeviceState); + declare_properties! { DUMMY_PROPERTIES, define_property!( @@ -85,3 +93,63 @@ fn test_object_new() { object_unref(object_new(DummyState::TYPE_NAME.as_ptr()).cast()); } } + +// a note on all "cast" tests: usually, especially for downcasts the desired +// class would be placed on the right, for example: +// +// let sbd_ref = p.dynamic_cast::(); +// +// Here I am doing the opposite to check that the resulting type is correct. + +#[test] +#[allow(clippy::shadow_unrelated)] +/// Test casts on shared references. +fn test_cast() { + init_qom(); + let p: *mut DummyState = unsafe { object_new(DummyState::TYPE_NAME.as_ptr()).cast() }; + + let p_ref: &DummyState = unsafe { &*p }; + let obj_ref: &Object = p_ref.upcast(); + assert_eq!(addr_of!(*obj_ref), p.cast()); + + let sbd_ref: Option<&SysBusDevice> = obj_ref.dynamic_cast(); + assert!(sbd_ref.is_none()); + + let dev_ref: Option<&DeviceState> = obj_ref.downcast(); + assert_eq!(addr_of!(*dev_ref.unwrap()), p.cast()); + + // SAFETY: the cast is wrong, but the value is only used for comparison + unsafe { + let sbd_ref: &SysBusDevice = obj_ref.unsafe_cast(); + assert_eq!(addr_of!(*sbd_ref), p.cast()); + + object_unref(p_ref.as_object_mut_ptr().cast::()); + } +} + +#[test] +#[allow(clippy::shadow_unrelated)] +/// Test casts on mutable references. +fn test_cast_mut() { + init_qom(); + let p: *mut DummyState = unsafe { object_new(DummyState::TYPE_NAME.as_ptr()).cast() }; + + let p_ref: &mut DummyState = unsafe { &mut *p }; + let obj_ref: &mut Object = p_ref.upcast_mut(); + assert_eq!(addr_of_mut!(*obj_ref), p.cast()); + + let sbd_ref: Result<&mut SysBusDevice, &mut Object> = obj_ref.dynamic_cast_mut(); + let obj_ref = sbd_ref.unwrap_err(); + + let dev_ref: Result<&mut DeviceState, &mut Object> = obj_ref.downcast_mut(); + let dev_ref = dev_ref.unwrap(); + assert_eq!(addr_of_mut!(*dev_ref), p.cast()); + + // SAFETY: the cast is wrong, but the value is only used for comparison + unsafe { + let sbd_ref: &mut SysBusDevice = obj_ref.unsafe_cast_mut(); + assert_eq!(addr_of_mut!(*sbd_ref), p.cast()); + + object_unref(p_ref.as_object_mut_ptr().cast::()); + } +} From patchwork Thu Dec 19 08:32:18 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 13914812 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 055D3E77184 for ; Thu, 19 Dec 2024 08:34:44 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tOByj-0006ev-53; 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helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -31 X-Spam_score: -3.2 X-Spam_bar: --- X-Spam_report: (-3.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-1.116, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Add an example of implementing instance methods and converting the result back to a Rust type. In this case the returned types are a string (actually a Cow; but that's transparent as long as it derefs to &str) and a QOM class. Reviewed-by: Zhao Liu Signed-off-by: Paolo Bonzini --- rust/qemu-api/src/prelude.rs | 1 + rust/qemu-api/src/qom.rs | 56 ++++++++++++++++++++++++++++++++++-- rust/qemu-api/tests/tests.rs | 12 ++++++++ 3 files changed, 66 insertions(+), 3 deletions(-) diff --git a/rust/qemu-api/src/prelude.rs b/rust/qemu-api/src/prelude.rs index a0a71fcd6bc..6f32deeb2ed 100644 --- a/rust/qemu-api/src/prelude.rs +++ b/rust/qemu-api/src/prelude.rs @@ -12,6 +12,7 @@ pub use crate::qom::ObjectCast; pub use crate::qom::ObjectCastMut; pub use crate::qom::ObjectDeref; +pub use crate::qom::ObjectMethods; pub use crate::qom::ObjectType; pub use crate::qom_isa; diff --git a/rust/qemu-api/src/qom.rs b/rust/qemu-api/src/qom.rs index 74ea5721f77..7d5fbef1e17 100644 --- a/rust/qemu-api/src/qom.rs +++ b/rust/qemu-api/src/qom.rs @@ -5,8 +5,8 @@ //! Bindings to access QOM functionality from Rust. //! //! The QEMU Object Model (QOM) provides inheritance and dynamic typing for QEMU -//! devices. This module makes QOM's features available in Rust through two main -//! mechanisms: +//! devices. This module makes QOM's features available in Rust through three +//! main mechanisms: //! //! * Automatic creation and registration of `TypeInfo` for classes that are //! written in Rust, as well as mapping between Rust traits and QOM vtables. @@ -15,6 +15,11 @@ //! trait and methods such as [`upcast`](ObjectCast::upcast) and //! [`downcast`](ObjectCast::downcast). //! +//! * Automatic delegation of parent class methods to child classes. When a +//! trait uses [`IsA`] as a bound, its contents become available to all child +//! classes through blanket implementations. This works both for class methods +//! and for instance methods accessed through references or smart pointers. +//! //! # Structure of a class //! //! A leaf class only needs a struct holding instance state. The struct must @@ -37,6 +42,16 @@ //! `ClassInitImpl`. This fills the vtable in the class struct; //! the source for this is the `*Impl` trait; the associated consts and //! functions if needed are wrapped to map C types into Rust types. +//! +//! * a trait for instance methods, for example `DeviceMethods`. This trait is +//! automatically implemented for any reference or smart pointer to a device +//! instance. It calls into the vtable provides access across all subclasses +//! to methods defined for the class. +//! +//! * optionally, a trait for class methods, for example `DeviceClassMethods`. +//! This provides access to class-wide functionality that doesn't depend on +//! instance data. Like instance methods, these are automatically inherited by +//! child classes. use std::{ ffi::CStr, @@ -46,7 +61,7 @@ pub use bindings::{Object, ObjectClass}; -use crate::bindings::{self, object_dynamic_cast, TypeInfo}; +use crate::bindings::{self, object_dynamic_cast, object_get_class, object_get_typename, TypeInfo}; /// Marker trait: `Self` can be statically upcasted to `P` (i.e. `P` is a direct /// or indirect parent of `Self`). @@ -532,3 +547,38 @@ unsafe impl ObjectType for Object { const TYPE_NAME: &'static CStr = unsafe { CStr::from_bytes_with_nul_unchecked(bindings::TYPE_OBJECT) }; } + +/// Trait for methods exposed by the Object class. The methods can be +/// called on all objects that have the trait `IsA`. +/// +/// The trait should only be used through the blanket implementation, +/// which guarantees safety via `IsA` +pub trait ObjectMethods: ObjectDeref +where + Self::Target: IsA, +{ + /// Return the name of the type of `self` + fn typename(&self) -> std::borrow::Cow<'_, str> { + let obj = self.upcast::(); + // SAFETY: safety of this is the requirement for implementing IsA + // The result of the C API has static lifetime + unsafe { + let p = object_get_typename(obj.as_mut_ptr()); + CStr::from_ptr(p).to_string_lossy() + } + } + + fn get_class(&self) -> &'static ::Class { + let obj = self.upcast::(); + + // SAFETY: all objects can call object_get_class; the actual class + // type is guaranteed by the implementation of `ObjectType` and + // `ObjectImpl`. + let klass: &'static ::Class = + unsafe { &*object_get_class(obj.as_mut_ptr()).cast() }; + + klass + } +} + +impl ObjectMethods for R where R::Target: IsA {} diff --git a/rust/qemu-api/tests/tests.rs b/rust/qemu-api/tests/tests.rs index 5d9f13b15d4..41ea4026b83 100644 --- a/rust/qemu-api/tests/tests.rs +++ b/rust/qemu-api/tests/tests.rs @@ -94,6 +94,18 @@ fn test_object_new() { } } +#[test] +/// Try invoking a method on an object. +fn test_typename() { + init_qom(); + let p: *mut DummyState = unsafe { object_new(DummyState::TYPE_NAME.as_ptr()).cast() }; + let p_ref: &DummyState = unsafe { &*p }; + assert_eq!(p_ref.typename(), "dummy"); + unsafe { + object_unref(p_ref.as_object_mut_ptr().cast::()); + } +} + // a note on all "cast" tests: usually, especially for downcasts the desired // class would be placed on the right, for example: // From patchwork Thu Dec 19 08:32:19 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 13914824 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 99F2FE7718B for ; Thu, 19 Dec 2024 08:36:35 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tOByk-0006mj-TO; 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envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -31 X-Spam_score: -3.2 X-Spam_bar: --- X-Spam_report: (-3.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-1.116, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org One recurring issue when writing Rust bindings is how to convert a Rust function ("fn" or "impl Fn") to a C function, and how to pass around "self" to a C function that only takes a void*. An easy solution would be to store on the heap a pair consisting of a pointer to the Rust function and the pointer to "self", but it is possible to do better. If an "Fn" has zero size (that is, if it is a zero-capture closures or a function pointer---which in turn includes all methods), it is possible to build a generic Rust function that calls it even if you only have the type; you don't need either the pointer to the function itself (because the address of the code is part of the type) or any closure data (because it has size zero). Introduce a wrapper that provides the functionality of calling the function given only its type. Reviewed-by: Zhao Liu Signed-off-by: Paolo Bonzini --- rust/qemu-api/meson.build | 1 + rust/qemu-api/src/callbacks.rs | 144 +++++++++++++++++++++++++++++++++ rust/qemu-api/src/lib.rs | 1 + 3 files changed, 146 insertions(+) create mode 100644 rust/qemu-api/src/callbacks.rs diff --git a/rust/qemu-api/meson.build b/rust/qemu-api/meson.build index 7ff408ad68e..8c82c5e96c2 100644 --- a/rust/qemu-api/meson.build +++ b/rust/qemu-api/meson.build @@ -17,6 +17,7 @@ _qemu_api_rs = static_library( 'src/lib.rs', 'src/bindings.rs', 'src/bitops.rs', + 'src/callbacks.rs', 'src/cell.rs', 'src/c_str.rs', 'src/irq.rs', diff --git a/rust/qemu-api/src/callbacks.rs b/rust/qemu-api/src/callbacks.rs new file mode 100644 index 00000000000..314f9dce962 --- /dev/null +++ b/rust/qemu-api/src/callbacks.rs @@ -0,0 +1,144 @@ +// SPDX-License-Identifier: MIT + +//! Utility functions to deal with callbacks from C to Rust. + +use std::{mem, ptr::NonNull}; + +/// Trait for functions (types implementing [`Fn`]) that can be used as +/// callbacks. These include both zero-capture closures and function pointers. +/// +/// In Rust, calling a function through the `Fn` trait normally requires a +/// `self` parameter, even though for zero-sized functions (including function +/// pointers) the type itself contains all necessary information to call the +/// function. This trait provides a `call` function that doesn't require `self`, +/// allowing zero-sized functions to be called using only their type. +/// +/// This enables zero-sized functions to be passed entirely through generic +/// parameters and resolved at compile-time. A typical use is a function +/// receiving an unused parameter of generic type `F` and calling it via +/// `F::call` or passing it to another function via `func::`. +/// +/// QEMU uses this trick to create wrappers to C callbacks. The wrappers +/// are needed to convert an opaque `*mut c_void` into a Rust reference, +/// but they only have a single opaque that they can use. The `FnCall` +/// trait makes it possible to use that opaque for `self` or any other +/// reference: +/// +/// ```ignore +/// // The compiler creates a new `rust_bh_cb` wrapper for each function +/// // passed to `qemu_bh_schedule_oneshot` below. +/// unsafe extern "C" fn rust_bh_cb FnCall<(&'a T,)>>( +/// opaque: *mut c_void, +/// ) { +/// // SAFETY: the opaque was passed as a reference to `T`. +/// F::call((unsafe { &*(opaque.cast::()) }, )) +/// } +/// +/// // The `_f` parameter is unused but it helps the compiler build the appropriate `F`. +/// // Using a reference allows usage in const context. +/// fn qemu_bh_schedule_oneshot FnCall<(&'a T,)>>(_f: &F, opaque: &T) { +/// let cb: unsafe extern "C" fn(*mut c_void) = rust_bh_cb::; +/// unsafe { +/// bindings::qemu_bh_schedule_oneshot(cb, opaque as *const T as *const c_void as *mut c_void) +/// } +/// } +/// ``` +/// +/// Each wrapper is a separate instance of `rust_bh_cb` and is therefore +/// compiled to a separate function ("monomorphization"). If you wanted +/// to pass `self` as the opaque value, the generic parameters would be +/// `rust_bh_cb::`. +/// +/// `Args` is a tuple type whose types are the arguments of the function, +/// while `R` is the returned type. +/// +/// # Examples +/// +/// ``` +/// # use qemu_api::callbacks::FnCall; +/// fn call_it FnCall<(&'a str,), String>>(_f: &F, s: &str) -> String { +/// F::call((s,)) +/// } +/// +/// let s: String = call_it(&str::to_owned, "hello world"); +/// assert_eq!(s, "hello world"); +/// ``` +/// +/// Note that the compiler will produce a different version of `call_it` for +/// each function that is passed to it. Therefore the argument is not really +/// used, except to decide what is `F` and what `F::call` does. +/// +/// Attempting to pass a non-zero-sized closure causes a compile-time failure: +/// +/// ```compile_fail +/// # use qemu_api::callbacks::FnCall; +/// # fn call_it<'a, F: FnCall<(&'a str,), String>>(_f: &F, s: &'a str) -> String { +/// # F::call((s,)) +/// # } +/// let x: &'static str = "goodbye world"; +/// call_it(&move |_| String::from(x), "hello workd"); +/// ``` +/// +/// # Safety +/// +/// Because `Self` is a zero-sized type, all instances of the type are +/// equivalent. However, in addition to this, `Self` must have no invariants +/// that could be violated by creating a reference to it. +/// +/// This is always true for zero-capture closures and function pointers, as long +/// as the code is able to name the function in the first place. +pub unsafe trait FnCall: 'static + Sync + Sized { + /// Referring to this internal constant asserts that the `Self` type is + /// zero-sized. Can be replaced by an inline const expression in + /// Rust 1.79.0+. + const ASSERT_ZERO_SIZED: () = { assert!(mem::size_of::() == 0) }; + + /// Call the function with the arguments in args. + fn call(a: Args) -> R; +} + +macro_rules! impl_call { + ($($args:ident,)* ) => ( + // SAFETY: because each function is treated as a separate type, + // accessing `FnCall` is only possible in code that would be + // allowed to call the function. + unsafe impl FnCall<($($args,)*), R> for F + where + F: 'static + Sync + Sized + Fn($($args, )*) -> R, + { + #[inline(always)] + fn call(a: ($($args,)*)) -> R { + let _: () = Self::ASSERT_ZERO_SIZED; + + // SAFETY: the safety of this method is the condition for implementing + // `FnCall`. As to the `NonNull` idiom to create a zero-sized type, + // see https://github.com/rust-lang/libs-team/issues/292. + let f: &'static F = unsafe { &*NonNull::::dangling().as_ptr() }; + let ($($args,)*) = a; + f($($args,)*) + } + } + ) +} + +impl_call!(_1, _2, _3, _4, _5,); +impl_call!(_1, _2, _3, _4,); +impl_call!(_1, _2, _3,); +impl_call!(_1, _2,); +impl_call!(_1,); +impl_call!(); + +#[cfg(test)] +mod tests { + use super::*; + + // The `_f` parameter is unused but it helps the compiler infer `F`. + fn do_test_call<'a, F: FnCall<(&'a str,), String>>(_f: &F) -> String { + F::call(("hello world",)) + } + + #[test] + fn test_call() { + assert_eq!(do_test_call(&str::to_owned), "hello world") + } +} diff --git a/rust/qemu-api/src/lib.rs b/rust/qemu-api/src/lib.rs index 124bece0449..4b43e02c0f9 100644 --- a/rust/qemu-api/src/lib.rs +++ b/rust/qemu-api/src/lib.rs @@ -14,6 +14,7 @@ pub mod bitops; pub mod c_str; +pub mod callbacks; pub mod cell; pub mod irq; pub mod module; From patchwork Thu Dec 19 08:32:20 2024 Content-Type: text/plain; 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helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -31 X-Spam_score: -3.2 X-Spam_bar: --- X-Spam_report: (-3.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-1.116, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org In case of incorrect parameters, kvm_convert_memory() was returning -1 instead of -EINVAL. The guest won't notice because it will move anyway to RUN_STATE_INTERNAL_ERROR, but fix this for consistency and clarity. Signed-off-by: Paolo Bonzini --- accel/kvm/kvm-all.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c index 801cff16a5a..77d811ca70c 100644 --- a/accel/kvm/kvm-all.c +++ b/accel/kvm/kvm-all.c @@ -2999,17 +2999,17 @@ int kvm_convert_memory(hwaddr start, hwaddr size, bool to_private) MemoryRegion *mr; RAMBlock *rb; void *addr; - int ret = -1; + int ret = -EINVAL; trace_kvm_convert_memory(start, size, to_private ? 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Szmigiero" Subject: [PULL 34/41] target/i386: Reset TSCs of parked vCPUs too on VM reset Date: Thu, 19 Dec 2024 09:32:21 +0100 Message-ID: <20241219083228.363430-35-pbonzini@redhat.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241219083228.363430-1-pbonzini@redhat.com> References: <20241219083228.363430-1-pbonzini@redhat.com> MIME-Version: 1.0 Received-SPF: pass client-ip=170.10.133.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -31 X-Spam_score: -3.2 X-Spam_bar: --- X-Spam_report: (-3.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-1.116, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: "Maciej S. Szmigiero" Since commit 5286c3662294 ("target/i386: properly reset TSC on reset") QEMU writes the special value of "1" to each online vCPU TSC on VM reset to reset it. However parked vCPUs don't get that handling and due to that their TSCs get desynchronized when the VM gets reset. This in turn causes KVM to turn off PVCLOCK_TSC_STABLE_BIT in its exported PV clock. Note that KVM has no understanding of vCPU being currently parked. Without PVCLOCK_TSC_STABLE_BIT the sched clock is marked unstable in the guest's kvm_sched_clock_init(). This causes a performance regressions to show in some tests. Fix this issue by writing the special value of "1" also to TSCs of parked vCPUs on VM reset. Reproducing the issue: 1) Boot a VM with "-smp 2,maxcpus=3" or similar 2) device_add host-x86_64-cpu,id=vcpu,node-id=0,socket-id=0,core-id=2,thread-id=0 3) Wait a few seconds 4) device_del vcpu 5) Inside the VM run: # echo "t" >/proc/sysrq-trigger; dmesg | grep sched_clock_stable Observe the sched_clock_stable() value is 1. 6) Reboot the VM 7) Once the VM boots once again run inside it: # echo "t" >/proc/sysrq-trigger; dmesg | grep sched_clock_stable Observe the sched_clock_stable() value is now 0. Fixes: 5286c3662294 ("target/i386: properly reset TSC on reset") Signed-off-by: Maciej S. Szmigiero Link: https://lore.kernel.org/r/5a605a88e9a231386dc803c60f5fed9b48108139.1734014926.git.maciej.szmigiero@oracle.com Signed-off-by: Paolo Bonzini --- configs/targets/i386-softmmu.mak | 1 + configs/targets/x86_64-softmmu.mak | 1 + include/sysemu/kvm.h | 8 ++++++++ accel/kvm/kvm-all.c | 11 +++++++++++ target/i386/kvm/kvm.c | 15 +++++++++++++++ 5 files changed, 36 insertions(+) diff --git a/configs/targets/i386-softmmu.mak b/configs/targets/i386-softmmu.mak index 2ac69d5ba37..2eb0e862500 100644 --- a/configs/targets/i386-softmmu.mak +++ b/configs/targets/i386-softmmu.mak @@ -1,4 +1,5 @@ TARGET_ARCH=i386 TARGET_SUPPORTS_MTTCG=y TARGET_KVM_HAVE_GUEST_DEBUG=y +TARGET_KVM_HAVE_RESET_PARKED_VCPU=y TARGET_XML_FILES= gdb-xml/i386-32bit.xml diff --git a/configs/targets/x86_64-softmmu.mak b/configs/targets/x86_64-softmmu.mak index e12ac3dc59b..920e9a42006 100644 --- a/configs/targets/x86_64-softmmu.mak +++ b/configs/targets/x86_64-softmmu.mak @@ -2,4 +2,5 @@ TARGET_ARCH=x86_64 TARGET_BASE_ARCH=i386 TARGET_SUPPORTS_MTTCG=y TARGET_KVM_HAVE_GUEST_DEBUG=y +TARGET_KVM_HAVE_RESET_PARKED_VCPU=y TARGET_XML_FILES= gdb-xml/i386-64bit.xml diff --git a/include/sysemu/kvm.h b/include/sysemu/kvm.h index c3a60b28909..ab17c09a551 100644 --- a/include/sysemu/kvm.h +++ b/include/sysemu/kvm.h @@ -377,6 +377,14 @@ int kvm_arch_init(MachineState *ms, KVMState *s); int kvm_arch_init_vcpu(CPUState *cpu); int kvm_arch_destroy_vcpu(CPUState *cpu); +#ifdef TARGET_KVM_HAVE_RESET_PARKED_VCPU +void kvm_arch_reset_parked_vcpu(unsigned long vcpu_id, int kvm_fd); +#else +static inline void kvm_arch_reset_parked_vcpu(unsigned long vcpu_id, int kvm_fd) +{ +} +#endif + bool kvm_vcpu_id_is_valid(int vcpu_id); /* Returns VCPU ID to be used on KVM_CREATE_VCPU ioctl() */ diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c index 77d811ca70c..4ab277cc84a 100644 --- a/accel/kvm/kvm-all.c +++ b/accel/kvm/kvm-all.c @@ -437,6 +437,16 @@ int kvm_unpark_vcpu(KVMState *s, unsigned long vcpu_id) return kvm_fd; } +static void kvm_reset_parked_vcpus(void *param) +{ + KVMState *s = param; + struct KVMParkedVcpu *cpu; + + QLIST_FOREACH(cpu, &s->kvm_parked_vcpus, node) { + kvm_arch_reset_parked_vcpu(cpu->vcpu_id, cpu->kvm_fd); + } +} + int kvm_create_vcpu(CPUState *cpu) { unsigned long vcpu_id = kvm_arch_vcpu_id(cpu); @@ -2728,6 +2738,7 @@ static int kvm_init(MachineState *ms) } qemu_register_reset(kvm_unpoison_all, NULL); + qemu_register_reset(kvm_reset_parked_vcpus, s); if (s->kernel_irqchip_allowed) { kvm_irqchip_create(s); diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c index 8e17942c3ba..2ff618fbf13 100644 --- a/target/i386/kvm/kvm.c +++ b/target/i386/kvm/kvm.c @@ -2415,6 +2415,21 @@ void kvm_arch_after_reset_vcpu(X86CPU *cpu) } } +void kvm_arch_reset_parked_vcpu(unsigned long vcpu_id, int kvm_fd) +{ + g_autofree struct kvm_msrs *msrs = NULL; + + msrs = g_malloc0(sizeof(*msrs) + sizeof(msrs->entries[0])); + msrs->entries[0].index = MSR_IA32_TSC; + msrs->entries[0].data = 1; /* match the value in x86_cpu_reset() */ + msrs->nmsrs++; + + if (ioctl(kvm_fd, KVM_SET_MSRS, msrs) != 1) { + warn_report("parked vCPU %lu TSC reset failed: %d", + vcpu_id, errno); + } +} + void kvm_arch_do_init_vcpu(X86CPU *cpu) { CPUX86State *env = &cpu->env; From patchwork Thu Dec 19 08:32:22 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 13914832 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5E2BFE7718B for ; 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envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -31 X-Spam_score: -3.2 X-Spam_bar: --- X-Spam_report: (-3.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-1.116, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The bits in the LineControl struct were backwards. :( Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Zhao Liu Signed-off-by: Paolo Bonzini --- rust/hw/char/pl011/src/lib.rs | 82 +++++++++++++++++------------------ 1 file changed, 41 insertions(+), 41 deletions(-) diff --git a/rust/hw/char/pl011/src/lib.rs b/rust/hw/char/pl011/src/lib.rs index 4dc0e8f345f..d5089f78854 100644 --- a/rust/hw/char/pl011/src/lib.rs +++ b/rust/hw/char/pl011/src/lib.rs @@ -319,32 +319,21 @@ fn default() -> Self { /// Line Control Register, `UARTLCR_H` #[doc(alias = "UARTLCR_H")] pub struct LineControl { - /// 15:8 - Reserved, do not modify, read as zero. - _reserved_zero_no_modify: u8, - /// 7 SPS Stick parity select. - /// 0 = stick parity is disabled - /// 1 = either: - /// • if the EPS bit is 0 then the parity bit is transmitted and checked - /// as a 1 • if the EPS bit is 1 then the parity bit is - /// transmitted and checked as a 0. This bit has no effect when - /// the PEN bit disables parity checking and generation. See Table 3-11 - /// on page 3-14 for the parity truth table. - pub sticky_parity: bool, - /// WLEN Word length. These bits indicate the number of data bits - /// transmitted or received in a frame as follows: b11 = 8 bits - /// b10 = 7 bits - /// b01 = 6 bits - /// b00 = 5 bits. - pub word_length: WordLength, - /// FEN Enable FIFOs: - /// 0 = FIFOs are disabled (character mode) that is, the FIFOs become - /// 1-byte-deep holding registers 1 = transmit and receive FIFO - /// buffers are enabled (FIFO mode). - pub fifos_enabled: Mode, - /// 3 STP2 Two stop bits select. If this bit is set to 1, two stop bits - /// are transmitted at the end of the frame. The receive - /// logic does not check for two stop bits being received. - pub two_stops_bits: bool, + /// BRK Send break. + /// + /// If this bit is set to `1`, a low-level is continually output on the + /// `UARTTXD` output, after completing transmission of the + /// current character. For the proper execution of the break command, + /// the software must set this bit for at least two complete + /// frames. For normal use, this bit must be cleared to `0`. + pub send_break: bool, + /// 1 PEN Parity enable: + /// + /// - 0 = parity is disabled and no parity bit added to the data frame + /// - 1 = parity checking and generation is enabled. + /// + /// See Table 3-11 on page 3-14 for the parity truth table. + pub parity_enabled: bool, /// EPS Even parity select. Controls the type of parity the UART uses /// during transmission and reception: /// - 0 = odd parity. The UART generates or checks for an odd number of @@ -355,21 +344,32 @@ pub struct LineControl { /// and generation. See Table 3-11 on page 3-14 for the parity /// truth table. pub parity: Parity, - /// 1 PEN Parity enable: - /// - /// - 0 = parity is disabled and no parity bit added to the data frame - /// - 1 = parity checking and generation is enabled. - /// - /// See Table 3-11 on page 3-14 for the parity truth table. - pub parity_enabled: bool, - /// BRK Send break. - /// - /// If this bit is set to `1`, a low-level is continually output on the - /// `UARTTXD` output, after completing transmission of the - /// current character. For the proper execution of the break command, - /// the software must set this bit for at least two complete - /// frames. For normal use, this bit must be cleared to `0`. - pub send_break: bool, + /// 3 STP2 Two stop bits select. If this bit is set to 1, two stop bits + /// are transmitted at the end of the frame. The receive + /// logic does not check for two stop bits being received. + pub two_stops_bits: bool, + /// FEN Enable FIFOs: + /// 0 = FIFOs are disabled (character mode) that is, the FIFOs become + /// 1-byte-deep holding registers 1 = transmit and receive FIFO + /// buffers are enabled (FIFO mode). + pub fifos_enabled: Mode, + /// WLEN Word length. These bits indicate the number of data bits + /// transmitted or received in a frame as follows: b11 = 8 bits + /// b10 = 7 bits + /// b01 = 6 bits + /// b00 = 5 bits. + pub word_length: WordLength, + /// 7 SPS Stick parity select. + /// 0 = stick parity is disabled + /// 1 = either: + /// • if the EPS bit is 0 then the parity bit is transmitted and checked + /// as a 1 • if the EPS bit is 1 then the parity bit is + /// transmitted and checked as a 0. This bit has no effect when + /// the PEN bit disables parity checking and generation. See Table 3-11 + /// on page 3-14 for the parity truth table. + pub sticky_parity: bool, + /// 15:8 - Reserved, do not modify, read as zero. + _reserved_zero_no_modify: u8, } impl LineControl { From patchwork Thu Dec 19 08:32:23 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 13914836 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CEBCCE77184 for ; Thu, 19 Dec 2024 08:38:02 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tOByn-0006tW-Cy; Thu, 19 Dec 2024 03:33:57 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tOByk-0006iB-AD for qemu-devel@nongnu.org; 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envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -31 X-Spam_score: -3.2 X-Spam_bar: --- X-Spam_report: (-3.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-1.116, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Check loopback_enabled(), not fifo_enabled(), like the C code. Also, set_break_error() must not happen until the break is read from the FIFO. Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Zhao Liu Signed-off-by: Paolo Bonzini --- rust/hw/char/pl011/src/device.rs | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/rust/hw/char/pl011/src/device.rs b/rust/hw/char/pl011/src/device.rs index e85d13c5a2b..960ee38ed69 100644 --- a/rust/hw/char/pl011/src/device.rs +++ b/rust/hw/char/pl011/src/device.rs @@ -460,9 +460,8 @@ pub fn can_receive(&self) -> bool { } pub fn event(&mut self, event: QEMUChrEvent) { - if event == bindings::QEMUChrEvent::CHR_EVENT_BREAK && !self.fifo_enabled() { + if event == bindings::QEMUChrEvent::CHR_EVENT_BREAK && !self.loopback_enabled() { self.put_fifo(DATA_BREAK); - self.receive_status_error_clear.set_break_error(true); } } From patchwork Thu Dec 19 08:32:24 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 13914825 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 453C0E77184 for ; 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Thu, 19 Dec 2024 00:33:49 -0800 (PST) X-Google-Smtp-Source: AGHT+IHiEagldsvaItOrlaSC7E7lbqh9Up6o720Ukb43YCjE88wzTVoXQ+ZEPO35x7L8ncb62Tw51w== X-Received: by 2002:a05:6000:400f:b0:385:fa2e:a33e with SMTP id ffacd0b85a97d-388e4d8e54cmr6067027f8f.43.1734597229229; Thu, 19 Dec 2024 00:33:49 -0800 (PST) Received: from [192.168.10.47] ([151.81.118.45]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38a1c847263sm987383f8f.50.2024.12.19.00.33.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Dec 2024 00:33:46 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Zhao Liu Subject: [PULL 37/41] rust: pl011: always use reset() method on registers Date: Thu, 19 Dec 2024 09:32:24 +0100 Message-ID: <20241219083228.363430-38-pbonzini@redhat.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241219083228.363430-1-pbonzini@redhat.com> References: <20241219083228.363430-1-pbonzini@redhat.com> MIME-Version: 1.0 Received-SPF: pass client-ip=170.10.129.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -31 X-Spam_score: -3.2 X-Spam_bar: --- X-Spam_report: (-3.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-1.116, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org For CR, the ugly-ish "0.into()" idiom is already hidden within the reset method. Do not repeat it. For FR, standardize on reset() being equivalent to "*self = Self::default()" and let reset_fifo toggle only the bits that are related to FIFOs. This commit also reproduces C commit 02b1f7f6192 ("hw/char/pl011: Split RX/TX path of pl011_reset_fifo()", 2024-09-13). Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Zhao Liu Signed-off-by: Paolo Bonzini --- rust/hw/char/pl011/src/device.rs | 23 ++++++++++++++++------- rust/hw/char/pl011/src/lib.rs | 13 +++++-------- 2 files changed, 21 insertions(+), 15 deletions(-) diff --git a/rust/hw/char/pl011/src/device.rs b/rust/hw/char/pl011/src/device.rs index 960ee38ed69..f2ee8763d8f 100644 --- a/rust/hw/char/pl011/src/device.rs +++ b/rust/hw/char/pl011/src/device.rs @@ -262,7 +262,7 @@ pub fn write(&mut self, offset: hwaddr, value: u64) { self.update(); } Ok(RSR) => { - self.receive_status_error_clear = 0.into(); + self.receive_status_error_clear.reset(); } Ok(FR) => { // flag writes are ignored @@ -283,7 +283,8 @@ pub fn write(&mut self, offset: hwaddr, value: u64) { if bool::from(self.line_control.fifos_enabled()) ^ bool::from(new_val.fifos_enabled()) { - self.reset_fifo(); + self.reset_rx_fifo(); + self.reset_tx_fifo(); } if self.line_control.send_break() ^ new_val.send_break() { let mut break_enable: c_int = new_val.send_break().into(); @@ -442,16 +443,24 @@ pub fn reset(&mut self) { self.read_trigger = 1; self.ifl = 0x12; self.control.reset(); - self.flags = 0.into(); - self.reset_fifo(); + self.flags.reset(); + self.reset_rx_fifo(); + self.reset_tx_fifo(); } - pub fn reset_fifo(&mut self) { + pub fn reset_rx_fifo(&mut self) { self.read_count = 0; self.read_pos = 0; - /* Reset FIFO flags */ - self.flags.reset(); + // Reset FIFO flags + self.flags.set_receive_fifo_full(false); + self.flags.set_receive_fifo_empty(true); + } + + pub fn reset_tx_fifo(&mut self) { + // Reset FIFO flags + self.flags.set_transmit_fifo_full(false); + self.flags.set_transmit_fifo_empty(true); } pub fn can_receive(&self) -> bool { diff --git a/rust/hw/char/pl011/src/lib.rs b/rust/hw/char/pl011/src/lib.rs index d5089f78854..e3eacb0e6b9 100644 --- a/rust/hw/char/pl011/src/lib.rs +++ b/rust/hw/char/pl011/src/lib.rs @@ -230,7 +230,7 @@ pub struct ReceiveStatusErrorClear { impl ReceiveStatusErrorClear { pub fn reset(&mut self) { // All the bits are cleared to 0 on reset. - *self = 0.into(); + *self = Self::default(); } } @@ -297,19 +297,16 @@ pub struct Flags { impl Flags { pub fn reset(&mut self) { - // After reset TXFF, RXFF, and BUSY are 0, and TXFE and RXFE are 1 - self.set_receive_fifo_full(false); - self.set_transmit_fifo_full(false); - self.set_busy(false); - self.set_receive_fifo_empty(true); - self.set_transmit_fifo_empty(true); + *self = Self::default(); } } impl Default for Flags { fn default() -> Self { let mut ret: Self = 0.into(); - ret.reset(); + // After reset TXFF, RXFF, and BUSY are 0, and TXFE and RXFE are 1 + ret.set_receive_fifo_empty(true); + ret.set_transmit_fifo_empty(true); ret } } From patchwork Thu Dec 19 08:32:25 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 13914830 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E9905E77184 for ; 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Thu, 19 Dec 2024 00:33:52 -0800 (PST) X-Google-Smtp-Source: AGHT+IF0JY2FVrauI0OcLzl4tIBneuvgAEnUpMI12cxK4eQqLJNHwH9lDeBxhcXY9hLRYfFqiliSkQ== X-Received: by 2002:a05:6000:1f81:b0:385:e94d:b152 with SMTP id ffacd0b85a97d-388e4d9af78mr5009161f8f.54.1734597231687; Thu, 19 Dec 2024 00:33:51 -0800 (PST) Received: from [192.168.10.47] ([151.81.118.45]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38a1c89e150sm970982f8f.66.2024.12.19.00.33.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Dec 2024 00:33:49 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Zhao Liu Subject: [PULL 38/41] rust: pl011: fix break errors and definition of Data struct Date: Thu, 19 Dec 2024 09:32:25 +0100 Message-ID: <20241219083228.363430-39-pbonzini@redhat.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241219083228.363430-1-pbonzini@redhat.com> References: <20241219083228.363430-1-pbonzini@redhat.com> MIME-Version: 1.0 Received-SPF: pass client-ip=170.10.129.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -31 X-Spam_score: -3.2 X-Spam_bar: --- X-Spam_report: (-3.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-1.116, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The Data struct is wrong, and does not show how bits 8-15 of DR are the receive status. Fix it, and use it to fix break errors ("c >> 8" in the C code does not translate to "c.to_be_bytes()[3]"). Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Zhao Liu Signed-off-by: Paolo Bonzini --- rust/hw/char/pl011/src/device.rs | 15 ++++++------ rust/hw/char/pl011/src/lib.rs | 41 ++++++++++++++++++++++---------- 2 files changed, 36 insertions(+), 20 deletions(-) diff --git a/rust/hw/char/pl011/src/device.rs b/rust/hw/char/pl011/src/device.rs index f2ee8763d8f..5e3a9c6f581 100644 --- a/rust/hw/char/pl011/src/device.rs +++ b/rust/hw/char/pl011/src/device.rs @@ -30,8 +30,6 @@ /// Fractional Baud Rate Divider, `UARTFBRD` const FBRD_MASK: u32 = 0x3f; -const DATA_BREAK: u32 = 1 << 10; - /// QEMU sourced constant. pub const PL011_FIFO_DEPTH: usize = 16_usize; @@ -75,7 +73,7 @@ pub struct PL011State { pub dmacr: u32, pub int_enabled: u32, pub int_level: u32, - pub read_fifo: [u32; PL011_FIFO_DEPTH], + pub read_fifo: [registers::Data; PL011_FIFO_DEPTH], pub ilpr: u32, pub ibrd: u32, pub fbrd: u32, @@ -210,10 +208,11 @@ pub fn read(&mut self, offset: hwaddr, _size: c_uint) -> std::ops::ControlFlow u8::from(self.receive_status_error_clear).into(), Ok(FR) => u16::from(self.flags).into(), @@ -406,7 +405,7 @@ fn loopback_mdmctrl(&mut self) { fn loopback_break(&mut self, enable: bool) { if enable { - self.loopback_tx(DATA_BREAK); + self.loopback_tx(registers::Data::BREAK.into()); } } @@ -470,7 +469,7 @@ pub fn can_receive(&self) -> bool { pub fn event(&mut self, event: QEMUChrEvent) { if event == bindings::QEMUChrEvent::CHR_EVENT_BREAK && !self.loopback_enabled() { - self.put_fifo(DATA_BREAK); + self.put_fifo(registers::Data::BREAK.into()); } } @@ -497,7 +496,7 @@ pub fn put_fifo(&mut self, value: c_uint) { let depth = self.fifo_depth(); assert!(depth > 0); let slot = (self.read_pos + self.read_count) & (depth - 1); - self.read_fifo[slot] = value; + self.read_fifo[slot] = registers::Data::from(value); self.read_count += 1; self.flags.set_receive_fifo_empty(false); if self.read_count == depth { diff --git a/rust/hw/char/pl011/src/lib.rs b/rust/hw/char/pl011/src/lib.rs index e3eacb0e6b9..463ae60543b 100644 --- a/rust/hw/char/pl011/src/lib.rs +++ b/rust/hw/char/pl011/src/lib.rs @@ -139,6 +139,21 @@ pub mod registers { //! unused thus treated as zero when read or written. use bilge::prelude::*; + /// Receive Status Register / Data Register common error bits + /// + /// The `UARTRSR` register is updated only when a read occurs + /// from the `UARTDR` register with the same status information + /// that can also be obtained by reading the `UARTDR` register + #[bitsize(8)] + #[derive(Clone, Copy, Default, DebugBits, FromBits)] + pub struct Errors { + pub framing_error: bool, + pub parity_error: bool, + pub break_error: bool, + pub overrun_error: bool, + _reserved_unpredictable: u4, + } + // TODO: FIFO Mode has different semantics /// Data Register, `UARTDR` /// @@ -181,16 +196,18 @@ pub mod registers { /// /// # Source /// ARM DDI 0183G 3.3.1 Data Register, UARTDR - #[bitsize(16)] - #[derive(Clone, Copy, DebugBits, FromBits)] + #[bitsize(32)] + #[derive(Clone, Copy, Default, DebugBits, FromBits)] #[doc(alias = "UARTDR")] pub struct Data { - _reserved: u4, pub data: u8, - pub framing_error: bool, - pub parity_error: bool, - pub break_error: bool, - pub overrun_error: bool, + pub errors: Errors, + _reserved: u16, + } + + impl Data { + // bilge is not very const-friendly, unfortunately + pub const BREAK: Self = Self { value: 1 << 10 }; } // TODO: FIFO Mode has different semantics @@ -220,14 +237,14 @@ pub struct Data { #[bitsize(8)] #[derive(Clone, Copy, DebugBits, FromBits)] pub struct ReceiveStatusErrorClear { - pub framing_error: bool, - pub parity_error: bool, - pub break_error: bool, - pub overrun_error: bool, - _reserved_unpredictable: u4, + pub errors: Errors, } impl ReceiveStatusErrorClear { + pub fn set_from_data(&mut self, data: Data) { + self.set_errors(data.errors()); + } + pub fn reset(&mut self) { // All the bits are cleared to 0 on reset. *self = Self::default(); From patchwork Thu Dec 19 08:32:26 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 13914843 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9373EE7718B for ; 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Thu, 19 Dec 2024 00:33:55 -0800 (PST) X-Google-Smtp-Source: AGHT+IGH7Knlh0i/Tn3orSfT+92gKRmkMzrdmN+3cbZnV6bfuhrz37LsZXrx4DiOgTBM2zyruBOx1Q== X-Received: by 2002:a5d:584c:0:b0:385:ea11:dd92 with SMTP id ffacd0b85a97d-388e4d42bf8mr5551438f8f.15.1734597234665; Thu, 19 Dec 2024 00:33:54 -0800 (PST) Received: from [192.168.10.47] ([151.81.118.45]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38a1c8a6e19sm972226f8f.100.2024.12.19.00.33.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Dec 2024 00:33:52 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Zhao Liu Subject: [PULL 39/41] rust: pl011: extend registers to 32 bits Date: Thu, 19 Dec 2024 09:32:26 +0100 Message-ID: <20241219083228.363430-40-pbonzini@redhat.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241219083228.363430-1-pbonzini@redhat.com> References: <20241219083228.363430-1-pbonzini@redhat.com> MIME-Version: 1.0 Received-SPF: pass client-ip=170.10.129.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -31 X-Spam_score: -3.2 X-Spam_bar: --- X-Spam_report: (-3.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-1.116, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The PL011 Technical Reference Manual lists the "real" size of the registers in table 3-1, and only rounds up to the next byte when describing the registers; for example, UARTDR is listed as having width 12/8 (12 bits read, 8 written) and only bits 15:0 are listed in "Table 3-2 UARTDR Register". However, in practice these are 32-bit registers, accessible only through 32-bit MMIO accesses; preserving the fiction that they're smaller introduces multiple casts (to go from the bilge bitfield type to e.g u16 to u64) and more importantly it breaks the migration stream because the Rust vmstate macros are not yet type safe. So, just make everything 32-bits wide. Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Zhao Liu Signed-off-by: Paolo Bonzini --- rust/hw/char/pl011/src/device.rs | 36 ++++++++++++++------------------ rust/hw/char/pl011/src/lib.rs | 23 +++++++++----------- 2 files changed, 26 insertions(+), 33 deletions(-) diff --git a/rust/hw/char/pl011/src/device.rs b/rust/hw/char/pl011/src/device.rs index 5e3a9c6f581..090e5d64504 100644 --- a/rust/hw/char/pl011/src/device.rs +++ b/rust/hw/char/pl011/src/device.rs @@ -186,9 +186,9 @@ unsafe fn init(&mut self) { pub fn read(&mut self, offset: hwaddr, _size: c_uint) -> std::ops::ControlFlow { use RegisterOffset::*; - std::ops::ControlFlow::Break(match RegisterOffset::try_from(offset) { + let value = match RegisterOffset::try_from(offset) { Err(v) if (0x3f8..0x400).contains(&(v >> 2)) => { - u64::from(self.device_id[(offset - 0xfe0) >> 2]) + u32::from(self.device_id[(offset - 0xfe0) >> 2]) } Err(_) => { // qemu_log_mask(LOG_GUEST_ERROR, "pl011_read: Bad offset 0x%x\n", (int)offset); @@ -214,27 +214,25 @@ pub fn read(&mut self, offset: hwaddr, _size: c_uint) -> std::ops::ControlFlow u8::from(self.receive_status_error_clear).into(), - Ok(FR) => u16::from(self.flags).into(), - Ok(FBRD) => self.fbrd.into(), - Ok(ILPR) => self.ilpr.into(), - Ok(IBRD) => self.ibrd.into(), - Ok(LCR_H) => u16::from(self.line_control).into(), - Ok(CR) => { - // We exercise our self-control. - u16::from(self.control).into() - } - Ok(FLS) => self.ifl.into(), - Ok(IMSC) => self.int_enabled.into(), - Ok(RIS) => self.int_level.into(), - Ok(MIS) => u64::from(self.int_level & self.int_enabled), + Ok(RSR) => u32::from(self.receive_status_error_clear), + Ok(FR) => u32::from(self.flags), + Ok(FBRD) => self.fbrd, + Ok(ILPR) => self.ilpr, + Ok(IBRD) => self.ibrd, + Ok(LCR_H) => u32::from(self.line_control), + Ok(CR) => u32::from(self.control), + Ok(FLS) => self.ifl, + Ok(IMSC) => self.int_enabled, + Ok(RIS) => self.int_level, + Ok(MIS) => self.int_level & self.int_enabled, Ok(ICR) => { // "The UARTICR Register is the interrupt clear register and is write-only" // Source: ARM DDI 0183G 3.3.13 Interrupt Clear Register, UARTICR 0 } - Ok(DMACR) => self.dmacr.into(), - }) + Ok(DMACR) => self.dmacr, + }; + std::ops::ControlFlow::Break(value.into()) } pub fn write(&mut self, offset: hwaddr, value: u64) { @@ -276,7 +274,6 @@ pub fn write(&mut self, offset: hwaddr, value: u64) { self.fbrd = value; } Ok(LCR_H) => { - let value = value as u16; let new_val: registers::LineControl = value.into(); // Reset the FIFO state on FIFO enable or disable if bool::from(self.line_control.fifos_enabled()) @@ -303,7 +300,6 @@ pub fn write(&mut self, offset: hwaddr, value: u64) { } Ok(CR) => { // ??? Need to implement the enable bit. - let value = value as u16; self.control = value.into(); self.loopback_mdmctrl(); } diff --git a/rust/hw/char/pl011/src/lib.rs b/rust/hw/char/pl011/src/lib.rs index 463ae60543b..0747e130cae 100644 --- a/rust/hw/char/pl011/src/lib.rs +++ b/rust/hw/char/pl011/src/lib.rs @@ -131,12 +131,6 @@ const fn _assert_exhaustive(val: RegisterOffset) { pub mod registers { //! Device registers exposed as typed structs which are backed by arbitrary //! integer bitmaps. [`Data`], [`Control`], [`LineControl`], etc. - //! - //! All PL011 registers are essentially 32-bit wide, but are typed here as - //! bitmaps with only the necessary width. That is, if a struct bitmap - //! in this module is for example 16 bits long, it should be conceived - //! as a 32-bit register where the unmentioned higher bits are always - //! unused thus treated as zero when read or written. use bilge::prelude::*; /// Receive Status Register / Data Register common error bits @@ -234,10 +228,11 @@ impl Data { /// # Source /// ARM DDI 0183G 3.3.2 Receive Status Register/Error Clear Register, /// UARTRSR/UARTECR - #[bitsize(8)] + #[bitsize(32)] #[derive(Clone, Copy, DebugBits, FromBits)] pub struct ReceiveStatusErrorClear { pub errors: Errors, + _reserved_unpredictable: u24, } impl ReceiveStatusErrorClear { @@ -257,7 +252,7 @@ fn default() -> Self { } } - #[bitsize(16)] + #[bitsize(32)] #[derive(Clone, Copy, DebugBits, FromBits)] /// Flag Register, `UARTFR` #[doc(alias = "UARTFR")] @@ -309,7 +304,7 @@ pub struct Flags { pub transmit_fifo_empty: bool, /// `RI`, is `true` when `nUARTRI` is `LOW`. pub ring_indicator: bool, - _reserved_zero_no_modify: u7, + _reserved_zero_no_modify: u23, } impl Flags { @@ -328,7 +323,7 @@ fn default() -> Self { } } - #[bitsize(16)] + #[bitsize(32)] #[derive(Clone, Copy, DebugBits, FromBits)] /// Line Control Register, `UARTLCR_H` #[doc(alias = "UARTLCR_H")] @@ -382,8 +377,8 @@ pub struct LineControl { /// the PEN bit disables parity checking and generation. See Table 3-11 /// on page 3-14 for the parity truth table. pub sticky_parity: bool, - /// 15:8 - Reserved, do not modify, read as zero. - _reserved_zero_no_modify: u8, + /// 31:8 - Reserved, do not modify, read as zero. + _reserved_zero_no_modify: u24, } impl LineControl { @@ -454,7 +449,7 @@ pub enum WordLength { /// /// # Source /// ARM DDI 0183G, 3.3.8 Control Register, `UARTCR`, Table 3-12 - #[bitsize(16)] + #[bitsize(32)] #[doc(alias = "UARTCR")] #[derive(Clone, Copy, DebugBits, FromBits)] pub struct Control { @@ -532,6 +527,8 @@ pub struct Control { /// CTS hardware flow control is enabled. Data is only transmitted when /// the `nUARTCTS` signal is asserted. pub cts_hardware_flow_control_enable: bool, + /// 31:16 - Reserved, do not modify, read as zero. + _reserved_zero_no_modify2: u16, } impl Control { From patchwork Thu Dec 19 08:32:27 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 13914829 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 21404E77184 for ; Thu, 19 Dec 2024 08:37:13 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tOByu-0007Gx-6c; Thu, 19 Dec 2024 03:34:04 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tOByr-00070x-Vt for qemu-devel@nongnu.org; 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Thu, 19 Dec 2024 00:33:56 -0800 (PST) X-Google-Smtp-Source: AGHT+IFM1AtXbKz73wxXgesHASBpqMGQ97i3i/Tbv+mU2IvhyozYT/k0oF9ppraZFqb8AJLAu1v3/A== X-Received: by 2002:a5d:64ad:0:b0:386:4a0d:bb21 with SMTP id ffacd0b85a97d-388e4d65d0dmr4627746f8f.22.1734597235793; Thu, 19 Dec 2024 00:33:55 -0800 (PST) Received: from [192.168.10.47] ([151.81.118.45]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4366127c493sm10990055e9.28.2024.12.19.00.33.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Dec 2024 00:33:55 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: Zhao Liu Subject: [PULL 40/41] rust: pl011: fix migration stream Date: Thu, 19 Dec 2024 09:32:27 +0100 Message-ID: <20241219083228.363430-41-pbonzini@redhat.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241219083228.363430-1-pbonzini@redhat.com> References: <20241219083228.363430-1-pbonzini@redhat.com> MIME-Version: 1.0 Received-SPF: pass client-ip=170.10.133.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -31 X-Spam_score: -3.2 X-Spam_bar: --- X-Spam_report: (-3.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-1.116, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The Rust vmstate macros lack the type-safety of their C equivalents (so safe, much abstraction), and therefore they were predictably wrong. The registers have already been changed to 32-bits in the previous patch, but read_pos/read_count/read_trigger also have to be u32 instead of usize. The easiest way to do so is to let the FIFO use u32 indices instead of usize. My plan for making VMStateField typesafe is to have a trait to retrieve a basic VMStateField; for example something like vmstate_uint32 would become an implementation of the VMState trait on u32. Then you'd write something like "vmstate_of!(Type, field).with_version_id(2)". That is, vmstate_of retrieves the basic VMStateField and fills in the offset, and then more changes can be applied on top. Reviewed-by: Zhao Liu Signed-off-by: Paolo Bonzini --- rust/hw/char/pl011/src/device.rs | 38 ++++++++++++++++++++++---- rust/hw/char/pl011/src/device_class.rs | 10 +++---- rust/qemu-api/src/vmstate.rs | 22 --------------- 3 files changed, 37 insertions(+), 33 deletions(-) diff --git a/rust/hw/char/pl011/src/device.rs b/rust/hw/char/pl011/src/device.rs index 090e5d64504..4d620b442ed 100644 --- a/rust/hw/char/pl011/src/device.rs +++ b/rust/hw/char/pl011/src/device.rs @@ -31,7 +31,7 @@ const FBRD_MASK: u32 = 0x3f; /// QEMU sourced constant. -pub const PL011_FIFO_DEPTH: usize = 16_usize; +pub const PL011_FIFO_DEPTH: u32 = 16; #[derive(Clone, Copy, Debug)] enum DeviceId { @@ -56,6 +56,32 @@ impl DeviceId { const PL011_ID_LUMINARY: [c_uchar; 8] = [0x11, 0x00, 0x18, 0x01, 0x0d, 0xf0, 0x05, 0xb1]; } +// FIFOs use 32-bit indices instead of usize, for compatibility with +// the migration stream produced by the C version of this device. +#[repr(transparent)] +#[derive(Debug, Default)] +pub struct Fifo([registers::Data; PL011_FIFO_DEPTH as usize]); + +impl Fifo { + const fn len(&self) -> u32 { + self.0.len() as u32 + } +} + +impl std::ops::IndexMut for Fifo { + fn index_mut(&mut self, idx: u32) -> &mut Self::Output { + &mut self.0[idx as usize] + } +} + +impl std::ops::Index for Fifo { + type Output = registers::Data; + + fn index(&self, idx: u32) -> &Self::Output { + &self.0[idx as usize] + } +} + #[repr(C)] #[derive(Debug, qemu_api_macros::Object, qemu_api_macros::offsets)] /// PL011 Device Model in QEMU @@ -73,14 +99,14 @@ pub struct PL011State { pub dmacr: u32, pub int_enabled: u32, pub int_level: u32, - pub read_fifo: [registers::Data; PL011_FIFO_DEPTH], + pub read_fifo: Fifo, pub ilpr: u32, pub ibrd: u32, pub fbrd: u32, pub ifl: u32, - pub read_pos: usize, - pub read_count: usize, - pub read_trigger: usize, + pub read_pos: u32, + pub read_count: u32, + pub read_trigger: u32, #[doc(alias = "chr")] pub char_backend: CharBackend, /// QEMU interrupts @@ -480,7 +506,7 @@ pub fn loopback_enabled(&self) -> bool { } #[inline] - pub fn fifo_depth(&self) -> usize { + pub fn fifo_depth(&self) -> u32 { // Note: FIFO depth is expected to be power-of-2 if self.fifo_enabled() { return PL011_FIFO_DEPTH; diff --git a/rust/hw/char/pl011/src/device_class.rs b/rust/hw/char/pl011/src/device_class.rs index 975c3d42be7..7f3ca895071 100644 --- a/rust/hw/char/pl011/src/device_class.rs +++ b/rust/hw/char/pl011/src/device_class.rs @@ -6,8 +6,8 @@ use std::os::raw::{c_int, c_void}; use qemu_api::{ - bindings::*, c_str, vmstate_clock, vmstate_fields, vmstate_int32, vmstate_subsections, - vmstate_uint32, vmstate_uint32_array, vmstate_unused, zeroable::Zeroable, + bindings::*, c_str, vmstate_clock, vmstate_fields, vmstate_subsections, vmstate_uint32, + vmstate_uint32_array, vmstate_unused, zeroable::Zeroable, }; use crate::device::{PL011State, PL011_FIFO_DEPTH}; @@ -64,9 +64,9 @@ extern "C" fn pl011_post_load(opaque: *mut c_void, version_id: c_int) -> c_int { vmstate_uint32!(ibrd, PL011State), vmstate_uint32!(fbrd, PL011State), vmstate_uint32!(ifl, PL011State), - vmstate_int32!(read_pos, PL011State), - vmstate_int32!(read_count, PL011State), - vmstate_int32!(read_trigger, PL011State), + vmstate_uint32!(read_pos, PL011State), + vmstate_uint32!(read_count, PL011State), + vmstate_uint32!(read_trigger, PL011State), }, subsections: vmstate_subsections! { VMSTATE_PL011_CLOCK diff --git a/rust/qemu-api/src/vmstate.rs b/rust/qemu-api/src/vmstate.rs index 25c68b703ea..63c897abcdf 100644 --- a/rust/qemu-api/src/vmstate.rs +++ b/rust/qemu-api/src/vmstate.rs @@ -106,28 +106,6 @@ macro_rules! vmstate_uint32 { }}; } -#[doc(alias = "VMSTATE_INT32_V")] -#[macro_export] -macro_rules! vmstate_int32_v { - ($field_name:ident, $struct_name:ty, $version_id:expr) => {{ - $crate::vmstate_single!( - $field_name, - $struct_name, - $version_id, - ::core::ptr::addr_of!($crate::bindings::vmstate_info_int32), - ::core::mem::size_of::() - ) - }}; -} - -#[doc(alias = "VMSTATE_INT32")] -#[macro_export] -macro_rules! vmstate_int32 { - ($field_name:ident, $struct_name:ty) => {{ - $crate::vmstate_int32_v!($field_name, $struct_name, 0) - }}; -} - #[doc(alias = "VMSTATE_ARRAY")] #[macro_export] macro_rules! vmstate_array { From patchwork Thu Dec 19 08:32:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 13914831 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7616DE7718B for ; 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Thu, 19 Dec 2024 00:33:59 -0800 (PST) X-Google-Smtp-Source: AGHT+IF45Ik7RTEUR17b+ZfqI4y/Tc3WtLm5baMZZoY7kwAtEbBTIdaxeia4hBTRioVAThkNx5aaQw== X-Received: by 2002:a05:600c:46c9:b0:432:d735:cc71 with SMTP id 5b1f17b1804b1-4365c7c8eb7mr16230445e9.25.1734597238677; Thu, 19 Dec 2024 00:33:58 -0800 (PST) Received: from [192.168.10.47] ([151.81.118.45]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43656af6c4esm45213695e9.4.2024.12.19.00.33.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Dec 2024 00:33:56 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Zhao Liu Subject: [PULL 41/41] rust: pl011: simplify handling of the FIFO enabled bit in LCR Date: Thu, 19 Dec 2024 09:32:28 +0100 Message-ID: <20241219083228.363430-42-pbonzini@redhat.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241219083228.363430-1-pbonzini@redhat.com> References: <20241219083228.363430-1-pbonzini@redhat.com> MIME-Version: 1.0 Received-SPF: pass client-ip=170.10.133.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -31 X-Spam_score: -3.2 X-Spam_bar: --- X-Spam_report: (-3.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-1.116, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Use ==/!= instead of going through bool and xor. Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Zhao Liu Signed-off-by: Paolo Bonzini --- rust/hw/char/pl011/src/device.rs | 6 ++---- rust/hw/char/pl011/src/lib.rs | 6 ------ 2 files changed, 2 insertions(+), 10 deletions(-) diff --git a/rust/hw/char/pl011/src/device.rs b/rust/hw/char/pl011/src/device.rs index 4d620b442ed..18cc122951d 100644 --- a/rust/hw/char/pl011/src/device.rs +++ b/rust/hw/char/pl011/src/device.rs @@ -302,9 +302,7 @@ pub fn write(&mut self, offset: hwaddr, value: u64) { Ok(LCR_H) => { let new_val: registers::LineControl = value.into(); // Reset the FIFO state on FIFO enable or disable - if bool::from(self.line_control.fifos_enabled()) - ^ bool::from(new_val.fifos_enabled()) - { + if self.line_control.fifos_enabled() != new_val.fifos_enabled() { self.reset_rx_fifo(); self.reset_tx_fifo(); } @@ -497,7 +495,7 @@ pub fn event(&mut self, event: QEMUChrEvent) { #[inline] pub fn fifo_enabled(&self) -> bool { - matches!(self.line_control.fifos_enabled(), registers::Mode::FIFO) + self.line_control.fifos_enabled() == registers::Mode::FIFO } #[inline] diff --git a/rust/hw/char/pl011/src/lib.rs b/rust/hw/char/pl011/src/lib.rs index 0747e130cae..69064d6929b 100644 --- a/rust/hw/char/pl011/src/lib.rs +++ b/rust/hw/char/pl011/src/lib.rs @@ -419,12 +419,6 @@ pub enum Mode { FIFO = 1, } - impl From for bool { - fn from(val: Mode) -> Self { - matches!(val, Mode::FIFO) - } - } - #[bitsize(2)] #[derive(Clone, Copy, Debug, Eq, FromBits, PartialEq)] /// `WLEN` Word length, field of [Line Control register](LineControl).