From patchwork Thu Dec 19 23:55:38 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Xi Pardee X-Patchwork-Id: 13915940 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.14]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 903E11D433B; Thu, 19 Dec 2024 23:55:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.14 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734652549; cv=none; b=Pr3CX4Ns3cAmIWJjsC3jbdTt2drraAMSK6Jn533or5M+9vva54T2qXYagm+SbBlZ11iqb/SGi0HtTyPmX7SAek0NfAa4MNkXHh41WMdid6ELwhrQLy4byyLk5pNTTWlCOc/bQqiKNpuXPPOVl40/kFjyGMQyR/JNJvlvY57/qIQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734652549; c=relaxed/simple; bh=Qb8mX05iJ/CpIr04M1dcnLwoixs3E+DHs98OuuHeczM=; h=From:To:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=Vwktt2zHAHHwK8VdTlEkMixUFw94/1r7P/S3RaSEV7Wicy++xMbICgIYT4gLMjnD+ztnS3LZ5PESyj5YKj/7top8+4AdlKOsodw6oXPQJLzL9XLryFaFLF4uF/Qhhei0G9aCrDFN3NPW60hQC4wW3KY5fo5TZSBtSHwQaFPocnU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=X89wgdxR; arc=none smtp.client-ip=198.175.65.14 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="X89wgdxR" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1734652548; x=1766188548; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=Qb8mX05iJ/CpIr04M1dcnLwoixs3E+DHs98OuuHeczM=; b=X89wgdxRXtvOUd4KvTg9OzLhPl9yPCs7B+6GfSOHWNwmMHEbrj3jfGBd p1lHixgrUaXI7wGZAunQ5MBsTKwOPRAHdMPjPqpNa/JCslN5qJUCzNkkk 4vNB+8Bx10c585XE/eVyGAqJPSdiL4T0JjzuD/R9ogn/DcnwhXF0yE9hZ gWYWipKuIKY8YxXevgYSMtlL2rmaAtyC/wXImDPbiSwkOmgh7TEA7CYzb qJ0Gr9XFMt7lgNlWY6h7/He735gsw8yPPMx+6kCgVH8hl24JeW4yZHtGQ pHghE7kCS2ME7P3MVbJNHkCnF7WttlP55P80+H3K8rx/ATa8N0uDT3HcQ w==; X-CSE-ConnectionGUID: KhJ37VNASV+WLfYI+43+8A== X-CSE-MsgGUID: 1JOpRzHKTQuFi6Ak/DS5lw== X-IronPort-AV: E=McAfee;i="6700,10204,11291"; a="38975810" X-IronPort-AV: E=Sophos;i="6.12,249,1728975600"; d="scan'208";a="38975810" Received: from fmviesa010.fm.intel.com ([10.60.135.150]) by orvoesa106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Dec 2024 15:55:47 -0800 X-CSE-ConnectionGUID: MbGUImMwTzSouvohZbF5Sw== X-CSE-MsgGUID: b/NhaAsgRBS3kqwHgGjUaw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,249,1728975600"; d="scan'208";a="98745831" Received: from jairdeje-mobl1.amr.corp.intel.com (HELO xpardee-desk.lan) ([10.124.221.167]) by fmviesa010-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Dec 2024 15:55:46 -0800 From: Xi Pardee To: xi.pardee@linux.intel.com, rajvi0912@gmail.com, irenic.rajneesh@gmail.com, david.e.box@linux.intel.com, hdegoede@redhat.com, ilpo.jarvinen@linux.intel.com, platform-driver-x86@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org Subject: [PATCH v3 1/3] platform/x86:intel/pmc: Make tgl_core_generic_init() static Date: Thu, 19 Dec 2024 15:55:38 -0800 Message-ID: <20241219235543.236592-2-xi.pardee@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241219235543.236592-1-xi.pardee@linux.intel.com> References: <20241219235543.236592-1-xi.pardee@linux.intel.com> Precedence: bulk X-Mailing-List: platform-driver-x86@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Make tgl_core_generic_init() a static function as the function has no callers outside of tgl.c. Remove the prototype in core.h and reorder the code in tgl.c. Signed-off-by: Xi Pardee Reviewed-by: Ilpo Järvinen --- drivers/platform/x86/intel/pmc/core.h | 1 - drivers/platform/x86/intel/pmc/tgl.c | 22 +++++++++++----------- 2 files changed, 11 insertions(+), 12 deletions(-) diff --git a/drivers/platform/x86/intel/pmc/core.h b/drivers/platform/x86/intel/pmc/core.h index b9d3291d0bf2c..a1886d8e1ef3e 100644 --- a/drivers/platform/x86/intel/pmc/core.h +++ b/drivers/platform/x86/intel/pmc/core.h @@ -597,7 +597,6 @@ int cnp_core_init(struct pmc_dev *pmcdev); int icl_core_init(struct pmc_dev *pmcdev); int tgl_core_init(struct pmc_dev *pmcdev); int tgl_l_core_init(struct pmc_dev *pmcdev); -int tgl_core_generic_init(struct pmc_dev *pmcdev, int pch_tp); int adl_core_init(struct pmc_dev *pmcdev); int mtl_core_init(struct pmc_dev *pmcdev); int arl_core_init(struct pmc_dev *pmcdev); diff --git a/drivers/platform/x86/intel/pmc/tgl.c b/drivers/platform/x86/intel/pmc/tgl.c index e0580de180773..4fec43d212d01 100644 --- a/drivers/platform/x86/intel/pmc/tgl.c +++ b/drivers/platform/x86/intel/pmc/tgl.c @@ -285,17 +285,7 @@ void pmc_core_get_tgl_lpm_reqs(struct platform_device *pdev) ACPI_FREE(out_obj); } -int tgl_l_core_init(struct pmc_dev *pmcdev) -{ - return tgl_core_generic_init(pmcdev, PCH_LP); -} - -int tgl_core_init(struct pmc_dev *pmcdev) -{ - return tgl_core_generic_init(pmcdev, PCH_H); -} - -int tgl_core_generic_init(struct pmc_dev *pmcdev, int pch_tp) +static int tgl_core_generic_init(struct pmc_dev *pmcdev, int pch_tp) { struct pmc *pmc = pmcdev->pmcs[PMC_IDX_MAIN]; int ret; @@ -317,3 +307,13 @@ int tgl_core_generic_init(struct pmc_dev *pmcdev, int pch_tp) return 0; } + +int tgl_l_core_init(struct pmc_dev *pmcdev) +{ + return tgl_core_generic_init(pmcdev, PCH_LP); +} + +int tgl_core_init(struct pmc_dev *pmcdev) +{ + return tgl_core_generic_init(pmcdev, PCH_H); +} From patchwork Thu Dec 19 23:55:39 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xi Pardee X-Patchwork-Id: 13915941 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.14]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7F1A31EBFF8; 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a="38975817" X-IronPort-AV: E=Sophos;i="6.12,249,1728975600"; d="scan'208";a="38975817" Received: from fmviesa010.fm.intel.com ([10.60.135.150]) by orvoesa106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Dec 2024 15:55:47 -0800 X-CSE-ConnectionGUID: qxhTSraGQPOsYEwwKLnquw== X-CSE-MsgGUID: Ec0s4iHqRh2Y/ox9WUqeaQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,249,1728975600"; d="scan'208";a="98745832" Received: from jairdeje-mobl1.amr.corp.intel.com (HELO xpardee-desk.lan) ([10.124.221.167]) by fmviesa010-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Dec 2024 15:55:46 -0800 From: Xi Pardee To: xi.pardee@linux.intel.com, rajvi0912@gmail.com, irenic.rajneesh@gmail.com, david.e.box@linux.intel.com, hdegoede@redhat.com, ilpo.jarvinen@linux.intel.com, platform-driver-x86@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org Subject: [PATCH v3 2/3] platform/x86:intel/pmc: Create generic_core_init() for all platforms Date: Thu, 19 Dec 2024 15:55:39 -0800 Message-ID: <20241219235543.236592-3-xi.pardee@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241219235543.236592-1-xi.pardee@linux.intel.com> References: <20241219235543.236592-1-xi.pardee@linux.intel.com> Precedence: bulk X-Mailing-List: platform-driver-x86@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Create a generic_core_init() function for all architecture to reduce duplicate code in each architecture file. Create an info structure to catch the variations between each architecture and pass it to the generic init function. Convert all architectures to call the generic core init function. Signed-off-by: Xi Pardee --- drivers/platform/x86/intel/pmc/adl.c | 21 ++++-------- drivers/platform/x86/intel/pmc/arl.c | 47 ++++++++------------------- drivers/platform/x86/intel/pmc/cnp.c | 21 ++++-------- drivers/platform/x86/intel/pmc/core.c | 45 +++++++++++++++++++++++++ drivers/platform/x86/intel/pmc/core.h | 25 ++++++++++++++ drivers/platform/x86/intel/pmc/icl.c | 18 ++++------ drivers/platform/x86/intel/pmc/lnl.c | 24 +++++--------- drivers/platform/x86/intel/pmc/mtl.c | 45 +++++++------------------ drivers/platform/x86/intel/pmc/spt.c | 18 ++++------ drivers/platform/x86/intel/pmc/tgl.c | 31 +++++++++--------- 10 files changed, 145 insertions(+), 150 deletions(-) diff --git a/drivers/platform/x86/intel/pmc/adl.c b/drivers/platform/x86/intel/pmc/adl.c index e7878558fd909..ac37f4ece9c70 100644 --- a/drivers/platform/x86/intel/pmc/adl.c +++ b/drivers/platform/x86/intel/pmc/adl.c @@ -311,20 +311,13 @@ const struct pmc_reg_map adl_reg_map = { .pson_residency_counter_step = TGL_PSON_RES_COUNTER_STEP, }; +static struct pmc_dev_info adl_pmc_dev = { + .map = &adl_reg_map, + .suspend = cnl_suspend, + .resume = cnl_resume, +}; + int adl_core_init(struct pmc_dev *pmcdev) { - struct pmc *pmc = pmcdev->pmcs[PMC_IDX_MAIN]; - int ret; - - pmcdev->suspend = cnl_suspend; - pmcdev->resume = cnl_resume; - - pmc->map = &adl_reg_map; - ret = get_primary_reg_base(pmc); - if (ret) - return ret; - - pmc_core_get_low_power_modes(pmcdev); - - return 0; + return generic_core_init(pmcdev, &adl_pmc_dev); } diff --git a/drivers/platform/x86/intel/pmc/arl.c b/drivers/platform/x86/intel/pmc/arl.c index 05dec4f5019f3..137a1fdfee715 100644 --- a/drivers/platform/x86/intel/pmc/arl.c +++ b/drivers/platform/x86/intel/pmc/arl.c @@ -691,40 +691,19 @@ static int arl_resume(struct pmc_dev *pmcdev) return cnl_resume(pmcdev); } +static struct pmc_dev_info arl_pmc_dev = { + .func = 0, + .ssram = true, + .dmu_guid = ARL_PMT_DMU_GUID, + .regmap_list = arl_pmc_info_list, + .map = &arl_socs_reg_map, + .fixup = arl_d3_fixup, + .suspend = cnl_suspend, + .resume = arl_resume, +}; + int arl_core_init(struct pmc_dev *pmcdev) { - struct pmc *pmc = pmcdev->pmcs[PMC_IDX_SOC]; - int ret; - int func = 0; - bool ssram_init = true; - - arl_d3_fixup(); - pmcdev->suspend = cnl_suspend; - pmcdev->resume = arl_resume; - pmcdev->regmap_list = arl_pmc_info_list; - - /* - * If ssram init fails use legacy method to at least get the - * primary PMC - */ - ret = pmc_core_ssram_init(pmcdev, func); - if (ret) { - ssram_init = false; - pmc->map = &arl_socs_reg_map; - - ret = get_primary_reg_base(pmc); - if (ret) - return ret; - } - - pmc_core_get_low_power_modes(pmcdev); - pmc_core_punit_pmt_init(pmcdev, ARL_PMT_DMU_GUID); - - if (ssram_init) { - ret = pmc_core_ssram_get_lpm_reqs(pmcdev); - if (ret) - return ret; - } - - return 0; + return generic_core_init(pmcdev, &arl_pmc_dev); } + diff --git a/drivers/platform/x86/intel/pmc/cnp.c b/drivers/platform/x86/intel/pmc/cnp.c index fc5193fdf8a88..6d268058e40b9 100644 --- a/drivers/platform/x86/intel/pmc/cnp.c +++ b/drivers/platform/x86/intel/pmc/cnp.c @@ -274,20 +274,13 @@ int cnl_resume(struct pmc_dev *pmcdev) return pmc_core_resume_common(pmcdev); } +static struct pmc_dev_info cnp_pmc_dev = { + .map = &cnp_reg_map, + .suspend = cnl_suspend, + .resume = cnl_resume, +}; + int cnp_core_init(struct pmc_dev *pmcdev) { - struct pmc *pmc = pmcdev->pmcs[PMC_IDX_MAIN]; - int ret; - - pmcdev->suspend = cnl_suspend; - pmcdev->resume = cnl_resume; - - pmc->map = &cnp_reg_map; - ret = get_primary_reg_base(pmc); - if (ret) - return ret; - - pmc_core_get_low_power_modes(pmcdev); - - return 0; + return generic_core_init(pmcdev, &cnp_pmc_dev); } diff --git a/drivers/platform/x86/intel/pmc/core.c b/drivers/platform/x86/intel/pmc/core.c index 3e7f99ac8c941..8b73101dcfe95 100644 --- a/drivers/platform/x86/intel/pmc/core.c +++ b/drivers/platform/x86/intel/pmc/core.c @@ -1344,6 +1344,51 @@ static void pmc_core_dbgfs_register(struct pmc_dev *pmcdev) } } +int generic_core_init(struct pmc_dev *pmcdev, struct pmc_dev_info *pmc_dev_info) +{ + struct pmc *pmc = pmcdev->pmcs[PMC_IDX_MAIN]; + void (*fixup)(void) = pmc_dev_info->fixup; + bool ssram; + int ret; + + if (fixup) + fixup(); + + pmcdev->suspend = pmc_dev_info->suspend; + pmcdev->resume = pmc_dev_info->resume; + + /* + * If ssram init fails use legacy method to at least get the + * primary PMC + */ + ssram = pmc_dev_info->ssram; + if (ssram) { + pmcdev->regmap_list = pmc_dev_info->regmap_list; + ret = pmc_core_ssram_init(pmcdev, pmc_dev_info->func); + if (ret) { + dev_warn(&pmcdev->pdev->dev, + "ssram init failed, %d, using legacy init\n", ret); + ssram = false; + } + } + + if (!ssram) { + pmc->map = pmc_dev_info->map; + ret = get_primary_reg_base(pmc); + if (ret) + return ret; + } + + pmc_core_get_low_power_modes(pmcdev); + if (pmc_dev_info->dmu_guid) + pmc_core_punit_pmt_init(pmcdev, pmc_dev_info->dmu_guid); + + if (ssram) + return pmc_core_ssram_get_lpm_reqs(pmcdev); + + return 0; +} + static const struct x86_cpu_id intel_pmc_core_ids[] = { X86_MATCH_VFM(INTEL_SKYLAKE_L, spt_core_init), X86_MATCH_VFM(INTEL_SKYLAKE, spt_core_init), diff --git a/drivers/platform/x86/intel/pmc/core.h b/drivers/platform/x86/intel/pmc/core.h index a1886d8e1ef3e..82be953db9463 100644 --- a/drivers/platform/x86/intel/pmc/core.h +++ b/drivers/platform/x86/intel/pmc/core.h @@ -436,6 +436,30 @@ enum pmc_index { PMC_IDX_MAX }; +/** + * struct pmc_dev_info - Structure to keep pmc device info + * @func: Function number of the primary pmc + * @ssram: Bool shows if platform has ssram support + * @dmu_guid: DMU GUID + * @regmap_list: Pointer to a list of pmc_info structure that could be + * available for the platform + * @map: Pointer to a pmc_reg_map struct that contains platform + * specific attributes of the primary pmc + * @fixup: Function to perform platform specific fixup + * @suspend: Function to perform platform specific suspend + * @resume: Function to perform platform specific resume + */ +struct pmc_dev_info { + u8 func; + bool ssram; + u32 dmu_guid; + struct pmc_info *regmap_list; + const struct pmc_reg_map *map; + void (*fixup)(void); + void (*suspend)(struct pmc_dev *pmcdev); + int (*resume)(struct pmc_dev *pmcdev); +}; + extern const struct pmc_bit_map msr_map[]; extern const struct pmc_bit_map spt_pll_map[]; extern const struct pmc_bit_map spt_mphy_map[]; @@ -592,6 +616,7 @@ extern void pmc_core_set_device_d3(unsigned int device); extern int pmc_core_ssram_init(struct pmc_dev *pmcdev, int func); +int generic_core_init(struct pmc_dev *pmcdev, struct pmc_dev_info *pmc_dev_info); int spt_core_init(struct pmc_dev *pmcdev); int cnp_core_init(struct pmc_dev *pmcdev); int icl_core_init(struct pmc_dev *pmcdev); diff --git a/drivers/platform/x86/intel/pmc/icl.c b/drivers/platform/x86/intel/pmc/icl.c index 71b0fd6cb7d84..f044546e1aa5e 100644 --- a/drivers/platform/x86/intel/pmc/icl.c +++ b/drivers/platform/x86/intel/pmc/icl.c @@ -50,18 +50,12 @@ const struct pmc_reg_map icl_reg_map = { .etr3_offset = ETR3_OFFSET, }; +static struct pmc_dev_info icl_pmc_dev = { + .map = &icl_reg_map, +}; + int icl_core_init(struct pmc_dev *pmcdev) { - struct pmc *pmc = pmcdev->pmcs[PMC_IDX_MAIN]; - int ret; - - pmc->map = &icl_reg_map; - - ret = get_primary_reg_base(pmc); - if (ret) - return ret; - - pmc_core_get_low_power_modes(pmcdev); - - return ret; + return generic_core_init(pmcdev, &icl_pmc_dev); } + diff --git a/drivers/platform/x86/intel/pmc/lnl.c b/drivers/platform/x86/intel/pmc/lnl.c index be029f12cdf40..8f6b2a8d30438 100644 --- a/drivers/platform/x86/intel/pmc/lnl.c +++ b/drivers/platform/x86/intel/pmc/lnl.c @@ -550,22 +550,14 @@ static int lnl_resume(struct pmc_dev *pmcdev) return cnl_resume(pmcdev); } +static struct pmc_dev_info lnl_pmc_dev = { + .map = &lnl_socm_reg_map, + .fixup = lnl_d3_fixup, + .suspend = cnl_suspend, + .resume = lnl_resume, +}; + int lnl_core_init(struct pmc_dev *pmcdev) { - int ret; - struct pmc *pmc = pmcdev->pmcs[PMC_IDX_SOC]; - - lnl_d3_fixup(); - - pmcdev->suspend = cnl_suspend; - pmcdev->resume = lnl_resume; - - pmc->map = &lnl_socm_reg_map; - ret = get_primary_reg_base(pmc); - if (ret) - return ret; - - pmc_core_get_low_power_modes(pmcdev); - - return 0; + return generic_core_init(pmcdev, &lnl_pmc_dev); } diff --git a/drivers/platform/x86/intel/pmc/mtl.c b/drivers/platform/x86/intel/pmc/mtl.c index 02949fed76e91..b7a752e8adbc6 100644 --- a/drivers/platform/x86/intel/pmc/mtl.c +++ b/drivers/platform/x86/intel/pmc/mtl.c @@ -990,39 +990,18 @@ static int mtl_resume(struct pmc_dev *pmcdev) return cnl_resume(pmcdev); } +static struct pmc_dev_info mtl_pmc_dev = { + .func = 2, + .ssram = true, + .dmu_guid = MTL_PMT_DMU_GUID, + .regmap_list = mtl_pmc_info_list, + .map = &mtl_socm_reg_map, + .fixup = mtl_d3_fixup, + .suspend = cnl_suspend, + .resume = mtl_resume, +}; + int mtl_core_init(struct pmc_dev *pmcdev) { - struct pmc *pmc = pmcdev->pmcs[PMC_IDX_SOC]; - int ret; - int func = 2; - bool ssram_init = true; - - mtl_d3_fixup(); - - pmcdev->suspend = cnl_suspend; - pmcdev->resume = mtl_resume; - pmcdev->regmap_list = mtl_pmc_info_list; - - /* - * If ssram init fails use legacy method to at least get the - * primary PMC - */ - ret = pmc_core_ssram_init(pmcdev, func); - if (ret) { - ssram_init = false; - dev_warn(&pmcdev->pdev->dev, - "ssram init failed, %d, using legacy init\n", ret); - pmc->map = &mtl_socm_reg_map; - ret = get_primary_reg_base(pmc); - if (ret) - return ret; - } - - pmc_core_get_low_power_modes(pmcdev); - pmc_core_punit_pmt_init(pmcdev, MTL_PMT_DMU_GUID); - - if (ssram_init) - return pmc_core_ssram_get_lpm_reqs(pmcdev); - - return 0; + return generic_core_init(pmcdev, &mtl_pmc_dev); } diff --git a/drivers/platform/x86/intel/pmc/spt.c b/drivers/platform/x86/intel/pmc/spt.c index ab993a69e33ee..09d3ce09af736 100644 --- a/drivers/platform/x86/intel/pmc/spt.c +++ b/drivers/platform/x86/intel/pmc/spt.c @@ -134,18 +134,12 @@ const struct pmc_reg_map spt_reg_map = { .pm_vric1_offset = SPT_PMC_VRIC1_OFFSET, }; +static struct pmc_dev_info spt_pmc_dev = { + .map = &spt_reg_map, +}; + int spt_core_init(struct pmc_dev *pmcdev) { - struct pmc *pmc = pmcdev->pmcs[PMC_IDX_MAIN]; - int ret; - - pmc->map = &spt_reg_map; - - ret = get_primary_reg_base(pmc); - if (ret) - return ret; - - pmc_core_get_low_power_modes(pmcdev); - - return ret; + return generic_core_init(pmcdev, &spt_pmc_dev); } + diff --git a/drivers/platform/x86/intel/pmc/tgl.c b/drivers/platform/x86/intel/pmc/tgl.c index 4fec43d212d01..43a2aec4a5673 100644 --- a/drivers/platform/x86/intel/pmc/tgl.c +++ b/drivers/platform/x86/intel/pmc/tgl.c @@ -285,35 +285,36 @@ void pmc_core_get_tgl_lpm_reqs(struct platform_device *pdev) ACPI_FREE(out_obj); } -static int tgl_core_generic_init(struct pmc_dev *pmcdev, int pch_tp) -{ - struct pmc *pmc = pmcdev->pmcs[PMC_IDX_MAIN]; - int ret; +static struct pmc_dev_info tgl_l_pmc_dev = { + .map = &tgl_reg_map, + .suspend = cnl_suspend, + .resume = cnl_resume, +}; - if (pch_tp == PCH_H) - pmc->map = &tgl_h_reg_map; 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a="38975822" X-IronPort-AV: E=Sophos;i="6.12,249,1728975600"; d="scan'208";a="38975822" Received: from fmviesa010.fm.intel.com ([10.60.135.150]) by orvoesa106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Dec 2024 15:55:48 -0800 X-CSE-ConnectionGUID: wEpQQx7eQIqIk60sVuaJUg== X-CSE-MsgGUID: xp/n6BBvS+iu34CBUx6OiQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,249,1728975600"; d="scan'208";a="98745834" Received: from jairdeje-mobl1.amr.corp.intel.com (HELO xpardee-desk.lan) ([10.124.221.167]) by fmviesa010-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Dec 2024 15:55:47 -0800 From: Xi Pardee To: xi.pardee@linux.intel.com, rajvi0912@gmail.com, irenic.rajneesh@gmail.com, david.e.box@linux.intel.com, hdegoede@redhat.com, ilpo.jarvinen@linux.intel.com, platform-driver-x86@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org Subject: [PATCH v3 3/3] platform/x86/intel/pmc: Add Arrow Lake U/H support to intel_pmc_core driver Date: Thu, 19 Dec 2024 15:55:40 -0800 Message-ID: <20241219235543.236592-4-xi.pardee@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241219235543.236592-1-xi.pardee@linux.intel.com> References: <20241219235543.236592-1-xi.pardee@linux.intel.com> Precedence: bulk X-Mailing-List: platform-driver-x86@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add Arrow Lake U and Arrow Lake H support in intel_pmc_core driver. Signed-off-by: Rajvi Jingar Signed-off-by: Xi Pardee --- drivers/platform/x86/intel/pmc/arl.c | 36 +++++++++++++++++++++++++++ drivers/platform/x86/intel/pmc/core.c | 2 ++ drivers/platform/x86/intel/pmc/core.h | 1 + 3 files changed, 39 insertions(+) diff --git a/drivers/platform/x86/intel/pmc/arl.c b/drivers/platform/x86/intel/pmc/arl.c index 137a1fdfee715..05c45e37f2449 100644 --- a/drivers/platform/x86/intel/pmc/arl.c +++ b/drivers/platform/x86/intel/pmc/arl.c @@ -16,6 +16,7 @@ #define IOEP_LPM_REQ_GUID 0x5077612 #define SOCS_LPM_REQ_GUID 0x8478657 #define PCHS_LPM_REQ_GUID 0x9684572 +#define SOCM_LPM_REQ_GUID 0x2625030 static const u8 ARL_LPM_REG_INDEX[] = {0, 4, 5, 6, 8, 9, 10, 11, 12, 13, 14, 15, 16, 20}; @@ -650,6 +651,7 @@ const struct pmc_reg_map arl_pchs_reg_map = { .etr3_offset = ETR3_OFFSET, }; +#define PMC_DEVID_SOCM 0x777f #define PMC_DEVID_SOCS 0xae7f #define PMC_DEVID_IOEP 0x7ecf #define PMC_DEVID_PCHS 0x7f27 @@ -669,11 +671,17 @@ static struct pmc_info arl_pmc_info_list[] = { .devid = PMC_DEVID_PCHS, .map = &arl_pchs_reg_map, }, + { + .guid = SOCM_LPM_REQ_GUID, + .devid = PMC_DEVID_SOCM, + .map = &mtl_socm_reg_map, + }, {} }; #define ARL_NPU_PCI_DEV 0xad1d #define ARL_GNA_PCI_DEV 0xae4c +#define ARL_H_GNA_PCI_DEV 0x774c /* * Set power state of select devices that do not have drivers to D3 * so that they do not block Package C entry. @@ -684,6 +692,12 @@ static void arl_d3_fixup(void) pmc_core_set_device_d3(ARL_GNA_PCI_DEV); } +static void arl_h_d3_fixup(void) +{ + pmc_core_set_device_d3(ARL_NPU_PCI_DEV); + pmc_core_set_device_d3(ARL_H_GNA_PCI_DEV); +} + static int arl_resume(struct pmc_dev *pmcdev) { arl_d3_fixup(); @@ -691,6 +705,13 @@ static int arl_resume(struct pmc_dev *pmcdev) return cnl_resume(pmcdev); } +static int arl_h_resume(struct pmc_dev *pmcdev) +{ + arl_h_d3_fixup(); + + return cnl_resume(pmcdev); +} + static struct pmc_dev_info arl_pmc_dev = { .func = 0, .ssram = true, @@ -702,8 +723,23 @@ static struct pmc_dev_info arl_pmc_dev = { .resume = arl_resume, }; +static struct pmc_dev_info arl_h_pmc_dev = { + .func = 2, + .ssram = true, + .dmu_guid = ARL_PMT_DMU_GUID, + .regmap_list = arl_pmc_info_list, + .map = &mtl_socm_reg_map, + .fixup = arl_h_d3_fixup, + .suspend = cnl_suspend, + .resume = arl_h_resume, +}; + int arl_core_init(struct pmc_dev *pmcdev) { return generic_core_init(pmcdev, &arl_pmc_dev); } +int arl_h_core_init(struct pmc_dev *pmcdev) +{ + return generic_core_init(pmcdev, &arl_h_pmc_dev); +} diff --git a/drivers/platform/x86/intel/pmc/core.c b/drivers/platform/x86/intel/pmc/core.c index 8b73101dcfe95..8890dda174b6e 100644 --- a/drivers/platform/x86/intel/pmc/core.c +++ b/drivers/platform/x86/intel/pmc/core.c @@ -1412,6 +1412,8 @@ static const struct x86_cpu_id intel_pmc_core_ids[] = { X86_MATCH_VFM(INTEL_RAPTORLAKE_S, adl_core_init), X86_MATCH_VFM(INTEL_METEORLAKE_L, mtl_core_init), X86_MATCH_VFM(INTEL_ARROWLAKE, arl_core_init), + X86_MATCH_VFM(INTEL_ARROWLAKE_H, arl_h_core_init), + X86_MATCH_VFM(INTEL_ARROWLAKE_U, arl_h_core_init), X86_MATCH_VFM(INTEL_LUNARLAKE_M, lnl_core_init), {} }; diff --git a/drivers/platform/x86/intel/pmc/core.h b/drivers/platform/x86/intel/pmc/core.h index 82be953db9463..e4c0b9477262f 100644 --- a/drivers/platform/x86/intel/pmc/core.h +++ b/drivers/platform/x86/intel/pmc/core.h @@ -625,6 +625,7 @@ int tgl_l_core_init(struct pmc_dev *pmcdev); int adl_core_init(struct pmc_dev *pmcdev); int mtl_core_init(struct pmc_dev *pmcdev); int arl_core_init(struct pmc_dev *pmcdev); +int arl_h_core_init(struct pmc_dev *pmcdev); int lnl_core_init(struct pmc_dev *pmcdev); void cnl_suspend(struct pmc_dev *pmcdev);