From patchwork Tue Dec 24 09:41:22 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kever Yang X-Patchwork-Id: 13919791 X-Patchwork-Delegate: kuba@kernel.org Received: from mail-m49247.qiye.163.com (mail-m49247.qiye.163.com [45.254.49.247]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D18221917F0; Tue, 24 Dec 2024 09:41:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=45.254.49.247 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1735033299; cv=none; b=WJ8IjXUN5st/Fo3B+XaLXzYz67AGMb/JidEmFNDmPHC2ynkiHl7t8o9/L6FTCL+Z5y/ctuUQwvJD9QdScaRP0RwyySG4/nbZ0xrNudbx4nkew88XzOdiAreoZP6pPAYOFSf49AfXudvxAnhSepDqBb6dSH/AXWvWz+FjKkMyJWU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1735033299; c=relaxed/simple; bh=+Yq5IWFfcXYSmZOel3A4sTWDzb6poyihGZ2Ua4UH/ZU=; h=From:To:Cc:Subject:Date:Message-Id:MIME-Version; b=I6XasbJMz0uaiZ7xE1uSbluytkKhdyDQqkR8+0m0rOzTKFxEsHyKxf2jS9be23c2SgM2UaxwBy1J6/AGbj49ujGmCjjUYVvz4VLQWaqScKJ9KP6DWeNKQtOPLlT6cHF7/ifoKo87YRW0hPIFEmqZikaJKsiD8o30tAY61NOFGp4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=rock-chips.com; spf=pass smtp.mailfrom=rock-chips.com; dkim=pass (1024-bit key) header.d=rock-chips.com header.i=@rock-chips.com header.b=XY/0N3M5; arc=none smtp.client-ip=45.254.49.247 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=rock-chips.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rock-chips.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=rock-chips.com header.i=@rock-chips.com header.b="XY/0N3M5" Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.qiye.163.com (Hmail) with ESMTP id 6aaa2b8d; Tue, 24 Dec 2024 17:41:26 +0800 (GMT+08:00) From: Kever Yang To: heiko@sntech.de Cc: linux-rockchip@lists.infradead.org, Kever Yang , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, Conor Dooley , Rob Herring , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, "David S. Miller" , Jakub Kicinski , Andrew Lunn , David Wu , Paolo Abeni , Krzysztof Kozlowski , Eric Dumazet Subject: [PATCH 1/3] dt-bindings: net: Add support for rk3562 dwmac Date: Tue, 24 Dec 2024 17:41:22 +0800 Message-Id: <20241224094124.3816698-1-kever.yang@rock-chips.com> X-Mailer: git-send-email 2.25.1 Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFDSUNOT01LS0k3V1ktWUFJV1kPCRoVCBIfWUFZGhhNGVZOS0JMQhgZShlOS0pWFRQJFh oXVRMBExYaEhckFA4PWVdZGBILWUFZTkNVSUlVTFVKSk9ZV1kWGg8SFR0UWUFZT0tIVUpLSUhCSE NVSktLVUpCS0tZBg++ X-HM-Tid: 0a93f80af00403afkunm6aaa2b8d X-HM-MType: 1 X-HM-Sender-Digest: e1kMHhlZQR0aFwgeV1kSHx4VD1lBWUc6OjY6Vio5CjIUHEpCSzEwNyoT PDMaCgtVSlVKTEhOS0hISUNDSElCVTMWGhIXVRAeDR4JVQIaFRw7CRQYEFYYExILCFUYFBZFWVdZ EgtZQVlOQ1VJSVVMVUpKT1lXWQgBWUFKT09JNwY+ DKIM-Signature: a=rsa-sha256; b=XY/0N3M5A6L7642T0X1zwP6OTOLoD6VvWemimNXCabm7r4P44RY7mOp0LvHRdplIG9giWyaP95yNkvkJcgKLd04CD0e5/ueCTZsVS5J5MUspKt9LE+gAlEGfXdtfyc4tlYrXy/ZT1/YDS22uzpuB6kxcDTxOl69V4QnTECVmjFE=; s=default; c=relaxed/relaxed; d=rock-chips.com; v=1; bh=q6BdkQMdj09o03ihlV4EVZ1rDVGa/oO7ynJUc37C9ZI=; h=date:mime-version:subject:message-id:from; X-Patchwork-Delegate: kuba@kernel.org Add a rockchip,rk3562-gmac compatible for supporting the 2 gmac devices on the rk3562. Signed-off-by: Kever Yang --- Documentation/devicetree/bindings/net/rockchip-dwmac.yaml | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/net/rockchip-dwmac.yaml b/Documentation/devicetree/bindings/net/rockchip-dwmac.yaml index f8a576611d6c..02b7d9e78c40 100644 --- a/Documentation/devicetree/bindings/net/rockchip-dwmac.yaml +++ b/Documentation/devicetree/bindings/net/rockchip-dwmac.yaml @@ -24,6 +24,7 @@ select: - rockchip,rk3366-gmac - rockchip,rk3368-gmac - rockchip,rk3399-gmac + - rockchip,rk3562-gmac - rockchip,rk3568-gmac - rockchip,rk3576-gmac - rockchip,rk3588-gmac @@ -49,9 +50,11 @@ properties: - rockchip,rk3366-gmac - rockchip,rk3368-gmac - rockchip,rk3399-gmac + - rockchip,rk3562-gmac - rockchip,rv1108-gmac - items: - enum: + - rockchip,rk3562-gmac - rockchip,rk3568-gmac - rockchip,rk3576-gmac - rockchip,rk3588-gmac @@ -59,7 +62,7 @@ properties: - const: snps,dwmac-4.20a clocks: - minItems: 5 + minItems: 4 maxItems: 8 clock-names: From patchwork Tue Dec 24 09:41:23 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kever Yang X-Patchwork-Id: 13919807 X-Patchwork-Delegate: kuba@kernel.org Received: from mail-m49227.qiye.163.com (mail-m49227.qiye.163.com [45.254.49.227]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 879E417C220; Tue, 24 Dec 2024 09:46:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=45.254.49.227 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1735033609; cv=none; b=aVFeb0q1n6d4UH2yFzYcSwHVIMzYFIIWQW52TKctAbCXdsD6oDbVwF1PjAaEGNOhgQMPA8wP9Qo13viQ66EvQ1lPNRqxEWmJayMHT4AJEpNGkmj3sIEfhwhHTcTyvgoOUKK1G1PCWnEYge+VqnTga3/yZoJxXPPcjByNGsEU3Dg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1735033609; c=relaxed/simple; bh=5H6A1wjsvJC2G8rbXfIDol1oy2aMcKNxjQ6ktW0k9os=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=BeLUOTQO2Ao5o+msAPIzGw/qt8VeAEfmnc9gWxaeexSDbKWHpJPFDIs5cvcGi42PLaTXBeyxFxN6r/rlpViFQ0Byc0HR7w0XY/CiXwDqT7dC4LPgbLM+2hM47zqCPf6KiLMdoo7G06hREfsCXgTJhVCskhDiRdU3Up+H3OstUHk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=rock-chips.com; spf=pass smtp.mailfrom=rock-chips.com; dkim=pass (1024-bit key) header.d=rock-chips.com header.i=@rock-chips.com header.b=ROpZ6nyL; arc=none smtp.client-ip=45.254.49.227 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=rock-chips.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rock-chips.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=rock-chips.com header.i=@rock-chips.com header.b="ROpZ6nyL" Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.qiye.163.com (Hmail) with ESMTP id 6aaa2b9a; Tue, 24 Dec 2024 17:41:28 +0800 (GMT+08:00) From: Kever Yang To: heiko@sntech.de Cc: linux-rockchip@lists.infradead.org, David Wu , Kever Yang , Jose Abreu , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, "David S. Miller" , Jakub Kicinski , Andrew Lunn , Paolo Abeni , Maxime Coquelin , Alexandre Torgue , linux-stm32@st-md-mailman.stormreply.com, Eric Dumazet , linux-arm-kernel@lists.infradead.org Subject: [PATCH 2/3] ethernet: stmmac: dwmac-rk: Add gmac support for rk3562 Date: Tue, 24 Dec 2024 17:41:23 +0800 Message-Id: <20241224094124.3816698-2-kever.yang@rock-chips.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241224094124.3816698-1-kever.yang@rock-chips.com> References: <20241224094124.3816698-1-kever.yang@rock-chips.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFDSUNOT01LS0k3V1ktWUFJV1kPCRoVCBIfWUFZGhlJTVZPThkZHRlOShpKSxlWFRQJFh oXVRMBExYaEhckFA4PWVdZGBILWUFZTkNVSUlVTFVKSk9ZV1kWGg8SFR0UWUFZT0tIVUpLSUhCSE NVSktLVUpCS0tZBg++ X-HM-Tid: 0a93f80af73303afkunm6aaa2b9a X-HM-MType: 1 X-HM-Sender-Digest: e1kMHhlZQR0aFwgeV1kSHx4VD1lBWUc6MTI6TRw6TzIOIko0LDEBNx4P EkoKFEtVSlVKTEhOS0hISUJLSktPVTMWGhIXVRAeDR4JVQIaFRw7CRQYEFYYExILCFUYFBZFWVdZ EgtZQVlOQ1VJSVVMVUpKT1lXWQgBWUFDTEpNNwY+ DKIM-Signature: a=rsa-sha256; b=ROpZ6nyL8cU91dm/aCCpnd28Kk2p1rFj8eRYuHFR0r9miK9DbL9yqEyG+LLxqePcmlp/uQj7pCUZbtqXf07Tiv2sr8C1AoJD13z94wu0YiMh52Z9KlfhHut6qz6TftYIr+B4quuxuCtTSqYkwUaYk7UtNUSSuiOrWAU8p8gDd+k=; s=default; c=relaxed/relaxed; d=rock-chips.com; v=1; bh=avd2/YOVOG9PyXntzE8cm7GSXLINL24lkUb/JeShTws=; h=date:mime-version:subject:message-id:from; X-Patchwork-Delegate: kuba@kernel.org From: David Wu Add constants and callback functions for the dwmac on RK3562 soc. As can be seen, the base structure is the same. Signed-off-by: David Wu Signed-off-by: Kever Yang --- .../net/ethernet/stmicro/stmmac/dwmac-rk.c | 207 +++++++++++++++++- 1 file changed, 205 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c index 8cb374668b74..2ce38bf205d4 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c @@ -2,8 +2,7 @@ /** * DOC: dwmac-rk.c - Rockchip RK3288 DWMAC specific glue layer * - * Copyright (C) 2014 Chen-Zhi (Roger Chen) - * + * Copyright (c) 2014 Rockchip Electronics Co., Ltd. * Chen-Zhi (Roger Chen) */ @@ -91,6 +90,16 @@ struct rk_priv_data { (((tx) ? soc##_GMAC_TXCLK_DLY_ENABLE : soc##_GMAC_TXCLK_DLY_DISABLE) | \ ((rx) ? soc##_GMAC_RXCLK_DLY_ENABLE : soc##_GMAC_RXCLK_DLY_DISABLE)) +#define DELAY_VALUE(soc, tx, rx) \ + ((((tx) >= 0) ? soc##_GMAC_CLK_TX_DL_CFG(tx) : 0) | \ + (((rx) >= 0) ? soc##_GMAC_CLK_RX_DL_CFG(rx) : 0)) + +#define GMAC_RGMII_CLK_DIV_BY_ID(soc, id, div) \ + (soc##_GMAC##id##_CLK_RGMII_DIV##div) + +#define GMAC_RMII_CLK_DIV_BY_ID(soc, id, div) \ + (soc##_GMAC##id##_CLK_RMII_DIV##div) + #define PX30_GRF_GMAC_CON1 0x0904 /* PX30_GRF_GMAC_CON1 */ @@ -1013,6 +1022,199 @@ static const struct rk_gmac_ops rk3399_ops = { .set_rmii_speed = rk3399_set_rmii_speed, }; +/* sys_grf */ +#define RK3562_GRF_SYS_SOC_CON0 0X0400 +#define RK3562_GRF_SYS_SOC_CON1 0X0404 + +#define RK3562_GMAC0_CLK_RMII_MODE GRF_BIT(5) +#define RK3562_GMAC0_CLK_RGMII_MODE GRF_CLR_BIT(5) + +#define RK3562_GMAC0_CLK_RMII_GATE GRF_BIT(6) +#define RK3562_GMAC0_CLK_RMII_NOGATE GRF_CLR_BIT(6) + +#define RK3562_GMAC0_CLK_RMII_DIV2 GRF_BIT(7) +#define RK3562_GMAC0_CLK_RMII_DIV20 GRF_CLR_BIT(7) + +#define RK3562_GMAC0_CLK_RGMII_DIV1 \ + (GRF_CLR_BIT(7) | GRF_CLR_BIT(8)) +#define RK3562_GMAC0_CLK_RGMII_DIV5 \ + (GRF_BIT(7) | GRF_BIT(8)) +#define RK3562_GMAC0_CLK_RGMII_DIV50 \ + (GRF_CLR_BIT(7) | GRF_BIT(8)) + +#define RK3562_GMAC0_CLK_RMII_DIV2 GRF_BIT(7) +#define RK3562_GMAC0_CLK_RMII_DIV20 GRF_CLR_BIT(7) + +#define RK3562_GMAC0_CLK_SELET_CRU GRF_CLR_BIT(9) +#define RK3562_GMAC0_CLK_SELET_IO GRF_BIT(9) + +#define RK3562_GMAC1_CLK_RMII_GATE GRF_BIT(12) +#define RK3562_GMAC1_CLK_RMII_NOGATE GRF_CLR_BIT(12) + +#define RK3562_GMAC1_CLK_RMII_DIV2 GRF_BIT(13) +#define RK3562_GMAC1_CLK_RMII_DIV20 GRF_CLR_BIT(13) + +#define RK3562_GMAC1_RMII_SPEED100 GRF_BIT(11) +#define RK3562_GMAC1_RMII_SPEED10 GRF_CLR_BIT(11) + +#define RK3562_GMAC1_CLK_SELET_CRU GRF_CLR_BIT(15) +#define RK3562_GMAC1_CLK_SELET_IO GRF_BIT(15) + +/* ioc_grf */ +#define RK3562_GRF_IOC_GMAC_IOFUNC0_CON0 0X10400 +#define RK3562_GRF_IOC_GMAC_IOFUNC0_CON1 0X10404 +#define RK3562_GRF_IOC_GMAC_IOFUNC1_CON0 0X00400 +#define RK3562_GRF_IOC_GMAC_IOFUNC1_CON1 0X00404 + +#define RK3562_GMAC_RXCLK_DLY_ENABLE GRF_BIT(1) +#define RK3562_GMAC_RXCLK_DLY_DISABLE GRF_CLR_BIT(1) +#define RK3562_GMAC_TXCLK_DLY_ENABLE GRF_BIT(0) +#define RK3562_GMAC_TXCLK_DLY_DISABLE GRF_CLR_BIT(0) + +#define RK3562_GMAC_CLK_RX_DL_CFG(val) HIWORD_UPDATE(val, 0xFF, 8) +#define RK3562_GMAC_CLK_TX_DL_CFG(val) HIWORD_UPDATE(val, 0xFF, 0) + +#define RK3562_GMAC0_IO_EXTCLK_SELET_CRU GRF_CLR_BIT(2) +#define RK3562_GMAC0_IO_EXTCLK_SELET_IO GRF_BIT(2) + +#define RK3562_GMAC1_IO_EXTCLK_SELET_CRU GRF_CLR_BIT(3) +#define RK3562_GMAC1_IO_EXTCLK_SELET_IO GRF_BIT(3) + +static void rk3562_set_to_rgmii(struct rk_priv_data *bsp_priv, + int tx_delay, int rx_delay) +{ + struct device *dev = &bsp_priv->pdev->dev; + + if (IS_ERR(bsp_priv->grf) || IS_ERR(bsp_priv->php_grf)) { + dev_err(dev, "Missing rockchip,grf or rockchip,php_grf property\n"); + return; + } + + if (bsp_priv->id > 0) + return; + + regmap_write(bsp_priv->grf, RK3562_GRF_SYS_SOC_CON0, + RK3562_GMAC0_CLK_RGMII_MODE); + + regmap_write(bsp_priv->php_grf, RK3562_GRF_IOC_GMAC_IOFUNC0_CON1, + DELAY_ENABLE(RK3562, tx_delay, rx_delay)); + regmap_write(bsp_priv->php_grf, RK3562_GRF_IOC_GMAC_IOFUNC0_CON0, + DELAY_VALUE(RK3562, tx_delay, rx_delay)); + + regmap_write(bsp_priv->php_grf, RK3562_GRF_IOC_GMAC_IOFUNC1_CON1, + DELAY_ENABLE(RK3562, tx_delay, rx_delay)); + regmap_write(bsp_priv->php_grf, RK3562_GRF_IOC_GMAC_IOFUNC1_CON0, + DELAY_VALUE(RK3562, tx_delay, rx_delay)); +} + +static void rk3562_set_to_rmii(struct rk_priv_data *bsp_priv) +{ + struct device *dev = &bsp_priv->pdev->dev; + + if (IS_ERR(bsp_priv->grf)) { + dev_err(dev, "%s: Missing rockchip,grf property\n", __func__); + return; + } + + if (!bsp_priv->id) + regmap_write(bsp_priv->grf, RK3562_GRF_SYS_SOC_CON0, + RK3562_GMAC0_CLK_RMII_MODE); +} + +static void rk3562_set_gmac_speed(struct rk_priv_data *bsp_priv, int speed) +{ + struct device *dev = &bsp_priv->pdev->dev; + unsigned int val = 0, offset, id = bsp_priv->id; + + switch (speed) { + case 10: + if (bsp_priv->phy_iface == PHY_INTERFACE_MODE_RMII) { + if (id > 0) { + val = GMAC_RMII_CLK_DIV_BY_ID(RK3562, 1, 20); + regmap_write(bsp_priv->grf, RK3562_GRF_SYS_SOC_CON0, + RK3562_GMAC1_RMII_SPEED10); + } else { + val = GMAC_RMII_CLK_DIV_BY_ID(RK3562, 0, 20); + } + } else { + val = GMAC_RGMII_CLK_DIV_BY_ID(RK3562, 0, 50); + } + break; + case 100: + if (bsp_priv->phy_iface == PHY_INTERFACE_MODE_RMII) { + if (id > 0) { + val = GMAC_RMII_CLK_DIV_BY_ID(RK3562, 1, 2); + regmap_write(bsp_priv->grf, RK3562_GRF_SYS_SOC_CON0, + RK3562_GMAC1_RMII_SPEED100); + } else { + val = GMAC_RMII_CLK_DIV_BY_ID(RK3562, 0, 2); + } + } else { + val = GMAC_RGMII_CLK_DIV_BY_ID(RK3562, 0, 5); + } + break; + case 1000: + if (bsp_priv->phy_iface != PHY_INTERFACE_MODE_RMII) + val = GMAC_RGMII_CLK_DIV_BY_ID(RK3562, 0, 1); + else + goto err; + break; + default: + goto err; + } + + offset = (bsp_priv->id > 0) ? RK3562_GRF_SYS_SOC_CON1 : + RK3562_GRF_SYS_SOC_CON0; + regmap_write(bsp_priv->grf, offset, val); + + return; +err: + dev_err(dev, "unknown speed value for GMAC speed=%d", speed); +} + +static void rk3562_set_clock_selection(struct rk_priv_data *bsp_priv, bool input, + bool enable) +{ + struct device *dev = &bsp_priv->pdev->dev; + unsigned int value; + + if (IS_ERR(bsp_priv->grf) || IS_ERR(bsp_priv->php_grf)) { + dev_err(dev, "Missing rockchip,grf or rockchip,php_grf property\n"); + return; + } + + if (!bsp_priv->id) { + value = input ? RK3562_GMAC0_CLK_SELET_IO : + RK3562_GMAC0_CLK_SELET_CRU; + value |= enable ? RK3562_GMAC0_CLK_RMII_NOGATE : + RK3562_GMAC0_CLK_RMII_GATE; + regmap_write(bsp_priv->grf, RK3562_GRF_SYS_SOC_CON0, value); + + value = input ? RK3562_GMAC0_IO_EXTCLK_SELET_IO : + RK3562_GMAC0_IO_EXTCLK_SELET_CRU; + regmap_write(bsp_priv->php_grf, RK3562_GRF_IOC_GMAC_IOFUNC0_CON1, value); + regmap_write(bsp_priv->php_grf, RK3562_GRF_IOC_GMAC_IOFUNC1_CON1, value); + } else { + value = input ? RK3562_GMAC1_CLK_SELET_IO : + RK3562_GMAC1_CLK_SELET_CRU; + value |= enable ? RK3562_GMAC1_CLK_RMII_NOGATE : + RK3562_GMAC1_CLK_RMII_GATE; + regmap_write(bsp_priv->grf, RK3562_GRF_SYS_SOC_CON1, value); + + value = input ? RK3562_GMAC1_IO_EXTCLK_SELET_IO : + RK3562_GMAC1_IO_EXTCLK_SELET_CRU; + regmap_write(bsp_priv->php_grf, RK3562_GRF_IOC_GMAC_IOFUNC1_CON1, value); + } +} + +static const struct rk_gmac_ops rk3562_ops = { + .set_to_rgmii = rk3562_set_to_rgmii, + .set_to_rmii = rk3562_set_to_rmii, + .set_rgmii_speed = rk3562_set_gmac_speed, + .set_rmii_speed = rk3562_set_gmac_speed, + .set_clock_selection = rk3562_set_clock_selection, +}; + #define RK3568_GRF_GMAC0_CON0 0x0380 #define RK3568_GRF_GMAC0_CON1 0x0384 #define RK3568_GRF_GMAC1_CON0 0x0388 @@ -2062,6 +2264,7 @@ static const struct of_device_id rk_gmac_dwmac_match[] = { { .compatible = "rockchip,rk3366-gmac", .data = &rk3366_ops }, { .compatible = "rockchip,rk3368-gmac", .data = &rk3368_ops }, { .compatible = "rockchip,rk3399-gmac", .data = &rk3399_ops }, + { .compatible = "rockchip,rk3562-gmac", .data = &rk3562_ops }, { .compatible = "rockchip,rk3568-gmac", .data = &rk3568_ops }, { .compatible = "rockchip,rk3576-gmac", .data = &rk3576_ops }, { .compatible = "rockchip,rk3588-gmac", .data = &rk3588_ops }, From patchwork Tue Dec 24 09:41:24 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kever Yang X-Patchwork-Id: 13919792 X-Patchwork-Delegate: kuba@kernel.org Received: from mail-m1973196.qiye.163.com (mail-m1973196.qiye.163.com [220.197.31.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2214D1B0F1E; Tue, 24 Dec 2024 09:41:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=220.197.31.96 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1735033302; cv=none; b=DtKYsdfMP9uh4tgcAtCJwUmFlMs+H9o/+lNCaouTKgNI9oCBT/k1owO3D278/YF4CGRU90/oL3TkW7uWCxP7SE4TKXA/EJ20f0M6HANFwd9IM1bE7rnwO9XjeW16qByf02sZPjrDSnWxcr/2VKI//eJ7INZHeYZemDHVCQzzQlM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1735033302; c=relaxed/simple; bh=jCfcWPXp1ES7rGtk3Xj1haInOpKdDARGk201JY8Nv9E=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=q2COFzddqhHkW8lYZhHN0yggIlI3ycmwQOLLCovwuKW6tmzNexoX1edfkW6NQXiT+CUpvJyjjfP3XmoFdrxQFVSps4F2c2U2wO7iuqTO1jBHz0HEpMryMAZC5tJvV81GapTTSa/dIWOX18YPX4FHivQ/9VYY9RWfjQKU6t8ArX0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=rock-chips.com; spf=pass smtp.mailfrom=rock-chips.com; dkim=pass (1024-bit key) header.d=rock-chips.com header.i=@rock-chips.com header.b=keaZ/7pO; arc=none smtp.client-ip=220.197.31.96 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=rock-chips.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rock-chips.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=rock-chips.com header.i=@rock-chips.com header.b="keaZ/7pO" Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.qiye.163.com (Hmail) with ESMTP id 6aaa2b9d; Tue, 24 Dec 2024 17:41:30 +0800 (GMT+08:00) From: Kever Yang To: heiko@sntech.de Cc: linux-rockchip@lists.infradead.org, David Wu , Kever Yang , Jose Abreu , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, "David S. Miller" , Jakub Kicinski , Andrew Lunn , Paolo Abeni , Maxime Coquelin , Alexandre Torgue , linux-stm32@st-md-mailman.stormreply.com, Eric Dumazet , linux-arm-kernel@lists.infradead.org Subject: [PATCH 3/3] ethernet: stmmac: dwmac-rk: Make the phy clock could be used for external phy Date: Tue, 24 Dec 2024 17:41:24 +0800 Message-Id: <20241224094124.3816698-3-kever.yang@rock-chips.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241224094124.3816698-1-kever.yang@rock-chips.com> References: <20241224094124.3816698-1-kever.yang@rock-chips.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFDSUNOT01LS0k3V1ktWUFJV1kPCRoVCBIfWUFZGRlIQ1ZITU8YTRhCS0lCQxhWFRQJFh oXVRMBExYaEhckFA4PWVdZGBILWUFZTkNVSUlVTFVKSk9ZV1kWGg8SFR0UWUFZT0tIVUpLSUhCSE NVSktLVUpCS0tZBg++ X-HM-Tid: 0a93f80afe1f03afkunm6aaa2b9d X-HM-MType: 1 X-HM-Sender-Digest: e1kMHhlZQR0aFwgeV1kSHx4VD1lBWUc6NE06DAw*TjIXTUopLDAzNyEt CBIKCxhVSlVKTEhOS0hISUJKQk5OVTMWGhIXVRAeDR4JVQIaFRw7CRQYEFYYExILCFUYFBZFWVdZ EgtZQVlOQ1VJSVVMVUpKT1lXWQgBWUFKSUlDNwY+ DKIM-Signature: a=rsa-sha256; b=keaZ/7pOSGwKLmGDnHnM7/DGM2W5JdYsOoHegm9IGwDgiKS372WQ+8A6KGjXBxnLiTshkEojX6CbhlzJvuLYR7QtHQRxesCyf70+WZLWLKZQHHiwBtq8YDqsYxB3314f+wmw/5FvPnxpEEMIaUssQs8l7H/tEEgBjnlwj67sUBo=; s=default; c=relaxed/relaxed; d=rock-chips.com; v=1; bh=Pg5dVbwxypJNMGI16c4GjNAYB+dPf/j5RN5duzxkZX8=; h=date:mime-version:subject:message-id:from; X-Patchwork-Delegate: kuba@kernel.org From: David Wu Use the phy_clk to prepare_enable and unprepare_disable related phy clock. Signed-off-by: David Wu Signed-off-by: Kever Yang --- drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c index 2ce38bf205d4..506c7daefa63 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c @@ -1885,12 +1885,14 @@ static int rk_gmac_clk_init(struct plat_stmmacenet_data *plat) clk_set_rate(bsp_priv->clk_mac, 50000000); } - if (plat->phy_node && bsp_priv->integrated_phy) { + if (plat->phy_node) { bsp_priv->clk_phy = of_clk_get(plat->phy_node, 0); ret = PTR_ERR_OR_ZERO(bsp_priv->clk_phy); if (ret) return dev_err_probe(dev, ret, "Cannot get PHY clock\n"); - clk_set_rate(bsp_priv->clk_phy, 50000000); + /* If it is not integrated_phy, clk_phy is optional */ + if (bsp_priv->integrated_phy) + clk_set_rate(bsp_priv->clk_phy, 50000000); } return 0;