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X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org iommu in a133/a100 does not have reset control. remove it from required property to make it optional. Signed-off-by: Parthiban Nallathambi --- Documentation/devicetree/bindings/iommu/allwinner,sun50i-h6-iommu.yaml | 1 - 1 file changed, 1 deletion(-) diff --git a/Documentation/devicetree/bindings/iommu/allwinner,sun50i-h6-iommu.yaml b/Documentation/devicetree/bindings/iommu/allwinner,sun50i-h6-iommu.yaml index a8409db4a3e3..03176f68485b 100644 --- a/Documentation/devicetree/bindings/iommu/allwinner,sun50i-h6-iommu.yaml +++ b/Documentation/devicetree/bindings/iommu/allwinner,sun50i-h6-iommu.yaml @@ -42,7 +42,6 @@ required: - reg - interrupts - clocks - - resets additionalProperties: false From patchwork Fri Dec 27 11:07:49 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Parthiban X-Patchwork-Id: 13921719 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9DEC2E7718F for ; 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X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org A100/A133 comes with display enginer 2.0 with 1 x Mixer with write back support and 1 tcon top. Mixer can be used with lcd/lvds/dsi, but shares the same GPIO bank. Signed-off-by: Parthiban Nallathambi --- .../display/allwinner,sun4i-a10-display-engine.yaml | 2 ++ .../display/allwinner,sun8i-a83t-de2-mixer.yaml | 1 + .../bindings/display/allwinner,sun8i-r40-tcon-top.yaml | 17 +++++++++++++++++ 3 files changed, 20 insertions(+) diff --git a/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-display-engine.yaml b/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-display-engine.yaml index e6088f379f70..dc47c684fcb0 100644 --- a/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-display-engine.yaml +++ b/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-display-engine.yaml @@ -64,6 +64,7 @@ properties: - allwinner,sun9i-a80-display-engine - allwinner,sun20i-d1-display-engine - allwinner,sun50i-a64-display-engine + - allwinner,sun50i-a100-display-engine - allwinner,sun50i-h6-display-engine allwinner,pipelines: @@ -96,6 +97,7 @@ if: - allwinner,sun9i-a80-display-engine - allwinner,sun20i-d1-display-engine - allwinner,sun50i-a64-display-engine + - allwinner,sun50i-a100-display-engine then: properties: diff --git a/Documentation/devicetree/bindings/display/allwinner,sun8i-a83t-de2-mixer.yaml b/Documentation/devicetree/bindings/display/allwinner,sun8i-a83t-de2-mixer.yaml index b75c1ec686ad..ebcddca2efb3 100644 --- a/Documentation/devicetree/bindings/display/allwinner,sun8i-a83t-de2-mixer.yaml +++ b/Documentation/devicetree/bindings/display/allwinner,sun8i-a83t-de2-mixer.yaml @@ -23,6 +23,7 @@ properties: - allwinner,sun20i-d1-de2-mixer-1 - allwinner,sun50i-a64-de2-mixer-0 - allwinner,sun50i-a64-de2-mixer-1 + - allwinner,sun50i-a100-de2-mixer-0 - allwinner,sun50i-h6-de3-mixer-0 reg: diff --git a/Documentation/devicetree/bindings/display/allwinner,sun8i-r40-tcon-top.yaml b/Documentation/devicetree/bindings/display/allwinner,sun8i-r40-tcon-top.yaml index 7d849c4095a3..9b14b7fb2d2f 100644 --- a/Documentation/devicetree/bindings/display/allwinner,sun8i-r40-tcon-top.yaml +++ b/Documentation/devicetree/bindings/display/allwinner,sun8i-r40-tcon-top.yaml @@ -42,6 +42,7 @@ properties: enum: - allwinner,sun8i-r40-tcon-top - allwinner,sun20i-d1-tcon-top + - allwinner,sun50i-a100-tcon-top - allwinner,sun50i-h6-tcon-top reg: @@ -179,6 +180,22 @@ allOf: - description: TCON TV0 output clock name - description: DSI output clock name + - if: + properties: + compatible: + contains: + const: allwinner,sun50i-a100-tcon-top + + then: + properties: + clocks: + items: + - description: The TCON TOP interface clock + + clock-names: + items: + - const: bus + - if: properties: compatible: From patchwork Fri Dec 27 11:07:50 2024 Content-Type: text/plain; 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X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Some platforms like A100/A133 also uses pll-com clock as additional clock source for the display clock. This is not documents both in user manual and DE 2.0 specification. These changes are mainly from vendor BSP. Signed-off-by: Parthiban Nallathambi --- .../devicetree/bindings/clock/allwinner,sun8i-a83t-de2-clk.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun8i-a83t-de2-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun8i-a83t-de2-clk.yaml index 70369bd633e4..3e00905b66ca 100644 --- a/Documentation/devicetree/bindings/clock/allwinner,sun8i-a83t-de2-clk.yaml +++ b/Documentation/devicetree/bindings/clock/allwinner,sun8i-a83t-de2-clk.yaml @@ -39,11 +39,13 @@ properties: items: - description: Bus Clock - description: Module Clock + - description: PLL common clock clock-names: items: - const: bus - const: mod + - const: pll-com resets: maxItems: 1 From patchwork Fri Dec 27 11:07:51 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Parthiban X-Patchwork-Id: 13921738 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E4493E7718B for ; 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X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org A100/A133 uses one mixer without rotation support, which is same as sun8i v3s. Add it with fallback to v3s compatible. Signed-off-by: Parthiban Nallathambi --- .../devicetree/bindings/clock/allwinner,sun8i-a83t-de2-clk.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun8i-a83t-de2-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun8i-a83t-de2-clk.yaml index 3e00905b66ca..ed038967929b 100644 --- a/Documentation/devicetree/bindings/clock/allwinner,sun8i-a83t-de2-clk.yaml +++ b/Documentation/devicetree/bindings/clock/allwinner,sun8i-a83t-de2-clk.yaml @@ -23,6 +23,7 @@ properties: - const: allwinner,sun8i-h3-de2-clk - const: allwinner,sun8i-v3s-de2-clk - const: allwinner,sun50i-a64-de2-clk + - const: allwinner,sun50i-a100-de2-clk - const: allwinner,sun50i-h5-de2-clk - const: allwinner,sun50i-h6-de3-clk - items: @@ -31,6 +32,9 @@ properties: - items: - const: allwinner,sun20i-d1-de2-clk - const: allwinner,sun50i-h5-de2-clk + - items: + - const: allwinner,sun50i-a100-de2-clk + - const: allwinner,sun8i-v3s-de2-clk reg: maxItems: 1 From patchwork Fri Dec 27 11:07:52 2024 Content-Type: text/plain; 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X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org lvds in A100/A133 platform uses phy from DSI block, which needs to be handled in phy driver. Add phy property to tcon with generic name 'phy'. Signed-off-by: Parthiban Nallathambi --- .../devicetree/bindings/display/allwinner,sun4i-a10-tcon.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-tcon.yaml b/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-tcon.yaml index 724d93b9193b..6d8ae781c230 100644 --- a/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-tcon.yaml +++ b/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-tcon.yaml @@ -115,6 +115,12 @@ properties: - const: edp - const: lvds + phys: + maxItems: 1 + + phy-names: + const: phy + ports: $ref: /schemas/graph.yaml#/properties/ports From patchwork Fri Dec 27 11:07:53 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Parthiban X-Patchwork-Id: 13921740 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 304ECE7718F for ; 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X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org A100/A133 has one 18 bit LCD / 2 x LVDS / 1 x DSI. All the controller shares the same GPIO D block, where LVDS controller can co-exits. Although 2 LVDS controller is available, there is no document details for the second. Add compatible for a100 lcd controller. Signed-off-by: Parthiban Nallathambi --- Documentation/devicetree/bindings/display/allwinner,sun4i-a10-tcon.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-tcon.yaml b/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-tcon.yaml index 6d8ae781c230..7ea45a0a2073 100644 --- a/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-tcon.yaml +++ b/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-tcon.yaml @@ -35,6 +35,7 @@ properties: - const: allwinner,sun9i-a80-tcon-tv - const: allwinner,sun20i-d1-tcon-lcd - const: allwinner,sun20i-d1-tcon-tv + - const: allwinner,sun50i-a100-tcon-lcd - items: - enum: From patchwork Fri Dec 27 11:07:54 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Parthiban X-Patchwork-Id: 13921755 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BF3A7E7718B for ; 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X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add entry for Shenzhen Baijie Technology (https://szbaijie.com) Signed-off-by: Parthiban Nallathambi --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index da01616802c7..81cbc8b6b195 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -1466,6 +1466,8 @@ patternProperties: "^synopsys,.*": description: Synopsys, Inc. (deprecated, use snps) deprecated: true + "^szbaijie,.*": + description: Shenzhen Baijie Technology Co., Ltd. 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X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Szbaijie Baijie Technology A133 helper board is an evaluation board of their A133-Core SoM. Add its compatible (with the SoM compatible) to the sunxi board DT binding file. Signed-off-by: Parthiban Nallathambi --- Documentation/devicetree/bindings/arm/sunxi.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/sunxi.yaml b/Documentation/devicetree/bindings/arm/sunxi.yaml index 046536d02706..eb19f8b1fe68 100644 --- a/Documentation/devicetree/bindings/arm/sunxi.yaml +++ b/Documentation/devicetree/bindings/arm/sunxi.yaml @@ -891,6 +891,12 @@ properties: - const: allwinner,sl631 - const: allwinner,sun8i-v3 + - description: Szbaijie A133 Helper board + items: + - const: szbaijie,helper-a133 + - const: szbaijie,helper-a133-core + - const: allwinner,sun50i-a133 + - description: Tanix TX1 items: - const: oranth,tanix-tx1 From patchwork Fri Dec 27 11:07:56 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Parthiban X-Patchwork-Id: 13921741 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 57D44E7718B for ; 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X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org A133/A100 SoC doesn't have reset control from the CCU. Get reset control line optionally. Signed-off-by: Parthiban Nallathambi --- drivers/iommu/sun50i-iommu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/iommu/sun50i-iommu.c b/drivers/iommu/sun50i-iommu.c index 8d8f11854676..2ba804d682dc 100644 --- a/drivers/iommu/sun50i-iommu.c +++ b/drivers/iommu/sun50i-iommu.c @@ -1030,7 +1030,7 @@ static int sun50i_iommu_probe(struct platform_device *pdev) goto err_free_cache; } - iommu->reset = devm_reset_control_get(&pdev->dev, NULL); + iommu->reset = devm_reset_control_get_optional(&pdev->dev, NULL); if (IS_ERR(iommu->reset)) { dev_err(&pdev->dev, "Couldn't get our reset line.\n"); ret = PTR_ERR(iommu->reset); From patchwork Fri Dec 27 11:07:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Parthiban X-Patchwork-Id: 13921747 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B11E2E7718B for ; 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X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org lvds, lcd, dsi all shares the same GPIO D bank and lvds0 data 3 lines and lvds1 pins are missed, add them. Signed-off-by: Parthiban Nallathambi --- drivers/pinctrl/sunxi/pinctrl-sun50i-a100.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/pinctrl/sunxi/pinctrl-sun50i-a100.c b/drivers/pinctrl/sunxi/pinctrl-sun50i-a100.c index df90c75fb3c5..b97de80ae2f3 100644 --- a/drivers/pinctrl/sunxi/pinctrl-sun50i-a100.c +++ b/drivers/pinctrl/sunxi/pinctrl-sun50i-a100.c @@ -256,72 +256,84 @@ static const struct sunxi_desc_pin a100_pins[] = { SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "lcd0"), /* D12 */ + SUNXI_FUNCTION(0x3, "lvds0"), /* D3P */ SUNXI_FUNCTION(0x4, "dsi0"), /* DP3 */ SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 8)), SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 9), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "lcd0"), /* D13 */ + SUNXI_FUNCTION(0x3, "lvds0"), /* D3N */ SUNXI_FUNCTION(0x4, "dsi0"), /* DM3 */ SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 9)), SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 10), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "lcd0"), /* D14 */ + SUNXI_FUNCTION(0x3, "lvds1"), /* D0P */ SUNXI_FUNCTION(0x4, "spi1"), /* CS */ SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 10)), SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 11), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "lcd0"), /* D15 */ + SUNXI_FUNCTION(0x3, "lvds1"), /* D0N */ SUNXI_FUNCTION(0x4, "spi1"), /* CLK */ SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 11)), SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 12), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "lcd0"), /* D18 */ + SUNXI_FUNCTION(0x3, "lvds1"), /* D1P */ SUNXI_FUNCTION(0x4, "spi1"), /* MOSI */ SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 12)), SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 13), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "lcd0"), /* D19 */ + SUNXI_FUNCTION(0x3, "lvds1"), /* D1N */ SUNXI_FUNCTION(0x4, "spi1"), /* MISO */ SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 13)), SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 14), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "lcd0"), /* D20 */ + SUNXI_FUNCTION(0x3, "lvds1"), /* D2P */ SUNXI_FUNCTION(0x4, "uart3"), /* TX */ SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 14)), SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 15), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "lcd0"), /* D21 */ + SUNXI_FUNCTION(0x3, "lvds1"), /* D2N */ SUNXI_FUNCTION(0x4, "uart3"), /* RX */ SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 15)), SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 16), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "lcd0"), /* D22 */ + SUNXI_FUNCTION(0x3, "lvds1"), /* CKP */ SUNXI_FUNCTION(0x4, "uart3"), /* RTS */ SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 16)), SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 17), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "lcd0"), /* D23 */ + SUNXI_FUNCTION(0x3, "lvds1"), /* CKN */ SUNXI_FUNCTION(0x4, "uart3"), /* CTS */ SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 17)), SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 18), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "lcd0"), /* CLK */ + SUNXI_FUNCTION(0x3, "lvds1"), /* D3P */ SUNXI_FUNCTION(0x4, "uart4"), /* TX */ SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 18)), SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 19), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), SUNXI_FUNCTION(0x2, "lcd0"), /* DE */ + SUNXI_FUNCTION(0x3, "lvds1"), /* D3N */ SUNXI_FUNCTION(0x4, "uart4"), /* RX */ SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 19)), SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 20), From patchwork Fri Dec 27 11:07:58 2024 Content-Type: text/plain; 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X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Display Engine(DE2) in Allwinner A100/A133 has one mixers and tcon. The routing for mixer0 is through tcon0 and connected to LVDS/RGB/MIPI-DSI controller. Signed-off-by: Parthiban Nallathambi --- drivers/gpu/drm/sun4i/sun4i_drv.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c b/drivers/gpu/drm/sun4i/sun4i_drv.c index 5eccf58f2e17..e012a6316bba 100644 --- a/drivers/gpu/drm/sun4i/sun4i_drv.c +++ b/drivers/gpu/drm/sun4i/sun4i_drv.c @@ -436,6 +436,7 @@ static const struct of_device_id sun4i_drv_of_table[] = { { .compatible = "allwinner,sun9i-a80-display-engine" }, { .compatible = "allwinner,sun20i-d1-display-engine" }, { .compatible = "allwinner,sun50i-a64-display-engine" }, + { .compatible = "allwinner,sun50i-a100-display-engine" }, { .compatible = "allwinner,sun50i-h6-display-engine" }, { } }; From patchwork Fri Dec 27 11:07:59 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Parthiban X-Patchwork-Id: 13921749 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 47FF7E7718B for ; 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X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Mixers in Allwinner A100/A133 have similar capabilities as others SoCs with DE2. Add support for them. Signed-off-by: Parthiban Nallathambi --- drivers/gpu/drm/sun4i/sun8i_mixer.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c index 8b41d33baa30..0a1fccb87d5d 100644 --- a/drivers/gpu/drm/sun4i/sun8i_mixer.c +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c @@ -714,6 +714,15 @@ static const struct sun8i_mixer_cfg sun50i_a64_mixer1_cfg = { .vi_num = 1, }; +static const struct sun8i_mixer_cfg sun50i_a100_mixer0_cfg = { + .ccsc = CCSC_MIXER0_LAYOUT, + .mod_rate = 300000000, + .scaler_mask = 0xf, + .scanline_yuv = 2560, + .ui_num = 2, + .vi_num = 2, +}; + static const struct sun8i_mixer_cfg sun50i_h6_mixer0_cfg = { .ccsc = CCSC_MIXER0_LAYOUT, .is_de3 = true, @@ -765,6 +774,10 @@ static const struct of_device_id sun8i_mixer_of_table[] = { .compatible = "allwinner,sun50i-a64-de2-mixer-1", .data = &sun50i_a64_mixer1_cfg, }, + { + .compatible = "allwinner,sun50i-a100-de2-mixer-0", + .data = &sun50i_a100_mixer0_cfg, + }, { .compatible = "allwinner,sun50i-h6-de3-mixer-0", .data = &sun50i_h6_mixer0_cfg, From patchwork Fri Dec 27 11:08:00 2024 Content-Type: text/plain; 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Make tv0 optional by introducing another control similar to tv1 and make existing users with true/present. Signed-off-by: Parthiban Nallathambi --- drivers/gpu/drm/sun4i/sun8i_tcon_top.c | 34 ++++++++++++++++++++-------------- 1 file changed, 20 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun8i_tcon_top.c b/drivers/gpu/drm/sun4i/sun8i_tcon_top.c index 8adda578c51b..bd9d0840ead7 100644 --- a/drivers/gpu/drm/sun4i/sun8i_tcon_top.c +++ b/drivers/gpu/drm/sun4i/sun8i_tcon_top.c @@ -16,6 +16,7 @@ #include "sun8i_tcon_top.h" struct sun8i_tcon_top_quirks { + bool has_tcon_tv0; bool has_tcon_tv1; bool has_dsi; }; @@ -191,10 +192,11 @@ static int sun8i_tcon_top_bind(struct device *dev, struct device *master, * to TVE clock parent. */ i = 0; - clk_data->hws[CLK_TCON_TOP_TV0] = - sun8i_tcon_top_register_gate(dev, "tcon-tv0", regs, - &tcon_top->reg_lock, - TCON_TOP_TCON_TV0_GATE, i++); + if (quirks->has_tcon_tv0) + clk_data->hws[CLK_TCON_TOP_TV0] = + sun8i_tcon_top_register_gate(dev, "tcon-tv0", regs, + &tcon_top->reg_lock, + TCON_TOP_TCON_TV0_GATE, i++); if (quirks->has_tcon_tv1) clk_data->hws[CLK_TCON_TOP_TV1] = @@ -208,16 +210,18 @@ static int sun8i_tcon_top_bind(struct device *dev, struct device *master, &tcon_top->reg_lock, TCON_TOP_TCON_DSI_GATE, i++); - for (i = 0; i < CLK_NUM; i++) - if (IS_ERR(clk_data->hws[i])) { - ret = PTR_ERR(clk_data->hws[i]); - goto err_unregister_gates; - } + if (i) { + for (i = 0; i < CLK_NUM; i++) + if (IS_ERR(clk_data->hws[i])) { + ret = PTR_ERR(clk_data->hws[i]); + goto err_unregister_gates; + } - ret = of_clk_add_hw_provider(dev->of_node, of_clk_hw_onecell_get, - clk_data); - if (ret) - goto err_unregister_gates; + ret = of_clk_add_hw_provider(dev->of_node, of_clk_hw_onecell_get, + clk_data); + if (ret) + goto err_unregister_gates; + } dev_set_drvdata(dev, tcon_top); @@ -266,16 +270,18 @@ static void sun8i_tcon_top_remove(struct platform_device *pdev) } static const struct sun8i_tcon_top_quirks sun8i_r40_tcon_top_quirks = { + .has_tcon_tv0 = true, .has_tcon_tv1 = true, .has_dsi = true, }; static const struct sun8i_tcon_top_quirks sun20i_d1_tcon_top_quirks = { + .has_tcon_tv0 = true, .has_dsi = true, }; static const struct sun8i_tcon_top_quirks sun50i_h6_tcon_top_quirks = { - /* Nothing special */ + .has_tcon_tv0 = true, }; /* sun4i_drv uses this list to check if a device node is a TCON TOP */ From patchwork Fri Dec 27 11:08:01 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Parthiban X-Patchwork-Id: 13921754 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1A9CEE7718B for ; Fri, 27 Dec 2024 11:24:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References :Message-Id:Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date: From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; 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X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org A100/A133 comes with 2 x LVDS, 1 x DSI without TV support. Add quirks with tv0 disabled. DSI support is not added. Signed-off-by: Parthiban Nallathambi --- drivers/gpu/drm/sun4i/sun8i_tcon_top.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/gpu/drm/sun4i/sun8i_tcon_top.c b/drivers/gpu/drm/sun4i/sun8i_tcon_top.c index bd9d0840ead7..a777b30ecea0 100644 --- a/drivers/gpu/drm/sun4i/sun8i_tcon_top.c +++ b/drivers/gpu/drm/sun4i/sun8i_tcon_top.c @@ -280,6 +280,10 @@ static const struct sun8i_tcon_top_quirks sun20i_d1_tcon_top_quirks = { .has_dsi = true, }; +static const struct sun8i_tcon_top_quirks sun50i_a100_tcon_top_quirks = { + /* TODO DSI support */ +}; + static const struct sun8i_tcon_top_quirks sun50i_h6_tcon_top_quirks = { .has_tcon_tv0 = true, }; @@ -294,6 +298,10 @@ const struct of_device_id sun8i_tcon_top_of_table[] = { .compatible = "allwinner,sun20i-d1-tcon-top", .data = &sun20i_d1_tcon_top_quirks }, + { + .compatible = "allwinner,sun50i-a100-tcon-top", + .data = &sun50i_a100_tcon_top_quirks + }, { .compatible = "allwinner,sun50i-h6-tcon-top", .data = &sun50i_h6_tcon_top_quirks From patchwork Fri Dec 27 11:08:02 2024 Content-Type: text/plain; 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There is no documentation reference or details in DE 2.0 specification. But these changes are needed to get the display clock to work and this is inherited from the vendor BSP. Signed-off-by: Parthiban Nallathambi --- drivers/clk/sunxi-ng/ccu-sun8i-de2.c | 19 +++++++++++++++++-- 1 file changed, 17 insertions(+), 2 deletions(-) diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-de2.c b/drivers/clk/sunxi-ng/ccu-sun8i-de2.c index f2aa71206bc2..3e28c32050e0 100644 --- a/drivers/clk/sunxi-ng/ccu-sun8i-de2.c +++ b/drivers/clk/sunxi-ng/ccu-sun8i-de2.c @@ -241,7 +241,7 @@ static const struct sunxi_ccu_desc sun50i_h5_de2_clk_desc = { static int sunxi_de2_clk_probe(struct platform_device *pdev) { - struct clk *bus_clk, *mod_clk; + struct clk *bus_clk, *mod_clk, *pll_clk; struct reset_control *rstc; void __iomem *reg; const struct sunxi_ccu_desc *ccu_desc; @@ -265,6 +265,11 @@ static int sunxi_de2_clk_probe(struct platform_device *pdev) return dev_err_probe(&pdev->dev, PTR_ERR(mod_clk), "Couldn't get mod clk\n"); + pll_clk = devm_clk_get_optional(&pdev->dev, "pll-com"); + if (IS_ERR(pll_clk)) + return dev_err_probe(&pdev->dev, PTR_ERR(pll_clk), + "Couldn't get pll clk\n"); + rstc = devm_reset_control_get_exclusive(&pdev->dev, NULL); if (IS_ERR(rstc)) return dev_err_probe(&pdev->dev, PTR_ERR(rstc), @@ -283,12 +288,20 @@ static int sunxi_de2_clk_probe(struct platform_device *pdev) goto err_disable_bus_clk; } + if (pll_clk) { + ret = clk_prepare_enable(pll_clk); + if (ret) { + dev_err(&pdev->dev, "Couldn't enable pll clk: %d\n", ret); + goto err_disable_mod_clk; + } + } + /* The reset control needs to be asserted for the controls to work */ ret = reset_control_deassert(rstc); if (ret) { dev_err(&pdev->dev, "Couldn't deassert reset control: %d\n", ret); - goto err_disable_mod_clk; + goto err_disable_pll_clk; } ret = devm_sunxi_ccu_probe(&pdev->dev, reg, ccu_desc); @@ -299,6 +312,8 @@ static int sunxi_de2_clk_probe(struct platform_device *pdev) err_assert_reset: reset_control_assert(rstc); +err_disable_pll_clk: + clk_disable_unprepare(pll_clk); err_disable_mod_clk: clk_disable_unprepare(mod_clk); err_disable_bus_clk: From patchwork Fri Dec 27 11:08:03 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Parthiban X-Patchwork-Id: 13921760 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3482EE7718F for ; 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X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Display clock uses 1 mixer without rotation support is same as v3s. There is also a hidden independent display engine with independent tcon_top available in A100/A133 bin (based on vendor BSP). Add new compatible for A100/A133 to accommodate the future changes for the independent DE. Signed-off-by: Parthiban Nallathambi --- drivers/clk/sunxi-ng/ccu-sun8i-de2.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-de2.c b/drivers/clk/sunxi-ng/ccu-sun8i-de2.c index 3e28c32050e0..067820ab704d 100644 --- a/drivers/clk/sunxi-ng/ccu-sun8i-de2.c +++ b/drivers/clk/sunxi-ng/ccu-sun8i-de2.c @@ -342,6 +342,10 @@ static const struct of_device_id sunxi_de2_clk_ids[] = { .compatible = "allwinner,sun50i-a64-de2-clk", .data = &sun50i_a64_de2_clk_desc, }, + { + .compatible = "allwinner,sun50i-a100-de2-clk", + .data = &sun8i_v3s_de2_clk_desc, + }, { .compatible = "allwinner,sun50i-h5-de2-clk", .data = &sun50i_h5_de2_clk_desc, From patchwork Fri Dec 27 11:08:04 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Parthiban X-Patchwork-Id: 13921759 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 62403E7718B for ; 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a=ed25519-sha256; t=1735297689; l=2408; i=parthiban@linumiz.com; s=20241125; h=from:subject:message-id; bh=nGhmLXbYqR03qzpnWqYss6Ffpz+ip+uG6qlbqNTI4RI=; b=jrn6tfvMK61w3sgTTFVgqbnsDl8voBLuiq+w4I4k4GT50D6DwXem7WWTp7nYJlqsikuDUr5Xn u3DGRJaOe5oBtwaDDu6RCOpsp0RqGwuy4qxUO6CGLg7RxoBCgfmikvJ X-Developer-Key: i=parthiban@linumiz.com; a=ed25519; pk=PrcMZ/nwnHbeXNFUFUS833wF3DAX4hziDHEbBp1eNb8= X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - md-in-79.webhostbox.net X-AntiAbuse: Original Domain - lists.infradead.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - linumiz.com X-BWhitelist: no X-Source-IP: 122.165.245.213 X-Source-L: No X-Exim-ID: 1tR8Du-000bEK-0V X-Source: X-Source-Args: X-Source-Dir: X-Source-Sender: ([127.0.1.1]) [122.165.245.213]:50828 X-Source-Auth: parthiban@linumiz.com X-Email-Count: 499 X-Org: HG=dishared_whb_net_legacy;ORG=directi; X-Source-Cap: bGludW1jbWM7aG9zdGdhdG9yO21kLWluLTc5LndlYmhvc3Rib3gubmV0 X-Local-Domain: yes X-CMAE-Envelope: MS4xfOwvjyQHhVowc7gw4hCiplmRXulZMGkrjNYP72j1LYsuKp686ulivbTK0eBbfnzrJBqnkKwTikuJgbl0sTm6zFzSX1svL/QrQxjTr3jEjlBHGPblvzhR LAPJrrT3vf9RXuNuAcr3zk1QscisutHXMSqZZt6ZeduV1qqOiiJfq6qaNvANH7nX5Z3LHRERFlw5+H7bZ6dlD+5v7Q1vVPJGNWf+rPije48F8ZMFtbRYpzel X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241227_030947_652299_9958EE3E X-CRM114-Status: GOOD ( 10.99 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DPHY in A100/A133 supports both LVDS and DSI. Combo phy register have BIT(2) for enabling LVDS specifically, but enabling it alone isn't functional. Both MIPI and LVDS needs to be enabled in the combo phy to get the display working under LVDS mode. There is no specific enable bit for LVDS apart from the one in combo phy. MIPI got enable control in analog 4 register which must be disabled when using in LVDS mode. Introduce set_mode in phy ops to control only for MIPI DSI. Signed-off-by: Parthiban Nallathambi --- drivers/phy/allwinner/phy-sun6i-mipi-dphy.c | 23 +++++++++++++++++++---- 1 file changed, 19 insertions(+), 4 deletions(-) diff --git a/drivers/phy/allwinner/phy-sun6i-mipi-dphy.c b/drivers/phy/allwinner/phy-sun6i-mipi-dphy.c index 36eab95271b2..d164b2ea5dfd 100644 --- a/drivers/phy/allwinner/phy-sun6i-mipi-dphy.c +++ b/drivers/phy/allwinner/phy-sun6i-mipi-dphy.c @@ -314,13 +314,11 @@ static void sun50i_a100_mipi_dphy_tx_power_on(struct sun6i_dphy *dphy) /* Disable sigma-delta modulation. */ regmap_write(dphy->regs, SUN50I_DPHY_PLL_REG2, 0); - regmap_update_bits(dphy->regs, SUN6I_DPHY_ANA4_REG, - SUN6I_DPHY_ANA4_REG_EN_MIPI, - SUN6I_DPHY_ANA4_REG_EN_MIPI); - regmap_update_bits(dphy->regs, SUN50I_COMBO_PHY_REG0, + SUN50I_COMBO_PHY_REG0_EN_LVDS | SUN50I_COMBO_PHY_REG0_EN_MIPI | SUN50I_COMBO_PHY_REG0_EN_COMBOLDO, + SUN50I_COMBO_PHY_REG0_EN_LVDS | SUN50I_COMBO_PHY_REG0_EN_MIPI | SUN50I_COMBO_PHY_REG0_EN_COMBOLDO); @@ -528,6 +526,22 @@ static int sun6i_dphy_exit(struct phy *phy) return 0; } +static int sun6i_set_mode(struct phy *phy, enum phy_mode mode, int submode) +{ + struct sun6i_dphy *dphy = phy_get_drvdata(phy); + + switch (mode) { + case PHY_MODE_MIPI_DPHY: + regmap_update_bits(dphy->regs, SUN6I_DPHY_ANA4_REG, + SUN6I_DPHY_ANA4_REG_EN_MIPI, + SUN6I_DPHY_ANA4_REG_EN_MIPI); + break; + default: + return -EINVAL; + } + + return 0; +} static const struct phy_ops sun6i_dphy_ops = { .configure = sun6i_dphy_configure, @@ -535,6 +549,7 @@ static const struct phy_ops sun6i_dphy_ops = { .power_off = sun6i_dphy_power_off, .init = sun6i_dphy_init, .exit = sun6i_dphy_exit, + .set_mode = sun6i_set_mode, }; static const struct regmap_config sun6i_dphy_regmap_config = {