From patchwork Thu Jan 2 08:36:30 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Hogander, Jouni" X-Patchwork-Id: 13924325 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5056EE77197 for ; Thu, 2 Jan 2025 08:36:55 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7078410E3C4; Thu, 2 Jan 2025 08:36:54 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="GBbLFTvL"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.16]) by gabe.freedesktop.org (Postfix) with ESMTPS id 67B9410E3BB; Thu, 2 Jan 2025 08:36:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1735807012; x=1767343012; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=+LycbfHECOYT76Qe5K2s9BO9lh87hriNwwutsjfcDDM=; b=GBbLFTvLNTa0Sya1LwEIGl1XldrgDVHkXuddq+6uahEBzzCAYjjomeUe XhNVDImMNa2BzkQhbn9bmG7Fw+LEQhUv40xnIaNMCNWUSGMMPdfeXiyWy EvrT/FrZ4OlKeTQyjnQw55ZzFshTndnxjvOze7QZ+xq+W9bZt/QP3lJLP Gxat1wxK1360/uCCX5P59L6zxTD/oKoq8WoO9bnpKscgm4Wpu6IECiag6 TV9e65VyOWVWvkj09LO+f052/L6ylrl/glsFmWgYR9Q0sTAWtxDc4KTiM KOHfb+2X+ocjRuS9M8pTXhggtesHhbhtNMxD0cLWv2F0c+5IpV3f6A93N Q==; X-CSE-ConnectionGUID: KU5IQR35SGWIIB/EWEqQ0Q== X-CSE-MsgGUID: MY4pQZ1ESvGOUBh63A6NqA== X-IronPort-AV: E=McAfee;i="6700,10204,11302"; a="23626895" X-IronPort-AV: E=Sophos;i="6.12,284,1728975600"; d="scan'208";a="23626895" Received: from fmviesa004.fm.intel.com ([10.60.135.144]) by fmvoesa110.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Jan 2025 00:36:52 -0800 X-CSE-ConnectionGUID: hN88QdAqQF6f+LPRRBUMNQ== X-CSE-MsgGUID: Ju+bHqRSSmOeObZZkEmm0w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,284,1728975600"; d="scan'208";a="106314127" Received: from fdefranc-mobl3.ger.corp.intel.com (HELO jhogande-mobl1..) ([10.245.245.76]) by fmviesa004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Jan 2025 00:36:51 -0800 From: =?utf-8?q?Jouni_H=C3=B6gander?= To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: =?utf-8?q?Jouni_H=C3=B6gander?= Subject: [PATCH v2 1/9] drm/i915/psr: Use PSR2_MAN_TRK_CTL CFF bit only to send full update Date: Thu, 2 Jan 2025 10:36:30 +0200 Message-ID: <20250102083638.2552066-2-jouni.hogander@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250102083638.2552066-1-jouni.hogander@intel.com> References: <20250102083638.2552066-1-jouni.hogander@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" We are preparing for a change where only frontbuffer flush will use single full frame bit of a new register (SFF_CTL) available on LunarLake onwards. Signed-off-by: Jouni Högander --- drivers/gpu/drm/i915/display/intel_psr.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 0b021acb330f..476305010e11 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -2381,7 +2381,6 @@ static void psr2_man_trk_ctl_calc(struct intel_crtc_state *crtc_state, val |= man_trk_ctl_partial_frame_bit_get(display); if (full_update) { - val |= man_trk_ctl_single_full_frame_bit_get(display); val |= man_trk_ctl_continuos_full_frame(display); goto exit; } From patchwork Thu Jan 2 08:36:31 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Hogander, Jouni" X-Patchwork-Id: 13924326 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 760F3E7718B for ; Thu, 2 Jan 2025 08:36:56 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5B48B10E3C7; Thu, 2 Jan 2025 08:36:55 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="Shj9tOEP"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.16]) by gabe.freedesktop.org (Postfix) with ESMTPS id D480C10E3C4; Thu, 2 Jan 2025 08:36:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1735807014; x=1767343014; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Whj9TBUSdM04nLgyI+DdQEGSgN4EBrrXuio6Dn07mi0=; b=Shj9tOEPSTA88WMe0Z+iNsLbKyWLY47QvTunaGt6GTuMyhR8FeW42jM3 vWAkvXD2lgON4w7D52T26Tgw+L0VEjR2h5XRjpJYpqM3AOpIoZOWV4CbH UMSfArRn0rXjNXGj+30gOoIOgRQG0ACk9ZwysBcibXOncmabqxCWNlwkt fHZNtGF3N9EAVWjWpyonvYbmTKfTwKoyM9oxslBw74OWKpC3GbMjSXCl5 8qiVRQ3fbb+evJ/xJCC93lGUbz/+r6Utq+xaxrtnj8vIGgAfJrfw8/41d qYp7lHITCg91lRr07ygT+9L+znaFDG2m1cPUtRQXuEulWC3CCb0N+4TVf g==; X-CSE-ConnectionGUID: LKcqGd3BR12w6W5OOKI6Tw== X-CSE-MsgGUID: v0rwI1RST6+xgrOdg80gVQ== X-IronPort-AV: E=McAfee;i="6700,10204,11302"; a="23626899" X-IronPort-AV: E=Sophos;i="6.12,284,1728975600"; d="scan'208";a="23626899" Received: from fmviesa004.fm.intel.com ([10.60.135.144]) by fmvoesa110.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Jan 2025 00:36:53 -0800 X-CSE-ConnectionGUID: pM4LLTo4SWef+ywKE8kPxw== X-CSE-MsgGUID: Et4b14qNTKi8ra0LouNgFA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,284,1728975600"; d="scan'208";a="106314134" Received: from fdefranc-mobl3.ger.corp.intel.com (HELO jhogande-mobl1..) ([10.245.245.76]) by fmviesa004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Jan 2025 00:36:52 -0800 From: =?utf-8?q?Jouni_H=C3=B6gander?= To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: =?utf-8?q?Jouni_H=C3=B6gander?= Subject: [PATCH v2 2/9] drm/i915/psr: Rename psr_force_hw_tracking_exit as intel_psr_force_update Date: Thu, 2 Jan 2025 10:36:31 +0200 Message-ID: <20250102083638.2552066-3-jouni.hogander@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250102083638.2552066-1-jouni.hogander@intel.com> References: <20250102083638.2552066-1-jouni.hogander@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" psr_force_hw_tracking_exit is misleading name as it is used for PSR1, PSR2 HW tracking and PSR2 selective fetch. Due to this rename it as intel_psr_force_update. Signed-off-by: Jouni Högander --- drivers/gpu/drm/i915/display/intel_psr.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 476305010e11..5411d0d6f362 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -2310,7 +2310,7 @@ static u32 man_trk_ctl_continuos_full_frame(struct intel_display *display) PSR2_MAN_TRK_CTL_SF_CONTINUOS_FULL_FRAME; } -static void psr_force_hw_tracking_exit(struct intel_dp *intel_dp) +static void intel_psr_force_update(struct intel_dp *intel_dp) { struct intel_display *display = to_intel_display(intel_dp); enum transcoder cpu_transcoder = intel_dp->psr.transcoder; @@ -2857,7 +2857,7 @@ void intel_psr_post_plane_update(struct intel_atomic_state *state, /* Force a PSR exit when enabling CRC to avoid CRC timeouts */ if (crtc_state->crc_enabled && psr->enabled) - psr_force_hw_tracking_exit(intel_dp); + intel_psr_force_update(intel_dp); /* * Clear possible busy bits in case we have @@ -3254,10 +3254,10 @@ static void _psr_flush_handle(struct intel_dp *intel_dp) * continuous full frame is disabled, only a single full * frame is required */ - psr_force_hw_tracking_exit(intel_dp); + intel_psr_force_update(intel_dp); } } else { - psr_force_hw_tracking_exit(intel_dp); + intel_psr_force_update(intel_dp); if (!intel_dp->psr.active && !intel_dp->psr.busy_frontbuffer_bits) queue_work(dev_priv->unordered_wq, &intel_dp->psr.work); From patchwork Thu Jan 2 08:36:32 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Hogander, Jouni" X-Patchwork-Id: 13924327 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6DAA7E77194 for ; Thu, 2 Jan 2025 08:36:57 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9696710E3C9; Thu, 2 Jan 2025 08:36:56 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="DB60/mm4"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.16]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4BABD10E3C5; Thu, 2 Jan 2025 08:36:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1735807015; x=1767343015; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=u0edCC6vPZq2WeAy0KuAy6HDvp/I7I4iggM9r/D2B8c=; b=DB60/mm4cmIiVVNV96nTYe6Xe0AIUXQKz6eJqZCiOO9B8DIZ3sh8o89L 85dwt6cJLuuyA4nf6hItDxvcbmRk3HzXqZbj1wm1kmvC70xoZBTqwKBwm kl0YocqRUUfU1uKHPcjemF895REvZyNJVqKQOfPeu4MDnGi9GfIiD7IeS okwSSRrYmvPQnDkOQ6LYAVUYlzOkINuXqYNTAA1RtPyGmlwYbFzPhbnr9 lerac9W3NqNOfdYwqUAonbFL4AAS6qfXr+R52z8WVQMdfYSqpEpR3Q68W 7+rBi4O6/wJjy0N8Wl8dCsweI69Jtsl37sSzlcdK/a6oCAttNFxcunQue w==; X-CSE-ConnectionGUID: ix89D2a6QtySYKevuy2f1w== X-CSE-MsgGUID: O7G/wd8KSmaNQuKN4excDw== X-IronPort-AV: E=McAfee;i="6700,10204,11302"; a="23626901" X-IronPort-AV: E=Sophos;i="6.12,284,1728975600"; d="scan'208";a="23626901" Received: from fmviesa004.fm.intel.com ([10.60.135.144]) by fmvoesa110.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Jan 2025 00:36:55 -0800 X-CSE-ConnectionGUID: 56bKxwcrRaamen64iVykNg== X-CSE-MsgGUID: NbhpmUuBQF+oLd7acP651Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,284,1728975600"; d="scan'208";a="106314140" Received: from fdefranc-mobl3.ger.corp.intel.com (HELO jhogande-mobl1..) ([10.245.245.76]) by fmviesa004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Jan 2025 00:36:54 -0800 From: =?utf-8?q?Jouni_H=C3=B6gander?= To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: =?utf-8?q?Jouni_H=C3=B6gander?= Subject: [PATCH v2 3/9] drm/i915/psr: Split setting sff and cff bits away from intel_psr_force_update Date: Thu, 2 Jan 2025 10:36:32 +0200 Message-ID: <20250102083638.2552066-4-jouni.hogander@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250102083638.2552066-1-jouni.hogander@intel.com> References: <20250102083638.2552066-1-jouni.hogander@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" This is a clean-up and a preparation for adding own SFF and CFF registers for LunarLake onwards. Signed-off-by: Jouni Högander --- drivers/gpu/drm/i915/display/intel_psr.c | 88 +++++++++--------------- 1 file changed, 31 insertions(+), 57 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 5411d0d6f362..e6f96a8b4fb0 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -2313,15 +2313,6 @@ static u32 man_trk_ctl_continuos_full_frame(struct intel_display *display) static void intel_psr_force_update(struct intel_dp *intel_dp) { struct intel_display *display = to_intel_display(intel_dp); - enum transcoder cpu_transcoder = intel_dp->psr.transcoder; - - if (intel_dp->psr.psr2_sel_fetch_enabled) - intel_de_write(display, - PSR2_MAN_TRK_CTL(display, cpu_transcoder), - man_trk_ctl_enable_bit_get(display) | - man_trk_ctl_partial_frame_bit_get(display) | - man_trk_ctl_single_full_frame_bit_get(display) | - man_trk_ctl_continuos_full_frame(display)); /* * Display WA #0884: skl+ @@ -3119,31 +3110,31 @@ static void intel_psr_work(struct work_struct *work) mutex_unlock(&intel_dp->psr.lock); } -static void _psr_invalidate_handle(struct intel_dp *intel_dp) +static void intel_psr_configure_full_frame_update(struct intel_dp *intel_dp) { struct intel_display *display = to_intel_display(intel_dp); enum transcoder cpu_transcoder = intel_dp->psr.transcoder; - if (intel_dp->psr.psr2_sel_fetch_enabled) { - u32 val; + if (!intel_dp->psr.psr2_sel_fetch_enabled) + return; - if (intel_dp->psr.psr2_sel_fetch_cff_enabled) { - /* Send one update otherwise lag is observed in screen */ - intel_de_write(display, - CURSURFLIVE(display, intel_dp->psr.pipe), - 0); - return; + intel_de_write(display, + PSR2_MAN_TRK_CTL(display, cpu_transcoder), + man_trk_ctl_enable_bit_get(display) | + man_trk_ctl_partial_frame_bit_get(display) | + man_trk_ctl_single_full_frame_bit_get(display) | + man_trk_ctl_continuos_full_frame(display)); +} + +static void _psr_invalidate_handle(struct intel_dp *intel_dp) +{ + if (intel_dp->psr.psr2_sel_fetch_enabled) { + if (!intel_dp->psr.psr2_sel_fetch_cff_enabled) { + intel_dp->psr.psr2_sel_fetch_cff_enabled = true; + intel_psr_configure_full_frame_update(intel_dp); } - val = man_trk_ctl_enable_bit_get(display) | - man_trk_ctl_partial_frame_bit_get(display) | - man_trk_ctl_continuos_full_frame(display); - intel_de_write(display, - PSR2_MAN_TRK_CTL(display, cpu_transcoder), - val); - intel_de_write(display, - CURSURFLIVE(display, intel_dp->psr.pipe), 0); - intel_dp->psr.psr2_sel_fetch_cff_enabled = true; + intel_psr_force_update(intel_dp); } else { intel_psr_exit(intel_dp); } @@ -3224,44 +3215,27 @@ static void _psr_flush_handle(struct intel_dp *intel_dp) { struct intel_display *display = to_intel_display(intel_dp); struct drm_i915_private *dev_priv = to_i915(display->drm); - enum transcoder cpu_transcoder = intel_dp->psr.transcoder; if (intel_dp->psr.psr2_sel_fetch_enabled) { if (intel_dp->psr.psr2_sel_fetch_cff_enabled) { /* can we turn CFF off? */ - if (intel_dp->psr.busy_frontbuffer_bits == 0) { - u32 val = man_trk_ctl_enable_bit_get(display) | - man_trk_ctl_partial_frame_bit_get(display) | - man_trk_ctl_single_full_frame_bit_get(display) | - man_trk_ctl_continuos_full_frame(display); - - /* - * Set psr2_sel_fetch_cff_enabled as false to allow selective - * updates. Still keep cff bit enabled as we don't have proper - * SU configuration in case update is sent for any reason after - * sff bit gets cleared by the HW on next vblank. - */ - intel_de_write(display, - PSR2_MAN_TRK_CTL(display, cpu_transcoder), - val); - intel_de_write(display, - CURSURFLIVE(display, intel_dp->psr.pipe), - 0); + if (intel_dp->psr.busy_frontbuffer_bits == 0) intel_dp->psr.psr2_sel_fetch_cff_enabled = false; - } - } else { - /* - * continuous full frame is disabled, only a single full - * frame is required - */ - intel_psr_force_update(intel_dp); } - } else { - intel_psr_force_update(intel_dp); - if (!intel_dp->psr.active && !intel_dp->psr.busy_frontbuffer_bits) - queue_work(dev_priv->unordered_wq, &intel_dp->psr.work); + /* + * Still keep cff bit enabled as we don't have proper SU + * configuration in case update is sent for any reason after + * sff bit gets cleared by the HW on next vblank. + */ + intel_psr_configure_full_frame_update(intel_dp); } + + intel_psr_force_update(intel_dp); + + if (!intel_dp->psr.psr2_sel_fetch_enabled && !intel_dp->psr.active && + !intel_dp->psr.busy_frontbuffer_bits) + queue_work(dev_priv->unordered_wq, &intel_dp->psr.work); } /** From patchwork Thu Jan 2 08:36:33 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Hogander, Jouni" X-Patchwork-Id: 13924328 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9E542E77199 for ; Thu, 2 Jan 2025 08:36:58 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3D40010E3D2; Thu, 2 Jan 2025 08:36:58 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="P1vZr18s"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.16]) by gabe.freedesktop.org (Postfix) with ESMTPS id CB0F010E3CF; Thu, 2 Jan 2025 08:36:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1735807017; x=1767343017; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=M5l9UMthYSCFysJ9yB3yyzuZk6PSEmzJPYLdeSLG+94=; b=P1vZr18seJO4ZfWXrgSBVrV/Nf3hAWYy4hbrj77oCuiGJNsuM8EBzTZm rfq3TOrPomr63veFp3EsdEWTUZcGVT+uR1KzrPr+ADV6r8DsTX1UU75v7 HtZF3laJXcPfclk8BsFYaMbdUgnU/pb3QRHavDMembHCd7OA3UiTMtD5j i2LgUCRLVQDl1drQ6sbufDP9zGb8ahnRZbG3FvahE5a1rAT+miq1Rw8CJ aqKrBrzN10gfYgOYWS4NjVztYH7CwsoOkveznPjXCUStMcdBQkXT8s74p cSZ4PvCRqmFPY/z7fvG+mnHWc+zgW5IrbK4bd01XJZfBbtNjt+Hjd0W1j A==; X-CSE-ConnectionGUID: gBR9npbAQ7iAEnRp5LXz9A== X-CSE-MsgGUID: ufxLZ7woSiWF/B4QpzSWxw== X-IronPort-AV: E=McAfee;i="6700,10204,11302"; a="23626902" X-IronPort-AV: E=Sophos;i="6.12,284,1728975600"; d="scan'208";a="23626902" Received: from fmviesa004.fm.intel.com ([10.60.135.144]) by fmvoesa110.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Jan 2025 00:36:56 -0800 X-CSE-ConnectionGUID: dRNqsthmT7C5YBlXstNubg== X-CSE-MsgGUID: IeWNi8f+SeKmW/B4TjMgDA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,284,1728975600"; d="scan'208";a="106314143" Received: from fdefranc-mobl3.ger.corp.intel.com (HELO jhogande-mobl1..) ([10.245.245.76]) by fmviesa004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Jan 2025 00:36:55 -0800 From: =?utf-8?q?Jouni_H=C3=B6gander?= To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: =?utf-8?q?Jouni_H=C3=B6gander?= Subject: [PATCH v2 4/9] drm/i915/psr: Add register definitions for SFF_CTL and CFF_CTL registers Date: Thu, 2 Jan 2025 10:36:33 +0200 Message-ID: <20250102083638.2552066-5-jouni.hogander@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250102083638.2552066-1-jouni.hogander@intel.com> References: <20250102083638.2552066-1-jouni.hogander@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Add register definitions for SFF_CTL and CFF_CTL registers. Name them as LNL_SFF_CTL and LNL_CFF_CTL. v2: use _MMIO_TRANS instead of _MMIO_TRANS2 Signed-off-by: Jouni Högander --- drivers/gpu/drm/i915/display/intel_psr_regs.h | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_psr_regs.h b/drivers/gpu/drm/i915/display/intel_psr_regs.h index 9ad7611506e8..795e6b9cc575 100644 --- a/drivers/gpu/drm/i915/display/intel_psr_regs.h +++ b/drivers/gpu/drm/i915/display/intel_psr_regs.h @@ -251,6 +251,16 @@ #define ADLP_PSR2_MAN_TRK_CTL_SF_SINGLE_FULL_FRAME REG_BIT(14) #define ADLP_PSR2_MAN_TRK_CTL_SF_CONTINUOS_FULL_FRAME REG_BIT(13) +#define _LNL_SFF_CTL_A 0x60918 +#define _LNL_SFF_CTL_B 0x61918 +#define LNL_SFF_CTL(tran) _MMIO_TRANS(tran, _LNL_SFF_CTL_A, _LNL_SFF_CTL_B) +#define LNL_SFF_CTL_SF_SINGLE_FULL_FRAME REG_BIT(1) + +#define _LNL_CFF_CTL_A 0x6091c +#define _LNL_CFF_CTL_B 0x6191c +#define LNL_CFF_CTL(tran) _MMIO_TRANS(tran, _LNL_CFF_CTL_A, _LNL_CFF_CTL_B) +#define LNL_CFF_CTL_SF_CONTINUOUS_FULL_FRAME REG_BIT(1) + /* PSR2 Early transport */ #define _PIPE_SRCSZ_ERLY_TPT_A 0x70074 #define _PIPE_SRCSZ_ERLY_TPT_B 0x71074 From patchwork Thu Jan 2 08:36:34 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Hogander, Jouni" X-Patchwork-Id: 13924329 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E6A1FE77194 for ; Thu, 2 Jan 2025 08:36:59 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7EA0110E3D4; Thu, 2 Jan 2025 08:36:59 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="QPjEdQPC"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.16]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4102010E3D4; Thu, 2 Jan 2025 08:36:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1735807018; x=1767343018; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=ImiA70a/tCccpu9ZH6R93IWt4TV7VK59ICQr61ksgcg=; b=QPjEdQPC9x5tOx/Az57zyf6oQs5KTklyJOaWj/nOh0OEaHKyKEqwsFHt aewLvRApNsfHYF8Fq68FSS+un8hZnhfPD5W2tor2izmTB3j8NtPkWp53Q 0hb398GU00PHik3jPreZdZPpFf00dc6YDvITz/UKT4xtv4QLzSCRUTfCu oETOrbEq7i1SrqaoaGCNYoAid6yIC1uME9Frx6shboGAMypNTLawbTIHM 8aUX/RO4M+sXvU2vBPs9BMRXyUAnK3AjJa32RNruMx/YTSBDzy/pXK8n9 ENw1CNo46yErZSzOS4xeF32HOGXVdscoDNIf3/BbxmxPYVh1x613yXvbJ w==; X-CSE-ConnectionGUID: maS9JY5uQwSVWoS1dXdr9Q== X-CSE-MsgGUID: E0yVXmnLTmu3DS9PBZL33g== X-IronPort-AV: E=McAfee;i="6700,10204,11302"; a="23626906" X-IronPort-AV: E=Sophos;i="6.12,284,1728975600"; d="scan'208";a="23626906" Received: from fmviesa004.fm.intel.com ([10.60.135.144]) by fmvoesa110.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Jan 2025 00:36:58 -0800 X-CSE-ConnectionGUID: uz4Hw51HR+Sb+VHf1rZUXg== X-CSE-MsgGUID: 1B1EuzxhRi+j1h3RfNLIvQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,284,1728975600"; d="scan'208";a="106314148" Received: from fdefranc-mobl3.ger.corp.intel.com (HELO jhogande-mobl1..) ([10.245.245.76]) by fmviesa004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Jan 2025 00:36:57 -0800 From: =?utf-8?q?Jouni_H=C3=B6gander?= To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: =?utf-8?q?Jouni_H=C3=B6gander?= Subject: [PATCH v2 5/9] drm/i915/psr: Use SFF_CTL on invalidate/flush for LunarLake onwards Date: Thu, 2 Jan 2025 10:36:34 +0200 Message-ID: <20250102083638.2552066-6-jouni.hogander@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250102083638.2552066-1-jouni.hogander@intel.com> References: <20250102083638.2552066-1-jouni.hogander@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" In LunarLake we have SFF_CTL register which contains SFF bit ored with respective SFF bit in PSR2_MAN_TRK_CTL register. Use this register instead of the bit in PSR2_MAN_TRK_CTL on frontbuffer tracking callbacks. This helps us avoiding taking psr mutex when performing atomic commit. We don't need to set the CFF bit as selective update configuration in PSR2_MAN_TRL_CTL is not overwritten anymore. I.e. we have valid configuration in PSR2_MAN_TRK_CTL and in plane SEL_FETCH_* registers when SFF bit gets cleared by the HW in case something triggers "frame change" event after SFF bit is cleared. Signed-off-by: Jouni Högander --- drivers/gpu/drm/i915/display/intel_psr.c | 22 +++++++++++++++------- 1 file changed, 15 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index e6f96a8b4fb0..85ecedd3162d 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -2345,7 +2345,7 @@ void intel_psr2_program_trans_man_trk_ctl(const struct intel_crtc_state *crtc_st struct intel_dp *intel_dp = enc_to_intel_dp(encoder); lockdep_assert_held(&intel_dp->psr.lock); - if (intel_dp->psr.psr2_sel_fetch_cff_enabled) + if (DISPLAY_VER(display) < 20 && intel_dp->psr.psr2_sel_fetch_cff_enabled) return; break; } @@ -3118,12 +3118,16 @@ static void intel_psr_configure_full_frame_update(struct intel_dp *intel_dp) if (!intel_dp->psr.psr2_sel_fetch_enabled) return; - intel_de_write(display, - PSR2_MAN_TRK_CTL(display, cpu_transcoder), - man_trk_ctl_enable_bit_get(display) | - man_trk_ctl_partial_frame_bit_get(display) | - man_trk_ctl_single_full_frame_bit_get(display) | - man_trk_ctl_continuos_full_frame(display)); + if (DISPLAY_VER(display) >= 20) + intel_de_write(display, LNL_SFF_CTL(cpu_transcoder), + LNL_SFF_CTL_SF_SINGLE_FULL_FRAME); + else + intel_de_write(display, + PSR2_MAN_TRK_CTL(display, cpu_transcoder), + man_trk_ctl_enable_bit_get(display) | + man_trk_ctl_partial_frame_bit_get(display) | + man_trk_ctl_single_full_frame_bit_get(display) | + man_trk_ctl_continuos_full_frame(display)); } static void _psr_invalidate_handle(struct intel_dp *intel_dp) @@ -3227,6 +3231,10 @@ static void _psr_flush_handle(struct intel_dp *intel_dp) * Still keep cff bit enabled as we don't have proper SU * configuration in case update is sent for any reason after * sff bit gets cleared by the HW on next vblank. + * + * NOTE: Setting cff bit is not needed for LunarLake onwards as + * we have own register for SFF bit and we are not overwriting + * existing SU configuration */ intel_psr_configure_full_frame_update(intel_dp); } From patchwork Thu Jan 2 08:36:35 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Hogander, Jouni" X-Patchwork-Id: 13924330 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1E8D8E77188 for ; Thu, 2 Jan 2025 08:37:01 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B76AD10E3D3; Thu, 2 Jan 2025 08:37:00 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="LZLqkMNZ"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.16]) by gabe.freedesktop.org (Postfix) with ESMTPS id A253210E3D5; Thu, 2 Jan 2025 08:36:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1735807019; x=1767343019; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=xdm9gPmQtS8H5ujYzJccqaq8hK6irbrpo6YMacpNjlg=; b=LZLqkMNZZVBaDWAk6mh6+HcbxUZpniUzMhHeXMIe5l55zxIj49BuUD1t kWAAHIT+xtTKfBWPtZqG+edJQDH1rP/G+R2ONRnawvY2JkFgQgJq/yEwy bv0O9z3M85DyA+YPHxp4oYiUGtUfEG9NmSvRXL+afWXuZMZogFh2CxZM5 VrQcTsQJUn9Fx9dpj99Hf8L3V4s9psnKCJBYBFj5eSVeoTzKVfuSXLaj3 uXxS35TAJRkcMgKZvWlLCyMAVlNM21pOyz2dpSD19zNZUNxmwz5mplbC9 rC3W2LSIXEC65hlvfjndDTgpgY8TOQBWcoWBrU53jWmZt4rDY6ptk2y70 g==; X-CSE-ConnectionGUID: Egz1mb75Sl+q/JqGcTw+wg== X-CSE-MsgGUID: /cq691DiQ5SRXlrtSc/c6w== X-IronPort-AV: E=McAfee;i="6700,10204,11302"; a="23626910" X-IronPort-AV: E=Sophos;i="6.12,284,1728975600"; d="scan'208";a="23626910" Received: from fmviesa004.fm.intel.com ([10.60.135.144]) by fmvoesa110.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Jan 2025 00:36:59 -0800 X-CSE-ConnectionGUID: ta4sLD6rTAq4HueRo9//4w== X-CSE-MsgGUID: W9aQxtzZTqebMlGrgtUulw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,284,1728975600"; d="scan'208";a="106314154" Received: from fdefranc-mobl3.ger.corp.intel.com (HELO jhogande-mobl1..) ([10.245.245.76]) by fmviesa004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Jan 2025 00:36:58 -0800 From: =?utf-8?q?Jouni_H=C3=B6gander?= To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: =?utf-8?q?Jouni_H=C3=B6gander?= Subject: [PATCH v2 6/9] drm/i915/psr: Allow writing PSR2_MAN_TRK_CTL using DSB Date: Thu, 2 Jan 2025 10:36:35 +0200 Message-ID: <20250102083638.2552066-7-jouni.hogander@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250102083638.2552066-1-jouni.hogander@intel.com> References: <20250102083638.2552066-1-jouni.hogander@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Allow writing PSR2_MAN_TRK_CTL using DSB by using intel_de_write_dsb. Do not check intel_dp->psr.lock being held when using DSB. This assertion doesn't make sense as in case of using DSB the actual write happens later and we are not taking intel_dp->psr.lock mutex over dsb commit. Signed-off-by: Jouni Högander --- drivers/gpu/drm/i915/display/intel_display.c | 2 +- drivers/gpu/drm/i915/display/intel_psr.c | 16 ++++++++++------ drivers/gpu/drm/i915/display/intel_psr.h | 4 +++- 3 files changed, 14 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 4271da219b41..5a5100f147a6 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -7089,7 +7089,7 @@ static void commit_pipe_pre_planes(struct intel_atomic_state *state, intel_pipe_fastset(old_crtc_state, new_crtc_state); } - intel_psr2_program_trans_man_trk_ctl(new_crtc_state); + intel_psr2_program_trans_man_trk_ctl(NULL, new_crtc_state); intel_atomic_update_watermarks(state, crtc); } diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 85ecedd3162d..1e99329b70a1 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -2330,7 +2330,8 @@ static void intel_psr_force_update(struct intel_dp *intel_dp) intel_de_write(display, CURSURFLIVE(display, intel_dp->psr.pipe), 0); } -void intel_psr2_program_trans_man_trk_ctl(const struct intel_crtc_state *crtc_state) +void intel_psr2_program_trans_man_trk_ctl(struct intel_dsb *dsb, + const struct intel_crtc_state *crtc_state) { struct intel_display *display = to_intel_display(crtc_state); struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); @@ -2344,20 +2345,23 @@ void intel_psr2_program_trans_man_trk_ctl(const struct intel_crtc_state *crtc_st crtc_state->uapi.encoder_mask) { struct intel_dp *intel_dp = enc_to_intel_dp(encoder); - lockdep_assert_held(&intel_dp->psr.lock); + if (!dsb) + lockdep_assert_held(&intel_dp->psr.lock); + if (DISPLAY_VER(display) < 20 && intel_dp->psr.psr2_sel_fetch_cff_enabled) return; break; } - intel_de_write(display, PSR2_MAN_TRK_CTL(display, cpu_transcoder), - crtc_state->psr2_man_track_ctl); + intel_de_write_dsb(display, dsb, + PSR2_MAN_TRK_CTL(display, cpu_transcoder), + crtc_state->psr2_man_track_ctl); if (!crtc_state->enable_psr2_su_region_et) return; - intel_de_write(display, PIPE_SRCSZ_ERLY_TPT(crtc->pipe), - crtc_state->pipe_srcsz_early_tpt); + intel_de_write_dsb(display, dsb, PIPE_SRCSZ_ERLY_TPT(crtc->pipe), + crtc_state->pipe_srcsz_early_tpt); } static void psr2_man_trk_ctl_calc(struct intel_crtc_state *crtc_state, diff --git a/drivers/gpu/drm/i915/display/intel_psr.h b/drivers/gpu/drm/i915/display/intel_psr.h index 956be263c09e..fc807817863e 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.h +++ b/drivers/gpu/drm/i915/display/intel_psr.h @@ -17,6 +17,7 @@ struct intel_crtc; struct intel_crtc_state; struct intel_display; struct intel_dp; +struct intel_dsb; struct intel_encoder; struct intel_plane; struct intel_plane_state; @@ -55,7 +56,8 @@ void intel_psr_wait_for_idle_locked(const struct intel_crtc_state *new_crtc_stat bool intel_psr_enabled(struct intel_dp *intel_dp); int intel_psr2_sel_fetch_update(struct intel_atomic_state *state, struct intel_crtc *crtc); -void intel_psr2_program_trans_man_trk_ctl(const struct intel_crtc_state *crtc_state); +void intel_psr2_program_trans_man_trk_ctl(struct intel_dsb *dsb, + const struct intel_crtc_state *crtc_state); void intel_psr_pause(struct intel_dp *intel_dp); void intel_psr_resume(struct intel_dp *intel_dp); bool intel_psr_needs_block_dc_vblank(const struct intel_crtc_state *crtc_state); From patchwork Thu Jan 2 08:36:36 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Hogander, Jouni" X-Patchwork-Id: 13924331 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D87BBE7718B for ; Thu, 2 Jan 2025 08:37:02 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 726D310E3D5; Thu, 2 Jan 2025 08:37:02 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; 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([10.245.245.76]) by fmviesa004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Jan 2025 00:36:59 -0800 From: =?utf-8?q?Jouni_H=C3=B6gander?= To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: =?utf-8?q?Jouni_H=C3=B6gander?= Subject: [PATCH v2 7/9] drm/i915/psr: Changes for PSR2_MAN_TRK_CTL handling when DSB is in use Date: Thu, 2 Jan 2025 10:36:36 +0200 Message-ID: <20250102083638.2552066-8-jouni.hogander@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250102083638.2552066-1-jouni.hogander@intel.com> References: <20250102083638.2552066-1-jouni.hogander@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Do needed changes to handle PSR2_MAN_TRK_CTL correctly when DSB is in use: 1. Write PSR2_MAN_TRK_CTL in commit_pipe_pre_planes only when not using DSB. 2. Add PSR2_MAN_TRK_CTL writing into DSB commit in intel_atomic_dsb_finish. Taking PSR lock over DSB commit is not needed because PSR2_MAN_TRK_CTL is now written only by DSB. Signed-off-by: Jouni Högander --- drivers/gpu/drm/i915/display/intel_display.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 5a5100f147a6..d76454a69399 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -7089,7 +7089,8 @@ static void commit_pipe_pre_planes(struct intel_atomic_state *state, intel_pipe_fastset(old_crtc_state, new_crtc_state); } - intel_psr2_program_trans_man_trk_ctl(NULL, new_crtc_state); + if (!new_crtc_state->use_dsb) + intel_psr2_program_trans_man_trk_ctl(NULL, new_crtc_state); intel_atomic_update_watermarks(state, crtc); } @@ -7678,6 +7679,8 @@ static void intel_atomic_dsb_finish(struct intel_atomic_state *state, new_crtc_state); bdw_set_pipe_misc(new_crtc_state->dsb_commit, new_crtc_state); + intel_psr2_program_trans_man_trk_ctl(new_crtc_state->dsb_commit, + new_crtc_state); intel_crtc_planes_update_arm(new_crtc_state->dsb_commit, state, crtc); From patchwork Thu Jan 2 08:36:37 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Hogander, Jouni" X-Patchwork-Id: 13924332 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D951DE77194 for ; Thu, 2 Jan 2025 08:37:03 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7E33F10E3D8; Thu, 2 Jan 2025 08:37:03 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="PsolfUv3"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.16]) by gabe.freedesktop.org (Postfix) with ESMTPS id 80D4F10E3DC; Thu, 2 Jan 2025 08:37:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1735807022; x=1767343022; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=VONhs4NwRRa46JdiIlc3POgci7bRLdEcrX76sWaWxsQ=; b=PsolfUv3cFF2EcnLOdrgd9Xr+edttK/uMKULpj2I7/c1I3n9uwUpCXP0 PDtsWJnckSSsUsWtymlz2HOA23bj1lOmQ7sHJyPEiX21azDgPVpRZnaiL hX6l8Rw2LjynivwsehyKQ9fjxhBntDz35dkGepPkcxKxU7EQRrzJfB230 Aki1X5bV0Knqq51gAvBdUoXqd7Rj4n5YruZqVCB6LrrsXCYGSh4jxHDTu V0M66nU18WM9G4LqAu/9gjgk/gZBJhazDdcuJ0Z9ozNa3A1E8lZIlcTK0 OeVe45lXtDpCOgd36uoV+ryh+2za+oQ3dX51Pn7XWnk3IWRK8cor+wbzP g==; X-CSE-ConnectionGUID: aHhyK9b/Sdi7zsomDAoAMg== X-CSE-MsgGUID: ditnGghxQx6ZgCcf5rk9tA== X-IronPort-AV: E=McAfee;i="6700,10204,11302"; a="23626918" X-IronPort-AV: E=Sophos;i="6.12,284,1728975600"; d="scan'208";a="23626918" Received: from fmviesa004.fm.intel.com ([10.60.135.144]) by fmvoesa110.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Jan 2025 00:37:02 -0800 X-CSE-ConnectionGUID: Bt7CWzLlQ3mrGKP5i7uNAA== X-CSE-MsgGUID: PC301lcJSlqKj0Cgs2eWag== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,284,1728975600"; d="scan'208";a="106314163" Received: from fdefranc-mobl3.ger.corp.intel.com (HELO jhogande-mobl1..) ([10.245.245.76]) by fmviesa004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Jan 2025 00:37:01 -0800 From: =?utf-8?q?Jouni_H=C3=B6gander?= To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: =?utf-8?q?Jouni_H=C3=B6gander?= Subject: [PATCH v2 8/9] drm/i915/psr: Remove DSB_SKIP_WAITS_EN chicken bit Date: Thu, 2 Jan 2025 10:36:37 +0200 Message-ID: <20250102083638.2552066-9-jouni.hogander@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250102083638.2552066-1-jouni.hogander@intel.com> References: <20250102083638.2552066-1-jouni.hogander@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" We have different approach on how flip is considered being complete. We are waiting for vblank on DSB and generate interrupt when it happens and this interrupt is considered as indication of completion -> we definitely do not want to skip vblank wait. Also not skipping scanline wait shouldn't cause any problems if we are in DEEP_SLEEP PIPEDSL register is returning 0 -> evasion does nothing and if we are not in DEEP_SLEEP evasion works same way as without PSR. Signed-off-by: Jouni Högander --- drivers/gpu/drm/i915/display/intel_dsb.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c b/drivers/gpu/drm/i915/display/intel_dsb.c index e6f8fc743fb4..8b7438032878 100644 --- a/drivers/gpu/drm/i915/display/intel_dsb.c +++ b/drivers/gpu/drm/i915/display/intel_dsb.c @@ -177,13 +177,12 @@ static u32 dsb_chicken(struct intel_atomic_state *state, struct intel_crtc *crtc) { if (pre_commit_is_vrr_active(state, crtc)) - return DSB_SKIP_WAITS_EN | - DSB_CTRL_WAIT_SAFE_WINDOW | + return DSB_CTRL_WAIT_SAFE_WINDOW | DSB_CTRL_NO_WAIT_VBLANK | DSB_INST_WAIT_SAFE_WINDOW | DSB_INST_NO_WAIT_VBLANK; else - return DSB_SKIP_WAITS_EN; + return 0; } static bool assert_dsb_has_room(struct intel_dsb *dsb) From patchwork Thu Jan 2 08:36:38 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Hogander, Jouni" X-Patchwork-Id: 13924333 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2C605E77194 for ; Thu, 2 Jan 2025 08:37:06 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C4A2110E3B6; Thu, 2 Jan 2025 08:37:05 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="S26KKA97"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.16]) by gabe.freedesktop.org (Postfix) with ESMTPS id E66D510E3DD; Thu, 2 Jan 2025 08:37:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1735807024; x=1767343024; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=v1QFL6o5Li7q5MODzqdjMS4Em47Rwg31qz4uxz00Bjs=; b=S26KKA97oKfweE63fre8Vpz/DU7d9xASKr7IZyVaxiJUtDRD1Vi1sETw qJL9jRkcufcZqRjcBly56p6r9Hp5bIbTzDQRsf4v6BUys/hG9h0N2I1n+ UQPpNerdPjjsbZNtk0bvAPG/t1bkutg2rnGFyYaTVv73MnbTe61piw48c Mz0Gjuqr+0cF76B4O8TgKied89T3VI4R+K1fj2CcKG/EpGmcNs+jDkmJf pFYoCxwkecMdEeC/12XgkCgblFYrgkT8atODaFXMTg1q/AbAPhTh7besR j5Ni6CWk8jlV5e9Jsj+Ua4EXI1Z0D9ec1nVeWTkV8h7hiJUJlVJAu+Udb A==; X-CSE-ConnectionGUID: xwnK6cRJQ/2rKAPNbNqZOg== X-CSE-MsgGUID: 6PmIrRHDTEyZKjAOoScKGA== X-IronPort-AV: E=McAfee;i="6700,10204,11302"; a="23626921" X-IronPort-AV: E=Sophos;i="6.12,284,1728975600"; d="scan'208";a="23626921" Received: from fmviesa004.fm.intel.com ([10.60.135.144]) by fmvoesa110.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Jan 2025 00:37:03 -0800 X-CSE-ConnectionGUID: 9ZgeEs4yQcSulCqcYeadbw== X-CSE-MsgGUID: +gQFzsFKQGqHMTmPHkKdeg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,284,1728975600"; d="scan'208";a="106314169" Received: from fdefranc-mobl3.ger.corp.intel.com (HELO jhogande-mobl1..) ([10.245.245.76]) by fmviesa004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Jan 2025 00:37:02 -0800 From: =?utf-8?q?Jouni_H=C3=B6gander?= To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: =?utf-8?q?Jouni_H=C3=B6gander?= Subject: [PATCH v2 9/9] drm/i915/psr: Allow DSB usage when PSR is enabled Date: Thu, 2 Jan 2025 10:36:38 +0200 Message-ID: <20250102083638.2552066-10-jouni.hogander@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250102083638.2552066-1-jouni.hogander@intel.com> References: <20250102083638.2552066-1-jouni.hogander@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Now as we have correct PSR2_MAN_TRK_CTL handling in place we can allow DSB usage also when PSR is enabled for LunarLake onwards. Signed-off-by: Jouni Högander --- drivers/gpu/drm/i915/display/intel_display.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index d76454a69399..8ea56bba9deb 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -7631,6 +7631,7 @@ static void intel_atomic_dsb_finish(struct intel_atomic_state *state, intel_atomic_get_old_crtc_state(state, crtc); struct intel_crtc_state *new_crtc_state = intel_atomic_get_new_crtc_state(state, crtc); + struct intel_display *display = to_intel_display(crtc); if (!new_crtc_state->hw.active) return; @@ -7643,7 +7644,7 @@ static void intel_atomic_dsb_finish(struct intel_atomic_state *state, new_crtc_state->update_planes && !new_crtc_state->vrr.enable && !new_crtc_state->do_async_flip && - !new_crtc_state->has_psr && + (DISPLAY_VER(display) >= 20 || !new_crtc_state->has_psr) && !new_crtc_state->scaler_state.scaler_users && !old_crtc_state->scaler_state.scaler_users && !intel_crtc_needs_modeset(new_crtc_state) &&