From patchwork Wed Jan 8 12:49:33 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Stephan X-Patchwork-Id: 13930878 Received: from mail-wm1-f51.google.com (mail-wm1-f51.google.com [209.85.128.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9FD331FBC84 for ; Wed, 8 Jan 2025 12:49:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.51 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736340588; cv=none; b=On3oeixgmxKE+TDC3QZKJQut1UDq2+sxbu5j71jSWPRK/719HiSa8iftxGMFvKu78Q6tFV4lbt8K7qnDDxHcir5kzggPUfJDHXpdTcw8Kg8nMUGyi8xucbH6pCmSdJzPeKPFMH99Y6b4JrJgj2w1Yp1JSud5xqpOpRgk27jNxf8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736340588; c=relaxed/simple; bh=eSSplP/3FY91YR2XwZTXJZ2Ax/rrzWeyNFYg2OhghvI=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=PmTcZYatEqlg00eAfV7BQBsZKIa/qbx/Bu5mOCiUFP/l/lb9Q7jbTA0mKfEZ3KpoalBL59eMiLRqb1sD8jDbK9lVqEi1Lbgku1VEG3tP1hxsi+FJ/UPP7tERBJYa9XXBfUKkbi3yEzMoluqipBjS+XJWZYmlUrF495KQZBgPPSk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com; spf=pass smtp.mailfrom=baylibre.com; dkim=pass (2048-bit key) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.b=dvn7uwRk; arc=none smtp.client-ip=209.85.128.51 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=baylibre.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.b="dvn7uwRk" Received: by mail-wm1-f51.google.com with SMTP id 5b1f17b1804b1-436637e8c8dso169109945e9.1 for ; Wed, 08 Jan 2025 04:49:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20230601.gappssmtp.com; s=20230601; t=1736340584; x=1736945384; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=hZ+/3KnECndMbh/2k2JKBTk8y/NjC4Kknkr3b9iFCA8=; b=dvn7uwRkNBlbrm7t5WMPyNCh8r8y5JplJKUUuRxEd/0jeXv3Yw6waACxC4KodA8mbQ 5kBFlBfl7N7V7PwjiexNdMcevr09LYKumWCzVDqQSjh5ZJm1QeJF0BJF5pNe9rPfuDzG 9YRCxWi7InnvjkismSkIenjoJPbs0fDiANRu064WGTl+xp19MG9lnhbCCRaw4BHRIauk JoIeTOew6TeNTmJSgUeK1qBNp/NM/ZmG+CznE/H7dN9UbYeJVFKsPRgC4zz5YKoQPxFj qmltgVDeNmy01Jg0i8yv8PWHnjBas/tc1JU9g3WhaK5qmp6vBRg7woeGh7uV4qPnLvai pvMA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1736340584; x=1736945384; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=hZ+/3KnECndMbh/2k2JKBTk8y/NjC4Kknkr3b9iFCA8=; b=Iv/tQIj7HjZf6/H001ehyuPFK6Pe+VnMGXspsNCb0HSGY3AZAwou/YAGRdN5Huupo1 RmOrOG5dtBwUM0eXdviDcJ2mIXiBHKv1arcRdNSOk8Yakmi5G0sYEMcaMQAIFrQCPOCT 7qP65Or84CNCjPiDgyAoxI61ruqxcAA8UJCxheswI273U2PaYfFUx738+P/l+v7WXWPE Wnd63NV85XIw2AdjZAnSp3b4Fo9jFvxHbGkR3uraF58H/aCey2/heB98s5kLyS0Psg1V rIOkLZT03oGUYobsAUuUp/Nz+rNW9+ySqcVnySd3DU2d4oOAj68Vo34rFKFLBBGnabNr PYsw== X-Gm-Message-State: AOJu0YzOfQ/qBRW2pDF3I68V13+WcZE+EtLC5SSG+Bqc0NJlOIpwIo/n Wd7oGGymwgv9Nb2uHM7wtuzm1K2hZu/1AEttsvsq9y9sRHS3IC4aHvBydhzdmdI= X-Gm-Gg: ASbGncuTIIvGVnZCzleZkCh9BKdoWJkc4l8hjaCginnyDMBgOQmWYChdnxFrImF9O8c U1WgjkaHTv5bR/5EHPU9IoEtYk+ws05oif1byVRYqhdbX8pkhlv7I3w/bgSK8aIa/xZdJW6cdcF tDETbgmMmLRMtplimkfZSwIVHZOxPjp99phuEmMEaPLG2zekKItJyN9CDoHInOG/DX0N1wJ2zC9 pdIy1Go9wtB9gavvPQNDa5DMeVqkSuYzeFqADvoVhplosQPuLEFmjNYHm2qZ32F/W2smcKCO5UP 4Ath1hD5yw81MFwXqIcVhHsWEpK3jN+ntz5aYU/oMacwtSK3IEZJcA== X-Google-Smtp-Source: AGHT+IFwg1bUjwoBd62t98tnLRpUy/beIfCq9zQ1+vKCDUuQw6Mu2z2Mkl61UbqKFZAX4gLat0B9/A== X-Received: by 2002:a05:600c:5251:b0:434:f4f9:8104 with SMTP id 5b1f17b1804b1-436e2700050mr19531555e9.33.1736340583659; Wed, 08 Jan 2025 04:49:43 -0800 (PST) Received: from jstephan-bl.local (2a02-842a-d52e-6101-6fd0-06c4-5d68-f0a5.rev.sfr.net. [2a02:842a:d52e:6101:6fd0:6c4:5d68:f0a5]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-436e2da63eesm19846805e9.3.2025.01.08.04.49.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Jan 2025 04:49:43 -0800 (PST) From: Julien Stephan Date: Wed, 08 Jan 2025 13:49:33 +0100 Subject: [PATCH v4 1/5] iio: adc: ad7380: do not use iio_device_claim_direct_scoped anymore Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250108-ad7380-add-alert-support-v4-1-1751802471ba@baylibre.com> References: <20250108-ad7380-add-alert-support-v4-0-1751802471ba@baylibre.com> In-Reply-To: <20250108-ad7380-add-alert-support-v4-0-1751802471ba@baylibre.com> To: Lars-Peter Clausen , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , David Lechner , Jonathan Cameron , Jonathan Corbet Cc: linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Julien Stephan X-Mailer: b4 0.14.2 Conditionnal scoped handlers are turning out to be a real pain: readability issues, compiler and linker handling issues among others so rollback and remove the scoped version of iio_dvice_claim_direct_mode. To impove code readability factorize code to set oversampling ratio. Signed-off-by: Julien Stephan --- drivers/iio/adc/ad7380.c | 110 +++++++++++++++++++++++++++++------------------ 1 file changed, 67 insertions(+), 43 deletions(-) diff --git a/drivers/iio/adc/ad7380.c b/drivers/iio/adc/ad7380.c index 4f32cb22f140442b831dc9a4f275e88e4ab2388e..bc7d58850a3e2a84a241d81377e3dc14c43fc101 100644 --- a/drivers/iio/adc/ad7380.c +++ b/drivers/iio/adc/ad7380.c @@ -675,15 +675,21 @@ static const struct regmap_config ad7380_regmap_config = { static int ad7380_debugfs_reg_access(struct iio_dev *indio_dev, u32 reg, u32 writeval, u32 *readval) { - iio_device_claim_direct_scoped(return -EBUSY, indio_dev) { - struct ad7380_state *st = iio_priv(indio_dev); + struct ad7380_state *st = iio_priv(indio_dev); + int ret; - if (readval) - return regmap_read(st->regmap, reg, readval); - else - return regmap_write(st->regmap, reg, writeval); - } - unreachable(); + ret = iio_device_claim_direct_mode(indio_dev); + if (ret) + return ret; + + if (readval) + ret = regmap_read(st->regmap, reg, readval); + else + ret = regmap_write(st->regmap, reg, writeval); + + iio_device_release_direct_mode(indio_dev); + + return ret; } /* @@ -920,6 +926,7 @@ static int ad7380_read_raw(struct iio_dev *indio_dev, { struct ad7380_state *st = iio_priv(indio_dev); const struct iio_scan_type *scan_type; + int ret; scan_type = iio_get_current_scan_type(indio_dev, chan); @@ -928,11 +935,16 @@ static int ad7380_read_raw(struct iio_dev *indio_dev, switch (info) { case IIO_CHAN_INFO_RAW: - iio_device_claim_direct_scoped(return -EBUSY, indio_dev) { - return ad7380_read_direct(st, chan->scan_index, - scan_type, val); - } - unreachable(); + ret = iio_device_claim_direct_mode(indio_dev); + if (ret) + return ret; + + ret = ad7380_read_direct(st, chan->scan_index, + scan_type, val); + + iio_device_release_direct_mode(indio_dev); + + return ret; case IIO_CHAN_INFO_SCALE: /* * According to the datasheet, the LSB size is: @@ -1008,47 +1020,59 @@ static int ad7380_osr_to_regval(int ratio) return -EINVAL; } +static int ad7380_set_oversampling_ratio(struct ad7380_state *st, int val) +{ + int ret, osr, boost; + + osr = ad7380_osr_to_regval(val); + if (osr < 0) + return osr; + + /* always enable resolution boost when oversampling is enabled */ + boost = osr > 0 ? 1 : 0; + + ret = regmap_update_bits(st->regmap, + AD7380_REG_ADDR_CONFIG1, + AD7380_CONFIG1_OSR | AD7380_CONFIG1_RES, + FIELD_PREP(AD7380_CONFIG1_OSR, osr) | + FIELD_PREP(AD7380_CONFIG1_RES, boost)); + + if (ret) + return ret; + + st->oversampling_ratio = val; + st->resolution_boost_enabled = boost; + + /* + * Perform a soft reset. This will flush the oversampling + * block and FIFO but will maintain the content of the + * configurable registers. + */ + ret = regmap_update_bits(st->regmap, + AD7380_REG_ADDR_CONFIG2, + AD7380_CONFIG2_RESET, + FIELD_PREP(AD7380_CONFIG2_RESET, + AD7380_CONFIG2_RESET_SOFT)); + return ret; +} static int ad7380_write_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int val, int val2, long mask) { struct ad7380_state *st = iio_priv(indio_dev); - int ret, osr, boost; + int ret; switch (mask) { case IIO_CHAN_INFO_OVERSAMPLING_RATIO: - osr = ad7380_osr_to_regval(val); - if (osr < 0) - return osr; + ret = iio_device_claim_direct_mode(indio_dev); + if (ret) + return ret; - /* always enable resolution boost when oversampling is enabled */ - boost = osr > 0 ? 1 : 0; + ret = ad7380_set_oversampling_ratio(st, val); - iio_device_claim_direct_scoped(return -EBUSY, indio_dev) { - ret = regmap_update_bits(st->regmap, - AD7380_REG_ADDR_CONFIG1, - AD7380_CONFIG1_OSR | AD7380_CONFIG1_RES, - FIELD_PREP(AD7380_CONFIG1_OSR, osr) | - FIELD_PREP(AD7380_CONFIG1_RES, boost)); + iio_device_release_direct_mode(indio_dev); - if (ret) - return ret; - - st->oversampling_ratio = val; - st->resolution_boost_enabled = boost; - - /* - * Perform a soft reset. This will flush the oversampling - * block and FIFO but will maintain the content of the - * configurable registers. - */ - return regmap_update_bits(st->regmap, - AD7380_REG_ADDR_CONFIG2, - AD7380_CONFIG2_RESET, - FIELD_PREP(AD7380_CONFIG2_RESET, - AD7380_CONFIG2_RESET_SOFT)); - } - unreachable(); + return ret; default: return -EINVAL; } From patchwork Wed Jan 8 12:49:34 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Stephan X-Patchwork-Id: 13930879 Received: from mail-wr1-f41.google.com (mail-wr1-f41.google.com [209.85.221.41]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 777071FBC8C for ; Wed, 8 Jan 2025 12:49:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.41 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736340589; cv=none; b=Ie3C3AZ18dcN98byRVN4NcMaVwKZyXtUrKTYgURyIe+nqEKQQ2OlZw6Fncw6njgl6yrlvF9UcFKWLTLd+S5bwCKxLMr0mCTXlfMMsCsQ8eLTy+AIlqmtY4oIM9/xkV+g6oBm6nnL5az6UVbaQly43Zg1s69HWkXyYakpxcw0qPY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736340589; c=relaxed/simple; bh=JiKbZ9Dc0gtggUQQiZa957Mbp+mx1KjmP3cEz6HLKJw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=NGWJFDVVDnJiRT/rSJTMFQsWKAnqWUVDNYY8VnTNgbAVbOAeSIoRzgihpr5ZYQeY53fIQTYSUI5zilwfw1wBarf37pljEIA7vspaW8iVUim+M3hrXQVqYsKmg7/VhzjXBniUBUuvmXHi1fa6+0JlLq16rH/Dz+HHQyi+PBU6BlU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com; spf=pass smtp.mailfrom=baylibre.com; dkim=pass (2048-bit key) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.b=V1ji1sbT; arc=none smtp.client-ip=209.85.221.41 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=baylibre.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.b="V1ji1sbT" Received: by mail-wr1-f41.google.com with SMTP id ffacd0b85a97d-38a25d4b9d4so6393869f8f.0 for ; Wed, 08 Jan 2025 04:49:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20230601.gappssmtp.com; s=20230601; t=1736340585; x=1736945385; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=gpTEVIUx2zsR6KrubLLJzhSMtP7WWrv/YPCN+rrmWfE=; b=V1ji1sbT7uWp1qrT4j2zGjg6L/9duvaEvyOxzlgOzLcOwi+2Fj0Ydgwt7zFTkbIJ2W 9FtCY4hNFke058XvGBVABecSG0n9EU/oSSO93JK9ZqqMRNm1sgD2DoVLrGWBnZiEN0go Eoi555EqOe8ey5uTmzdNvHI/KxZ0ZFwqp3IdZNoX1go4y/c19+YTsIt65tLK5Fq3DzFj dSsdTu96wscA5USTLlZhSOhCjRvC9Hr1MFuWBiTRsp5uETcqduvgw+RV/lb6rclz1KWT 2F3BFosXZjSs+s5rNzyUqSImLdy0fOYbWZ09JrtBln7+KUvlDC8ZhZsiOO85yV9L/QEh eEcQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1736340585; x=1736945385; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=gpTEVIUx2zsR6KrubLLJzhSMtP7WWrv/YPCN+rrmWfE=; b=OSMz4/Q9m105DDK99/dWlzBq+6o2P/NtsG5wzLEyXddERIIxGpxoEU4FImbZQ2adlg hdZW3BPaVCbfTw4QoYVfERkYQ9NOV/4SGuPEmUpzqPVwbdb+jB652Vg2VSovhPO2F5hv UAVnjfQSaS8EM4k9SC73OPRT28jrvMKsgOmvGRZQam/GLTW9oXI96jlZfWnlgys2Ixhx Y6iz5Hs76LozTFndSGfbL6YlWzTn1AfOTxHK3XJrnlnPPnwRApQkjuN9t51aDxo0cx0T mCZLYCSx24zlychJ8UYUFS1Kpqnxsz72ah1mQY78l0vyWxLlhbWdjS0ZVrFH1nuL/RAQ I28Q== X-Gm-Message-State: AOJu0YxpvuAb4SEGDxovapfQ52LY/y0IIjV1OCqZT+bUNFs9clDSASQN LOdyv3mq5g3REs4fWhrKUMFZJ0qifzBqDG4dnk7Zfy0obdLMcgAKZIlVQXCnxNI= X-Gm-Gg: ASbGnct5FORT+fWQbP6UuIdbwlfrDn787RrEHlGBUlznYitbSOKIPFzWtumRLWoACYU MJ12iR8PeQhY9rQCuftMXdH8C8iFAkbVFGdkNoixmNRB/baNQWc6oOrLgz3e5uusSMD+9RzgkZK gCdMDkJfNr7Hz2onB1RsDpu2bCT9vIHqPMxGP8S+tYMxjvcoBFP29LEvJW4lOVLRVq0+yVtdL/i w5B6s1Kte+6rkeow2ckrsAKI93wsTNO/JFJT/QjlCwEJhZ49dyXzD8m1EX1HjqxJa2ZwWnj2mNc ExhQab0e7yaC/cV3WhddnkFE75zdjYTRHvztjTVpYF+g9YxWajEZyQ== X-Google-Smtp-Source: AGHT+IHvoSPBsQF/zm7w0rdXalA6GzUY9WExMWrYVqa4uKyDTat1oJdLA0hTNsE97vT1IdC9ulsKTg== X-Received: by 2002:a05:6000:186d:b0:38a:20d9:32e6 with SMTP id ffacd0b85a97d-38a87308c4bmr2326100f8f.45.1736340584729; Wed, 08 Jan 2025 04:49:44 -0800 (PST) Received: from jstephan-bl.local (2a02-842a-d52e-6101-6fd0-06c4-5d68-f0a5.rev.sfr.net. [2a02:842a:d52e:6101:6fd0:6c4:5d68:f0a5]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-436e2da63eesm19846805e9.3.2025.01.08.04.49.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Jan 2025 04:49:44 -0800 (PST) From: Julien Stephan Date: Wed, 08 Jan 2025 13:49:34 +0100 Subject: [PATCH v4 2/5] iio: adc: ad7380: enable regmap cache Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250108-ad7380-add-alert-support-v4-2-1751802471ba@baylibre.com> References: <20250108-ad7380-add-alert-support-v4-0-1751802471ba@baylibre.com> In-Reply-To: <20250108-ad7380-add-alert-support-v4-0-1751802471ba@baylibre.com> To: Lars-Peter Clausen , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , David Lechner , Jonathan Cameron , Jonathan Corbet Cc: linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Julien Stephan X-Mailer: b4 0.14.2 Enable regmap cache, to avoid useless access on spi bus. Reviewed-by: David Lechner Signed-off-by: Julien Stephan --- drivers/iio/adc/ad7380.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/drivers/iio/adc/ad7380.c b/drivers/iio/adc/ad7380.c index bc7d58850a3e2a84a241d81377e3dc14c43fc101..b97d2978289e92ad502cd6a67de43d2b51cdab56 100644 --- a/drivers/iio/adc/ad7380.c +++ b/drivers/iio/adc/ad7380.c @@ -663,6 +663,20 @@ static int ad7380_regmap_reg_read(void *context, unsigned int reg, return 0; } +static const struct reg_default ad7380_reg_defaults[] = { + { AD7380_REG_ADDR_ALERT_LOW_TH, 0x800 }, + { AD7380_REG_ADDR_ALERT_HIGH_TH, 0x7FF }, +}; + +static const struct regmap_range ad7380_volatile_reg_ranges[] = { + regmap_reg_range(AD7380_REG_ADDR_CONFIG2, AD7380_REG_ADDR_ALERT), +}; + +static const struct regmap_access_table ad7380_volatile_regs = { + .yes_ranges = ad7380_volatile_reg_ranges, + .n_yes_ranges = ARRAY_SIZE(ad7380_volatile_reg_ranges), +}; + static const struct regmap_config ad7380_regmap_config = { .reg_bits = 3, .val_bits = 12, @@ -670,6 +684,10 @@ static const struct regmap_config ad7380_regmap_config = { .reg_write = ad7380_regmap_reg_write, .max_register = AD7380_REG_ADDR_ALERT_HIGH_TH, .can_sleep = true, + .reg_defaults = ad7380_reg_defaults, + .num_reg_defaults = ARRAY_SIZE(ad7380_reg_defaults), + .volatile_table = &ad7380_volatile_regs, + .cache_type = REGCACHE_MAPLE, }; static int ad7380_debugfs_reg_access(struct iio_dev *indio_dev, u32 reg, From patchwork Wed Jan 8 12:49:35 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Stephan X-Patchwork-Id: 13930880 Received: from mail-wm1-f50.google.com (mail-wm1-f50.google.com [209.85.128.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3F0001FBC92 for ; Wed, 8 Jan 2025 12:49:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.50 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736340589; cv=none; b=VDmQRK7tx0i+JOHjS7dQZYVm5b7xzseVdpND5SOO3bLkCAEJeWcfv/I/RGK3lruE6hH/zAiQEMJ2SSG/CE6kdMurQHWE1VQWHkPqCQ8FY/HaDZHrh5AxVCjBfCu+Krzya48fWqXEBUbMgfnwD/Hb8iwmiVZP54+Ge/xJMVGVozw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736340589; c=relaxed/simple; bh=t81/yNLGUuGTbNCX3xw1FFNci9RHYp8JgJnWXFdWioA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=TTRR7SAqjMY+X4jhbB9Vf6p108TMSvivLAFDfkeZbKHU4B+mn22XBQnjsEphh0oACyfpJ06JKDxCP+TetAp/tRRUHoYvvLbMO300r56F9dOSRIfBbJsqfE7PRaPkB8PrvVPnK+C9H4WqKDDOwf+6Sx/BYM6G8N8bG7BkEkWEla8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com; spf=pass smtp.mailfrom=baylibre.com; dkim=pass (2048-bit key) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.b=GmJQQgJn; arc=none smtp.client-ip=209.85.128.50 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=baylibre.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.b="GmJQQgJn" Received: by mail-wm1-f50.google.com with SMTP id 5b1f17b1804b1-4368a293339so135676265e9.3 for ; Wed, 08 Jan 2025 04:49:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20230601.gappssmtp.com; s=20230601; t=1736340585; x=1736945385; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=/ILpJ8cyEJ/3U1U5xHGXrfoZNcmFJHQkvJM8+6HPLCw=; b=GmJQQgJnGCOrW6YAvhp6x2ZGHdhVRb30S617ojkTUNRTQf/kau7iEzqPfa1JqA1Vio l5vJFh6g+7p0V++iW106O9LRe10MOugeoP/4NnkM4mNXf3qLN6MOi3abtsY2qNVARWos lj1rC9qIbnP62LnNIKBzppfAnLRhzGB5HNzQtV+q3U3d8upSZsR85kvT9cr8RzZjxFyw 0AGc0+igdHo0ddoR4k623+5dtMYmXrnEKrUHuiHQzIdGxGByhBPXMmNl1WzlvpC+aU1p BJwfOVEuSeitLjMDCaUzV1lL6QQvrRAXD7nbD4LsybrOItsv2kGc3xluzm4zFDsg1hvi m8gg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1736340585; x=1736945385; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=/ILpJ8cyEJ/3U1U5xHGXrfoZNcmFJHQkvJM8+6HPLCw=; b=wg+IIH7z121HtTZXazrNIBHTjmvI11AzjxIvT5W28APApXVWpswKop6/WBDxRJqaEc OEdoaDmxkUwcaQCjT+IqlqiREVOMk10IZ7UOvVqGKnNFjtnZwD9+RYAPQt18fI5DfLj6 /CmMOqnL8ClZBcrB/swlJW8/yzhS2rfZsxb8n3WB3tld4AVPrf1plRFWtLDmimWPTpaC Pu5VPz2DO9cxf+n1akjWEO3uRNO/AgJSzFMYE2bPK3fBwbXjVWCN6PIISCCq4ZpFh5G8 tX942CjFE3o3jbn3rpgoN4bz+XvgYhn7WaeDvElN8iHkJPPCnEjuMwE9AlKp/KbEP7HP aDzg== X-Gm-Message-State: AOJu0YzvK2rO1pw2DrJNxvLVOClcHndwnK0n96skCyZivEDx7+EQIZ9P 5I0nvPT/Y7LciWXstiG3XiAuiP9C0lXEC9GpIy0yoAuYwVdlCcz2q/TSZBZR8zg= X-Gm-Gg: ASbGncuAXo85WmBp0AiUnZkE4uT6lSG03wF5JCRFFEQYCleBNxsDJAhTb+iaTDtx0ZD Odon9oYNq4eaDikJlGpNCC93ZF80rSr8gSSNTXpRUjYimRVA4+wro0pT/8CqUD7ELBs1t4xyy89 v51b9Ga2wwkPcQwvJGZm2oOtklmooelIG0N+itiIsMa7Vqw31grtAkxhesG9/xi3H1/qmFK9r5s hpRcU4SSLm7+KJbrPra7MlgFzjfK6BMnCzWmYZq2exd1fjAieO17wF7/dvHf1Hj84Q4QkCwzvpt ohSK+F5DdsClpC+A9us2/yGVcIh1ZzMdDfrMUWW0j36CTfODOOj2uw== X-Google-Smtp-Source: AGHT+IEJUKPIsY0/+87opxSoC/qv+r+Aof0lKFXqkysIxkeur2mxHgvy0OB9e0pOpf72jDBsYf4V4A== X-Received: by 2002:a05:600c:138a:b0:434:a781:f5d5 with SMTP id 5b1f17b1804b1-436e271bcb3mr24895925e9.30.1736340585622; Wed, 08 Jan 2025 04:49:45 -0800 (PST) Received: from jstephan-bl.local (2a02-842a-d52e-6101-6fd0-06c4-5d68-f0a5.rev.sfr.net. [2a02:842a:d52e:6101:6fd0:6c4:5d68:f0a5]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-436e2da63eesm19846805e9.3.2025.01.08.04.49.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Jan 2025 04:49:45 -0800 (PST) From: Julien Stephan Date: Wed, 08 Jan 2025 13:49:35 +0100 Subject: [PATCH v4 3/5] iio: adc: ad7380: do not store osr in private data structure Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250108-ad7380-add-alert-support-v4-3-1751802471ba@baylibre.com> References: <20250108-ad7380-add-alert-support-v4-0-1751802471ba@baylibre.com> In-Reply-To: <20250108-ad7380-add-alert-support-v4-0-1751802471ba@baylibre.com> To: Lars-Peter Clausen , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , David Lechner , Jonathan Cameron , Jonathan Corbet Cc: linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Julien Stephan X-Mailer: b4 0.14.2 Since regmap cache is now enabled, we don't need to store the oversampling ratio in the private data structure. Reviewed-by: David Lechner Signed-off-by: Julien Stephan --- drivers/iio/adc/ad7380.c | 79 +++++++++++++++++++++++++++++++++++++++--------- 1 file changed, 65 insertions(+), 14 deletions(-) diff --git a/drivers/iio/adc/ad7380.c b/drivers/iio/adc/ad7380.c index b97d2978289e92ad502cd6a67de43d2b51cdab56..a532de4422082df8503454d66fc49f75b52cff68 100644 --- a/drivers/iio/adc/ad7380.c +++ b/drivers/iio/adc/ad7380.c @@ -582,7 +582,6 @@ struct ad7380_state { const struct ad7380_chip_info *chip_info; struct spi_device *spi; struct regmap *regmap; - unsigned int oversampling_ratio; bool resolution_boost_enabled; unsigned int ch; bool seq; @@ -710,6 +709,36 @@ static int ad7380_debugfs_reg_access(struct iio_dev *indio_dev, u32 reg, return ret; } +/** + * ad7380_regval_to_osr - convert OSR register value to ratio + * @regval: register value to check + * + * Returns: the ratio corresponding to the OSR register. If regval is not in + * bound, return 1 (oversampling disabled) + * + */ +static int ad7380_regval_to_osr(unsigned int regval) +{ + if (regval >= ARRAY_SIZE(ad7380_oversampling_ratios)) + return 1; + + return ad7380_oversampling_ratios[regval]; +} + +static int ad7380_get_osr(struct ad7380_state *st, int *val) +{ + u32 tmp; + int ret; + + ret = regmap_read(st->regmap, AD7380_REG_ADDR_CONFIG1, &tmp); + if (ret) + return ret; + + *val = ad7380_regval_to_osr(FIELD_GET(AD7380_CONFIG1_OSR, tmp)); + + return 0; +} + /* * When switching channel, the ADC require an additional settling time. * According to the datasheet, data is value on the third CS low. We already @@ -725,11 +754,15 @@ static int ad7380_set_ch(struct ad7380_state *st, unsigned int ch) .unit = SPI_DELAY_UNIT_NSECS, } }; - int ret; + int oversampling_ratio, ret; if (st->ch == ch) return 0; + ret = ad7380_get_osr(st, &oversampling_ratio); + if (ret) + return ret; + ret = regmap_update_bits(st->regmap, AD7380_REG_ADDR_CONFIG1, AD7380_CONFIG1_CH, @@ -740,9 +773,9 @@ static int ad7380_set_ch(struct ad7380_state *st, unsigned int ch) st->ch = ch; - if (st->oversampling_ratio > 1) + if (oversampling_ratio > 1) xfer.delay.value = T_CONVERT_0_NS + - T_CONVERT_X_NS * (st->oversampling_ratio - 1) * + T_CONVERT_X_NS * (oversampling_ratio - 1) * st->chip_info->num_simult_channels / AD7380_NUM_SDO_LINES; return spi_sync_transfer(st->spi, &xfer, 1); @@ -753,20 +786,25 @@ static int ad7380_set_ch(struct ad7380_state *st, unsigned int ch) * @st: device instance specific state * @scan_type: current scan type */ -static void ad7380_update_xfers(struct ad7380_state *st, +static int ad7380_update_xfers(struct ad7380_state *st, const struct iio_scan_type *scan_type) { struct spi_transfer *xfer = st->seq ? st->seq_xfer : st->normal_xfer; unsigned int t_convert = T_CONVERT_NS; + int oversampling_ratio, ret; /* * In the case of oversampling, conversion time is higher than in normal * mode. Technically T_CONVERT_X_NS is lower for some chips, but we use * the maximum value for simplicity for now. */ - if (st->oversampling_ratio > 1) + ret = ad7380_get_osr(st, &oversampling_ratio); + if (ret) + return ret; + + if (oversampling_ratio > 1) t_convert = T_CONVERT_0_NS + T_CONVERT_X_NS * - (st->oversampling_ratio - 1) * + (oversampling_ratio - 1) * st->chip_info->num_simult_channels / AD7380_NUM_SDO_LINES; if (st->seq) { @@ -779,7 +817,7 @@ static void ad7380_update_xfers(struct ad7380_state *st, st->chip_info->num_simult_channels; xfer[3].rx_buf = xfer[2].rx_buf + xfer[2].len; /* Additional delay required here when oversampling is enabled */ - if (st->oversampling_ratio > 1) + if (oversampling_ratio > 1) xfer[2].delay.value = t_convert; else xfer[2].delay.value = 0; @@ -791,6 +829,8 @@ static void ad7380_update_xfers(struct ad7380_state *st, xfer[1].len = BITS_TO_BYTES(scan_type->storagebits) * st->chip_info->num_simult_channels; } + + return 0; } static int ad7380_triggered_buffer_preenable(struct iio_dev *indio_dev) @@ -798,6 +838,7 @@ static int ad7380_triggered_buffer_preenable(struct iio_dev *indio_dev) struct ad7380_state *st = iio_priv(indio_dev); const struct iio_scan_type *scan_type; struct spi_message *msg = &st->normal_msg; + int ret; /* * Currently, we always read all channels at the same time. The scan_type @@ -809,7 +850,6 @@ static int ad7380_triggered_buffer_preenable(struct iio_dev *indio_dev) if (st->chip_info->has_mux) { unsigned int index; - int ret; /* * Depending on the requested scan_mask and current state, @@ -840,7 +880,9 @@ static int ad7380_triggered_buffer_preenable(struct iio_dev *indio_dev) } - ad7380_update_xfers(st, scan_type); + ret = ad7380_update_xfers(st, scan_type); + if (ret) + return ret; return spi_optimize_message(st->spi, msg); } @@ -913,7 +955,9 @@ static int ad7380_read_direct(struct ad7380_state *st, unsigned int scan_index, return ret; } - ad7380_update_xfers(st, scan_type); + ret = ad7380_update_xfers(st, scan_type); + if (ret) + return ret; ret = spi_sync(st->spi, &st->normal_msg); if (ret < 0) @@ -991,7 +1035,16 @@ static int ad7380_read_raw(struct iio_dev *indio_dev, return IIO_VAL_INT; case IIO_CHAN_INFO_OVERSAMPLING_RATIO: - *val = st->oversampling_ratio; + ret = iio_device_claim_direct_mode(indio_dev); + if (ret) + return ret; + + ret = ad7380_get_osr(st, val); + + iio_device_release_direct_mode(indio_dev); + + if (ret) + return ret; return IIO_VAL_INT; default: @@ -1058,7 +1111,6 @@ static int ad7380_set_oversampling_ratio(struct ad7380_state *st, int val) if (ret) return ret; - st->oversampling_ratio = val; st->resolution_boost_enabled = boost; /* @@ -1134,7 +1186,6 @@ static int ad7380_init(struct ad7380_state *st, bool external_ref_en) } /* This is the default value after reset. */ - st->oversampling_ratio = 1; st->ch = 0; st->seq = false; From patchwork Wed Jan 8 12:49:36 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Stephan X-Patchwork-Id: 13930881 Received: from mail-wr1-f67.google.com (mail-wr1-f67.google.com [209.85.221.67]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 211851FBC99 for ; Wed, 8 Jan 2025 12:49:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.67 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736340590; cv=none; b=djGW7FeaTmDjZk854j1l1xRrT3TfJBBOQJTdfRlmx3JbwfQxxIdZWMSNBh7bSJSty3I97Iu3weXFvSmuLpiZuR6l9b04RP4RtgLmecJlJdPX3tgYMJczsROc6Ov2EH8sguBK+3J3/N05fucY+368kEEjV4GJrJCn1MLOOKDAqDA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736340590; c=relaxed/simple; bh=KA1qdqsZfJYL0paJzWnR8IkBa4kpVbH9E0CtFYIh3OQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=JLlhZg35mmVfTwcswEBgIOmDjqFhCvwOeF/UqwcicoiSiAaC8wo8hSrfjWa7+iPeXEGrUm+9Lmq30EOD8MW+DtOg371YKl91YqXe1JJctYMBYmyhlbF380JiSitBxLoa7T4/ovXfgW7ZP97BX9cUYoTRsm68JMe5KOYv3O09a0U= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com; spf=pass smtp.mailfrom=baylibre.com; dkim=pass (2048-bit key) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.b=YbeNM4CF; arc=none smtp.client-ip=209.85.221.67 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=baylibre.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.b="YbeNM4CF" Received: by mail-wr1-f67.google.com with SMTP id ffacd0b85a97d-3862f32a33eso7524003f8f.3 for ; Wed, 08 Jan 2025 04:49:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20230601.gappssmtp.com; s=20230601; t=1736340586; x=1736945386; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=XJ+zcxHZ3EsxL3ZXdjUwAasoZIJYeKInjwJt+E7P06g=; b=YbeNM4CFTi9mrSf/ppPNfri3rE/gTUGeXka/hDVc56OxXzTGJF7/V03BY+Ir3DS6qd 8Po4Kp3tADiY5C+o6Q0AuhT7riJH2A+PXwStw/QaRe7xUvT9xwZcxnWAlBqALMVKKWVz ONDS8wb8m//F0BE9AU1Uubd5sOqIlFZ967q2thp/NfUcrR9sPptf7Ok3ZWYLwFqk/Qv6 MjLsPYR/Ngqi7Ib3rMNg5R6qHynlHqXvpWlpq4zhXNnNVX7L8lkpXlmMupdFFVTkiPE6 Yw+S6j0ldBk7w8/45iBiQC8UAnJ6NQjBlIXjSEUjFuUZxVAm50p5BRFZRTqwYGIFz0jV ByZA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1736340586; x=1736945386; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=XJ+zcxHZ3EsxL3ZXdjUwAasoZIJYeKInjwJt+E7P06g=; b=jcvwowqxDpLFRJoqeG/SUyMfgxT5hk7+mtwFondwGQ2QJO0jJ5McEU+nhEqyKxJxmI YA5KdLuvuqAY+Ed3OkmcEGdAg9/6gc8i2AMAxiYBSvYrsp8iKRzhmYRQZ8eu1sApppfH K2MfNICZjUmjGHkz0ZjX4hCXViGuw+zzs/hJRcDyI0C8Q1mEmrzu9JzWGQbCpcZECjnY xkupwGeHnaAbnxHbtmU/yVJtIqUYn8+DyD3BOQF5HoNO1Jw6It2yUTQtvqLsIaby8+Ca y3P539R76ADUF7JU4GwEeV8N+bMPQCe4JG1H4etaQLqVj3JfJkkpLJdhHLgBl4Nk6ZTr tOVg== X-Gm-Message-State: AOJu0YyWU1WNxk1ZvcazEEwVpCY8hoUJJDRZzr6MHXS23M1RcCG1vEU3 VASemvCLSjuB6cffHZx+FtR57+K7oRVk2BWlvY4UvAhxVeg9RlusGuR0Hadwjw8= X-Gm-Gg: ASbGncti3nVGX+kmGCINZzlcbnYIvwqKSkqtXRQCoe/LviL413Ny41OagLcqG7cQTQG hswdj2wxkdk/1f0ULno3QizEerw0Ac55LTnVg5rnRcmYZ/r4CnqsuGT9UYmfRZN3m5UBpSQJtbi wdRMOcS5n46jAs+Q8XOf/jur+eH9AYg2kIWFmDBO3QEWp7lIpG5iFTfKufQ72KaB9DPpew/W87U Z+K2jOLgZwcPqC3691QycUj/UvaVsr7cIj6wEgou3AJPit/yECSLKsBxS97V4+EK9T2pGjYpzSU rGzyxDT2VeTXy37L+cYqW1Mfhfxwfc3atjax7zX1U0mtGB+liKulBw== X-Google-Smtp-Source: AGHT+IGTO0/JVXTiLRNDx/Ud4GZVUE6svyHOPNwrUyxK5M5DnPTxtJnvZiHZd6iqkTFwo2fqQEjgJQ== X-Received: by 2002:a05:6000:18a8:b0:388:c790:1dff with SMTP id ffacd0b85a97d-38a8733fd71mr1798784f8f.47.1736340586500; Wed, 08 Jan 2025 04:49:46 -0800 (PST) Received: from jstephan-bl.local (2a02-842a-d52e-6101-6fd0-06c4-5d68-f0a5.rev.sfr.net. [2a02:842a:d52e:6101:6fd0:6c4:5d68:f0a5]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-436e2da63eesm19846805e9.3.2025.01.08.04.49.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Jan 2025 04:49:45 -0800 (PST) From: Julien Stephan Date: Wed, 08 Jan 2025 13:49:36 +0100 Subject: [PATCH v4 4/5] iio: adc: ad7380: add alert support Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250108-ad7380-add-alert-support-v4-4-1751802471ba@baylibre.com> References: <20250108-ad7380-add-alert-support-v4-0-1751802471ba@baylibre.com> In-Reply-To: <20250108-ad7380-add-alert-support-v4-0-1751802471ba@baylibre.com> To: Lars-Peter Clausen , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , David Lechner , Jonathan Cameron , Jonathan Corbet Cc: linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Julien Stephan X-Mailer: b4 0.14.2 The alert functionality is an out of range indicator and can be used as an early indicator of an out of bounds conversion result. ALERT_LOW_THRESHOLD and ALERT_HIGH_THRESHOLD registers are common to all channels. When using 1 SDO line (only mode supported by the driver right now), i.e data outputs only on SDOA, SDOB (or SDOD for 4 channels variants) is used as an alert pin. The alert pin is updated at the end of the conversion (set to low if an alert occurs) and is cleared on a falling edge of CS. The ALERT register contains information about the exact alert status: channel and direction. ALERT register can be accessed using debugfs if enabled. User can set high/low thresholds and enable alert detection using the regular iio events attributes: events/in_thresh_falling_value events/in_thresh_rising_value events/thresh_either_en In most use cases, user will hardwire the alert pin to trigger a shutdown. In theory, we could generate userspace IIO events for alerts, but this is not implemented yet for several reasons [1]. This can be implemented later if a real use case actually requires it. Signed-off-by: Julien Stephan [1] https://lore.kernel.org/all/4be16272-5197-4fa1-918c-c4cdfcaee02e@baylibre.com/ Reviewed-by: David Lechner --- drivers/iio/adc/ad7380.c | 197 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 197 insertions(+) diff --git a/drivers/iio/adc/ad7380.c b/drivers/iio/adc/ad7380.c index a532de4422082df8503454d66fc49f75b52cff68..cedd45556ee38b3197f8dd7edea162c3f4ba1563 100644 --- a/drivers/iio/adc/ad7380.c +++ b/drivers/iio/adc/ad7380.c @@ -34,6 +34,7 @@ #include #include +#include #include #include #include @@ -112,6 +113,24 @@ struct ad7380_chip_info { const struct ad7380_timing_specs *timing_specs; }; +static const struct iio_event_spec ad7380_events[] = { + { + .type = IIO_EV_TYPE_THRESH, + .dir = IIO_EV_DIR_RISING, + .mask_shared_by_dir = BIT(IIO_EV_INFO_VALUE), + }, + { + .type = IIO_EV_TYPE_THRESH, + .dir = IIO_EV_DIR_FALLING, + .mask_shared_by_dir = BIT(IIO_EV_INFO_VALUE), + }, + { + .type = IIO_EV_TYPE_THRESH, + .dir = IIO_EV_DIR_EITHER, + .mask_shared_by_all = BIT(IIO_EV_INFO_ENABLE), + }, +}; + enum { AD7380_SCAN_TYPE_NORMAL, AD7380_SCAN_TYPE_RESOLUTION_BOOST, @@ -214,6 +233,8 @@ static const struct iio_scan_type ad7380_scan_type_16_u[] = { .has_ext_scan_type = 1, \ .ext_scan_type = ad7380_scan_type_##bits##_##sign, \ .num_ext_scan_type = ARRAY_SIZE(ad7380_scan_type_##bits##_##sign), \ + .event_spec = ad7380_events, \ + .num_event_specs = ARRAY_SIZE(ad7380_events), \ } #define AD7380_CHANNEL(index, bits, diff, sign) \ @@ -1157,12 +1178,188 @@ static int ad7380_get_current_scan_type(const struct iio_dev *indio_dev, : AD7380_SCAN_TYPE_NORMAL; } +static int ad7380_read_event_config(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, + enum iio_event_type type, + enum iio_event_direction dir) +{ + struct ad7380_state *st = iio_priv(indio_dev); + int tmp, ret; + + ret = iio_device_claim_direct_mode(indio_dev); + if (ret) + return ret; + + ret = regmap_read(st->regmap, AD7380_REG_ADDR_CONFIG1, &tmp); + + iio_device_release_direct_mode(indio_dev); + + if (ret) + return ret; + + return FIELD_GET(AD7380_CONFIG1_ALERTEN, tmp); +} + +static int ad7380_write_event_config(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, + enum iio_event_type type, + enum iio_event_direction dir, + bool state) +{ + struct ad7380_state *st = iio_priv(indio_dev); + int ret; + + ret = iio_device_claim_direct_mode(indio_dev); + if (ret) + return ret; + + ret = regmap_update_bits(st->regmap, + AD7380_REG_ADDR_CONFIG1, + AD7380_CONFIG1_ALERTEN, + FIELD_PREP(AD7380_CONFIG1_ALERTEN, state)); + + iio_device_release_direct_mode(indio_dev); + + return ret; +} + +static int ad7380_get_alert_th(struct ad7380_state *st, + enum iio_event_direction dir, + int *val) +{ + int ret, tmp; + + switch (dir) { + case IIO_EV_DIR_RISING: + ret = regmap_read(st->regmap, + AD7380_REG_ADDR_ALERT_HIGH_TH, + &tmp); + if (ret) + return ret; + + *val = FIELD_GET(AD7380_ALERT_HIGH_TH, tmp); + ret = IIO_VAL_INT; + break; + case IIO_EV_DIR_FALLING: + ret = regmap_read(st->regmap, + AD7380_REG_ADDR_ALERT_LOW_TH, + &tmp); + if (ret) + return ret; + + *val = FIELD_GET(AD7380_ALERT_LOW_TH, tmp); + ret = IIO_VAL_INT; + break; + default: + ret = -EINVAL; + break; + } + + return ret; +} + +static int ad7380_read_event_value(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, + enum iio_event_type type, + enum iio_event_direction dir, + enum iio_event_info info, + int *val, int *val2) +{ + struct ad7380_state *st = iio_priv(indio_dev); + int ret; + + switch (info) { + case IIO_EV_INFO_VALUE: + ret = iio_device_claim_direct_mode(indio_dev); + if (ret) + return ret; + + ret = ad7380_get_alert_th(st, dir, val); + + iio_device_release_direct_mode(indio_dev); + return ret; + default: + return -EINVAL; + } +} + +static int ad7380_set_alert_th(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, + enum iio_event_direction dir, + int val) +{ + struct ad7380_state *st = iio_priv(indio_dev); + const struct iio_scan_type *scan_type; + u16 th; + + /* + * According to the datasheet, + * AD7380_REG_ADDR_ALERT_HIGH_TH[11:0] are the 12 MSB of the + * 16-bits internal alert high register. LSB are set to 0xf. + * AD7380_REG_ADDR_ALERT_LOW_TH[11:0] are the 12 MSB of the + * 16 bits internal alert low register. LSB are set to 0x0. + * + * When alert is enabled the conversion from the adc is compared + * immediately to the alert high/low thresholds, before any + * oversampling. This means that the thresholds are the same for + * normal mode and oversampling mode. + */ + + /* Extract the 12 MSB of val */ + scan_type = iio_get_current_scan_type(indio_dev, chan); + if (IS_ERR(scan_type)) + return PTR_ERR(scan_type); + + th = val >> (scan_type->realbits - 12); + + switch (dir) { + case IIO_EV_DIR_RISING: + return regmap_write(st->regmap, + AD7380_REG_ADDR_ALERT_HIGH_TH, + th); + case IIO_EV_DIR_FALLING: + return regmap_write(st->regmap, + AD7380_REG_ADDR_ALERT_LOW_TH, + th); + default: + return -EINVAL; + } +} + +static int ad7380_write_event_value(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, + enum iio_event_type type, + enum iio_event_direction dir, + enum iio_event_info info, + int val, int val2) +{ + int ret; + + switch (info) { + case IIO_EV_INFO_VALUE: + ret = iio_device_claim_direct_mode(indio_dev); + if (ret) + return ret; + + ret = ad7380_set_alert_th(indio_dev, chan, dir, val); + + iio_device_release_direct_mode(indio_dev); + return ret; + default: + return -EINVAL; + } +} + static const struct iio_info ad7380_info = { .read_raw = &ad7380_read_raw, .read_avail = &ad7380_read_avail, .write_raw = &ad7380_write_raw, .get_current_scan_type = &ad7380_get_current_scan_type, .debugfs_reg_access = &ad7380_debugfs_reg_access, + .read_event_config = &ad7380_read_event_config, + .write_event_config = &ad7380_write_event_config, + .read_event_value = &ad7380_read_event_value, + .write_event_value = &ad7380_write_event_value, }; static int ad7380_init(struct ad7380_state *st, bool external_ref_en) From patchwork Wed Jan 8 12:49:37 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Stephan X-Patchwork-Id: 13930882 Received: from mail-wm1-f45.google.com (mail-wm1-f45.google.com [209.85.128.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 814EF1FC0FF for ; Wed, 8 Jan 2025 12:49:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.45 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736340592; cv=none; b=qYgyEYIMDdQj+9U858t0yd1LZTA0mQHBwc5gtwhhexgf0EwIC/6SCZGKp41wSArnHeGI55L/u58UC/TYPccqlzdW0o8Lp4Sa/gqETqii8AP+LA31DuFRWOfUBJHRSFyA26qFyVXsgMXn+24z7wRWMI5eIlIiexj7g2PlSulNI9I= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736340592; c=relaxed/simple; bh=q+2FfWgXL3it8kWQJY1v1IawdOYfJSEhFMz5RY7Ava8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=TwRd0haCiBP/gQwmq/7eMapgLZLH5hYsQcMilIT5P1bn9R2ORTDkKjSO0CdykqxETYzF6vbAFRrxzhijWASAfrYUdMY1qUQebJfOZSZTfAwcvrMTMrf7lqovc8J1M4CTe2OEk49tgG9GbtitxhwcLr04fo6uwbqbgvHngozqouQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com; spf=pass smtp.mailfrom=baylibre.com; dkim=pass (2048-bit key) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.b=gAz2UKPW; arc=none smtp.client-ip=209.85.128.45 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=baylibre.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.b="gAz2UKPW" Received: by mail-wm1-f45.google.com with SMTP id 5b1f17b1804b1-4361e89b6daso115286935e9.3 for ; Wed, 08 Jan 2025 04:49:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20230601.gappssmtp.com; s=20230601; t=1736340588; x=1736945388; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=SOhT2Lsro+qOOV89/XsqYrLbTVo9ZQM0Bb0vXMREq/0=; b=gAz2UKPWVK1D3YRfbhMliHNZ5x9UTT6Nd7u5kzIeL3oR8o9yEVN1glofgVQp11OkEH L8RvB+gOk8besqIKSIsqYdbShTD4Lwrgaz97YDXt5rW9vU/kco9WClkuLh9eth3j88Et A9xq9fO6rBhZ+sgiPkeji/+oTuQHYmRMTgb45yxHjKgzzhDtTrLS9zmt2lks6b3BuVrL PCg0F0g5JfWdyqDFQEqBKEBlF6Y+XpU7oH4GuSPPr4e98b7f5P5OQdH8+iOAYrWLYIbJ SGHfqJi51iP28VLY2/Koc/jirFHTG/FNbfGFkzginsd7neQr3rU18KIHCA7K29ufBxvL pjiQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1736340588; x=1736945388; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=SOhT2Lsro+qOOV89/XsqYrLbTVo9ZQM0Bb0vXMREq/0=; b=jPoEuhiWjwz/3T4rCWBCjRnDk+Pw4qY/F6zaYeK1IidqbGY+BtCL2bxblZyemI/n1j Zn0GeLlsoPKc2eje6csGAd7NbkRt8uvAtN3b7icFCJOFtF9Hp/WeLIzaTcLsa4Zp51QW QN2EhjUEoPD8Fl1jGIULV1Fc4v8wGZFzuKbdvAXoHr/zt5vTzFHAOlantX8Q7pI5AuEJ OxeCt5qC+787XBt+BUrTfFXfVeAiIWpKhqlJswIYBdPL1KGAvwJpYL/r4KTL/rvM5umr +biIn25VRRHMumJIz7iYrUXTzarpfsqNdAak5SPVIZ9/cOqyrg8WjVQx6vOC5diqxSuq ySvQ== X-Gm-Message-State: AOJu0YztTkjT+KcQmvcwIFE6rYtu7IKIoQgDjN1Ack3eZCboxSpmK50P gQHuzwQk9zFqucIXnUTZDNefJtT3489O+bLHWh0/zaNfax+cHToYo6Ym5OKEP74= X-Gm-Gg: ASbGnctcmFlO1r4S22a/zWj0s+GRaY3IltCFpOBrStOrNTEsKWbHujP3ZK0ymWQy/7o bM59c7hNbdq9MgWuA5akZGuOrn9fWV5MtTUTMj7Qvc2885MJnINHcIUNyTqYvr6laemN8e5pDiN 1AYXNMDeIl/uY+myY3wpCPTn0hzmZnvmj9JxvO1bbqHryyBk0zbI0CgRhr7etf1RJuZCPKDybRo LW8SpjunrsL0pPrhyqG5rJgA4U48gIAHkmRXlzEeC11Jy++DmYkzibya8w1y8k/cpHd7GefusJB kPp1eWR9T4PQubkCuz1I7GsP7SEMjs9WNr5/1wLZvhdaqGei7/fSZA== X-Google-Smtp-Source: AGHT+IE+QhuDpA8YR57JeyH4IaaPw2brfo9vS5Y7y3nd1ge9+lmd1OqCzvYZWaMA8uj10HLFCeuIHQ== X-Received: by 2002:a05:600c:1c98:b0:436:1b7a:c0b4 with SMTP id 5b1f17b1804b1-436e2677c65mr20409605e9.1.1736340587726; Wed, 08 Jan 2025 04:49:47 -0800 (PST) Received: from jstephan-bl.local (2a02-842a-d52e-6101-6fd0-06c4-5d68-f0a5.rev.sfr.net. [2a02:842a:d52e:6101:6fd0:6c4:5d68:f0a5]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-436e2da63eesm19846805e9.3.2025.01.08.04.49.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Jan 2025 04:49:46 -0800 (PST) From: Julien Stephan Date: Wed, 08 Jan 2025 13:49:37 +0100 Subject: [PATCH v4 5/5] docs: iio: ad7380: add alert support Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250108-ad7380-add-alert-support-v4-5-1751802471ba@baylibre.com> References: <20250108-ad7380-add-alert-support-v4-0-1751802471ba@baylibre.com> In-Reply-To: <20250108-ad7380-add-alert-support-v4-0-1751802471ba@baylibre.com> To: Lars-Peter Clausen , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , David Lechner , Jonathan Cameron , Jonathan Corbet Cc: linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Julien Stephan X-Mailer: b4 0.14.2 Add a section for alert support, explaining how user can use iio events attributes to enable alert and set thresholds. Reviewed-by: David Lechner Signed-off-by: Julien Stephan --- Documentation/iio/ad7380.rst | 33 ++++++++++++++++++++++++++++++++- 1 file changed, 32 insertions(+), 1 deletion(-) diff --git a/Documentation/iio/ad7380.rst b/Documentation/iio/ad7380.rst index c46127700e14ca9ec3cac0bd5776b6702f2659e2..cff688bcc2d9601a9faf42d5e9c217486639ca66 100644 --- a/Documentation/iio/ad7380.rst +++ b/Documentation/iio/ad7380.rst @@ -92,6 +92,38 @@ must restart iiod using the following command: root:~# systemctl restart iiod +Alert +----- + +2 channels variants of the ad738x family, can use the SDOB line as an alert pin +when configured in 1 SDO line mode. 4 channels variants, can use SDOD as an +alert pin when configured in 1 or 2 SDO line(s) mode, although only 1 SDO line +mode is currently supported by the driver (see `SPI wiring modes`_). + +At the end of a conversion the active-low alert pin gets asserted if the +conversion result exceeds the alert high limit or falls below the alert low +limit. It is cleared, on a falling edge of CS. The alert pin is common to all +channels. + +User can enable alert using the regular iio events attribute: + +.. code-block:: bash + + events/thresh_either_en + +The high and low thresholds are common to all channels and can also be set using +regular iio events attributes: + +.. code-block:: bash + + events/in_thresh_falling_value + events/in_thresh_rising_value + +If debugfs is available, user can read the ALERT register to determine the +faulty channel and direction. + +In most use cases, user will hardwire the alert pin to trigger a shutdown. + Channel selection and sequencer (single-end chips only) ------------------------------------------------------- @@ -144,7 +176,6 @@ Unimplemented features - Rolling average oversampling - Power down mode - CRC indication -- Alert Device buffers