From patchwork Thu Jan 9 07:31:28 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Jouni_H=C3=B6gander?= X-Patchwork-Id: 13932151 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9EB1AE77199 for ; Thu, 9 Jan 2025 07:32:01 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 245E110ED00; Thu, 9 Jan 2025 07:32:01 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="LbBwTdH0"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) by gabe.freedesktop.org (Postfix) with ESMTPS id 9FBCB10ED00; Thu, 9 Jan 2025 07:31:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1736407920; x=1767943920; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=+LycbfHECOYT76Qe5K2s9BO9lh87hriNwwutsjfcDDM=; b=LbBwTdH0f09yDpoaBQIi82hvuEN0A5EqKcwNh99yKb+KQvJ5QIIleou5 1aSvstwOOrdPiGWwc0tMji/Wj6CwQdKPZgtsGI7RrhEruogGVAfgaV9XT OQGXrL8P+C9JC/5qFAFYiZDTE3SeIk4i2saEYOzyhropm+b8KpMkq1Ukl nuAN1IU1ymh9uAWaSbKmnhW/nR6a2+hEZCtQGtLlqbeP2s7/7RV5aRYlh fJuyep5PZTu7a2PShZxdYbhIvhsZeNmyPXP8KblXTEjb0fqU2Vn01K6jR YjZNTLQd1EP7a8mIxk8xflXQbikitZzNH8T726Gm40ZZkD/EE3aQY0QPu w==; X-CSE-ConnectionGUID: 9uPM1TU1QX+yUnmpKTHwLw== X-CSE-MsgGUID: d1IcYV4TSUm2noWY3/739w== X-IronPort-AV: E=McAfee;i="6700,10204,11309"; a="54200562" X-IronPort-AV: E=Sophos;i="6.12,300,1728975600"; d="scan'208";a="54200562" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jan 2025 23:32:00 -0800 X-CSE-ConnectionGUID: FFOXwI+bSumxJkO6E88rDA== X-CSE-MsgGUID: WLHnGJrLQWmxwbKza2j1Mw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,300,1728975600"; d="scan'208";a="103297843" Received: from fpallare-mobl4.ger.corp.intel.com (HELO jhogande-mobl1..) ([10.245.245.185]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jan 2025 23:31:58 -0800 From: =?utf-8?q?Jouni_H=C3=B6gander?= To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: =?utf-8?q?Jouni_H=C3=B6gander?= Subject: [PATCH v3 01/10] drm/i915/psr: Use PSR2_MAN_TRK_CTL CFF bit only to send full update Date: Thu, 9 Jan 2025 09:31:28 +0200 Message-ID: <20250109073137.1977494-2-jouni.hogander@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250109073137.1977494-1-jouni.hogander@intel.com> References: <20250109073137.1977494-1-jouni.hogander@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" We are preparing for a change where only frontbuffer flush will use single full frame bit of a new register (SFF_CTL) available on LunarLake onwards. Signed-off-by: Jouni Högander --- drivers/gpu/drm/i915/display/intel_psr.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 0b021acb330f..476305010e11 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -2381,7 +2381,6 @@ static void psr2_man_trk_ctl_calc(struct intel_crtc_state *crtc_state, val |= man_trk_ctl_partial_frame_bit_get(display); if (full_update) { - val |= man_trk_ctl_single_full_frame_bit_get(display); val |= man_trk_ctl_continuos_full_frame(display); goto exit; } From patchwork Thu Jan 9 07:31:29 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Jouni_H=C3=B6gander?= X-Patchwork-Id: 13932152 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C6A0FE77197 for ; Thu, 9 Jan 2025 07:32:02 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1E42310ED04; Thu, 9 Jan 2025 07:32:02 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="f/Yt2L0K"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) by gabe.freedesktop.org (Postfix) with ESMTPS id 1D6B910ECFE; Thu, 9 Jan 2025 07:32:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1736407921; x=1767943921; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Whj9TBUSdM04nLgyI+DdQEGSgN4EBrrXuio6Dn07mi0=; b=f/Yt2L0KJU8nZ9vSm6EYpMp3Cvb4Dl9hGgjsl2OD3seG0QFy7fhYHPZn 2UADVQGdKLwUvPZhERAg5c70C0ONeIBgJXLduBtw43nMIi0NZT+HNfWNC ZwryPR63QvT3cc4YFqKJJ20j5PENIg1xYRYArafYHSgmDuTtdYMfjyRkK /JlIwYrweuIDwhxjUCF+jCvr0yU8CYctESph4ktsf1V4RPs4ccBkEDfUo 88BmPL+CbqVHrYtnirE8TsMlcqWdNnTuBuRTzfpw28321UPl+JZsgkVHQ QKhBJyHp/TylI0AzE+1m+pubHd8X9hQ8Fru2OX/XBQ2mJe6E8fQvNZE3v g==; X-CSE-ConnectionGUID: k5d9ZBg/TbquwxVruvYF9g== X-CSE-MsgGUID: CulqEKo5SpGyIywE/Ra6PA== X-IronPort-AV: E=McAfee;i="6700,10204,11309"; a="54200565" X-IronPort-AV: E=Sophos;i="6.12,300,1728975600"; d="scan'208";a="54200565" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jan 2025 23:32:01 -0800 X-CSE-ConnectionGUID: 3cegQ1TfQ8mdGLGZMpXXlw== X-CSE-MsgGUID: 0tC+jZVARuyzCAW8QOpsTw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,300,1728975600"; d="scan'208";a="103297852" Received: from fpallare-mobl4.ger.corp.intel.com (HELO jhogande-mobl1..) ([10.245.245.185]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jan 2025 23:32:00 -0800 From: =?utf-8?q?Jouni_H=C3=B6gander?= To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: =?utf-8?q?Jouni_H=C3=B6gander?= Subject: [PATCH v3 02/10] drm/i915/psr: Rename psr_force_hw_tracking_exit as intel_psr_force_update Date: Thu, 9 Jan 2025 09:31:29 +0200 Message-ID: <20250109073137.1977494-3-jouni.hogander@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250109073137.1977494-1-jouni.hogander@intel.com> References: <20250109073137.1977494-1-jouni.hogander@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" psr_force_hw_tracking_exit is misleading name as it is used for PSR1, PSR2 HW tracking and PSR2 selective fetch. Due to this rename it as intel_psr_force_update. Signed-off-by: Jouni Högander --- drivers/gpu/drm/i915/display/intel_psr.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 476305010e11..5411d0d6f362 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -2310,7 +2310,7 @@ static u32 man_trk_ctl_continuos_full_frame(struct intel_display *display) PSR2_MAN_TRK_CTL_SF_CONTINUOS_FULL_FRAME; } -static void psr_force_hw_tracking_exit(struct intel_dp *intel_dp) +static void intel_psr_force_update(struct intel_dp *intel_dp) { struct intel_display *display = to_intel_display(intel_dp); enum transcoder cpu_transcoder = intel_dp->psr.transcoder; @@ -2857,7 +2857,7 @@ void intel_psr_post_plane_update(struct intel_atomic_state *state, /* Force a PSR exit when enabling CRC to avoid CRC timeouts */ if (crtc_state->crc_enabled && psr->enabled) - psr_force_hw_tracking_exit(intel_dp); + intel_psr_force_update(intel_dp); /* * Clear possible busy bits in case we have @@ -3254,10 +3254,10 @@ static void _psr_flush_handle(struct intel_dp *intel_dp) * continuous full frame is disabled, only a single full * frame is required */ - psr_force_hw_tracking_exit(intel_dp); + intel_psr_force_update(intel_dp); } } else { - psr_force_hw_tracking_exit(intel_dp); + intel_psr_force_update(intel_dp); if (!intel_dp->psr.active && !intel_dp->psr.busy_frontbuffer_bits) queue_work(dev_priv->unordered_wq, &intel_dp->psr.work); From patchwork Thu Jan 9 07:31:30 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Jouni_H=C3=B6gander?= X-Patchwork-Id: 13932153 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 798DBE77199 for ; Thu, 9 Jan 2025 07:32:04 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 03BAA10ED19; Thu, 9 Jan 2025 07:32:04 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="WTJ7/gjz"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) by gabe.freedesktop.org (Postfix) with ESMTPS id 9067710ED03; Thu, 9 Jan 2025 07:32:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1736407923; x=1767943923; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=u0edCC6vPZq2WeAy0KuAy6HDvp/I7I4iggM9r/D2B8c=; b=WTJ7/gjzramVSHOqoYQKkSUa+n4KYVfAUwKhpilEI9mWrJrG9CqlvJon XT1L4GTuXYha67NLfNjRe0zZxyFdhV/K2SbXoU4V9uqpjy9kR/WWnxmnb B8gJhcXexhfM0VLwA7zlXO9JsKJ/TFNP6SYBRMaDxxsCJ7rYCWj3mQUVs IvySXNo+bz0idbUYWigYTbf70eXSZSG8PblPusvs09VUqKWMbewNhBhCe fD9Ylg/MBorpIhZlM8oUhk8zY35Xwq4I5wePnG9Fn4lxjJnZHZ5M+wx0U cEwnBSGEJsa2X7dtVF9A5UmBlBG1qiK3gOUEh9q0aZiwqPAl1YY5UZ/BL A==; X-CSE-ConnectionGUID: 1PnvTAkQSie/4LFoXzEj0Q== X-CSE-MsgGUID: 9TI2aU+fSHS1xTwe7g6jXw== X-IronPort-AV: E=McAfee;i="6700,10204,11309"; a="54200566" X-IronPort-AV: E=Sophos;i="6.12,300,1728975600"; d="scan'208";a="54200566" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jan 2025 23:32:03 -0800 X-CSE-ConnectionGUID: peAgnykmSBaD86M8KsDfDg== X-CSE-MsgGUID: 7089MC2hR3+YkV99YMZ3Ww== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,300,1728975600"; d="scan'208";a="103297855" Received: from fpallare-mobl4.ger.corp.intel.com (HELO jhogande-mobl1..) ([10.245.245.185]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jan 2025 23:32:01 -0800 From: =?utf-8?q?Jouni_H=C3=B6gander?= To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: =?utf-8?q?Jouni_H=C3=B6gander?= Subject: [PATCH v3 03/10] drm/i915/psr: Split setting sff and cff bits away from intel_psr_force_update Date: Thu, 9 Jan 2025 09:31:30 +0200 Message-ID: <20250109073137.1977494-4-jouni.hogander@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250109073137.1977494-1-jouni.hogander@intel.com> References: <20250109073137.1977494-1-jouni.hogander@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" This is a clean-up and a preparation for adding own SFF and CFF registers for LunarLake onwards. Signed-off-by: Jouni Högander --- drivers/gpu/drm/i915/display/intel_psr.c | 88 +++++++++--------------- 1 file changed, 31 insertions(+), 57 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 5411d0d6f362..e6f96a8b4fb0 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -2313,15 +2313,6 @@ static u32 man_trk_ctl_continuos_full_frame(struct intel_display *display) static void intel_psr_force_update(struct intel_dp *intel_dp) { struct intel_display *display = to_intel_display(intel_dp); - enum transcoder cpu_transcoder = intel_dp->psr.transcoder; - - if (intel_dp->psr.psr2_sel_fetch_enabled) - intel_de_write(display, - PSR2_MAN_TRK_CTL(display, cpu_transcoder), - man_trk_ctl_enable_bit_get(display) | - man_trk_ctl_partial_frame_bit_get(display) | - man_trk_ctl_single_full_frame_bit_get(display) | - man_trk_ctl_continuos_full_frame(display)); /* * Display WA #0884: skl+ @@ -3119,31 +3110,31 @@ static void intel_psr_work(struct work_struct *work) mutex_unlock(&intel_dp->psr.lock); } -static void _psr_invalidate_handle(struct intel_dp *intel_dp) +static void intel_psr_configure_full_frame_update(struct intel_dp *intel_dp) { struct intel_display *display = to_intel_display(intel_dp); enum transcoder cpu_transcoder = intel_dp->psr.transcoder; - if (intel_dp->psr.psr2_sel_fetch_enabled) { - u32 val; + if (!intel_dp->psr.psr2_sel_fetch_enabled) + return; - if (intel_dp->psr.psr2_sel_fetch_cff_enabled) { - /* Send one update otherwise lag is observed in screen */ - intel_de_write(display, - CURSURFLIVE(display, intel_dp->psr.pipe), - 0); - return; + intel_de_write(display, + PSR2_MAN_TRK_CTL(display, cpu_transcoder), + man_trk_ctl_enable_bit_get(display) | + man_trk_ctl_partial_frame_bit_get(display) | + man_trk_ctl_single_full_frame_bit_get(display) | + man_trk_ctl_continuos_full_frame(display)); +} + +static void _psr_invalidate_handle(struct intel_dp *intel_dp) +{ + if (intel_dp->psr.psr2_sel_fetch_enabled) { + if (!intel_dp->psr.psr2_sel_fetch_cff_enabled) { + intel_dp->psr.psr2_sel_fetch_cff_enabled = true; + intel_psr_configure_full_frame_update(intel_dp); } - val = man_trk_ctl_enable_bit_get(display) | - man_trk_ctl_partial_frame_bit_get(display) | - man_trk_ctl_continuos_full_frame(display); - intel_de_write(display, - PSR2_MAN_TRK_CTL(display, cpu_transcoder), - val); - intel_de_write(display, - CURSURFLIVE(display, intel_dp->psr.pipe), 0); - intel_dp->psr.psr2_sel_fetch_cff_enabled = true; + intel_psr_force_update(intel_dp); } else { intel_psr_exit(intel_dp); } @@ -3224,44 +3215,27 @@ static void _psr_flush_handle(struct intel_dp *intel_dp) { struct intel_display *display = to_intel_display(intel_dp); struct drm_i915_private *dev_priv = to_i915(display->drm); - enum transcoder cpu_transcoder = intel_dp->psr.transcoder; if (intel_dp->psr.psr2_sel_fetch_enabled) { if (intel_dp->psr.psr2_sel_fetch_cff_enabled) { /* can we turn CFF off? */ - if (intel_dp->psr.busy_frontbuffer_bits == 0) { - u32 val = man_trk_ctl_enable_bit_get(display) | - man_trk_ctl_partial_frame_bit_get(display) | - man_trk_ctl_single_full_frame_bit_get(display) | - man_trk_ctl_continuos_full_frame(display); - - /* - * Set psr2_sel_fetch_cff_enabled as false to allow selective - * updates. Still keep cff bit enabled as we don't have proper - * SU configuration in case update is sent for any reason after - * sff bit gets cleared by the HW on next vblank. - */ - intel_de_write(display, - PSR2_MAN_TRK_CTL(display, cpu_transcoder), - val); - intel_de_write(display, - CURSURFLIVE(display, intel_dp->psr.pipe), - 0); + if (intel_dp->psr.busy_frontbuffer_bits == 0) intel_dp->psr.psr2_sel_fetch_cff_enabled = false; - } - } else { - /* - * continuous full frame is disabled, only a single full - * frame is required - */ - intel_psr_force_update(intel_dp); } - } else { - intel_psr_force_update(intel_dp); - if (!intel_dp->psr.active && !intel_dp->psr.busy_frontbuffer_bits) - queue_work(dev_priv->unordered_wq, &intel_dp->psr.work); + /* + * Still keep cff bit enabled as we don't have proper SU + * configuration in case update is sent for any reason after + * sff bit gets cleared by the HW on next vblank. + */ + intel_psr_configure_full_frame_update(intel_dp); } + + intel_psr_force_update(intel_dp); + + if (!intel_dp->psr.psr2_sel_fetch_enabled && !intel_dp->psr.active && + !intel_dp->psr.busy_frontbuffer_bits) + queue_work(dev_priv->unordered_wq, &intel_dp->psr.work); } /** From patchwork Thu Jan 9 07:31:31 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Jouni_H=C3=B6gander?= X-Patchwork-Id: 13932154 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 82F50E77197 for ; Thu, 9 Jan 2025 07:32:06 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1A4D710ED05; Thu, 9 Jan 2025 07:32:06 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="BhL65SOn"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) by gabe.freedesktop.org (Postfix) with ESMTPS id 13D0710ED1C; Thu, 9 Jan 2025 07:32:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1736407924; x=1767943924; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=M5l9UMthYSCFysJ9yB3yyzuZk6PSEmzJPYLdeSLG+94=; b=BhL65SOnad0ERF4tV7XJ2Fy6IS1uuD6av0oLslHNnMsoOhzMKcrn3zyo wGQYVXktFjF9hZGdCy6AV7wxiHV4fEU6Wy2dH59vIQ89eMi+u+ytYlXDx 2CieiywSYZAYbDL8xua+y1E8J6ixdxYmR9pUnBhCY4ic4aXS9YMBm02pE gqYMX669g69Zj2HMQVVgz5varBPaV2nTyFRKOK/rlVPeX/2osmgryy0RO o/efW/zAvi0krlm7mtFwT2Lw1ZEWp45LCt1IYI/N/RYInKNg364bJ+F76 +/f9y7vWY98QiEirUbOOYFsTC3HDM5wpOdTcioPWM4Go1z5/VUuXQvUcW A==; X-CSE-ConnectionGUID: bcJiNJT1QzeHIQaXtoSD3A== X-CSE-MsgGUID: DpM5xfPtQ0OIUaTOBbwEkQ== X-IronPort-AV: E=McAfee;i="6700,10204,11309"; a="54200568" X-IronPort-AV: E=Sophos;i="6.12,300,1728975600"; d="scan'208";a="54200568" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jan 2025 23:32:04 -0800 X-CSE-ConnectionGUID: c5GT/5gfTviZ7nzY6mxWrQ== X-CSE-MsgGUID: RF0PuZEwRcKSFcfrvOlHdw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,300,1728975600"; d="scan'208";a="103297858" Received: from fpallare-mobl4.ger.corp.intel.com (HELO jhogande-mobl1..) ([10.245.245.185]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jan 2025 23:32:03 -0800 From: =?utf-8?q?Jouni_H=C3=B6gander?= To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: =?utf-8?q?Jouni_H=C3=B6gander?= Subject: [PATCH v3 04/10] drm/i915/psr: Add register definitions for SFF_CTL and CFF_CTL registers Date: Thu, 9 Jan 2025 09:31:31 +0200 Message-ID: <20250109073137.1977494-5-jouni.hogander@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250109073137.1977494-1-jouni.hogander@intel.com> References: <20250109073137.1977494-1-jouni.hogander@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Add register definitions for SFF_CTL and CFF_CTL registers. Name them as LNL_SFF_CTL and LNL_CFF_CTL. v2: use _MMIO_TRANS instead of _MMIO_TRANS2 Signed-off-by: Jouni Högander --- drivers/gpu/drm/i915/display/intel_psr_regs.h | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_psr_regs.h b/drivers/gpu/drm/i915/display/intel_psr_regs.h index 9ad7611506e8..795e6b9cc575 100644 --- a/drivers/gpu/drm/i915/display/intel_psr_regs.h +++ b/drivers/gpu/drm/i915/display/intel_psr_regs.h @@ -251,6 +251,16 @@ #define ADLP_PSR2_MAN_TRK_CTL_SF_SINGLE_FULL_FRAME REG_BIT(14) #define ADLP_PSR2_MAN_TRK_CTL_SF_CONTINUOS_FULL_FRAME REG_BIT(13) +#define _LNL_SFF_CTL_A 0x60918 +#define _LNL_SFF_CTL_B 0x61918 +#define LNL_SFF_CTL(tran) _MMIO_TRANS(tran, _LNL_SFF_CTL_A, _LNL_SFF_CTL_B) +#define LNL_SFF_CTL_SF_SINGLE_FULL_FRAME REG_BIT(1) + +#define _LNL_CFF_CTL_A 0x6091c +#define _LNL_CFF_CTL_B 0x6191c +#define LNL_CFF_CTL(tran) _MMIO_TRANS(tran, _LNL_CFF_CTL_A, _LNL_CFF_CTL_B) +#define LNL_CFF_CTL_SF_CONTINUOUS_FULL_FRAME REG_BIT(1) + /* PSR2 Early transport */ #define _PIPE_SRCSZ_ERLY_TPT_A 0x70074 #define _PIPE_SRCSZ_ERLY_TPT_B 0x71074 From patchwork Thu Jan 9 07:31:32 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Jouni_H=C3=B6gander?= X-Patchwork-Id: 13932155 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BDBE1E77199 for ; Thu, 9 Jan 2025 07:32:07 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3877D10ED0E; Thu, 9 Jan 2025 07:32:07 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="JvRfBgS6"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) by gabe.freedesktop.org (Postfix) with ESMTPS id 902BE10ED05; Thu, 9 Jan 2025 07:32:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1736407926; x=1767943926; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=ImiA70a/tCccpu9ZH6R93IWt4TV7VK59ICQr61ksgcg=; b=JvRfBgS6EJgz6gg6Jcjxzezj4nqyxR9rfdV9T6QZG0GMnzDoEyd05hgE eyiSGJtO1n/QmTsDnVefXyoZajivMxY06Azxs2BmJn8Omoj3+Pt6+c+kV Q0dKeTE8/pzHasB97QXr5IBFb8i38ja01ZA0Gap2fCbOyEKYVGQ8u4XL/ uVRbvDRLGxNRiIFarKmuY+jPcNGF92+j3JvvSZa2VKeaMtC6BA9Xz3gnQ aTxB/pzyvJgIIQlhmpxMrhWXtchz/qv24fxy/zCMzXmkA0CSfy54mu02B 9SqWBd6T8hdT4iSEE65K11X82+XzvK4tJpgztJXXdJ6YTWT/bg5AT+dyh A==; X-CSE-ConnectionGUID: c/s90qPaQ3yYYeFW2+e9FQ== X-CSE-MsgGUID: lEWYcxVzRhirtnxdtS/XwA== X-IronPort-AV: E=McAfee;i="6700,10204,11309"; a="54200569" X-IronPort-AV: E=Sophos;i="6.12,300,1728975600"; d="scan'208";a="54200569" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jan 2025 23:32:05 -0800 X-CSE-ConnectionGUID: wD/O8UY5QXezNxhGoLf+Kw== X-CSE-MsgGUID: ZsfGPaZxR4Sf405/o11lVw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,300,1728975600"; d="scan'208";a="103297863" Received: from fpallare-mobl4.ger.corp.intel.com (HELO jhogande-mobl1..) ([10.245.245.185]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jan 2025 23:32:04 -0800 From: =?utf-8?q?Jouni_H=C3=B6gander?= To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: =?utf-8?q?Jouni_H=C3=B6gander?= Subject: [PATCH v3 05/10] drm/i915/psr: Use SFF_CTL on invalidate/flush for LunarLake onwards Date: Thu, 9 Jan 2025 09:31:32 +0200 Message-ID: <20250109073137.1977494-6-jouni.hogander@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250109073137.1977494-1-jouni.hogander@intel.com> References: <20250109073137.1977494-1-jouni.hogander@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" In LunarLake we have SFF_CTL register which contains SFF bit ored with respective SFF bit in PSR2_MAN_TRK_CTL register. Use this register instead of the bit in PSR2_MAN_TRK_CTL on frontbuffer tracking callbacks. This helps us avoiding taking psr mutex when performing atomic commit. We don't need to set the CFF bit as selective update configuration in PSR2_MAN_TRL_CTL is not overwritten anymore. I.e. we have valid configuration in PSR2_MAN_TRK_CTL and in plane SEL_FETCH_* registers when SFF bit gets cleared by the HW in case something triggers "frame change" event after SFF bit is cleared. Signed-off-by: Jouni Högander --- drivers/gpu/drm/i915/display/intel_psr.c | 22 +++++++++++++++------- 1 file changed, 15 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index e6f96a8b4fb0..85ecedd3162d 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -2345,7 +2345,7 @@ void intel_psr2_program_trans_man_trk_ctl(const struct intel_crtc_state *crtc_st struct intel_dp *intel_dp = enc_to_intel_dp(encoder); lockdep_assert_held(&intel_dp->psr.lock); - if (intel_dp->psr.psr2_sel_fetch_cff_enabled) + if (DISPLAY_VER(display) < 20 && intel_dp->psr.psr2_sel_fetch_cff_enabled) return; break; } @@ -3118,12 +3118,16 @@ static void intel_psr_configure_full_frame_update(struct intel_dp *intel_dp) if (!intel_dp->psr.psr2_sel_fetch_enabled) return; - intel_de_write(display, - PSR2_MAN_TRK_CTL(display, cpu_transcoder), - man_trk_ctl_enable_bit_get(display) | - man_trk_ctl_partial_frame_bit_get(display) | - man_trk_ctl_single_full_frame_bit_get(display) | - man_trk_ctl_continuos_full_frame(display)); + if (DISPLAY_VER(display) >= 20) + intel_de_write(display, LNL_SFF_CTL(cpu_transcoder), + LNL_SFF_CTL_SF_SINGLE_FULL_FRAME); + else + intel_de_write(display, + PSR2_MAN_TRK_CTL(display, cpu_transcoder), + man_trk_ctl_enable_bit_get(display) | + man_trk_ctl_partial_frame_bit_get(display) | + man_trk_ctl_single_full_frame_bit_get(display) | + man_trk_ctl_continuos_full_frame(display)); } static void _psr_invalidate_handle(struct intel_dp *intel_dp) @@ -3227,6 +3231,10 @@ static void _psr_flush_handle(struct intel_dp *intel_dp) * Still keep cff bit enabled as we don't have proper SU * configuration in case update is sent for any reason after * sff bit gets cleared by the HW on next vblank. + * + * NOTE: Setting cff bit is not needed for LunarLake onwards as + * we have own register for SFF bit and we are not overwriting + * existing SU configuration */ intel_psr_configure_full_frame_update(intel_dp); } From patchwork Thu Jan 9 07:31:33 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Jouni_H=C3=B6gander?= X-Patchwork-Id: 13932156 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 983BAE7719D for ; Thu, 9 Jan 2025 07:32:08 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1E2EF10ED11; Thu, 9 Jan 2025 07:32:08 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="mbGXOQex"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) by gabe.freedesktop.org (Postfix) with ESMTPS id F0B0A10ED0D; Thu, 9 Jan 2025 07:32:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1736407927; x=1767943927; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=xdm9gPmQtS8H5ujYzJccqaq8hK6irbrpo6YMacpNjlg=; b=mbGXOQex7s57+cqg1feGSpYxlYUhmJMrTDtncW6ytnKvgP/A6L6uCKNe ezZZTCMO73OtV70gCvJ5KYLwTAwgEGny2PTzJiSSxO8ccVysMUX4M+LhY difUY8dlfSu6emqXJVE0ioUIRg5htuyaAQCaii1fPKVnMitt9nliNMX/w siPu95K50aVfEUwbWSzvHhTUiIcxC8azU68DxPk3MgbOh/NXF//iqCTjs FO6zMFE2/tJoHr1bJQP83R9ZQ76NK5e14Qc9iUthKtMtjNF40YCXCKZRk DT2LB7Ef+fIbKLeuIVNXAuKa0cbt1Wqh3c/MbrWC1REXmK+2f9fJiGrFu g==; X-CSE-ConnectionGUID: khhPMykpRsecKspsks+EUQ== X-CSE-MsgGUID: dQDs00+ESU6BJ1J3vlsvNw== X-IronPort-AV: E=McAfee;i="6700,10204,11309"; a="54200570" X-IronPort-AV: E=Sophos;i="6.12,300,1728975600"; d="scan'208";a="54200570" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jan 2025 23:32:07 -0800 X-CSE-ConnectionGUID: ZqyK2xvyRfuzJK4PZUaDRA== X-CSE-MsgGUID: ocg8Fpk6TYiRIhKVeBBKkQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,300,1728975600"; d="scan'208";a="103297867" Received: from fpallare-mobl4.ger.corp.intel.com (HELO jhogande-mobl1..) ([10.245.245.185]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jan 2025 23:32:06 -0800 From: =?utf-8?q?Jouni_H=C3=B6gander?= To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: =?utf-8?q?Jouni_H=C3=B6gander?= Subject: [PATCH v3 06/10] drm/i915/psr: Allow writing PSR2_MAN_TRK_CTL using DSB Date: Thu, 9 Jan 2025 09:31:33 +0200 Message-ID: <20250109073137.1977494-7-jouni.hogander@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250109073137.1977494-1-jouni.hogander@intel.com> References: <20250109073137.1977494-1-jouni.hogander@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Allow writing PSR2_MAN_TRK_CTL using DSB by using intel_de_write_dsb. Do not check intel_dp->psr.lock being held when using DSB. This assertion doesn't make sense as in case of using DSB the actual write happens later and we are not taking intel_dp->psr.lock mutex over dsb commit. Signed-off-by: Jouni Högander --- drivers/gpu/drm/i915/display/intel_display.c | 2 +- drivers/gpu/drm/i915/display/intel_psr.c | 16 ++++++++++------ drivers/gpu/drm/i915/display/intel_psr.h | 4 +++- 3 files changed, 14 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 4271da219b41..5a5100f147a6 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -7089,7 +7089,7 @@ static void commit_pipe_pre_planes(struct intel_atomic_state *state, intel_pipe_fastset(old_crtc_state, new_crtc_state); } - intel_psr2_program_trans_man_trk_ctl(new_crtc_state); + intel_psr2_program_trans_man_trk_ctl(NULL, new_crtc_state); intel_atomic_update_watermarks(state, crtc); } diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 85ecedd3162d..1e99329b70a1 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -2330,7 +2330,8 @@ static void intel_psr_force_update(struct intel_dp *intel_dp) intel_de_write(display, CURSURFLIVE(display, intel_dp->psr.pipe), 0); } -void intel_psr2_program_trans_man_trk_ctl(const struct intel_crtc_state *crtc_state) +void intel_psr2_program_trans_man_trk_ctl(struct intel_dsb *dsb, + const struct intel_crtc_state *crtc_state) { struct intel_display *display = to_intel_display(crtc_state); struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); @@ -2344,20 +2345,23 @@ void intel_psr2_program_trans_man_trk_ctl(const struct intel_crtc_state *crtc_st crtc_state->uapi.encoder_mask) { struct intel_dp *intel_dp = enc_to_intel_dp(encoder); - lockdep_assert_held(&intel_dp->psr.lock); + if (!dsb) + lockdep_assert_held(&intel_dp->psr.lock); + if (DISPLAY_VER(display) < 20 && intel_dp->psr.psr2_sel_fetch_cff_enabled) return; break; } - intel_de_write(display, PSR2_MAN_TRK_CTL(display, cpu_transcoder), - crtc_state->psr2_man_track_ctl); + intel_de_write_dsb(display, dsb, + PSR2_MAN_TRK_CTL(display, cpu_transcoder), + crtc_state->psr2_man_track_ctl); if (!crtc_state->enable_psr2_su_region_et) return; - intel_de_write(display, PIPE_SRCSZ_ERLY_TPT(crtc->pipe), - crtc_state->pipe_srcsz_early_tpt); + intel_de_write_dsb(display, dsb, PIPE_SRCSZ_ERLY_TPT(crtc->pipe), + crtc_state->pipe_srcsz_early_tpt); } static void psr2_man_trk_ctl_calc(struct intel_crtc_state *crtc_state, diff --git a/drivers/gpu/drm/i915/display/intel_psr.h b/drivers/gpu/drm/i915/display/intel_psr.h index 956be263c09e..fc807817863e 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.h +++ b/drivers/gpu/drm/i915/display/intel_psr.h @@ -17,6 +17,7 @@ struct intel_crtc; struct intel_crtc_state; struct intel_display; struct intel_dp; +struct intel_dsb; struct intel_encoder; struct intel_plane; struct intel_plane_state; @@ -55,7 +56,8 @@ void intel_psr_wait_for_idle_locked(const struct intel_crtc_state *new_crtc_stat bool intel_psr_enabled(struct intel_dp *intel_dp); int intel_psr2_sel_fetch_update(struct intel_atomic_state *state, struct intel_crtc *crtc); -void intel_psr2_program_trans_man_trk_ctl(const struct intel_crtc_state *crtc_state); +void intel_psr2_program_trans_man_trk_ctl(struct intel_dsb *dsb, + const struct intel_crtc_state *crtc_state); void intel_psr_pause(struct intel_dp *intel_dp); void intel_psr_resume(struct intel_dp *intel_dp); bool intel_psr_needs_block_dc_vblank(const struct intel_crtc_state *crtc_state); From patchwork Thu Jan 9 07:31:34 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Jouni_H=C3=B6gander?= X-Patchwork-Id: 13932157 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9191BE77199 for ; Thu, 9 Jan 2025 07:32:10 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 229D110ED15; Thu, 9 Jan 2025 07:32:10 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; 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a="54200571" X-IronPort-AV: E=Sophos;i="6.12,300,1728975600"; d="scan'208";a="54200571" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jan 2025 23:32:08 -0800 X-CSE-ConnectionGUID: 7WYovxUOQiepo7YBr790lA== X-CSE-MsgGUID: mf8bj7hRQsKfoil4mhTgvA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,300,1728975600"; d="scan'208";a="103297870" Received: from fpallare-mobl4.ger.corp.intel.com (HELO jhogande-mobl1..) ([10.245.245.185]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jan 2025 23:32:07 -0800 From: =?utf-8?q?Jouni_H=C3=B6gander?= To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: =?utf-8?q?Jouni_H=C3=B6gander?= Subject: [PATCH v3 07/10] drm/i915/psr: Changes for PSR2_MAN_TRK_CTL handling when DSB is in use Date: Thu, 9 Jan 2025 09:31:34 +0200 Message-ID: <20250109073137.1977494-8-jouni.hogander@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250109073137.1977494-1-jouni.hogander@intel.com> References: <20250109073137.1977494-1-jouni.hogander@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Do needed changes to handle PSR2_MAN_TRK_CTL correctly when DSB is in use: 1. Write PSR2_MAN_TRK_CTL in commit_pipe_pre_planes only when not using DSB. 2. Add PSR2_MAN_TRK_CTL writing into DSB commit in intel_atomic_dsb_finish. Taking PSR lock over DSB commit is not needed because PSR2_MAN_TRK_CTL is now written only by DSB. Signed-off-by: Jouni Högander --- drivers/gpu/drm/i915/display/intel_display.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 5a5100f147a6..d76454a69399 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -7089,7 +7089,8 @@ static void commit_pipe_pre_planes(struct intel_atomic_state *state, intel_pipe_fastset(old_crtc_state, new_crtc_state); } - intel_psr2_program_trans_man_trk_ctl(NULL, new_crtc_state); + if (!new_crtc_state->use_dsb) + intel_psr2_program_trans_man_trk_ctl(NULL, new_crtc_state); intel_atomic_update_watermarks(state, crtc); } @@ -7678,6 +7679,8 @@ static void intel_atomic_dsb_finish(struct intel_atomic_state *state, new_crtc_state); bdw_set_pipe_misc(new_crtc_state->dsb_commit, new_crtc_state); + intel_psr2_program_trans_man_trk_ctl(new_crtc_state->dsb_commit, + new_crtc_state); intel_crtc_planes_update_arm(new_crtc_state->dsb_commit, state, crtc); From patchwork Thu Jan 9 07:31:35 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Jouni_H=C3=B6gander?= X-Patchwork-Id: 13932158 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 40B82E7719B for ; Thu, 9 Jan 2025 07:32:12 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A833010ED0B; Thu, 9 Jan 2025 07:32:11 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="QvqQD3cn"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) by gabe.freedesktop.org (Postfix) with ESMTPS id 1CAFB10ED13; Thu, 9 Jan 2025 07:32:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1736407930; x=1767943930; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=4TThNvqJhUHjgMP3aAWuYX/9LLrON/3R1NLuBUenNFo=; b=QvqQD3cno5KZPWtm7K0xIiYVQuoPnlkn34hSiD3mjFeQE80IG4eHZfRs 1xmy60e/QpxFC+G1QkaB5nZxO26TIRdjVYZXA7SwylkQf+ohiX78hcmHg J+CDocdmPDLMaBGmuvawBNPNCJ1IihpzSz/6wmsqhpmEBmNFnXTQpRHog xlZDfh6YiQfGynzypR6zKOwBppSVTMnH84xk8s7wtfQLDKhiM6JDJdp/Z Dk0c/IQp3t1iZlBxvcSR7riNp+lgZdMNJ1JOVO5R/1qoHUKunb5IoAdZE tP6qnjfIOYeU0YrOX/I4UsS36UyMLnDUgu68uZm53r3QbgY2DUnTqGUgJ Q==; X-CSE-ConnectionGUID: 5NicQbTjRGyIpMb7ByRDuw== X-CSE-MsgGUID: 2x+/UkDoQHq6c88/An65bw== X-IronPort-AV: E=McAfee;i="6700,10204,11309"; a="54200572" X-IronPort-AV: E=Sophos;i="6.12,300,1728975600"; d="scan'208";a="54200572" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jan 2025 23:32:10 -0800 X-CSE-ConnectionGUID: +ZBaDs95SYaq24MXRSFX3g== X-CSE-MsgGUID: 2cJNQzChSdSlDTnLPn2vgA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,300,1728975600"; d="scan'208";a="103297875" Received: from fpallare-mobl4.ger.corp.intel.com (HELO jhogande-mobl1..) ([10.245.245.185]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jan 2025 23:32:08 -0800 From: =?utf-8?q?Jouni_H=C3=B6gander?= To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: =?utf-8?q?Jouni_H=C3=B6gander?= Subject: [PATCH v3 08/10] drm/i915/psr: Add intel_psr_is_psr_mode_changing Date: Thu, 9 Jan 2025 09:31:35 +0200 Message-ID: <20250109073137.1977494-9-jouni.hogander@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250109073137.1977494-1-jouni.hogander@intel.com> References: <20250109073137.1977494-1-jouni.hogander@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Add new interface for checking possible PSR/PR mode change. We need this information to decide if DSB can be used. Signed-off-by: Jouni Högander --- drivers/gpu/drm/i915/display/intel_psr.c | 20 ++++++++++++++++++++ drivers/gpu/drm/i915/display/intel_psr.h | 2 ++ 2 files changed, 22 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 1e99329b70a1..90e36e34e0c7 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -225,6 +225,26 @@ bool intel_psr_needs_aux_io_power(struct intel_encoder *encoder, intel_encoder_can_psr(encoder); } +/** + * intel_psr_is_psr_mode_changing - Check if PSR/PR mode is changing + * @old_crtc_state: pointer to old intel_crtc_state + * @new_crtc_state: pointer to new intel_crtc_state + * + * This can be used to figure out if PSR/PR mode is changing between old and new + * crtc state. + * + * Returns true if mode is changing, false if mode is not changing. + */ +bool intel_psr_is_psr_mode_changing(const struct intel_crtc_state *old_crtc_state, + const struct intel_crtc_state *new_crtc_state) +{ + return old_crtc_state->has_psr != new_crtc_state->has_psr || + old_crtc_state->has_sel_update != new_crtc_state->has_sel_update || + old_crtc_state->has_panel_replay != new_crtc_state->has_panel_replay || + old_crtc_state->enable_psr2_su_region_et != + new_crtc_state->enable_psr2_su_region_et; +} + static bool psr_global_enabled(struct intel_dp *intel_dp) { struct intel_display *display = to_intel_display(intel_dp); diff --git a/drivers/gpu/drm/i915/display/intel_psr.h b/drivers/gpu/drm/i915/display/intel_psr.h index fc807817863e..cc6267e87933 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.h +++ b/drivers/gpu/drm/i915/display/intel_psr.h @@ -26,6 +26,8 @@ struct intel_plane_state; (intel_dp)->psr.source_panel_replay_support) bool intel_encoder_can_psr(struct intel_encoder *encoder); +bool intel_psr_is_psr_mode_changing(const struct intel_crtc_state *old_crtc_state, + const struct intel_crtc_state *new_crtc_state); bool intel_psr_needs_aux_io_power(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state); void intel_psr_init_dpcd(struct intel_dp *intel_dp); From patchwork Thu Jan 9 07:31:36 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Jouni_H=C3=B6gander?= X-Patchwork-Id: 13932159 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 94B8EE7719A for ; Thu, 9 Jan 2025 07:32:13 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 23A2610ED17; Thu, 9 Jan 2025 07:32:13 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="k3M2uLYX"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8FD3D10ECFD; Thu, 9 Jan 2025 07:32:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1736407932; x=1767943932; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=rmmypgC+tfq9aRs9O9U8Swm6/bu572VHH9qei/eLsi4=; b=k3M2uLYXKQ/aObbgEkzOMNm3s1l+TUpE3KHdU4YluiS0Jj1K7buZxyZp VLVfKlNycDpLDLYC38hLNg2GcLHNf2zbLg7QmS3OIysw9v0lryyQc82dd R85rLBFjE3Aslt7ZwmkHeXGo7d2tJ+LHPTreEvAtXRwSupvXFatALquuF 29yN4ysV2puz44ir3t+ekzjHT0uWbuCAdQELbt/4h5dblG0SFkrluk9Dk q+JBm5sQwFQmqn94dUqlzeLx3XERFkGPoxL0P4MHkTszfdi4KB3MFV+pZ cEw4q9BASUtjtKBsgNAsNZA9an8ssD0DeSxcfQAiLXtNyZBSgZ3PeT+ke w==; X-CSE-ConnectionGUID: tjdUjR1iTmu66BkbTDppBg== X-CSE-MsgGUID: Y6nLWSl9Q3GDJJkLlmGNyw== X-IronPort-AV: E=McAfee;i="6700,10204,11309"; a="54200574" X-IronPort-AV: E=Sophos;i="6.12,300,1728975600"; d="scan'208";a="54200574" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jan 2025 23:32:12 -0800 X-CSE-ConnectionGUID: JvCPgw7uRcic1IyiIxHAvg== X-CSE-MsgGUID: lVLyO9zST1uOof1lM/Ux2g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,300,1728975600"; d="scan'208";a="103297878" Received: from fpallare-mobl4.ger.corp.intel.com (HELO jhogande-mobl1..) ([10.245.245.185]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jan 2025 23:32:10 -0800 From: =?utf-8?q?Jouni_H=C3=B6gander?= To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: =?utf-8?q?Jouni_H=C3=B6gander?= Subject: [PATCH v3 09/10] drm/i915/display: Don't use DSB if psr mode changing Date: Thu, 9 Jan 2025 09:31:36 +0200 Message-ID: <20250109073137.1977494-10-jouni.hogander@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250109073137.1977494-1-jouni.hogander@intel.com> References: <20250109073137.1977494-1-jouni.hogander@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Changing PSR mode using DSB is not implemented. Do not use DSB when PSR mode is changing. Signed-off-by: Jouni Högander --- drivers/gpu/drm/i915/display/intel_display.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index d76454a69399..e448ff64660a 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -7647,7 +7647,8 @@ static void intel_atomic_dsb_finish(struct intel_atomic_state *state, !new_crtc_state->scaler_state.scaler_users && !old_crtc_state->scaler_state.scaler_users && !intel_crtc_needs_modeset(new_crtc_state) && - !intel_crtc_needs_fastset(new_crtc_state); + !intel_crtc_needs_fastset(new_crtc_state) && + !intel_psr_is_psr_mode_changing(old_crtc_state, new_crtc_state); if (!new_crtc_state->use_dsb && !new_crtc_state->dsb_color_vblank) return; From patchwork Thu Jan 9 07:31:37 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Jouni_H=C3=B6gander?= X-Patchwork-Id: 13932160 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 56549E7719B for ; Thu, 9 Jan 2025 07:32:15 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E12F810ED16; Thu, 9 Jan 2025 07:32:14 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="cc1DEUtY"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) by gabe.freedesktop.org (Postfix) with ESMTPS id 0AC9210ED13; Thu, 9 Jan 2025 07:32:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1736407933; x=1767943933; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=80MINAGWLC0tBQUuNJncqoEQe3+fTTWNG/fd7/QT0N0=; b=cc1DEUtYyoNbK2SGejZayJU/NpooVwOh2ppKAY6+j2lHpXfsq59Y7VFM GJGtyY3TRy4YWBUgqzidu8HpfHqpNQnoPkMChjRZz/YXZT6hjC5YMaZHu CI/6hwRpp3Y+Ea49Qe4dTcAWDLKootF2oTr15aPVvc+Fm/PLmX9p35Fd5 WoC82/xw7YVhhrZm60rp4UXVqmLnC73otCx56OXj20khSJip3RNajgAfj VI5MuncfnMQTv/UPXYLYni1/JiPCxmp7zCqvTGP9BsSH1OI7NOCwODIRh XAdEB6JfTro6GCI5FnydZgnpWCaNZ2t2RV/e69pp8h3C6UKnBaBfV/rGy A==; X-CSE-ConnectionGUID: RkiQhKCtS7OXzgBVGv2hnQ== X-CSE-MsgGUID: e2GOzZESSrCLXLZJYsfFTg== X-IronPort-AV: E=McAfee;i="6700,10204,11309"; a="54200575" X-IronPort-AV: E=Sophos;i="6.12,300,1728975600"; d="scan'208";a="54200575" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jan 2025 23:32:13 -0800 X-CSE-ConnectionGUID: L0s5sGU/QgeqcMvVieYTuQ== X-CSE-MsgGUID: EbrhMVBiSKeD98QZBcM1+A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,300,1728975600"; d="scan'208";a="103297881" Received: from fpallare-mobl4.ger.corp.intel.com (HELO jhogande-mobl1..) ([10.245.245.185]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jan 2025 23:32:12 -0800 From: =?utf-8?q?Jouni_H=C3=B6gander?= To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: =?utf-8?q?Jouni_H=C3=B6gander?= Subject: [PATCH v3 10/10] drm/i915/psr: Allow DSB usage when PSR is enabled Date: Thu, 9 Jan 2025 09:31:37 +0200 Message-ID: <20250109073137.1977494-11-jouni.hogander@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250109073137.1977494-1-jouni.hogander@intel.com> References: <20250109073137.1977494-1-jouni.hogander@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Now as we have correct PSR2_MAN_TRK_CTL handling in place we can allow DSB usage also when PSR is enabled for LunarLake onwards. Signed-off-by: Jouni Högander --- drivers/gpu/drm/i915/display/intel_display.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index e448ff64660a..58575800fad2 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -7631,6 +7631,7 @@ static void intel_atomic_dsb_finish(struct intel_atomic_state *state, intel_atomic_get_old_crtc_state(state, crtc); struct intel_crtc_state *new_crtc_state = intel_atomic_get_new_crtc_state(state, crtc); + struct intel_display *display = to_intel_display(crtc); if (!new_crtc_state->hw.active) return; @@ -7643,7 +7644,7 @@ static void intel_atomic_dsb_finish(struct intel_atomic_state *state, new_crtc_state->update_planes && !new_crtc_state->vrr.enable && !new_crtc_state->do_async_flip && - !new_crtc_state->has_psr && + (DISPLAY_VER(display) >= 20 || !new_crtc_state->has_psr) && !new_crtc_state->scaler_state.scaler_users && !old_crtc_state->scaler_state.scaler_users && !intel_crtc_needs_modeset(new_crtc_state) &&