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However, on MTL and Beyond these strategies are only active in certain conditions where the system is TDP limited. So, they don't conflict, but help the waitboost by guaranteeing a bit more of GT frequency. Without these strategies we were likely leaving some performance behind on some scenarios. With this change in place, the enabling/disabling of DCC and Balancer will now be chosen by GuC, on a platform/GT basis. v2: - Fix typos and be clear on GuC decision on platform basis (Vinay) - Limit change to MTL and beyond, where GuC started to take TDP limit into consideration. v3: Fix compilation. Actually amend the changes... Reviewed-by: Vinay Belgaumkar #v1 Signed-off-by: Rodrigo Vivi Reviewed-by: Vinay Belgaumkar --- drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 22 ++++++++++++++------- 1 file changed, 15 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c index 706fffca698b..1f8e6f7c2c67 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c @@ -357,21 +357,29 @@ static u32 slpc_decode_max_freq(struct intel_guc_slpc *slpc) GT_FREQUENCY_MULTIPLIER, GEN9_FREQ_SCALER); } -static void slpc_shared_data_reset(struct slpc_shared_data *data) +static void slpc_shared_data_reset(struct intel_guc_slpc *slpc) { - memset(data, 0, sizeof(struct slpc_shared_data)); + struct drm_i915_private *i915 = slpc_to_i915(slpc); + struct slpc_shared_data *data = slpc->vaddr; + memset(data, 0, sizeof(struct slpc_shared_data)); data->header.size = sizeof(struct slpc_shared_data); /* Enable only GTPERF task, disable others */ slpc_mem_set_enabled(data, SLPC_PARAM_TASK_ENABLE_GTPERF, SLPC_PARAM_TASK_DISABLE_GTPERF); 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Fri, 10 Jan 2025 14:46:48 +0000 From: Rodrigo Vivi To: CC: Rodrigo Vivi , Vinay Belgaumkar Subject: [PATCH 2/2] drm/i915/guc/slpc: Print more SLPC debug status information Date: Fri, 10 Jan 2025 09:46:40 -0500 Message-ID: <20250110144640.1032250-2-rodrigo.vivi@intel.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250110144640.1032250-1-rodrigo.vivi@intel.com> References: <20250110144640.1032250-1-rodrigo.vivi@intel.com> X-ClientProxiedBy: MW4PR03CA0233.namprd03.prod.outlook.com (2603:10b6:303:b9::28) To SN7PR11MB8282.namprd11.prod.outlook.com (2603:10b6:806:269::11) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN7PR11MB8282:EE_|BL1PR11MB5271:EE_ X-MS-Office365-Filtering-Correlation-Id: 63a71aff-327c-4fd3-7af5-08dd31859c71 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|366016|1800799024|376014; X-Microsoft-Antispam-Message-Info: oVmhdIUggNzlHf4u+DQGJEi9JKwI07pToo/IDAlJeVz9TKEJ32fpJk8UovUoM/z3ongqsxE2kOlVhgBWazLV85tqIMPg2mIo5njghC0I3S0zijNLw9GaFx2l2cmglhtjp48YzNBtlYXxFXHD43/GoJIsubELavAJtkL2VWMFKr8KrRomIyW5ATf/OdsVL3DiGC6ZTZzH96JZ+doXx1dYub5E1m4RzJVjm/neJrarv9Jep7t9PGySh5C4WRgLUBQMTFM3mKmuLMJ/bV63ZZYOF6MffprpUuNyfd/HMwylqcXOWX68NUrqZkk78tw6DU1Mn+tmPxj2wg8asnmNbqQr8YyuimD++dFznfGQyChd8792xHiPTSx5PJcRk0CpIwxuM+kPr07k5HnZ0DxVET5jTrqg2q/YbX6QoQvaMm7+DMp7d4OjCJqvWtb1773VmlfctRdM3jEd0z0DCOJ08YLQzGuZWL/0KXp9ZArNJxVTyq+ZfwxMjt3pY4+Bqx23eU1ZKfgl15sFrKEvnYHjm2FTWZGjsNzTYBfAKlALytA8J0OFhqw+qFRKKOWna8cXFgDJsnoVNcDJV545cl2cg9XkE4YtZ813H0/CNlslhlkVQs+BUBqluL3tq4bSB3o2VROXkqCED7P+SDhSz0Uj2wpX5NNAaCuV0gD8VAUlL4MThBqb4QQDlpijYGjaV5XGgpPi1p6/o45BIAIssVTGse1YFyFL+wYioGvURUXocVqGjGsvrosNi5qniHtv4TbgyRflOD1WdlvgzYqYox8TFjHRBgbc4vHIV4/G38K1E7wt2+3OtzackRvKUuxBb5ndztr2YSbAv5n6SWU1MzsHjXLaZUj2t15thbGYB7kAKq2Q7Hnbl4wpP9EMbrcof2nOTMY+MAaN5IdtINlPNxfg0PPEfvzK9se7n/b0Bd1jJW4aGB/RDZHqQePDhgTMjn7945HXe5j17NH7Zw6+NNl6A3uf7181ThRIxZMEtYV6eAheOoBolZtKVbojAGEWUmoN0I6UvQl+CFZWf8imIfSKRj975P9ALOdPL8kRJ46+1MdDuv8b2KKwS2TC96DR5zrchcZrE0cqeAswrbMy+BGeYt3XphIjz8kW5lGxTE6SF5k7w3hXT6oZFwEaAZ0/ifSgGM0ZHKUDb112zlN0fkhHUMFQKQXVLAwpSKqkhKGb8QqcIAD5eDaEQmwRJGRxjuaXCu2LcIC+tVw0zUWjI+dZqf8nfUPu32ZN8gkU4K8d0YgEddvEInsBwQ6EsfXCT6T6XT0ig4fJH6/nqYa6HP9DScQTpbDjifVOdlDoBX6A/ugyIddn6ZLk4I0+rGm8O7YtmijfgrCfZaf6MyFTevRLY6/FPCNLmHMukHI+P6vfIU9nnTfiZjJHmu4kM67c+uWE1yV9 X-Forefront-Antispam-Report: CIP:255.255.255.255; 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drm_printf(p, "\tGTPERF task active: %s\n", str_yes_no(slpc_tasks->status & SLPC_GTPERF_TASK_ENABLED)); + drm_printf(p, "\tDCC enabled: %s\n", + str_yes_no(slpc_tasks->status & + SLPC_DCC_TASK_ENABLED)); + drm_printf(p, "\tDCC in: %s\n", + str_yes_no(slpc_tasks->status & SLPC_IN_DCC)); + drm_printf(p, "\tBalancer enabled: %s\n", + str_yes_no(slpc_tasks->status & + SLPC_BALANCER_ENABLED)); + drm_printf(p, "\tIBC enabled: %s\n", + str_yes_no(slpc_tasks->status & + SLPC_IBC_TASK_ENABLED)); + drm_printf(p, "\tBalancer IA LMT enabled: %s\n", + str_yes_no(slpc_tasks->status & + SLPC_BALANCER_IA_LMT_ENABLED)); + drm_printf(p, "\tBalancer IA LMT active: %s\n", + str_yes_no(slpc_tasks->status & + SLPC_BALANCER_IA_LMT_ACTIVE)); drm_printf(p, "\tMax freq: %u MHz\n", slpc_decode_max_freq(slpc)); drm_printf(p, "\tMin freq: %u MHz\n",