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([2804:14c:485:4b61:8c53:b609:d83:9568]) by smtp.gmail.com with ESMTPSA id 5614622812f47-3f037653ff2sm2196609b6e.13.2025.01.12.04.29.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 12 Jan 2025 04:30:00 -0800 (PST) From: Fabio Estevam To: shawnguo@kernel.org Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, kernel@pengutronix.de, devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, Fabio Estevam Subject: [PATCH 1/2] ARM: dts: imx5: Fix the CCM interrupts description Date: Sun, 12 Jan 2025 09:29:38 -0300 Message-Id: <20250112122939.988309-1-festevam@gmail.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: imx@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Fabio Estevam On the i.MX5 chips the peripheral interrupts are represented directly only by their interrupt numbers. The CCM nodes are not following this format and cause the following dt-schema warnings: ccm@73fd4000: interrupts: [[0], [71], [4], [0], [72], [4]] is too long Fix it by passing only the two interrupt numbers. Run-time tested in on an imx53-qsb board. Signed-off-by: Fabio Estevam --- arch/arm/boot/dts/nxp/imx/imx50.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx51.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx53.dtsi | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/nxp/imx/imx50.dtsi b/arch/arm/boot/dts/nxp/imx/imx50.dtsi index 1b6f444443dd..f0b12a70f614 100644 --- a/arch/arm/boot/dts/nxp/imx/imx50.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx50.dtsi @@ -338,7 +338,7 @@ src: reset-controller@53fd0000 { clks: ccm@53fd4000 { compatible = "fsl,imx50-ccm"; reg = <0x53fd4000 0x4000>; - interrupts = <0 71 0x04 0 72 0x04>; + interrupts = <71 72>; #clock-cells = <1>; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx51.dtsi b/arch/arm/boot/dts/nxp/imx/imx51.dtsi index cc88da4d7785..2bfb6baa67fc 100644 --- a/arch/arm/boot/dts/nxp/imx/imx51.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx51.dtsi @@ -458,7 +458,7 @@ src: reset-controller@73fd0000 { clks: ccm@73fd4000 { compatible = "fsl,imx51-ccm"; reg = <0x73fd4000 0x4000>; - interrupts = <0 71 0x04 0 72 0x04>; + interrupts = <71 72>; #clock-cells = <1>; }; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx53.dtsi b/arch/arm/boot/dts/nxp/imx/imx53.dtsi index 845e2bf8460a..b7147cc7a316 100644 --- a/arch/arm/boot/dts/nxp/imx/imx53.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx53.dtsi @@ -598,7 +598,7 @@ src: reset-controller@53fd0000 { clks: ccm@53fd4000 { compatible = "fsl,imx53-ccm"; reg = <0x53fd4000 0x4000>; - interrupts = <0 71 0x04 0 72 0x04>; + interrupts = <71 72>; #clock-cells = <1>; }; From patchwork Sun Jan 12 12:29:39 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabio Estevam X-Patchwork-Id: 13936350 Received: from mail-oi1-f177.google.com (mail-oi1-f177.google.com [209.85.167.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 091C91B3921 for ; Sun, 12 Jan 2025 12:30:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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([2804:14c:485:4b61:8c53:b609:d83:9568]) by smtp.gmail.com with ESMTPSA id 5614622812f47-3f037653ff2sm2196609b6e.13.2025.01.12.04.30.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 12 Jan 2025 04:30:05 -0800 (PST) From: Fabio Estevam To: shawnguo@kernel.org Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, kernel@pengutronix.de, devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, Fabio Estevam Subject: [PATCH 2/2] dt-bindings: clock: imx5: Fix the CCM interrupts description Date: Sun, 12 Jan 2025 09:29:39 -0300 Message-Id: <20250112122939.988309-2-festevam@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250112122939.988309-1-festevam@gmail.com> References: <20250112122939.988309-1-festevam@gmail.com> Precedence: bulk X-Mailing-List: imx@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Fabio Estevam On the i.MX5 chips the peripheral interrupts are represented directly only by their interrupt numbers. Make the CCM nodes to follow this format. Signed-off-by: Fabio Estevam --- Documentation/devicetree/bindings/clock/imx5-clock.yaml | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/imx5-clock.yaml b/Documentation/devicetree/bindings/clock/imx5-clock.yaml index 423c0142c1d3..ad03c0a13e64 100644 --- a/Documentation/devicetree/bindings/clock/imx5-clock.yaml +++ b/Documentation/devicetree/bindings/clock/imx5-clock.yaml @@ -46,13 +46,11 @@ additionalProperties: false examples: - | #include - #include clock-controller@53fd4000{ compatible = "fsl,imx53-ccm"; reg = <0x53fd4000 0x4000>; - interrupts = <0 71 IRQ_TYPE_LEVEL_HIGH>, - <0 72 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <71 72>; #clock-cells = <1>; }; ...