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Mon, 13 Jan 2025 16:34:46 +0800 X-QQ-mid: xmsmtpt1736757286t1rwzrinv Message-ID: X-QQ-XMAILINFO: OaoBA5NOFC/jZfSGVN0SnHadfAwtrnU+ikD7O5PPsJUS0WT2vLJi7UuroR5FNl ZSdeTCt4UtRpYt4usfzlRCVkvwo1o/TOR8QjqBoGmz0Gpt9XJ9RaMtuGC0Gy0FTbaaDCQ/i6aek7 haxaZItqRyiZ68xM4IA0w6fMgCVVGrmllzGcM1HpcjRHNDGMpi6SvQO1GMduaKuRHQa/1xszrwyE KPHwgU3Jmc4K+GsbpHZQgtkV9Gyib2jsknFoqMpzptGx41ofGCbSx/rK0pBndNfqLcAuRPlgHwtf OaE5Zqvz2YHoMOegA0L/xOrAK45W0F/qIHV2Xy6n5fQTbmX+KL6bqa2RQwFtMSdveNOAl6BKb7Ap fO9yQzZvHg2eoYmxcC3gjCzu2fNuVH6J0LyfrZ6DyEc5/lJ6cLmRPKjiTBwYTl79eNVYSwLpRhNV Eos2toGsamnXK3mtkZZCoh1dxBi8dC4+p1Vg3rXAOdBRc1xR4RI2i/MsTAQnpnukPbbbJQ22H+1K lmNLhKpu0AY7bCazNW7CJ+gUSXmUEQSWJDvRwc8lZmoPb+EzpqjexkqwZOnwpBEYJ6uP7wd7f/uq 0/9z49uUYOhjB1AJEWf+a4vOtmQBPkXPMhveQN1BpCTJ8D8XZQt9K44U/XOM0/nnpyd6JGkFm9er 1i0XTaS3KBm0WaC+ULQpeDPTyhjB3r2LfYbzHk03ndzw0aDrtsoi2kB3axjCfmDRpJzskcaLPs6i XJtWeefDNxNyV2H/MZoXORJc2FKUSsdOq9LPGQa+QIIX2Z+WChTi5jM99L2zO298NCkRQ59VMEL3 nzz5kqifywf/AnRs2X2witd6N82vBYxyQOrQlVV7XMlbc2c+lBdy71qTEyefHeov06sAnwYBbmCD aWLjzpfl4UzD7uA/Z+bxBLVyWjAt1ZaSbyXeRHW7/3zBXIld2c6wByZikTPHmLqvszhChPn5PEER xgCHR+FS/ESdiMyl51OA== X-QQ-XMRINFO: OD9hHCdaPRBwq3WW+NvGbIU= From: xiaopeitux@foxmail.com To: =vkoul@kernel.org, aford173@gmail.com, geert@linux-m68k.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Pei Xiao Subject: [PATCH V5] phy: freescale: fsl-samsung-hdmi: fix build error in fsl_samsung_hdmi_phy_configure_pll_lock_det Date: Mon, 13 Jan 2025 16:34:45 +0800 X-OQ-MSGID: X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250113_003515_176841_528E2499 X-CRM114-Status: GOOD ( 11.84 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org From: Pei Xiao FIELD_PREP() checks that a value fits into the available bitfield, but the index div equals to 4,is out of range. which gcc complains about: In function ‘fsl_samsung_hdmi_phy_configure_pll_lock_det’, inlined from ‘fsl_samsung_hdmi_phy_configure’ at drivers/phy/freescale/phy-fsl-samsung-hdmi.c :470:2: ././include/linux/compiler_types.h:542:38: error: call to ‘__compiletime_assert_538’ declared with attribute error: FIELD_PREP: value too large for the field 542 | _compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__) | ^ ././include/linux/compiler_types.h:523:4: note: in definition of macro ‘__compiletime_assert’ 523 | prefix ## suffix(); | ^~~~~~ ././include/linux/compiler_types.h:542:2: note: in expansion of macro ‘_compiletime_assert’ 542 | _compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__) REG12_CK_DIV_MASK only two bit, limit div to range 0~3, so build error will fix. Fixes: d567679f2b6a ("phy: freescale: fsl-samsung-hdmi: Clean up fld_tg_code calculation") Signed-off-by: Pei Xiao Changlog: Reviewed-by: Adam Ford --- V5: add return ret from Geert suggestion V4: change to use if statement V3: change to use do-while V2: change to use logical AND --- drivers/phy/freescale/phy-fsl-samsung-hdmi.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/drivers/phy/freescale/phy-fsl-samsung-hdmi.c b/drivers/phy/freescale/phy-fsl-samsung-hdmi.c index 5eac70a1e858..6817ceabaab4 100644 --- a/drivers/phy/freescale/phy-fsl-samsung-hdmi.c +++ b/drivers/phy/freescale/phy-fsl-samsung-hdmi.c @@ -325,7 +325,7 @@ to_fsl_samsung_hdmi_phy(struct clk_hw *hw) return container_of(hw, struct fsl_samsung_hdmi_phy, hw); } -static void +static int fsl_samsung_hdmi_phy_configure_pll_lock_det(struct fsl_samsung_hdmi_phy *phy, const struct phy_config *cfg) { @@ -341,6 +341,9 @@ fsl_samsung_hdmi_phy_configure_pll_lock_det(struct fsl_samsung_hdmi_phy *phy, break; } + if (unlikely(div == 4)) + return -EINVAL; + writeb(FIELD_PREP(REG12_CK_DIV_MASK, div), phy->regs + PHY_REG(12)); /* @@ -364,6 +367,8 @@ fsl_samsung_hdmi_phy_configure_pll_lock_det(struct fsl_samsung_hdmi_phy *phy, FIELD_PREP(REG14_RP_CODE_MASK, 2) | FIELD_PREP(REG14_TG_CODE_HIGH_MASK, fld_tg_code >> 8), phy->regs + PHY_REG(14)); + + return 0; } static unsigned long fsl_samsung_hdmi_phy_find_pms(unsigned long fout, u8 *p, u16 *m, u8 *s) @@ -467,7 +472,11 @@ static int fsl_samsung_hdmi_phy_configure(struct fsl_samsung_hdmi_phy *phy, writeb(REG21_SEL_TX_CK_INV | FIELD_PREP(REG21_PMS_S_MASK, cfg->pll_div_regs[2] >> 4), phy->regs + PHY_REG(21)); - fsl_samsung_hdmi_phy_configure_pll_lock_det(phy, cfg); + ret = fsl_samsung_hdmi_phy_configure_pll_lock_det(phy, cfg); + if (ret) { + dev_err(phy->dev, "pixclock too large\n"); + return ret; + } writeb(REG33_FIX_DA | REG33_MODE_SET_DONE, phy->regs + PHY_REG(33));