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Mon, 13 Jan 2025 12:13:26 GMT Received: from hu-pbrahma-hyd.qualcomm.com (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Mon, 13 Jan 2025 04:13:23 -0800 From: Pratyush Brahma Date: Mon, 13 Jan 2025 17:43:06 +0530 Subject: [PATCH v2 1/3] arm64: dts: qcom: sa8775p-iot: Introduce new memory map Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <20250113-sa8775p-iot-memory-map-v2-1-aa2bb544706e@quicinc.com> References: <20250113-sa8775p-iot-memory-map-v2-0-aa2bb544706e@quicinc.com> In-Reply-To: <20250113-sa8775p-iot-memory-map-v2-0-aa2bb544706e@quicinc.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: , , , Pratyush Brahma X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1736770400; l=3527; i=quic_pbrahma@quicinc.com; s=20250113; h=from:subject:message-id; bh=aeU7dSDhKpxycdZNdoYxHNT+NLLOHb3vf02M6Oa4K1U=; b=voZrkp8EF1cmTFx9nEs+Dmj3xAZccp5OL7/6cnCDPJbHU+Vn/qJE7iIuv+zyrPeRzjdTIlEBU C3IqwQW7iaNDL5OnIsjZ82zT8vDnvvFKw4RWYwkpElgloMJDdIgQka3 X-Developer-Key: i=quic_pbrahma@quicinc.com; a=ed25519; pk=YvfZKC4rRO1Fot+wlXZqsoQWnAtLqrpMyEzslw3Ji+M= X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: o8e5ErssszaRikQpR6GunjGfPveXUfVj X-Proofpoint-GUID: o8e5ErssszaRikQpR6GunjGfPveXUfVj X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 mlxlogscore=704 priorityscore=1501 adultscore=0 suspectscore=0 clxscore=1015 phishscore=0 spamscore=0 mlxscore=0 lowpriorityscore=0 bulkscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2501130103 SA8775P has a memory map which caters to the auto specific requirements. IOT boards (viz. QCS9100*, QCS9075*) which inherit the memory map of SA8775P require a slightly different memory map as compared to SA8775P auto parts. This dtsi describes the updated memory map applicable for all the IOT boards which inherit the initial SA8775P memory map. This is not applicable for non-IOT boards. Some new carveouts (viz. gunyah_md and a few pil dtb carveouts) have been introduced and the size and base addresses have been updated for a few of existing carveouts compared to SA8775P. Also, tz_ffi_mem carveout and its corresponding scm reference has been removed as it is not required for these boards. Incorporate these changes in the updated memory map. Signed-off-by: Pratyush Brahma --- arch/arm64/boot/dts/qcom/sa8775p-iot.dtsi | 105 ++++++++++++++++++++++++++++++ 1 file changed, 105 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sa8775p-iot.dtsi b/arch/arm64/boot/dts/qcom/sa8775p-iot.dtsi new file mode 100644 index 0000000000000000000000000000000000000000..6252294ff7c32be1a0a9c4f7ed3d4422e99f98df --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sa8775p-iot.dtsi @@ -0,0 +1,105 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/delete-node/ &pil_adsp_mem; +/delete-node/ &pil_gdsp0_mem; +/delete-node/ &pil_gdsp1_mem; +/delete-node/ &pil_cdsp0_mem; +/delete-node/ &pil_gpu_mem; +/delete-node/ &pil_cdsp1_mem; +/delete-node/ &pil_cvp_mem; +/delete-node/ &pil_video_mem; +/delete-node/ &audio_mdf_mem; +/delete-node/ &hyptz_reserved_mem; +/delete-node/ &trusted_apps_mem; + +/ { + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + gunyah_md_mem: gunyah-md@91a80000 { + reg = <0x0 0x91a80000 0x0 0x80000>; + no-map; + }; + + pil_adsp_mem: pil-adsp@95900000 { + reg = <0x0 0x95900000 0x0 0x1e00000>; + no-map; + }; + + q6_adsp_dtb_mem: q6-adsp-dtb@97700000 { + reg = <0x0 0x97700000 0x0 0x80000>; + no-map; + }; + + q6_gdsp0_dtb_mem: q6-gdsp0-dtb@97780000 { + reg = <0x0 0x97780000 0x0 0x80000>; + no-map; + }; + + pil_gdsp0_mem: pil-gdsp0@97800000 { + reg = <0x0 0x97800000 0x0 0x1e00000>; + no-map; + }; + + pil_gdsp1_mem: pil-gdsp1@99600000 { + reg = <0x0 0x99600000 0x0 0x1e00000>; + no-map; + }; + + q6_gdsp1_dtb_mem: q6-gdsp1-dtb@9b400000 { + reg = <0x0 0x9b400000 0x0 0x80000>; + no-map; + }; + + q6_cdsp0_dtb_mem: q6-cdsp0-dtb@9b480000 { + reg = <0x0 0x9b480000 0x0 0x80000>; + no-map; + }; + + pil_cdsp0_mem: pil-cdsp0@9b500000 { + reg = <0x0 0x9b500000 0x0 0x1e00000>; + no-map; + }; + + pil_gpu_mem: pil-gpu@9d300000 { + reg = <0x0 0x9d300000 0x0 0x2000>; + no-map; + }; + + q6_cdsp1_dtb_mem: q6-cdsp1-dtb@9d380000 { + reg = <0x0 0x9d380000 0x0 0x80000>; + no-map; + }; + + pil_cdsp1_mem: pil-cdsp1@9d400000 { + reg = <0x0 0x9d400000 0x0 0x1e00000>; + no-map; + }; + + pil_cvp_mem: pil-cvp@9f200000 { + reg = <0x0 0x9f200000 0x0 0x700000>; + no-map; + }; + + pil_video_mem: pil-video@9f900000 { + reg = <0x0 0x9f900000 0x0 0x1000000>; + no-map; + }; + + trusted_apps_mem: trusted-apps@d1900000 { + reg = <0x0 0xd1900000 0x0 0x1c00000>; + no-map; + }; + }; + + firmware { + scm { + /delete-property/ memory-region; + }; + }; +}; From patchwork Mon Jan 13 12:13:07 2025 Content-Type: text/plain; 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Signed-off-by: Pratyush Brahma --- arch/arm64/boot/dts/qcom/qcs9100-ride-r3.dts | 2 ++ arch/arm64/boot/dts/qcom/qcs9100-ride.dts | 2 ++ 2 files changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/qcs9100-ride-r3.dts b/arch/arm64/boot/dts/qcom/qcs9100-ride-r3.dts index 759d1ec694b20e9cead674c1bd61c6a6627eeb27..06e57239bbe975b9c0b939d438095692243e39cf 100644 --- a/arch/arm64/boot/dts/qcom/qcs9100-ride-r3.dts +++ b/arch/arm64/boot/dts/qcom/qcs9100-ride-r3.dts @@ -5,6 +5,8 @@ /dts-v1/; #include "sa8775p-ride-r3.dts" +#include "sa8775p-iot.dtsi" + / { model = "Qualcomm QCS9100 Ride Rev3"; compatible = "qcom,qcs9100-ride-r3", "qcom,qcs9100", "qcom,sa8775p"; diff --git a/arch/arm64/boot/dts/qcom/qcs9100-ride.dts b/arch/arm64/boot/dts/qcom/qcs9100-ride.dts index 979462dfec30ecbe6c437fd676c3da2d4386ff8e..27d5461acbf070d696cdad0c068f4e031f2beb67 100644 --- a/arch/arm64/boot/dts/qcom/qcs9100-ride.dts +++ b/arch/arm64/boot/dts/qcom/qcs9100-ride.dts @@ -5,6 +5,8 @@ /dts-v1/; #include "sa8775p-ride.dts" +#include "sa8775p-iot.dtsi" + / { model = "Qualcomm QCS9100 Ride"; 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Mon, 13 Jan 2025 12:13:31 GMT Received: from hu-pbrahma-hyd.qualcomm.com (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Mon, 13 Jan 2025 04:13:29 -0800 From: Pratyush Brahma Date: Mon, 13 Jan 2025 17:43:08 +0530 Subject: [PATCH v2 3/3] arm64: dts: qcom: qcs9075: Update memory map Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <20250113-sa8775p-iot-memory-map-v2-3-aa2bb544706e@quicinc.com> References: <20250113-sa8775p-iot-memory-map-v2-0-aa2bb544706e@quicinc.com> In-Reply-To: <20250113-sa8775p-iot-memory-map-v2-0-aa2bb544706e@quicinc.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: , , , Pratyush Brahma X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1736770400; l=1955; i=quic_pbrahma@quicinc.com; s=20250113; h=from:subject:message-id; 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This depends on Wasim Nazir's patches [1] to introduce qcs9075 boards. [1] https://lore.kernel.org/all/20241229152332.3068172-1-quic_wasimn@quicinc.com/ Signed-off-by: Pratyush Brahma --- arch/arm64/boot/dts/qcom/qcs9075-rb8.dts | 1 + arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts | 1 + arch/arm64/boot/dts/qcom/qcs9075-ride.dts | 1 + 3 files changed, 3 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/qcs9075-rb8.dts b/arch/arm64/boot/dts/qcom/qcs9075-rb8.dts index 3ab6deeaacf18eb4d5859f1bbb80c244bf8f224c..4458e2db2f3f2b222376b92e5c46c6557a1583b3 100644 --- a/arch/arm64/boot/dts/qcom/qcs9075-rb8.dts +++ b/arch/arm64/boot/dts/qcom/qcs9075-rb8.dts @@ -10,6 +10,7 @@ #include "sa8775p.dtsi" #include "sa8775p-pmics.dtsi" #include "qcs9075-thermal.dtsi" +#include "sa8775p-iot.dtsi" / { model = "Qualcomm Technologies, Inc. Robotics RB8"; diff --git a/arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts b/arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts index 5f2d9f4166172a85f8d69f6cd8813d4469de5bd3..231c1e3f73eb3e11dc50bbebb1773e31a0c71723 100644 --- a/arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts +++ b/arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts @@ -6,6 +6,7 @@ #include "sa8775p-ride.dtsi" #include "qcs9075-thermal.dtsi" +#include "sa8775p-iot.dtsi" / { model = "Qualcomm Technologies, Inc. QCS9075 Ride Rev3"; diff --git a/arch/arm64/boot/dts/qcom/qcs9075-ride.dts b/arch/arm64/boot/dts/qcom/qcs9075-ride.dts index 10ce48e7ba2f53a6daef8beba4d29d2907990baf..3d85a7636adb2d9462308d48cf0431e266807af7 100644 --- a/arch/arm64/boot/dts/qcom/qcs9075-ride.dts +++ b/arch/arm64/boot/dts/qcom/qcs9075-ride.dts @@ -6,6 +6,7 @@ #include "sa8775p-ride.dtsi" #include "qcs9075-thermal.dtsi" +#include "sa8775p-iot.dtsi" / { model = "Qualcomm Technologies, Inc. QCS9075 Ride";