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Miller" , Jakub Kicinski , Paolo Abeni , Eric Dumazet , "Andrew Lunn" CC: , Saeed Mahameed , Gal Pressman , Leon Romanovsky , Mark Bloch , Moshe Shemesh , Patrisious Haddad , Tariq Toukan Subject: [PATCH net 1/8] net/mlx5: Fix RDMA TX steering prio Date: Mon, 13 Jan 2025 17:40:47 +0200 Message-ID: <20250113154055.1927008-2-tariqt@nvidia.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20250113154055.1927008-1-tariqt@nvidia.com> References: <20250113154055.1927008-1-tariqt@nvidia.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: AnonymousSubmission X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF00003F65:EE_|SA1PR12MB8946:EE_ X-MS-Office365-Filtering-Correlation-Id: d734404d-1508-4717-e1a5-08dd33e8d34e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|376014|82310400026|36860700013; X-Microsoft-Antispam-Message-Info: gKkyQnlg7vzpeCoJIvtQ7MwZv918FL6ArirmjJZrEox2iwpBeIophDnCUIjm0hT599LU8sdo37Qcr3I3J5312djuWIo+hgoPjbQunTAoCTpLhA7bwnm/tSEvPiyt/gqWn9LrmxUxIjrvD6i7I8H4Ux5i6lnI8fQSX1y08C1tXK3cHTi6b//FEk1Q2ySf9umYPBiE+zJWG7CUND9urgx6Zluaht1fZGdEkjrcoUN9PucriWEFGRxU6mPxx2gMOq43Ik45Z765ZHmTFlgF+0kX7789GywNmgyh9XsejRY8jD+lth7bxm8Ih9YphZ+ChjWblcu6nONJ4YuoC4SADo+ANc4DGIoTh3swazlkWrs11YP+h9B5vArQ99v5971bl1DnZl956nvNozAnu8NIyqUEwbrjd/1CkuhoLbMC4QJmtYWbBr+/HWSWLf8DfGN7sORU+1/rVik/mCZpe/9Umegl+yQ/R3NZQtnNz2wTAAZ0U4Nl0ar1I/Jl8nQfMVlq3KWNb6np/z3VlXjKtvg3wOOoN4LHw9kjD4zMKmBkWS6sPo0RoMVInvxRA+cxkO4aljGoCiTaVVtVnkrIR0K0p6LPa+//xmSyMC5EFgwX/ujJt/bUv+v7bTzulizFa2Ix5WTWQ/3lAdq78sl6aqdCQdXTKIiyFlPBWjq6GOJYQT1xN5l58EA8qSCz2WVJjovf5b+BqAUsf4aNvmlusXOMUfDuniyH0MJe/QLa2sBYbDKyefqg69cN3jRd3TJ8hz1/P0VoemGlBlgGwLzEEBaLiKsflwzcjkQSlvZKb1fex8r6/aoSLVuezubZUeQ4J6RTkrZ1OgOqNhHpEjD1ErWXACfscAS9yDJxLgyNAyFIlZ9wJuJnlGqLvVc9wOY3vZhRKDABOyPZbsmf1kF/pTQ1LTvBZAvtDE3tvs1gXeo879iwVoXxECAASj/fJXrL83mMEQVtb7lSrhOl9ITJ/yZJh49rD/HyRVLOCtv0ws5K8BMwaHeWtocxEMJ2QimMThybbJIoaUW3pP6aHpEe+a+1YaGMNdno1rdwtgar8+qx8lP5DPo/RmJAbqhQAXu8LVztX6gsciWjZg94lv6dLeWe1sQmkxRZ8+4uVHVXVaVi5MPOoMdzkZ90dwAs5m+6ewyTcH18u1/4YMIhm96n5Zq8Wjhu6MhDP4kclMjtKR4QPmYLKehccbCyJ+svYkhvBMwRo2FIxvDjNpYKglp00fu+VPzq8LcYXS6FrGsXrvHg6lmIFFCn2QmkvWJssADQsaQTzY9fgNUMnsCKvaIdOJr9yviZzNliyejvHR8OiVtW3/egKEpGk6KWDn4924HXPbeE/m4LjLQt19/0Xm6dQkSntwozOabF2Umx8ZH6q2EkZuxdero/ePOBLxG4K8GUZEv5/3CRYfurjW12O/n/Old93FV/bm8/OoyjYbdRZN160zC52/KNtg+/YoQAW6ARKybOrtUQRvJieHa6VBFbyEtTYSuI9A== X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(1800799024)(376014)(82310400026)(36860700013);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Jan 2025 15:42:02.5663 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d734404d-1508-4717-e1a5-08dd33e8d34e X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF00003F65.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB8946 X-Patchwork-Delegate: kuba@kernel.org From: Patrisious Haddad User added steering rules at RDMA_TX were being added to the first prio, which is the counters prio. Fix that so that they are correctly added to the BYPASS_PRIO instead. Fixes: 24670b1a3166 ("net/mlx5: Add support for RDMA TX steering") Signed-off-by: Patrisious Haddad Reviewed-by: Mark Bloch Signed-off-by: Tariq Toukan Reviewed-by: Jacob Keller --- drivers/net/ethernet/mellanox/mlx5/core/fs_core.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/fs_core.c b/drivers/net/ethernet/mellanox/mlx5/core/fs_core.c index 2eabfcc247c6..0ce999706d41 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/fs_core.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/fs_core.c @@ -2709,6 +2709,7 @@ struct mlx5_flow_namespace *mlx5_get_flow_namespace(struct mlx5_core_dev *dev, break; case MLX5_FLOW_NAMESPACE_RDMA_TX: root_ns = steering->rdma_tx_root_ns; + prio = RDMA_TX_BYPASS_PRIO; break; case MLX5_FLOW_NAMESPACE_RDMA_RX_COUNTERS: root_ns = steering->rdma_rx_root_ns; From patchwork Mon Jan 13 15:40:48 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tariq Toukan X-Patchwork-Id: 13937674 X-Patchwork-Delegate: kuba@kernel.org Received: from NAM10-BN7-obe.outbound.protection.outlook.com (mail-bn7nam10on2063.outbound.protection.outlook.com [40.107.92.63]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5A9871C5D61 for ; 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Miller" , Jakub Kicinski , Paolo Abeni , Eric Dumazet , "Andrew Lunn" CC: , Saeed Mahameed , Gal Pressman , Leon Romanovsky , Mark Bloch , Moshe Shemesh , Yishai Hadas , Michael Guralnik , Tariq Toukan Subject: [PATCH net 2/8] net/mlx5: Fix a lockdep warning as part of the write combining test Date: Mon, 13 Jan 2025 17:40:48 +0200 Message-ID: <20250113154055.1927008-3-tariqt@nvidia.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20250113154055.1927008-1-tariqt@nvidia.com> References: <20250113154055.1927008-1-tariqt@nvidia.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: AnonymousSubmission X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF00003F65:EE_|DS0PR12MB7725:EE_ X-MS-Office365-Filtering-Correlation-Id: 0475407a-3116-4dd8-aeda-08dd33e8d604 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|36860700013|376014|1800799024; X-Microsoft-Antispam-Message-Info: rFOaTb9Rvbrj9GitzUtfKw20Usbn6/ySno9tdElMb0y7H6ya/beesyXHkqXNOyFVE+31JZs4ddBWyM9TbYPBSOYVlZQYmbxwQC//7WAIWq2/qg6kOOdDOBXIaSarU3GiCBS+XHpRY90rWl1F+ff2qCUR8xIkSIOBw9qO3PW2ezpR3Hd1fotktM+zwUFj/gd1h/a3hS6yTqpTWCduGcUKzGvj9NNBYwLqBMTx/PvITfAJjdieEzmo2+RKWpDwOlAgPUzPK/+NNAZL7UY4qoMMAQ42cGZqIWN8o+lJX0fcmMWqb1XsmiZRxpGCPkdbje+mw3QX1WakHIAc0+EHMBLv8XFY1J+vOnLc6vnIv+s6Oo2owoh5x/JNIw5gKiAD60JveDKtJFE7f7FnB5/SrBHLxmhvk3+It6k2rzzDVdAE1qukcHNuRUtrX1WNuNFmvdlhJgek2EmeYVn0ocRImw26823B0h/YBxgFKyNEE+Op452PGHZ5DLroH+F8z9ICi7qhUMJW2h2/mqPZg84y9xqO3T/xk6yAvatsJbOz36B1mficHbNR4j7+Ex2NrSXkl+PyEoSVZMgm1itKIiLjHM1eMd0TebhFe0AUTLoIdZFwEdjkjISKL+99hKoqNN7MEZ+c4pzDlWLEmdapNgeGVivr39n3yniBXBPcMHFHURV78u8xYBYrn6FRtAwRf0ii8KdNQEfCZlPAPtQPKlVTixAglprO3uo7ubUuosRhTVf1uB8j8V3NZ4CKEQo4/qgZIqHXLbrG34qgqqWRslcRHLhrRH9GHntv6CYrKVaTcRea+/4WmAvojOCNQacbkbSDxX9cYVftjplJn0C6pUrhVIO7vw67Eg4dw/TFSQt+LL3OZ1jmZYxpzlu4SUIP5I2RpzU1ZvEc6Ek9eAVphp0nXNnF70B8DCbjxPFIGCyZ4fJxMWAPCm8/TWjPrzr0wqANI1HDKtjmmLZT9YtQVqXJxTxp3r4eDmn/a0MjKvBUFlpXVs5Rym9Lta8tukLgCUUsa7BQCM+1FMTll5yHVGEqE4vOKX5D3w2HlnCpVRTpJPDs1lNMsdZLuh0VFxAYWq8GVrKsclZcrpsSdpTkTclivWo/bHM+2otMgc0hHZ9F8Oky039orTHPZKNthVO6bH9BvrAqZlrVZ/FAXTRULRUKlFkj205YEcFzcMZaG5TOndrqxR/cJg3VdFGRYRUsRUW+wye+QoTOZERmB+XYqwhVXlKuiCmFJpgzOqvpOS8Qgktbfx4x8u4GaNdlJZURDXTP+pIHw36S4w9oJHUDFPdTcEPIETqsnl+T9wnfO2YABwnffujedwIQ9Bqrhmzdor71AJol2bFJ0OMxfDuyJiQtGWODRAupGRIIJprkNy21VsfhDqM46t80m6RhNsAeNj+VdU/BIB+6VU1m5MIwXXjTPNC8jwr/RNks8a6Iw5bDtd2+cRaqkrl6Sc75onk2EWpjFkMoJE6My7ecCUPlxfJtkdW0W6MRSp742A6Kxq8INvdzgKI= X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(82310400026)(36860700013)(376014)(1800799024);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Jan 2025 15:42:07.1132 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 0475407a-3116-4dd8-aeda-08dd33e8d604 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF00003F65.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB7725 X-Patchwork-Delegate: kuba@kernel.org From: Yishai Hadas Fix a lockdep warning [1] observed during the write combining test. The warning indicates a potential nested lock scenario that could lead to a deadlock. However, this is a false positive alarm because the SF lock and its parent lock are distinct ones. The lockdep confusion arises because the locks belong to the same object class (i.e., struct mlx5_core_dev). To resolve this, the code has been refactored to avoid taking both locks. Instead, only the parent lock is acquired. [1] raw_ethernet_bw/2118 is trying to acquire lock: [ 213.619032] ffff88811dd75e08 (&dev->wc_state_lock){+.+.}-{3:3}, at: mlx5_wc_support_get+0x18c/0x210 [mlx5_core] [ 213.620270] [ 213.620270] but task is already holding lock: [ 213.620943] ffff88810b585e08 (&dev->wc_state_lock){+.+.}-{3:3}, at: mlx5_wc_support_get+0x10c/0x210 [mlx5_core] [ 213.622045] [ 213.622045] other info that might help us debug this: [ 213.622778] Possible unsafe locking scenario: [ 213.622778] [ 213.623465] CPU0 [ 213.623815] ---- [ 213.624148] lock(&dev->wc_state_lock); [ 213.624615] lock(&dev->wc_state_lock); [ 213.625071] [ 213.625071] *** DEADLOCK *** [ 213.625071] [ 213.625805] May be due to missing lock nesting notation [ 213.625805] [ 213.626522] 4 locks held by raw_ethernet_bw/2118: [ 213.627019] #0: ffff88813f80d578 (&uverbs_dev->disassociate_srcu){.+.+}-{0:0}, at: ib_uverbs_ioctl+0xc4/0x170 [ib_uverbs] [ 213.628088] #1: ffff88810fb23930 (&file->hw_destroy_rwsem){.+.+}-{3:3}, at: ib_init_ucontext+0x2d/0xf0 [ib_uverbs] [ 213.629094] #2: ffff88810fb23878 (&file->ucontext_lock){+.+.}-{3:3}, at: ib_init_ucontext+0x49/0xf0 [ib_uverbs] [ 213.630106] #3: ffff88810b585e08 (&dev->wc_state_lock){+.+.}-{3:3}, at: mlx5_wc_support_get+0x10c/0x210 [mlx5_core] [ 213.631185] [ 213.631185] stack backtrace: [ 213.631718] CPU: 1 UID: 0 PID: 2118 Comm: raw_ethernet_bw Not tainted 6.12.0-rc7_internal_net_next_mlx5_89a0ad0 #1 [ 213.632722] Hardware name: QEMU Standard PC (Q35 + ICH9, 2009), BIOS rel-1.13.0-0-gf21b5a4aeb02-prebuilt.qemu.org 04/01/2014 [ 213.633785] Call Trace: [ 213.634099] [ 213.634393] dump_stack_lvl+0x7e/0xc0 [ 213.634806] print_deadlock_bug+0x278/0x3c0 [ 213.635265] __lock_acquire+0x15f4/0x2c40 [ 213.635712] lock_acquire+0xcd/0x2d0 [ 213.636120] ? mlx5_wc_support_get+0x18c/0x210 [mlx5_core] [ 213.636722] ? mlx5_ib_enable_lb+0x24/0xa0 [mlx5_ib] [ 213.637277] __mutex_lock+0x81/0xda0 [ 213.637697] ? mlx5_wc_support_get+0x18c/0x210 [mlx5_core] [ 213.638305] ? mlx5_wc_support_get+0x18c/0x210 [mlx5_core] [ 213.638902] ? rcu_read_lock_sched_held+0x3f/0x70 [ 213.639400] ? mlx5_wc_support_get+0x18c/0x210 [mlx5_core] [ 213.640016] mlx5_wc_support_get+0x18c/0x210 [mlx5_core] [ 213.640615] set_ucontext_resp+0x68/0x2b0 [mlx5_ib] [ 213.641144] ? debug_mutex_init+0x33/0x40 [ 213.641586] mlx5_ib_alloc_ucontext+0x18e/0x7b0 [mlx5_ib] [ 213.642145] ib_init_ucontext+0xa0/0xf0 [ib_uverbs] [ 213.642679] ib_uverbs_handler_UVERBS_METHOD_GET_CONTEXT+0x95/0xc0 [ib_uverbs] [ 213.643426] ? _copy_from_user+0x46/0x80 [ 213.643878] ib_uverbs_cmd_verbs+0xa6b/0xc80 [ib_uverbs] [ 213.644426] ? ib_uverbs_handler_UVERBS_METHOD_INVOKE_WRITE+0x130/0x130 [ib_uverbs] [ 213.645213] ? __lock_acquire+0xa99/0x2c40 [ 213.645675] ? lock_acquire+0xcd/0x2d0 [ 213.646101] ? ib_uverbs_ioctl+0xc4/0x170 [ib_uverbs] [ 213.646625] ? reacquire_held_locks+0xcf/0x1f0 [ 213.647102] ? do_user_addr_fault+0x45d/0x770 [ 213.647586] ib_uverbs_ioctl+0xe0/0x170 [ib_uverbs] [ 213.648102] ? ib_uverbs_ioctl+0xc4/0x170 [ib_uverbs] [ 213.648632] __x64_sys_ioctl+0x4d3/0xaa0 [ 213.649060] ? do_user_addr_fault+0x4a8/0x770 [ 213.649528] do_syscall_64+0x6d/0x140 [ 213.649947] entry_SYSCALL_64_after_hwframe+0x4b/0x53 [ 213.650478] RIP: 0033:0x7fa179b0737b [ 213.650893] Code: ff ff ff 85 c0 79 9b 49 c7 c4 ff ff ff ff 5b 5d 4c 89 e0 41 5c c3 66 0f 1f 84 00 00 00 00 00 f3 0f 1e fa b8 10 00 00 00 0f 05 <48> 3d 01 f0 ff ff 73 01 c3 48 8b 0d 7d 2a 0f 00 f7 d8 64 89 01 48 [ 213.652619] RSP: 002b:00007ffd2e6d46e8 EFLAGS: 00000246 ORIG_RAX: 0000000000000010 [ 213.653390] RAX: ffffffffffffffda RBX: 00007ffd2e6d47f8 RCX: 00007fa179b0737b [ 213.654084] RDX: 00007ffd2e6d47e0 RSI: 00000000c0181b01 RDI: 0000000000000003 [ 213.654767] RBP: 00007ffd2e6d47c0 R08: 00007fa1799be010 R09: 0000000000000002 [ 213.655453] R10: 00007ffd2e6d4960 R11: 0000000000000246 R12: 00007ffd2e6d487c [ 213.656170] R13: 0000000000000027 R14: 0000000000000001 R15: 00007ffd2e6d4f70 Fixes: d98995b4bf98 ("net/mlx5: Reimplement write combining test") Signed-off-by: Yishai Hadas Reviewed-by: Michael Guralnik Signed-off-by: Tariq Toukan Reviewed-by: Larysa Zaremba --- drivers/net/ethernet/mellanox/mlx5/core/wc.c | 24 ++++++++++---------- 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/wc.c b/drivers/net/ethernet/mellanox/mlx5/core/wc.c index 1bed75eca97d..740b719e7072 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/wc.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/wc.c @@ -382,6 +382,7 @@ static void mlx5_core_test_wc(struct mlx5_core_dev *mdev) bool mlx5_wc_support_get(struct mlx5_core_dev *mdev) { + struct mutex *wc_state_lock = &mdev->wc_state_lock; struct mlx5_core_dev *parent = NULL; if (!MLX5_CAP_GEN(mdev, bf)) { @@ -400,32 +401,31 @@ bool mlx5_wc_support_get(struct mlx5_core_dev *mdev) */ goto out; - mutex_lock(&mdev->wc_state_lock); - - if (mdev->wc_state != MLX5_WC_STATE_UNINITIALIZED) - goto unlock; - #ifdef CONFIG_MLX5_SF - if (mlx5_core_is_sf(mdev)) + if (mlx5_core_is_sf(mdev)) { parent = mdev->priv.parent_mdev; + wc_state_lock = &parent->wc_state_lock; + } #endif - if (parent) { - mutex_lock(&parent->wc_state_lock); + mutex_lock(wc_state_lock); + if (mdev->wc_state != MLX5_WC_STATE_UNINITIALIZED) + goto unlock; + + if (parent) { mlx5_core_test_wc(parent); mlx5_core_dbg(mdev, "parent set wc_state=%d\n", parent->wc_state); mdev->wc_state = parent->wc_state; - mutex_unlock(&parent->wc_state_lock); + } else { + mlx5_core_test_wc(mdev); } - mlx5_core_test_wc(mdev); - unlock: - mutex_unlock(&mdev->wc_state_lock); + mutex_unlock(wc_state_lock); out: mlx5_core_dbg(mdev, "wc_state=%d\n", mdev->wc_state); From patchwork Mon Jan 13 15:40:49 2025 Content-Type: text/plain; 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Mon, 13 Jan 2025 07:41:50 -0800 From: Tariq Toukan To: "David S. Miller" , Jakub Kicinski , Paolo Abeni , Eric Dumazet , "Andrew Lunn" CC: , Saeed Mahameed , Gal Pressman , Leon Romanovsky , Mark Bloch , Moshe Shemesh , Chris Mi , Shay Drori , Tariq Toukan Subject: [PATCH net 3/8] net/mlx5: SF, Fix add port error handling Date: Mon, 13 Jan 2025 17:40:49 +0200 Message-ID: <20250113154055.1927008-4-tariqt@nvidia.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20250113154055.1927008-1-tariqt@nvidia.com> References: <20250113154055.1927008-1-tariqt@nvidia.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: AnonymousSubmission X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL02EPF0001A102:EE_|MW4PR12MB7015:EE_ X-MS-Office365-Filtering-Correlation-Id: 49a8b07d-add3-4bcf-d89f-08dd33e8d70a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|36860700013|376014|82310400026; X-Microsoft-Antispam-Message-Info: erkz555mVRfuNP6iH2H0TI/mgN6skjeT6tCGyPjCjrHyTaVnXLINz9gOmwEvJtO/8Wq5iHMkeeATbbDdQW3tiYqzwXsgfBsO+3TeNvA5U4JY4kpMcjSsOsoooqyrAPioQA2gP+u0EerUUPxb06xBteP3wUz4INMAgKoWhgTMwK2Jhrrl9VJJbYFWC5SuqrTbE80mPYNALTDw5ii02i3yaOiR0GUpor1/8u0MnXDmkTgjyyO+gBK0rRIeIZEDL/p9NGXf8Pe/eT0Mx1cBGh9VqNX4IlMS1mt0dRQiMtkNMcFiYtaeRU+lcOpONncmkwxnb2JCKJiixvdJmRIVv0iAX1tIDQtN0+D73zRbDrF0eKNLqLPeU/1OXg2AsRdKXh0XpuWJDHy3jst5NKK5JITbOyeo56ShgP7fDCXz3PvFGnEVlfW2HMtMLZNwVYUxnCIBin3W5oRtyhI4+COiWtcPsgB8WoW1p8PmPMg7ylqa2KVeEYaMHvRGFCZ7r/o+JiMQqin3GCfHqhFDzV+MRco1q3ojvsWVzvsgvJHRTax2oCluS6HHdYbG/4G1fSuZ7ZG1L38JxdAIiWeuAsXPaGmvmcfTg63Q9R6Ekvra14IU+FW9ljlgowBU8LQEp+VpzJnC9njk7Zr8OIoziyQVpsiYFl1nDgdvWGgHJS95r6FNc3DiLWCffXE3TVFZlHlej6Eemk9UogeRJMmyztWB5WziRc1o0vm2lt8wcIJbEjuzGThTYDT+UX+qAMilLYS/ukdIxPy2XYmL9jkvGtjy4NnTAtpaE5/sassTWpVJCngqcP+zlWSBHWoFXJUvHPzp11umQIB2XBjIvkTpI4fMc6zjAV6ooTksR4sUBtgE0r3NfuEOFPcf4uCWliMOWPEiKYtZeRox3S2EcAAS1qlq5hQX+BMVOEW2S8TmIMJtQ1I/ykcI19C5V+30tfdcoA/1mPXkkWRDvXhMDvj3CwG2amI0yTvjuHIzRoHAiD7EQkHXjEzHrPvugcxYDGNeOANpRDXExlGHQdRNUValQeoHEHzD1kx/QE7aeRJDpMUk+Kw4ue/jaO91zeD45Jkzo6AT8VNypUwCvoEbwyYN0UlAgF1OxHRmWqeN0vToO6vQBzpEAxhxgFX/TEiKO0D4eVb4XWS7zWRSFpHpjMYIY8sJXBActrblzH+OmsNWRr4aI0OVNvMfB2LaudZFe6XXxZHTsSxHlmYefmI+xtxpOA1wwrcm2/WPbsaOu4EIXNeBgiuhK8l5IrBwQLE/ED5uOgM7j3VtyxSnHMzM0I7TlrkWl8+cBo624Cqx0ywL1q5OVstDlENBKGqN5qh6o0tLpD6OjY+YtiiMgptrJyG4DX9wDZ3mnaTXZs2WdhzHR73jpiBkvpjdH/RnnN2dnxixJaSxlOshbmlczbD1s3N8hRikVBaeLDkb6wNo64liB0ZgMWBnzi81Qx6BICxJdVfSiCR6xbgGSOKXc2DoulV2yRf0Cd3wAtg6SrWR4AQs/F5DBVKgdUY= X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230040)(1800799024)(36860700013)(376014)(82310400026);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Jan 2025 15:42:08.7063 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 49a8b07d-add3-4bcf-d89f-08dd33e8d70a X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF0001A102.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW4PR12MB7015 X-Patchwork-Delegate: kuba@kernel.org From: Chris Mi If failed to add SF, error handling doesn't delete the SF from the SF table. But the hw resources are deleted. So when unload driver, hw resources will be deleted again. Firmware will report syndrome 0x68def3 which means "SF is not allocated can not deallocate". Fix it by delete SF from SF table if failed to add SF. Fixes: 2597ee190b4e ("net/mlx5: Call mlx5_sf_id_erase() once in mlx5_sf_dealloc()") Signed-off-by: Chris Mi Reviewed-by: Shay Drori Signed-off-by: Tariq Toukan Reviewed-by: Jacob Keller --- drivers/net/ethernet/mellanox/mlx5/core/sf/devlink.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/sf/devlink.c b/drivers/net/ethernet/mellanox/mlx5/core/sf/devlink.c index a96be98be032..b96909fbeb12 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/sf/devlink.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/sf/devlink.c @@ -257,6 +257,7 @@ static int mlx5_sf_add(struct mlx5_core_dev *dev, struct mlx5_sf_table *table, return 0; esw_err: + mlx5_sf_function_id_erase(table, sf); mlx5_sf_free(table, sf); return err; } From patchwork Mon Jan 13 15:40:50 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tariq Toukan X-Patchwork-Id: 13937676 X-Patchwork-Delegate: kuba@kernel.org Received: from NAM11-CO1-obe.outbound.protection.outlook.com (mail-co1nam11on2053.outbound.protection.outlook.com [40.107.220.53]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C95A81C5D7D for ; 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Miller" , Jakub Kicinski , Paolo Abeni , Eric Dumazet , "Andrew Lunn" CC: , Saeed Mahameed , Gal Pressman , Leon Romanovsky , Mark Bloch , Moshe Shemesh , Mark Zhang , Tariq Toukan Subject: [PATCH net 4/8] net/mlx5: Clear port select structure when fail to create Date: Mon, 13 Jan 2025 17:40:50 +0200 Message-ID: <20250113154055.1927008-5-tariqt@nvidia.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20250113154055.1927008-1-tariqt@nvidia.com> References: <20250113154055.1927008-1-tariqt@nvidia.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: AnonymousSubmission X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL02EPF0001A102:EE_|DS0PR12MB7778:EE_ X-MS-Office365-Filtering-Correlation-Id: 1e9b00a3-0230-4521-8665-08dd33e8d91e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|1800799024|36860700013|82310400026; X-Microsoft-Antispam-Message-Info: Az+BCWlZk7Gk0ZTtejoU5F4odMV0F0jBwKpIGq7aynm0d04S+s58fMFxU2iW1qjDL7YR74Puvmt/lQmFs3QaH0P+FZN/vPTHsvyTCluGdhw6tBOuRNZ8dSuepId0U5uNib4xSA40n3V5R8qTxvjflem1zI89wqBB8ZypGXXDnpolZpi26LgkOJ3yOWrUfPhhQamclSj76J89Hl0aU0LO60QHHTHnW1fJ49hSEaEdB4eUi5gjZFWPyV0i+paBheJEtV/ym+pP4/7Q47W4C8HPiSKuQY/u7XsvlbXax4oKNwWfo0JmKMMHFUlkYdIO+iGmGZqOoprQrSotS5Vn1p+xhrHgLUddMwWDYWqoPQMWTuK03WrbPqTi0lW4xTQEYVQ0WAbOwqzc+oajwHZhz8N2RrF/lO04Umxxox6DQgUfj/f6UWhA5kLNN/pl4AmVbCDOEQK0qoKI2Ss/qK21vU4mG4A4yMCSQea9vWgiCfGqPolkFbeicOKjCgDjTC6gt0zubVPFddvNu4CJ5+dTKVUMMFPeaMF/9Yg9YP0JNEriK4AhTOoQKYESJlyzuYWpK6JUUqRKza8/QidIl3t9Y4br0qATDTEtYEGz65HpSJJpxs4J2fBCDxB2PjbROgzxkS3/zLA+Zk1QpbrR/sA4QAKCQ6FrMY64AdlXaMvnCJ4M0xOI3jg3YI6vmJXo8pT5inDGBy19jHbQgNqxg7UkkPlmAYDM0+0XEQ9z95ajOJslM02JXFoakOyjoE73EWeFMs7nlpxAT4Z89qxR/83gfPWrev81IEnSf4Y8RnBDNtOgYTJ6vlHNVzNA+DUTFpVOu+4aqU3stM4ksxFz2HMHlqJs2n/cfjdau2NO8k4QcLqZvoVkav2oTrvdRtxrg/yuacTjBtmLzsvMO3d+iruHXOfYi2ZAx5uKoK7gEjyZ3Dpkd2e7MXboo43oEO0T73zvS93ju6FNqyqTmQCc+OA69pHZuoyHDXRetiBw3X+o7jSO2EDadJYRqCMVLjs8L/IRJ33L/QWpjojBnO637rfDeC2mOYUMSXugOp7whH1jAwGBCCFkb+pigsaqFfKQ2g3bU3NE4Z/Sp2ku5ya8xsdiHAHEtlBUJLJvqDFHJ6758EDjSmoP8lHrMqWsJ3KRGtnO2EzCvoSMQF2dmHrp18gfatwU3op/S4xeC2fCGx2SoSGyIuRGSn/OzpNsSIolPfkvaLJIGlDZ66tBR6Pu+nHhAZPLzzLUnB5+8S0OsrSfFfvsN7ApHXBeHSp21EWK0iNirWb5clZ5jtpXkq9ItqIgUZ/eP1KVZKLPo5Fg0Q6NDTQ0qpiMECAWgtj/c7E8V4py087cbAdZ8b1ygfYFrz8OjJbeagYoF3G9HECgLfUmLJK6O1S+R8FRNgTy3nZMqIAufEtP3OS0n4nc8ytDVdx+sbYmTItqSP/W+ta/wHhQwlcuxzs+vY0+yEc7g4gEQLOWH80UFLVoj7aOI8QetuJtomO/b5e9M/yjFu777CBmMeVz0CU= X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230040)(376014)(1800799024)(36860700013)(82310400026);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Jan 2025 15:42:12.2376 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 1e9b00a3-0230-4521-8665-08dd33e8d91e X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF0001A102.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB7778 X-Patchwork-Delegate: kuba@kernel.org From: Mark Zhang Clear the port select structure on error so no stale values left after definers are destroyed. That's because the mlx5_lag_destroy_definers() always try to destroy all lag definers in the tt_map, so in the flow below lag definers get double-destroyed and cause kernel crash: mlx5_lag_port_sel_create() mlx5_lag_create_definers() mlx5_lag_create_definer() <- Failed on tt 1 mlx5_lag_destroy_definers() <- definers[tt=0] gets destroyed mlx5_lag_port_sel_create() mlx5_lag_create_definers() mlx5_lag_create_definer() <- Failed on tt 0 mlx5_lag_destroy_definers() <- definers[tt=0] gets double-destroyed Unable to handle kernel NULL pointer dereference at virtual address 0000000000000008 Mem abort info: ESR = 0x0000000096000005 EC = 0x25: DABT (current EL), IL = 32 bits SET = 0, FnV = 0 EA = 0, S1PTW = 0 FSC = 0x05: level 1 translation fault Data abort info: ISV = 0, ISS = 0x00000005, ISS2 = 0x00000000 CM = 0, WnR = 0, TnD = 0, TagAccess = 0 GCS = 0, Overlay = 0, DirtyBit = 0, Xs = 0 user pgtable: 64k pages, 48-bit VAs, pgdp=0000000112ce2e00 [0000000000000008] pgd=0000000000000000, p4d=0000000000000000, pud=0000000000000000 Internal error: Oops: 0000000096000005 [#1] PREEMPT SMP Modules linked in: iptable_raw bonding ip_gre ip6_gre gre ip6_tunnel tunnel6 geneve ip6_udp_tunnel udp_tunnel ipip tunnel4 ip_tunnel rdma_ucm(OE) rdma_cm(OE) iw_cm(OE) ib_ipoib(OE) ib_cm(OE) ib_umad(OE) mlx5_ib(OE) ib_uverbs(OE) mlx5_fwctl(OE) fwctl(OE) mlx5_core(OE) mlxdevm(OE) ib_core(OE) mlxfw(OE) memtrack(OE) mlx_compat(OE) openvswitch nsh nf_conncount psample xt_conntrack xt_MASQUERADE nf_conntrack_netlink nfnetlink xfrm_user xfrm_algo xt_addrtype iptable_filter iptable_nat nf_nat nf_conntrack nf_defrag_ipv6 nf_defrag_ipv4 br_netfilter bridge stp llc netconsole overlay efi_pstore sch_fq_codel zram ip_tables crct10dif_ce qemu_fw_cfg fuse ipv6 crc_ccitt [last unloaded: mlx_compat(OE)] CPU: 3 UID: 0 PID: 217 Comm: kworker/u53:2 Tainted: G OE 6.11.0+ #2 Tainted: [O]=OOT_MODULE, [E]=UNSIGNED_MODULE Hardware name: QEMU KVM Virtual Machine, BIOS 0.0.0 02/06/2015 Workqueue: mlx5_lag mlx5_do_bond_work [mlx5_core] pstate: 60400005 (nZCv daif +PAN -UAO -TCO -DIT -SSBS BTYPE=--) pc : mlx5_del_flow_rules+0x24/0x2c0 [mlx5_core] lr : mlx5_lag_destroy_definer+0x54/0x100 [mlx5_core] sp : ffff800085fafb00 x29: ffff800085fafb00 x28: ffff0000da0c8000 x27: 0000000000000000 x26: ffff0000da0c8000 x25: ffff0000da0c8000 x24: ffff0000da0c8000 x23: ffff0000c31f81a0 x22: 0400000000000000 x21: ffff0000da0c8000 x20: 0000000000000000 x19: 0000000000000001 x18: 0000000000000000 x17: 0000000000000000 x16: 0000000000000000 x15: 0000ffff8b0c9350 x14: 0000000000000000 x13: ffff800081390d18 x12: ffff800081dc3cc0 x11: 0000000000000001 x10: 0000000000000b10 x9 : ffff80007ab7304c x8 : ffff0000d00711f0 x7 : 0000000000000004 x6 : 0000000000000190 x5 : ffff00027edb3010 x4 : 0000000000000000 x3 : 0000000000000000 x2 : ffff0000d39b8000 x1 : ffff0000d39b8000 x0 : 0400000000000000 Call trace: mlx5_del_flow_rules+0x24/0x2c0 [mlx5_core] mlx5_lag_destroy_definer+0x54/0x100 [mlx5_core] mlx5_lag_destroy_definers+0xa0/0x108 [mlx5_core] mlx5_lag_port_sel_create+0x2d4/0x6f8 [mlx5_core] mlx5_activate_lag+0x60c/0x6f8 [mlx5_core] mlx5_do_bond_work+0x284/0x5c8 [mlx5_core] process_one_work+0x170/0x3e0 worker_thread+0x2d8/0x3e0 kthread+0x11c/0x128 ret_from_fork+0x10/0x20 Code: a9025bf5 aa0003f6 a90363f7 f90023f9 (f9400400) ---[ end trace 0000000000000000 ]--- Fixes: dc48516ec7d3 ("net/mlx5: Lag, add support to create definers for LAG") Signed-off-by: Mark Zhang Reviewed-by: Leon Romanovsky Reviewed-by: Mark Bloch Signed-off-by: Tariq Toukan Reviewed-by: Jacob Keller --- drivers/net/ethernet/mellanox/mlx5/core/lag/port_sel.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lag/port_sel.c b/drivers/net/ethernet/mellanox/mlx5/core/lag/port_sel.c index ab2717012b79..39e80704b1c4 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/lag/port_sel.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/lag/port_sel.c @@ -530,7 +530,7 @@ int mlx5_lag_port_sel_create(struct mlx5_lag *ldev, set_tt_map(port_sel, hash_type); err = mlx5_lag_create_definers(ldev, hash_type, ports); if (err) - return err; + goto clear_port_sel; if (port_sel->tunnel) { err = mlx5_lag_create_inner_ttc_table(ldev); @@ -549,6 +549,8 @@ int mlx5_lag_port_sel_create(struct mlx5_lag *ldev, mlx5_destroy_ttc_table(port_sel->inner.ttc); destroy_definers: mlx5_lag_destroy_definers(ldev); +clear_port_sel: + memset(port_sel, 0, sizeof(*port_sel)); return err; } From patchwork Mon Jan 13 15:40:51 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tariq Toukan X-Patchwork-Id: 13937677 X-Patchwork-Delegate: kuba@kernel.org Received: from NAM10-MW2-obe.outbound.protection.outlook.com (mail-mw2nam10on2050.outbound.protection.outlook.com [40.107.94.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 628C21FBBF5 for ; Mon, 13 Jan 2025 15:42:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Mon, 13 Jan 2025 07:42:01 -0800 Received: from rnnvmail205.nvidia.com (10.129.68.10) by rnnvmail202.nvidia.com (10.129.68.7) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Mon, 13 Jan 2025 07:42:00 -0800 Received: from vdi.nvidia.com (10.127.8.10) by mail.nvidia.com (10.129.68.10) with Microsoft SMTP Server id 15.2.1544.4 via Frontend Transport; Mon, 13 Jan 2025 07:41:57 -0800 From: Tariq Toukan To: "David S. Miller" , Jakub Kicinski , Paolo Abeni , Eric Dumazet , "Andrew Lunn" CC: , Saeed Mahameed , Gal Pressman , Leon Romanovsky , Mark Bloch , Moshe Shemesh , Tariq Toukan Subject: [PATCH net 5/8] net/mlx5e: Fix inversion dependency warning while enabling IPsec tunnel Date: Mon, 13 Jan 2025 17:40:51 +0200 Message-ID: <20250113154055.1927008-6-tariqt@nvidia.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20250113154055.1927008-1-tariqt@nvidia.com> References: <20250113154055.1927008-1-tariqt@nvidia.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: AnonymousSubmission X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL02EPF0001A102:EE_|DM6PR12MB4316:EE_ X-MS-Office365-Filtering-Correlation-Id: 3118121e-dc95-4ea0-61d4-08dd33e8da9e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|376014|82310400026|36860700013; X-Microsoft-Antispam-Message-Info: wC3rw0fTJWhhSIOC1sreYFQkEg6lqthYhs1VUQazGpJDPLszf8pKAYZRvzQKHmOr/a+X3HacFmHJIrphkCNwPAqTjxVfySIdZUi17Pv1ShuZxOP7iE9kyiypt96ZbJSxrClcXzvDX5myt5jr3MRmnuxt84gt6Q0o2wcDcQuR19uRQTLv+ZC4ukdv30PMcTK7u+sksb9ZvHtTvoPONPZEGzChab42PK1XypV/Z+qsiQGMoD7/jKFwblijazWGRtASMklV326IyofbB5Do/pXNgbSZIV0DGrdWoX81vQRimqshL2zrYhQ4ErXnL6JygIcJP1YGgEqbBR6oxoqUt8d6OSDPXg2vMnZ6yLpah31oJlKXifGo3K5/2Q+tJnMz/u2MO6h29H7nt/3uta2cCHRS5VNWYkMqNSOXpeVdEaza7mshJayHG19MZsGJZgD8zZ2AvmsTk3BI0NspyWYThBwBaukIRxDbPP1aw0XPtGvi0Ovuxiwp3COyyhxhQNL+DhwhriL75t7Yu3szX1I6mPdWlTrjZXZCWdv541RaTSdsN/OVlNo03YjLwKU+HmI17TAg78yv60+cYRXEpRpOvlt9JGeDsx8i2wBlu8sHhL93Szc1ACC5xiWYWJaCNAtrIC2MODfOzZ2QXttx9RwgxMmNFar4WLXiQ+MX2ec2gHha+NRzq0D0jvxK2a0rbAbrfFXU8bLpjsj7MRYlXT7G/TCh3gcw0Bhcw7P3sFdx3oYt0yML0tl2nxBroLSsFTzyOdISgZOz3Bjk9Me3PDTnnvEaC0SeC+Xait9+ntugM5mpiEHcviwM/nVXgf3ZqVFYTNztLLMK77XZIndixSF9856gzJ66z632PnO+zSHI3IPZ0UN2ws5Sf27f8gXVtF2v+L+3bHeUqVEHAhd9gu998OqN8n30zrYt2YEXgtGuVKl8yBPTtGa5B9HaETraiToXNGWPbUQku6dBd4TO1XVtU7osmiib7UhT+xIt16vKe7SOd9iAKfFgfuA+ryRiUAZ2eWMX7tioPzWfsvb9Qu6dW8RKpEK/6ttKupkj/Nd7Q45Auvd1mLt3r9/n9SH9nZ7AqupY29reQrAPJVtnWd/AY1cbgxmSsZT26IhC8msh7PMi8MJp+710QQOzGsQLcKvnKHqZmvAs71Xg/2/CcURHiUkM9S+HHZkalMokEWesDl+xMy9Pzx84CjLzTn9vc5qbRgggOonSgJPBR7gepfcFv3EijN9JZYDuKXFwruEDEsrVVay4JlEjUpchljA9oNVRTf1B3z/NvMOpWgOQd1j5AdNHpzdx56LnKK4LTE3KUxHJfTmvftPxM8bTcTb0fYyoCUDSGSQA8HAkAS1pjzgZULbHYS2sqTLLiZEGV193LHa2gQ2/Ypb0HRGuoyswQu9wAvGSAt/1AIbD42/fsvAZ7YClU3KDbLFS9+ippJsHH9n0gso2bP+suxvA2boGDwGXldv2VTsJ/sMjUNxeR29XaN/u050QdcNTZ0qBdg0oOj5a3fI= X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230040)(1800799024)(376014)(82310400026)(36860700013);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Jan 2025 15:42:14.7532 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3118121e-dc95-4ea0-61d4-08dd33e8da9e X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF0001A102.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4316 X-Patchwork-Delegate: kuba@kernel.org From: Leon Romanovsky Attempt to enable IPsec packet offload in tunnel mode in debug kernel generates the following kernel panic, which is happening due to two issues: 1. In SA add section, the should be _bh() variant when marking SA mode. 2. There is not needed flush_workqueue in SA delete routine. It is not needed as at this stage as it is removed from SADB and the running work will be canceled later in SA free. ===================================================== WARNING: SOFTIRQ-safe -> SOFTIRQ-unsafe lock order detected 6.12.0+ #4 Not tainted ----------------------------------------------------- charon/1337 [HC0[0]:SC0[4]:HE1:SE0] is trying to acquire: ffff88810f365020 (&xa->xa_lock#24){+.+.}-{3:3}, at: mlx5e_xfrm_del_state+0xca/0x1e0 [mlx5_core] and this task is already holding: ffff88813e0f0d48 (&x->lock){+.-.}-{3:3}, at: xfrm_state_delete+0x16/0x30 which would create a new lock dependency: (&x->lock){+.-.}-{3:3} -> (&xa->xa_lock#24){+.+.}-{3:3} but this new dependency connects a SOFTIRQ-irq-safe lock: (&x->lock){+.-.}-{3:3} ... which became SOFTIRQ-irq-safe at: lock_acquire+0x1be/0x520 _raw_spin_lock_bh+0x34/0x40 xfrm_timer_handler+0x91/0xd70 __hrtimer_run_queues+0x1dd/0xa60 hrtimer_run_softirq+0x146/0x2e0 handle_softirqs+0x266/0x860 irq_exit_rcu+0x115/0x1a0 sysvec_apic_timer_interrupt+0x6e/0x90 asm_sysvec_apic_timer_interrupt+0x16/0x20 default_idle+0x13/0x20 default_idle_call+0x67/0xa0 do_idle+0x2da/0x320 cpu_startup_entry+0x50/0x60 start_secondary+0x213/0x2a0 common_startup_64+0x129/0x138 to a SOFTIRQ-irq-unsafe lock: (&xa->xa_lock#24){+.+.}-{3:3} ... which became SOFTIRQ-irq-unsafe at: ... lock_acquire+0x1be/0x520 _raw_spin_lock+0x2c/0x40 xa_set_mark+0x70/0x110 mlx5e_xfrm_add_state+0xe48/0x2290 [mlx5_core] xfrm_dev_state_add+0x3bb/0xd70 xfrm_add_sa+0x2451/0x4a90 xfrm_user_rcv_msg+0x493/0x880 netlink_rcv_skb+0x12e/0x380 xfrm_netlink_rcv+0x6d/0x90 netlink_unicast+0x42f/0x740 netlink_sendmsg+0x745/0xbe0 __sock_sendmsg+0xc5/0x190 __sys_sendto+0x1fe/0x2c0 __x64_sys_sendto+0xdc/0x1b0 do_syscall_64+0x6d/0x140 entry_SYSCALL_64_after_hwframe+0x4b/0x53 other info that might help us debug this: Possible interrupt unsafe locking scenario: CPU0 CPU1 ---- ---- lock(&xa->xa_lock#24); local_irq_disable(); lock(&x->lock); lock(&xa->xa_lock#24); lock(&x->lock); *** DEADLOCK *** 2 locks held by charon/1337: #0: ffffffff87f8f858 (&net->xfrm.xfrm_cfg_mutex){+.+.}-{4:4}, at: xfrm_netlink_rcv+0x5e/0x90 #1: ffff88813e0f0d48 (&x->lock){+.-.}-{3:3}, at: xfrm_state_delete+0x16/0x30 the dependencies between SOFTIRQ-irq-safe lock and the holding lock: -> (&x->lock){+.-.}-{3:3} ops: 29 { HARDIRQ-ON-W at: lock_acquire+0x1be/0x520 _raw_spin_lock_bh+0x34/0x40 xfrm_alloc_spi+0xc0/0xe60 xfrm_alloc_userspi+0x5f6/0xbc0 xfrm_user_rcv_msg+0x493/0x880 netlink_rcv_skb+0x12e/0x380 xfrm_netlink_rcv+0x6d/0x90 netlink_unicast+0x42f/0x740 netlink_sendmsg+0x745/0xbe0 __sock_sendmsg+0xc5/0x190 __sys_sendto+0x1fe/0x2c0 __x64_sys_sendto+0xdc/0x1b0 do_syscall_64+0x6d/0x140 entry_SYSCALL_64_after_hwframe+0x4b/0x53 IN-SOFTIRQ-W at: lock_acquire+0x1be/0x520 _raw_spin_lock_bh+0x34/0x40 xfrm_timer_handler+0x91/0xd70 __hrtimer_run_queues+0x1dd/0xa60 hrtimer_run_softirq+0x146/0x2e0 handle_softirqs+0x266/0x860 irq_exit_rcu+0x115/0x1a0 sysvec_apic_timer_interrupt+0x6e/0x90 asm_sysvec_apic_timer_interrupt+0x16/0x20 default_idle+0x13/0x20 default_idle_call+0x67/0xa0 do_idle+0x2da/0x320 cpu_startup_entry+0x50/0x60 start_secondary+0x213/0x2a0 common_startup_64+0x129/0x138 INITIAL USE at: lock_acquire+0x1be/0x520 _raw_spin_lock_bh+0x34/0x40 xfrm_alloc_spi+0xc0/0xe60 xfrm_alloc_userspi+0x5f6/0xbc0 xfrm_user_rcv_msg+0x493/0x880 netlink_rcv_skb+0x12e/0x380 xfrm_netlink_rcv+0x6d/0x90 netlink_unicast+0x42f/0x740 netlink_sendmsg+0x745/0xbe0 __sock_sendmsg+0xc5/0x190 __sys_sendto+0x1fe/0x2c0 __x64_sys_sendto+0xdc/0x1b0 do_syscall_64+0x6d/0x140 entry_SYSCALL_64_after_hwframe+0x4b/0x53 } ... key at: [] __key.18+0x0/0x40 the dependencies between the lock to be acquired and SOFTIRQ-irq-unsafe lock: -> (&xa->xa_lock#24){+.+.}-{3:3} ops: 9 { HARDIRQ-ON-W at: lock_acquire+0x1be/0x520 _raw_spin_lock_bh+0x34/0x40 mlx5e_xfrm_add_state+0xc5b/0x2290 [mlx5_core] xfrm_dev_state_add+0x3bb/0xd70 xfrm_add_sa+0x2451/0x4a90 xfrm_user_rcv_msg+0x493/0x880 netlink_rcv_skb+0x12e/0x380 xfrm_netlink_rcv+0x6d/0x90 netlink_unicast+0x42f/0x740 netlink_sendmsg+0x745/0xbe0 __sock_sendmsg+0xc5/0x190 __sys_sendto+0x1fe/0x2c0 __x64_sys_sendto+0xdc/0x1b0 do_syscall_64+0x6d/0x140 entry_SYSCALL_64_after_hwframe+0x4b/0x53 SOFTIRQ-ON-W at: lock_acquire+0x1be/0x520 _raw_spin_lock+0x2c/0x40 xa_set_mark+0x70/0x110 mlx5e_xfrm_add_state+0xe48/0x2290 [mlx5_core] xfrm_dev_state_add+0x3bb/0xd70 xfrm_add_sa+0x2451/0x4a90 xfrm_user_rcv_msg+0x493/0x880 netlink_rcv_skb+0x12e/0x380 xfrm_netlink_rcv+0x6d/0x90 netlink_unicast+0x42f/0x740 netlink_sendmsg+0x745/0xbe0 __sock_sendmsg+0xc5/0x190 __sys_sendto+0x1fe/0x2c0 __x64_sys_sendto+0xdc/0x1b0 do_syscall_64+0x6d/0x140 entry_SYSCALL_64_after_hwframe+0x4b/0x53 INITIAL USE at: lock_acquire+0x1be/0x520 _raw_spin_lock_bh+0x34/0x40 mlx5e_xfrm_add_state+0xc5b/0x2290 [mlx5_core] xfrm_dev_state_add+0x3bb/0xd70 xfrm_add_sa+0x2451/0x4a90 xfrm_user_rcv_msg+0x493/0x880 netlink_rcv_skb+0x12e/0x380 xfrm_netlink_rcv+0x6d/0x90 netlink_unicast+0x42f/0x740 netlink_sendmsg+0x745/0xbe0 __sock_sendmsg+0xc5/0x190 __sys_sendto+0x1fe/0x2c0 __x64_sys_sendto+0xdc/0x1b0 do_syscall_64+0x6d/0x140 entry_SYSCALL_64_after_hwframe+0x4b/0x53 } ... key at: [] __key.48+0x0/0xfffffffffff210a0 [mlx5_core] ... acquired at: __lock_acquire+0x30a0/0x5040 lock_acquire+0x1be/0x520 _raw_spin_lock_bh+0x34/0x40 mlx5e_xfrm_del_state+0xca/0x1e0 [mlx5_core] xfrm_dev_state_delete+0x90/0x160 __xfrm_state_delete+0x662/0xae0 xfrm_state_delete+0x1e/0x30 xfrm_del_sa+0x1c2/0x340 xfrm_user_rcv_msg+0x493/0x880 netlink_rcv_skb+0x12e/0x380 xfrm_netlink_rcv+0x6d/0x90 netlink_unicast+0x42f/0x740 netlink_sendmsg+0x745/0xbe0 __sock_sendmsg+0xc5/0x190 __sys_sendto+0x1fe/0x2c0 __x64_sys_sendto+0xdc/0x1b0 do_syscall_64+0x6d/0x140 entry_SYSCALL_64_after_hwframe+0x4b/0x53 stack backtrace: CPU: 7 UID: 0 PID: 1337 Comm: charon Not tainted 6.12.0+ #4 Hardware name: QEMU Standard PC (Q35 + ICH9, 2009), BIOS rel-1.13.0-0-gf21b5a4aeb02-prebuilt.qemu.org 04/01/2014 Call Trace: dump_stack_lvl+0x74/0xd0 check_irq_usage+0x12e8/0x1d90 ? print_shortest_lock_dependencies_backwards+0x1b0/0x1b0 ? check_chain_key+0x1bb/0x4c0 ? __lockdep_reset_lock+0x180/0x180 ? check_path.constprop.0+0x24/0x50 ? mark_lock+0x108/0x2fb0 ? print_circular_bug+0x9b0/0x9b0 ? mark_lock+0x108/0x2fb0 ? print_usage_bug.part.0+0x670/0x670 ? check_prev_add+0x1c4/0x2310 check_prev_add+0x1c4/0x2310 __lock_acquire+0x30a0/0x5040 ? lockdep_set_lock_cmp_fn+0x190/0x190 ? lockdep_set_lock_cmp_fn+0x190/0x190 lock_acquire+0x1be/0x520 ? mlx5e_xfrm_del_state+0xca/0x1e0 [mlx5_core] ? lockdep_hardirqs_on_prepare+0x400/0x400 ? __xfrm_state_delete+0x5f0/0xae0 ? lock_downgrade+0x6b0/0x6b0 _raw_spin_lock_bh+0x34/0x40 ? mlx5e_xfrm_del_state+0xca/0x1e0 [mlx5_core] mlx5e_xfrm_del_state+0xca/0x1e0 [mlx5_core] xfrm_dev_state_delete+0x90/0x160 __xfrm_state_delete+0x662/0xae0 xfrm_state_delete+0x1e/0x30 xfrm_del_sa+0x1c2/0x340 ? xfrm_get_sa+0x250/0x250 ? check_chain_key+0x1bb/0x4c0 xfrm_user_rcv_msg+0x493/0x880 ? copy_sec_ctx+0x270/0x270 ? check_chain_key+0x1bb/0x4c0 ? lockdep_set_lock_cmp_fn+0x190/0x190 ? lockdep_set_lock_cmp_fn+0x190/0x190 netlink_rcv_skb+0x12e/0x380 ? copy_sec_ctx+0x270/0x270 ? netlink_ack+0xd90/0xd90 ? netlink_deliver_tap+0xcd/0xb60 xfrm_netlink_rcv+0x6d/0x90 netlink_unicast+0x42f/0x740 ? netlink_attachskb+0x730/0x730 ? lock_acquire+0x1be/0x520 netlink_sendmsg+0x745/0xbe0 ? netlink_unicast+0x740/0x740 ? __might_fault+0xbb/0x170 ? netlink_unicast+0x740/0x740 __sock_sendmsg+0xc5/0x190 ? fdget+0x163/0x1d0 __sys_sendto+0x1fe/0x2c0 ? __x64_sys_getpeername+0xb0/0xb0 ? do_user_addr_fault+0x856/0xe30 ? lock_acquire+0x1be/0x520 ? __task_pid_nr_ns+0x117/0x410 ? lock_downgrade+0x6b0/0x6b0 __x64_sys_sendto+0xdc/0x1b0 ? lockdep_hardirqs_on_prepare+0x284/0x400 do_syscall_64+0x6d/0x140 entry_SYSCALL_64_after_hwframe+0x4b/0x53 RIP: 0033:0x7f7d31291ba4 Code: 7d e8 89 4d d4 e8 4c 42 f7 ff 44 8b 4d d0 4c 8b 45 c8 89 c3 44 8b 55 d4 8b 7d e8 b8 2c 00 00 00 48 8b 55 d8 48 8b 75 e0 0f 05 <48> 3d 00 f0 ff ff 77 34 89 df 48 89 45 e8 e8 99 42 f7 ff 48 8b 45 RSP: 002b:00007f7d2ccd94f0 EFLAGS: 00000297 ORIG_RAX: 000000000000002c RAX: ffffffffffffffda RBX: 0000000000000001 RCX: 00007f7d31291ba4 RDX: 0000000000000028 RSI: 00007f7d2ccd96a0 RDI: 000000000000000a RBP: 00007f7d2ccd9530 R08: 00007f7d2ccd9598 R09: 000000000000000c R10: 0000000000000000 R11: 0000000000000297 R12: 0000000000000028 R13: 00007f7d2ccd9598 R14: 00007f7d2ccd96a0 R15: 00000000000000e1 Fixes: 4c24272b4e2b ("net/mlx5e: Listen to ARP events to update IPsec L2 headers in tunnel mode") Signed-off-by: Leon Romanovsky Signed-off-by: Tariq Toukan --- .../ethernet/mellanox/mlx5/core/en_accel/ipsec.c | 16 ++++++---------- 1 file changed, 6 insertions(+), 10 deletions(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c index ca92e518be76..21857474ad83 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c @@ -768,9 +768,12 @@ static int mlx5e_xfrm_add_state(struct xfrm_state *x, MLX5_IPSEC_RESCHED); if (x->xso.type == XFRM_DEV_OFFLOAD_PACKET && - x->props.mode == XFRM_MODE_TUNNEL) - xa_set_mark(&ipsec->sadb, sa_entry->ipsec_obj_id, - MLX5E_IPSEC_TUNNEL_SA); + x->props.mode == XFRM_MODE_TUNNEL) { + xa_lock_bh(&ipsec->sadb); + __xa_set_mark(&ipsec->sadb, sa_entry->ipsec_obj_id, + MLX5E_IPSEC_TUNNEL_SA); + xa_unlock_bh(&ipsec->sadb); + } out: x->xso.offload_handle = (unsigned long)sa_entry; @@ -797,7 +800,6 @@ static int mlx5e_xfrm_add_state(struct xfrm_state *x, static void mlx5e_xfrm_del_state(struct xfrm_state *x) { struct mlx5e_ipsec_sa_entry *sa_entry = to_ipsec_sa_entry(x); - struct mlx5_accel_esp_xfrm_attrs *attrs = &sa_entry->attrs; struct mlx5e_ipsec *ipsec = sa_entry->ipsec; struct mlx5e_ipsec_sa_entry *old; @@ -806,12 +808,6 @@ static void mlx5e_xfrm_del_state(struct xfrm_state *x) old = xa_erase_bh(&ipsec->sadb, sa_entry->ipsec_obj_id); WARN_ON(old != sa_entry); - - if (attrs->mode == XFRM_MODE_TUNNEL && - attrs->type == XFRM_DEV_OFFLOAD_PACKET) - /* Make sure that no ARP requests are running in parallel */ - flush_workqueue(ipsec->wq); - } static void mlx5e_xfrm_free_state(struct xfrm_state *x) From patchwork Mon Jan 13 15:40:52 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tariq Toukan X-Patchwork-Id: 13937679 X-Patchwork-Delegate: kuba@kernel.org Received: from NAM12-BN8-obe.outbound.protection.outlook.com (mail-bn8nam12on2065.outbound.protection.outlook.com [40.107.237.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id ECE9B20AF60 for ; Mon, 13 Jan 2025 15:42:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail 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This caused to tunnel mode do not forward such traffic through relevant SA. In tunnel mode, policies look like this: src 192.169.0.0/16 dst 192.169.0.0/16 dir out priority 383615 ptype main tmpl src 192.169.101.2 dst 192.169.101.1 proto esp spi 0xc5141c18 reqid 1 mode tunnel crypto offload parameters: dev eth2 mode packet Fixes: a5b8ca9471d3 ("net/mlx5e: Add XFRM policy offload logic") Signed-off-by: Leon Romanovsky Signed-off-by: Tariq Toukan Reviewed-by: Jacob Keller --- .../mellanox/mlx5/core/en_accel/ipsec_fs.c | 41 +++++++++++++++---- 1 file changed, 33 insertions(+), 8 deletions(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_fs.c b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_fs.c index e51b03d4c717..47df02ef5d69 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_fs.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_fs.c @@ -1150,9 +1150,20 @@ static void tx_ft_put_policy(struct mlx5e_ipsec *ipsec, u32 prio, int type) mutex_unlock(&tx->ft.mutex); } +static void addr4_to_mask(__be32 *addr, __be32 *mask) +{ + int i; + + *mask = 0; + for (i = 0; i < 4; i++) + *mask |= ((*addr >> 8 * i) & 0xFF) ? (0xFF << 8 * i) : 0; +} + static void setup_fte_addr4(struct mlx5_flow_spec *spec, __be32 *saddr, __be32 *daddr) { + __be32 mask; + if (!*saddr && !*daddr) return; @@ -1164,21 +1175,33 @@ static void setup_fte_addr4(struct mlx5_flow_spec *spec, __be32 *saddr, if (*saddr) { memcpy(MLX5_ADDR_OF(fte_match_param, spec->match_value, outer_headers.src_ipv4_src_ipv6.ipv4_layout.ipv4), saddr, 4); - MLX5_SET_TO_ONES(fte_match_param, spec->match_criteria, - outer_headers.src_ipv4_src_ipv6.ipv4_layout.ipv4); + addr4_to_mask(saddr, &mask); + memcpy(MLX5_ADDR_OF(fte_match_param, spec->match_criteria, + outer_headers.src_ipv4_src_ipv6.ipv4_layout.ipv4), &mask, 4); } if (*daddr) { memcpy(MLX5_ADDR_OF(fte_match_param, spec->match_value, outer_headers.dst_ipv4_dst_ipv6.ipv4_layout.ipv4), daddr, 4); - MLX5_SET_TO_ONES(fte_match_param, spec->match_criteria, - outer_headers.dst_ipv4_dst_ipv6.ipv4_layout.ipv4); + addr4_to_mask(daddr, &mask); + memcpy(MLX5_ADDR_OF(fte_match_param, spec->match_criteria, + outer_headers.dst_ipv4_dst_ipv6.ipv4_layout.ipv4), &mask, 4); } } +static void addr6_to_mask(__be32 *addr, __be32 *mask) +{ + int i; + + for (i = 0; i < 4; i++) + addr4_to_mask(&addr[i], &mask[i]); +} + static void setup_fte_addr6(struct mlx5_flow_spec *spec, __be32 *saddr, __be32 *daddr) { + __be32 mask[4]; + if (addr6_all_zero(saddr) && addr6_all_zero(daddr)) return; @@ -1190,15 +1213,17 @@ static void setup_fte_addr6(struct mlx5_flow_spec *spec, __be32 *saddr, if (!addr6_all_zero(saddr)) { memcpy(MLX5_ADDR_OF(fte_match_param, spec->match_value, outer_headers.src_ipv4_src_ipv6.ipv6_layout.ipv6), saddr, 16); - memset(MLX5_ADDR_OF(fte_match_param, spec->match_criteria, - outer_headers.src_ipv4_src_ipv6.ipv6_layout.ipv6), 0xff, 16); + addr6_to_mask(saddr, mask); + memcpy(MLX5_ADDR_OF(fte_match_param, spec->match_criteria, + outer_headers.src_ipv4_src_ipv6.ipv6_layout.ipv6), mask, 16); } if (!addr6_all_zero(daddr)) { memcpy(MLX5_ADDR_OF(fte_match_param, spec->match_value, outer_headers.dst_ipv4_dst_ipv6.ipv6_layout.ipv6), daddr, 16); - memset(MLX5_ADDR_OF(fte_match_param, spec->match_criteria, - outer_headers.dst_ipv4_dst_ipv6.ipv6_layout.ipv6), 0xff, 16); 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Miller" , Jakub Kicinski , Paolo Abeni , Eric Dumazet , "Andrew Lunn" CC: , Saeed Mahameed , Gal Pressman , Leon Romanovsky , Mark Bloch , Moshe Shemesh , Tariq Toukan Subject: [PATCH net 7/8] net/mlx5e: Rely on reqid in IPsec tunnel mode Date: Mon, 13 Jan 2025 17:40:53 +0200 Message-ID: <20250113154055.1927008-8-tariqt@nvidia.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20250113154055.1927008-1-tariqt@nvidia.com> References: <20250113154055.1927008-1-tariqt@nvidia.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: AnonymousSubmission X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF00003F67:EE_|PH7PR12MB7913:EE_ X-MS-Office365-Filtering-Correlation-Id: f91774f3-ea7e-4873-49f9-08dd33e8dddb X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|36860700013|1800799024|376014; X-Microsoft-Antispam-Message-Info: NTxKCM7v4CisDu2dYL7ybI9jZCAqfPOzl8DUE+W14tGLeIxNMF0AoHFsuYayS1iIc3KS7Zg8NyFD4NgDqcU/1edE0yYpYLAKdyqmoQXNTPCoeI0fqv9oKGvGtSrVjYQ4HIs+GYO5K3FAtwkEW9WyCf9X9p8YpZRh31WgNFPSG938DsE5Tg+cLuPLafaah5m7Zllj1QDNiFMyONmchxdzPxho4bF/fUHo7u9wA8MLuEK7FGGfSdddvmev8KWPm7cyO+C2NqNkuZKPv5unr0oRcQjfQbqqwTvlTDonTEk0K16ut1CLaWrQ+L1gGvvbWkqFSHRZZffSc8HKq7u+K/NOgbrmL3MwBdt7eaNTdcmvYx3OLS7EnxZCoeIvM0UQthXWwHKSx1IP0O6C7sPJ58ehBFxC0tB7PU7Nj7fuH+h1RL/UXmZaUmU9SPqP5t2ahnd6HrdXI9P1OPKHhjd9N0m4J3OxxRDpDat445nL+WAx8U9o2M89dZKMhYeNp4r4os3bHl5JIx0/gY/V5LyajSRq7mqmWX0msiHIK2EILIO8qdgr1yYBjqfO/v3I9lLh2rUKBx4Cv1r85smSElMqZy5+UvmNhRsHqnaKbdoRMAyVuQQY4pN+7dKcJsXWRt3+rPX7A+t2ROLny6Zb3gh0EYnU9AEmMSbab4KOYTN8VSBZkDNFM691jBMToSpbfOo9CBl8bvpRW8Wy30GeCWjanSMtqV3p+40cMzMed8KJ8atFdiYtWt2MI8L9leitWbzq41ZpnZMkyqYmt155hZxMXj66nztmOkoA0wqwXHn1x/bngUcbLRI/tRbxcM5/Zo+AKdY5Q/aq54nkfB1kj09Alzp3BBYJkCY+dpX7XxYZDafTP2BW2iC0kB0Wsay2klm7uGfuMiZkE3C/mYlRiVUmyDGmWiF2M2v9op0b79JGWkuNAndgTDbt7DKBTs2SolgP0aZeKv6aD9PT5WnGUsocFTLYBXGmCq+NEMQ/HuBHaSG11zh9e8DQxpLO330slsD1g8JfXQoz3reZhMCvzeQoiIiJZiHtxRBKeRhS7wWIA2bUp+4YWJfLAt2PRNE/lQ0ZgBocfNwh/hieQ4ArB0frcjr0luU4++mv7G/l+z/3iuRyiPvV+N+kepg8qT3GzvbW2f3fl0ijDSwfmJ77YE6QDnHT+SMpO1RcpQMS//sKhYBtWTRIuRew54ru9xDHIHt+YjVzbPK0Wd0/VTNPqGHXlSeu2FIqmZ4AtGgAjC6l5NEUHEMIV8Gy9Rekl5dIQ6EPnYioPwXDCXeO7WcWIiHTFN/LCkY3opR/jZUyBIS271sm61oR9tpuWF3ElE85nrvEDQjxCoLndfFf24twh7uuvgtrSC//6i0utrYzdKY2WJ3eCjtDOw/+dxH/UKUnsv1f4bh3fRfU0IDZs//F/F2Z8B+ivayk7LDMJwv6jpm0RxITdMbXWPSFK8SaKpppelD3OJe4c/FkNw0N4HKSwoNB2G366LkK1/l5GdB1yBL5FhRDVIY= X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(82310400026)(36860700013)(1800799024)(376014);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Jan 2025 15:42:20.2481 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f91774f3-ea7e-4873-49f9-08dd33e8dddb X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF00003F67.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB7913 X-Patchwork-Delegate: kuba@kernel.org From: Leon Romanovsky All packet offloads SAs have reqid in it to make sure they have corresponding policy. While it is not strictly needed for transparent mode, it is extremely important in tunnel mode. In that mode, policy and SAs have different match criteria. Policy catches the whole subnet addresses, and SA catches the tunnel gateways addresses. The source address of such tunnel is not known during egress packet traversal in flow steering as it is added only after successful encryption. As reqid is required for packet offload and it is unique for every SA, we can safely rely on it only. The output below shows the configured egress policy and SA by strongswan: [leonro@vm ~]$ sudo ip x s src 192.169.101.2 dst 192.169.101.1 proto esp spi 0xc88b7652 reqid 1 mode tunnel replay-window 0 flag af-unspec esn aead rfc4106(gcm(aes)) 0xe406a01083986e14d116488549094710e9c57bc6 128 anti-replay esn context: seq-hi 0x0, seq 0x0, oseq-hi 0x0, oseq 0x0 replay_window 1, bitmap-length 1 00000000 crypto offload parameters: dev eth2 dir out mode packet [leonro@064 ~]$ sudo ip x p src 192.170.0.0/16 dst 192.170.0.0/16 dir out priority 383615 ptype main tmpl src 192.169.101.2 dst 192.169.101.1 proto esp spi 0xc88b7652 reqid 1 mode tunnel crypto offload parameters: dev eth2 mode packet Fixes: b3beba1fb404 ("net/mlx5e: Allow policies with reqid 0, to support IKE policy holes") Signed-off-by: Leon Romanovsky Signed-off-by: Tariq Toukan Reviewed-by: Jacob Keller --- .../ethernet/mellanox/mlx5/core/en_accel/ipsec_fs.c | 12 +++++------- 1 file changed, 5 insertions(+), 7 deletions(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_fs.c b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_fs.c index 47df02ef5d69..772b329aecc5 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_fs.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_fs.c @@ -1743,23 +1743,21 @@ static int tx_add_rule(struct mlx5e_ipsec_sa_entry *sa_entry) goto err_alloc; } - if (attrs->family == AF_INET) - setup_fte_addr4(spec, &attrs->saddr.a4, &attrs->daddr.a4); - else - setup_fte_addr6(spec, attrs->saddr.a6, attrs->daddr.a6); - setup_fte_no_frags(spec); setup_fte_upper_proto_match(spec, &attrs->upspec); switch (attrs->type) { case XFRM_DEV_OFFLOAD_CRYPTO: + if (attrs->family == AF_INET) + setup_fte_addr4(spec, &attrs->saddr.a4, &attrs->daddr.a4); + else + setup_fte_addr6(spec, attrs->saddr.a6, attrs->daddr.a6); setup_fte_spi(spec, attrs->spi, false); setup_fte_esp(spec); setup_fte_reg_a(spec); break; case XFRM_DEV_OFFLOAD_PACKET: - if (attrs->reqid) - setup_fte_reg_c4(spec, attrs->reqid); + setup_fte_reg_c4(spec, attrs->reqid); err = setup_pkt_reformat(ipsec, attrs, &flow_act); if (err) goto err_pkt_reformat; From patchwork Mon Jan 13 15:40:54 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tariq Toukan X-Patchwork-Id: 13937680 X-Patchwork-Delegate: kuba@kernel.org Received: from NAM10-BN7-obe.outbound.protection.outlook.com (mail-bn7nam10on2043.outbound.protection.outlook.com [40.107.92.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CF8491FBBE8 for ; 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Miller" , Jakub Kicinski , Paolo Abeni , Eric Dumazet , "Andrew Lunn" CC: , Saeed Mahameed , Gal Pressman , Leon Romanovsky , Mark Bloch , Moshe Shemesh , Tariq Toukan Subject: [PATCH net 8/8] net/mlx5e: Always start IPsec sequence number from 1 Date: Mon, 13 Jan 2025 17:40:54 +0200 Message-ID: <20250113154055.1927008-9-tariqt@nvidia.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20250113154055.1927008-1-tariqt@nvidia.com> References: <20250113154055.1927008-1-tariqt@nvidia.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: AnonymousSubmission X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF000252A3:EE_|SJ0PR12MB8115:EE_ X-MS-Office365-Filtering-Correlation-Id: b92c632b-f0f7-442b-9d70-08dd33e8e1ca X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|1800799024|82310400026|376014; X-Microsoft-Antispam-Message-Info: T3Wb8xQOgRVQE5eLbQLkI1EFN0ZwVnpWvivEk0fW9LBOArMnYzbZZDtUnhS0pNmZn/e2bcO+EPWpHp33y/vbapAbzVR0uyYVSRkxsUNKe6UlZER9gMX/NPsirI6VFPOl82e41YspWE9BaRg91sMxraKyr9OgTHTO0HZlk26JB2kfpkZI35NPtDCE7iB4PSaHaGsOZ+GRnD5ei5YPj9yG84dj9MRc8C9OLcsnzpp0/GDfahxzYZ2dZMjtecubromHGlC0dThgkxGASWxmEmMl7Q1WBDhROuERr8QJgrJGF7Aa8IggQwlV7GHDzC38jbYWGWhjvTje19iWbOMsSHmi1rvwP4l5L177x/M8kY+XssOYR/H2rmTI8+NELW/vqjTilLIp4Q1zxB6eK1P70MidzKAvvfQlkk6sBTE591fVd6fGrSphqkPyZv0Gdf0v0wVv+ypRC/VZwjxyOQOtzTJBEYAfqgO6LOUU1qb9YiLlzPF5SStwgSnPrIBgabQOy4WaQoAEj/3+tD4qB2kxhTY2yo6SrdTIhynOwGXIAoI/edIRyjDNHWmVtCWWDBm4rSxypvPgeqZS48K+WH0bLEDPKFR5lISTLF6Z7YCdPYFf0NSz44B46r3M3YSudHsRXV3zTR0cnw8WQsa5mZumhp2gGM044/bPPl7PS87i7zqm11YjRN8z8r97Lp3wViuo2tH2oSJmQepD2X0+3rmwpsKSc+eXbEmSPfylrAmqUuxweF52pAugZsXj8Ug3xJM9msbSpq8o8euu4hFysRa78D6++LCcBlwIecx1wJn1RhMS59zPyXsn6lbsCZZ9XHz3W87RlkA6KtpHFgO8GZ4Ng2zUWQf/XwTssZdCC3Pnlp4Qez/OTYqZMNH+ybn+nda7+6LP1vfTlp/Rs4Lr+cUKjt7SxRfcdhvB4DuwkKLKw9co5ScTC1l9hnM6Y7zdC9HHHl2hIfplc2Y2QrcLpp1pkws17Cx3h8XTugESzX3fr5kcAQBFomRgN0LzkAvxtKo1b2GwsIFJG1zOEa6d0n0V6eNDgi0WcEMw0sn4KZtq6rOyRctDO2ybm/NDePhj1YYIWEuwEphIS4Ct4w4skLxfFXus7fizNf7Uvq2XVMU2QNvNgQSL92N3KankEuB32RsdjwO86VDc2JvbS/5Px9ACJgvgVQMNbGEOjKQjCH1b8A1jiCSNvVaG6xxO+UMQTmqm0ycN8twEDUEHDVgJeuavf0lOxBDiSg/qLl+0FxXWApHcqd16etFgDZAzFjRun8hsBFPBGihC2U5LPpL8fIoVl6Kv7DzoHnO7zvYUgrDAiV+/JpWrtk6WdDrswaAu6s4ZrnyzkvpZmmVMxoJfbtJqrvZUSpbRpfoZ2Hfco1qYeJg4TO2DAHNTv1s7CnWkF8PWijAEa80gN6yjTTyOjKBxmAcpLC+q9M8QDzyfFULWk2CUPrsxVMZEEgxo+KUpv1ZX7gScFW6TOgme8zheSZeQp4TVH+iWLZNsfbK6Lk20m0212O4= X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230040)(36860700013)(1800799024)(82310400026)(376014);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Jan 2025 15:42:26.8809 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b92c632b-f0f7-442b-9d70-08dd33e8e1ca X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF000252A3.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ0PR12MB8115 X-Patchwork-Delegate: kuba@kernel.org From: Leon Romanovsky According to RFC4303, section "3.3.3. Sequence Number Generation", the first packet sent using a given SA will contain a sequence number of 1. This is applicable to both ESN and non-ESN mode, which was not covered in commit mentioned in Fixes line. Fixes: 3d42c8cc67a8 ("net/mlx5e: Ensure that IPsec sequence packet number starts from 1") Signed-off-by: Leon Romanovsky Signed-off-by: Tariq Toukan Reviewed-by: Jacob Keller --- .../net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c | 6 ++++++ .../mellanox/mlx5/core/en_accel/ipsec_offload.c | 11 ++++++++--- 2 files changed, 14 insertions(+), 3 deletions(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c index 21857474ad83..1baf8933a07c 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c @@ -724,6 +724,12 @@ static int mlx5e_xfrm_add_state(struct xfrm_state *x, /* check esn */ if (x->props.flags & XFRM_STATE_ESN) mlx5e_ipsec_update_esn_state(sa_entry); + else + /* According to RFC4303, section "3.3.3. Sequence Number Generation", + * the first packet sent using a given SA will contain a sequence + * number of 1. + */ + sa_entry->esn_state.esn = 1; mlx5e_ipsec_build_accel_xfrm_attrs(sa_entry, &sa_entry->attrs); diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_offload.c b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_offload.c index 53cfa39188cb..820debf3fbbf 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_offload.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_offload.c @@ -91,8 +91,9 @@ u32 mlx5_ipsec_device_caps(struct mlx5_core_dev *mdev) EXPORT_SYMBOL_GPL(mlx5_ipsec_device_caps); static void mlx5e_ipsec_packet_setup(void *obj, u32 pdn, - struct mlx5_accel_esp_xfrm_attrs *attrs) + struct mlx5e_ipsec_sa_entry *sa_entry) { + struct mlx5_accel_esp_xfrm_attrs *attrs = &sa_entry->attrs; void *aso_ctx; aso_ctx = MLX5_ADDR_OF(ipsec_obj, obj, ipsec_aso); @@ -120,8 +121,12 @@ static void mlx5e_ipsec_packet_setup(void *obj, u32 pdn, * active. */ MLX5_SET(ipsec_obj, obj, aso_return_reg, MLX5_IPSEC_ASO_REG_C_4_5); - if (attrs->dir == XFRM_DEV_OFFLOAD_OUT) + if (attrs->dir == XFRM_DEV_OFFLOAD_OUT) { MLX5_SET(ipsec_aso, aso_ctx, mode, MLX5_IPSEC_ASO_INC_SN); + if (!attrs->replay_esn.trigger) + MLX5_SET(ipsec_aso, aso_ctx, mode_parameter, + sa_entry->esn_state.esn); + } if (attrs->lft.hard_packet_limit != XFRM_INF) { MLX5_SET(ipsec_aso, aso_ctx, remove_flow_pkt_cnt, @@ -175,7 +180,7 @@ static int mlx5_create_ipsec_obj(struct mlx5e_ipsec_sa_entry *sa_entry) res = &mdev->mlx5e_res.hw_objs; if (attrs->type == XFRM_DEV_OFFLOAD_PACKET) - mlx5e_ipsec_packet_setup(obj, res->pdn, attrs); + mlx5e_ipsec_packet_setup(obj, res->pdn, sa_entry); err = mlx5_cmd_exec(mdev, in, sizeof(in), out, sizeof(out)); if (!err)