From patchwork Wed Jan 15 13:49:52 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 13940484 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DFC0FC02180 for ; Wed, 15 Jan 2025 13:52:00 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tY3mj-0005uU-8J; Wed, 15 Jan 2025 08:50:17 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tY3mg-0005u3-LD for qemu-devel@nongnu.org; Wed, 15 Jan 2025 08:50:14 -0500 Received: from mail-oi1-x235.google.com ([2607:f8b0:4864:20::235]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tY3mf-0007qa-7D for qemu-devel@nongnu.org; Wed, 15 Jan 2025 08:50:14 -0500 Received: by mail-oi1-x235.google.com with SMTP id 5614622812f47-3eba559611aso1999399b6e.0 for ; Wed, 15 Jan 2025 05:50:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1736949011; x=1737553811; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=LFfXCjqMoPK4O+ptGX63fRnmxQjg5+dlAqXaV80UpeI=; b=E1VmD37hXzfN8HsT4VcWX6b0ZMtpfpMvQ4EeeX7SS/vdeZx5Akko+xW85HTN9NlWL2 BkHhz+U/DcEO0TagcA4en6QuvTaExAdtn3eFVK1VMoTHsr0FHTxmfFl+pBxzlyRD/XFn PB8MziQX1EXtkZWWFgS2sZ5E753vBkqFbCB6xVR+36CsmNBb5pOF0Lyo1y2HyoKzbzh7 Otwa7NaX8YxgcuvSGXByWlS0MyRlUvPd9EssxhU2tARKUj9JHcnu3c6hRf5kGOJsYE5i OPcFCrj2loRIBnQFwWTfpO//JkDc16SXQcdGClXdK4au+X/ZS4GNkHzPjh2N9XB+9O4A hIjA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1736949011; x=1737553811; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=LFfXCjqMoPK4O+ptGX63fRnmxQjg5+dlAqXaV80UpeI=; b=cN7I6B6aNKfm0WCyFiHPbkIzY5gzSDadZp9LDZgH2R8UHG+W6CLjUOcaqs/XHLw5K2 i9fWnf21efUOLLEOBqwSVz0JrUOZKVbQc3TfTPLD6PDq9z6HL5+SKBrvxv+zKjy/mwog Y5kXS4iUp54XXo2PFZQ6zDNKYZrdOQm/66NjCUYasY2b3CDre6oWnIMKJG4Qzwyq58ON IRqkKL0pYVJv+/zA/Wwv0TZ7vV1zFQOuogCG/0hKjBJz4W9nKypmX7CiDP3NXpf5LCyN 3vu3RBs1Q3UNlHRXvv5CDrqwdWBFYmsx886ua7+UeJdzTs8Z7sZ2gum5USukA5bvZWki 4z1A== X-Gm-Message-State: AOJu0YwnWGHotmtK4gl6RVYGi98oA2uj3EVRgeGOTM1lZ1oTDj6os0MK AYoF1w7hgvmanH1+2+l2DKDTu74cJnx3Pkn4cLl6vpMnHf0tkdSu/sbuNFVX9HXzSgPLdhZjNS9 7ygw= X-Gm-Gg: ASbGncsrLUGVNnKuSYG+4xeMoGU/Azi5q7PmZS4Gt/TBgbAta53/igOie4sWgpL4uTx y64ZVcddvMS3js+8hdpvM4kF3vwqwqgHzOoS4xWWvYBO779uSmEOuRg3IZBoDt2Tf5TRAiIlGUQ zZGh73UVADsei32UuS6IW+h3Jz7LxQ3mE7/pXbABkrQ0om1RyqmadGPdj4nxpzqRX5FtT0sKLcw kG9MxfRhyC8azFETlfSsm+VCa7rI5nYkYufshrYOOP8N6tbkGdU2AdQ1P4= X-Google-Smtp-Source: AGHT+IEgpto5qo6/yTG4/kYwJJ9b2L1ywboxmVR1O5wJR51Ecs33TMuzjm8V6y9j8uEfttEk0b06/A== X-Received: by 2002:a05:6808:180b:b0:3ef:27fe:e984 with SMTP id 5614622812f47-3ef2ec17b07mr16982635b6e.12.1736949011690; Wed, 15 Jan 2025 05:50:11 -0800 (PST) Received: from grind.. ([191.202.238.10]) by smtp.gmail.com with ESMTPSA id 5614622812f47-3f0379eff69sm4952177b6e.41.2025.01.15.05.50.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 Jan 2025 05:50:11 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH v3 1/6] target/riscv: add ssu64xl Date: Wed, 15 Jan 2025 10:49:52 -0300 Message-ID: <20250115134957.2179085-2-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250115134957.2179085-1-dbarboza@ventanamicro.com> References: <20250115134957.2179085-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::235; envelope-from=dbarboza@ventanamicro.com; helo=mail-oi1-x235.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org ssu64xl is defined in RVA22 as: "sstatus.UXL must be capable of holding the value 2 (i.e., UXLEN=64 must be supported)." This is always true in TCG and it's mandatory for RVA23, so claim support for it. Signed-off-by: Daniel Henrique Barboza Reviewed-by: Andrew Jones --- target/riscv/cpu.c | 1 + tests/data/acpi/riscv64/virt/RHCT | Bin 390 -> 398 bytes 2 files changed, 1 insertion(+) diff --git a/tests/data/acpi/riscv64/virt/RHCT b/tests/data/acpi/riscv64/virt/RHCT index 695022d56c4ac16607d4c622955ad339fbbfe997..b14ec15e553200760a63aad65586913d31ea2edc 100644 GIT binary patch delta 48 zcmZo;?qlW(@^B96V`N}pOqj@Jz^cQ@$e^;(o|BQSxYW#~B4@H2qXkC_BLhPoBLf2f D`wIz- delta 41 wcmeBUZe!*O@^B7mV`N}poG_8gfK`Q&kwIpoJtyPj07f&87)Az$G)4vn0JA^`U;qFB diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 3d4bd157d2..b187ef2e4b 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -213,6 +213,7 @@ const RISCVIsaExtData isa_edata_arr[] = { ISA_EXT_DATA_ENTRY(sstc, PRIV_VERSION_1_12_0, ext_sstc), ISA_EXT_DATA_ENTRY(sstvala, PRIV_VERSION_1_12_0, has_priv_1_12), ISA_EXT_DATA_ENTRY(sstvecd, PRIV_VERSION_1_12_0, has_priv_1_12), + ISA_EXT_DATA_ENTRY(ssu64xl, PRIV_VERSION_1_12_0, has_priv_1_12), ISA_EXT_DATA_ENTRY(supm, PRIV_VERSION_1_13_0, ext_supm), ISA_EXT_DATA_ENTRY(svade, PRIV_VERSION_1_11_0, ext_svade), ISA_EXT_DATA_ENTRY(svadu, PRIV_VERSION_1_12_0, ext_svadu), From patchwork Wed Jan 15 13:49:53 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 13940488 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8DD66C02180 for ; Wed, 15 Jan 2025 13:52:36 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tY3mp-0005vq-Fw; Wed, 15 Jan 2025 08:50:23 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tY3mn-0005v7-L6 for qemu-devel@nongnu.org; Wed, 15 Jan 2025 08:50:21 -0500 Received: from mail-oi1-x244.google.com ([2607:f8b0:4864:20::244]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tY3mj-0007rO-Iq for qemu-devel@nongnu.org; Wed, 15 Jan 2025 08:50:19 -0500 Received: by mail-oi1-x244.google.com with SMTP id 5614622812f47-3eb8bdcac2eso1323600b6e.0 for ; Wed, 15 Jan 2025 05:50:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1736949015; x=1737553815; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=mVDN4MjaZBTmqIZfmehnZjKJIdM4iScvOXjzGweeZx0=; b=aH0ChLMH7lw5o60dvhiPWPfSnyV/spj34YODgdj8DJpwMPv1n8Z1WTSSYXNaH1TWvC av9IPjJ7UtwpY+nxarxLGVRwnnS/wN22war24EV8YH5WYM0jgDW8kWddYIOxw4kqt8G4 S9Cw8J8usRM8ldO7y03JetGJdUzAPK3BqsUetQLW/9EbvvJ1XHFu5531oGWGPklmZ2u4 /FC5mjuM9OhgWyzMHW2nmXuuboH0omVNns5NcrqI5Yn70e2RgfjgchVN9Wa6hoO9mBTj ErHkBYu2LF7hZ/m200Ol3CVjScyO7MBiNpDwraSbT32ehK5A7bR04G6Z8zyYGgOe+GBH n3IQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1736949015; x=1737553815; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=mVDN4MjaZBTmqIZfmehnZjKJIdM4iScvOXjzGweeZx0=; b=onoSPah2J2yTOJLI6vFBvLOj3ruorAJfjtvFbbUUjgdfftLLknblW6pHJrlucwLDQ2 SBqQLrNf7o+0ZeeARhwUFMkulH8kas0m7UocXzSCCcfehJRhXkR7l3dLsSu5vpByB6Fr 9Z9GFs9CMSHBZoqau7jyQHxE8S0iXha5iJLSbVZPRxbybHukHs3VhDmwnLuLw9tgvgFw +aQM6wym7xeBuT+bftA6yvb4qt5J61lay/BJcC6YS+ATeNGHd7l/mIayq2t+VT7xDSf9 leIiy9wxt6MCS5lwc6mkhHC0MQVulAvxjuA6WTH/1MDizrzv8xN7tvLIrWKJHsD7iXOr tCCw== X-Gm-Message-State: AOJu0YzzONcR5F5yNjR+QvTMS/UzpLYRvgWIZP/b8jm1FD36Ki7qkeQI NJObn4GhNcY1ndFMSbYf1pxP4mhS69ZavqYDqtDDwQUSns2+CC8MWkHRvHf2QL3qicN1HWkNgPJ m5+Q8Qg== X-Gm-Gg: ASbGncsAZCFdXbhnBNTyAQ7mVVohX6NptZFmuEU5SSl8THpUGkW73Wk4rFJP2HB/xeW a2UguPD2WEmY8wrUs4baGH9kGLf7d4nALCcQT/uyEprg3JRwIIkeg+J3E3Vy4YTxmMCerkvMeKC dqI03sx/iOdEnG94DEtaxHfNMdLkbO95UM/hNHZJOg/iXiHQ/OaxRjk2BqHohSPzDTv+GhTqyId WhMB4rHDcP+5V1AMI6O+4dWt2sEQH6zbVboHPZoo72jZYPreWZ/bms7nU8= X-Google-Smtp-Source: AGHT+IH7peWFR+BScJ5K/AkBtDok822AwSX4+Ba/PBebpktTneL5M53qeYXXKGOGleM55abNjkZZbQ== X-Received: by 2002:a05:6808:1b0e:b0:3eb:483f:978f with SMTP id 5614622812f47-3ef2ed59420mr9094191b6e.32.1736949015679; Wed, 15 Jan 2025 05:50:15 -0800 (PST) Received: from grind.. ([191.202.238.10]) by smtp.gmail.com with ESMTPSA id 5614622812f47-3f0379eff69sm4952177b6e.41.2025.01.15.05.50.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 Jan 2025 05:50:14 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH v3 2/6] target/riscv: use RVB in RVA22U64 Date: Wed, 15 Jan 2025 10:49:53 -0300 Message-ID: <20250115134957.2179085-3-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250115134957.2179085-1-dbarboza@ventanamicro.com> References: <20250115134957.2179085-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::244; envelope-from=dbarboza@ventanamicro.com; helo=mail-oi1-x244.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From the time we added RVA22U64 until now the spec didn't declare 'RVB' as a dependency, using zba/zbb/zbs instead. Since then the RVA22 spec [1] added the following in the 'RVA22U64 Mandatory Extensions' section: "B Bit-manipulation instructions Note: The B extension comprises the Zba, Zbb, and Zbs extensions. At the time of RVA22U64's ratification, the B extension had not yet been defined, and so RVA22U64 explicitly mandated Zba, Zbb, and Zbs instead. Mandating B is equivalent." It is also equivalent to QEMU (see riscv_cpu_validate_b() in target/riscv/tcg/tcg-cpu.c). Finally, RVA23U64 [2] directly mentions RVB as a mandatory extension, not citing zba/zbb/zbs. To make it clear that RVA23U64 will extend RVA22U64 (i.e. RVA22 is a parent of RVA23), use RVB in RVA22U64 as well. (bios-tables-test change: RVB added to riscv,isa) [1] https://github.com/riscv/riscv-profiles/blob/main/src/profiles.adoc#61-rva22u64-profile [2] https://github.com/riscv/riscv-profiles/blob/main/src/rva23-profile.adoc#rva23u64-profile Signed-off-by: Daniel Henrique Barboza Reviewed-by: Andrew Jones --- target/riscv/cpu.c | 2 +- tests/data/acpi/riscv64/virt/RHCT | Bin 398 -> 400 bytes 2 files changed, 1 insertion(+), 1 deletion(-) diff --git a/tests/data/acpi/riscv64/virt/RHCT b/tests/data/acpi/riscv64/virt/RHCT index b14ec15e553200760a63aad65586913d31ea2edc..13c8025b868051485be5ba62974a22971a07bc6a 100644 GIT binary patch delta 53 zcmeBUp1{l%JqB1j+%-qDZl;ot1UQ&#clNpsc(ij;S I3K$s}0ARKZK>z>% delta 52 zcmbQh+{ern6Im@tvcKtP9)kwJyAsLaeHGdD3UC3&N_6yxMHMkS6EMh1pF HMg|4|IwT82 diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index b187ef2e4b..6fb4d5f374 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -2351,7 +2351,7 @@ static const PropertyInfo prop_marchid = { static RISCVCPUProfile RVA22U64 = { .parent = NULL, .name = "rva22u64", - .misa_ext = RVI | RVM | RVA | RVF | RVD | RVC | RVU, + .misa_ext = RVI | RVM | RVA | RVF | RVD | RVC | RVB | RVU, .priv_spec = RISCV_PROFILE_ATTR_UNUSED, .satp_mode = RISCV_PROFILE_ATTR_UNUSED, .ext_offsets = { From patchwork Wed Jan 15 13:49:54 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 13940480 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 12F62C02180 for ; Wed, 15 Jan 2025 13:51:08 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tY3mw-0005xo-DN; Wed, 15 Jan 2025 08:50:30 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tY3mt-0005wg-F2 for qemu-devel@nongnu.org; Wed, 15 Jan 2025 08:50:27 -0500 Received: from mail-oi1-x22f.google.com ([2607:f8b0:4864:20::22f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tY3mp-0007s1-K4 for qemu-devel@nongnu.org; Wed, 15 Jan 2025 08:50:25 -0500 Received: by mail-oi1-x22f.google.com with SMTP id 5614622812f47-3ee29277d44so3294434b6e.1 for ; Wed, 15 Jan 2025 05:50:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1736949021; x=1737553821; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=29DNBFKk4MNawdRctkWk2PBdF4ZL+YSuccvv3D3ogz0=; b=hkU7t0Y5e5bV5Z9tZuMKJvG8S4Cy71xW8K4Tg9MvxHbdB1b3my1jJnhmtc1M4Kt8H7 rV9sp/1AT3qpoKwwEzLUbolawRxBNfJqc4RyRV691pqQUpbu9TDJ6aKXBzfi5ra1VsO5 n+Hy7mWkEoh1YQTX2ZcUjUM8mar3NP1KU97va1jZR/OY37ReMJWkltWdl8XIkZF2pKIO 9efsBXPm71mj+n2noXB3qyI7So4sGfAFcMPP24zaa1NLPY8EbjRQbL7ip7gKcjoaNJSH ejC1TFHo04F4cu137fWBBuzs5DmOJ3RRNyTp2VDwrMd+rfomwjQ27b73o45PBRi2wgB/ jFOA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1736949021; x=1737553821; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=29DNBFKk4MNawdRctkWk2PBdF4ZL+YSuccvv3D3ogz0=; b=BpxuK9C2xU8KfFHP+8qG3v2pjpLBY/lLulvh6o3DGuvfAc/eF+0ViCbt0QgeDcB55S M1P7YlykwaOtLe8QJE1lZz1E2p1zzx+ULW0lG0eD64J+rzgrr1W+CrNvTqoY+zendAKu CNVfjkipce6NpuAqkhyZhxI2RFEj0BzrlQnyqWJozEwxkrQbOrlQO7GKpjNwrE4GsAVJ f015xDFWTKq6gzq5hM5EVNLpMM3/Bik1RfT0+BShm6hLGd1NO9BUZvF+4sTjLtWZ7cCV VF8P3qJuXkNbM6qp+ucu5ozFWJ2LtOrj/zgQ7Puhw5SqlbNP37+1Hqb1n3i0JyjC1ROj ssMg== X-Gm-Message-State: AOJu0YwCe+t4EqXQQV1vFM0Es/oz9v5wfqQ8KfQS6d8Vuy1s2bQpOiK1 WT+sB7YbhuRqciF++zYRmZl7ZpSUxi0hteqWT9kYnSZtLYRUyDstjY5bA0enwRbLgXLOG3Gj/kG lT4o= X-Gm-Gg: ASbGnctz4yj2Jv79KsVqhG8UMRAmiDvRl2kwuHAGxjM9G3Txn5dXslmjEO/IyHx4p/R yeDL4CkBWPHI+Zm4dAaE0JFNuRCdqgjPrpAiTehohJMWWYage0VPB8KJxvdv7uAEizVdefq3Hug 9Optrly3VqoODS1DKGPqgTCqcguXhePOgQkhSuMYB/IhdiPjdY5NPWXr+Q/Jv+Hm2ryk2rSZDZQ Nv1N8Dy3eiCZMHBr4MbqBbpLrchMmnlbw7a8ulW8XLy/8saUAkWK6FkcZE= X-Google-Smtp-Source: AGHT+IHLwuRx0OR4XR+sGh7IUsh+pdLVGG7G0T8WassoE93yPZ13mCoQuQYDLnPkq0EgWmPkhe1q/w== X-Received: by 2002:a05:6808:319b:b0:3ec:d34f:4c6f with SMTP id 5614622812f47-3ef2ec42dc3mr17782253b6e.15.1736949019728; Wed, 15 Jan 2025 05:50:19 -0800 (PST) Received: from grind.. ([191.202.238.10]) by smtp.gmail.com with ESMTPSA id 5614622812f47-3f0379eff69sm4952177b6e.41.2025.01.15.05.50.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 Jan 2025 05:50:18 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH v3 3/6] target/riscv: add profile u_parent and s_parent Date: Wed, 15 Jan 2025 10:49:54 -0300 Message-ID: <20250115134957.2179085-4-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250115134957.2179085-1-dbarboza@ventanamicro.com> References: <20250115134957.2179085-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::22f; envelope-from=dbarboza@ventanamicro.com; helo=mail-oi1-x22f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The current 'parent' mechanic for profiles allows for one profile to be a child of a previous/older profile, enabling all its extensions (and the parent profile itself) and sparing us from tediously listing all extensions for every profile. This works fine for u-mode profiles. For s-mode profiles this is not enough: a s-mode profile extends not only his equivalent u-mode profile but also the previous s-mode profile. This means, for example, that RVA23S64 extends both RVA23U64 and RVA22S64. To fit this usage, rename the existing 'parent' to 'u_parent' and add a new 's_parent' attribute for profiles. Handle both like we're doing with the previous 'profile' attribute, i.e. if set, enable it. This change does nothing for the existing profiles but will make RVA23S64 simpler. Suggested-by: Andrew Jones Signed-off-by: Daniel Henrique Barboza Reviewed-by: Andrew Jones --- target/riscv/cpu.c | 6 ++++-- target/riscv/cpu.h | 3 ++- target/riscv/tcg/tcg-cpu.c | 35 ++++++++++++++++++++++++++--------- 3 files changed, 32 insertions(+), 12 deletions(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 6fb4d5f374..e215b1004d 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -2349,7 +2349,8 @@ static const PropertyInfo prop_marchid = { * doesn't need to be manually enabled by the profile. */ static RISCVCPUProfile RVA22U64 = { - .parent = NULL, + .u_parent = NULL, + .s_parent = NULL, .name = "rva22u64", .misa_ext = RVI | RVM | RVA | RVF | RVD | RVC | RVB | RVU, .priv_spec = RISCV_PROFILE_ATTR_UNUSED, @@ -2381,7 +2382,8 @@ static RISCVCPUProfile RVA22U64 = { * The remaining features/extensions comes from RVA22U64. */ static RISCVCPUProfile RVA22S64 = { - .parent = &RVA22U64, + .u_parent = &RVA22U64, + .s_parent = NULL, .name = "rva22s64", .misa_ext = RVS, .priv_spec = PRIV_VERSION_1_12_0, diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 97713681cb..986131a191 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -81,7 +81,8 @@ const char *riscv_get_misa_ext_description(uint32_t bit); #define CPU_CFG_OFFSET(_prop) offsetof(struct RISCVCPUConfig, _prop) typedef struct riscv_cpu_profile { - struct riscv_cpu_profile *parent; + struct riscv_cpu_profile *u_parent; + struct riscv_cpu_profile *s_parent; const char *name; uint32_t misa_ext; bool enabled; diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c index 48be24bbbe..c9e5a3b580 100644 --- a/target/riscv/tcg/tcg-cpu.c +++ b/target/riscv/tcg/tcg-cpu.c @@ -713,13 +713,29 @@ static bool riscv_cpu_validate_profile_satp(RISCVCPU *cpu, } #endif +static void riscv_cpu_check_parent_profile(RISCVCPU *cpu, + RISCVCPUProfile *profile, + RISCVCPUProfile *parent) +{ + const char *parent_name; + bool parent_enabled; + + if (!profile->enabled || !parent) { + return; + } + + parent_name = parent->name; + parent_enabled = object_property_get_bool(OBJECT(cpu), parent_name, NULL); + profile->enabled = profile->enabled && parent_enabled; +} + static void riscv_cpu_validate_profile(RISCVCPU *cpu, RISCVCPUProfile *profile) { CPURISCVState *env = &cpu->env; const char *warn_msg = "Profile %s mandates disabled extension %s"; bool send_warn = profile->user_set && profile->enabled; - bool parent_enabled, profile_impl = true; + bool profile_impl = true; int i; #ifndef CONFIG_USER_ONLY @@ -773,12 +789,8 @@ static void riscv_cpu_validate_profile(RISCVCPU *cpu, profile->enabled = profile_impl; - if (profile->parent != NULL) { - parent_enabled = object_property_get_bool(OBJECT(cpu), - profile->parent->name, - NULL); - profile->enabled = profile->enabled && parent_enabled; - } + riscv_cpu_check_parent_profile(cpu, profile, profile->u_parent); + riscv_cpu_check_parent_profile(cpu, profile, profile->s_parent); } static void riscv_cpu_validate_profiles(RISCVCPU *cpu) @@ -1181,8 +1193,13 @@ static void cpu_set_profile(Object *obj, Visitor *v, const char *name, profile->user_set = true; profile->enabled = value; - if (profile->parent != NULL) { - object_property_set_bool(obj, profile->parent->name, + if (profile->u_parent != NULL) { + object_property_set_bool(obj, profile->u_parent->name, + profile->enabled, NULL); + } + + if (profile->s_parent != NULL) { + object_property_set_bool(obj, profile->s_parent->name, profile->enabled, NULL); } From patchwork Wed Jan 15 13:49:55 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 13940487 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D6D38C02187 for ; Wed, 15 Jan 2025 13:52:19 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tY3mx-0005y5-F0; Wed, 15 Jan 2025 08:50:31 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tY3mv-0005xO-Kh for qemu-devel@nongnu.org; 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([191.202.238.10]) by smtp.gmail.com with ESMTPSA id 5614622812f47-3f0379eff69sm4952177b6e.41.2025.01.15.05.50.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 Jan 2025 05:50:23 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH v3 4/6] target/riscv: change priv_ver check in validate_profile() Date: Wed, 15 Jan 2025 10:49:55 -0300 Message-ID: <20250115134957.2179085-5-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250115134957.2179085-1-dbarboza@ventanamicro.com> References: <20250115134957.2179085-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::233; envelope-from=dbarboza@ventanamicro.com; helo=mail-oi1-x233.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The S profiles do a priv_ver check during validation to see if the running priv_ver is compatible with it. This check is done by comparing if the running priv_ver is equal to the priv_ver the profile specifies. There is an universe where we added RVA23S64 support based on both RVA23U64 and RVA22S64 and this error is being thrown: qemu-system-riscv64: warning: Profile rva22s64 requires priv spec v1.12.0, but priv ver v1.13.0 was set We're enabling RVA22S64 (priv_ver 1.12) as a dependency of RVA23S64 (priv_ver 1.13) and complaining to users about what we did ourselves. There's no drawback in allowing a profile to run in an env that has a priv_ver newer than it's required by it. So, like Hiro Nakamura saves the future by changing the past, change the priv_ver check now to allow profiles to run in a newer priv_ver. This universe will have one less warning to deal with. Signed-off-by: Daniel Henrique Barboza Reviewed-by: Andrew Jones --- target/riscv/tcg/tcg-cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c index c9e5a3b580..f5338f43cb 100644 --- a/target/riscv/tcg/tcg-cpu.c +++ b/target/riscv/tcg/tcg-cpu.c @@ -746,7 +746,7 @@ static void riscv_cpu_validate_profile(RISCVCPU *cpu, #endif if (profile->priv_spec != RISCV_PROFILE_ATTR_UNUSED && - profile->priv_spec != env->priv_ver) { + profile->priv_spec > env->priv_ver) { profile_impl = false; if (send_warn) { From patchwork Wed Jan 15 13:49:56 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 13940485 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3B969C02180 for ; Wed, 15 Jan 2025 13:52:14 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tY3n3-00063g-JK; Wed, 15 Jan 2025 08:50:37 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tY3my-00060K-9d for qemu-devel@nongnu.org; Wed, 15 Jan 2025 08:50:32 -0500 Received: from mail-oi1-x241.google.com ([2607:f8b0:4864:20::241]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tY3mw-0007sq-6L for qemu-devel@nongnu.org; Wed, 15 Jan 2025 08:50:31 -0500 Received: by mail-oi1-x241.google.com with SMTP id 5614622812f47-3eba559611aso1999503b6e.0 for ; Wed, 15 Jan 2025 05:50:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1736949029; x=1737553829; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=x6/uHcxy8S071Ts6210PwMh1tRs0xCtUorTWG4sXCFw=; b=m3qMxckd7nNLrg6WVRuOow2EQ/Zl2nS1KLn20GZUZ+3UHiV1ZuLi1eF63fXSYoqnnQ k9DImMOVx9OSzc9Cd6alUexlPuMKkGxG8jIsq6qDGRnbg4XlblD/ktlQQcxhW1ih4WwQ k+FCL912P6odOewDCpotgOF3QWRO0o7XT3Si+nLScmXbjLThyXLrTNQ9DbjLIhiigbL4 fVMRIMicUEVoACLvkznKfvtWAMrNmglT3uXlH7aLVs21ChppCJnZkmgrFGH7oFY6LZGA TmhVz3Iayfgj8bTKDQjie9lkP9HQWjpZMxAlNyCXfCVYlH7e30zKkcOhjYnPpMz8oirc F6Yg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1736949029; x=1737553829; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=x6/uHcxy8S071Ts6210PwMh1tRs0xCtUorTWG4sXCFw=; b=Lmzwdyezo5HWpZl9ZWh6YVwAmNAdTqYUViXXrlfXoa7rzbcw6+rwiV1q6JDSYnB/cL 6vMewTTeKuMs3y8MoILlj5HARXf6Psj79fdYmRkM3a1tg59c6ABiYlYUTuTN60UBtRPB 5PhgMsH5IsNow4rNvEAGzSQLrNKaKJ2KAyhbjzLdnPhKgh5mJqeM20ibH3lu19ro0/GU p4lsDndDDZadeqj+kyQllbLcRxGPGnWABL9vGD47CZctzt6DG7eCUwWmnSpDPQYBMqlb 9XmlkhUq8W99Lqr80NySRPBxC/rLOSIYSTWwaIC9cZ7+gazOt6IGxEFBSqSFX9j10r8s tqKA== X-Gm-Message-State: AOJu0YwALO8oF2xCk25hxx79rg70DgS3MFp6CiStLWGgwMNv0xwsA+qk nbeeVA7ALeCEipBvWpDV3TlxjCOkVMmWJWEbx4Hqos5mx5svuaZlykjcwTJtMCCiEGu7RVbzpSM 83Amr2Q== X-Gm-Gg: ASbGncuoATtrCar1/SE15k4n25ExsXGfze6BEhX7LOMEPbw56OSPTp2Kp38oB3j05vB HH1S4yZalhBhmYZHh7JAmjd8uKD1+vvTVa7lVVdg0f6QoopRIML9d4xM317MpNyUQhIJP+effEs q89QpDQcnpdB/Wi2nbXY6kJGH4v+Lt9EmpnRi50Le5H4tFvbvdfbflbFere1TWD3r/XGKYk4PY4 z4S3MbniFFUHMBa5QPUqVBhuCh44OYf3HCaZccbgyungWKyeXo7DRZKwaE= X-Google-Smtp-Source: AGHT+IFc1u5E8l57Fp2oA/FJt4N4QIJv6YSJfH++l7pWSDd+fJIGIE0UqrIHTdwn4U1l02vX9A96qg== X-Received: by 2002:a05:6808:2e93:b0:3ea:4c54:51f3 with SMTP id 5614622812f47-3ef2ec61f23mr16909791b6e.16.1736949028724; Wed, 15 Jan 2025 05:50:28 -0800 (PST) Received: from grind.. ([191.202.238.10]) by smtp.gmail.com with ESMTPSA id 5614622812f47-3f0379eff69sm4952177b6e.41.2025.01.15.05.50.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 Jan 2025 05:50:27 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH v3 5/6] target/riscv: add RVA23U64 profile Date: Wed, 15 Jan 2025 10:49:56 -0300 Message-ID: <20250115134957.2179085-6-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250115134957.2179085-1-dbarboza@ventanamicro.com> References: <20250115134957.2179085-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::241; envelope-from=dbarboza@ventanamicro.com; helo=mail-oi1-x241.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Add RVA23U64 as described in [1]. Add it as a child of RVA22U64 since all RVA22U64 mandatory extensions are also present in RVA23U64. What's left then is to list the mandatory extensions that are RVA23 only. A new "rva23u64" CPU is also added. [1] https://github.com/riscv/riscv-profiles/blob/main/src/rva23-profile.adoc Signed-off-by: Daniel Henrique Barboza Reviewed-by: Andrew Jones --- target/riscv/cpu-qom.h | 1 + target/riscv/cpu.c | 33 +++++++++++++++++++++++++++++++++ 2 files changed, 34 insertions(+) diff --git a/target/riscv/cpu-qom.h b/target/riscv/cpu-qom.h index d56b067bf2..53ead481a9 100644 --- a/target/riscv/cpu-qom.h +++ b/target/riscv/cpu-qom.h @@ -40,6 +40,7 @@ #define TYPE_RISCV_CPU_RV64E RISCV_CPU_TYPE_NAME("rv64e") #define TYPE_RISCV_CPU_RVA22U64 RISCV_CPU_TYPE_NAME("rva22u64") #define TYPE_RISCV_CPU_RVA22S64 RISCV_CPU_TYPE_NAME("rva22s64") +#define TYPE_RISCV_CPU_RVA23U64 RISCV_CPU_TYPE_NAME("rva23u64") #define TYPE_RISCV_CPU_IBEX RISCV_CPU_TYPE_NAME("lowrisc-ibex") #define TYPE_RISCV_CPU_SHAKTI_C RISCV_CPU_TYPE_NAME("shakti-c") #define TYPE_RISCV_CPU_SIFIVE_E31 RISCV_CPU_TYPE_NAME("sifive-e31") diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index e215b1004d..761da41e53 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -2397,9 +2397,34 @@ static RISCVCPUProfile RVA22S64 = { } }; +/* + * All mandatory extensions from RVA22U64 are present + * in RVA23U64 so set RVA22 as a parent. We need to + * declare just the newly added mandatory extensions. + */ +static RISCVCPUProfile RVA23U64 = { + .u_parent = &RVA22U64, + .s_parent = NULL, + .name = "rva23u64", + .misa_ext = RVV, + .priv_spec = RISCV_PROFILE_ATTR_UNUSED, + .satp_mode = RISCV_PROFILE_ATTR_UNUSED, + .ext_offsets = { + CPU_CFG_OFFSET(ext_zvfhmin), CPU_CFG_OFFSET(ext_zvbb), + CPU_CFG_OFFSET(ext_zvkt), CPU_CFG_OFFSET(ext_zihintntl), + CPU_CFG_OFFSET(ext_zicond), CPU_CFG_OFFSET(ext_zimop), + CPU_CFG_OFFSET(ext_zcmop), CPU_CFG_OFFSET(ext_zcb), + CPU_CFG_OFFSET(ext_zfa), CPU_CFG_OFFSET(ext_zawrs), + CPU_CFG_OFFSET(ext_supm), + + RISCV_PROFILE_EXT_LIST_END + } +}; + RISCVCPUProfile *riscv_profiles[] = { &RVA22U64, &RVA22S64, + &RVA23U64, NULL, }; @@ -2886,6 +2911,13 @@ static void rva22s64_profile_cpu_init(Object *obj) RVA22S64.enabled = true; } + +static void rva23u64_profile_cpu_init(Object *obj) +{ + rv64i_bare_cpu_init(obj); + + RVA23U64.enabled = true; +} #endif static const gchar *riscv_gdb_arch_name(CPUState *cs) @@ -3165,6 +3197,7 @@ static const TypeInfo riscv_cpu_type_infos[] = { DEFINE_BARE_CPU(TYPE_RISCV_CPU_RV64E, MXL_RV64, rv64e_bare_cpu_init), DEFINE_PROFILE_CPU(TYPE_RISCV_CPU_RVA22U64, MXL_RV64, rva22u64_profile_cpu_init), DEFINE_PROFILE_CPU(TYPE_RISCV_CPU_RVA22S64, MXL_RV64, rva22s64_profile_cpu_init), + DEFINE_PROFILE_CPU(TYPE_RISCV_CPU_RVA23U64, MXL_RV64, rva23u64_profile_cpu_init), #endif /* TARGET_RISCV64 */ }; From patchwork Wed Jan 15 13:49:57 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 13940483 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 64CF8C02183 for ; Wed, 15 Jan 2025 13:51:32 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tY3n6-00065c-BH; Wed, 15 Jan 2025 08:50:40 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tY3n2-00063w-L6 for qemu-devel@nongnu.org; Wed, 15 Jan 2025 08:50:37 -0500 Received: from mail-oi1-x242.google.com ([2607:f8b0:4864:20::242]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tY3n0-0007tS-Tz for qemu-devel@nongnu.org; Wed, 15 Jan 2025 08:50:36 -0500 Received: by mail-oi1-x242.google.com with SMTP id 5614622812f47-3eba5848ee4so1784214b6e.3 for ; Wed, 15 Jan 2025 05:50:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1736949033; x=1737553833; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=mNweTshZFgKWk8rKIiPuDmmq9oD0ful1jcMYNBMGKvA=; b=U1+SCdPzN92ZvuOC8ASMvAg7jkUP5vK0sB2dsZMvijUz0HP7FNvCBn3pu9cAilYSGc 7F4Zk7jfzZaSSXCdh4OpYPB4HqpYiqL1LUDHkbhG9wkPD3pHWiZg7IIuxAmDE0ynezkT aPyJNgRx5czk/TKtyhfovEDXUJNI4S9w1g4olfzbIz1Q8OcwkC55Lslb6VhX4Oq2U0gB xXVLf0T65E3CF8F/SCb44IpF8F2UBRv92BCJEEb00aXiqJFJdjgywThzfEsmD6Jwq1Bv 7Ypq5YlyusST9NkmjYRzgRcIF5OWEAqOpPcXJf9uillUYh/PTNQv5Cg5Xs2io2P+VZyD XBOA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1736949033; x=1737553833; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=mNweTshZFgKWk8rKIiPuDmmq9oD0ful1jcMYNBMGKvA=; b=HYbv0+HYYf2+HArDGe+2JB5JfH7gyD45S9F4IdugQUXbQICKX0OrIRwxu/icoDNOCx rWkdQuioHpbwHhSFY+toOcARvGzlguLTXlRf1dbiJCMjQgCKUj3H5wwbQ9WEkQurdpsX bMe7LqqdTHIDwpGOe1W732OPvDdDn6tN0HWfUcrjB26hRiY+v52h1cgq3tDNRL9HJ158 wU7ZucX6Ble68RjGVMSxBf236QzAxeWxoucXlo5aZPWPXzVH1cro6kLRkwQ9tgcEXlQc ocrT2I842HjbrpV1bayPw0CyzHLxDe7QpYI7KG8RrbVkuraQO1cBVfX1ErQNlbgz0+kb hHMw== X-Gm-Message-State: AOJu0Ywx7kd02JkVMr/6vdsuxq7VfNd+qczHWd71eePI+2MtunSl/0Be SM0d5FGABqQouRoVoz9BXwR+vuJJVxZfZ/M+2/Kq8ZNwtgucrplL7nZAfRdL10I4oo0LGyRgGT5 ABOpD7w== X-Gm-Gg: ASbGncs4Th/YK5VOed7BYc8ExEcyCyti5+nDIO+CL5AEpOVhTqgItN3aKDEG8a6DQR7 IljeATnfioHVHAuZ1sOSGdsnXbdQ7R78o3u/ZfNxLDJhCaD2JaEaunqSNAmNZW1DHtGwJCS0m9Z HxDwRch3VaA3TdykcFafWiu1TbviUWDXU+9CkD6IeumGaVzOSRobQHMa+6foYf4id/Mzikq8Myo cBn3kNnlaKB+IftDOO2Tt9ISek87tLB12d1aY+7p53bh1XXt2mcg6nHpns= X-Google-Smtp-Source: AGHT+IHy+H/gPhjCG043RtLz2g8d3phatJF0cSNze7FpoZXnlrbZ7N4SHWX9jPw70dl0ZIL21GGttw== X-Received: by 2002:a05:6808:1808:b0:3eb:5160:f859 with SMTP id 5614622812f47-3ef2ebb9771mr20358012b6e.9.1736949033535; Wed, 15 Jan 2025 05:50:33 -0800 (PST) Received: from grind.. ([191.202.238.10]) by smtp.gmail.com with ESMTPSA id 5614622812f47-3f0379eff69sm4952177b6e.41.2025.01.15.05.50.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 Jan 2025 05:50:32 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH v3 6/6] target/riscv: add RVA23S64 profile Date: Wed, 15 Jan 2025 10:49:57 -0300 Message-ID: <20250115134957.2179085-7-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250115134957.2179085-1-dbarboza@ventanamicro.com> References: <20250115134957.2179085-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::242; envelope-from=dbarboza@ventanamicro.com; helo=mail-oi1-x242.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Add RVA23S64 as described in [1]. This profile inherits all mandatory extensions of RVA23U64 and RVA22S64, making it a child of both profiles. A new "rva23s64" profile CPU is also added. This is the generated riscv,isa for it (taken via -M dumpdtb): rv64imafdcbvh_zic64b_zicbom_zicbop_zicboz_ziccamoa_ziccif_zicclsm_ ziccrse_zicond_zicntr_zicsr_zifencei_zihintntl_zihintpause_zihpm_zimop_ zmmul_za64rs_zaamo_zalrsc_zawrs_zfa_zfhmin_zca_zcb_zcd_zcmop_zba_zbb_zbs_ zkt_zvbb_zve32f_zve32x_zve64f_zve64d_zve64x_zvfhmin_zvkb_zvkt_shcounterenw_ sha_shgatpa_shtvala_shvsatpa_shvstvala_shvstvecd_smnpm_smstateen_ssccptr_ sscofpmf_sscounterenw_ssnpm_ssstateen_sstc_sstvala_sstvecd_ssu64xl_ supm_svade_svinval_svnapot_svpbmt [1] https://github.com/riscv/riscv-profiles/blob/main/src/rva23-profile.adoc Signed-off-by: Daniel Henrique Barboza Reviewed-by: Andrew Jones --- target/riscv/cpu-qom.h | 1 + target/riscv/cpu.c | 39 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 40 insertions(+) diff --git a/target/riscv/cpu-qom.h b/target/riscv/cpu-qom.h index 53ead481a9..4cfdb74891 100644 --- a/target/riscv/cpu-qom.h +++ b/target/riscv/cpu-qom.h @@ -41,6 +41,7 @@ #define TYPE_RISCV_CPU_RVA22U64 RISCV_CPU_TYPE_NAME("rva22u64") #define TYPE_RISCV_CPU_RVA22S64 RISCV_CPU_TYPE_NAME("rva22s64") #define TYPE_RISCV_CPU_RVA23U64 RISCV_CPU_TYPE_NAME("rva23u64") +#define TYPE_RISCV_CPU_RVA23S64 RISCV_CPU_TYPE_NAME("rva23s64") #define TYPE_RISCV_CPU_IBEX RISCV_CPU_TYPE_NAME("lowrisc-ibex") #define TYPE_RISCV_CPU_SHAKTI_C RISCV_CPU_TYPE_NAME("shakti-c") #define TYPE_RISCV_CPU_SIFIVE_E31 RISCV_CPU_TYPE_NAME("sifive-e31") diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 761da41e53..50e65932f6 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -2421,10 +2421,41 @@ static RISCVCPUProfile RVA23U64 = { } }; +/* + * As with RVA23U64, RVA23S64 also defines 'named features'. + * + * Cache related features that we consider enabled since we don't + * implement cache: Ssccptr + * + * Other named features that we already implement: Sstvecd, Sstvala, + * Sscounterenw, Ssu64xl + * + * The remaining features/extensions comes from RVA23U64. + */ +static RISCVCPUProfile RVA23S64 = { + .u_parent = &RVA23U64, + .s_parent = &RVA22S64, + .name = "rva23s64", + .misa_ext = RVS, + .priv_spec = PRIV_VERSION_1_13_0, + .satp_mode = VM_1_10_SV39, + .ext_offsets = { + /* New in RVA23S64 */ + CPU_CFG_OFFSET(ext_svnapot), CPU_CFG_OFFSET(ext_sstc), + CPU_CFG_OFFSET(ext_sscofpmf), CPU_CFG_OFFSET(ext_ssnpm), + + /* Named features: Sha */ + CPU_CFG_OFFSET(ext_sha), + + RISCV_PROFILE_EXT_LIST_END + } +}; + RISCVCPUProfile *riscv_profiles[] = { &RVA22U64, &RVA22S64, &RVA23U64, + &RVA23S64, NULL, }; @@ -2918,6 +2949,13 @@ static void rva23u64_profile_cpu_init(Object *obj) RVA23U64.enabled = true; } + +static void rva23s64_profile_cpu_init(Object *obj) +{ + rv64i_bare_cpu_init(obj); + + RVA23S64.enabled = true; +} #endif static const gchar *riscv_gdb_arch_name(CPUState *cs) @@ -3198,6 +3236,7 @@ static const TypeInfo riscv_cpu_type_infos[] = { DEFINE_PROFILE_CPU(TYPE_RISCV_CPU_RVA22U64, MXL_RV64, rva22u64_profile_cpu_init), DEFINE_PROFILE_CPU(TYPE_RISCV_CPU_RVA22S64, MXL_RV64, rva22s64_profile_cpu_init), DEFINE_PROFILE_CPU(TYPE_RISCV_CPU_RVA23U64, MXL_RV64, rva23u64_profile_cpu_init), + DEFINE_PROFILE_CPU(TYPE_RISCV_CPU_RVA23S64, MXL_RV64, rva23s64_profile_cpu_init), #endif /* TARGET_RISCV64 */ };