From patchwork Wed Jan 15 15:17:08 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Golani, Mitulkumar Ajitkumar" X-Patchwork-Id: 13940547 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B0834C02185 for ; Wed, 15 Jan 2025 15:20:32 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5BFEE10E739; Wed, 15 Jan 2025 15:20:32 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="mVnkTjZZ"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.16]) by gabe.freedesktop.org (Postfix) with ESMTPS id B1FB810E738; Wed, 15 Jan 2025 15:20:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1736954432; x=1768490432; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=lBo/vp9eE4f9Jzox6sW7vlqX+cXa6ujXlfr5qk+nhp8=; b=mVnkTjZZShDLzSsNKNb5xGx0qdl18aHNVyyxpeBNOePJuCbzaLPEYshZ foSo8a0FiMkO8Zo8VV8EKgSZ1tnEbUVCCKIrgOQBUnvtNL363LAM5keXU x2MZys4k3xcYUTAmlJSfbvoOswyZDATZQDNdMnuP7PYbGHbWNfkDfgYKZ 4QMg1GplraEkn+q4hqSRRw0C+xmfxxyeo0cgUA59yU6jeAIsr1AC9nXOr D9XGk6OEpG+aqcxAPnYiwyNSRleq8DMBScRXrefMePkVTKMQLXcfOOj8V ErGy2ikS/+UnuWGeCY1sf6Y3WDLvnYTHoP0b6dDT8PEfL9psAiR8Fwy9w g==; X-CSE-ConnectionGUID: QacrVVE3Sa2QaiAWveEOIA== X-CSE-MsgGUID: C9/fhVBrSj6Pep1tg/ns9g== X-IronPort-AV: E=McAfee;i="6700,10204,11316"; a="24894460" X-IronPort-AV: E=Sophos;i="6.13,206,1732608000"; d="scan'208";a="24894460" Received: from orviesa005.jf.intel.com ([10.64.159.145]) by fmvoesa110.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Jan 2025 07:20:32 -0800 X-CSE-ConnectionGUID: Xy1yn5EHTXS+0gm8ZhBbGQ== X-CSE-MsgGUID: aaAT2bNpQGqobT7fP1NNpQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="110298389" Received: from mgolanimitul-x299-ud4-pro.iind.intel.com ([10.190.239.114]) by orviesa005.jf.intel.com with ESMTP; 15 Jan 2025 07:20:30 -0800 From: Mitul Golani To: intel-gfx@lists.freedesktop.org, v5-000intel-xe@lists.freedesktop.org Cc: ankit.k.nautiyal@intel.com, jani.nikula@intel.com, ville.syrjala@intel.com Subject: [PATCH v5 1/7] drm/i915/scaler: Add and compute scaling factors Date: Wed, 15 Jan 2025 20:47:08 +0530 Message-ID: <20250115151714.3665211-2-mitulkumar.ajitkumar.golani@intel.com> X-Mailer: git-send-email 2.48.0 In-Reply-To: <20250115151714.3665211-1-mitulkumar.ajitkumar.golani@intel.com> References: <20250115151714.3665211-1-mitulkumar.ajitkumar.golani@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Add scaling factors to scaler_state for a particular scaler user. These factors will be used later to compute scaler prefill latency. Currently, only plane scaling factors are stored, but the same members can later be extended to store pipe scaling factors as well. --v2: - Rephrase commit message which corrects typo and information about scaling factor storage. [Ankit] Signed-off-by: Mitul Golani Reviewed-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_display_types.h | 2 ++ drivers/gpu/drm/i915/display/skl_scaler.c | 3 +++ 2 files changed, 5 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index 8271e50e3644..603f292996aa 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -711,6 +711,8 @@ struct intel_initial_plane_config { struct intel_scaler { u32 mode; bool in_use; + int hscale; + int vscale; }; struct intel_crtc_scaler_state { diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c b/drivers/gpu/drm/i915/display/skl_scaler.c index a11e09a15e23..67b86f6f62fc 100644 --- a/drivers/gpu/drm/i915/display/skl_scaler.c +++ b/drivers/gpu/drm/i915/display/skl_scaler.c @@ -434,6 +434,9 @@ static int intel_atomic_setup_scaler(struct intel_crtc_scaler_state *scaler_stat return -EINVAL; } + + scaler_state->scalers[*scaler_id].hscale = hscale; + scaler_state->scalers[*scaler_id].vscale = vscale; } drm_dbg_kms(display->drm, "[CRTC:%d:%s] attached scaler id %u.%u to %s:%d\n", From patchwork Wed Jan 15 15:17:09 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Golani, Mitulkumar Ajitkumar" X-Patchwork-Id: 13940548 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BD9BBC02183 for ; Wed, 15 Jan 2025 15:20:35 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 65C0210E049; Wed, 15 Jan 2025 15:20:35 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="n6+bJf6l"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.16]) by gabe.freedesktop.org (Postfix) with ESMTPS id 2686510E715; Wed, 15 Jan 2025 15:20:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1736954434; x=1768490434; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Bme62NuvSUl9gIg8OPNGDs3wSbRVLCwdP2vUtKFG67c=; b=n6+bJf6lmtCy7Z8k3DH8wtXM0XvZPDCYrFdfJpjlggg3TTQPAYVKH/KU uuu5+uv8/lLOizrU+dsv5L4KfMDDJgvHCF6wEBWEL+EQTVnQvwXSLcsW0 mUF80E9Z3hVtThpnzWpDrCHnVB+eMRuLobDfF7dWmVkypOvs59sTpG5qr /yTLWkEqQ8Gpaptbypgufe1DPA+ygLHNIkhtRzjDPHvPHldpICt6Bw6VM wTCCdda2H1HTDJ2AEm6Tn9EYHgTSwIzlgamFWIzUmGGKQo0wj2u5qlogB iC5VCiaWTI71+HeFR+Yz2dfAUfhiJM3bY+k1hJxtOHvFAo4lxqn/brKN8 g==; X-CSE-ConnectionGUID: crmedZ5mTW+lkFZVwTT0gA== X-CSE-MsgGUID: doQGkihjSG2fQ6j6QkvSfg== X-IronPort-AV: E=McAfee;i="6700,10204,11316"; a="24894469" X-IronPort-AV: E=Sophos;i="6.13,206,1732608000"; d="scan'208";a="24894469" Received: from orviesa005.jf.intel.com ([10.64.159.145]) by fmvoesa110.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Jan 2025 07:20:34 -0800 X-CSE-ConnectionGUID: VllpErfjTV221bJmjc2CSw== X-CSE-MsgGUID: C10is08gQp2/LzZTxQs5aQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="110298418" Received: from mgolanimitul-x299-ud4-pro.iind.intel.com ([10.190.239.114]) by orviesa005.jf.intel.com with ESMTP; 15 Jan 2025 07:20:32 -0800 From: Mitul Golani To: intel-gfx@lists.freedesktop.org, v5-000intel-xe@lists.freedesktop.org Cc: ankit.k.nautiyal@intel.com, jani.nikula@intel.com, ville.syrjala@intel.com Subject: [PATCH v5 2/7] drm/i915/scaler: Use crtc_state to setup plane or pipe scaler Date: Wed, 15 Jan 2025 20:47:09 +0530 Message-ID: <20250115151714.3665211-3-mitulkumar.ajitkumar.golani@intel.com> X-Mailer: git-send-email 2.48.0 In-Reply-To: <20250115151714.3665211-1-mitulkumar.ajitkumar.golani@intel.com> References: <20250115151714.3665211-1-mitulkumar.ajitkumar.golani@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Pass crtc_state to intel_atomic_setup_scaler, this will help to check if pch_pfit enabled or not and also will be useful to pass scaler_state with the same which will be used later to store hscale and vscale values. -- v2: - Commit message updates. parse to pass. (Ankit) Signed-off-by: Mitul Golani Reviewed-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/skl_scaler.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c b/drivers/gpu/drm/i915/display/skl_scaler.c index 67b86f6f62fc..12efa4008027 100644 --- a/drivers/gpu/drm/i915/display/skl_scaler.c +++ b/drivers/gpu/drm/i915/display/skl_scaler.c @@ -319,13 +319,15 @@ static int intel_allocate_scaler(struct intel_crtc_scaler_state *scaler_state, return -1; } -static int intel_atomic_setup_scaler(struct intel_crtc_scaler_state *scaler_state, +static int intel_atomic_setup_scaler(struct intel_crtc_state *crtc_state, int num_scalers_need, struct intel_crtc *crtc, const char *name, int idx, struct intel_plane_state *plane_state, int *scaler_id) { struct intel_display *display = to_intel_display(crtc); + struct intel_crtc_scaler_state *scaler_state = + &crtc_state->scaler_state; struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); u32 mode; @@ -455,7 +457,7 @@ static int setup_crtc_scaler(struct intel_atomic_state *state, struct intel_crtc_scaler_state *scaler_state = &crtc_state->scaler_state; - return intel_atomic_setup_scaler(scaler_state, + return intel_atomic_setup_scaler(crtc_state, hweight32(scaler_state->scaler_users), crtc, "CRTC", crtc->base.base.id, NULL, &scaler_state->scaler_id); @@ -490,7 +492,7 @@ static int setup_plane_scaler(struct intel_atomic_state *state, if (IS_ERR(plane_state)) return PTR_ERR(plane_state); - return intel_atomic_setup_scaler(scaler_state, + return intel_atomic_setup_scaler(crtc_state, hweight32(scaler_state->scaler_users), crtc, "PLANE", plane->base.base.id, plane_state, &plane_state->scaler_id); From patchwork Wed Jan 15 15:17:10 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Golani, Mitulkumar Ajitkumar" X-Patchwork-Id: 13940549 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C7620C02180 for ; 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[Ankit] Signed-off-by: Mitul Golani --- drivers/gpu/drm/i915/display/skl_scaler.c | 70 +++++++++++++---------- 1 file changed, 41 insertions(+), 29 deletions(-) diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c b/drivers/gpu/drm/i915/display/skl_scaler.c index 12efa4008027..a832cdccd9fa 100644 --- a/drivers/gpu/drm/i915/display/skl_scaler.c +++ b/drivers/gpu/drm/i915/display/skl_scaler.c @@ -319,6 +319,44 @@ static int intel_allocate_scaler(struct intel_crtc_scaler_state *scaler_state, return -1; } +static void +calculate_max_scale(struct intel_crtc *crtc, + bool is_yuv_semiplanar, + int scaler_id, + int *max_hscale, int *max_vscale) +{ + struct intel_display *display = to_intel_display(crtc); + + /* + * FIXME: When two scalers are needed, but only one of + * them needs to downscale, we should make sure that + * the one that needs downscaling support is assigned + * as the first scaler, so we don't reject downscaling + * unnecessarily. + */ + + if (DISPLAY_VER(display) >= 14) { + /* + * On versions 14 and up, only the first + * scaler supports a vertical scaling factor + * of more than 1.0, while a horizontal + * scaling factor of 3.0 is supported. + */ + *max_hscale = 0x30000 - 1; + + if (scaler_id == 0) + *max_vscale = 0x30000 - 1; + else + *max_vscale = 0x10000; + } else if (DISPLAY_VER(display) >= 10 || !is_yuv_semiplanar) { + *max_hscale = 0x30000 - 1; + *max_vscale = 0x30000 - 1; + } else { + *max_hscale = 0x20000 - 1; + *max_vscale = 0x20000 - 1; + } +} + static int intel_atomic_setup_scaler(struct intel_crtc_state *crtc_state, int num_scalers_need, struct intel_crtc *crtc, const char *name, int idx, @@ -388,35 +426,9 @@ static int intel_atomic_setup_scaler(struct intel_crtc_state *crtc_state, const struct drm_rect *dst = &plane_state->uapi.dst; int hscale, vscale, max_vscale, max_hscale; - /* - * FIXME: When two scalers are needed, but only one of - * them needs to downscale, we should make sure that - * the one that needs downscaling support is assigned - * as the first scaler, so we don't reject downscaling - * unnecessarily. - */ - - if (DISPLAY_VER(display) >= 14) { - /* - * On versions 14 and up, only the first - * scaler supports a vertical scaling factor - * of more than 1.0, while a horizontal - * scaling factor of 3.0 is supported. - */ - max_hscale = 0x30000 - 1; - if (*scaler_id == 0) - max_vscale = 0x30000 - 1; - else - max_vscale = 0x10000; - - } else if (DISPLAY_VER(display) >= 10 || - !intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier)) { - max_hscale = 0x30000 - 1; - max_vscale = 0x30000 - 1; - } else { - max_hscale = 0x20000 - 1; - max_vscale = 0x20000 - 1; - } + calculate_max_scale(crtc, + intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier), + *scaler_id, &max_hscale, &max_vscale); /* * FIXME: We should change the if-else block above to From patchwork Wed Jan 15 15:17:11 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Golani, Mitulkumar Ajitkumar" X-Patchwork-Id: 13940550 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0A6C4C02185 for ; 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X-CSE-ConnectionGUID: g6mm11+nTNKL+8wTzbX6ug== X-CSE-MsgGUID: uq1nNaw1Ro6H1qizQOdbWg== X-IronPort-AV: E=McAfee;i="6700,10204,11316"; a="24894491" X-IronPort-AV: E=Sophos;i="6.13,206,1732608000"; d="scan'208";a="24894491" Received: from orviesa005.jf.intel.com ([10.64.159.145]) by fmvoesa110.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Jan 2025 07:20:39 -0800 X-CSE-ConnectionGUID: TZcUGV2pSguaURpvoo1qKA== X-CSE-MsgGUID: a3XC/iWqSB6eyuWZhWaZLg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="110298484" Received: from mgolanimitul-x299-ud4-pro.iind.intel.com ([10.190.239.114]) by orviesa005.jf.intel.com with ESMTP; 15 Jan 2025 07:20:37 -0800 From: Mitul Golani To: intel-gfx@lists.freedesktop.org, v5-000intel-xe@lists.freedesktop.org Cc: ankit.k.nautiyal@intel.com, jani.nikula@intel.com, ville.syrjala@intel.com Subject: [PATCH v5 4/7] drm/i915/scaler: Compute scaling factors for pipe scaler Date: Wed, 15 Jan 2025 20:47:11 +0530 Message-ID: <20250115151714.3665211-5-mitulkumar.ajitkumar.golani@intel.com> X-Mailer: git-send-email 2.48.0 In-Reply-To: <20250115151714.3665211-1-mitulkumar.ajitkumar.golani@intel.com> References: <20250115151714.3665211-1-mitulkumar.ajitkumar.golani@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Compute scaling factors and scaler user for pipe scaler if particular scaler user is pipe scaler. --v2: - Update typo 'plane scaling' to 'pipe scaling'. [Ankit] - Remove FIXME tag which was added to check for pipe scaling factors as well. [Ankit] - Should be common hscale, vscale instead of local one to avoid garbage overwritten. - Typo in commit message 'perticular' to 'particular'. --v3: - Separate out max_scaling information. [Ankit] - Use max_hscale and max_vscale info instead of INT_MAX. [Ankit] Signed-off-by: Mitul Golani --- drivers/gpu/drm/i915/display/skl_scaler.c | 36 ++++++++++++++++++----- 1 file changed, 29 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c b/drivers/gpu/drm/i915/display/skl_scaler.c index a832cdccd9fa..72344044d9d3 100644 --- a/drivers/gpu/drm/i915/display/skl_scaler.c +++ b/drivers/gpu/drm/i915/display/skl_scaler.c @@ -368,6 +368,7 @@ static int intel_atomic_setup_scaler(struct intel_crtc_state *crtc_state, &crtc_state->scaler_state; struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); u32 mode; + int hscale, vscale, max_vscale, max_hscale; if (*scaler_id < 0) *scaler_id = intel_allocate_scaler(scaler_state, crtc); @@ -416,15 +417,10 @@ static int intel_atomic_setup_scaler(struct intel_crtc_state *crtc_state, mode = SKL_PS_SCALER_MODE_DYN; } - /* - * FIXME: we should also check the scaler factors for pfit, so - * this shouldn't be tied directly to planes. - */ if (plane_state && plane_state->hw.fb) { const struct drm_framebuffer *fb = plane_state->hw.fb; const struct drm_rect *src = &plane_state->uapi.src; const struct drm_rect *dst = &plane_state->uapi.dst; - int hscale, vscale, max_vscale, max_hscale; calculate_max_scale(crtc, intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier), @@ -448,11 +444,37 @@ static int intel_atomic_setup_scaler(struct intel_crtc_state *crtc_state, return -EINVAL; } + } + + if (crtc_state->pch_pfit.enabled) { + struct drm_rect src; + + drm_rect_init(&src, 0, 0, + drm_rect_width(&crtc_state->pipe_src) << 16, + drm_rect_height(&crtc_state->pipe_src) << 16); + + calculate_max_scale(crtc, 0, *scaler_id, + &max_hscale, &max_vscale); - scaler_state->scalers[*scaler_id].hscale = hscale; - scaler_state->scalers[*scaler_id].vscale = vscale; + hscale = drm_rect_calc_hscale(&src, &crtc_state->pch_pfit.dst, + 0, max_hscale); + vscale = drm_rect_calc_vscale(&src, &crtc_state->pch_pfit.dst, + 0, max_vscale); + + if (hscale < 0 || vscale < 0) { + drm_dbg_kms(display->drm, + "Scaler %d doesn't support required pipe scaling\n", + *scaler_id); + drm_rect_debug_print("src: ", &src, true); + drm_rect_debug_print("dst: ", &crtc_state->pch_pfit.dst, false); + + return -EINVAL; + } } + scaler_state->scalers[*scaler_id].hscale = hscale; + scaler_state->scalers[*scaler_id].vscale = vscale; + drm_dbg_kms(display->drm, "[CRTC:%d:%s] attached scaler id %u.%u to %s:%d\n", crtc->base.base.id, crtc->base.name, crtc->pipe, *scaler_id, name, idx); From patchwork Wed Jan 15 15:17:12 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Golani, Mitulkumar Ajitkumar" X-Patchwork-Id: 13940551 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D0A25C02183 for ; Wed, 15 Jan 2025 15:20:43 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7651910E713; 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X-CSE-ConnectionGUID: E73phFEdQDmoIiX35F2DPQ== X-CSE-MsgGUID: +pj4wCGLTK+R7CuTQUtNEA== X-IronPort-AV: E=McAfee;i="6700,10204,11316"; a="24894505" X-IronPort-AV: E=Sophos;i="6.13,206,1732608000"; d="scan'208";a="24894505" Received: from orviesa005.jf.intel.com ([10.64.159.145]) by fmvoesa110.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Jan 2025 07:20:42 -0800 X-CSE-ConnectionGUID: FToRzw5OT4SDn0S00Vz6Cg== X-CSE-MsgGUID: 9ef8lR1gSLyQDWjrXO4t0w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="110298524" Received: from mgolanimitul-x299-ud4-pro.iind.intel.com ([10.190.239.114]) by orviesa005.jf.intel.com with ESMTP; 15 Jan 2025 07:20:40 -0800 From: Mitul Golani To: intel-gfx@lists.freedesktop.org, v5-000intel-xe@lists.freedesktop.org Cc: ankit.k.nautiyal@intel.com, jani.nikula@intel.com, ville.syrjala@intel.com Subject: [PATCH v5 5/7] drm/i915/scaler: Limit pipe scaler downscaling factors for YUV420 Date: Wed, 15 Jan 2025 20:47:12 +0530 Message-ID: <20250115151714.3665211-6-mitulkumar.ajitkumar.golani@intel.com> X-Mailer: git-send-email 2.48.0 In-Reply-To: <20250115151714.3665211-1-mitulkumar.ajitkumar.golani@intel.com> References: <20250115151714.3665211-1-mitulkumar.ajitkumar.golani@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Limit downscaling to less than 1.5 (source/destination) in the horizontal direction and 1.0 in the vertical direction, When configured for Pipe YUV 420 encoding for port output. Bspec: 50441 Signed-off-by: Mitul Golani --- drivers/gpu/drm/i915/display/skl_scaler.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c b/drivers/gpu/drm/i915/display/skl_scaler.c index 72344044d9d3..c9d7966b37ff 100644 --- a/drivers/gpu/drm/i915/display/skl_scaler.c +++ b/drivers/gpu/drm/i915/display/skl_scaler.c @@ -456,6 +456,16 @@ static int intel_atomic_setup_scaler(struct intel_crtc_state *crtc_state, calculate_max_scale(crtc, 0, *scaler_id, &max_hscale, &max_vscale); + /* + * When configured for Pipe YUV 420 encoding for port output, + * limit downscaling to less than 1.5 (source/destination) in + * the horizontal direction and 1.0 in the vertical direction. + */ + if (crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420) { + max_hscale = 0x18000 - 1; + max_vscale = 0x10000; + } + hscale = drm_rect_calc_hscale(&src, &crtc_state->pch_pfit.dst, 0, max_hscale); vscale = drm_rect_calc_vscale(&src, &crtc_state->pch_pfit.dst, From patchwork Wed Jan 15 15:17:13 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Golani, Mitulkumar Ajitkumar" X-Patchwork-Id: 13940552 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 24A6BC02185 for ; Wed, 15 Jan 2025 15:20:46 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B6B4810E743; Wed, 15 Jan 2025 15:20:45 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="OieIh9yN"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.16]) by gabe.freedesktop.org (Postfix) with ESMTPS id 925BB10E736; Wed, 15 Jan 2025 15:20:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1736954445; x=1768490445; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=tTamYh7+FgVkTqBMBmaHgppTjcsR1I32AisMWQoyijI=; b=OieIh9yNS+WPwKeGnlDRlF01yn3fl9eT7r4GT9G52uoU3AJvVyPvB454 F+oc5+R9TjvE3G81eNuUbiGJAlu3xYakP0cQ9PqK4BJ1+6D6c+YGBDn7R PRhTkDVBj2YrmsO5Vpf3UMspkwcOTx3IkzjevnqTAMfPicXO3P+sd/tOv SihljwqvufyQRbgBjT1drVfTvBCas38iJj5qi+XiOqvpKmZSseK7B6um2 LCOqheia70YkibdCdrdTRTHrg5MzMLzi3zCRjTHVvNR4gcGppr8rGPzg9 HGqs8mQHRTuYLtXiPIJ/RF1UjiBdPYhsTl8zdDJQT3iKXD6MKWX5I81Dl Q==; X-CSE-ConnectionGUID: cbVPPSNDRbKPi8gFKIR0Cg== X-CSE-MsgGUID: 2RiJV6a8Sp+qudIrIbWTmA== X-IronPort-AV: E=McAfee;i="6700,10204,11316"; a="24894522" X-IronPort-AV: E=Sophos;i="6.13,206,1732608000"; d="scan'208";a="24894522" Received: from orviesa005.jf.intel.com ([10.64.159.145]) by fmvoesa110.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Jan 2025 07:20:44 -0800 X-CSE-ConnectionGUID: b225Tga0QxOOmRvztJpVng== X-CSE-MsgGUID: CcxHoGMKSuqRpoKCgTeX3Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="110298568" Received: from mgolanimitul-x299-ud4-pro.iind.intel.com ([10.190.239.114]) by orviesa005.jf.intel.com with ESMTP; 15 Jan 2025 07:20:42 -0800 From: Mitul Golani To: intel-gfx@lists.freedesktop.org, v5-000intel-xe@lists.freedesktop.org Cc: ankit.k.nautiyal@intel.com, jani.nikula@intel.com, ville.syrjala@intel.com Subject: [PATCH v5 6/7] drm/i915/scaler: Check if vblank is sufficient for scaler Date: Wed, 15 Jan 2025 20:47:13 +0530 Message-ID: <20250115151714.3665211-7-mitulkumar.ajitkumar.golani@intel.com> X-Mailer: git-send-email 2.48.0 In-Reply-To: <20250115151714.3665211-1-mitulkumar.ajitkumar.golani@intel.com> References: <20250115151714.3665211-1-mitulkumar.ajitkumar.golani@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" High refresh rate panels which may have small line times and vblank sizes, Check if vblank size is sufficient for enabled scaler users. Bspec: 70151 --v2: - Use hweight* family of functions for counting bits. [Jani] - Update precision handling for hscale and vscale. [Ankit] - Consider chroma downscaling factor during latency calculation. [Ankit] - Replace function name from scaler_prefill_time to scaler_prefill_latency. --v3: - hscale_k and vscale_k values are already left shifted by 16, after multiplying by 1000, those need to be right shifted to 16. [Ankit] - Replace YCBCR444 to YCBCR420. [Ankit] - Divide by 1000 * 1000 in end to get correct precision. [Ankit] - Initialise latency to 0 to avoid any garbage. --v4: - Elaborate commit message and add Bspec number. [Ankit] - Improvise latency calculation. [Ankit] - Use ceiling value for down scaling factor when less than 1 as per bspec. [Ankit] - Correct linetime calculation. [Ankit] - Consider cdclk prefill adjustment while prefill computation.[Ankit] Signed-off-by: Mitul Golani --- drivers/gpu/drm/i915/display/skl_watermark.c | 49 ++++++++++++++++++++ 1 file changed, 49 insertions(+) diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c index f4458d1185b3..ca9d5677c356 100644 --- a/drivers/gpu/drm/i915/display/skl_watermark.c +++ b/drivers/gpu/drm/i915/display/skl_watermark.c @@ -2292,6 +2292,54 @@ static int icl_build_plane_wm(struct intel_crtc_state *crtc_state, return 0; } +static int +cdclk_prefill_adjustment(const struct intel_crtc_state *crtc_state) +{ + struct intel_atomic_state *state = + to_intel_atomic_state(crtc_state->uapi.state); + const struct intel_cdclk_state *cdclk_state; + + cdclk_state = intel_atomic_get_cdclk_state(state); + if (IS_ERR(cdclk_state)) + return PTR_ERR(cdclk_state); + + return min(1, DIV_ROUND_UP(crtc_state->pixel_rate, + 2 * cdclk_state->logical.cdclk)); +} + +static int +scaler_prefill_latency(const struct intel_crtc_state *crtc_state) +{ + const struct intel_crtc_scaler_state *scaler_state = + &crtc_state->scaler_state; + int num_scaler_users = hweight32(scaler_state->scaler_users); + int latency = 0; + int linetime = + intel_usecs_to_scanlines(&crtc_state->hw.adjusted_mode, + DIV_ROUND_UP(1000 * crtc_state->hw.adjusted_mode.htotal, + crtc_state->pixel_rate)); + long long hscale_k, vscale_k; + + if (!num_scaler_users) + return latency; + + latency = intel_usecs_to_scanlines(&crtc_state->hw.adjusted_mode, 4 * linetime); + + if (num_scaler_users > 1) { + int chroma_downscaling_factor = + crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420 ? 2 : 1; + hscale_k = max(1000, mul_u32_u32(scaler_state->scalers[0].hscale, 1000) >> 16); + vscale_k = max(1000, mul_u32_u32(scaler_state->scalers[0].vscale, 1000) >> 16); + + latency += chroma_downscaling_factor * + DIV_ROUND_UP_ULL((4 * linetime * hscale_k * vscale_k), + 1000000); + latency *= cdclk_prefill_adjustment(crtc_state); + } + + return latency; +} + static bool skl_is_vblank_too_short(const struct intel_crtc_state *crtc_state, int wm0_lines, int latency) @@ -2302,6 +2350,7 @@ skl_is_vblank_too_short(const struct intel_crtc_state *crtc_state, /* FIXME missing scaler and DSC pre-fill time */ return crtc_state->framestart_delay + intel_usecs_to_scanlines(adjusted_mode, latency) + + scaler_prefill_latency(crtc_state) + wm0_lines > adjusted_mode->crtc_vtotal - adjusted_mode->crtc_vblank_start; } From patchwork Wed Jan 15 15:17:14 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Golani, Mitulkumar Ajitkumar" X-Patchwork-Id: 13940553 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 63D9FC02183 for ; Wed, 15 Jan 2025 15:20:49 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0348610E746; Wed, 15 Jan 2025 15:20:49 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="iMNHBBMf"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.16]) by gabe.freedesktop.org (Postfix) with ESMTPS id 2151010E762; Wed, 15 Jan 2025 15:20:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1736954447; x=1768490447; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=nihD+WgmgQqrBHx1J26UZNpRpsaMhOyRdWuSmfm//YE=; b=iMNHBBMf9LFvEftAjXlB+pubK7dFKMCdMXW1Ynj9GJpMJjzSpKMNJLr5 CotlKyXOgjM1BI+V7ASrPqATuN1jPHRuRWdhAs3YHndSHVCsa7q1Kg8B5 wkaULQsyyqwwSRaV2aFxVAf/m82PHBm481ZQaJ/ipw7nn8kZ1tnINuxwD FcYaBIV0+1K+awvAqKJKuBSNhwYSKPMfjA0//TuqB8CM0xx0ZPNspBSNu Wqnn5WhPl+6fhZQeOz/qY7n5tkif65lR6yzYik9nOWrCwO7ng0ORQXcsE vPAKjGb2kTRbHeNd0OT5lTg2emPgb0Kj65Chlwr9y4JQuo0EHeKjLdLxW g==; X-CSE-ConnectionGUID: 3WpgYzFsQgeerY7rwZf0Ow== X-CSE-MsgGUID: 2NOg5gfmQ2qwLRPusv/oow== X-IronPort-AV: E=McAfee;i="6700,10204,11316"; a="24894540" X-IronPort-AV: E=Sophos;i="6.13,206,1732608000"; d="scan'208";a="24894540" Received: from orviesa005.jf.intel.com ([10.64.159.145]) by fmvoesa110.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Jan 2025 07:20:47 -0800 X-CSE-ConnectionGUID: ka+J5rMjQSe7dKCVNnHXWw== X-CSE-MsgGUID: dM+eKLALRz+5S+Fgow0jbw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="110298613" Received: from mgolanimitul-x299-ud4-pro.iind.intel.com ([10.190.239.114]) by orviesa005.jf.intel.com with ESMTP; 15 Jan 2025 07:20:45 -0800 From: Mitul Golani To: intel-gfx@lists.freedesktop.org, v5-000intel-xe@lists.freedesktop.org Cc: ankit.k.nautiyal@intel.com, jani.nikula@intel.com, ville.syrjala@intel.com Subject: [PATCH v5 7/7] drm/i915/dsc: Check if vblank is sufficient for dsc prefill Date: Wed, 15 Jan 2025 20:47:14 +0530 Message-ID: <20250115151714.3665211-8-mitulkumar.ajitkumar.golani@intel.com> X-Mailer: git-send-email 2.48.0 In-Reply-To: <20250115151714.3665211-1-mitulkumar.ajitkumar.golani@intel.com> References: <20250115151714.3665211-1-mitulkumar.ajitkumar.golani@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" High refresh rate panels which may have small line times and vblank sizes, Check if vblank size is sufficient for dsc prefill latency. Bspec: 70151 --v2: - Consider chroma downscaling factor in latency calculation. [Ankit] - Replace with appropriate function name. --v3: - Remove FIXME tag.[Ankit] - Replace Ycbcr444 to Ycbcr420.[Anit] - Correct precision. [Ankit] - Use some local valiables like linetime_factor and latency to adjust precision. - Declare latency to 0 initially to avoid returning any garbage values. - Account for second scaler downscaling factor as well. [Ankit] --v4: - Improvise hscale and vscale calculation. [Ankit] - Use appropriate name for number of scaler users. [Ankit] - Update commit message and rebase. - Add linetime and cdclk prefill adjustment calculation. [Ankit] Signed-off-by: Mitul Golani --- drivers/gpu/drm/i915/display/skl_watermark.c | 35 +++++++++++++++++++- 1 file changed, 34 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c index ca9d5677c356..13666adb8e36 100644 --- a/drivers/gpu/drm/i915/display/skl_watermark.c +++ b/drivers/gpu/drm/i915/display/skl_watermark.c @@ -2307,6 +2307,39 @@ cdclk_prefill_adjustment(const struct intel_crtc_state *crtc_state) 2 * cdclk_state->logical.cdclk)); } +static int +dsc_prefill_latency(const struct intel_crtc_state *crtc_state) +{ + const struct intel_crtc_scaler_state *scaler_state = + &crtc_state->scaler_state; + int latency = 0; + int num_scaler_users = hweight32(scaler_state->scaler_users); + int chroma_downscaling_factor = + crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420 ? 2 : 1; + long long hscale_k[2] = {0, 0}; + long long vscale_k[2] = {0, 0}; + + if (!crtc_state->dsc.compression_enable || !num_scaler_users) + return latency; + + for (int i = 0; i < num_scaler_users; i++) { + hscale_k[i] = + max(1000, mul_u32_u32(scaler_state->scalers[i].hscale, 1000) >> 16); + vscale_k[i] = + max(1000, mul_u32_u32(scaler_state->scalers[i].vscale, 1000) >> 16); + } + + latency = DIV_ROUND_UP_ULL(hscale_k[0] * vscale_k[0], 1000000); + + if (num_scaler_users > 1) + latency *= DIV_ROUND_UP_ULL(hscale_k[1] * vscale_k[1], 1000000); + + latency *= DIV_ROUND_UP(15 * crtc_state->linetime, 10) * chroma_downscaling_factor * + cdclk_prefill_adjustment(crtc_state); + + return latency; +} + static int scaler_prefill_latency(const struct intel_crtc_state *crtc_state) { @@ -2347,10 +2380,10 @@ skl_is_vblank_too_short(const struct intel_crtc_state *crtc_state, const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; - /* FIXME missing scaler and DSC pre-fill time */ return crtc_state->framestart_delay + intel_usecs_to_scanlines(adjusted_mode, latency) + scaler_prefill_latency(crtc_state) + + dsc_prefill_latency(crtc_state) + wm0_lines > adjusted_mode->crtc_vtotal - adjusted_mode->crtc_vblank_start; }