From patchwork Wed Jan 15 18:43:11 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 13940812 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 872ECC02180 for ; Wed, 15 Jan 2025 18:45:37 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tY8MZ-00083F-60; Wed, 15 Jan 2025 13:43:35 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tY8MW-00082E-Ky for qemu-devel@nongnu.org; Wed, 15 Jan 2025 13:43:32 -0500 Received: from mail-oa1-x33.google.com ([2001:4860:4864:20::33]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tY8MV-000361-7g for qemu-devel@nongnu.org; Wed, 15 Jan 2025 13:43:32 -0500 Received: by mail-oa1-x33.google.com with SMTP id 586e51a60fabf-29e65257182so81286fac.2 for ; Wed, 15 Jan 2025 10:43:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1736966608; x=1737571408; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=LFfXCjqMoPK4O+ptGX63fRnmxQjg5+dlAqXaV80UpeI=; b=LaX8M5vbshQDAJDK+m7XpzpVCo5oLZUnXaKUmeBfFdm33HiiJXqo4Ovx+OaksstBZ0 gRuy9M3ijQ7kc2cS0Miucsk1AqD41KrcXfK5W3OFEzpjXC7sJ+0bItBjdHSc/RYXdULT ZaT6uvrl4aC7Of6T2Y5937d5gZeV1+je3IBi/o99Sii1iPICqj8Q8gfXpoxxV0jCso5M i5zw20mPoEmeW1kI2m/L1XuxcMe1xysLzamHlP/9vv1G70s7h0meMOR5WfT/zcLyXCfa bi60JfchXu1CwQBpRsF9rTKkjarzcuJxGzX2sdZja9moZ3ibGwNrNbFYZMGXPNjR5vfV 7Cug== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1736966608; x=1737571408; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=LFfXCjqMoPK4O+ptGX63fRnmxQjg5+dlAqXaV80UpeI=; b=Y+lh8l7Xx7+MISf91l1hLm72tprzR9053zone62txU2TDEd50HoCxupwRyKhsELtaS hhCtatEeJY1qiG3qHm4xurG9pLqit8nBiBqvx39uIvqknMBV123ZiamD3Q4+p0HONWxv Ow+YQL5iZVky+NooTni8bRfgEikLn8hB/Ck8IEGXD4M4EUiNMIDflAR+h4Y/4xoHhWhD VwvnP3lAzMw5YtfI5XIu8TZheqkKBfHL8GVd0FR0wtAxoZM8kF/KhphL2FPKy3ompepn 5dTMnLaIWZFpJyzMzBo+MaU2lyV/6NX8MoYKYVQJ/GP8jw83iSZyfGrr6ARbbepHkAXr 3ymg== X-Gm-Message-State: AOJu0YwGLcWQKxtSFz+jkqkNkw4XsK0NexXM0uXGxvRlJRCSf54zTlI+ g/qLbjdaKDv6tQ8V8RMtl9xzw4CW+620nNO8M6mwb5Lxyt5z2+72yFJJYgBmlILiomulfp/E5Jp Awq0= X-Gm-Gg: ASbGncvRGgux3V7MIFoFeOq8wvfCrSzJ8qYE0ac1SJzVH26DLvxQobWILfs6ViZuSZm SPrlk8m07r+0nYqcj1n91Vq+9605LPGig416XKc1CpXrSzc4inlJE5rWC0PrmRHeVWEC4nAFLNy Rg7+OuXaedWAUHeRVNPGJqMgu6kJsuyHov7jZPdcJVxsz/gwVPifpqAM08eGpx9aCt/iBzzZHfa TytfFVyLsyoeAXZB9oToobKLNGt5HF9FSRpptu11XJTQbXVQeCQXh/l7uk= X-Google-Smtp-Source: AGHT+IF8eUqs7CzXGYJBLumlaBqpWohRss4fojhmPVOj4ess2swu3bekmGxHyI+MryHFKJRao0+qAQ== X-Received: by 2002:a05:6870:30c:b0:29e:499d:1d33 with SMTP id 586e51a60fabf-2aa066c7d11mr16739926fac.14.1736966608347; Wed, 15 Jan 2025 10:43:28 -0800 (PST) Received: from grind.. ([191.202.238.10]) by smtp.gmail.com with ESMTPSA id 586e51a60fabf-2ad80a5cb64sm6539196fac.47.2025.01.15.10.43.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 Jan 2025 10:43:27 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH v4 1/6] target/riscv: add ssu64xl Date: Wed, 15 Jan 2025 15:43:11 -0300 Message-ID: <20250115184316.2344583-2-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250115184316.2344583-1-dbarboza@ventanamicro.com> References: <20250115184316.2344583-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2001:4860:4864:20::33; envelope-from=dbarboza@ventanamicro.com; helo=mail-oa1-x33.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org ssu64xl is defined in RVA22 as: "sstatus.UXL must be capable of holding the value 2 (i.e., UXLEN=64 must be supported)." This is always true in TCG and it's mandatory for RVA23, so claim support for it. Signed-off-by: Daniel Henrique Barboza Reviewed-by: Andrew Jones --- target/riscv/cpu.c | 1 + tests/data/acpi/riscv64/virt/RHCT | Bin 390 -> 398 bytes 2 files changed, 1 insertion(+) diff --git a/tests/data/acpi/riscv64/virt/RHCT b/tests/data/acpi/riscv64/virt/RHCT index 695022d56c4ac16607d4c622955ad339fbbfe997..b14ec15e553200760a63aad65586913d31ea2edc 100644 GIT binary patch delta 48 zcmZo;?qlW(@^B96V`N}pOqj@Jz^cQ@$e^;(o|BQSxYW#~B4@H2qXkC_BLhPoBLf2f D`wIz- delta 41 wcmeBUZe!*O@^B7mV`N}poG_8gfK`Q&kwIpoJtyPj07f&87)Az$G)4vn0JA^`U;qFB diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 3d4bd157d2..b187ef2e4b 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -213,6 +213,7 @@ const RISCVIsaExtData isa_edata_arr[] = { ISA_EXT_DATA_ENTRY(sstc, PRIV_VERSION_1_12_0, ext_sstc), ISA_EXT_DATA_ENTRY(sstvala, PRIV_VERSION_1_12_0, has_priv_1_12), ISA_EXT_DATA_ENTRY(sstvecd, PRIV_VERSION_1_12_0, has_priv_1_12), + ISA_EXT_DATA_ENTRY(ssu64xl, PRIV_VERSION_1_12_0, has_priv_1_12), ISA_EXT_DATA_ENTRY(supm, PRIV_VERSION_1_13_0, ext_supm), ISA_EXT_DATA_ENTRY(svade, PRIV_VERSION_1_11_0, ext_svade), ISA_EXT_DATA_ENTRY(svadu, PRIV_VERSION_1_12_0, ext_svadu), From patchwork Wed Jan 15 18:43:12 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 13940806 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AA020C02180 for ; Wed, 15 Jan 2025 18:44:31 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tY8Md-00084g-MW; Wed, 15 Jan 2025 13:43:39 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tY8Ma-00083Z-MZ for qemu-devel@nongnu.org; Wed, 15 Jan 2025 13:43:36 -0500 Received: from mail-oa1-x42.google.com ([2001:4860:4864:20::42]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tY8MY-00036X-Bo for qemu-devel@nongnu.org; Wed, 15 Jan 2025 13:43:36 -0500 Received: by mail-oa1-x42.google.com with SMTP id 586e51a60fabf-29f7b5fbc9aso43565fac.3 for ; Wed, 15 Jan 2025 10:43:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1736966612; x=1737571412; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=mVDN4MjaZBTmqIZfmehnZjKJIdM4iScvOXjzGweeZx0=; b=lVTRNelIvabPJK3DmtkzoqiHKD8laRv6dpV9k0odwEwT/l0OwVJtw8n+WQUYkug228 imLEUJDfQiU6jiPPM2EwIY438SR/zf0EB6Np9kdf8X6i2yw0qfwvVSQOCcs6U2AYf0Li 3OP2GW+a9piXJJWv7a9lxlBzj82CCgepMM1b7E7SwgePeW2fT3l/hf2L+u3LksEtiOZs dF3l/10mq2Ujo7abL4NwN3kOorMCd9YUeaw6/TPBQ4oQIJEwqlTn4t48UYwW/v91fsMC 4pTIAukAWYqzQUv8GjmwYiepJyDui0Cy5ekEKTX7mf8VBmXJsrxnTfRutmdzf8hr/fsS 109g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1736966612; x=1737571412; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=mVDN4MjaZBTmqIZfmehnZjKJIdM4iScvOXjzGweeZx0=; b=EEy6gpRMYNM/n25sCcklDSotZ84wQCeqDogbseMoR884Y36fnCHZqah5SyM1rZFGYU bqwV6z4EtUd7ddchJlxxcUU5ZLRfc4SbgNpUoZnYKIUB3hFJxQlVYsA23k7/Wu715KKw zuZAzuNVp/EyzndIUzE1xE0LyGbfyVHrNYoFwmsHYJvgR9C1gL9lNEdnFxNhIY6d3Lu9 vEDjaakbKWgywY7FxWQlsIanH+yEFh8HkjM4UhXNzSwVK5CK//hhruQb4snAnhpfDnVK NmwwEWvEkh1H8YGY7y80TOvFWo5ZI4+wFPQfdowgasXyxDLr4zL0F/nzIiJ4FYwsblOB MPSw== X-Gm-Message-State: AOJu0Yw17ZyAX5dmSVfEiiqZGZW4XIvpGHQ2DYgFYBDgzyk8fiAmpQ0+ Pw15K2pbobUhX1cf5P7RJhjXWT0WWsg3u11YYoBdhWBXepFLHcTbiIRpZi+2NVQ0Q4WmVLxNU7Y CEPgX0A== X-Gm-Gg: ASbGncsEccVvjNMrRFtjxOzWxSxwNMAZB0u3PX0UfoZKjPygZxyF7kEwvkWbKQJcvcG PIU4KwdgkqqkxidS6m3FBN13dxg8OkkvgxJk9aKDF0RtH+/XEJwNB4DFlV6xx2bvBXmtPzJoc9d kDvxlrXF7olgtDC46B41OASQuUjVs9wdjm6kyOhYAMN31wd/bft5DscTsqX+I/P+oBajq2AH/l7 Ge0+oJFEn40C1CcbhEr+oU0BDH+YBiNzSzF0mkBYaZuGgr+N8bRY/YXZDI= X-Google-Smtp-Source: AGHT+IHKeGwgu56SK4Tq9fOLVnYx3IZ36v6SQwrV5PvisOLeYc/tN22rTiQ4IkejNODPyT60H2Hauw== X-Received: by 2002:a05:6870:6b0b:b0:29d:c624:7cad with SMTP id 586e51a60fabf-2aa06668e28mr14826883fac.3.1736966612481; Wed, 15 Jan 2025 10:43:32 -0800 (PST) Received: from grind.. ([191.202.238.10]) by smtp.gmail.com with ESMTPSA id 586e51a60fabf-2ad80a5cb64sm6539196fac.47.2025.01.15.10.43.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 Jan 2025 10:43:32 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH v4 2/6] target/riscv: use RVB in RVA22U64 Date: Wed, 15 Jan 2025 15:43:12 -0300 Message-ID: <20250115184316.2344583-3-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250115184316.2344583-1-dbarboza@ventanamicro.com> References: <20250115184316.2344583-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2001:4860:4864:20::42; envelope-from=dbarboza@ventanamicro.com; helo=mail-oa1-x42.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From the time we added RVA22U64 until now the spec didn't declare 'RVB' as a dependency, using zba/zbb/zbs instead. Since then the RVA22 spec [1] added the following in the 'RVA22U64 Mandatory Extensions' section: "B Bit-manipulation instructions Note: The B extension comprises the Zba, Zbb, and Zbs extensions. At the time of RVA22U64's ratification, the B extension had not yet been defined, and so RVA22U64 explicitly mandated Zba, Zbb, and Zbs instead. Mandating B is equivalent." It is also equivalent to QEMU (see riscv_cpu_validate_b() in target/riscv/tcg/tcg-cpu.c). Finally, RVA23U64 [2] directly mentions RVB as a mandatory extension, not citing zba/zbb/zbs. To make it clear that RVA23U64 will extend RVA22U64 (i.e. RVA22 is a parent of RVA23), use RVB in RVA22U64 as well. (bios-tables-test change: RVB added to riscv,isa) [1] https://github.com/riscv/riscv-profiles/blob/main/src/profiles.adoc#61-rva22u64-profile [2] https://github.com/riscv/riscv-profiles/blob/main/src/rva23-profile.adoc#rva23u64-profile Signed-off-by: Daniel Henrique Barboza Reviewed-by: Andrew Jones --- target/riscv/cpu.c | 2 +- tests/data/acpi/riscv64/virt/RHCT | Bin 398 -> 400 bytes 2 files changed, 1 insertion(+), 1 deletion(-) diff --git a/tests/data/acpi/riscv64/virt/RHCT b/tests/data/acpi/riscv64/virt/RHCT index b14ec15e553200760a63aad65586913d31ea2edc..13c8025b868051485be5ba62974a22971a07bc6a 100644 GIT binary patch delta 53 zcmeBUp1{l%JqB1j+%-qDZl;ot1UQ&#clNpsc(ij;S I3K$s}0ARKZK>z>% delta 52 zcmbQh+{ern6Im@tvcKtP9)kwJyAsLaeHGdD3UC3&N_6yxMHMkS6EMh1pF HMg|4|IwT82 diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index b187ef2e4b..6fb4d5f374 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -2351,7 +2351,7 @@ static const PropertyInfo prop_marchid = { static RISCVCPUProfile RVA22U64 = { .parent = NULL, .name = "rva22u64", - .misa_ext = RVI | RVM | RVA | RVF | RVD | RVC | RVU, + .misa_ext = RVI | RVM | RVA | RVF | RVD | RVC | RVB | RVU, .priv_spec = RISCV_PROFILE_ATTR_UNUSED, .satp_mode = RISCV_PROFILE_ATTR_UNUSED, .ext_offsets = { From patchwork Wed Jan 15 18:43:13 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 13940810 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3D223C02180 for ; Wed, 15 Jan 2025 18:45:20 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tY8Mf-00085h-Fj; Wed, 15 Jan 2025 13:43:41 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tY8Md-00084K-3W for qemu-devel@nongnu.org; Wed, 15 Jan 2025 13:43:39 -0500 Received: from mail-oo1-xc2e.google.com ([2607:f8b0:4864:20::c2e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tY8Mb-00037k-GZ for qemu-devel@nongnu.org; Wed, 15 Jan 2025 13:43:38 -0500 Received: by mail-oo1-xc2e.google.com with SMTP id 006d021491bc7-5f8befb03d0so13319eaf.1 for ; Wed, 15 Jan 2025 10:43:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1736966616; x=1737571416; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=CzmEArjLiVmocefSg9osSrzLAYi0GSzBGOKbwgq1rK8=; b=Up7rg+Z8PGXey/6Nk9xz7CtVgX6lxip8bOFL4oFuZEbHntmUFBowZuVsJICUpaTfGh bLgB9u6x3grAThY6mDkPOY8IbjkWSiET1vCSg4CoKJj2jfCZuqCwz24DbwrEdy+w9X2f /328nPKVnFZlMSu4luQZ9zwHCwHak9HTmwEJqSygFEpK1WrF5t7EtXVROVuHbMxC/C0c vjexN/cvwFcJSQNM0dxIt82D7CZngP8WJ3m8F4VYPkd55E4s3m0EnBcBhzC/hwI+USqw WsadmcYpAvEvW1NelebsPu6de2a8170LF/jKgCAg8lJwUayrEN7vk2uV0oNk2sVQY/Jq G4lg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1736966616; x=1737571416; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=CzmEArjLiVmocefSg9osSrzLAYi0GSzBGOKbwgq1rK8=; b=XeKOaiSMZz8o/RBV658iQGy32gjVDCCHVARivfIyBZu0D6n2G5U5/Hrzi2s7ULfCHi iqLF0Z40inbKDyusn1uLGaCBBf1EOZW0/NJgw/+yYajRGpWvqPJWUJq511QL1lVnO4MI jY1Up62UGUJAetEEb4Mvhzohs29B3SWSoBwUFz5HA6td9cf6Bp3xHJlXSnrFtys/6MnW 0cCYrfd7QigCLMj1hz0eYG0diXTzlp+n7E85jTjn8sSvTXIhwV7KR66vsX6hOOeDF+zL /56v/k/Hm0OwHBd4Yk1/UQjPEwRCQ9Hn8ab8ebz5OzcsKWu29j/FsADYhSm2KwuZtD7I fXrg== X-Gm-Message-State: AOJu0Yw8rCbRfObsRO/gZOMjFeBC7PJp+wBscVmZShSdcA/7YqGCZCXv tDj5/MTka6IH5dGNmJJwUnhz3q3J1rM/pIQgXDLbccZN8LZHOuP2rduFMFbrEfn4DJwQR/Kmh+M GvME= X-Gm-Gg: ASbGncu2Kl3cdPNQ+uV6VaNd54qi+TpICEJ91cYPdYGCyXLKqj9zcI+Miksah8lTr8w xt7+s58GH4DqSSd1q2UJA/PdxLtaJ2Atu4wyjvSghAWTlooRoD/vFfp9ceJga6xUyrHpqbw+AvC hud2WK+zD4AIiAKsxMY+7j2qnspiJUesQPsY7mDkgCahoGxkYR0TiYW17D0giHGi7w+ZZcvrTfW tRJTwUAcuqqfcusY8gooMOqsaqWr8l4GUZoEw8rxq5g1zNJgGlHcLfMNSg= X-Google-Smtp-Source: AGHT+IFqJCie2fDPyrZYbYkmeo6t/lockk0lT9Wd5/eYzi+IMRdYEdrtbFsMSqjLPtiA+g7R219wIQ== X-Received: by 2002:a05:6870:610b:b0:27b:61df:2160 with SMTP id 586e51a60fabf-2aa0690ed8cmr19136737fac.31.1736966615869; Wed, 15 Jan 2025 10:43:35 -0800 (PST) Received: from grind.. ([191.202.238.10]) by smtp.gmail.com with ESMTPSA id 586e51a60fabf-2ad80a5cb64sm6539196fac.47.2025.01.15.10.43.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 Jan 2025 10:43:35 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH v4 3/6] target/riscv: add profile u_parent and s_parent Date: Wed, 15 Jan 2025 15:43:13 -0300 Message-ID: <20250115184316.2344583-4-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250115184316.2344583-1-dbarboza@ventanamicro.com> References: <20250115184316.2344583-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::c2e; envelope-from=dbarboza@ventanamicro.com; helo=mail-oo1-xc2e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The current 'parent' mechanic for profiles allows for one profile to be a child of a previous/older profile, enabling all its extensions (and the parent profile itself) and sparing us from tediously listing all extensions for every profile. This works fine for u-mode profiles. For s-mode profiles this is not enough: a s-mode profile extends not only his equivalent u-mode profile but also the previous s-mode profile. This means, for example, that RVA23S64 extends both RVA23U64 and RVA22S64. To fit this usage, rename the existing 'parent' to 'u_parent' and add a new 's_parent' attribute for profiles. Handle both like we were doing with the previous 'parent' attribute, i.e. if set, enable it. This change does nothing for the existing profiles but will make RVA23S64 simpler. Suggested-by: Andrew Jones Signed-off-by: Daniel Henrique Barboza Reviewed-by: Andrew Jones --- target/riscv/cpu.c | 6 ++++-- target/riscv/cpu.h | 3 ++- target/riscv/tcg/tcg-cpu.c | 35 ++++++++++++++++++++++++++--------- 3 files changed, 32 insertions(+), 12 deletions(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 6fb4d5f374..e215b1004d 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -2349,7 +2349,8 @@ static const PropertyInfo prop_marchid = { * doesn't need to be manually enabled by the profile. */ static RISCVCPUProfile RVA22U64 = { - .parent = NULL, + .u_parent = NULL, + .s_parent = NULL, .name = "rva22u64", .misa_ext = RVI | RVM | RVA | RVF | RVD | RVC | RVB | RVU, .priv_spec = RISCV_PROFILE_ATTR_UNUSED, @@ -2381,7 +2382,8 @@ static RISCVCPUProfile RVA22U64 = { * The remaining features/extensions comes from RVA22U64. */ static RISCVCPUProfile RVA22S64 = { - .parent = &RVA22U64, + .u_parent = &RVA22U64, + .s_parent = NULL, .name = "rva22s64", .misa_ext = RVS, .priv_spec = PRIV_VERSION_1_12_0, diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 97713681cb..986131a191 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -81,7 +81,8 @@ const char *riscv_get_misa_ext_description(uint32_t bit); #define CPU_CFG_OFFSET(_prop) offsetof(struct RISCVCPUConfig, _prop) typedef struct riscv_cpu_profile { - struct riscv_cpu_profile *parent; + struct riscv_cpu_profile *u_parent; + struct riscv_cpu_profile *s_parent; const char *name; uint32_t misa_ext; bool enabled; diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c index 48be24bbbe..c060b65fbc 100644 --- a/target/riscv/tcg/tcg-cpu.c +++ b/target/riscv/tcg/tcg-cpu.c @@ -713,13 +713,29 @@ static bool riscv_cpu_validate_profile_satp(RISCVCPU *cpu, } #endif +static void riscv_cpu_check_parent_profile(RISCVCPU *cpu, + RISCVCPUProfile *profile, + RISCVCPUProfile *parent) +{ + const char *parent_name; + bool parent_enabled; + + if (!profile->enabled || !parent) { + return; + } + + parent_name = parent->name; + parent_enabled = object_property_get_bool(OBJECT(cpu), parent_name, NULL); + profile->enabled = parent_enabled; +} + static void riscv_cpu_validate_profile(RISCVCPU *cpu, RISCVCPUProfile *profile) { CPURISCVState *env = &cpu->env; const char *warn_msg = "Profile %s mandates disabled extension %s"; bool send_warn = profile->user_set && profile->enabled; - bool parent_enabled, profile_impl = true; + bool profile_impl = true; int i; #ifndef CONFIG_USER_ONLY @@ -773,12 +789,8 @@ static void riscv_cpu_validate_profile(RISCVCPU *cpu, profile->enabled = profile_impl; - if (profile->parent != NULL) { - parent_enabled = object_property_get_bool(OBJECT(cpu), - profile->parent->name, - NULL); - profile->enabled = profile->enabled && parent_enabled; - } + riscv_cpu_check_parent_profile(cpu, profile, profile->u_parent); + riscv_cpu_check_parent_profile(cpu, profile, profile->s_parent); } static void riscv_cpu_validate_profiles(RISCVCPU *cpu) @@ -1181,8 +1193,13 @@ static void cpu_set_profile(Object *obj, Visitor *v, const char *name, profile->user_set = true; profile->enabled = value; - if (profile->parent != NULL) { - object_property_set_bool(obj, profile->parent->name, + if (profile->u_parent != NULL) { + object_property_set_bool(obj, profile->u_parent->name, + profile->enabled, NULL); + } + + if (profile->s_parent != NULL) { + object_property_set_bool(obj, profile->s_parent->name, profile->enabled, NULL); } From patchwork Wed Jan 15 18:43:14 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 13940807 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B084CC02183 for ; Wed, 15 Jan 2025 18:44:31 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tY8Mj-00087O-ET; Wed, 15 Jan 2025 13:43:45 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tY8Mh-00086O-5c for qemu-devel@nongnu.org; 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([191.202.238.10]) by smtp.gmail.com with ESMTPSA id 586e51a60fabf-2ad80a5cb64sm6539196fac.47.2025.01.15.10.43.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 Jan 2025 10:43:39 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH v4 4/6] target/riscv: change priv_ver check in validate_profile() Date: Wed, 15 Jan 2025 15:43:14 -0300 Message-ID: <20250115184316.2344583-5-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250115184316.2344583-1-dbarboza@ventanamicro.com> References: <20250115184316.2344583-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::329; envelope-from=dbarboza@ventanamicro.com; helo=mail-ot1-x329.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The S profiles do a priv_ver check during validation to see if the running priv_ver is compatible with it. This check is done by comparing if the running priv_ver is equal to the priv_ver the profile specifies. There is an universe where we added RVA23S64 support based on both RVA23U64 and RVA22S64 and this error is being thrown: qemu-system-riscv64: warning: Profile rva22s64 requires priv spec v1.12.0, but priv ver v1.13.0 was set We're enabling RVA22S64 (priv_ver 1.12) as a dependency of RVA23S64 (priv_ver 1.13) and complaining to users about what we did ourselves. There's no drawback in allowing a profile to run in an env that has a priv_ver newer than it's required by it. So, like Hiro Nakamura saves the future by changing the past, change the priv_ver check now to allow profiles to run in a newer priv_ver. This universe will have one less warning to deal with. Signed-off-by: Daniel Henrique Barboza Reviewed-by: Andrew Jones --- target/riscv/tcg/tcg-cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c index c060b65fbc..de2a8c3f35 100644 --- a/target/riscv/tcg/tcg-cpu.c +++ b/target/riscv/tcg/tcg-cpu.c @@ -746,7 +746,7 @@ static void riscv_cpu_validate_profile(RISCVCPU *cpu, #endif if (profile->priv_spec != RISCV_PROFILE_ATTR_UNUSED && - profile->priv_spec != env->priv_ver) { + profile->priv_spec > env->priv_ver) { profile_impl = false; if (send_warn) { From patchwork Wed Jan 15 18:43:15 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 13940811 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2E281C02183 for ; Wed, 15 Jan 2025 18:45:22 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tY8Ms-00088k-Ps; Wed, 15 Jan 2025 13:43:54 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tY8Mm-000881-2p for qemu-devel@nongnu.org; Wed, 15 Jan 2025 13:43:48 -0500 Received: from mail-oa1-x43.google.com ([2001:4860:4864:20::43]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tY8Mk-0003AU-AW for qemu-devel@nongnu.org; Wed, 15 Jan 2025 13:43:47 -0500 Received: by mail-oa1-x43.google.com with SMTP id 586e51a60fabf-2a01bcd0143so81972fac.2 for ; Wed, 15 Jan 2025 10:43:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1736966625; x=1737571425; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=x6/uHcxy8S071Ts6210PwMh1tRs0xCtUorTWG4sXCFw=; b=DylRQNShDLClyQguvUTpO+NyJYsw+zc4sB6/tYmT5r3nl23AzuI2O+KyRVYvpHefgM f9Jh7uKVE6T2dmxg5/HwVecniZa3eKVQoCFKU7jF6DSGYiSdjXzGo8UvsfgSP85A5GAe kcDFoipK1wgVxWRxjodGA6Ylhm9VPQGXoAOAsAAQNyP+1PXi3bsR6Kvsh6W/Nwdsa/zq eqrXQ1WCqd0YGHsfGhAxfp7TXbshF+mqffU5IQN4dCnvcQLU0GM/zYMs/cQvJHNzhonL BJ0xLmcD4uGmphnNI1LH06exQShTKiB0ugEyqVM2Wh2sTttP31eNKvJfgSjssqMV+ij3 Rk9w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1736966625; x=1737571425; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=x6/uHcxy8S071Ts6210PwMh1tRs0xCtUorTWG4sXCFw=; b=flZA0HwEmX1Z0WBv3DbkVlQpafvOnOynGOPtf/oHnSyHhxK5DNMu7YGy3QGgQMrnAd yxDsHXmwmiiO1tMG3WGsqlI1ZLum+NUhV1N6S4seslum9McAOOmeGGh6DQcBAfIE4LUE eGls8XiPO/vGc87cUbYdG/1UZGo845ufMB+D+z1Y12KcWoE0jUdxvNVy83ssiaEJ6Ppa keV7AhARA/cS3huT+oZAEwGk0jqaBK+eh0FYHzDr0uY4TjSN3VXpPMezQeJzQNRcBiS4 74dYogq2A3aOi4caabt5gS12qUO18CJ66flqse4wzYnqKgvFoYro8NXIJ1r9OlT/ET4c WxUA== X-Gm-Message-State: AOJu0YwjHE/7oHkO6GD3ipxB7p2t/hWIZRM7e6A8bjZVWcivjS7Z/qMT aldtxtDRgf0TbVS5s1+jwAUivQlPcF+gg9of0R1UtjfUqLviTr5bf49NbP7Yk/rYV8/SNEKOY+X GpDZo+w== X-Gm-Gg: ASbGnctx7iscoYv8l+yYp+wQiucz2tO/D65/SaNANdUp0Kwmbiw2J6C1C0eP8Yu2hKd AzSGO8pM8mobtx6dtEkER+2iTl95QlETguQcNkSmDXJypVCoeKe/sGkoU26jDcpUNFw//uBNY3E 7Q5DpfDZaEOInQNCefaCBMt8godyYb7yTevcXnNwDy1D1qOBpw+MxpxlmXLciQGfmIBLvok+eox UBFUPGzN3/DBSn1bcCaDsVFfTyvCMj9M/ggqg7n5zf35JKCOOAqbdlBleI= X-Google-Smtp-Source: AGHT+IEbP2nc6gNG0lwEXWOr1+gcvSrQ5Fsdf6qIYzuJtxtG3fuaKmC1RqH7/zfVM3AFrcsS0+tOhg== X-Received: by 2002:a05:6871:6281:b0:29e:569a:f90d with SMTP id 586e51a60fabf-2aa0690ed62mr17328593fac.32.1736966624975; Wed, 15 Jan 2025 10:43:44 -0800 (PST) Received: from grind.. ([191.202.238.10]) by smtp.gmail.com with ESMTPSA id 586e51a60fabf-2ad80a5cb64sm6539196fac.47.2025.01.15.10.43.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 Jan 2025 10:43:43 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH v4 5/6] target/riscv: add RVA23U64 profile Date: Wed, 15 Jan 2025 15:43:15 -0300 Message-ID: <20250115184316.2344583-6-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250115184316.2344583-1-dbarboza@ventanamicro.com> References: <20250115184316.2344583-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2001:4860:4864:20::43; envelope-from=dbarboza@ventanamicro.com; helo=mail-oa1-x43.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Add RVA23U64 as described in [1]. Add it as a child of RVA22U64 since all RVA22U64 mandatory extensions are also present in RVA23U64. What's left then is to list the mandatory extensions that are RVA23 only. A new "rva23u64" CPU is also added. [1] https://github.com/riscv/riscv-profiles/blob/main/src/rva23-profile.adoc Signed-off-by: Daniel Henrique Barboza Reviewed-by: Andrew Jones --- target/riscv/cpu-qom.h | 1 + target/riscv/cpu.c | 33 +++++++++++++++++++++++++++++++++ 2 files changed, 34 insertions(+) diff --git a/target/riscv/cpu-qom.h b/target/riscv/cpu-qom.h index d56b067bf2..53ead481a9 100644 --- a/target/riscv/cpu-qom.h +++ b/target/riscv/cpu-qom.h @@ -40,6 +40,7 @@ #define TYPE_RISCV_CPU_RV64E RISCV_CPU_TYPE_NAME("rv64e") #define TYPE_RISCV_CPU_RVA22U64 RISCV_CPU_TYPE_NAME("rva22u64") #define TYPE_RISCV_CPU_RVA22S64 RISCV_CPU_TYPE_NAME("rva22s64") +#define TYPE_RISCV_CPU_RVA23U64 RISCV_CPU_TYPE_NAME("rva23u64") #define TYPE_RISCV_CPU_IBEX RISCV_CPU_TYPE_NAME("lowrisc-ibex") #define TYPE_RISCV_CPU_SHAKTI_C RISCV_CPU_TYPE_NAME("shakti-c") #define TYPE_RISCV_CPU_SIFIVE_E31 RISCV_CPU_TYPE_NAME("sifive-e31") diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index e215b1004d..761da41e53 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -2397,9 +2397,34 @@ static RISCVCPUProfile RVA22S64 = { } }; +/* + * All mandatory extensions from RVA22U64 are present + * in RVA23U64 so set RVA22 as a parent. We need to + * declare just the newly added mandatory extensions. + */ +static RISCVCPUProfile RVA23U64 = { + .u_parent = &RVA22U64, + .s_parent = NULL, + .name = "rva23u64", + .misa_ext = RVV, + .priv_spec = RISCV_PROFILE_ATTR_UNUSED, + .satp_mode = RISCV_PROFILE_ATTR_UNUSED, + .ext_offsets = { + CPU_CFG_OFFSET(ext_zvfhmin), CPU_CFG_OFFSET(ext_zvbb), + CPU_CFG_OFFSET(ext_zvkt), CPU_CFG_OFFSET(ext_zihintntl), + CPU_CFG_OFFSET(ext_zicond), CPU_CFG_OFFSET(ext_zimop), + CPU_CFG_OFFSET(ext_zcmop), CPU_CFG_OFFSET(ext_zcb), + CPU_CFG_OFFSET(ext_zfa), CPU_CFG_OFFSET(ext_zawrs), + CPU_CFG_OFFSET(ext_supm), + + RISCV_PROFILE_EXT_LIST_END + } +}; + RISCVCPUProfile *riscv_profiles[] = { &RVA22U64, &RVA22S64, + &RVA23U64, NULL, }; @@ -2886,6 +2911,13 @@ static void rva22s64_profile_cpu_init(Object *obj) RVA22S64.enabled = true; } + +static void rva23u64_profile_cpu_init(Object *obj) +{ + rv64i_bare_cpu_init(obj); + + RVA23U64.enabled = true; +} #endif static const gchar *riscv_gdb_arch_name(CPUState *cs) @@ -3165,6 +3197,7 @@ static const TypeInfo riscv_cpu_type_infos[] = { DEFINE_BARE_CPU(TYPE_RISCV_CPU_RV64E, MXL_RV64, rv64e_bare_cpu_init), DEFINE_PROFILE_CPU(TYPE_RISCV_CPU_RVA22U64, MXL_RV64, rva22u64_profile_cpu_init), DEFINE_PROFILE_CPU(TYPE_RISCV_CPU_RVA22S64, MXL_RV64, rva22s64_profile_cpu_init), + DEFINE_PROFILE_CPU(TYPE_RISCV_CPU_RVA23U64, MXL_RV64, rva23u64_profile_cpu_init), #endif /* TARGET_RISCV64 */ }; From patchwork Wed Jan 15 18:43:16 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 13940809 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9C1F4C02180 for ; Wed, 15 Jan 2025 18:45:04 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tY8Mu-0008AF-MQ; Wed, 15 Jan 2025 13:43:56 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tY8Mr-00088i-Se for qemu-devel@nongnu.org; Wed, 15 Jan 2025 13:43:54 -0500 Received: from mail-oo1-xc44.google.com ([2607:f8b0:4864:20::c44]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tY8Mq-0003Bg-4D for qemu-devel@nongnu.org; Wed, 15 Jan 2025 13:43:53 -0500 Received: by mail-oo1-xc44.google.com with SMTP id 006d021491bc7-5f89aa7a101so11435eaf.2 for ; Wed, 15 Jan 2025 10:43:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1736966630; x=1737571430; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=pwz4467PZxHOYDvJKbfek9VW1OADl098umRJuhCniXA=; b=Q2ZfY1g+SM+pjUSUUBbupGxSK3LKtEYQFx+0nFJVQDqynS2bzJAL3RCqFgDuY3P2Pd 76bEthNEXKg9yNlVFDDITjhTRwgz4kPEskjYmwQNSd3w+Vev1X7T5IRsaxKGuHRmpVYA HMojdjO+17LcJV6oUlX+4v9KJX/8A22vQc380f0Vr71+grWRKZbosCCfCUIssVZ6JG19 ffAeGLT+lrGpmjn55blJ0sOtUZCkbFbbPRRkwNr6j9N8CLNz/Hl3y0G3zle8gyTAT3w5 kjZMOKOzphKoCOILKqX13zedd7xLxnS2FPFeaV5qSHEknPe+Le1MCJwKex8EIWVPhD+v qa1Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1736966630; x=1737571430; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=pwz4467PZxHOYDvJKbfek9VW1OADl098umRJuhCniXA=; b=UqInKgdqRwE+lQKRAjWjr5ZqNkHUlhuVL/V3JrZ6ru3RCWHTHnFZpGxRpNc7D6ZTvZ +Plx83ksl78DmU632gl6Ps8k3egYljdFJc8VzbfDFhetJqREdBdzXB0QXeFiztT14VFg UWbkNnGPlLZGWI6n6d96pp0nOvgNB/qsft+8PDedb3hJLfFXR6ooK4GsNGUinO1GVJqM AmbMaj395+Zcw2WtS4Q2nD6vkV0hhDI83s8NODi9pP4G+IFKdenYWLIg4846acguJCAZ IjnkhrhRxThbHWsIpd0uclxr+1G3JxIThEJLUrzyBrWnVtI4KOtnc/BWcmPTZSfE6mBP mFFQ== X-Gm-Message-State: AOJu0YzKGLf+V1QwJ8BS77Mlltop4jokQcrIvbGLLGCPSyvClSOVVmyx hLf26frirhdMuidV5LN0PgdLKYyGmOa19ufoPCiyrK+ScuDswAlVgRGWJLkEgyE0TvivPBUMfNN xso7MUw== X-Gm-Gg: ASbGncveCZA5eZycDZ0uxP/8povkLuqftDJe3dkH5CVQLAnpQiSuJllmhy2Rj28bpxK +v4qYwxIxzcwDuH1ewtjM1caJSGlIypydYz+YBawZJUlSJm8aiepoJ03O2RTu0s8zGHvOBWK6V4 4Ob7HgDZa8YDaci5YIa8qt2ZSbmD7QL6e5ifr/gqAEu7LtIzChlDVSNMmbqhSacK5n89OwpKPwY uc7cqfalLHa3xRur4HyD9Gqyj4i6RgmKG6gJuodRYFxJU6pMKMhUAHjYv4= X-Google-Smtp-Source: AGHT+IExPfSCpjv+BifQlO2WaKYlA4Jl7zofx7iOkOjuPVFZkUbpLf8AaKlaAQp3JSsa5XIMNB3ijQ== X-Received: by 2002:a05:6870:af85:b0:297:2719:deb6 with SMTP id 586e51a60fabf-2aa0664faebmr16189172fac.1.1736966629842; Wed, 15 Jan 2025 10:43:49 -0800 (PST) Received: from grind.. ([191.202.238.10]) by smtp.gmail.com with ESMTPSA id 586e51a60fabf-2ad80a5cb64sm6539196fac.47.2025.01.15.10.43.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 Jan 2025 10:43:48 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH v4 6/6] target/riscv: add RVA23S64 profile Date: Wed, 15 Jan 2025 15:43:16 -0300 Message-ID: <20250115184316.2344583-7-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250115184316.2344583-1-dbarboza@ventanamicro.com> References: <20250115184316.2344583-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::c44; envelope-from=dbarboza@ventanamicro.com; helo=mail-oo1-xc44.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Add RVA23S64 as described in [1]. This profile inherits all mandatory extensions of RVA23U64 and RVA22S64, making it a child of both profiles. A new "rva23s64" profile CPU is also added. This is the generated riscv,isa for it (taken via -M dumpdtb): rv64imafdcbvh_zic64b_zicbom_zicbop_zicboz_ziccamoa_ziccif_zicclsm_ ziccrse_zicond_zicntr_zicsr_zifencei_zihintntl_zihintpause_zihpm_zimop_ zmmul_za64rs_zaamo_zalrsc_zawrs_zfa_zfhmin_zca_zcb_zcd_zcmop_zba_zbb_zbs_ zkt_zvbb_zve32f_zve32x_zve64f_zve64d_zve64x_zvfhmin_zvkb_zvkt_shcounterenw_ sha_shgatpa_shtvala_shvsatpa_shvstvala_shvstvecd_smnpm_smstateen_ssccptr_ sscofpmf_sscounterenw_ssnpm_ssstateen_sstc_sstvala_sstvecd_ssu64xl_ supm_svade_svinval_svnapot_svpbmt [1] https://github.com/riscv/riscv-profiles/blob/main/src/rva23-profile.adoc Signed-off-by: Daniel Henrique Barboza Reviewed-by: Andrew Jones --- target/riscv/cpu-qom.h | 1 + target/riscv/cpu.c | 39 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 40 insertions(+) diff --git a/target/riscv/cpu-qom.h b/target/riscv/cpu-qom.h index 53ead481a9..4cfdb74891 100644 --- a/target/riscv/cpu-qom.h +++ b/target/riscv/cpu-qom.h @@ -41,6 +41,7 @@ #define TYPE_RISCV_CPU_RVA22U64 RISCV_CPU_TYPE_NAME("rva22u64") #define TYPE_RISCV_CPU_RVA22S64 RISCV_CPU_TYPE_NAME("rva22s64") #define TYPE_RISCV_CPU_RVA23U64 RISCV_CPU_TYPE_NAME("rva23u64") +#define TYPE_RISCV_CPU_RVA23S64 RISCV_CPU_TYPE_NAME("rva23s64") #define TYPE_RISCV_CPU_IBEX RISCV_CPU_TYPE_NAME("lowrisc-ibex") #define TYPE_RISCV_CPU_SHAKTI_C RISCV_CPU_TYPE_NAME("shakti-c") #define TYPE_RISCV_CPU_SIFIVE_E31 RISCV_CPU_TYPE_NAME("sifive-e31") diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 761da41e53..adfce231a7 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -2421,10 +2421,41 @@ static RISCVCPUProfile RVA23U64 = { } }; +/* + * As with RVA23U64, RVA23S64 also defines 'named features'. + * + * Cache related features that we consider enabled since we don't + * implement cache: Ssccptr + * + * Other named features that we already implement: Sstvecd, Sstvala, + * Sscounterenw, Ssu64xl + * + * The remaining features/extensions comes from RVA23S64. + */ +static RISCVCPUProfile RVA23S64 = { + .u_parent = &RVA23U64, + .s_parent = &RVA22S64, + .name = "rva23s64", + .misa_ext = RVS, + .priv_spec = PRIV_VERSION_1_13_0, + .satp_mode = VM_1_10_SV39, + .ext_offsets = { + /* New in RVA23S64 */ + CPU_CFG_OFFSET(ext_svnapot), CPU_CFG_OFFSET(ext_sstc), + CPU_CFG_OFFSET(ext_sscofpmf), CPU_CFG_OFFSET(ext_ssnpm), + + /* Named features: Sha */ + CPU_CFG_OFFSET(ext_sha), + + RISCV_PROFILE_EXT_LIST_END + } +}; + RISCVCPUProfile *riscv_profiles[] = { &RVA22U64, &RVA22S64, &RVA23U64, + &RVA23S64, NULL, }; @@ -2918,6 +2949,13 @@ static void rva23u64_profile_cpu_init(Object *obj) RVA23U64.enabled = true; } + +static void rva23s64_profile_cpu_init(Object *obj) +{ + rv64i_bare_cpu_init(obj); + + RVA23S64.enabled = true; +} #endif static const gchar *riscv_gdb_arch_name(CPUState *cs) @@ -3198,6 +3236,7 @@ static const TypeInfo riscv_cpu_type_infos[] = { DEFINE_PROFILE_CPU(TYPE_RISCV_CPU_RVA22U64, MXL_RV64, rva22u64_profile_cpu_init), DEFINE_PROFILE_CPU(TYPE_RISCV_CPU_RVA22S64, MXL_RV64, rva22s64_profile_cpu_init), DEFINE_PROFILE_CPU(TYPE_RISCV_CPU_RVA23U64, MXL_RV64, rva23u64_profile_cpu_init), + DEFINE_PROFILE_CPU(TYPE_RISCV_CPU_RVA23S64, MXL_RV64, rva23s64_profile_cpu_init), #endif /* TARGET_RISCV64 */ };