From patchwork Thu Jan 16 10:59:19 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gregory CLEMENT X-Patchwork-Id: 13941575 Received: from relay6-d.mail.gandi.net (relay6-d.mail.gandi.net [217.70.183.198]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D0B9A1DE3A3; Thu, 16 Jan 2025 10:59:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.198 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737025173; cv=none; b=h/lHjG1G9rX1dgncWYiF0PF5jwtWgE30RghuODEjIieCIzxu89paR3oXRUBwa1+6+hagV+qr60uZzOE3AASN6tJZHMdXhfiJbjsdGWq018z2jdxWnPQ5+YU4K5hMgvF960XbdwIKydAUq8NA0QoSG81jzN5KEkMrBpqrrD6hKzg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737025173; c=relaxed/simple; bh=eoV6lxlvqojTH5I8IK+bRgUIfzC8TKqdHbpitLaZsbc=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Cecsd2tPbW90iewnHblcfFIF7yz7hir+7hv/+vo56WsTg+lp6pYjGFduW1+SSKRT/8eVEMA4grmhvOYYaCWhrbuB0Jfdb5ISpwp0aNxrErTrOjg8EiGpRyVVd9SnWxFsppv7UM86zrqo8QkIYLo05plWVJuIU/mKN40TPOw9wzo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=UnelgxJ0; arc=none smtp.client-ip=217.70.183.198 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="UnelgxJ0" Received: by mail.gandi.net (Postfix) with ESMTPSA id 75622C0008; Thu, 16 Jan 2025 10:59:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1737025169; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=zCAZNOipVi7ghlFkXkXZ6lZoGOE8/OrsAqyo1CTDsBU=; b=UnelgxJ0/2eFcGdgIXFcx0qCgTFrqMO/p1G/jpWygXnIL9UQ8Iazn2a6pH3LfDcpUI4Zq+ dJ4biQXXr7YAY4UN6QNIbA1wNGmtBoM5+CIgTuhdP2cp8YdMFAGAil5DLvT2ZvWNou+5lA jlOzgr1LLF/ztERUPGXPp9/G++u5+4ZxawU/uFegYZIW2zfuMnpXuuFd9xnLx2jVwjSyX5 xqOcmpiglaEKFlRwSVtHKrV+NWKNN9lLa9mtgGnPpCWerNNj7E/nQW1T8Ot7w2M65OVRKF jwEjqL+uBEVlgILuhAjm2A5AAcQxNDpzxRpn8dG1P5nO2W7N1cih16Y8AlAO7A== From: Gregory CLEMENT Date: Thu, 16 Jan 2025 11:59:19 +0100 Subject: [PATCH v2 1/5] dt-bindings: mips: Document mti,mips-cm Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250116-cluster-hci-broken-v2-1-fc52cfb7a19e@bootlin.com> References: <20250116-cluster-hci-broken-v2-0-fc52cfb7a19e@bootlin.com> In-Reply-To: <20250116-cluster-hci-broken-v2-0-fc52cfb7a19e@bootlin.com> To: Aleksandar Rikalo , Thomas Bogendoerfer , Jiaxun Yang , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Vladimir Kondratiev , =?utf-8?q?Th?= =?utf-8?q?=C3=A9o_Lebrun?= , Tawfik Bayouk , Thomas Petazzoni , linux-mips@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Gregory CLEMENT X-Mailer: b4 0.14.2 X-GND-Sasl: gregory.clement@bootlin.com From: Jiaxun Yang Add devicetree binding documentation for MIPS Coherence Manager. Signed-off-by: Jiaxun Yang Signed-off-by: Gregory CLEMENT --- .../devicetree/bindings/mips/mti,mips-cm.yaml | 38 ++++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/Documentation/devicetree/bindings/mips/mti,mips-cm.yaml b/Documentation/devicetree/bindings/mips/mti,mips-cm.yaml new file mode 100644 index 0000000000000000000000000000000000000000..9f500804737d23e19f50a9326168686c05d3a54e --- /dev/null +++ b/Documentation/devicetree/bindings/mips/mti,mips-cm.yaml @@ -0,0 +1,38 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mips/mti,mips-cm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MIPS Coherence Manager + +description: | + Defines a location of the MIPS Coherence Manager registers. + +maintainers: + - Jiaxun Yang + +properties: + compatible: + const: mti,mips-cm + + reg: + description: + Base address and size of an unoccupied region in system's MMIO address + space, which will be used to map the MIPS CM global control registers + block. It is conventionally decided by the system integrator. + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + coherency-manager@1fbf8000 { + compatible = "mti,mips-cm"; + reg = <0x1bde8000 0x8000>; + }; +... From patchwork Thu Jan 16 10:59:20 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gregory CLEMENT X-Patchwork-Id: 13941577 Received: from relay9-d.mail.gandi.net (relay9-d.mail.gandi.net [217.70.183.199]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A02881DE3A6; Thu, 16 Jan 2025 10:59:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.199 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737025174; cv=none; b=palf8vbeR6CEd/eAQOxLhMUqcdNoB3jhL9lITGieQB3AblfCNRjP6PrgcwxpD2kfkGbjEKrk31AqPuS17RduURYaGUJTDs8OCZpOigByoTwZMZ8JV+OilSKkPs1NgYw0d0o8TNBMaAUrUyTKT1Y2L5aDwrkuTxFiwGKsidsPfJw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737025174; c=relaxed/simple; bh=nhCncoiXCpwTrWom015P2Iz8k0vhJYOTBJz561wU5gU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=sGChiSXtyjk3WMCU1ypp74PqC60nf1nYoxBOsnOrIi1oHGfmczSriU07XOwZPeLJWPbzstME9MisbvkopRWyKH2QOX8+gGbRdFmKiSOr7kujIRkgXJEeo7ToyMxsPTzemAeLzgx7ao5xnKO9XslTtP1oYBQKatTgYsV8YPTyRnU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=UqbuSol/; arc=none smtp.client-ip=217.70.183.199 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="UqbuSol/" Received: by mail.gandi.net (Postfix) with ESMTPSA id 68558FF808; Thu, 16 Jan 2025 10:59:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1737025170; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=+3kfIi6k50bb/Q7oC3+JoYFu33V5i5ofievAcInGlvw=; b=UqbuSol/V8Ym8k1L9JI8f4ncj3beS9GPgG4KJM1ZVfVE2r8CPmXgRskiuwmiqa0aUCs7nk XnemJThFpV4iK0iVZmCjbGymxilTph8YR6fWQyeXNymX3FkeLzDH47I01/0Sj3IHGgHhGw ODokarijITZgLpIWvaduyZhuM/3Khjl9WKfuQnfd9r1j3/hyq5FaFpIVuV/ChFH2v36e9z be2dILV5PvPehFPifrPIMmixvYnH4ehEjNvlW8ig2o4PJoW05osA7wIr9s5ENL1EsDQyGz ntZHIxORHlOxjn3bcIfI1VJlyg06+LmWB1fsWRu+bNWADrrIEMxQrnIfL5B3Tw== From: Gregory CLEMENT Date: Thu, 16 Jan 2025 11:59:20 +0100 Subject: [PATCH v2 2/5] dt-bindings: mips: mips-cm: Add a new compatible string for EyeQ6 Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250116-cluster-hci-broken-v2-2-fc52cfb7a19e@bootlin.com> References: <20250116-cluster-hci-broken-v2-0-fc52cfb7a19e@bootlin.com> In-Reply-To: <20250116-cluster-hci-broken-v2-0-fc52cfb7a19e@bootlin.com> To: Aleksandar Rikalo , Thomas Bogendoerfer , Jiaxun Yang , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Vladimir Kondratiev , =?utf-8?q?Th?= =?utf-8?q?=C3=A9o_Lebrun?= , Tawfik Bayouk , Thomas Petazzoni , linux-mips@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Gregory CLEMENT X-Mailer: b4 0.14.2 X-GND-Sasl: gregory.clement@bootlin.com The CM3.5 used on EyeQ6 reports that Hardware Cache Initialization is complete, but in reality it's not the case. It also incorrectly indicates that Hardware Cache Initialization is supported. This new compatible string allows warning about this broken feature that cannot be detected at runtime. Signed-off-by: Gregory CLEMENT --- .../devicetree/bindings/mips/mti,mips-cm.yaml | 24 ++++++++++++++++++++-- 1 file changed, 22 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/mips/mti,mips-cm.yaml b/Documentation/devicetree/bindings/mips/mti,mips-cm.yaml index 9f500804737d23e19f50a9326168686c05d3a54e..4713673f0cfc7785bb183917ee382a815ebfe9e1 100644 --- a/Documentation/devicetree/bindings/mips/mti,mips-cm.yaml +++ b/Documentation/devicetree/bindings/mips/mti,mips-cm.yaml @@ -14,7 +14,12 @@ maintainers: properties: compatible: - const: mti,mips-cm + oneOf: + - const: mti,mips-cm + - const: mti,eyeq6-cm + description: + On EyeQ6 the HCI (Hardware Cache Initialization) information for + the L2 cache in multi-cluster configuration is broken. reg: description: @@ -25,14 +30,29 @@ properties: required: - compatible - - reg additionalProperties: false +if: + properties: + compatible: + contains: + const: mti,eyeq6-cm +then: + properties: + reg: false +else: + required: + - reg + examples: - | coherency-manager@1fbf8000 { compatible = "mti,mips-cm"; reg = <0x1bde8000 0x8000>; }; + + coherency-manager { + compatible = "mti,eyeq6-cm"; + }; ... From patchwork Thu Jan 16 10:59:21 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gregory CLEMENT X-Patchwork-Id: 13941578 Received: from relay8-d.mail.gandi.net (relay8-d.mail.gandi.net [217.70.183.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 895441DE3A5; Thu, 16 Jan 2025 10:59:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737025175; cv=none; b=jxu52gYwBoGQMbGTapvV6ZFR0v14UOIFfm2EyyogYAPTq/FbWFJAo1IWPfO6sRhzF0nsi8OSOJxJwAjdvPJcdh4W864V82NuKInNeoondqXHfUjEeQYJu+Wrc/3Jd7nyIqUn5BK14qJ70TrvkCaY6oexUY8Nmtm5bf6G2AZGTW0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737025175; c=relaxed/simple; bh=WE2hYkDvrkttdJ+Y6dCEjx3FGOy2ScAtcuYlQe+bwPk=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=gqjoEO69aBG7jhG80NH3fS1YUBygHrT7smaOiK6lCn8b7VbWR64IQlT5LabyGd4CRHr2pJ6QV57Ezz663Ir2xk75iC7DdTGkG1rJ0oXJhfaZn5nyC4dRIm2q8exsjXVJWYdEN1Q8qGNUcUHKv48wa1NK+Go3cWa3B6moyOr5DvM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=Y3JaWB/w; arc=none smtp.client-ip=217.70.183.201 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="Y3JaWB/w" Received: by mail.gandi.net (Postfix) with ESMTPSA id 6B6C31BF203; Thu, 16 Jan 2025 10:59:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1737025170; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=4wsxAl+3paKqFNVkMlPUr2eJNUKkTIliKsLV50O7pCw=; b=Y3JaWB/wfldIKbL6Yh2KAtEwSpqdaMvnSJbFmEFkMVrHpfNYof52ADuJ28mXQToaQHaP9W u6LzTHY5/HfTIX3o30tN7LxeNULWp4+D9M2neXZRbK1bG5RxggsQBj0nclZqAtU3NlzkTM 9BD5KBGkx77styj/rxIZih2dqbvKn9/ZMITZILlNeR8gX0vtpv6ULTUrjMQ6bisWCC6+x2 LnKG+9991p1FC2FqQ2h4ugr0Qw8o125e1i/tggJ32l4zyGurPZKZNqu6n1u0gFYdHuNv3j i2bfi+B5bsDFhjI4Pee9pxAO/UaKZyP7Er7/J5I2RT2uoLVnqRRVYQcT8wCeWg== From: Gregory CLEMENT Date: Thu, 16 Jan 2025 11:59:21 +0100 Subject: [PATCH v2 3/5] MIPS: cm: Detect CM quirks from device tree Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250116-cluster-hci-broken-v2-3-fc52cfb7a19e@bootlin.com> References: <20250116-cluster-hci-broken-v2-0-fc52cfb7a19e@bootlin.com> In-Reply-To: <20250116-cluster-hci-broken-v2-0-fc52cfb7a19e@bootlin.com> To: Aleksandar Rikalo , Thomas Bogendoerfer , Jiaxun Yang , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Vladimir Kondratiev , =?utf-8?q?Th?= =?utf-8?q?=C3=A9o_Lebrun?= , Tawfik Bayouk , Thomas Petazzoni , linux-mips@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Gregory CLEMENT X-Mailer: b4 0.14.2 X-GND-Sasl: gregory.clement@bootlin.com Some information that should be retrieved at runtime for the Coherence Manager can be either absent or wrong. This patch allows checking if some of this information is available from the device tree and updates the internal variable accordingly. For now, only the compatible string associated with the broken HCI is being retrieved. Signed-off-by: Gregory CLEMENT --- arch/mips/include/asm/mips-cm.h | 22 ++++++++++++++++++++++ arch/mips/kernel/mips-cm.c | 14 ++++++++++++++ 2 files changed, 36 insertions(+) diff --git a/arch/mips/include/asm/mips-cm.h b/arch/mips/include/asm/mips-cm.h index 1afa85db1fb37d1017fbe7d6b7a2b7d2470e8257..3bfe0633b57639bfb05b7692e4bb83ba7c0b2523 100644 --- a/arch/mips/include/asm/mips-cm.h +++ b/arch/mips/include/asm/mips-cm.h @@ -59,6 +59,16 @@ extern phys_addr_t mips_cm_l2sync_phys_base(void); */ extern int mips_cm_is64; +/* + * mips_cm_is_l2_hci_broken - determine if HCI is broken + * + * Some CM reports show that Hardware Cache Initialization is + * complete, but in reality it's not the case. They also incorrectly + * indicate that Hardware Cache Initialization is supported. This + * flags allows warning about this broken feature. + */ +extern bool mips_cm_is_l2_hci_broken; + /** * mips_cm_error_report - Report CM cache errors */ @@ -97,6 +107,18 @@ static inline bool mips_cm_present(void) #endif } +/** + * mips_cm_update_property - update property from the device tree + * + * Retrieve the properties from the device tree if a CM node exist and + * update the internal variable based on this. + */ +#ifdef CONFIG_MIPS_CM +extern void mips_cm_update_property(void); +#else +static void mips_cm_update_property(void) {} +#endif + /** * mips_cm_has_l2sync - determine whether an L2-only sync region is present * diff --git a/arch/mips/kernel/mips-cm.c b/arch/mips/kernel/mips-cm.c index 9854bc2b6895d4db67d216586f65e4810661d29b..e9e6fd6ab8bd342e34e97b0e6c71445f84ee76f7 100644 --- a/arch/mips/kernel/mips-cm.c +++ b/arch/mips/kernel/mips-cm.c @@ -5,6 +5,7 @@ */ #include +#include #include #include @@ -14,6 +15,7 @@ void __iomem *mips_gcr_base; void __iomem *mips_cm_l2sync_base; int mips_cm_is64; +bool mips_cm_is_l2_hci_broken; static char *cm2_tr[8] = { "mem", "gcr", "gic", "mmio", @@ -237,6 +239,18 @@ static void mips_cm_probe_l2sync(void) mips_cm_l2sync_base = ioremap(addr, MIPS_CM_L2SYNC_SIZE); } +void mips_cm_update_property(void) +{ + struct device_node *cm_node; + + cm_node = of_find_compatible_node(of_root, NULL, "mti,eyeq6-cm"); + if (!cm_node) + return; + pr_info("HCI (Hardware Cache Init for the L2 cache) in GCR_L2_RAM_CONFIG from the CM3 is broken"); + mips_cm_is_l2_hci_broken = true; + of_node_put(cm_node); +} + int mips_cm_probe(void) { phys_addr_t addr; From patchwork Thu Jan 16 10:59:22 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gregory CLEMENT X-Patchwork-Id: 13941579 Received: from relay3-d.mail.gandi.net (relay3-d.mail.gandi.net [217.70.183.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E3D8E1DE3AD; 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arc=none smtp.client-ip=217.70.183.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="LPF9jOl3" Received: by mail.gandi.net (Postfix) with ESMTPSA id 5F1C160011; Thu, 16 Jan 2025 10:59:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1737025172; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=BSEqBmSqmyvDs47D4eD55kQ405suvhvrk4+/jN9RG4w=; b=LPF9jOl3ww12c9qiMIDHmdbf72jLs6K62/XNt64WsQ07o6earpn6z6WVsSzMEOdFrQ3iqq BzLrdDFYRYHVAjMzOBK+9mfoZER0J2H+LWpkz4b/9nTP05btS9iAtfwaNiyvn7h5PPJeBy gGcY9MYZJhoowI1wjB5/PDloBwnPsubjv5Nl/gc+Iv2XQon7eu90zbJXIbn+AGHlPgDrB0 dsBfyk7NBXQ1G4vrjW+KyEPcQzj87Q/yDjlVltuGySJcGB0pPVUhgEj//9mDMDjbqWLM/Q 2QmMsDacNXnaRIWot0PQmOIQxIDv69YG9iAerOB1OOCCCoMftjYAjtnoOipLxw== From: Gregory CLEMENT Date: Thu, 16 Jan 2025 11:59:22 +0100 Subject: [PATCH v2 4/5] MIPS: CPS: Support broken HCI for multicluster Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250116-cluster-hci-broken-v2-4-fc52cfb7a19e@bootlin.com> References: <20250116-cluster-hci-broken-v2-0-fc52cfb7a19e@bootlin.com> In-Reply-To: <20250116-cluster-hci-broken-v2-0-fc52cfb7a19e@bootlin.com> To: Aleksandar Rikalo , Thomas Bogendoerfer , Jiaxun Yang , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Vladimir Kondratiev , =?utf-8?q?Th?= =?utf-8?q?=C3=A9o_Lebrun?= , Tawfik Bayouk , Thomas Petazzoni , linux-mips@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Gregory CLEMENT X-Mailer: b4 0.14.2 X-GND-Sasl: gregory.clement@bootlin.com Some CM3.5 devices incorrectly report that hardware cache initialization has completed, and also claim to support hardware cache initialization when they don't actually do so. This commit fixes this issue by retrieving the correct information from the device tree and allowing the system to bypass the hardware cache initialization step. Instead, it relies on manual operation. As a result, multi-user support is now possible for these CPUs. Signed-off-by: Gregory CLEMENT --- arch/mips/kernel/smp-cps.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/mips/kernel/smp-cps.c b/arch/mips/kernel/smp-cps.c index b20ea4048429e1aab2bffbada793ee594bee1e05..e85bd087467e8caf0640ad247ee5f8eb65107591 100644 --- a/arch/mips/kernel/smp-cps.c +++ b/arch/mips/kernel/smp-cps.c @@ -333,6 +333,9 @@ static void __init cps_prepare_cpus(unsigned int max_cpus) sizeof(*mips_cps_cluster_bootcfg), GFP_KERNEL); + if (nclusters > 1) + mips_cm_update_property(); + for (cl = 0; cl < nclusters; cl++) { /* Allocate core boot configuration structs */ ncores = mips_cps_numcores(cl); @@ -394,7 +397,7 @@ static void init_cluster_l2(void) { u32 l2_cfg, l2sm_cop, result; - while (1) { + while (!mips_cm_is_l2_hci_broken) { l2_cfg = read_gcr_redir_l2_ram_config(); /* If HCI is not supported, use the state machine below */ From patchwork Thu Jan 16 10:59:23 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gregory CLEMENT X-Patchwork-Id: 13941580 Received: from relay1-d.mail.gandi.net (relay1-d.mail.gandi.net [217.70.183.193]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6E1A21DE2CA; Thu, 16 Jan 2025 10:59:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.193 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737025182; cv=none; b=g/z4KCgomuC5R27OjgxWBhEPDf9jA/CYbR14xmfC9apPhvVKk6/hO3JMlP5wgbymiNXtqv3SJZcVdj0R4boYThjOI0yGI480PlvU+GlETBUTKrqGGl7G1uPF8kFDCxa7fJdTHV1JCb6yJ786y9yF59OexDm/MEo4AzlhQfXkuu0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737025182; c=relaxed/simple; bh=4LLaji94/zDql4kTm2OUq0W66jZ32dACgZFNmMKsKrY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=HnfUewOkfCyvLRwMIv4lfLu4+pdI5V+DsT9wvH9Gr1bkKuCqMqwzc1P9qGrDr2jU/v29P8fdPkUpoeMfpzrFQuAYFelE3uzC3GbizLPn9yWPme1oAchGmHVMMGzwnVL+AFUNM0ur8Hh5UfzDZZf5OFi5hDjQpKVJLfZpgBbUWSc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=gkHTM8bo; arc=none smtp.client-ip=217.70.183.193 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="gkHTM8bo" Received: by mail.gandi.net (Postfix) with ESMTPSA id 46665240003; Thu, 16 Jan 2025 10:59:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1737025172; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=R58vwryAbcD6lTOxG6wnCelBT0nf+2drh0W3NGHpLag=; b=gkHTM8boO/wW0IdgQ3Oi/eI1IJMo1JdB3d+3B0NrqKGT7CGP/TKfo/x2+yiSA9BzMdSoQ3 MTa7aXUyD+W7BBFrDseqIgjvcqgHkSVxd/91QPI3fSjGBeNWhfs+jQd3A77/MWE1RoDCgl pT16dEsTZM95mP8XK/PwRZTTvVfHnO/GUv97/XP9nlGBZpNaDls/wwRozIYKfNdQi4xmWN V5AuYVEqmkWFKKStH0NeU+q+NoyoOs5BTWfMZ09rOy5M4klLfWwik/oJppkrfx7ebTBqFa RcGxDGhJ5rJ+KKUnprInOvbuDeQKLbL0cxwoWBcOBmmZqik8DRglX0fF7tcglQ== From: Gregory CLEMENT Date: Thu, 16 Jan 2025 11:59:23 +0100 Subject: [PATCH v2 5/5] MIPS: mobileye: dts: eyeq6h: Enable cluster support Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250116-cluster-hci-broken-v2-5-fc52cfb7a19e@bootlin.com> References: <20250116-cluster-hci-broken-v2-0-fc52cfb7a19e@bootlin.com> In-Reply-To: <20250116-cluster-hci-broken-v2-0-fc52cfb7a19e@bootlin.com> To: Aleksandar Rikalo , Thomas Bogendoerfer , Jiaxun Yang , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Vladimir Kondratiev , =?utf-8?q?Th?= =?utf-8?q?=C3=A9o_Lebrun?= , Tawfik Bayouk , Thomas Petazzoni , linux-mips@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Gregory CLEMENT X-Mailer: b4 0.14.2 X-GND-Sasl: gregory.clement@bootlin.com The CM3.5 device used in EyeQ6H SoCs incorrectly reports the status for Hardware Cache Initialization (HCI). This commit adds the compatible string for the CM to acknowledge this issue, which enables the use of the second CPU cluster. Signed-off-by: Gregory CLEMENT --- arch/mips/boot/dts/mobileye/eyeq6h.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/mips/boot/dts/mobileye/eyeq6h.dtsi b/arch/mips/boot/dts/mobileye/eyeq6h.dtsi index 1db3c3cda2e395025075387bcb66ea0737fd37f6..c6087bd8ca1d47855b8d93aa7e75e1fed219587b 100644 --- a/arch/mips/boot/dts/mobileye/eyeq6h.dtsi +++ b/arch/mips/boot/dts/mobileye/eyeq6h.dtsi @@ -32,6 +32,10 @@ cpu_intc: interrupt-controller { #interrupt-cells = <1>; }; + coherency-manager { + compatible = "mti,eyeq6-cm"; + }; + soc: soc { compatible = "simple-bus"; #address-cells = <2>;