From patchwork Thu Jan 16 14:09:11 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam via B4 Relay X-Patchwork-Id: 13941736 X-Patchwork-Delegate: kw@linux.com Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E2AF222B5B9; Thu, 16 Jan 2025 14:09:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737036560; cv=none; b=F1WBcUYOAZxr3XaTZPWA7FgstTGVu5MeJ74Wt4lnYiXu90GPciBiyo2nUAfsYMqhlcU1S8NDN5+G7E9g3uU8562pI3E6d1jj+SZGipy5CvPNuesnqLALyeAGNLsnRQU3BZAkm8GssFzexBdRmgkDYvzPeZfrx2cKc5bSHAZsb3A= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737036560; c=relaxed/simple; bh=WIQv3KD1TnKJ1FeAsp5Ms4Qm3siNonfJRB+TKoH/FEE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=D2qhz3niYUQXlyNwnPI8LC3yZo6yt3bFD1N7HNKebFc6LFbgCc9aOsA14G39+bU3pA+uOlIW2VeuLa3bGb7rP6RqdRKSk/ODHCaNswxfXQ8bQnwtfdB6iB6UZFg/8VsTm0xzO/NDd2QbAQuDUVrvbh33tntFSW0Vj9ExG3z00a0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=C304MuOE; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="C304MuOE" Received: by smtp.kernel.org (Postfix) with ESMTPS id 8A29AC4CEE2; Thu, 16 Jan 2025 14:09:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1737036559; bh=WIQv3KD1TnKJ1FeAsp5Ms4Qm3siNonfJRB+TKoH/FEE=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=C304MuOEFvVrFyV3Ew7Mte5W2v7trwedG7rRso0czRrLLfSCx/hXJqgE2Vq2N/ldX ujrhea6GUPCwOpp85vJpepQ4lOrsB4gONIR0ZOkLMOJgqTGJ0ybRsx6b6UuGkiLpVa Ue+kPdnQvJuBDkFPfWaHIP9JROtDKoexCjQKDrj/2eiC6+0BwICbyNw/0BcRgX45H2 LsX2wTfTKNw0T7Xxc8wxF8vZpZ71D6tcG20Ze3WYpbsDSHABxFAJR5BrB4+ujh1c8B QlmTlamkt1ybgjc5t5X9DHNuqAF7WZr4S0Wp6gDr5Iqs8IlG2cjb9hN4DcCnrEQ0Hy ncVUgsZGnsuxA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 77CF7C02188; Thu, 16 Jan 2025 14:09:19 +0000 (UTC) From: Manivannan Sadhasivam via B4 Relay Date: Thu, 16 Jan 2025 19:39:11 +0530 Subject: [PATCH v3 1/5] PCI/pwrctrl: Move creation of pwrctrl devices to pci_scan_device() Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250116-pci-pwrctrl-slot-v3-1-827473c8fbf4@linaro.org> References: <20250116-pci-pwrctrl-slot-v3-0-827473c8fbf4@linaro.org> In-Reply-To: <20250116-pci-pwrctrl-slot-v3-0-827473c8fbf4@linaro.org> To: Bjorn Helgaas , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Bartosz Golaszewski , Manivannan Sadhasivam , Lukas Wunner X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=5697; i=manivannan.sadhasivam@linaro.org; h=from:subject:message-id; bh=xIyJbEnDR6J92iNeHDHLDUlZlBfz305fAs7wXMTBhwA=; b=owEBbQGS/pANAwAKAVWfEeb+kc71AcsmYgBniRMLIX2HwMXnBT2tXXnis0wuKYc6d3Ynt03We Jl4fPDu/OuJATMEAAEKAB0WIQRnpUMqgUjL2KRYJ5dVnxHm/pHO9QUCZ4kTCwAKCRBVnxHm/pHO 9Y7sCACDjhyzQQbLXgy8x+VeSsoFzweg2mBA99JNaC0BH//J1HrSz3XkxUBVtCIJd1ZthwrvpiF iPau3LPB78cLQ8HAb/whQqiZM2ve10KTvqGUknwx4SIyIjAOZdqbcHr9mseDug/7V5doB9oktMG bHn0tziuO4bLD4m7ea7mD1mSWWQAEFf7DQUevrkIjBjSrwGx1uhds0wFKFz3s7QrCPuwxdYrYIj yraVF93OSlCTfDTh6TIyVYEq72WNN9yS9/z4Potz8R9Ku8ZCLdO5HHnetSeeziaEy9+lHjNkbkh XCxbJhTOckCe2qx8f60gYkZmwq8JOcEZl9kzh6IY/pko4UVs X-Developer-Key: i=manivannan.sadhasivam@linaro.org; a=openpgp; fpr=C668AEC3C3188E4C611465E7488550E901166008 X-Endpoint-Received: by B4 Relay for manivannan.sadhasivam@linaro.org/default with auth_id=185 X-Original-From: Manivannan Sadhasivam Reply-To: manivannan.sadhasivam@linaro.org From: Manivannan Sadhasivam Current way of creating pwrctrl devices requires iterating through the child devicetree nodes of the PCI bridge in pci_pwrctrl_create_devices(). Even though it works, it creates confusion as there is no symmetry between this and pci_pwrctrl_unregister() function that removes the pwrctrl devices. So to make these two functions symmetric, move the creation of pwrctrl devices to pci_scan_device(). During the scan of each device in a slot, the devicetree node (if exists) for the PCI device will be checked. If it has the supplies populated, then the pwrctrl device will be created. Since the PCI device scan happens so early, there would be no 'struct pci_dev' available for the device. So the host bridge is used as the parent of all pwrctrl devices. One nice side effect of this move is that, it is now possible to have pwrctrl devices for PCI bridges as well (to control the supplies of PCI slots). Suggested-by: Lukas Wunner Tested-by: Bartosz Golaszewski Signed-off-by: Manivannan Sadhasivam --- drivers/pci/bus.c | 43 ------------------------------------------- drivers/pci/probe.c | 34 ++++++++++++++++++++++++++++++++++ drivers/pci/pwrctrl/core.c | 2 +- 3 files changed, 35 insertions(+), 44 deletions(-) diff --git a/drivers/pci/bus.c b/drivers/pci/bus.c index 98910bc0fcc4..b6851101ac36 100644 --- a/drivers/pci/bus.c +++ b/drivers/pci/bus.c @@ -331,47 +331,6 @@ void __weak pcibios_resource_survey_bus(struct pci_bus *bus) { } void __weak pcibios_bus_add_device(struct pci_dev *pdev) { } -/* - * Create pwrctrl devices (if required) for the PCI devices to handle the power - * state. - */ -static void pci_pwrctrl_create_devices(struct pci_dev *dev) -{ - struct device_node *np = dev_of_node(&dev->dev); - struct device *parent = &dev->dev; - struct platform_device *pdev; - - /* - * First ensure that we are starting from a PCI bridge and it has a - * corresponding devicetree node. - */ - if (np && pci_is_bridge(dev)) { - /* - * Now look for the child PCI device nodes and create pwrctrl - * devices for them. The pwrctrl device drivers will manage the - * power state of the devices. - */ - for_each_available_child_of_node_scoped(np, child) { - /* - * First check whether the pwrctrl device really - * needs to be created or not. This is decided - * based on at least one of the power supplies - * being defined in the devicetree node of the - * device. - */ - if (!of_pci_supply_present(child)) { - pci_dbg(dev, "skipping OF node: %s\n", child->name); - return; - } - - /* Now create the pwrctrl device */ - pdev = of_platform_device_create(child, NULL, parent); - if (!pdev) - pci_err(dev, "failed to create OF node: %s\n", child->name); - } - } -} - /** * pci_bus_add_device - start driver for a single device * @dev: device to add @@ -396,8 +355,6 @@ void pci_bus_add_device(struct pci_dev *dev) pci_proc_attach_device(dev); pci_bridge_d3_update(dev); - pci_pwrctrl_create_devices(dev); - /* * If the PCI device is associated with a pwrctrl device with a * power supply, create a device link between the PCI device and diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index 2e81ab0f5a25..91bdb2727c8e 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -9,6 +9,8 @@ #include #include #include +#include +#include #include #include #include @@ -2446,6 +2448,36 @@ bool pci_bus_read_dev_vendor_id(struct pci_bus *bus, int devfn, u32 *l, } EXPORT_SYMBOL(pci_bus_read_dev_vendor_id); +/* + * Create pwrctrl device (if required) for the PCI device to handle the power + * state. + */ +static void pci_pwrctrl_create_device(struct pci_bus *bus, int devfn) +{ + struct pci_host_bridge *host = pci_find_host_bridge(bus); + struct platform_device *pdev; + struct device_node *np; + + np = of_pci_find_child_device(dev_of_node(&bus->dev), devfn); + if (!np || of_find_device_by_node(np)) + return; + + /* + * First check whether the pwrctrl device really needs to be created or + * not. This is decided based on at least one of the power supplies + * being defined in the devicetree node of the device. + */ + if (!of_pci_supply_present(np)) { + pr_debug("PCI/pwrctrl: Skipping OF node: %s\n", np->name); + return; + } + + /* Now create the pwrctrl device */ + pdev = of_platform_device_create(np, NULL, &host->dev); + if (!pdev) + pr_err("PCI/pwrctrl: Failed to create pwrctrl device for OF node: %s\n", np->name); +} + /* * Read the config data for a PCI device, sanity-check it, * and fill in the dev structure. @@ -2455,6 +2487,8 @@ static struct pci_dev *pci_scan_device(struct pci_bus *bus, int devfn) struct pci_dev *dev; u32 l; + pci_pwrctrl_create_device(bus, devfn); + if (!pci_bus_read_dev_vendor_id(bus, devfn, &l, 60*1000)) return NULL; diff --git a/drivers/pci/pwrctrl/core.c b/drivers/pci/pwrctrl/core.c index 2fb174db91e5..9cc7e2b7f2b5 100644 --- a/drivers/pci/pwrctrl/core.c +++ b/drivers/pci/pwrctrl/core.c @@ -44,7 +44,7 @@ static void rescan_work_func(struct work_struct *work) struct pci_pwrctrl, work); pci_lock_rescan_remove(); - pci_rescan_bus(to_pci_dev(pwrctrl->dev->parent)->bus); + pci_rescan_bus(to_pci_host_bridge(pwrctrl->dev->parent)->bus); pci_unlock_rescan_remove(); } From patchwork Thu Jan 16 14:09:12 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam via B4 Relay X-Patchwork-Id: 13941735 X-Patchwork-Delegate: kw@linux.com Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E2B4E22B5BC; Thu, 16 Jan 2025 14:09:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737036560; cv=none; b=L+usuHGz0R3MOAkD3Aay7p2uQxQGEHoTNpJLfCn8pib/FBp4UPvykkdQ3mJcdHQpP6zNvrqu4+InMAE9HhzmJc7viGp6+0mXU2A2761yHurgeniHF/zpf0Iy5S/oYsfThheLuDdUdpkjwaB17IuNd1kWgKZR4JzNpAxg4sD48CI= ARC-Message-Signature: i=1; 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b=bqoBfa4m1EFBx3JKZ4mHvMyyN74QfKzCEnrKxUjXyr1SvUn0CyrzZbYkgKKMIE7yt fjyx0qWLyn6LD3RcAeXg/QYc+z3gcRUcYbGiLRLkUZTDicpoRNbEPYBgXrNXQ303iV JoRfyNLVLvLksROEj0pWkO+4w8/FG5I655wQEVcd3YHZvU+hjDGkBYnfsjHqG/PHNr Fe8Pz07MNFREN7kmqX/yqf2cA++UNvIrLI46SrVXqdioeK4K9h4YmFUnhMpfPzrHph /++rFMwADjvrd6+A9CRS3MwU+STeKPJ/sN4rL3H+isUOHqN1THXBz1Ym0xqbck7DCz cewEfTSUchPRQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 86539C02183; Thu, 16 Jan 2025 14:09:19 +0000 (UTC) From: Manivannan Sadhasivam via B4 Relay Date: Thu, 16 Jan 2025 19:39:12 +0530 Subject: [PATCH v3 2/5] PCI/pwrctrl: Move pci_pwrctrl_unregister() to pci_destroy_dev() Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250116-pci-pwrctrl-slot-v3-2-827473c8fbf4@linaro.org> References: <20250116-pci-pwrctrl-slot-v3-0-827473c8fbf4@linaro.org> In-Reply-To: <20250116-pci-pwrctrl-slot-v3-0-827473c8fbf4@linaro.org> To: Bjorn Helgaas , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Bartosz Golaszewski , Manivannan Sadhasivam , Lukas Wunner X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=1293; i=manivannan.sadhasivam@linaro.org; h=from:subject:message-id; bh=R/h8mRffg4ftb0mSxAjhuMkQ2AXNpRy+KTjYeuy7GyY=; b=owEBbQGS/pANAwAKAVWfEeb+kc71AcsmYgBniRMMOWMQy8+n9GIwCMLzD7wUlVwcsEa099OMM 3k4LrMp4qSJATMEAAEKAB0WIQRnpUMqgUjL2KRYJ5dVnxHm/pHO9QUCZ4kTDAAKCRBVnxHm/pHO 9fz3B/41s7dYud9Tcx8ri0aE9DFjyc7ivSLEw3hvTLDaM5fCfyUm/2yHb7XvUmp3DbMBB3lZW/n AHWZ+8yyUFj0CY74T9LbYWvmkJ0cQr4iwEf3yFJ7gsdCFb1upPxEtmshzWE5EhOiPDkmzlvXyGv EmYs4d2VTZaPEHS01+zStRE0JiFQp7TXu9INhxhvfa/NDshfkppWi1OcXcmm9nPhCHHWaroFWM3 Nw3A+/d8Z5TsWHBj0SQHaCUiN+xQP+zbPzCM0/1UHrIFoE+Ae0o1TEvh56WZO/k9Uk+8moIEZC6 AzBd5h4ih3U9xKPDJSbnUu4GxPoefXlr5OHoLpT6+/xrtPti X-Developer-Key: i=manivannan.sadhasivam@linaro.org; a=openpgp; fpr=C668AEC3C3188E4C611465E7488550E901166008 X-Endpoint-Received: by B4 Relay for manivannan.sadhasivam@linaro.org/default with auth_id=185 X-Original-From: Manivannan Sadhasivam Reply-To: manivannan.sadhasivam@linaro.org From: Manivannan Sadhasivam PCI core will try to access the devices even after pci_stop_dev() for things like Data Object Exchange (DOE), ASPM etc... So move pci_pwrctrl_unregister() to the near end of pci_destroy_dev() to make sure that the devices are powered down only after the PCI core is done with them. Suggested-by: Lukas Wunner Reviewed-by: Lukas Wunner Tested-by: Bartosz Golaszewski Signed-off-by: Manivannan Sadhasivam --- drivers/pci/remove.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pci/remove.c b/drivers/pci/remove.c index efc37fcb73e2..58859f9d92f7 100644 --- a/drivers/pci/remove.c +++ b/drivers/pci/remove.c @@ -41,7 +41,6 @@ static void pci_stop_dev(struct pci_dev *dev) if (!pci_dev_test_and_clear_added(dev)) return; - pci_pwrctrl_unregister(&dev->dev); device_release_driver(&dev->dev); pci_proc_detach_device(dev); pci_remove_sysfs_dev_files(dev); @@ -64,6 +63,7 @@ static void pci_destroy_dev(struct pci_dev *dev) pci_doe_destroy(dev); pcie_aspm_exit_link_state(dev); pci_bridge_d3_update(dev); + pci_pwrctrl_unregister(&dev->dev); pci_free_resources(dev); put_device(&dev->dev); } From patchwork Thu Jan 16 14:09:13 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam via B4 Relay X-Patchwork-Id: 13941738 X-Patchwork-Delegate: kw@linux.com Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EE34822B8A1; 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a=openpgp-sha256; l=2611; i=manivannan.sadhasivam@linaro.org; h=from:subject:message-id; bh=gy4PLjMdamyd52iwg/D99E/UTsDOUFjzQxLCaHwi72c=; b=owEBbQGS/pANAwAKAVWfEeb+kc71AcsmYgBniRMMdKv0PONWXwBlZ/yC9+rLlA2+aPboQEGcV Qdk8GxoQtuJATMEAAEKAB0WIQRnpUMqgUjL2KRYJ5dVnxHm/pHO9QUCZ4kTDAAKCRBVnxHm/pHO 9diBCACGGQCeerSlzjd5UtoHZZdki3Fg6kHsSGUZBCdBgJwXRGqSHkW48jwQcsUlwg+Kqi1JpdH LHvK9O/rDjgDBS9jtSulkcnD/HOcp7Dyq6v5/HjWH4szlhO528hIGU5ZlTxDDj8/f24uihzhReA SATSKJzkm2NvxzASaqMteXhuGgq6fDwRk78k+W98R51kuR73yttfx53wHCxpGRIgRi3Kx50ZX2A rG03AAJELcStTY3dRB/tIiYoGmbe6/w8FCEOpjL9WBQaQLSEb3S4tVmBsIb8fIVmSqCRPw2aII3 uOzVAGE5Sr/J450uO58LsGZA5FL+WkSnJa+HhAaJayV5fUM1 X-Developer-Key: i=manivannan.sadhasivam@linaro.org; a=openpgp; fpr=C668AEC3C3188E4C611465E7488550E901166008 X-Endpoint-Received: by B4 Relay for manivannan.sadhasivam@linaro.org/default with auth_id=185 X-Original-From: Manivannan Sadhasivam Reply-To: manivannan.sadhasivam@linaro.org From: Manivannan Sadhasivam The pwrctrl core will rescan the bus once the device is powered on. So there is no need to continue scanning for the device further. Reviewed-by: Bartosz Golaszewski Tested-by: Bartosz Golaszewski Signed-off-by: Manivannan Sadhasivam --- drivers/pci/probe.c | 27 +++++++++++++++++---------- 1 file changed, 17 insertions(+), 10 deletions(-) diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index 91bdb2727c8e..6121f81f7c98 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -2448,11 +2448,7 @@ bool pci_bus_read_dev_vendor_id(struct pci_bus *bus, int devfn, u32 *l, } EXPORT_SYMBOL(pci_bus_read_dev_vendor_id); -/* - * Create pwrctrl device (if required) for the PCI device to handle the power - * state. - */ -static void pci_pwrctrl_create_device(struct pci_bus *bus, int devfn) +static struct platform_device *pci_pwrctrl_create_device(struct pci_bus *bus, int devfn) { struct pci_host_bridge *host = pci_find_host_bridge(bus); struct platform_device *pdev; @@ -2460,7 +2456,7 @@ static void pci_pwrctrl_create_device(struct pci_bus *bus, int devfn) np = of_pci_find_child_device(dev_of_node(&bus->dev), devfn); if (!np || of_find_device_by_node(np)) - return; + return NULL; /* * First check whether the pwrctrl device really needs to be created or @@ -2469,13 +2465,17 @@ static void pci_pwrctrl_create_device(struct pci_bus *bus, int devfn) */ if (!of_pci_supply_present(np)) { pr_debug("PCI/pwrctrl: Skipping OF node: %s\n", np->name); - return; + return NULL; } /* Now create the pwrctrl device */ pdev = of_platform_device_create(np, NULL, &host->dev); - if (!pdev) - pr_err("PCI/pwrctrl: Failed to create pwrctrl device for OF node: %s\n", np->name); + if (!pdev) { + pr_err("PCI/pwrctrl: Failed to create pwrctrl device for node: %s\n", np->name); + return NULL; + } + + return pdev; } /* @@ -2487,7 +2487,14 @@ static struct pci_dev *pci_scan_device(struct pci_bus *bus, int devfn) struct pci_dev *dev; u32 l; - pci_pwrctrl_create_device(bus, devfn); + /* + * Create pwrctrl device (if required) for the PCI device to handle the + * power state. If the pwrctrl device is created, then skip scanning + * further as the pwrctrl core will rescan the bus after powering on + * the device. + */ + if (pci_pwrctrl_create_device(bus, devfn)) + return NULL; if (!pci_bus_read_dev_vendor_id(bus, devfn, &l, 60*1000)) return NULL; From patchwork Thu Jan 16 14:09:14 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam via B4 Relay X-Patchwork-Id: 13941737 X-Patchwork-Delegate: kw@linux.com Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EE2A222A81E; Thu, 16 Jan 2025 14:09:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737036560; cv=none; b=NqXzX4XtqWE7utUlOY2XJUPOc+I6oHQUhQjHzKXMAwQ6bxKdkt/SsPouSGRF9ItiQZVsyOG+fn5uzH5HTN+T4VyF9hSNzmVL12IdcxZfSu9OX4QLxMhRDKh38nB+AiolMI9TRUp/aaTat3dWt1v9VeA+Y9uOW42aAKGVRwTgWA4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737036560; c=relaxed/simple; bh=EmN4Jn2rIvX97LgY0ou3YPQGNYpXchenEI59Nhj03LU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=JKgZHoRJJq1nukKgVIGPAdB1+F7fb0VkOwXHnJ9i+V4b5j6Mhp//Gz7PoRo9Xn8M6ezlmTXgBoF3ESbwN13/o4+5nHJZNQHYN3sTeZ0vzoyItApZgzXShDKbR001vNkS/ZniDgkrI+PwWyAR9u1xOOqCO7x2PLnxNHEelNHdFq4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=JfMjFDXm; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="JfMjFDXm" Received: by smtp.kernel.org (Postfix) with ESMTPS id B2F6EC4CEE8; Thu, 16 Jan 2025 14:09:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1737036559; bh=EmN4Jn2rIvX97LgY0ou3YPQGNYpXchenEI59Nhj03LU=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=JfMjFDXmjTBPi0xan8quzI6WTnwjod9QgB1FSRnOLzT559w3z/PQQWHRv0QjQwe4k vcMrg0bvDu0ouYLMhOcNso5vxNPMLRYZxFZ9KQZomCuQIe4SCYrCEY1YynWw9v8Yzy fhwHqxrcU1NmM95pmu8J3flJ5YB0f8hw9cs320B3gWRSPLX943noVvzkXAeU7u7Vc+ tB6KTHgwQv+En+AqHABEzL1VEdSlRfw9VqM6EcYHEMORpLfmyNO+XkeiLgjcejQCM2 yBjAduzV494YWDo3XvnP+xB72JWyWNx/dmJPSDq657BBqDYrrxbyOYcg4geu9JJtdj 69kUY8yfkcsIg== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id AAE40C0218A; Thu, 16 Jan 2025 14:09:19 +0000 (UTC) From: Manivannan Sadhasivam via B4 Relay Date: Thu, 16 Jan 2025 19:39:14 +0530 Subject: [PATCH v3 4/5] dt-bindings: vendor-prefixes: Document the 'pciclass' prefix Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250116-pci-pwrctrl-slot-v3-4-827473c8fbf4@linaro.org> References: <20250116-pci-pwrctrl-slot-v3-0-827473c8fbf4@linaro.org> In-Reply-To: <20250116-pci-pwrctrl-slot-v3-0-827473c8fbf4@linaro.org> To: Bjorn Helgaas , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Bartosz Golaszewski , Manivannan Sadhasivam X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=1265; i=manivannan.sadhasivam@linaro.org; h=from:subject:message-id; bh=2V7zx2KeHk/VkOVQ7/eUdxe/lfsvltP4xYw5h/bK3Jg=; b=owEBbQGS/pANAwAKAVWfEeb+kc71AcsmYgBniRMMqJ0tFL1peWsFLw0JQ+t/mHBHcnihGGU48 F8Ntj+NYuGJATMEAAEKAB0WIQRnpUMqgUjL2KRYJ5dVnxHm/pHO9QUCZ4kTDAAKCRBVnxHm/pHO 9bDiB/sFmV0721mpAS6mcUNEEuysd2O2czSfvdXp8zeE842N+e8avzu+V/c+dPfFUWAzXWHFmi6 R1CBNjbE7AhVmFL7aifhF2eKs1FJIFHOnRtAUfTzz5X5Wo2/xN0D2vNenPADyKeToBlT8yKC9Oa 9y50Eb0h5XuY0Zz7OpoNwW7W2yyEfvQMgcYcbMfE+VxbL68nz0NiTTZDGIuTPFMuZf1ViW/WbEq ieMgOd/LSU2v9vv3CFFB7n+YUnKOEM5rbIx74oSY1pT/juA9GyuNWDIykXSz3XPt8QC5gcIgyc/ l07moVEZhmqkf6kYwZVQmtENLHQb1nBcRd5XXNCPZhD29P2y X-Developer-Key: i=manivannan.sadhasivam@linaro.org; a=openpgp; fpr=C668AEC3C3188E4C611465E7488550E901166008 X-Endpoint-Received: by B4 Relay for manivannan.sadhasivam@linaro.org/default with auth_id=185 X-Original-From: Manivannan Sadhasivam Reply-To: manivannan.sadhasivam@linaro.org From: Manivannan Sadhasivam 'pciclass' is an existing prefix used to identify the PCI bridge devices, but it is not a vendor prefix. So document it in the non-vendor prefix list. Tested-by: Bartosz Golaszewski Acked-by: Rob Herring (Arm) Signed-off-by: Manivannan Sadhasivam --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index da01616802c7..0539aea6af5a 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -18,7 +18,7 @@ patternProperties: # DO NOT ADD NEW PROPERTIES TO THIS LIST "^(at25|bm|devbus|dmacap|dsa|exynos|fsi[ab]|gpio-fan|gpio-key|gpio|gpmc|hdmi|i2c-gpio),.*": true "^(keypad|m25p|max8952|max8997|max8998|mpmc),.*": true - "^(pinctrl-single|#pinctrl-single|PowerPC),.*": true + "^(pciclass|pinctrl-single|#pinctrl-single|PowerPC),.*": true "^(pl022|pxa-mmc|rcar_sound|rotary-encoder|s5m8767|sdhci),.*": true "^(simple-audio-card|st-plgpio|st-spics|ts),.*": true From patchwork Thu Jan 16 14:09:15 2025 Content-Type: text/plain; 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Thu, 16 Jan 2025 14:09:19 +0000 (UTC) From: Manivannan Sadhasivam via B4 Relay Date: Thu, 16 Jan 2025 19:39:15 +0530 Subject: [PATCH v3 5/5] PCI/pwrctrl: Add pwrctrl driver for PCI Slots Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250116-pci-pwrctrl-slot-v3-5-827473c8fbf4@linaro.org> References: <20250116-pci-pwrctrl-slot-v3-0-827473c8fbf4@linaro.org> In-Reply-To: <20250116-pci-pwrctrl-slot-v3-0-827473c8fbf4@linaro.org> To: Bjorn Helgaas , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Bartosz Golaszewski , Manivannan Sadhasivam X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=5046; i=manivannan.sadhasivam@linaro.org; h=from:subject:message-id; bh=5dX65BdkoJK96uXxbW3egypDqFuEy1NtN49QNZGGNsE=; b=owEBbQGS/pANAwAKAVWfEeb+kc71AcsmYgBniRMMWkODI5NUgHn2Ssnt1o4GLSkku/dl94QRo TODRrTW4PKJATMEAAEKAB0WIQRnpUMqgUjL2KRYJ5dVnxHm/pHO9QUCZ4kTDAAKCRBVnxHm/pHO 9Yx3CACMKjxlFIJfTMv23OFQLi+Grgf9xrvD056zzNcWcLdo+lNbQATb1EnuBE5VFVW4BoktQ7H z+UAocW4cgJfOnf4ne6Agm/pbwVlp8C2YfnfHsN55qiv5XAPA43aMubE84G6e/mglisNgSq8AkT TJ5zKiCk5K3ctQTlTWU4CAMyt02sejbEkcnzHfRYdmLfhm1iflY4D+G+e276tsUKfU4/LyJL0Ex QBtafx/65r5C5gQtAL6Ehwo/7MxLmbG41LOsuTpm7UE5awfXwRL89ve0r1Xoqdnmjfeuq/GT0ur 5dgIV8COa8NFjjL9T+TGJKLXvPE0VrR9l5jCsypVxPlSbzkP X-Developer-Key: i=manivannan.sadhasivam@linaro.org; a=openpgp; fpr=C668AEC3C3188E4C611465E7488550E901166008 X-Endpoint-Received: by B4 Relay for manivannan.sadhasivam@linaro.org/default with auth_id=185 X-Original-From: Manivannan Sadhasivam Reply-To: manivannan.sadhasivam@linaro.org From: Manivannan Sadhasivam This driver is used to control the power state of the devices attached to the PCI slots. Currently, it controls the voltage rails of the PCI slots defined in the devicetree node of the root port. The voltage rails for PCI slots are documented in the dt-schema: https://github.com/devicetree-org/dt-schema/blob/v2024.11/dtschema/schemas/pci/pci-bus-common.yaml#L153 Since this driver has to work with different kind of slots (x{1/4/8/16} PCIe, Mini PCIe, PCI etc...), the driver is using the of_regulator_bulk_get_all() API to obtain the voltage regulators defined in the DT node, instead of hardcoding them. The DT node of the root port should define the relevant supply properties corresponding to the voltage rails of the PCI slot. Tested-by: Bartosz Golaszewski Signed-off-by: Manivannan Sadhasivam --- drivers/pci/pwrctrl/Kconfig | 11 ++++++ drivers/pci/pwrctrl/Makefile | 3 ++ drivers/pci/pwrctrl/slot.c | 93 ++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 107 insertions(+) diff --git a/drivers/pci/pwrctrl/Kconfig b/drivers/pci/pwrctrl/Kconfig index 54589bb2403b..990cab67d413 100644 --- a/drivers/pci/pwrctrl/Kconfig +++ b/drivers/pci/pwrctrl/Kconfig @@ -10,3 +10,14 @@ config PCI_PWRCTL_PWRSEQ tristate select POWER_SEQUENCING select PCI_PWRCTL + +config PCI_PWRCTL_SLOT + tristate "PCI Power Control driver for PCI slots" + select PCI_PWRCTL + help + Say Y here to enable the PCI Power Control driver to control the power + state of PCI slots. + + This is a generic driver that controls the power state of different + PCI slots. The voltage regulators powering the rails of the PCI slots + are expected to be defined in the devicetree node of the PCI bridge. diff --git a/drivers/pci/pwrctrl/Makefile b/drivers/pci/pwrctrl/Makefile index 75c7ce531c7e..ddfb12c5aadf 100644 --- a/drivers/pci/pwrctrl/Makefile +++ b/drivers/pci/pwrctrl/Makefile @@ -4,3 +4,6 @@ obj-$(CONFIG_PCI_PWRCTL) += pci-pwrctrl-core.o pci-pwrctrl-core-y := core.o obj-$(CONFIG_PCI_PWRCTL_PWRSEQ) += pci-pwrctrl-pwrseq.o + +obj-$(CONFIG_PCI_PWRCTL_SLOT) += pci-pwrctl-slot.o +pci-pwrctl-slot-y := slot.o diff --git a/drivers/pci/pwrctrl/slot.c b/drivers/pci/pwrctrl/slot.c new file mode 100644 index 000000000000..18becc144913 --- /dev/null +++ b/drivers/pci/pwrctrl/slot.c @@ -0,0 +1,93 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2024 Linaro Ltd. + * Author: Manivannan Sadhasivam + */ + +#include +#include +#include +#include +#include +#include +#include + +struct pci_pwrctrl_slot_data { + struct pci_pwrctrl ctx; + struct regulator_bulk_data *supplies; + int num_supplies; +}; + +static void devm_pci_pwrctrl_slot_power_off(void *data) +{ + struct pci_pwrctrl_slot_data *slot = data; + + regulator_bulk_disable(slot->num_supplies, slot->supplies); + regulator_bulk_free(slot->num_supplies, slot->supplies); +} + +static int pci_pwrctrl_slot_probe(struct platform_device *pdev) +{ + struct pci_pwrctrl_slot_data *slot; + struct device *dev = &pdev->dev; + int ret; + + slot = devm_kzalloc(dev, sizeof(*slot), GFP_KERNEL); + if (!slot) + return -ENOMEM; + + ret = of_regulator_bulk_get_all(dev, dev_of_node(dev), + &slot->supplies); + if (ret < 0) { + dev_err_probe(dev, ret, "Failed to get slot regulators\n"); + return ret; + } + + slot->num_supplies = ret; + ret = regulator_bulk_enable(slot->num_supplies, slot->supplies); + if (ret < 0) { + dev_err_probe(dev, ret, "Failed to enable slot regulators\n"); + goto err_regulator_free; + } + + ret = devm_add_action_or_reset(dev, devm_pci_pwrctrl_slot_power_off, + slot); + if (ret) + goto err_regulator_disable; + + pci_pwrctrl_init(&slot->ctx, dev); + + ret = devm_pci_pwrctrl_device_set_ready(dev, &slot->ctx); + if (ret) + return dev_err_probe(dev, ret, "Failed to register pwrctrl driver\n"); + + return 0; + +err_regulator_disable: + regulator_bulk_disable(slot->num_supplies, slot->supplies); +err_regulator_free: + regulator_bulk_free(slot->num_supplies, slot->supplies); + + return ret; +} + +static const struct of_device_id pci_pwrctrl_slot_of_match[] = { + { + .compatible = "pciclass,0604", + }, + { } +}; +MODULE_DEVICE_TABLE(of, pci_pwrctrl_slot_of_match); + +static struct platform_driver pci_pwrctrl_slot_driver = { + .driver = { + .name = "pci-pwrctrl-slot", + .of_match_table = pci_pwrctrl_slot_of_match, + }, + .probe = pci_pwrctrl_slot_probe, +}; +module_platform_driver(pci_pwrctrl_slot_driver); + +MODULE_AUTHOR("Manivannan Sadhasivam "); +MODULE_DESCRIPTION("Generic PCI Power Control driver for PCI Slots"); +MODULE_LICENSE("GPL");