From patchwork Mon Jan 20 12:54:33 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mitul Golani X-Patchwork-Id: 13945050 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A0337C02182 for ; Mon, 20 Jan 2025 12:57:53 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3970610E3E5; Mon, 20 Jan 2025 12:57:53 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="ltV/TxOz"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.15]) by gabe.freedesktop.org (Postfix) with ESMTPS id 6BE5B10E3E3; Mon, 20 Jan 2025 12:57:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1737377872; x=1768913872; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=86FyoeUVJ+rX7D1jkFrr0L2QaZyCRTA7SvD+B8xVvNQ=; b=ltV/TxOz4L/xyraQMPgGeDgzBcQXFhc01lilVIx0yhXEJbWE4VLew/d0 5K1VJok8J7li8umV+iErzNQLdVtazQjipmVzvljwDP8cCfneWmbQ1KwrB 1x8i4kUqKzDuzUs8cozAkv2G9OcLEvknpOzf+sdeD9ljoYoLKB7lq0jKZ 1qT1lgJKkloFm5lJtz6frvDBcuHhxEOs1sDirr3wngST522L2NKjk2GUv kNepaO2ASocdJwrrq16oDt4mGwCF26Ds/GK6ZwOhwpo5EDvvskXCiJe1Z sZ2n4Abjnck378kndjfT0qJ4OPIiNZ0IvaQWXCx22UgweufxMpJCE0REM A==; X-CSE-ConnectionGUID: 3WHQVH7sQoqfZUaaAWMihg== X-CSE-MsgGUID: mMQdxFgiTBeGWdojnnL1oA== X-IronPort-AV: E=McAfee;i="6700,10204,11321"; a="37930627" X-IronPort-AV: E=Sophos;i="6.13,219,1732608000"; d="scan'208";a="37930627" Received: from fmviesa006.fm.intel.com ([10.60.135.146]) by fmvoesa109.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Jan 2025 04:57:52 -0800 X-CSE-ConnectionGUID: QPUk5ivqR2S87Ph3EKgocg== X-CSE-MsgGUID: kueptJshTxKbRPSkGJMslA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.13,219,1732608000"; d="scan'208";a="106326409" Received: from mgolanimitul-x299-ud4-pro.iind.intel.com ([10.190.239.114]) by fmviesa006.fm.intel.com with ESMTP; 20 Jan 2025 04:57:50 -0800 From: Mitul Golani To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: ankit.k.nautiyal@intel.com, jani.nikula@intel.com, ville.syrjala@intel.com Subject: [PATCH v8 1/7] drm/i915/scaler: Add and compute scaling factors Date: Mon, 20 Jan 2025 18:24:33 +0530 Message-ID: <20250120125439.4188626-2-mitulkumar.ajitkumar.golani@intel.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250120125439.4188626-1-mitulkumar.ajitkumar.golani@intel.com> References: <20250120125439.4188626-1-mitulkumar.ajitkumar.golani@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Add scaling factors to scaler_state for a particular scaler user. These factors will be used later to compute scaler prefill latency. Currently, only plane scaling factors are stored, but the same members can later be extended to store pipe scaling factors as well. --v2: - Rephrase commit message. [Ankit] - Corrects typos. [Ankit] Signed-off-by: Mitul Golani Reviewed-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_display_types.h | 2 ++ drivers/gpu/drm/i915/display/skl_scaler.c | 3 +++ 2 files changed, 5 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index 8271e50e3644..603f292996aa 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -711,6 +711,8 @@ struct intel_initial_plane_config { struct intel_scaler { u32 mode; bool in_use; + int hscale; + int vscale; }; struct intel_crtc_scaler_state { diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c b/drivers/gpu/drm/i915/display/skl_scaler.c index a11e09a15e23..67b86f6f62fc 100644 --- a/drivers/gpu/drm/i915/display/skl_scaler.c +++ b/drivers/gpu/drm/i915/display/skl_scaler.c @@ -434,6 +434,9 @@ static int intel_atomic_setup_scaler(struct intel_crtc_scaler_state *scaler_stat return -EINVAL; } + + scaler_state->scalers[*scaler_id].hscale = hscale; + scaler_state->scalers[*scaler_id].vscale = vscale; } drm_dbg_kms(display->drm, "[CRTC:%d:%s] attached scaler id %u.%u to %s:%d\n", From patchwork Mon Jan 20 12:54:34 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mitul Golani X-Patchwork-Id: 13945051 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4E713C02182 for ; Mon, 20 Jan 2025 12:57:57 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id EA35F10E3F0; Mon, 20 Jan 2025 12:57:56 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="XuehmTZJ"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.15]) by gabe.freedesktop.org (Postfix) with ESMTPS id 00B4B10E3E8; Mon, 20 Jan 2025 12:57:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1737377875; x=1768913875; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=DF+d62a3GkGtbHdP9CS66btAZ5HAvAInCKnRENLEFS4=; b=XuehmTZJyZgKNEoEGtzIkHJzIp9TDiGVUJ1N0c4AUYg9Ivzk70+xeLXo 6hrvLsUd+rub/rLq2dNkiSpvC78yfrXqM51LetQxdynrmRGfbMQWZHeN1 e09QNPEgw+PujkZ8xmRJjMn2FDZCx9K1OGStEHcjbsx/5C1ZrnTA8EJME t+pOGb3zbFiTsOsOCKMQ2i43FUH2TuOfYqqfbTEO41bOCSWNnuGQcOIzr R5U8qupWgOvNWQDDw3HOq3lBOpeot4gbrzVXhPkRjw3Jdu5J+IjNhjhZz 7Qhi1TNQrJY0qFYr5HUgMlDcioVv513K5+g5sAOvn2oiqDraZFHVxYbFe Q==; X-CSE-ConnectionGUID: ZZihigjmQGm3L+LG3gA/BQ== X-CSE-MsgGUID: KREjZIglTOuzSLbfaMvqmA== X-IronPort-AV: E=McAfee;i="6700,10204,11321"; a="37930628" X-IronPort-AV: E=Sophos;i="6.13,219,1732608000"; d="scan'208";a="37930628" Received: from fmviesa006.fm.intel.com ([10.60.135.146]) by fmvoesa109.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Jan 2025 04:57:54 -0800 X-CSE-ConnectionGUID: YBHyfpHZQKWwYwCOvYwGNg== X-CSE-MsgGUID: OpO+hb7PSnenXHIwd4Z7iQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.13,219,1732608000"; d="scan'208";a="106326415" Received: from mgolanimitul-x299-ud4-pro.iind.intel.com ([10.190.239.114]) by fmviesa006.fm.intel.com with ESMTP; 20 Jan 2025 04:57:52 -0800 From: Mitul Golani To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: ankit.k.nautiyal@intel.com, jani.nikula@intel.com, ville.syrjala@intel.com Subject: [PATCH v8 2/7] drm/i915/scaler: Use crtc_state to setup plane or pipe scaler Date: Mon, 20 Jan 2025 18:24:34 +0530 Message-ID: <20250120125439.4188626-3-mitulkumar.ajitkumar.golani@intel.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250120125439.4188626-1-mitulkumar.ajitkumar.golani@intel.com> References: <20250120125439.4188626-1-mitulkumar.ajitkumar.golani@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Pass crtc_state to intel_atomic_setup_scaler, this will help to check if pch_pfit enabled or not and also will be useful to pass scaler_state with the same which will be used later to store hscale and vscale values. -- v2: - Fix typos. (Ankit) Signed-off-by: Mitul Golani Reviewed-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/skl_scaler.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c b/drivers/gpu/drm/i915/display/skl_scaler.c index 67b86f6f62fc..12efa4008027 100644 --- a/drivers/gpu/drm/i915/display/skl_scaler.c +++ b/drivers/gpu/drm/i915/display/skl_scaler.c @@ -319,13 +319,15 @@ static int intel_allocate_scaler(struct intel_crtc_scaler_state *scaler_state, return -1; } -static int intel_atomic_setup_scaler(struct intel_crtc_scaler_state *scaler_state, +static int intel_atomic_setup_scaler(struct intel_crtc_state *crtc_state, int num_scalers_need, struct intel_crtc *crtc, const char *name, int idx, struct intel_plane_state *plane_state, int *scaler_id) { struct intel_display *display = to_intel_display(crtc); + struct intel_crtc_scaler_state *scaler_state = + &crtc_state->scaler_state; struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); u32 mode; @@ -455,7 +457,7 @@ static int setup_crtc_scaler(struct intel_atomic_state *state, struct intel_crtc_scaler_state *scaler_state = &crtc_state->scaler_state; - return intel_atomic_setup_scaler(scaler_state, + return intel_atomic_setup_scaler(crtc_state, hweight32(scaler_state->scaler_users), crtc, "CRTC", crtc->base.base.id, NULL, &scaler_state->scaler_id); @@ -490,7 +492,7 @@ static int setup_plane_scaler(struct intel_atomic_state *state, if (IS_ERR(plane_state)) return PTR_ERR(plane_state); - return intel_atomic_setup_scaler(scaler_state, + return intel_atomic_setup_scaler(crtc_state, hweight32(scaler_state->scaler_users), crtc, "PLANE", plane->base.base.id, plane_state, &plane_state->scaler_id); From patchwork Mon Jan 20 12:54:35 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mitul Golani X-Patchwork-Id: 13945052 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2F682C02181 for ; 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X-CSE-ConnectionGUID: MWo87Zg0QdKpKg0joor7hQ== X-CSE-MsgGUID: 1k9hvX1uSU6Mjt0GZGzGrw== X-IronPort-AV: E=McAfee;i="6700,10204,11321"; a="37930637" X-IronPort-AV: E=Sophos;i="6.13,219,1732608000"; d="scan'208";a="37930637" Received: from fmviesa006.fm.intel.com ([10.60.135.146]) by fmvoesa109.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Jan 2025 04:57:57 -0800 X-CSE-ConnectionGUID: +2czkNStTsyHO0usOtr3jg== X-CSE-MsgGUID: iIhDwC8FQ1SZ4qUa4H2a6g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.13,219,1732608000"; d="scan'208";a="106326422" Received: from mgolanimitul-x299-ud4-pro.iind.intel.com ([10.190.239.114]) by fmviesa006.fm.intel.com with ESMTP; 20 Jan 2025 04:57:54 -0800 From: Mitul Golani To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: ankit.k.nautiyal@intel.com, jani.nikula@intel.com, ville.syrjala@intel.com Subject: [PATCH v8 3/7] drm/i915/scaler: Refactor max_scale computation Date: Mon, 20 Jan 2025 18:24:35 +0530 Message-ID: <20250120125439.4188626-4-mitulkumar.ajitkumar.golani@intel.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250120125439.4188626-1-mitulkumar.ajitkumar.golani@intel.com> References: <20250120125439.4188626-1-mitulkumar.ajitkumar.golani@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Refactor max scaling factor computation into a reusable function for scalers. --v2: - Add missing comment. [Ankit] Signed-off-by: Mitul Golani Reviewed-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/skl_scaler.c | 70 +++++++++++++---------- 1 file changed, 41 insertions(+), 29 deletions(-) diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c b/drivers/gpu/drm/i915/display/skl_scaler.c index 12efa4008027..a832cdccd9fa 100644 --- a/drivers/gpu/drm/i915/display/skl_scaler.c +++ b/drivers/gpu/drm/i915/display/skl_scaler.c @@ -319,6 +319,44 @@ static int intel_allocate_scaler(struct intel_crtc_scaler_state *scaler_state, return -1; } +static void +calculate_max_scale(struct intel_crtc *crtc, + bool is_yuv_semiplanar, + int scaler_id, + int *max_hscale, int *max_vscale) +{ + struct intel_display *display = to_intel_display(crtc); + + /* + * FIXME: When two scalers are needed, but only one of + * them needs to downscale, we should make sure that + * the one that needs downscaling support is assigned + * as the first scaler, so we don't reject downscaling + * unnecessarily. + */ + + if (DISPLAY_VER(display) >= 14) { + /* + * On versions 14 and up, only the first + * scaler supports a vertical scaling factor + * of more than 1.0, while a horizontal + * scaling factor of 3.0 is supported. + */ + *max_hscale = 0x30000 - 1; + + if (scaler_id == 0) + *max_vscale = 0x30000 - 1; + else + *max_vscale = 0x10000; + } else if (DISPLAY_VER(display) >= 10 || !is_yuv_semiplanar) { + *max_hscale = 0x30000 - 1; + *max_vscale = 0x30000 - 1; + } else { + *max_hscale = 0x20000 - 1; + *max_vscale = 0x20000 - 1; + } +} + static int intel_atomic_setup_scaler(struct intel_crtc_state *crtc_state, int num_scalers_need, struct intel_crtc *crtc, const char *name, int idx, @@ -388,35 +426,9 @@ static int intel_atomic_setup_scaler(struct intel_crtc_state *crtc_state, const struct drm_rect *dst = &plane_state->uapi.dst; int hscale, vscale, max_vscale, max_hscale; - /* - * FIXME: When two scalers are needed, but only one of - * them needs to downscale, we should make sure that - * the one that needs downscaling support is assigned - * as the first scaler, so we don't reject downscaling - * unnecessarily. - */ - - if (DISPLAY_VER(display) >= 14) { - /* - * On versions 14 and up, only the first - * scaler supports a vertical scaling factor - * of more than 1.0, while a horizontal - * scaling factor of 3.0 is supported. - */ - max_hscale = 0x30000 - 1; - if (*scaler_id == 0) - max_vscale = 0x30000 - 1; - else - max_vscale = 0x10000; - - } else if (DISPLAY_VER(display) >= 10 || - !intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier)) { - max_hscale = 0x30000 - 1; - max_vscale = 0x30000 - 1; - } else { - max_hscale = 0x20000 - 1; - max_vscale = 0x20000 - 1; - } + calculate_max_scale(crtc, + intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier), + *scaler_id, &max_hscale, &max_vscale); /* * FIXME: We should change the if-else block above to From patchwork Mon Jan 20 12:54:36 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mitul Golani X-Patchwork-Id: 13945053 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5E14BC02181 for ; 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X-CSE-ConnectionGUID: ql78cn+BTXmP5pkxE6CNCw== X-CSE-MsgGUID: yndeze8ZTcGDFjbSEQkcKw== X-IronPort-AV: E=McAfee;i="6700,10204,11321"; a="37930642" X-IronPort-AV: E=Sophos;i="6.13,219,1732608000"; d="scan'208";a="37930642" Received: from fmviesa006.fm.intel.com ([10.60.135.146]) by fmvoesa109.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Jan 2025 04:57:59 -0800 X-CSE-ConnectionGUID: hTg652PJScKKxlADX7uDkw== X-CSE-MsgGUID: eh90Z9WFSyunw+MPEP1WPQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.13,219,1732608000"; d="scan'208";a="106326436" Received: from mgolanimitul-x299-ud4-pro.iind.intel.com ([10.190.239.114]) by fmviesa006.fm.intel.com with ESMTP; 20 Jan 2025 04:57:57 -0800 From: Mitul Golani To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: ankit.k.nautiyal@intel.com, jani.nikula@intel.com, ville.syrjala@intel.com Subject: [PATCH v8 4/7] drm/i915/scaler: Compute scaling factors for pipe scaler Date: Mon, 20 Jan 2025 18:24:36 +0530 Message-ID: <20250120125439.4188626-5-mitulkumar.ajitkumar.golani@intel.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250120125439.4188626-1-mitulkumar.ajitkumar.golani@intel.com> References: <20250120125439.4188626-1-mitulkumar.ajitkumar.golani@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Compute scaling factors and scaler user for pipe scaler if particular scaler user is pipe scaler. --v2: - Fix typos. [Ankit] - Remove FIXME tag. [Ankit] - Should be common hscale, vscale instead of local one to avoid garbage overwritten. --v3: - Separate out max_scaling information. [Ankit] - Use max_hscale and max_vscale info instead of INT_MAX. [Ankit] Signed-off-by: Mitul Golani Reviewed-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/skl_scaler.c | 36 ++++++++++++++++++----- 1 file changed, 29 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c b/drivers/gpu/drm/i915/display/skl_scaler.c index a832cdccd9fa..72344044d9d3 100644 --- a/drivers/gpu/drm/i915/display/skl_scaler.c +++ b/drivers/gpu/drm/i915/display/skl_scaler.c @@ -368,6 +368,7 @@ static int intel_atomic_setup_scaler(struct intel_crtc_state *crtc_state, &crtc_state->scaler_state; struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); u32 mode; + int hscale, vscale, max_vscale, max_hscale; if (*scaler_id < 0) *scaler_id = intel_allocate_scaler(scaler_state, crtc); @@ -416,15 +417,10 @@ static int intel_atomic_setup_scaler(struct intel_crtc_state *crtc_state, mode = SKL_PS_SCALER_MODE_DYN; } - /* - * FIXME: we should also check the scaler factors for pfit, so - * this shouldn't be tied directly to planes. - */ if (plane_state && plane_state->hw.fb) { const struct drm_framebuffer *fb = plane_state->hw.fb; const struct drm_rect *src = &plane_state->uapi.src; const struct drm_rect *dst = &plane_state->uapi.dst; - int hscale, vscale, max_vscale, max_hscale; calculate_max_scale(crtc, intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier), @@ -448,11 +444,37 @@ static int intel_atomic_setup_scaler(struct intel_crtc_state *crtc_state, return -EINVAL; } + } + + if (crtc_state->pch_pfit.enabled) { + struct drm_rect src; + + drm_rect_init(&src, 0, 0, + drm_rect_width(&crtc_state->pipe_src) << 16, + drm_rect_height(&crtc_state->pipe_src) << 16); + + calculate_max_scale(crtc, 0, *scaler_id, + &max_hscale, &max_vscale); - scaler_state->scalers[*scaler_id].hscale = hscale; - scaler_state->scalers[*scaler_id].vscale = vscale; + hscale = drm_rect_calc_hscale(&src, &crtc_state->pch_pfit.dst, + 0, max_hscale); + vscale = drm_rect_calc_vscale(&src, &crtc_state->pch_pfit.dst, + 0, max_vscale); + + if (hscale < 0 || vscale < 0) { + drm_dbg_kms(display->drm, + "Scaler %d doesn't support required pipe scaling\n", + *scaler_id); + drm_rect_debug_print("src: ", &src, true); + drm_rect_debug_print("dst: ", &crtc_state->pch_pfit.dst, false); + + return -EINVAL; + } } + scaler_state->scalers[*scaler_id].hscale = hscale; + scaler_state->scalers[*scaler_id].vscale = vscale; + drm_dbg_kms(display->drm, "[CRTC:%d:%s] attached scaler id %u.%u to %s:%d\n", crtc->base.base.id, crtc->base.name, crtc->pipe, *scaler_id, name, idx); From patchwork Mon Jan 20 12:54:37 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mitul Golani X-Patchwork-Id: 13945054 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EAC47C02182 for ; Mon, 20 Jan 2025 12:58:02 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 925A410E3FE; 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X-CSE-ConnectionGUID: j7HqCUJYSX+3Ess7HY3Vxw== X-CSE-MsgGUID: fZRag69TSvWJTn4tWKWr/g== X-IronPort-AV: E=McAfee;i="6700,10204,11321"; a="37930645" X-IronPort-AV: E=Sophos;i="6.13,219,1732608000"; d="scan'208";a="37930645" Received: from fmviesa006.fm.intel.com ([10.60.135.146]) by fmvoesa109.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Jan 2025 04:58:01 -0800 X-CSE-ConnectionGUID: Ouq3b4eNT/aMnM88UEK2Mw== X-CSE-MsgGUID: w0MTstMETo691yWV+3Qlmg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.13,219,1732608000"; d="scan'208";a="106326443" Received: from mgolanimitul-x299-ud4-pro.iind.intel.com ([10.190.239.114]) by fmviesa006.fm.intel.com with ESMTP; 20 Jan 2025 04:57:59 -0800 From: Mitul Golani To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: ankit.k.nautiyal@intel.com, jani.nikula@intel.com, ville.syrjala@intel.com Subject: [PATCH v8 5/7] drm/i915/scaler: Limit pipe scaler downscaling factors for YUV420 Date: Mon, 20 Jan 2025 18:24:37 +0530 Message-ID: <20250120125439.4188626-6-mitulkumar.ajitkumar.golani@intel.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250120125439.4188626-1-mitulkumar.ajitkumar.golani@intel.com> References: <20250120125439.4188626-1-mitulkumar.ajitkumar.golani@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Limit downscaling to less than 1.5 (source/destination) in the horizontal direction and 1.0 in the vertical direction, When configured for Pipe YUV 420 encoding for port output. Bspec: 50441, 7490, 69901 Signed-off-by: Mitul Golani Reviewed-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/skl_scaler.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c b/drivers/gpu/drm/i915/display/skl_scaler.c index 72344044d9d3..c9d7966b37ff 100644 --- a/drivers/gpu/drm/i915/display/skl_scaler.c +++ b/drivers/gpu/drm/i915/display/skl_scaler.c @@ -456,6 +456,16 @@ static int intel_atomic_setup_scaler(struct intel_crtc_state *crtc_state, calculate_max_scale(crtc, 0, *scaler_id, &max_hscale, &max_vscale); + /* + * When configured for Pipe YUV 420 encoding for port output, + * limit downscaling to less than 1.5 (source/destination) in + * the horizontal direction and 1.0 in the vertical direction. + */ + if (crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420) { + max_hscale = 0x18000 - 1; + max_vscale = 0x10000; + } + hscale = drm_rect_calc_hscale(&src, &crtc_state->pch_pfit.dst, 0, max_hscale); vscale = drm_rect_calc_vscale(&src, &crtc_state->pch_pfit.dst, From patchwork Mon Jan 20 12:54:38 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mitul Golani X-Patchwork-Id: 13945055 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 03847C02181 for ; Mon, 20 Jan 2025 12:58:06 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9C4DB10E403; Mon, 20 Jan 2025 12:58:06 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="Vfv8ayAs"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.15]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8DCFA10E401; Mon, 20 Jan 2025 12:58:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1737377884; x=1768913884; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=IRI69xAK4mvNGRs6PwWr+kOXCbnGQJvWDbxb37CLACY=; b=Vfv8ayAstnL1C0LVY6Ljfw3YmK/TBaoGCYNiKlz7pUK6zokvK9GZQOwq msHGsufE+7alua5xH7mF0d3tss9BV83x5j52QGdU83OCZnaoaxEh0WNAk n5Vp2KSi3uLwPeA57k1yDEwABIwF6X71NyuqHnezlVywVxImToUfXd1wC lx5miG8f7zGnCOXogusaXJ7VDgo8aCKAFVYvnrDa6S1RL8wBltTEByEoH af5JqqChEYOz0ztlZdWknIg4Mkayq9EitKF/MiQEsUTkmRidD6nycS4l8 jxctYEybHkkWKRv12rmygUg5bmurOcntfL14E7nGAJqtEHte5nr0DPzrL Q==; X-CSE-ConnectionGUID: 6f1hB/mnQECyGDZzlT6PVA== X-CSE-MsgGUID: iI/MGrkOQKKWZGvSphDNVA== X-IronPort-AV: E=McAfee;i="6700,10204,11321"; a="37930648" X-IronPort-AV: E=Sophos;i="6.13,219,1732608000"; d="scan'208";a="37930648" Received: from fmviesa006.fm.intel.com ([10.60.135.146]) by fmvoesa109.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Jan 2025 04:58:03 -0800 X-CSE-ConnectionGUID: iDsGoqNEQyyeB1twptepcw== X-CSE-MsgGUID: FHdPP5M6TCm7W2KAs8Bh+w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.13,219,1732608000"; d="scan'208";a="106326449" Received: from mgolanimitul-x299-ud4-pro.iind.intel.com ([10.190.239.114]) by fmviesa006.fm.intel.com with ESMTP; 20 Jan 2025 04:58:01 -0800 From: Mitul Golani To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: ankit.k.nautiyal@intel.com, jani.nikula@intel.com, ville.syrjala@intel.com Subject: [PATCH v8 6/7] drm/i915/scaler: Check if vblank is sufficient for scaler Date: Mon, 20 Jan 2025 18:24:38 +0530 Message-ID: <20250120125439.4188626-7-mitulkumar.ajitkumar.golani@intel.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250120125439.4188626-1-mitulkumar.ajitkumar.golani@intel.com> References: <20250120125439.4188626-1-mitulkumar.ajitkumar.golani@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" High refresh rate panels which may have small line times and vblank sizes, Check if vblank size is sufficient for enabled scaler users. --v2: - Use hweight* family of functions for counting bits. [Jani] - Update precision handling for hscale and vscale. [Ankit] - Consider chroma downscaling factor during latency calculation. [Ankit] - Replace function name from scaler_prefill_time to scaler_prefill_latency. --v3: - hscale_k and vscale_k values are already left shifted by 16, after multiplying by 1000, those need to be right shifted to 16. [Ankit] - Replace YCBCR444 to YCBCR420. [Ankit] - Divide by 1000 * 1000 in end to get correct precision. [Ankit] - Initialise latency to 0 to avoid any garbage. --v4: - Elaborate commit message and add Bspec number. [Ankit] - Improvise latency calculation. [Ankit] - Use ceiling value for down scaling factor when less than 1 as per bspec. [Ankit] - Correct linetime calculation. [Ankit] - Consider cdclk prefill adjustment while prefill computation.[Ankit] --v5: - Add Bspec link in commit message trailer. [Ankit] - Correct hscale, vscale data type. - Use intel_crtc_compute_min_cdclk. [Ankit] --v6: - Update FIXME comment. - Use cdclk_state->logical.cdclk instead of intel_crtc_compute_min_cdclk. [Ankit] --v7: - Handle error return from cdclk_prefill_adjustment. [Ankit] - Avoid incorrect round off for linetime. [Ankit] - Correct precision. [Ankit] Bspec: 70151 Signed-off-by: Mitul Golani Reviewed-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/skl_watermark.c | 54 +++++++++++++++++++- 1 file changed, 53 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c index f4458d1185b3..448d320e0d47 100644 --- a/drivers/gpu/drm/i915/display/skl_watermark.c +++ b/drivers/gpu/drm/i915/display/skl_watermark.c @@ -2292,6 +2292,57 @@ static int icl_build_plane_wm(struct intel_crtc_state *crtc_state, return 0; } +static int +cdclk_prefill_adjustment(const struct intel_crtc_state *crtc_state) +{ + struct intel_display *display = to_intel_display(crtc_state); + struct intel_atomic_state *state = + to_intel_atomic_state(crtc_state->uapi.state); + const struct intel_cdclk_state *cdclk_state; + + cdclk_state = intel_atomic_get_cdclk_state(state); + if (IS_ERR(cdclk_state)) { + drm_WARN_ON(display->drm, PTR_ERR(cdclk_state)); + return 1; + } + + return min(1, DIV_ROUND_UP(crtc_state->pixel_rate, + 2 * cdclk_state->logical.cdclk)); +} + +static int +scaler_prefill_latency(const struct intel_crtc_state *crtc_state) +{ + const struct intel_crtc_scaler_state *scaler_state = + &crtc_state->scaler_state; + int num_scaler_users = hweight32(scaler_state->scaler_users); + int scaler_prefill_latency = 0; + int linetime = DIV_ROUND_UP(1000 * crtc_state->hw.adjusted_mode.htotal, + crtc_state->hw.adjusted_mode.clock); + + if (!num_scaler_users) + return scaler_prefill_latency; + + scaler_prefill_latency = 4 * linetime; + + if (num_scaler_users > 1) { + u64 hscale_k = max(1000, mul_u32_u32(scaler_state->scalers[0].hscale, 1000) >> 16); + u64 vscale_k = max(1000, mul_u32_u32(scaler_state->scalers[0].vscale, 1000) >> 16); + int chroma_downscaling_factor = + crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420 ? 2 : 1; + int latency; + + latency = DIV_ROUND_UP_ULL((4 * linetime * hscale_k * vscale_k * + chroma_downscaling_factor), 1000000); + latency *= chroma_downscaling_factor; + scaler_prefill_latency += latency; + } + + scaler_prefill_latency *= cdclk_prefill_adjustment(crtc_state); + + return intel_usecs_to_scanlines(&crtc_state->hw.adjusted_mode, scaler_prefill_latency); +} + static bool skl_is_vblank_too_short(const struct intel_crtc_state *crtc_state, int wm0_lines, int latency) @@ -2299,9 +2350,10 @@ skl_is_vblank_too_short(const struct intel_crtc_state *crtc_state, const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; - /* FIXME missing scaler and DSC pre-fill time */ + /* FIXME missing DSC pre-fill time */ return crtc_state->framestart_delay + intel_usecs_to_scanlines(adjusted_mode, latency) + + scaler_prefill_latency(crtc_state) + wm0_lines > adjusted_mode->crtc_vtotal - adjusted_mode->crtc_vblank_start; } From patchwork Mon Jan 20 12:54:39 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mitul Golani X-Patchwork-Id: 13945056 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0A170C0218B for ; Mon, 20 Jan 2025 12:58:08 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9CE5810E404; Mon, 20 Jan 2025 12:58:07 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="T9/6vrX/"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.15]) by gabe.freedesktop.org (Postfix) with ESMTPS id D867810E3E3; Mon, 20 Jan 2025 12:58:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1737377886; x=1768913886; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=MT1O6Z87VW3M9jdT9iAYShp+ghFJakARA1XiIeadJy8=; b=T9/6vrX/9sRev2JwFbFV3w7tP8NsQxPgz+DAvqs0n99pf7AE44PFVWQs oB6F1l+1UzubNpEkNi9btP+q2cCLYrwXYRJKzuldpUZJtGpt27t3vPxWn ppt2lsUwoDDb0KeTzr5gzZvQ5VjoBgx2j0mOCy0cnfOucYInoDvwnd5Bk 91kqrSXlg22wDbsOt8FtwtLE6okD8HPp+zOSqrWKPHw7chnqNtxxKtJxY KJRaKb2jyC34EKfeFz41DH4hRO5xLl2JxXnumFx404m1YhrK8mKNmO7Zy FvnlcJYtLaRTlWHxySwmuF6WJnhMXwSOR5U9RSpDIAPyvK5PAwm3X2Big Q==; X-CSE-ConnectionGUID: ib+oPGsDTnibLr2fy51XPA== X-CSE-MsgGUID: nYoCheDwS92XdSKgs//KuA== X-IronPort-AV: E=McAfee;i="6700,10204,11321"; a="37930654" X-IronPort-AV: E=Sophos;i="6.13,219,1732608000"; d="scan'208";a="37930654" Received: from fmviesa006.fm.intel.com ([10.60.135.146]) by fmvoesa109.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Jan 2025 04:58:06 -0800 X-CSE-ConnectionGUID: 1e6jukVQSL6xyan9UotUXQ== X-CSE-MsgGUID: ZvECYpD4SB6vaMRLCSQg3w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.13,219,1732608000"; d="scan'208";a="106326454" Received: from mgolanimitul-x299-ud4-pro.iind.intel.com ([10.190.239.114]) by fmviesa006.fm.intel.com with ESMTP; 20 Jan 2025 04:58:03 -0800 From: Mitul Golani To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: ankit.k.nautiyal@intel.com, jani.nikula@intel.com, ville.syrjala@intel.com Subject: [PATCH v8 7/7] drm/i915/dsc: Check if vblank is sufficient for dsc prefill Date: Mon, 20 Jan 2025 18:24:39 +0530 Message-ID: <20250120125439.4188626-8-mitulkumar.ajitkumar.golani@intel.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250120125439.4188626-1-mitulkumar.ajitkumar.golani@intel.com> References: <20250120125439.4188626-1-mitulkumar.ajitkumar.golani@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" High refresh rate panels which may have small line times and vblank sizes, Check if vblank size is sufficient for dsc prefill latency. --v2: - Consider chroma downscaling factor in latency calculation. [Ankit] - Replace with appropriate function name. --v3: - Remove FIXME tag.[Ankit] - Replace Ycbcr444 to Ycbcr420.[Ankit] - Correct precision. [Ankit] - Use some local valiables like linetime_factor and latency to adjust precision. - Declare latency to 0 initially to avoid returning any garbage values. - Account for second scaler downscaling factor as well. [Ankit] --v4: - Improvise hscale and vscale calculation. [Ankit] - Use appropriate name for number of scaler users. [Ankit] - Update commit message and rebase. - Add linetime and cdclk prefill adjustment calculation. [Ankit] --v5: - Update bspec link in trailer. [Ankit] - Correct hscale, vscale datatype. [Ankit] - Use intel_crtc_compute_min_cdclk. [Ankit] --v6: - Use cdclk_state->logical.cdclk instead of intel_crtc_compute_min_cdclk. [Ankit] --v7: - Fix linetime calculation. [Ankit] - Reduce redandancy use of variables. [Ankit] - Fix typos. [Ankit] - Update calculation for precision. [Ankit] Bspec: 70151 Signed-off-by: Mitul Golani Reviewed-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/skl_watermark.c | 32 +++++++++++++++++++- 1 file changed, 31 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c index 448d320e0d47..89e8da70c333 100644 --- a/drivers/gpu/drm/i915/display/skl_watermark.c +++ b/drivers/gpu/drm/i915/display/skl_watermark.c @@ -2310,6 +2310,36 @@ cdclk_prefill_adjustment(const struct intel_crtc_state *crtc_state) 2 * cdclk_state->logical.cdclk)); } +static int +dsc_prefill_latency(const struct intel_crtc_state *crtc_state) +{ + const struct intel_crtc_scaler_state *scaler_state = + &crtc_state->scaler_state; + int linetime = DIV_ROUND_UP(1000 * crtc_state->hw.adjusted_mode.htotal, + crtc_state->hw.adjusted_mode.clock); + u32 dsc_prefill_latency; + int num_scaler_users = hweight32(scaler_state->scaler_users); + int chroma_downscaling_factor = + crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420 ? 2 : 1; + u64 hscale_k, vscale_k; + + if (!crtc_state->dsc.compression_enable || !num_scaler_users) + return dsc_prefill_latency; + + dsc_prefill_latency = DIV_ROUND_UP(15 * linetime * chroma_downscaling_factor, 10); + + for (int i = 0; i < num_scaler_users; i++) { + hscale_k = max(1000, mul_u32_u32(scaler_state->scalers[i].hscale, 1000) >> 16); + vscale_k = max(1000, mul_u32_u32(scaler_state->scalers[i].vscale, 1000) >> 16); + dsc_prefill_latency = DIV_ROUND_UP_ULL(dsc_prefill_latency * hscale_k * vscale_k, + 1000000); + } + + dsc_prefill_latency *= cdclk_prefill_adjustment(crtc_state); + + return intel_usecs_to_scanlines(&crtc_state->hw.adjusted_mode, dsc_prefill_latency); +} + static int scaler_prefill_latency(const struct intel_crtc_state *crtc_state) { @@ -2350,10 +2380,10 @@ skl_is_vblank_too_short(const struct intel_crtc_state *crtc_state, const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; - /* FIXME missing DSC pre-fill time */ return crtc_state->framestart_delay + intel_usecs_to_scanlines(adjusted_mode, latency) + scaler_prefill_latency(crtc_state) + + dsc_prefill_latency(crtc_state) + wm0_lines > adjusted_mode->crtc_vtotal - adjusted_mode->crtc_vblank_start; }