From patchwork Wed Jan 22 17:42:46 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Chevallier X-Patchwork-Id: 13947612 X-Patchwork-Delegate: kuba@kernel.org Received: from relay8-d.mail.gandi.net (relay8-d.mail.gandi.net [217.70.183.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 70DE22144C3; Wed, 22 Jan 2025 17:42:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737567782; cv=none; b=jHo8QDCbscMbGy9Y1G4YkHtfp6sXC9WIyoadJIbGwmQAUHnXdKLB2JY1qQmMGhTMKGHjj9u2XWaSmSH1r2RsijxOKH0xl/xLvF7GfOPeZJPx/2FPtEjzVZYZaQJetFBDJKS2MT4TYcHcskoxDUYIQddLyqATLwnL2mrSlEFE9rw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737567782; c=relaxed/simple; bh=DY1/k0eBlVapADi//qnq2XNXV3ROZemPRISpI5Bg+MY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Yjb1b0qCE1ey8ksDN6/ReFgVipnPXUTbYdEVNoWY0MYnFExiD/0PwmMFkwRU1tvnfScrgY4ZbgObA6oo9WlJ18KAam9a2SqnKAP/1hAiF0uceXqq5qbqORjUnMC190ILEDytPxbtp7xe9e6DQJJ0o1JjvkL4LI7FvyN+Vo2tLnA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=DZKgEsHO; arc=none smtp.client-ip=217.70.183.201 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="DZKgEsHO" Received: by mail.gandi.net (Postfix) with ESMTPSA id 497721BF20A; Wed, 22 Jan 2025 17:42:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1737567777; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=R21uchUxZH3kd/+XEJyhxXfsQTWgj4LtDLMoHBD/ylY=; b=DZKgEsHO8ziv7KeVihZaDAIEhCh1W2pzfR6LOfaQptA4ggQY9zz5aqwCUiGElzu9cgUiSK KXD02YlVDWPSvzI5vzFGkleXUpEAhD1085GJr8YK6bOmOMyOgow14YSPtJy6jzEEB4ndt0 Bzdw9LBNUuAK1lF7ZoNE6ytPzi7IL3C7D6Rk9CH9vVUxtMOxZLzeqE9Uz9vvYa4DC1cIa4 TuWUOO8gtiKYUP34kMqG1cvw+jyDAPWcR7KPQvJazDfxKG2jejQ87bCGF0YU4J6TLi0eJd 29mkCrWTfMZkoIgjPEvDN7WOJW9s0vDmb0EEc4EiJG11LqSiJHOcg52CcSCLqQ== From: Maxime Chevallier To: davem@davemloft.net Cc: Maxime Chevallier , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, thomas.petazzoni@bootlin.com, Andrew Lunn , Jakub Kicinski , Eric Dumazet , Paolo Abeni , Russell King , linux-arm-kernel@lists.infradead.org, Christophe Leroy , Herve Codina , Florian Fainelli , Heiner Kallweit , Vladimir Oltean , =?utf-8?q?K=C3=B6ry_Maincent?= , =?utf-8?q?Marek?= =?utf-8?q?_Beh=C3=BAn?= , Oleksij Rempel , =?utf-8?q?Nicol=C3=B2_Veronese?= , Simon Horman , mwojtas@chromium.org, Antoine Tenart , Rob Herring , Krzysztof Kozlowski , Conor Dooley Subject: [PATCH net-next RFC v2 1/6] net: ethtool: common: Make BaseT a 4-lanes mode Date: Wed, 22 Jan 2025 18:42:46 +0100 Message-ID: <20250122174252.82730-2-maxime.chevallier@bootlin.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250122174252.82730-1-maxime.chevallier@bootlin.com> References: <20250122174252.82730-1-maxime.chevallier@bootlin.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-GND-Sasl: maxime.chevallier@bootlin.com X-Patchwork-Delegate: kuba@kernel.org X-Patchwork-State: RFC When referring to BaseT ethernet, we are most of the time thinking of BaseT4 ethernet on Cat5/6/7 cables. This is therefore BaseT4, although BaseT4 is also possible for 100BaseTX. This is even more true now that we have a special __LINK_MODE_LANES_T1 mode especially for Single Pair ethernet. Mark BaseT as being a 4-lanes mode. Signed-off-by: Maxime Chevallier --- RFC V2: No changes net/ethtool/common.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/net/ethtool/common.c b/net/ethtool/common.c index 2bd77c94f9f1..8452d3216bce 100644 --- a/net/ethtool/common.c +++ b/net/ethtool/common.c @@ -244,7 +244,7 @@ static_assert(ARRAY_SIZE(link_mode_names) == __ETHTOOL_LINK_MODE_MASK_NBITS); #define __LINK_MODE_LANES_LR8_ER8_FR8 8 #define __LINK_MODE_LANES_LRM 1 #define __LINK_MODE_LANES_MLD2 2 -#define __LINK_MODE_LANES_T 1 +#define __LINK_MODE_LANES_T 4 #define __LINK_MODE_LANES_T1 1 #define __LINK_MODE_LANES_X 1 #define __LINK_MODE_LANES_FX 1 From patchwork Wed Jan 22 17:42:47 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Chevallier X-Patchwork-Id: 13947613 X-Patchwork-Delegate: kuba@kernel.org Received: from relay8-d.mail.gandi.net (relay8-d.mail.gandi.net [217.70.183.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B015D215175; Wed, 22 Jan 2025 17:43:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737567783; cv=none; b=i9Of0sJ0I8Vo3ak9qO4yQ490K1ERQXCJ9TJEwoh5rE5djIRrSOce0+TvbHlO1CuyEZxfxePKnmZW435/WQlnAX/i+IuHh7u4L/K8ZJZTic6Twi26H3okGjP1WCzGMxk7BUwx0+PBaJDmHuUpPmLjJnzyzuhvDvufC1N33uOZHJQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737567783; c=relaxed/simple; bh=cB2Lq2+SiOTQdlEikzQsbK6yjtbYWHqh+e6gA6JKPTk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=sw77Q+Su4tkF08KD3dYemwtBnrOHZ2Vlq+0go2jy/FavKSZq38Mqov6hFl03C340+DhPsvzMMM4GaCxIVlPeo2JZDJv8acxyfcumK4or5jOjNeZzzKuAeg6MIrsCFLC4gc6gKBFjmyGyZHZUy0RjhzIHUnr3+VoQ8yQ/twdTb4Y= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=PoFACQhN; arc=none smtp.client-ip=217.70.183.201 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="PoFACQhN" Received: by mail.gandi.net (Postfix) with ESMTPSA id A4F4F1BF20B; Wed, 22 Jan 2025 17:42:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1737567778; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=yV45AK9wetm4/KowU17Kq5VWOkQoqrz4Z80hLp3X4ac=; b=PoFACQhNrblbn6yNBJlxRR/AKEe6HCYPMbhM6WtJXXrAKbAtYNbpxUUYm3ooBWhM/Hz3Iq 5hTFrUKOOR+/kdIXwtHcXLppwi0dxTRvixWhHGVUMryRYi+T3iq2LTjBylEXcCONr6hEhE LAcW1YwwALEa+B6C+k/X6GXZbC8GxkiZxxrbDc/IL+7cwn7dtdxOolpzDXvrD/Wxyk4JjI fUs+d+UlHuB3GzblALes/KbXM+YIyMNWqWKoYAlUUt5Z5T9LrpfbYgaI4V+Sk4Fyskn5TX hdP8w07ZvETgJdu8baPB1QJc4VHd9AR71JcLOa8OQME7fXoq4eHfLV5JQ2mBoQ== From: Maxime Chevallier To: davem@davemloft.net Cc: Maxime Chevallier , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, thomas.petazzoni@bootlin.com, Andrew Lunn , Jakub Kicinski , Eric Dumazet , Paolo Abeni , Russell King , linux-arm-kernel@lists.infradead.org, Christophe Leroy , Herve Codina , Florian Fainelli , Heiner Kallweit , Vladimir Oltean , =?utf-8?q?K=C3=B6ry_Maincent?= , =?utf-8?q?Marek?= =?utf-8?q?_Beh=C3=BAn?= , Oleksij Rempel , =?utf-8?q?Nicol=C3=B2_Veronese?= , Simon Horman , mwojtas@chromium.org, Antoine Tenart , Rob Herring , Krzysztof Kozlowski , Conor Dooley Subject: [PATCH net-next RFC v2 2/6] net: ethtool: Introduce ETHTOOL_LINK_MEDIUM_* values Date: Wed, 22 Jan 2025 18:42:47 +0100 Message-ID: <20250122174252.82730-3-maxime.chevallier@bootlin.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250122174252.82730-1-maxime.chevallier@bootlin.com> References: <20250122174252.82730-1-maxime.chevallier@bootlin.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-GND-Sasl: maxime.chevallier@bootlin.com X-Patchwork-Delegate: kuba@kernel.org X-Patchwork-State: RFC In an effort to have a better representation of Ethernet ports, introduce enumeration values representing the various ethernet Mediums. This is part of the 802.3 naming convention, for example : 1000 Base T 4 | | | | | | | \_ lanes (4) | | \___ Medium (T == Twisted Copper Pairs) | \_______ Baseband transmission \____________ Speed Other example : 10000 Base K X 4 | | \_ lanes (4) | \___ encoding (BaseX is 8b/10b while BaseR is 66b/64b) \_____ Medium (K is backplane ethernet) In the case of representing a physical port, only the medium and number of lanes should be relevant. One exception would be 1000BaseX, which is currently also used as a medium in what appears to be any of 1000BaseSX, 1000BaseFX, 1000BaseCX and 1000BaseLX. These mediums are set in the net/ethtool/common.c lookup table that maintains a list of all linkmodes with their number of lanes, medium, encoding, speed and duplex. One notable exception to this is 100M BaseT Ethernet. 100BaseTX is a 2-lanes protocol but it will also work on 4-lanes cables, so the lookup table contains 2 sets of lane numbers, indicating the min number of lanes for a protocol to work and the "nominal" number of lanes as well. Signed-off-by: Maxime Chevallier --- RFC V2: No changes include/linux/ethtool.h | 48 ++++++++++ net/ethtool/common.c | 194 +++++++++++++++++++++------------------- net/ethtool/common.h | 2 + 3 files changed, 153 insertions(+), 91 deletions(-) diff --git a/include/linux/ethtool.h b/include/linux/ethtool.h index 870994cc3ef7..62b5a9d7efd5 100644 --- a/include/linux/ethtool.h +++ b/include/linux/ethtool.h @@ -210,6 +210,54 @@ static inline u8 *ethtool_rxfh_context_key(struct ethtool_rxfh_context *ctx) void ethtool_rxfh_context_lost(struct net_device *dev, u32 context_id); +enum ethtool_link_medium { + ETHTOOL_LINK_MEDIUM_BASET = 0, + ETHTOOL_LINK_MEDIUM_BASEK, + ETHTOOL_LINK_MEDIUM_BASES, + ETHTOOL_LINK_MEDIUM_BASEC, + ETHTOOL_LINK_MEDIUM_BASEL, + ETHTOOL_LINK_MEDIUM_BASED, + ETHTOOL_LINK_MEDIUM_BASEE, + ETHTOOL_LINK_MEDIUM_BASEF, + ETHTOOL_LINK_MEDIUM_BASEV, + ETHTOOL_LINK_MEDIUM_BASEMLD, /* I don't know what that is */ + ETHTOOL_LINK_MEDIUM_BASEX, /* Not a true medium, but abused... */ + ETHTOOL_LINK_MEDIUM_NONE, + + __ETHTOOL_LINK_MEDIUM_LAST, +}; + +static inline const char *phy_mediums(enum ethtool_link_medium medium) +{ + switch (medium) { + case ETHTOOL_LINK_MEDIUM_BASET: + return "BaseT"; + case ETHTOOL_LINK_MEDIUM_BASEK: + return "BaseK"; + case ETHTOOL_LINK_MEDIUM_BASES: + return "BaseS"; + case ETHTOOL_LINK_MEDIUM_BASEC: + return "BaseC"; + case ETHTOOL_LINK_MEDIUM_BASEL: + return "BaseL"; + case ETHTOOL_LINK_MEDIUM_BASED: + return "BaseD"; + case ETHTOOL_LINK_MEDIUM_BASEE: + return "BaseE"; + case ETHTOOL_LINK_MEDIUM_BASEF: + return "BaseF"; + case ETHTOOL_LINK_MEDIUM_BASEV: + return "BaseV"; + case ETHTOOL_LINK_MEDIUM_BASEMLD: + return "BaseMLD"; + case ETHTOOL_LINK_MEDIUM_BASEX: + return "BaseX"; + case ETHTOOL_LINK_MEDIUM_NONE: + return "None"; + default: return "unknown"; + } +} + /* declare a link mode bitmap */ #define __ETHTOOL_DECLARE_LINK_MODE_MASK(name) \ DECLARE_BITMAP(name, __ETHTOOL_LINK_MODE_MASK_NBITS) diff --git a/net/ethtool/common.c b/net/ethtool/common.c index 8452d3216bce..487731945224 100644 --- a/net/ethtool/common.c +++ b/net/ethtool/common.c @@ -255,11 +255,22 @@ static_assert(ARRAY_SIZE(link_mode_names) == __ETHTOOL_LINK_MODE_MASK_NBITS); #define __LINK_MODE_LANES_DR8_2 8 #define __LINK_MODE_LANES_T1BRR 1 -#define __DEFINE_LINK_MODE_PARAMS(_speed, _type, _duplex) \ +#define __DEFINE_LINK_MODE_PARAMS_LANES(_speed, _type, _min_lanes, _lanes, _duplex, _medium) \ [ETHTOOL_LINK_MODE(_speed, _type, _duplex)] = { \ .speed = SPEED_ ## _speed, \ + .min_lanes = _min_lanes, \ + .lanes = _lanes, \ + .duplex = __DUPLEX_ ## _duplex, \ + .medium = ETHTOOL_LINK_MEDIUM_BASE ## _medium \ + } + +#define __DEFINE_LINK_MODE_PARAMS(_speed, _type, _duplex, _medium) \ + [ETHTOOL_LINK_MODE(_speed, _type, _duplex)] = { \ + .speed = SPEED_ ## _speed, \ + .min_lanes = __LINK_MODE_LANES_ ## _type, \ .lanes = __LINK_MODE_LANES_ ## _type, \ - .duplex = __DUPLEX_ ## _duplex \ + .duplex = __DUPLEX_ ## _duplex, \ + .medium = ETHTOOL_LINK_MEDIUM_BASE ## _medium \ } #define __DUPLEX_Half DUPLEX_HALF #define __DUPLEX_Full DUPLEX_FULL @@ -268,116 +279,117 @@ static_assert(ARRAY_SIZE(link_mode_names) == __ETHTOOL_LINK_MODE_MASK_NBITS); .speed = SPEED_UNKNOWN, \ .lanes = 0, \ .duplex = DUPLEX_UNKNOWN, \ + .medium = ETHTOOL_LINK_MEDIUM_NONE, \ } const struct link_mode_info link_mode_params[] = { - __DEFINE_LINK_MODE_PARAMS(10, T, Half), - __DEFINE_LINK_MODE_PARAMS(10, T, Full), - __DEFINE_LINK_MODE_PARAMS(100, T, Half), - __DEFINE_LINK_MODE_PARAMS(100, T, Full), - __DEFINE_LINK_MODE_PARAMS(1000, T, Half), - __DEFINE_LINK_MODE_PARAMS(1000, T, Full), + __DEFINE_LINK_MODE_PARAMS_LANES(10, T, 2, 4, Half, T), + __DEFINE_LINK_MODE_PARAMS_LANES(10, T, 2, 4, Full, T), + __DEFINE_LINK_MODE_PARAMS_LANES(100, T, 2, 4, Half, T), + __DEFINE_LINK_MODE_PARAMS_LANES(100, T, 2, 4, Full, T), + __DEFINE_LINK_MODE_PARAMS(1000, T, Half, T), + __DEFINE_LINK_MODE_PARAMS(1000, T, Full, T), __DEFINE_SPECIAL_MODE_PARAMS(Autoneg), __DEFINE_SPECIAL_MODE_PARAMS(TP), __DEFINE_SPECIAL_MODE_PARAMS(AUI), __DEFINE_SPECIAL_MODE_PARAMS(MII), __DEFINE_SPECIAL_MODE_PARAMS(FIBRE), __DEFINE_SPECIAL_MODE_PARAMS(BNC), - __DEFINE_LINK_MODE_PARAMS(10000, T, Full), + __DEFINE_LINK_MODE_PARAMS(10000, T, Full, T), __DEFINE_SPECIAL_MODE_PARAMS(Pause), __DEFINE_SPECIAL_MODE_PARAMS(Asym_Pause), - __DEFINE_LINK_MODE_PARAMS(2500, X, Full), + __DEFINE_LINK_MODE_PARAMS(2500, X, Full, X), __DEFINE_SPECIAL_MODE_PARAMS(Backplane), - __DEFINE_LINK_MODE_PARAMS(1000, KX, Full), - __DEFINE_LINK_MODE_PARAMS(10000, KX4, Full), - __DEFINE_LINK_MODE_PARAMS(10000, KR, Full), + __DEFINE_LINK_MODE_PARAMS(1000, KX, Full, K), + __DEFINE_LINK_MODE_PARAMS(10000, KX4, Full, K), + __DEFINE_LINK_MODE_PARAMS(10000, KR, Full, K), [ETHTOOL_LINK_MODE_10000baseR_FEC_BIT] = { .speed = SPEED_10000, .lanes = 1, .duplex = DUPLEX_FULL, }, - __DEFINE_LINK_MODE_PARAMS(20000, MLD2, Full), - __DEFINE_LINK_MODE_PARAMS(20000, KR2, Full), - __DEFINE_LINK_MODE_PARAMS(40000, KR4, Full), - __DEFINE_LINK_MODE_PARAMS(40000, CR4, Full), - __DEFINE_LINK_MODE_PARAMS(40000, SR4, Full), - __DEFINE_LINK_MODE_PARAMS(40000, LR4, Full), - __DEFINE_LINK_MODE_PARAMS(56000, KR4, Full), - __DEFINE_LINK_MODE_PARAMS(56000, CR4, Full), - __DEFINE_LINK_MODE_PARAMS(56000, SR4, Full), - __DEFINE_LINK_MODE_PARAMS(56000, LR4, Full), - __DEFINE_LINK_MODE_PARAMS(25000, CR, Full), - __DEFINE_LINK_MODE_PARAMS(25000, KR, Full), - __DEFINE_LINK_MODE_PARAMS(25000, SR, Full), - __DEFINE_LINK_MODE_PARAMS(50000, CR2, Full), - __DEFINE_LINK_MODE_PARAMS(50000, KR2, Full), - __DEFINE_LINK_MODE_PARAMS(100000, KR4, Full), - __DEFINE_LINK_MODE_PARAMS(100000, SR4, Full), - __DEFINE_LINK_MODE_PARAMS(100000, CR4, Full), - __DEFINE_LINK_MODE_PARAMS(100000, LR4_ER4, Full), - __DEFINE_LINK_MODE_PARAMS(50000, SR2, Full), - __DEFINE_LINK_MODE_PARAMS(1000, X, Full), - __DEFINE_LINK_MODE_PARAMS(10000, CR, Full), - __DEFINE_LINK_MODE_PARAMS(10000, SR, Full), - __DEFINE_LINK_MODE_PARAMS(10000, LR, Full), - __DEFINE_LINK_MODE_PARAMS(10000, LRM, Full), - __DEFINE_LINK_MODE_PARAMS(10000, ER, Full), - __DEFINE_LINK_MODE_PARAMS(2500, T, Full), - __DEFINE_LINK_MODE_PARAMS(5000, T, Full), + __DEFINE_LINK_MODE_PARAMS(20000, MLD2, Full, MLD), + __DEFINE_LINK_MODE_PARAMS(20000, KR2, Full, K), + __DEFINE_LINK_MODE_PARAMS(40000, KR4, Full, K), + __DEFINE_LINK_MODE_PARAMS(40000, CR4, Full, C), + __DEFINE_LINK_MODE_PARAMS(40000, SR4, Full, S), + __DEFINE_LINK_MODE_PARAMS(40000, LR4, Full, L), + __DEFINE_LINK_MODE_PARAMS(56000, KR4, Full, K), + __DEFINE_LINK_MODE_PARAMS(56000, CR4, Full, C), + __DEFINE_LINK_MODE_PARAMS(56000, SR4, Full, S), + __DEFINE_LINK_MODE_PARAMS(56000, LR4, Full, L), + __DEFINE_LINK_MODE_PARAMS(25000, CR, Full, C), + __DEFINE_LINK_MODE_PARAMS(25000, KR, Full, K), + __DEFINE_LINK_MODE_PARAMS(25000, SR, Full, S), + __DEFINE_LINK_MODE_PARAMS(50000, CR2, Full, C), + __DEFINE_LINK_MODE_PARAMS(50000, KR2, Full, K), + __DEFINE_LINK_MODE_PARAMS(100000, KR4, Full, K), + __DEFINE_LINK_MODE_PARAMS(100000, SR4, Full, S), + __DEFINE_LINK_MODE_PARAMS(100000, CR4, Full, C), + __DEFINE_LINK_MODE_PARAMS(100000, LR4_ER4, Full, L), + __DEFINE_LINK_MODE_PARAMS(50000, SR2, Full, S), + __DEFINE_LINK_MODE_PARAMS(1000, X, Full, X), /* :( */ + __DEFINE_LINK_MODE_PARAMS(10000, CR, Full, C), + __DEFINE_LINK_MODE_PARAMS(10000, SR, Full, S), + __DEFINE_LINK_MODE_PARAMS(10000, LR, Full, L), + __DEFINE_LINK_MODE_PARAMS(10000, LRM, Full, L), + __DEFINE_LINK_MODE_PARAMS(10000, ER, Full, E), + __DEFINE_LINK_MODE_PARAMS(2500, T, Full, T), + __DEFINE_LINK_MODE_PARAMS(5000, T, Full, T), __DEFINE_SPECIAL_MODE_PARAMS(FEC_NONE), __DEFINE_SPECIAL_MODE_PARAMS(FEC_RS), __DEFINE_SPECIAL_MODE_PARAMS(FEC_BASER), - __DEFINE_LINK_MODE_PARAMS(50000, KR, Full), - __DEFINE_LINK_MODE_PARAMS(50000, SR, Full), - __DEFINE_LINK_MODE_PARAMS(50000, CR, Full), - __DEFINE_LINK_MODE_PARAMS(50000, LR_ER_FR, Full), - __DEFINE_LINK_MODE_PARAMS(50000, DR, Full), - __DEFINE_LINK_MODE_PARAMS(100000, KR2, Full), - __DEFINE_LINK_MODE_PARAMS(100000, SR2, Full), - __DEFINE_LINK_MODE_PARAMS(100000, CR2, Full), - __DEFINE_LINK_MODE_PARAMS(100000, LR2_ER2_FR2, Full), - __DEFINE_LINK_MODE_PARAMS(100000, DR2, Full), - __DEFINE_LINK_MODE_PARAMS(200000, KR4, Full), - __DEFINE_LINK_MODE_PARAMS(200000, SR4, Full), - __DEFINE_LINK_MODE_PARAMS(200000, LR4_ER4_FR4, Full), - __DEFINE_LINK_MODE_PARAMS(200000, DR4, Full), - __DEFINE_LINK_MODE_PARAMS(200000, CR4, Full), - __DEFINE_LINK_MODE_PARAMS(100, T1, Full), - __DEFINE_LINK_MODE_PARAMS(1000, T1, Full), - __DEFINE_LINK_MODE_PARAMS(400000, KR8, Full), - __DEFINE_LINK_MODE_PARAMS(400000, SR8, Full), - __DEFINE_LINK_MODE_PARAMS(400000, LR8_ER8_FR8, Full), - __DEFINE_LINK_MODE_PARAMS(400000, DR8, Full), - __DEFINE_LINK_MODE_PARAMS(400000, CR8, Full), + __DEFINE_LINK_MODE_PARAMS(50000, KR, Full, K), + __DEFINE_LINK_MODE_PARAMS(50000, SR, Full, S), + __DEFINE_LINK_MODE_PARAMS(50000, CR, Full, C), + __DEFINE_LINK_MODE_PARAMS(50000, LR_ER_FR, Full, L), /* I guess ? */ + __DEFINE_LINK_MODE_PARAMS(50000, DR, Full, D), + __DEFINE_LINK_MODE_PARAMS(100000, KR2, Full, K), + __DEFINE_LINK_MODE_PARAMS(100000, SR2, Full, S), + __DEFINE_LINK_MODE_PARAMS(100000, CR2, Full, C), + __DEFINE_LINK_MODE_PARAMS(100000, LR2_ER2_FR2, Full, L), + __DEFINE_LINK_MODE_PARAMS(100000, DR2, Full, D), + __DEFINE_LINK_MODE_PARAMS(200000, KR4, Full, K), + __DEFINE_LINK_MODE_PARAMS(200000, SR4, Full, S), + __DEFINE_LINK_MODE_PARAMS(200000, LR4_ER4_FR4, Full, L), + __DEFINE_LINK_MODE_PARAMS(200000, DR4, Full, D), + __DEFINE_LINK_MODE_PARAMS(200000, CR4, Full, C), + __DEFINE_LINK_MODE_PARAMS(100, T1, Full, T), + __DEFINE_LINK_MODE_PARAMS(1000, T1, Full, T), + __DEFINE_LINK_MODE_PARAMS(400000, KR8, Full, K), + __DEFINE_LINK_MODE_PARAMS(400000, SR8, Full, S), + __DEFINE_LINK_MODE_PARAMS(400000, LR8_ER8_FR8, Full, L), + __DEFINE_LINK_MODE_PARAMS(400000, DR8, Full, D), + __DEFINE_LINK_MODE_PARAMS(400000, CR8, Full, C), __DEFINE_SPECIAL_MODE_PARAMS(FEC_LLRS), - __DEFINE_LINK_MODE_PARAMS(100000, KR, Full), - __DEFINE_LINK_MODE_PARAMS(100000, SR, Full), - __DEFINE_LINK_MODE_PARAMS(100000, LR_ER_FR, Full), - __DEFINE_LINK_MODE_PARAMS(100000, DR, Full), - __DEFINE_LINK_MODE_PARAMS(100000, CR, Full), - __DEFINE_LINK_MODE_PARAMS(200000, KR2, Full), - __DEFINE_LINK_MODE_PARAMS(200000, SR2, Full), - __DEFINE_LINK_MODE_PARAMS(200000, LR2_ER2_FR2, Full), - __DEFINE_LINK_MODE_PARAMS(200000, DR2, Full), - __DEFINE_LINK_MODE_PARAMS(200000, CR2, Full), - __DEFINE_LINK_MODE_PARAMS(400000, KR4, Full), - __DEFINE_LINK_MODE_PARAMS(400000, SR4, Full), - __DEFINE_LINK_MODE_PARAMS(400000, LR4_ER4_FR4, Full), - __DEFINE_LINK_MODE_PARAMS(400000, DR4, Full), - __DEFINE_LINK_MODE_PARAMS(400000, CR4, Full), - __DEFINE_LINK_MODE_PARAMS(100, FX, Half), - __DEFINE_LINK_MODE_PARAMS(100, FX, Full), - __DEFINE_LINK_MODE_PARAMS(10, T1L, Full), - __DEFINE_LINK_MODE_PARAMS(800000, CR8, Full), - __DEFINE_LINK_MODE_PARAMS(800000, KR8, Full), - __DEFINE_LINK_MODE_PARAMS(800000, DR8, Full), - __DEFINE_LINK_MODE_PARAMS(800000, DR8_2, Full), - __DEFINE_LINK_MODE_PARAMS(800000, SR8, Full), - __DEFINE_LINK_MODE_PARAMS(800000, VR8, Full), - __DEFINE_LINK_MODE_PARAMS(10, T1S, Full), - __DEFINE_LINK_MODE_PARAMS(10, T1S, Half), - __DEFINE_LINK_MODE_PARAMS(10, T1S_P2MP, Half), - __DEFINE_LINK_MODE_PARAMS(10, T1BRR, Full), + __DEFINE_LINK_MODE_PARAMS(100000, KR, Full, K), + __DEFINE_LINK_MODE_PARAMS(100000, SR, Full, S), + __DEFINE_LINK_MODE_PARAMS(100000, LR_ER_FR, Full, L), + __DEFINE_LINK_MODE_PARAMS(100000, DR, Full, D), + __DEFINE_LINK_MODE_PARAMS(100000, CR, Full, C), + __DEFINE_LINK_MODE_PARAMS(200000, KR2, Full, K), + __DEFINE_LINK_MODE_PARAMS(200000, SR2, Full, S), + __DEFINE_LINK_MODE_PARAMS(200000, LR2_ER2_FR2, Full, L), + __DEFINE_LINK_MODE_PARAMS(200000, DR2, Full, D), + __DEFINE_LINK_MODE_PARAMS(200000, CR2, Full, C), + __DEFINE_LINK_MODE_PARAMS(400000, KR4, Full, K), + __DEFINE_LINK_MODE_PARAMS(400000, SR4, Full, S), + __DEFINE_LINK_MODE_PARAMS(400000, LR4_ER4_FR4, Full, L), + __DEFINE_LINK_MODE_PARAMS(400000, DR4, Full, D), + __DEFINE_LINK_MODE_PARAMS(400000, CR4, Full, C), + __DEFINE_LINK_MODE_PARAMS(100, FX, Half, F), + __DEFINE_LINK_MODE_PARAMS(100, FX, Full, F), + __DEFINE_LINK_MODE_PARAMS(10, T1L, Full, T), + __DEFINE_LINK_MODE_PARAMS(800000, CR8, Full, C), + __DEFINE_LINK_MODE_PARAMS(800000, KR8, Full, K), + __DEFINE_LINK_MODE_PARAMS(800000, DR8, Full, D), + __DEFINE_LINK_MODE_PARAMS(800000, DR8_2, Full, D), + __DEFINE_LINK_MODE_PARAMS(800000, SR8, Full, S), + __DEFINE_LINK_MODE_PARAMS(800000, VR8, Full, V), + __DEFINE_LINK_MODE_PARAMS(10, T1S, Full, T), + __DEFINE_LINK_MODE_PARAMS(10, T1S, Half, T), + __DEFINE_LINK_MODE_PARAMS(10, T1S_P2MP, Half, T), + __DEFINE_LINK_MODE_PARAMS(10, T1BRR, Full, T), }; static_assert(ARRAY_SIZE(link_mode_params) == __ETHTOOL_LINK_MODE_MASK_NBITS); diff --git a/net/ethtool/common.h b/net/ethtool/common.h index 850eadde4bfc..b25011a05fea 100644 --- a/net/ethtool/common.h +++ b/net/ethtool/common.h @@ -16,8 +16,10 @@ struct link_mode_info { int speed; + u8 min_lanes; u8 lanes; u8 duplex; + enum ethtool_link_medium medium; }; struct genl_info; From patchwork Wed Jan 22 17:42:48 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Chevallier X-Patchwork-Id: 13947614 X-Patchwork-Delegate: kuba@kernel.org Received: from relay8-d.mail.gandi.net (relay8-d.mail.gandi.net [217.70.183.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0D9782153D5; Wed, 22 Jan 2025 17:43:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737567784; cv=none; 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IR1yTEQWGYsXKmGaiw9yuGToN2AFZj6qFQkhaJdBNGBKKWA2lym85QqaiFMTWA== From: Maxime Chevallier To: davem@davemloft.net Cc: Maxime Chevallier , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, thomas.petazzoni@bootlin.com, Andrew Lunn , Jakub Kicinski , Eric Dumazet , Paolo Abeni , Russell King , linux-arm-kernel@lists.infradead.org, Christophe Leroy , Herve Codina , Florian Fainelli , Heiner Kallweit , Vladimir Oltean , =?utf-8?q?K=C3=B6ry_Maincent?= , =?utf-8?q?Marek?= =?utf-8?q?_Beh=C3=BAn?= , Oleksij Rempel , =?utf-8?q?Nicol=C3=B2_Veronese?= , Simon Horman , mwojtas@chromium.org, Antoine Tenart , Rob Herring , Krzysztof Kozlowski , Conor Dooley Subject: [PATCH net-next RFC v2 3/6] net: ethtool: Export the link_mode_params definitions Date: Wed, 22 Jan 2025 18:42:48 +0100 Message-ID: <20250122174252.82730-4-maxime.chevallier@bootlin.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250122174252.82730-1-maxime.chevallier@bootlin.com> References: <20250122174252.82730-1-maxime.chevallier@bootlin.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-GND-Sasl: maxime.chevallier@bootlin.com X-Patchwork-Delegate: kuba@kernel.org X-Patchwork-State: RFC link_mode_params contains a lookup table of all 802.3 link modes that are currently supported with structured data about each mode's speed, duplex, number of lanes and mediums. As a preparation for a port representation, export that table for the rest of the net stack to use. Signed-off-by: Maxime Chevallier --- RFC V2: No changes include/linux/ethtool.h | 10 ++++++++++ net/ethtool/common.c | 1 + net/ethtool/common.h | 9 --------- 3 files changed, 11 insertions(+), 9 deletions(-) diff --git a/include/linux/ethtool.h b/include/linux/ethtool.h index 62b5a9d7efd5..519a90ce24d3 100644 --- a/include/linux/ethtool.h +++ b/include/linux/ethtool.h @@ -258,6 +258,16 @@ static inline const char *phy_mediums(enum ethtool_link_medium medium) } } +struct link_mode_info { + int speed; + u8 min_lanes; + u8 lanes; + u8 duplex; + enum ethtool_link_medium medium; +}; + +extern const struct link_mode_info link_mode_params[]; + /* declare a link mode bitmap */ #define __ETHTOOL_DECLARE_LINK_MODE_MASK(name) \ DECLARE_BITMAP(name, __ETHTOOL_LINK_MODE_MASK_NBITS) diff --git a/net/ethtool/common.c b/net/ethtool/common.c index 487731945224..43b6135c8f0a 100644 --- a/net/ethtool/common.c +++ b/net/ethtool/common.c @@ -392,6 +392,7 @@ const struct link_mode_info link_mode_params[] = { __DEFINE_LINK_MODE_PARAMS(10, T1BRR, Full, T), }; static_assert(ARRAY_SIZE(link_mode_params) == __ETHTOOL_LINK_MODE_MASK_NBITS); +EXPORT_SYMBOL_GPL(link_mode_params); const char netif_msg_class_names[][ETH_GSTRING_LEN] = { [NETIF_MSG_DRV_BIT] = "drv", diff --git a/net/ethtool/common.h b/net/ethtool/common.h index b25011a05fea..ee250a5c5364 100644 --- a/net/ethtool/common.h +++ b/net/ethtool/common.h @@ -14,14 +14,6 @@ #define __SOF_TIMESTAMPING_CNT (const_ilog2(SOF_TIMESTAMPING_LAST) + 1) -struct link_mode_info { - int speed; - u8 min_lanes; - u8 lanes; - u8 duplex; - enum ethtool_link_medium medium; -}; - struct genl_info; struct hwtstamp_provider_desc; @@ -34,7 +26,6 @@ tunable_strings[__ETHTOOL_TUNABLE_COUNT][ETH_GSTRING_LEN]; extern const char phy_tunable_strings[__ETHTOOL_PHY_TUNABLE_COUNT][ETH_GSTRING_LEN]; extern const char link_mode_names[][ETH_GSTRING_LEN]; -extern const struct link_mode_info link_mode_params[]; extern const char netif_msg_class_names[][ETH_GSTRING_LEN]; extern const char wol_mode_names[][ETH_GSTRING_LEN]; extern const char sof_timestamping_names[][ETH_GSTRING_LEN]; From patchwork Wed Jan 22 17:42:49 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Chevallier X-Patchwork-Id: 13947615 X-Patchwork-Delegate: kuba@kernel.org Received: from relay8-d.mail.gandi.net (relay8-d.mail.gandi.net [217.70.183.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 336F1215775; Wed, 22 Jan 2025 17:43:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737567786; cv=none; b=g/ylPeueaPHyZ3m1VOjOz9m3Y9nw6Zfa05LwzoIaNy7W9iPzoZ2ImlpYIlVJtC3HRrQ3hs9mqLFt3eml4PgYphmP1cb4z9OWEwqKGNUVdMH3OaMLW8JPkfu+HohEXvLZHRW4xwD/4dG+rLXDuKQVGzyD0fNzPwZCUhVqO+BF5gE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737567786; c=relaxed/simple; bh=m+IXZai02U3SmIXB7XGfq6O/DRFVctC8Sp1NyuNdzag=; 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d=bootlin.com; s=gm1; t=1737567781; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=YwULS4iv5epo2nKPukhme3AFoujMP2RBrHXcM6mF6jo=; b=CqOE7D9iO1aTovHQ5BnXH189MbwxaRAMvVGPdYfuFLDi8fEjoVogK1f9TykOHPNheWwZ4h X7YhnBJ3DJjNQX9AHdO36scRchSml6fOHOYG40gjCKczMfRRPV3Rd1spt0t2v9dunb0Dm4 7pERWHSZ38YC1kk6be2kUD52K0s440ret+HsV69ZIWH9JAWOd9VCJkqQBFE07LYXnlm5C5 6ZE7f4bkvdn9utjUCRxu2hIWFffo9mdYEdZNmPdy5os2weY2STkB5VCeriV3Te1j59gDmA mm3KpMPs9dR2tI8BlmqCZu7Cdxds7d1ubEXsskj2f5udx60cnE8twqBj/f1BDw== From: Maxime Chevallier To: davem@davemloft.net Cc: Maxime Chevallier , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, thomas.petazzoni@bootlin.com, Andrew Lunn , Jakub Kicinski , Eric Dumazet , Paolo Abeni , Russell King , linux-arm-kernel@lists.infradead.org, Christophe Leroy , Herve Codina , Florian Fainelli , Heiner Kallweit , Vladimir Oltean , =?utf-8?q?K=C3=B6ry_Maincent?= , =?utf-8?q?Marek?= =?utf-8?q?_Beh=C3=BAn?= , Oleksij Rempel , =?utf-8?q?Nicol=C3=B2_Veronese?= , Simon Horman , mwojtas@chromium.org, Antoine Tenart , Rob Herring , Krzysztof Kozlowski , Conor Dooley Subject: [PATCH net-next RFC v2 4/6] net: phy: Introduce PHY ports representation Date: Wed, 22 Jan 2025 18:42:49 +0100 Message-ID: <20250122174252.82730-5-maxime.chevallier@bootlin.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250122174252.82730-1-maxime.chevallier@bootlin.com> References: <20250122174252.82730-1-maxime.chevallier@bootlin.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-GND-Sasl: maxime.chevallier@bootlin.com X-Patchwork-Delegate: kuba@kernel.org X-Patchwork-State: RFC Ethernet provides a wide variety of layer 1 protocols and standards for data transmission. The front-facing ports of an interface have their own complexity and configurability. Introduce a representation of these front-facing ports. The current code is minimalistic and only support ports controlled by PHY devices, but the plan is to extend that to SFP as well as raw Ethernet MACs that don't use PHY devices. This minimal port representation allows describing the media and number of lanes of a port. From that information, we can derive the linkmodes usable on the port, which can be used to limit the capabilities of an interface. For now, the port lanes and medium is derived from devicetree, defined by the PHY driver, or populated with default values (as we assume that all PHYs expose at least one port). The typical example is 100M ethernet. 100BaseT can work using only 2 lanes on a Cat 5 cables. However, in the situation where a 10/100/1000 capable PHY is wired to its RJ45 port through 2 lanes only, we have no way of detecting that. The "max-speed" DT property can be used, but a more accurate representation can be used : mdi { port-0 { media = "BaseT"; lanes = <2>; }; }; From that information, we can derive the max speed reachable on the port. Another benefit of having that is to avoid vendor-specific DT properties (micrel,fiber-mode or ti,fiber-mode). This basic representation is meant to be expanded, by the introduction of port ops, userspace listing of ports, and support for multi-port devices. Signed-off-by: Maxime Chevallier --- RFC V2: Made lanes optional, and added a helper to get default lanes values drivers/net/phy/Makefile | 2 +- drivers/net/phy/phy_device.c | 167 +++++++++++++++++++++++++++++++++++ drivers/net/phy/phy_port.c | 166 ++++++++++++++++++++++++++++++++++ include/linux/ethtool.h | 15 ++++ include/linux/phy.h | 31 +++++++ include/linux/phy_port.h | 69 +++++++++++++++ 6 files changed, 449 insertions(+), 1 deletion(-) create mode 100644 drivers/net/phy/phy_port.c create mode 100644 include/linux/phy_port.h diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile index c8dac6e92278..de1415a46629 100644 --- a/drivers/net/phy/Makefile +++ b/drivers/net/phy/Makefile @@ -2,7 +2,7 @@ # Makefile for Linux PHY drivers libphy-y := phy.o phy-c45.o phy-core.o phy_device.o \ - linkmode.o phy_link_topology.o + linkmode.o phy_link_topology.o phy_port.o mdio-bus-y += mdio_bus.o mdio_device.o ifdef CONFIG_MDIO_DEVICE diff --git a/drivers/net/phy/phy_device.c b/drivers/net/phy/phy_device.c index 46713d27412b..f385b8fc70d1 100644 --- a/drivers/net/phy/phy_device.c +++ b/drivers/net/phy/phy_device.c @@ -656,6 +656,13 @@ struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id, dev->state = PHY_DOWN; INIT_LIST_HEAD(&dev->leds); + INIT_LIST_HEAD(&dev->ports); + + /* The driver's probe function must change that to the real number + * of ports possible on the PHY. We assume by default we are dealing + * with a single-port PHY + */ + dev->max_n_ports = 1; mutex_init(&dev->lock); INIT_DELAYED_WORK(&dev->state_queue, phy_state_machine); @@ -3405,6 +3412,159 @@ static int of_phy_leds(struct phy_device *phydev) return 0; } +static int phy_add_port(struct phy_device *phydev, struct phy_port *port) +{ + int ret = 0; + + if (phydev->n_ports == phydev->max_n_ports) + return -EBUSY; + + /* We set all ports as active by default, PHY drivers may deactivate + * them (when unused) + */ + port->active = true; + + if (phydev->drv && phydev->drv->attach_port) + ret = phydev->drv->attach_port(phydev, port); + + if (ret) + return ret; + + /* The PHY driver might have added, removed or set medium/lanes info, + * so update the port supported accordingly. + */ + phy_port_update_supported(port); + + list_add(&port->head, &phydev->ports); + + phydev->n_ports++; + + return 0; +} + +static void phy_del_port(struct phy_device *phydev, struct phy_port *port) +{ + if (!phydev->n_ports) + return; + + list_del(&port->head); + + phydev->n_ports--; +} + +static void phy_cleanup_ports(struct phy_device *phydev) +{ + struct phy_port *tmp, *port; + + list_for_each_entry_safe(port, tmp, &phydev->ports, head) { + phy_del_port(phydev, port); + phy_port_destroy(port); + } +} + +static int phy_default_setup_single_port(struct phy_device *phydev) +{ + struct phy_port *port = phy_port_alloc(); + + if (!port) + return -ENOMEM; + + port->parent_type = PHY_PORT_PHY; + port->phy = phydev; + linkmode_copy(port->supported, phydev->supported); + + /* default medium is copper */ + if (!port->mediums) + port->mediums |= BIT(ETHTOOL_LINK_MEDIUM_BASET); + + phy_add_port(phydev, port); + + return 0; +} + +static int of_phy_ports(struct phy_device *phydev) +{ + struct device_node *node = phydev->mdio.dev.of_node; + struct device_node *mdi; + struct phy_port *port; + int err; + + if (!IS_ENABLED(CONFIG_OF_MDIO)) + return 0; + + if (!node) + return 0; + + mdi = of_get_child_by_name(node, "mdi"); + if (!mdi) + return 0; + + for_each_available_child_of_node_scoped(mdi, port_node) { + port = phy_of_parse_port(port_node); + if (IS_ERR(port)) { + err = PTR_ERR(port); + goto out_err; + } + + port->parent_type = PHY_PORT_PHY; + port->phy = phydev; + err = phy_add_port(phydev, port); + if (err) + goto out_err; + } + of_node_put(mdi); + + return 0; + +out_err: + phy_cleanup_ports(phydev); + of_node_put(mdi); + return err; +} + +static int phy_setup_ports(struct phy_device *phydev) +{ + __ETHTOOL_DECLARE_LINK_MODE_MASK(ports_supported); + struct phy_port *port; + int ret; + + ret = of_phy_ports(phydev); + if (ret) + return ret; + + if (phydev->n_ports < phydev->max_n_ports) { + ret = phy_default_setup_single_port(phydev); + if (ret) + goto out; + } + + linkmode_zero(ports_supported); + + /* Aggregate the supported modes, which are made-up of : + * - What the PHY itself supports + * - What the sum of all ports support + */ + list_for_each_entry(port, &phydev->ports, head) + if (port->active) + linkmode_or(ports_supported, ports_supported, + port->supported); + + if (!linkmode_empty(ports_supported)) + linkmode_and(phydev->supported, phydev->supported, + ports_supported); + + /* For now, the phy->port field is set as the first active port's type */ + list_for_each_entry(port, &phydev->ports, head) + if (port->active) + phydev->port = phy_port_get_type(port); + + return 0; + +out: + phy_cleanup_ports(phydev); + return ret; +} + /** * fwnode_mdio_find_device - Given a fwnode, find the mdio_device * @fwnode: pointer to the mdio_device's fwnode @@ -3554,6 +3714,11 @@ static int phy_probe(struct device *dev) phydev->is_gigabit_capable = 1; of_set_phy_supported(phydev); + + err = phy_setup_ports(phydev); + if (err) + goto out; + phy_advertise_supported(phydev); /* Get PHY default EEE advertising modes and handle them as potentially @@ -3630,6 +3795,8 @@ static int phy_remove(struct device *dev) phydev->state = PHY_DOWN; + phy_cleanup_ports(phydev); + sfp_bus_del_upstream(phydev->sfp_bus); phydev->sfp_bus = NULL; diff --git a/drivers/net/phy/phy_port.c b/drivers/net/phy/phy_port.c new file mode 100644 index 000000000000..3a7bdc44b556 --- /dev/null +++ b/drivers/net/phy/phy_port.c @@ -0,0 +1,166 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* Framework to drive Ethernet ports + * + * Copyright (c) 2024 Maxime Chevallier + */ + +#include +#include +#include + +/** + * phy_port_alloc: Allocate a new phy_port + * + * Returns a newly allocated struct phy_port, or NULL. + */ +struct phy_port *phy_port_alloc(void) +{ + struct phy_port *port; + + port = kzalloc(sizeof(*port), GFP_KERNEL); + if (!port) + return NULL; + + linkmode_zero(port->supported); + INIT_LIST_HEAD(&port->head); + + return port; +} +EXPORT_SYMBOL_GPL(phy_port_alloc); + +/** + * phy_port_destroy: Free a struct phy_port + */ +void phy_port_destroy(struct phy_port *port) +{ + kfree(port); +} +EXPORT_SYMBOL_GPL(phy_port_destroy); + +static void ethtool_medium_get_supported(unsigned long *supported, + enum ethtool_link_medium medium, + int lanes) +{ + int i; + + for (i = 0; i < __ETHTOOL_LINK_MODE_MASK_NBITS; i++) { + /* Special bits such as Autoneg, Pause, Asym_pause, etc. are + * set and will be masked away by the port parent. + */ + if (link_mode_params[i].medium == ETHTOOL_LINK_MEDIUM_NONE) { + linkmode_set_bit(i, supported); + continue; + } + + /* For most cases, min_lanes == lanes, except for 10/100BaseT that work + * on 2 lanes but are compatible with 4 lanes mediums + */ + if (link_mode_params[i].medium == medium && + link_mode_params[i].lanes >= lanes && + link_mode_params[i].min_lanes <= lanes) { + linkmode_set_bit(i, supported); + } + } +} + +static enum ethtool_link_medium ethtool_str_to_medium(const char *str) +{ + int i; + + for (i = 0; i < __ETHTOOL_LINK_MEDIUM_LAST; i++) + if (!strcmp(phy_mediums(i), str)) + return i; + + return ETHTOOL_LINK_MEDIUM_NONE; +} + +/** + * phy_of_parse_port: Create a phy_port from a firmware representation + * + * Returns a newly allocated and initialized phy_port pointer, or an ERR_PTR. + */ +struct phy_port *phy_of_parse_port(struct device_node *dn) +{ + struct fwnode_handle *fwnode = of_fwnode_handle(dn); + enum ethtool_link_medium medium; + struct phy_port *port; + struct property *prop; + const char *med_str; + u32 lanes, mediums = 0; + int ret; + + ret = fwnode_property_read_u32(fwnode, "lanes", &lanes); + if (ret) + lanes = 0; + + ret = fwnode_property_read_string(fwnode, "media", &med_str); + if (ret) + return ERR_PTR(ret); + + of_property_for_each_string(to_of_node(fwnode), "media", prop, med_str) { + medium = ethtool_str_to_medium(med_str); + if (medium == ETHTOOL_LINK_MEDIUM_NONE) + return ERR_PTR(-EINVAL); + + mediums |= BIT(medium); + } + + if (!mediums) + return ERR_PTR(-EINVAL); + + port = phy_port_alloc(); + if (!port) + return ERR_PTR(-ENOMEM); + + port->lanes = lanes; + port->mediums = mediums; + + return port; +} +EXPORT_SYMBOL_GPL(phy_of_parse_port); + +/** + * phy_port_update_supported: Setup the port->supported field + * port: the port to update + * + * Once the port's medium list and number of lanes has been configured based + * on firmware, straps and vendor-specific properties, this function may be + * called to update the port's supported linkmodes list. + * + * Any mode that was manually set in the port's supported list remains set. + */ +void phy_port_update_supported(struct phy_port *port) +{ + __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); + int i, lanes = 1; + + /* If there's no lanes specified, we grab the default number of + * lanes as the max of the default lanes for each medium + */ + if (!port->lanes) + for_each_set_bit(i, &port->mediums, __ETHTOOL_LINK_MEDIUM_LAST) + lanes = max_t(int, lanes, phy_medium_default_lanes(i)); + + for_each_set_bit(i, &port->mediums, __ETHTOOL_LINK_MEDIUM_LAST) { + linkmode_zero(supported); + ethtool_medium_get_supported(supported, i, port->lanes); + linkmode_or(port->supported, port->supported, supported); + } +} +EXPORT_SYMBOL_GPL(phy_port_update_supported); + +/** + * phy_port_get_type: get the PORT_* attribut for that port. + */ +int phy_port_get_type(struct phy_port *port) +{ + if (port->mediums & ETHTOOL_LINK_MEDIUM_BASET) + return PORT_TP; + + if (phy_port_is_fiber(port) || + (port->mediums & BIT(ETHTOOL_LINK_MEDIUM_BASEX))) + return PORT_FIBRE; + + return PORT_OTHER; +} +EXPORT_SYMBOL_GPL(phy_port_get_type); diff --git a/include/linux/ethtool.h b/include/linux/ethtool.h index 519a90ce24d3..32fe062b715c 100644 --- a/include/linux/ethtool.h +++ b/include/linux/ethtool.h @@ -227,6 +227,10 @@ enum ethtool_link_medium { __ETHTOOL_LINK_MEDIUM_LAST, }; +#define ETHTOOL_MEDIUM_FIBER_BITS (BIT(ETHTOOL_LINK_MEDIUM_BASES) | \ + BIT(ETHTOOL_LINK_MEDIUM_BASEL) | \ + BIT(ETHTOOL_LINK_MEDIUM_BASEF)) + static inline const char *phy_mediums(enum ethtool_link_medium medium) { switch (medium) { @@ -258,6 +262,17 @@ static inline const char *phy_mediums(enum ethtool_link_medium medium) } } +static inline int phy_medium_default_lanes(enum ethtool_link_medium medium) +{ + /* Let's consider that the default BaseT ethernet is BaseT4, i.e. + * Gigabit Ethernet. + */ + if (medium == ETHTOOL_LINK_MEDIUM_BASET) + return 4; + + return 1; +} + struct link_mode_info { int speed; u8 min_lanes; diff --git a/include/linux/phy.h b/include/linux/phy.h index 19f076a71f94..5d536b601e3f 100644 --- a/include/linux/phy.h +++ b/include/linux/phy.h @@ -21,6 +21,7 @@ #include #include #include +#include #include #include #include @@ -642,6 +643,9 @@ struct macsec_ops; * @master_slave_state: Current master/slave configuration * @mii_ts: Pointer to time stamper callbacks * @psec: Pointer to Power Sourcing Equipment control struct + * @ports: List of PHY ports structures + * n_ports: Number of ports currently attached to the PHY + * @max_n_ports: Max number of ports this PHY can expose * @lock: Mutex for serialization access to PHY * @state_queue: Work queue for state machine * @link_down_events: Number of times link was lost @@ -734,6 +738,7 @@ struct phy_device { /* Host supported PHY interface types. Should be ignored if empty. */ DECLARE_PHY_INTERFACE_MASK(host_interfaces); + DECLARE_PHY_INTERFACE_MASK(sfp_bus_interfaces); #ifdef CONFIG_LED_TRIGGER_PHY struct phy_led_trigger *phy_led_triggers; @@ -776,6 +781,10 @@ struct phy_device { struct mii_timestamper *mii_ts; struct pse_control *psec; + struct list_head ports; + int n_ports; + int max_n_ports; + u8 mdix; u8 mdix_ctrl; @@ -1273,6 +1282,27 @@ struct phy_driver { */ int (*led_polarity_set)(struct phy_device *dev, int index, unsigned long modes); + + /** + * @attach_port: Indicates to the PHY driver that a port is detected + * @dev: PHY device to notify + * @port: The port being added + * + * Called when a port that needs to be driven by the PHY is found. The + * number of time this will be called depends on phydev->max_n_ports, + * which the driver can change in .probe(). + * + * The port that is being passed may or may not be initialized. If it is + * already initialized, it is by the generic port representation from + * devicetree, which superseeds any strapping or vendor-specific + * properties. + * + * If the port isn't initialized, the port->mediums and port->lanes + * fields must be set, possibly according to stapping information. + * + * Returns 0, or an error code. + */ + int (*attach_port)(struct phy_device *dev, struct phy_port *port); }; #define to_phy_driver(d) container_of_const(to_mdio_common_driver(d), \ struct phy_driver, mdiodrv) @@ -2083,6 +2113,7 @@ void phy_trigger_machine(struct phy_device *phydev); void phy_mac_interrupt(struct phy_device *phydev); void phy_start_machine(struct phy_device *phydev); void phy_stop_machine(struct phy_device *phydev); + void phy_ethtool_ksettings_get(struct phy_device *phydev, struct ethtool_link_ksettings *cmd); int phy_ethtool_ksettings_set(struct phy_device *phydev, diff --git a/include/linux/phy_port.h b/include/linux/phy_port.h new file mode 100644 index 000000000000..b34c15523adc --- /dev/null +++ b/include/linux/phy_port.h @@ -0,0 +1,69 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include +#include + +#ifndef __PHY_PORT_H +#define __PHY_PORT_H + +struct phy_port; + +/** + * enum phy_port_parent - The device this port is attached to + * + * @PHY_PORT_PHY: Indicates that the port is driven by a PHY device + */ +enum phy_port_parent { + PHY_PORT_PHY, +}; + +/** + * struct phy_port - A representation of a network device physical interface + * + * @head: Used by the port's parent to list ports + * @parent_type: The type of device this port is directly connected to + * @phy: If the parent is PHY_PORT_PHYDEV, the PHY controlling that port + * @lanes: The number of lanes (diff pairs) this port has, 0 if not applicable + * @medium: The physical medium this port provides access to + * @supported: The link modes this port can expose + * @active: Indicates if the port is currently part of the active link. + */ +struct phy_port { + struct list_head head; + enum phy_port_parent parent_type; + union { + struct phy_device *phy; + }; + + int lanes; + unsigned long mediums; + __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); + + bool active; +}; + +struct phy_port *phy_port_alloc(void); +void phy_port_destroy(struct phy_port *port); + +static inline struct phy_device *port_phydev(struct phy_port *port) +{ + return port->phy; +} + +struct phy_port *phy_of_parse_port(struct device_node *dn); + +static inline bool phy_port_is_copper(struct phy_port *port) +{ + return port->mediums == BIT(ETHTOOL_LINK_MEDIUM_BASET); +} + +static inline bool phy_port_is_fiber(struct phy_port *port) +{ + return !!(port->mediums & ETHTOOL_MEDIUM_FIBER_BITS); +} + +void phy_port_update_supported(struct phy_port *port); + +int phy_port_get_type(struct phy_port *port); + +#endif From patchwork Wed Jan 22 17:42:50 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Chevallier X-Patchwork-Id: 13947616 X-Patchwork-Delegate: kuba@kernel.org Received: from relay8-d.mail.gandi.net (relay8-d.mail.gandi.net [217.70.183.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 84C14215F47; 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arc=none smtp.client-ip=217.70.183.201 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="C4oixmsV" Received: by mail.gandi.net (Postfix) with ESMTPSA id 9A8131BF20E; Wed, 22 Jan 2025 17:43:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1737567782; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=UUKo6BYvxcPfoyKKjL5MJ7dl67C2+j1DdwgoDsRw0Hk=; b=C4oixmsVpErHQrmshmyIPCFZiBeiUXek8W39f3Z9HoMZrYpuxFS2uGZ2qf9gEvBuZrLLdA oHW4gDCOCG+v7cdvG338fYPbkBMbV+flL7jf253UAO2JU+v+FY4AhxfRYd7xmFdYavYyyc lRbCZf/Zuzt8R5Uv+qmpgiYPmv10GGZxPAOcj+19kfL0a0xstDpeiPRBzEcUw9Z9kntJwO tpaXMmXAjHIt6L/LHSJaTb5gcFO+Sch8bUY0tgh0jh+HSKeJZmmA3rnxzNz072EzH+83PI gl011qF12EW0bhzRBo2jfElddNAicvNrX944Lb+agK4ZvEdyubnfHoQ5u6tM1A== From: Maxime Chevallier To: davem@davemloft.net Cc: Maxime Chevallier , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, thomas.petazzoni@bootlin.com, Andrew Lunn , Jakub Kicinski , Eric Dumazet , Paolo Abeni , Russell King , linux-arm-kernel@lists.infradead.org, Christophe Leroy , Herve Codina , Florian Fainelli , Heiner Kallweit , Vladimir Oltean , =?utf-8?q?K=C3=B6ry_Maincent?= , =?utf-8?q?Marek?= =?utf-8?q?_Beh=C3=BAn?= , Oleksij Rempel , =?utf-8?q?Nicol=C3=B2_Veronese?= , Simon Horman , mwojtas@chromium.org, Antoine Tenart , Rob Herring , Krzysztof Kozlowski , Conor Dooley Subject: [PATCH net-next RFC v2 5/6] net: phy: dp83822: Add support for phy_port representation Date: Wed, 22 Jan 2025 18:42:50 +0100 Message-ID: <20250122174252.82730-6-maxime.chevallier@bootlin.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250122174252.82730-1-maxime.chevallier@bootlin.com> References: <20250122174252.82730-1-maxime.chevallier@bootlin.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-GND-Sasl: maxime.chevallier@bootlin.com X-Patchwork-Delegate: kuba@kernel.org X-Patchwork-State: RFC With the phy_port representation intrduced, we can use .attach_port to populate the port information based on either the straps or the ti,fiber-mode property. This allows simplifying the probe function and allow users to override the strapping configuration. Signed-off-by: Maxime Chevallier --- RFC V2: Addressd a warning for an unused variable drivers/net/phy/dp83822.c | 63 ++++++++++++++++++++++++--------------- 1 file changed, 39 insertions(+), 24 deletions(-) diff --git a/drivers/net/phy/dp83822.c b/drivers/net/phy/dp83822.c index 6599feca1967..a1ddb7791452 100644 --- a/drivers/net/phy/dp83822.c +++ b/drivers/net/phy/dp83822.c @@ -781,17 +781,6 @@ static int dp83822_of_init(struct phy_device *phydev) struct device *dev = &phydev->mdio.dev; const char *of_val; - /* Signal detection for the PHY is only enabled if the FX_EN and the - * SD_EN pins are strapped. Signal detection can only enabled if FX_EN - * is strapped otherwise signal detection is disabled for the PHY. - */ - if (dp83822->fx_enabled && dp83822->fx_sd_enable) - dp83822->fx_signal_det_low = device_property_present(dev, - "ti,link-loss-low"); - if (!dp83822->fx_enabled) - dp83822->fx_enabled = device_property_present(dev, - "ti,fiber-mode"); - if (!device_property_read_string(dev, "ti,gpio2-clk-out", &of_val)) { if (strcmp(of_val, "mac-if") == 0) { dp83822->gpio2_clk_out = DP83822_CLK_SRC_MAC_IF; @@ -884,6 +873,43 @@ static int dp83822_read_straps(struct phy_device *phydev) return 0; } +static int dp83822_attach_port(struct phy_device *phydev, struct phy_port *port) +{ + struct dp83822_private *dp83822 = phydev->priv; + int ret; + + if (port->mediums) { + if (phy_port_is_fiber(port) || + port->mediums & BIT(ETHTOOL_LINK_MEDIUM_BASEX)) + dp83822->fx_enabled = true; + } else { + ret = dp83822_read_straps(phydev); + if (ret) + return ret; + +#ifdef CONFIG_OF_MDIO + if (dp83822->fx_enabled && dp83822->fx_sd_enable) + dp83822->fx_signal_det_low = + device_property_present(dev, "ti,link-loss-low"); + if (!dp83822->fx_enabled) + dp83822->fx_enabled = + device_property_present(dev, "ti,fiber-mode"); +#endif + + if (dp83822->fx_enabled) { + port->lanes = 1; + port->mediums = BIT(ETHTOOL_LINK_MEDIUM_BASEF) | + BIT(ETHTOOL_LINK_MEDIUM_BASEX); + } else { + /* This PHY can only to 100BaseTX max, so on 2 lanes */ + port->lanes = 2; + port->mediums = BIT(ETHTOOL_LINK_MEDIUM_BASET); + } + } + + return 0; +} + static int dp8382x_probe(struct phy_device *phydev) { struct dp83822_private *dp83822; @@ -900,25 +926,13 @@ static int dp8382x_probe(struct phy_device *phydev) static int dp83822_probe(struct phy_device *phydev) { - struct dp83822_private *dp83822; int ret; ret = dp8382x_probe(phydev); if (ret) return ret; - dp83822 = phydev->priv; - - ret = dp83822_read_straps(phydev); - if (ret) - return ret; - - ret = dp83822_of_init(phydev); - if (ret) - return ret; - - if (dp83822->fx_enabled) - phydev->port = PORT_FIBRE; + dp83822_of_init(phydev); return 0; } @@ -1104,6 +1118,7 @@ static int dp83822_led_hw_control_get(struct phy_device *phydev, u8 index, .led_hw_is_supported = dp83822_led_hw_is_supported, \ .led_hw_control_set = dp83822_led_hw_control_set, \ .led_hw_control_get = dp83822_led_hw_control_get, \ + .attach_port = dp83822_attach_port \ } #define DP83825_PHY_DRIVER(_id, _name) \ From patchwork Wed Jan 22 17:42:51 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Chevallier X-Patchwork-Id: 13947617 X-Patchwork-Delegate: kuba@kernel.org Received: from relay8-d.mail.gandi.net (relay8-d.mail.gandi.net [217.70.183.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A14E8215F73; Wed, 22 Jan 2025 17:43:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737567788; cv=none; b=Rg/dnyXQ2eUVq+jySx+v80MPyGOIYyiEWLGM+s/SmPQbxKqQWpgEcLsI2vN2qRB8we7f0XT1aAeVOD4PY9GdLQXZgrjFIwOoS6cP/JZEqXXa7uzZKmY3nR1Ef7vee9GYDQhFboCU77E6LAdOy8hpV7MPy556tEDMCerRB0+ZbI8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737567788; c=relaxed/simple; bh=haUnWYHpoWV1YEG3E456O8CSkZM/rrUGoVuIHA4p5mg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; 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bh=JiPM+juhPKZDxkJkrDBSCODdHzxu/ka9ywjK40g8WsU=; b=UkiJoFIlzsaCHJ+rxlYnFPoS4i3rYqeQBN622jwj2YwnhzNe30nwKJSuk36pELIb+ZuzIs o6w9jh/S2BuZiP3xv7vkYh1mSon1p8QIPV4q/pmn4Kpd0X6b+mv40Fc0xxj74Spx0bxwFs CpBza73zTGNuyQhYOjqWnC1yuvv+iQOw3TAFibGh2WcCv3g2DoDCo/Pt9YmI0wxf5qX1S7 L7WCpy2b4RLvywiR5kmHSNWRONpBXWQoxT2iOXk4jxptelgzEfixmjQSFmCobkTSkaGw1/ Ru02V53kEf6h7XH1miq2H/g/YTmjmjpskX6g+tOfDbfrp2oOB8VsaHVFS27X2A== From: Maxime Chevallier To: davem@davemloft.net Cc: Maxime Chevallier , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, thomas.petazzoni@bootlin.com, Andrew Lunn , Jakub Kicinski , Eric Dumazet , Paolo Abeni , Russell King , linux-arm-kernel@lists.infradead.org, Christophe Leroy , Herve Codina , Florian Fainelli , Heiner Kallweit , Vladimir Oltean , =?utf-8?q?K=C3=B6ry_Maincent?= , =?utf-8?q?Marek?= =?utf-8?q?_Beh=C3=BAn?= , Oleksij Rempel , =?utf-8?q?Nicol=C3=B2_Veronese?= , Simon Horman , mwojtas@chromium.org, Antoine Tenart , Rob Herring , Krzysztof Kozlowski , Conor Dooley Subject: [PATCH net-next RFC v2 6/6] dt-bindings: net: Introduce the phy-port description Date: Wed, 22 Jan 2025 18:42:51 +0100 Message-ID: <20250122174252.82730-7-maxime.chevallier@bootlin.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250122174252.82730-1-maxime.chevallier@bootlin.com> References: <20250122174252.82730-1-maxime.chevallier@bootlin.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-GND-Sasl: maxime.chevallier@bootlin.com X-Patchwork-Delegate: kuba@kernel.org X-Patchwork-State: RFC The ability to describe the physical ports of Ethernet devices is useful to describe multi-port devices, as well as to remove any ambiguity with regard to the nature of the port. Moreover, describing ports allows for a better description of features that are tied to connectors, such as PoE through the PSE-PD devices. Introduce a binding to allow describing the ports, for now with 2 attributes : - The number of lanes, which is a quite generic property that allows differentating between multiple similar technologies such as BaseT1 and "regular" BaseT (which usually means BaseT4). - The media that can be used on that port, such as BaseT for Twisted Copper, BaseC for coax copper, BaseS/L for Fiber, BaseK for backplane ethernet, etc. This allows defining the nature of the port, and therefore avoids the need for vendor-specific properties such as "micrel,fiber-mode" or "ti,fiber-mode". The port description lives in its own file, as it is intended in the future to allow describing the ports for phy-less devices. Signed-off-by: Maxime Chevallier --- RFC V2: New patch .../devicetree/bindings/net/ethernet-phy.yaml | 18 +++++++ .../bindings/net/ethernet-port.yaml | 47 +++++++++++++++++++ 2 files changed, 65 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/ethernet-port.yaml diff --git a/Documentation/devicetree/bindings/net/ethernet-phy.yaml b/Documentation/devicetree/bindings/net/ethernet-phy.yaml index 2c71454ae8e3..950fdacfd27d 100644 --- a/Documentation/devicetree/bindings/net/ethernet-phy.yaml +++ b/Documentation/devicetree/bindings/net/ethernet-phy.yaml @@ -261,6 +261,17 @@ properties: additionalProperties: false + mdi: + type: object + + patternProperties: + '^port-[a-f0-9]+$': + $ref: /schemas/net/ethernet-port.yaml# + + unevaluatedProperties: false + + additionalProperties: false + required: - reg @@ -297,5 +308,12 @@ examples: default-state = "keep"; }; }; + + mdi { + port-0 { + lanes = <2>; + media = "BaseT"; + }; + }; }; }; diff --git a/Documentation/devicetree/bindings/net/ethernet-port.yaml b/Documentation/devicetree/bindings/net/ethernet-port.yaml new file mode 100644 index 000000000000..bf0f64f1b0aa --- /dev/null +++ b/Documentation/devicetree/bindings/net/ethernet-port.yaml @@ -0,0 +1,47 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/ethernet-port.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Generic Ethernet Port + +maintainers: + - Maxime Chevallier + +description: + An Ethernet port represents an output, such as a connector, of a network + component such as a PHY, an Ethernet controller with no PHY, or an SFP module. + +properties: + + lanes: + description: + Defines the number of lanes on the port, that is the number of physical + channels used to convey the data with the link partner. + $ref: /schemas/types.yaml#/definitions/uint32 + + media: + description: + The mediums, as defined in 802.3, that can be used on the port. + items: + enum: + - BaseT + - BaseK + - BaseS + - BaseC + - BaseL + - BaseD + - BaseE + - BaseF + - BaseV + - BaseMLD + - BaseX + +required: + - lanes + - media + +additionalProperties: true + +...