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[95.245.235.245]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-438b31af70dsm36652805e9.18.2025.01.22.12.34.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 22 Jan 2025 12:34:26 -0800 (PST) From: Angelo Dureghello X-Google-Original-From: Angelo Dureghello Date: Wed, 22 Jan 2025 21:32:43 +0100 Subject: [PATCH] iio: dac: ad3552r: clear reset status flag Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250122-wip-bl-ad3552r-clear-reset-v1-1-04c1760ca622@baylibre.com> X-B4-Tracking: v=1; b=H4sIAOpVkWcC/x3MQQqDMBAF0KvIrDsQJ8RFr1K6iMmPDoiVSWkF8 e4Gl2/zDqowRaVnd5Dhp1U/a0P/6CjNcZ3AmptJnATXi/BfNx4XjtmHIMZpQTQ2VHzZezfmIqW EAdSCzVB0v/PX+zwvLy6QSmwAAAA= To: Lars-Peter Clausen , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , Jonathan Cameron Cc: linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, Angelo Dureghello X-Mailer: b4 0.14.1 From: Angelo Dureghello Clear reset status flag, to keep error status register clean after reset (ad3552r manual, rev B table 38). Reset error flag was left to 1, so debugging registers, the "Error Status Register" was dirty (0x01). It is important to clear this bit, so if there is any reset event over normal working mode, it is possible to detect it. Signed-off-by: Angelo Dureghello --- drivers/iio/dac/ad3552r.c | 6 ++++++ 1 file changed, 6 insertions(+) --- base-commit: 07fa5fa97959422bbd663df056c9de0dec55e34f change-id: 20250122-wip-bl-ad3552r-clear-reset-330bdf2ff56e Best regards, diff --git a/drivers/iio/dac/ad3552r.c b/drivers/iio/dac/ad3552r.c index e7206af53af6..7944f5c1d264 100644 --- a/drivers/iio/dac/ad3552r.c +++ b/drivers/iio/dac/ad3552r.c @@ -410,6 +410,12 @@ static int ad3552r_reset(struct ad3552r_desc *dac) return ret; } + /* Clear reset error flag, see ad3552r manual, rev B table 38. */ + ret = ad3552r_write_reg(dac, AD3552R_REG_ADDR_ERR_STATUS, + AD3552R_MASK_RESET_STATUS); + if (ret) + return ret; + return ad3552r_update_reg_field(dac, AD3552R_REG_ADDR_INTERFACE_CONFIG_A, AD3552R_MASK_ADDR_ASCENSION,