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X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Introduce a CMA Heap dt-binding allowing custom CMA heap registrations. * Note to the reviewers: The patch was used for the development of the protected mode feature in Panthor CSF kernel driver and is not initially thought to land in the Linux kernel. It is mostly relevant if someone wants to reproduce the environment of testing. Please, raise interest if you think the patch has value in the Linux kernel. Signed-off-by: Florent Tomasin --- .../devicetree/bindings/dma/linux,cma.yml | 43 +++++++++++++++++++ 1 file changed, 43 insertions(+) create mode 100644 Documentation/devicetree/bindings/dma/linux,cma.yml diff --git a/Documentation/devicetree/bindings/dma/linux,cma.yml b/Documentation/devicetree/bindings/dma/linux,cma.yml new file mode 100644 index 000000000000..c532e016bbe5 --- /dev/null +++ b/Documentation/devicetree/bindings/dma/linux,cma.yml @@ -0,0 +1,43 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dma/linux-cma.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Custom Linux CMA heap + +description: + The custom Linux CMA heap device tree node allows registering + of multiple CMA heaps. + + The CMA heap name will match the node name of the "memory-region". + +properties: + compatible: + enum: + - linux,cma + + memory-region: + maxItems: 1 + description: | + Phandle to the reserved memory node associated with the CMA Heap. + The reserved memory node must follow this binding convention: + - Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt + +examples: + - | + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + + custom_cma_heap: custom-cma-heap { + compatible = "shared-dma-pool"; + reg = <0x0 0x90600000 0x0 0x1000000>; + reusable; + }; + }; + + device_cma_heap: device-cma-heap { + compatible = "linux,cma"; + memory-region = <&custom_cma_heap>; + }; From patchwork Thu Jan 30 13:08:58 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florent Tomasin X-Patchwork-Id: 13954555 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C3921C02190 for ; Thu, 30 Jan 2025 13:12:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date :Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; 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X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org This patch introduces a cma-heap probe function, allowing users to register custom cma heaps in the device tree. A "memory-region" is bound to the cma heap at probe time allowing allocation of DMA buffers from that heap. Use cases: - registration of carved out secure heaps. Some devices are implementing secure memory by reserving a specific memory regions for that purpose. For example, this is the case of platforms making use of early version of ARM TrustZone. - registration of multiple memory regions at different locations for efficiency or HW integration reasons. For example, a peripheral may expect to share data at a specific location in RAM. This information could have been programmed by a FW prior to the kernel boot. * Zeroing of CMA heap allocation: In the case of secure CMA heaps used along with ARM TrustZone, the zeroing of the secure memory could result in a bus fault if performed with `kmap_atomic()` or `page_address()`. To prevent such scenario, the zeroing of the pages is done using a virtual pointer acquired from `vmap()` using: `pgprot_writecombine(PAGE_KERNEL)` as argument. * Idea of improvement: This patch could have an impact on the performance of devices as a result of using `pgprot_writecombine(PAGE_KERNEL)`. It could be prevented by allowing control of this argument via a parameter of some sort. The driver could then use or not `pgprot_writecombine(PAGE_KERNEL)` according to the use case defined by the system integrator. * Note to the reviewers: The patch was used for the development of the protected mode feature in Panthor CSF kernel driver and is not initially thought to land in the Linux kernel. It is mostly relevant if someone wants to reproduce the environment of testing. Please, raise interest if you think the patch has value in the Linux kernel. Signed-off-by: Florent Tomasin --- drivers/dma-buf/heaps/cma_heap.c | 120 +++++++++++++++++++++---------- 1 file changed, 81 insertions(+), 39 deletions(-) diff --git a/drivers/dma-buf/heaps/cma_heap.c b/drivers/dma-buf/heaps/cma_heap.c index 9512d050563a..8f17221311fd 100644 --- a/drivers/dma-buf/heaps/cma_heap.c +++ b/drivers/dma-buf/heaps/cma_heap.c @@ -18,6 +18,9 @@ #include #include #include +#include +#include +#include #include #include #include @@ -186,6 +189,7 @@ static int cma_heap_mmap(struct dma_buf *dmabuf, struct vm_area_struct *vma) vma->vm_ops = &dma_heap_vm_ops; vma->vm_private_data = buffer; + vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot); return 0; } @@ -194,7 +198,7 @@ static void *cma_heap_do_vmap(struct cma_heap_buffer *buffer) { void *vaddr; - vaddr = vmap(buffer->pages, buffer->pagecount, VM_MAP, PAGE_KERNEL); + vaddr = vmap(buffer->pages, buffer->pagecount, VM_MAP, pgprot_writecombine(PAGE_KERNEL)); if (!vaddr) return ERR_PTR(-ENOMEM); @@ -286,6 +290,7 @@ static struct dma_buf *cma_heap_allocate(struct dma_heap *heap, struct page *cma_pages; struct dma_buf *dmabuf; int ret = -ENOMEM; + void *vaddr; pgoff_t pg; buffer = kzalloc(sizeof(*buffer), GFP_KERNEL); @@ -303,29 +308,6 @@ static struct dma_buf *cma_heap_allocate(struct dma_heap *heap, if (!cma_pages) goto free_buffer; - /* Clear the cma pages */ - if (PageHighMem(cma_pages)) { - unsigned long nr_clear_pages = pagecount; - struct page *page = cma_pages; - - while (nr_clear_pages > 0) { - void *vaddr = kmap_local_page(page); - - memset(vaddr, 0, PAGE_SIZE); - kunmap_local(vaddr); - /* - * Avoid wasting time zeroing memory if the process - * has been killed by SIGKILL. - */ - if (fatal_signal_pending(current)) - goto free_cma; - page++; - nr_clear_pages--; - } - } else { - memset(page_address(cma_pages), 0, size); - } - buffer->pages = kmalloc_array(pagecount, sizeof(*buffer->pages), GFP_KERNEL); if (!buffer->pages) { ret = -ENOMEM; @@ -335,6 +317,14 @@ static struct dma_buf *cma_heap_allocate(struct dma_heap *heap, for (pg = 0; pg < pagecount; pg++) buffer->pages[pg] = &cma_pages[pg]; + /* Clear the cma pages */ + vaddr = vmap(buffer->pages, pagecount, VM_MAP, pgprot_writecombine(PAGE_KERNEL)); + if (!vaddr) + goto free_pages; + + memset(vaddr, 0, size); + vunmap(vaddr); + buffer->cma_pages = cma_pages; buffer->heap = cma_heap; buffer->pagecount = pagecount; @@ -366,17 +356,79 @@ static const struct dma_heap_ops cma_heap_ops = { .allocate = cma_heap_allocate, }; -static int __init __add_cma_heap(struct cma *cma, void *data) +static int cma_heap_probe(struct platform_device *pdev) { + struct dma_heap_export_info *exp_info; + struct cma_heap *cma_heap; + int ret; + + exp_info = devm_kzalloc(&pdev->dev, sizeof(*exp_info), GFP_KERNEL); + if (IS_ERR_OR_NULL(exp_info)) + return -ENOMEM; + + cma_heap = devm_kzalloc(&pdev->dev, sizeof(*cma_heap), GFP_KERNEL); + if (IS_ERR_OR_NULL(cma_heap)) + return -ENOMEM; + + ret = of_reserved_mem_device_init(&pdev->dev); + if (ret) + return ret; + + cma_heap->cma = dev_get_cma_area(&pdev->dev); + if (!cma_heap->cma) { + ret = -EINVAL; + goto error_reserved_mem; + } + + exp_info->name = cma_get_name(cma_heap->cma); + exp_info->ops = &cma_heap_ops; + exp_info->priv = cma_heap; + + cma_heap->heap = dma_heap_add(exp_info); + if (IS_ERR(cma_heap->heap)) { + ret = PTR_ERR(cma_heap->heap); + goto error_reserved_mem; + } + + return 0; + +error_reserved_mem: + of_reserved_mem_device_release(&pdev->dev); + + return ret; +} + +static const struct of_device_id dt_match[] = { + { .compatible = "linux,cma" }, + {} +}; +MODULE_DEVICE_TABLE(of, dt_match); + +static struct platform_driver cma_heap_driver = { + .probe = cma_heap_probe, + .driver = { + .name = "linux,cma", + .of_match_table = dt_match, + }, +}; + +static int __init cma_heap_init(void) +{ + struct cma *cma_area = dev_get_cma_area(NULL); struct cma_heap *cma_heap; struct dma_heap_export_info exp_info; + if (!cma_area) + return -EINVAL; + + /* Add default CMA heap */ cma_heap = kzalloc(sizeof(*cma_heap), GFP_KERNEL); if (!cma_heap) return -ENOMEM; - cma_heap->cma = cma; - exp_info.name = cma_get_name(cma); + cma_heap->cma = cma_area; + + exp_info.name = cma_get_name(cma_area); exp_info.ops = &cma_heap_ops; exp_info.priv = cma_heap; @@ -388,18 +440,8 @@ static int __init __add_cma_heap(struct cma *cma, void *data) return ret; } - return 0; + return platform_driver_register(&cma_heap_driver); } -static int __init add_default_cma_heap(void) -{ - struct cma *default_cma = dev_get_cma_area(NULL); - int ret = 0; - - if (default_cma) - ret = __add_cma_heap(default_cma, NULL); - - return ret; -} -module_init(add_default_cma_heap); +module_init(cma_heap_init); MODULE_DESCRIPTION("DMA-BUF CMA Heap"); From patchwork Thu Jan 30 13:08:59 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florent Tomasin X-Patchwork-Id: 13954553 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 40B72C0218A for ; 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X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 30 Jan 2025 13:09:27.6009 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 953ce745-3d78-4b2f-74aa-08dd412f539c X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: DU2PEPF0001E9C2.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DBBPR08MB5979 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250130_050939_051575_986A8270 X-CRM114-Status: UNSURE ( 3.96 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Allow mali-valhall-csf driver to retrieve a protected heap at probe time by passing the name of the heap as attribute to the device tree GPU node. Signed-off-by: Florent Tomasin --- .../devicetree/bindings/gpu/arm,mali-valhall-csf.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml index a5b4e0021758..dc633b037ede 100644 --- a/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml +++ b/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml @@ -85,6 +85,12 @@ properties: dma-coherent: true + protected-heap-name: + $ref: /schemas/types.yaml#/definitions/string + description: + Specifies the name of the protected Heap from + which the GPU driver allocates protected memory. + required: - compatible - reg From patchwork Thu Jan 30 13:09:00 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florent Tomasin X-Patchwork-Id: 13954554 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 60365C0218A for ; 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X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org This patch allows Panthor to allocate buffer objects from a protected heap. The Panthor driver should be seen as a consumer of the heap and not an exporter. To help with the review of this patch, here are important information about the Mali GPU protected mode support: - On CSF FW load, the Panthor driver must allocate a protected buffer object to hold data to use by the FW when in protected mode. This protected buffer object is owned by the device and does not belong to a process. - On CSG creation, the Panthor driver must allocate a protected suspend buffer object for the FW to store data when suspending the CSG while in protected mode. The kernel owns this allocation and does not allow user space mapping. The format of the data in this buffer is only known by the FW and does not need to be shared with other entities. To summarize, Mali GPUs require allocations of protected buffer objects at the kernel level. * How is the protected heap accessed by the Panthor driver? The driver will retrieve the protected heap using the name of the heap provided to the driver via the DTB as attribute. If the heap is not yet available, the panthor driver will defer the probe until created. It is an integration error to provide a heap name that does not exist or is never created in the DTB node. * How is the Panthor driver allocating from the heap? Panthor is calling the DMA heap allocation function and obtains a DMA buffer from it. This buffer is then registered to GEM via PRIME by importing the DMA buffer. Signed-off-by: Florent Tomasin --- drivers/gpu/drm/panthor/Kconfig | 1 + drivers/gpu/drm/panthor/panthor_device.c | 22 ++++++++++- drivers/gpu/drm/panthor/panthor_device.h | 7 ++++ drivers/gpu/drm/panthor/panthor_fw.c | 36 +++++++++++++++-- drivers/gpu/drm/panthor/panthor_fw.h | 2 + drivers/gpu/drm/panthor/panthor_gem.c | 49 ++++++++++++++++++++++-- drivers/gpu/drm/panthor/panthor_gem.h | 16 +++++++- drivers/gpu/drm/panthor/panthor_heap.c | 2 + drivers/gpu/drm/panthor/panthor_sched.c | 5 ++- 9 files changed, 130 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/panthor/Kconfig b/drivers/gpu/drm/panthor/Kconfig index 55b40ad07f3b..c0208b886d9f 100644 --- a/drivers/gpu/drm/panthor/Kconfig +++ b/drivers/gpu/drm/panthor/Kconfig @@ -7,6 +7,7 @@ config DRM_PANTHOR depends on !GENERIC_ATOMIC64 # for IOMMU_IO_PGTABLE_LPAE depends on MMU select DEVFREQ_GOV_SIMPLE_ONDEMAND + select DMABUF_HEAPS select DRM_EXEC select DRM_GEM_SHMEM_HELPER select DRM_GPUVM diff --git a/drivers/gpu/drm/panthor/panthor_device.c b/drivers/gpu/drm/panthor/panthor_device.c index 00f7b8ce935a..1018e5c90a0e 100644 --- a/drivers/gpu/drm/panthor/panthor_device.c +++ b/drivers/gpu/drm/panthor/panthor_device.c @@ -4,7 +4,9 @@ /* Copyright 2023 Collabora ltd. */ #include +#include #include +#include #include #include #include @@ -102,6 +104,9 @@ void panthor_device_unplug(struct panthor_device *ptdev) panthor_mmu_unplug(ptdev); panthor_gpu_unplug(ptdev); + if (ptdev->protm.heap) + dma_heap_put(ptdev->protm.heap); + pm_runtime_dont_use_autosuspend(ptdev->base.dev); pm_runtime_put_sync_suspend(ptdev->base.dev); @@ -172,6 +177,7 @@ int panthor_device_init(struct panthor_device *ptdev) u32 *dummy_page_virt; struct resource *res; struct page *p; + const char *protm_heap_name; int ret; ret = panthor_gpu_coherency_init(ptdev); @@ -246,9 +252,19 @@ int panthor_device_init(struct panthor_device *ptdev) return ret; } + /* If a protected heap is specified but not found, defer the probe until created */ + if (!of_property_read_string(ptdev->base.dev->of_node, "protected-heap-name", + &protm_heap_name)) { + ptdev->protm.heap = dma_heap_find(protm_heap_name); + if (!ptdev->protm.heap) { + ret = -EPROBE_DEFER; + goto err_rpm_put; + } + } + ret = panthor_gpu_init(ptdev); if (ret) - goto err_rpm_put; + goto err_dma_heap_put; ret = panthor_mmu_init(ptdev); if (ret) @@ -286,6 +302,10 @@ int panthor_device_init(struct panthor_device *ptdev) err_unplug_gpu: panthor_gpu_unplug(ptdev); +err_dma_heap_put: + if (ptdev->protm.heap) + dma_heap_put(ptdev->protm.heap); + err_rpm_put: pm_runtime_put_sync_suspend(ptdev->base.dev); return ret; diff --git a/drivers/gpu/drm/panthor/panthor_device.h b/drivers/gpu/drm/panthor/panthor_device.h index 0e68f5a70d20..406de9e888e2 100644 --- a/drivers/gpu/drm/panthor/panthor_device.h +++ b/drivers/gpu/drm/panthor/panthor_device.h @@ -7,6 +7,7 @@ #define __PANTHOR_DEVICE_H__ #include +#include #include #include #include @@ -190,6 +191,12 @@ struct panthor_device { /** @fast_rate: Maximum device clock frequency. Set by DVFS */ unsigned long fast_rate; + + /** @protm: Protected mode related data. */ + struct { + /** @heap: Pointer to the protected heap */ + struct dma_heap *heap; + } protm; }; struct panthor_gpu_usage { diff --git a/drivers/gpu/drm/panthor/panthor_fw.c b/drivers/gpu/drm/panthor/panthor_fw.c index 4a2e36504fea..7822af1533b4 100644 --- a/drivers/gpu/drm/panthor/panthor_fw.c +++ b/drivers/gpu/drm/panthor/panthor_fw.c @@ -458,6 +458,7 @@ panthor_fw_alloc_queue_iface_mem(struct panthor_device *ptdev, mem = panthor_kernel_bo_create(ptdev, ptdev->fw->vm, SZ_8K, DRM_PANTHOR_BO_NO_MMAP, + 0, DRM_PANTHOR_VM_BIND_OP_MAP_NOEXEC | DRM_PANTHOR_VM_BIND_OP_MAP_UNCACHED, PANTHOR_VM_KERNEL_AUTO_VA); @@ -491,6 +492,28 @@ panthor_fw_alloc_suspend_buf_mem(struct panthor_device *ptdev, size_t size) { return panthor_kernel_bo_create(ptdev, panthor_fw_vm(ptdev), size, DRM_PANTHOR_BO_NO_MMAP, + 0, + DRM_PANTHOR_VM_BIND_OP_MAP_NOEXEC, + PANTHOR_VM_KERNEL_AUTO_VA); +} + +/** + * panthor_fw_alloc_protm_suspend_buf_mem() - Allocate a protm suspend buffer + * for a command stream group. + * @ptdev: Device. + * @size: Size of the protm suspend buffer. + * + * Return: A valid pointer in case of success, NULL if no protected heap, an ERR_PTR() otherwise. + */ +struct panthor_kernel_bo * +panthor_fw_alloc_protm_suspend_buf_mem(struct panthor_device *ptdev, size_t size) +{ + if (!ptdev->protm.heap) + return NULL; + + return panthor_kernel_bo_create(ptdev, panthor_fw_vm(ptdev), size, + DRM_PANTHOR_BO_NO_MMAP, + DRM_PANTHOR_KBO_PROTECTED_HEAP, DRM_PANTHOR_VM_BIND_OP_MAP_NOEXEC, PANTHOR_VM_KERNEL_AUTO_VA); } @@ -503,6 +526,7 @@ static int panthor_fw_load_section_entry(struct panthor_device *ptdev, ssize_t vm_pgsz = panthor_vm_page_size(ptdev->fw->vm); struct panthor_fw_binary_section_entry_hdr hdr; struct panthor_fw_section *section; + bool is_protm_section = false; u32 section_size; u32 name_len; int ret; @@ -541,10 +565,13 @@ static int panthor_fw_load_section_entry(struct panthor_device *ptdev, return -EINVAL; } - if (hdr.flags & CSF_FW_BINARY_IFACE_ENTRY_PROT) { + if ((hdr.flags & CSF_FW_BINARY_IFACE_ENTRY_PROT) && !ptdev->protm.heap) { drm_warn(&ptdev->base, "Firmware protected mode entry not be supported, ignoring"); return 0; + } else if ((hdr.flags & CSF_FW_BINARY_IFACE_ENTRY_PROT) && ptdev->protm.heap) { + drm_info(&ptdev->base, "Firmware protected mode entry supported"); + is_protm_section = true; } if (hdr.va.start == CSF_MCU_SHARED_REGION_START && @@ -610,9 +637,10 @@ static int panthor_fw_load_section_entry(struct panthor_device *ptdev, vm_map_flags |= DRM_PANTHOR_VM_BIND_OP_MAP_UNCACHED; section->mem = panthor_kernel_bo_create(ptdev, panthor_fw_vm(ptdev), - section_size, - DRM_PANTHOR_BO_NO_MMAP, - vm_map_flags, va); + section_size, + DRM_PANTHOR_BO_NO_MMAP, + (is_protm_section ? DRM_PANTHOR_KBO_PROTECTED_HEAP : 0), + vm_map_flags, va); if (IS_ERR(section->mem)) return PTR_ERR(section->mem); diff --git a/drivers/gpu/drm/panthor/panthor_fw.h b/drivers/gpu/drm/panthor/panthor_fw.h index 22448abde992..29042d0dc60c 100644 --- a/drivers/gpu/drm/panthor/panthor_fw.h +++ b/drivers/gpu/drm/panthor/panthor_fw.h @@ -481,6 +481,8 @@ panthor_fw_alloc_queue_iface_mem(struct panthor_device *ptdev, u32 *input_fw_va, u32 *output_fw_va); struct panthor_kernel_bo * panthor_fw_alloc_suspend_buf_mem(struct panthor_device *ptdev, size_t size); +struct panthor_kernel_bo * +panthor_fw_alloc_protm_suspend_buf_mem(struct panthor_device *ptdev, size_t size); struct panthor_vm *panthor_fw_vm(struct panthor_device *ptdev); diff --git a/drivers/gpu/drm/panthor/panthor_gem.c b/drivers/gpu/drm/panthor/panthor_gem.c index 8244a4e6c2a2..88caf928acd0 100644 --- a/drivers/gpu/drm/panthor/panthor_gem.c +++ b/drivers/gpu/drm/panthor/panthor_gem.c @@ -9,10 +9,14 @@ #include +#include + #include "panthor_device.h" #include "panthor_gem.h" #include "panthor_mmu.h" +MODULE_IMPORT_NS(DMA_BUF); + static void panthor_gem_free_object(struct drm_gem_object *obj) { struct panthor_gem_object *bo = to_panthor_bo(obj); @@ -31,6 +35,7 @@ static void panthor_gem_free_object(struct drm_gem_object *obj) */ void panthor_kernel_bo_destroy(struct panthor_kernel_bo *bo) { + struct dma_buf *dma_bo = NULL; struct panthor_vm *vm; int ret; @@ -38,6 +43,10 @@ void panthor_kernel_bo_destroy(struct panthor_kernel_bo *bo) return; vm = bo->vm; + + if (bo->flags & DRM_PANTHOR_KBO_PROTECTED_HEAP) + dma_bo = bo->obj->import_attach->dmabuf; + panthor_kernel_bo_vunmap(bo); if (drm_WARN_ON(bo->obj->dev, @@ -51,6 +60,9 @@ void panthor_kernel_bo_destroy(struct panthor_kernel_bo *bo) panthor_vm_free_va(vm, &bo->va_node); drm_gem_object_put(bo->obj); + if (dma_bo) + dma_buf_put(dma_bo); + out_free_bo: panthor_vm_put(vm); kfree(bo); @@ -62,6 +74,7 @@ void panthor_kernel_bo_destroy(struct panthor_kernel_bo *bo) * @vm: VM to map the GEM to. If NULL, the kernel object is not GPU mapped. * @size: Size of the buffer object. * @bo_flags: Combination of drm_panthor_bo_flags flags. + * @kbo_flags: Combination of drm_panthor_kbo_flags flags. * @vm_map_flags: Combination of drm_panthor_vm_bind_op_flags (only those * that are related to map operations). * @gpu_va: GPU address assigned when mapping to the VM. @@ -72,9 +85,11 @@ void panthor_kernel_bo_destroy(struct panthor_kernel_bo *bo) */ struct panthor_kernel_bo * panthor_kernel_bo_create(struct panthor_device *ptdev, struct panthor_vm *vm, - size_t size, u32 bo_flags, u32 vm_map_flags, + size_t size, u32 bo_flags, u32 kbo_flags, u32 vm_map_flags, u64 gpu_va) { + struct dma_buf *dma_bo = NULL; + struct drm_gem_object *gem_obj = NULL; struct drm_gem_shmem_object *obj; struct panthor_kernel_bo *kbo; struct panthor_gem_object *bo; @@ -87,14 +102,38 @@ panthor_kernel_bo_create(struct panthor_device *ptdev, struct panthor_vm *vm, if (!kbo) return ERR_PTR(-ENOMEM); - obj = drm_gem_shmem_create(&ptdev->base, size); + if (kbo_flags & DRM_PANTHOR_KBO_PROTECTED_HEAP) { + if (!ptdev->protm.heap) { + ret = -EINVAL; + goto err_free_bo; + } + + dma_bo = dma_heap_buffer_alloc(ptdev->protm.heap, size, + DMA_HEAP_VALID_FD_FLAGS, DMA_HEAP_VALID_HEAP_FLAGS); + if (!dma_bo) { + ret = -ENOMEM; + goto err_free_bo; + } + + gem_obj = drm_gem_prime_import(&ptdev->base, dma_bo); + if (IS_ERR(gem_obj)) { + ret = PTR_ERR(gem_obj); + goto err_free_dma_bo; + } + + obj = to_drm_gem_shmem_obj(gem_obj); + } else { + obj = drm_gem_shmem_create(&ptdev->base, size); + } + if (IS_ERR(obj)) { ret = PTR_ERR(obj); - goto err_free_bo; + goto err_free_dma_bo; } bo = to_panthor_bo(&obj->base); kbo->obj = &obj->base; + kbo->flags = kbo_flags; bo->flags = bo_flags; /* The system and GPU MMU page size might differ, which becomes a @@ -124,6 +163,10 @@ panthor_kernel_bo_create(struct panthor_device *ptdev, struct panthor_vm *vm, err_put_obj: drm_gem_object_put(&obj->base); +err_free_dma_bo: + if (dma_bo) + dma_buf_put(dma_bo); + err_free_bo: kfree(kbo); return ERR_PTR(ret); diff --git a/drivers/gpu/drm/panthor/panthor_gem.h b/drivers/gpu/drm/panthor/panthor_gem.h index e43021cf6d45..d4fe8ae9f0a8 100644 --- a/drivers/gpu/drm/panthor/panthor_gem.h +++ b/drivers/gpu/drm/panthor/panthor_gem.h @@ -13,6 +13,17 @@ struct panthor_vm; +/** + * enum drm_panthor_kbo_flags - Kernel buffer object flags, passed at creation time + */ +enum drm_panthor_kbo_flags { + /** + * @DRM_PANTHOR_KBO_PROTECTED_HEAP: The buffer object will be allocated + * from a DMA-Buf protected heap. + */ + DRM_PANTHOR_KBO_PROTECTED_HEAP = (1 << 0), +}; + /** * struct panthor_gem_object - Driver specific GEM object. */ @@ -75,6 +86,9 @@ struct panthor_kernel_bo { * @kmap: Kernel CPU mapping of @gem. */ void *kmap; + + /** @flags: Combination of drm_panthor_kbo_flags flags. */ + u32 flags; }; static inline @@ -138,7 +152,7 @@ panthor_kernel_bo_vunmap(struct panthor_kernel_bo *bo) struct panthor_kernel_bo * panthor_kernel_bo_create(struct panthor_device *ptdev, struct panthor_vm *vm, - size_t size, u32 bo_flags, u32 vm_map_flags, + size_t size, u32 bo_flags, u32 kbo_flags, u32 vm_map_flags, u64 gpu_va); void panthor_kernel_bo_destroy(struct panthor_kernel_bo *bo); diff --git a/drivers/gpu/drm/panthor/panthor_heap.c b/drivers/gpu/drm/panthor/panthor_heap.c index 3796a9eb22af..5395f0d90360 100644 --- a/drivers/gpu/drm/panthor/panthor_heap.c +++ b/drivers/gpu/drm/panthor/panthor_heap.c @@ -146,6 +146,7 @@ static int panthor_alloc_heap_chunk(struct panthor_device *ptdev, chunk->bo = panthor_kernel_bo_create(ptdev, vm, heap->chunk_size, DRM_PANTHOR_BO_NO_MMAP, + 0, DRM_PANTHOR_VM_BIND_OP_MAP_NOEXEC, PANTHOR_VM_KERNEL_AUTO_VA); if (IS_ERR(chunk->bo)) { @@ -549,6 +550,7 @@ panthor_heap_pool_create(struct panthor_device *ptdev, struct panthor_vm *vm) pool->gpu_contexts = panthor_kernel_bo_create(ptdev, vm, bosize, DRM_PANTHOR_BO_NO_MMAP, + 0, DRM_PANTHOR_VM_BIND_OP_MAP_NOEXEC, PANTHOR_VM_KERNEL_AUTO_VA); if (IS_ERR(pool->gpu_contexts)) { diff --git a/drivers/gpu/drm/panthor/panthor_sched.c b/drivers/gpu/drm/panthor/panthor_sched.c index ef4bec7ff9c7..e260ed8aef5b 100644 --- a/drivers/gpu/drm/panthor/panthor_sched.c +++ b/drivers/gpu/drm/panthor/panthor_sched.c @@ -3298,6 +3298,7 @@ group_create_queue(struct panthor_group *group, queue->ringbuf = panthor_kernel_bo_create(group->ptdev, group->vm, args->ringbuf_size, DRM_PANTHOR_BO_NO_MMAP, + 0, DRM_PANTHOR_VM_BIND_OP_MAP_NOEXEC | DRM_PANTHOR_VM_BIND_OP_MAP_UNCACHED, PANTHOR_VM_KERNEL_AUTO_VA); @@ -3328,6 +3329,7 @@ group_create_queue(struct panthor_group *group, queue->profiling.slot_count * sizeof(struct panthor_job_profiling_data), DRM_PANTHOR_BO_NO_MMAP, + 0, DRM_PANTHOR_VM_BIND_OP_MAP_NOEXEC | DRM_PANTHOR_VM_BIND_OP_MAP_UNCACHED, PANTHOR_VM_KERNEL_AUTO_VA); @@ -3435,7 +3437,7 @@ int panthor_group_create(struct panthor_file *pfile, } suspend_size = csg_iface->control->protm_suspend_size; - group->protm_suspend_buf = panthor_fw_alloc_suspend_buf_mem(ptdev, suspend_size); + group->protm_suspend_buf = panthor_fw_alloc_protm_suspend_buf_mem(ptdev, suspend_size); if (IS_ERR(group->protm_suspend_buf)) { ret = PTR_ERR(group->protm_suspend_buf); group->protm_suspend_buf = NULL; @@ -3446,6 +3448,7 @@ int panthor_group_create(struct panthor_file *pfile, group_args->queues.count * sizeof(struct panthor_syncobj_64b), DRM_PANTHOR_BO_NO_MMAP, + 0, DRM_PANTHOR_VM_BIND_OP_MAP_NOEXEC | DRM_PANTHOR_VM_BIND_OP_MAP_UNCACHED, PANTHOR_VM_KERNEL_AUTO_VA); From patchwork Thu Jan 30 13:09:01 2025 Content-Type: text/plain; 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X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org This patch modifies the Panthor driver code to allow handling of the GPU HW protected mode enter and exit. The logic added by this patch only includes the mechanisms needed for entering and exiting protected mode. The submission of a protected mode jobs is not covered by this patch series and is responsibility of the user space program. To help with the review, here are some important information about Mali GPU protected mode enter and exit: - When the GPU detects a protected mode job needs to be executed, an IRQ is sent to the CPU to notify the kernel driver that the job is blocked until the GPU has entered protected mode. The entering of protected mode is controlled by the kernel driver. - The Mali Panthor CSF driver will schedule a tick and evaluate which CS in the CSG to schedule on slot needs protected mode. If the priority of the CSG is not sufficiently high, the protected mode job will not progress until the CSG is scheduled at top priority. - The Panthor scheduler notifies the GPU that the blocked protected jobs will soon be able to progress. - Once all CSG and CS slots are updated, the scheduler requests the GPU to enter protected mode and waits for it to be acknowledged. - If successful, all protected mode jobs will resume execution while normal mode jobs block until the GPU exits protected mode, or the kernel driver rotates the CSGs and forces the GPU to exit protected mode. - If unsuccessful, the scheduler will request a GPU reset. - When a protected mode job is suspended as a result of the CSGs rotation, the GPU will send an IRQ to the CPU to notify that the protected mode job needs to resume. This sequence will continue so long the user space is submitting protected mode jobs. Signed-off-by: Florent Tomasin --- drivers/gpu/drm/panthor/panthor_device.h | 3 + drivers/gpu/drm/panthor/panthor_fw.c | 10 +- drivers/gpu/drm/panthor/panthor_sched.c | 119 +++++++++++++++++++++-- 3 files changed, 122 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/panthor/panthor_device.h b/drivers/gpu/drm/panthor/panthor_device.h index 406de9e888e2..0c76bfd392a0 100644 --- a/drivers/gpu/drm/panthor/panthor_device.h +++ b/drivers/gpu/drm/panthor/panthor_device.h @@ -196,6 +196,9 @@ struct panthor_device { struct { /** @heap: Pointer to the protected heap */ struct dma_heap *heap; + + /** @pending: Set to true if a protected mode enter request is pending. */ + bool pending; } protm; }; diff --git a/drivers/gpu/drm/panthor/panthor_fw.c b/drivers/gpu/drm/panthor/panthor_fw.c index 7822af1533b4..2006d652f4db 100644 --- a/drivers/gpu/drm/panthor/panthor_fw.c +++ b/drivers/gpu/drm/panthor/panthor_fw.c @@ -1025,13 +1025,19 @@ static void panthor_fw_init_global_iface(struct panthor_device *ptdev) glb_iface->input->progress_timer = PROGRESS_TIMEOUT_CYCLES >> PROGRESS_TIMEOUT_SCALE_SHIFT; glb_iface->input->idle_timer = panthor_fw_conv_timeout(ptdev, IDLE_HYSTERESIS_US); - /* Enable interrupts we care about. */ + /* Enable interrupts we care about. + * + * GLB_PROTM_ENTER and GLB_PROTM_EXIT interrupts are only + * relevant if a protected memory heap is present. + */ glb_iface->input->ack_irq_mask = GLB_CFG_ALLOC_EN | GLB_PING | GLB_CFG_PROGRESS_TIMER | GLB_CFG_POWEROFF_TIMER | GLB_IDLE_EN | - GLB_IDLE; + GLB_IDLE | + (ptdev->protm.heap ? + (GLB_PROTM_ENTER | GLB_PROTM_EXIT) : 0); panthor_fw_update_reqs(glb_iface, req, GLB_IDLE_EN, GLB_IDLE_EN); panthor_fw_toggle_reqs(glb_iface, req, ack, diff --git a/drivers/gpu/drm/panthor/panthor_sched.c b/drivers/gpu/drm/panthor/panthor_sched.c index e260ed8aef5b..c10a21f9d075 100644 --- a/drivers/gpu/drm/panthor/panthor_sched.c +++ b/drivers/gpu/drm/panthor/panthor_sched.c @@ -573,6 +573,9 @@ struct panthor_group { /** @fatal_queues: Bitmask reflecting the queues that hit a fatal exception. */ u32 fatal_queues; + /** @protm_queues: Bitmask reflecting the queues that are waiting on a CS_PROTM_PENDING. */ + u32 protm_queues; + /** @tiler_oom: Mask of queues that have a tiler OOM event to process. */ atomic_t tiler_oom; @@ -870,6 +873,31 @@ panthor_queue_get_syncwait_obj(struct panthor_group *group, struct panthor_queue return NULL; } +static int glb_protm_enter(struct panthor_device *ptdev) +{ + struct panthor_fw_global_iface *glb_iface; + u32 acked; + int ret; + + lockdep_assert_held(&ptdev->scheduler->lock); + + if (!ptdev->protm.pending) + return 0; + + glb_iface = panthor_fw_get_glb_iface(ptdev); + + panthor_fw_toggle_reqs(glb_iface, req, ack, GLB_PROTM_ENTER); + gpu_write(ptdev, CSF_DOORBELL(CSF_GLB_DOORBELL_ID), 1); + + ret = panthor_fw_glb_wait_acks(ptdev, GLB_PROTM_ENTER, &acked, 4000); + if (ret) + drm_err(&ptdev->base, "FW protm enter timeout, scheduling a reset"); + else + ptdev->protm.pending = false; + + return ret; +} + static void group_free_queue(struct panthor_group *group, struct panthor_queue *queue) { if (IS_ERR_OR_NULL(queue)) @@ -1027,6 +1055,7 @@ group_unbind_locked(struct panthor_group *group) * @ptdev: Device. * @csg_id: Group slot ID. * @cs_id: Queue slot ID. + * @protm_ack: Acknowledge pending protected mode queues * * Program a queue slot with the queue information so things can start being * executed on this queue. @@ -1034,10 +1063,13 @@ group_unbind_locked(struct panthor_group *group) * The group slot must have a group bound to it already (group_bind_locked()). */ static void -cs_slot_prog_locked(struct panthor_device *ptdev, u32 csg_id, u32 cs_id) +cs_slot_prog_locked(struct panthor_device *ptdev, u32 csg_id, u32 cs_id, bool protm_ack) { - struct panthor_queue *queue = ptdev->scheduler->csg_slots[csg_id].group->queues[cs_id]; + struct panthor_group * const group = ptdev->scheduler->csg_slots[csg_id].group; + struct panthor_queue *queue = group->queues[cs_id]; struct panthor_fw_cs_iface *cs_iface = panthor_fw_get_cs_iface(ptdev, csg_id, cs_id); + u32 const cs_protm_pending_mask = + protm_ack && (group->protm_queues & BIT(cs_id)) ? CS_PROTM_PENDING : 0; lockdep_assert_held(&ptdev->scheduler->lock); @@ -1055,15 +1087,22 @@ cs_slot_prog_locked(struct panthor_device *ptdev, u32 csg_id, u32 cs_id) CS_IDLE_SYNC_WAIT | CS_IDLE_EMPTY | CS_STATE_START | - CS_EXTRACT_EVENT, + CS_EXTRACT_EVENT | + cs_protm_pending_mask, CS_IDLE_SYNC_WAIT | CS_IDLE_EMPTY | CS_STATE_MASK | - CS_EXTRACT_EVENT); + CS_EXTRACT_EVENT | + CS_PROTM_PENDING); if (queue->iface.input->insert != queue->iface.input->extract && queue->timeout_suspended) { drm_sched_resume_timeout(&queue->scheduler, queue->remaining_time); queue->timeout_suspended = false; } + + if (cs_protm_pending_mask) { + group->protm_queues &= ~BIT(cs_id); + ptdev->protm.pending = true; + } } /** @@ -1274,7 +1313,7 @@ csg_slot_sync_state_locked(struct panthor_device *ptdev, u32 csg_id) } static int -csg_slot_prog_locked(struct panthor_device *ptdev, u32 csg_id, u32 priority) +csg_slot_prog_locked(struct panthor_device *ptdev, u32 csg_id, u32 priority, bool protm_ack) { struct panthor_fw_csg_iface *csg_iface; struct panthor_csg_slot *csg_slot; @@ -1291,14 +1330,14 @@ csg_slot_prog_locked(struct panthor_device *ptdev, u32 csg_id, u32 priority) csg_slot = &ptdev->scheduler->csg_slots[csg_id]; group = csg_slot->group; - if (!group || group->state == PANTHOR_CS_GROUP_ACTIVE) + if (!group || (group->state == PANTHOR_CS_GROUP_ACTIVE && !protm_ack)) return 0; csg_iface = panthor_fw_get_csg_iface(group->ptdev, csg_id); for (i = 0; i < group->queue_count; i++) { if (group->queues[i]) { - cs_slot_prog_locked(ptdev, csg_id, i); + cs_slot_prog_locked(ptdev, csg_id, i, protm_ack); queue_mask |= BIT(i); } } @@ -1329,6 +1368,34 @@ csg_slot_prog_locked(struct panthor_device *ptdev, u32 csg_id, u32 priority) return 0; } +static void +cs_slot_process_protm_pending_event_locked(struct panthor_device *ptdev, + u32 csg_id, u32 cs_id) +{ + struct panthor_scheduler *sched = ptdev->scheduler; + struct panthor_csg_slot *csg_slot = &sched->csg_slots[csg_id]; + struct panthor_group *group = csg_slot->group; + + lockdep_assert_held(&sched->lock); + + if (!group) + return; + + /* No protected memory heap, a user space program tried to + * submit a protected mode jobs resulting in the GPU raising + * a CS_PROTM_PENDING request. + * + * This scenario is invalid and the protected mode jobs must + * not be allowed to progress. + */ + if (drm_WARN_ON_ONCE(&ptdev->base, !ptdev->protm.heap)) + return; + + group->protm_queues |= BIT(cs_id); + + sched_queue_delayed_work(sched, tick, 0); +} + static void cs_slot_process_fatal_event_locked(struct panthor_device *ptdev, u32 csg_id, u32 cs_id) @@ -1566,6 +1633,9 @@ static bool cs_slot_process_irq_locked(struct panthor_device *ptdev, if (events & CS_TILER_OOM) cs_slot_process_tiler_oom_event_locked(ptdev, csg_id, cs_id); + if (events & CS_PROTM_PENDING) + cs_slot_process_protm_pending_event_locked(ptdev, csg_id, cs_id); + /* We don't acknowledge the TILER_OOM event since its handling is * deferred to a separate work. */ @@ -1703,6 +1773,17 @@ static void sched_process_idle_event_locked(struct panthor_device *ptdev) sched_queue_delayed_work(ptdev->scheduler, tick, 0); } +static void sched_process_protm_exit_event_locked(struct panthor_device *ptdev) +{ + struct panthor_fw_global_iface *glb_iface = panthor_fw_get_glb_iface(ptdev); + + lockdep_assert_held(&ptdev->scheduler->lock); + + /* Acknowledge the protm exit and schedule a tick. */ + panthor_fw_update_reqs(glb_iface, req, glb_iface->output->ack, GLB_PROTM_EXIT); + sched_queue_delayed_work(ptdev->scheduler, tick, 0); +} + /** * sched_process_global_irq_locked() - Process the scheduling part of a global IRQ * @ptdev: Device. @@ -1720,6 +1801,9 @@ static void sched_process_global_irq_locked(struct panthor_device *ptdev) if (evts & GLB_IDLE) sched_process_idle_event_locked(ptdev); + + if (evts & GLB_PROTM_EXIT) + sched_process_protm_exit_event_locked(ptdev); } static void process_fw_events_work(struct work_struct *work) @@ -2238,9 +2322,22 @@ tick_ctx_apply(struct panthor_scheduler *sched, struct panthor_sched_tick_ctx *c list_for_each_entry(group, &ctx->groups[prio], run_node) { int csg_id = group->csg_id; struct panthor_fw_csg_iface *csg_iface; + bool protm_ack = false; + + /* The highest priority group has pending protected mode queues */ + if (new_csg_prio == MAX_CSG_PRIO && group->protm_queues) + protm_ack = true; if (csg_id >= 0) { new_csg_prio--; + + /* This group is on slot but at least one queue + * is waiting for PROTM_ENTER. + */ + if (protm_ack) + csg_slot_prog_locked(ptdev, csg_id, + new_csg_prio, protm_ack); + continue; } @@ -2251,7 +2348,7 @@ tick_ctx_apply(struct panthor_scheduler *sched, struct panthor_sched_tick_ctx *c csg_iface = panthor_fw_get_csg_iface(ptdev, csg_id); csg_slot = &sched->csg_slots[csg_id]; group_bind_locked(group, csg_id); - csg_slot_prog_locked(ptdev, csg_id, new_csg_prio--); + csg_slot_prog_locked(ptdev, csg_id, new_csg_prio--, protm_ack); csgs_upd_ctx_queue_reqs(ptdev, &upd_ctx, csg_id, group->state == PANTHOR_CS_GROUP_SUSPENDED ? CSG_STATE_RESUME : CSG_STATE_START, @@ -2303,6 +2400,12 @@ tick_ctx_apply(struct panthor_scheduler *sched, struct panthor_sched_tick_ctx *c sched->used_csg_slot_count = ctx->group_count; sched->might_have_idle_groups = ctx->idle_group_count > 0; + + ret = glb_protm_enter(ptdev); + if (ret) { + panthor_device_schedule_reset(ptdev); + ctx->csg_upd_failed_mask = U32_MAX; + } } static u64