From patchwork Thu Jan 30 17:33:41 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Wanner X-Patchwork-Id: 13954796 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 19B1AC0218A for ; Thu, 30 Jan 2025 17:46:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date :Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=C9yzuy/hCu3rHENMmx7FK/Z31G+DGhL7umJKq+lpB3Y=; b=FYA+qVBhpukiP9C+WMOaqTsekN a7mQHCbW/K0sJINDtEaLLJznLHRmfTZA+K/XapTGSyR2tQPlM4fXuOKs9/9RsP1Mr6xGxMYlPsuBp SdNrvPGyMktoJTNfPQ1VF16yVmdVCDrq2Zw95qEnEGwZXA/J6P3LQ3F6zwpag4lUwEsLVjwnE6oRO cPTC0pfEURzw1yvASWgRJpvulXgu5aXAuclAsq+APgWmugJXmZmhhY/NlPE2OFxeDd6sUvXv/+ixS lN/51Y2Tta2VTCNncPXm4ZIUASXmkD7ig/GJGRdFkUuawPuhU6lKZaesDS2pumDsAK4z5cDWdgh5B rZg6pZEg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tdYcV-00000009K3z-0Hbm; Thu, 30 Jan 2025 17:46:27 +0000 Received: from esa.microchip.iphmx.com ([68.232.154.123]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tdYSj-00000009IQp-3Whq for linux-arm-kernel@lists.infradead.org; Thu, 30 Jan 2025 17:36:23 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1738258581; x=1769794581; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=wa8ECnu6CyfdlnXkwmsrBtJZO5peBMV8tGUtH+OXnzI=; b=DNOFYuRNBTfhG6a4YEC9rxi5eMyxd3gXXhbJna69hyORpAYOfuTFLVV+ 25MkBwa6CeCHVXmkUMZyfeG0mpckD4Bt2qBCfEPsPGpnGPw8vG143oWMT gRRQISG8x7cicDrzDgxB0KVsiGRlpOgHmdBw3g6CyaEPeH2sNwrkvDXCJ weoBN2Mbl+jwHyCLha/+S5lyEWbglE+BCYKyEiNZ7SZVeaqjaoFrXadBw gXiraz+lZHYFqKG/MLMmzV8q6WO6VucDcZULfx5zZtUFrz3PAHAVZ/1vt psxpEFPDA/xlfQD2DLMlMct7xsLh0QYm8g7GJK6QyvT+6ixwwGXoG7I7K A==; X-CSE-ConnectionGUID: Qux6TnwtQkq+U6Cg6JCAlA== X-CSE-MsgGUID: lQ+ziQvMTPGAC6ahOBG+6g== X-IronPort-AV: E=Sophos;i="6.13,246,1732604400"; d="scan'208";a="204623005" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 30 Jan 2025 10:36:20 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Thu, 30 Jan 2025 10:35:39 -0700 Received: from ryan-Precision-3630-Tower.microchip.com (10.10.85.11) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Thu, 30 Jan 2025 10:35:39 -0700 From: To: , , , , , , , , , CC: , , , , , Ryan Wanner Subject: [PATCH 01/16] dt-bindings: mfd: syscon: add microchip,sama7d65-ddr3phy Date: Thu, 30 Jan 2025 10:33:41 -0700 Message-ID: <01181325b16c78ac50b8bab3f178b14e8f417892.1738257860.git.Ryan.Wanner@microchip.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250130_093621_940568_E6CBB554 X-CRM114-Status: UNSURE ( 8.22 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Ryan Wanner Add SAMA7D65 DDR3phy compatible to DT bindings documentation Signed-off-by: Ryan Wanner Acked-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/mfd/syscon.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml index b414de4fa779b..54a6d5957e13a 100644 --- a/Documentation/devicetree/bindings/mfd/syscon.yaml +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml @@ -188,6 +188,7 @@ properties: - microchip,lan966x-cpu-syscon - microchip,mpfs-sysreg-scb - microchip,sam9x60-sfr + - microchip,sama7d65-ddr3phy - microchip,sama7g5-ddr3phy - mscc,ocelot-cpu-syscon - mstar,msc313-pmsleep From patchwork Thu Jan 30 17:33:42 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Wanner X-Patchwork-Id: 13954797 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 11166C0218A for ; Thu, 30 Jan 2025 17:47:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date :Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=Nh8RUfBChPGGNFGqwzwHxszo3PrDDcS9YA2zqvmJcZA=; b=S/dX4jQ0LMKN1QOnobnY1nYEoK z+maBZXbjAaNlcCfIM4l+nsruhKnRxKHvNV7fDqAMtTknRHwQ9Hfym3s/RFJkKmLPdLnyRqUWaVB9 Vs+NINvOZzSFmJ1cI54O1TxfBdVnIbX6zV890R5i9tyRjUT9HrZW7qb1odwIJRn9wrOxA2NlbDCQe A2Uz6/vyQEwI80Q1WQDqENaVDcmaRtiUpMIpGnsKjYWOlHRf17ea+PCpLniGV6WYD68RaSuFGwhfy 4Xu0F3+LepMqkPzGowLmbGAqLrPUNSGGUAMYAgFw6zOTXzh/gIDkq6HH89R4A+Ot0PREw9YivQB9J LyRsB92A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tdYdm-00000009KMZ-3IQw; Thu, 30 Jan 2025 17:47:46 +0000 Received: from esa.microchip.iphmx.com ([68.232.154.123]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tdYSk-00000009IQI-0Rq7 for linux-arm-kernel@lists.infradead.org; Thu, 30 Jan 2025 17:36:23 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1738258581; x=1769794581; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=1frEjnWos7xcTbH7EyH3SMbUoW/LsoRaxAhO9WzR9c8=; b=hrWCMsBsFt67sJdk7N9vO64s03s8g8mK4J8/ZHFaWFBJZ4TDJZxK+udu CYm9gUGz5kjPEwivUhcHlyXn9Q4i4GNRxqBb7EBozBKjUEWNqJGvqDEXz /qy9nC4M4BEgH6lvAB3Ymu9nLdikj2u0nUwvPf3hY8b9GNtA1GJOY2OWO h8TXgPH7dCsa+TqhcaqLBMukX6y2iICAH2odURNwvaq19bMZrXq/4UbC0 DSc32BmMR0SFH+SWL9E/AovjvymhmJ8jOwXMLhkL13GCoP8DyU7zT4seK nfEXEwGBUmcL0dPVvrYPlIi3wOGSihj71PuYqCkXzl6+u9w4fraBV9MQS Q==; X-CSE-ConnectionGUID: Qux6TnwtQkq+U6Cg6JCAlA== X-CSE-MsgGUID: UDCpp6ScRyK54LsAtu0LDg== X-IronPort-AV: E=Sophos;i="6.13,246,1732604400"; d="scan'208";a="204623008" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 30 Jan 2025 10:36:20 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Thu, 30 Jan 2025 10:35:40 -0700 Received: from ryan-Precision-3630-Tower.microchip.com (10.10.85.11) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Thu, 30 Jan 2025 10:35:40 -0700 From: To: , , , , , , , , , CC: , , , , , Ryan Wanner Subject: [PATCH 02/16] dt-bindings: mfd: syscon: add microchip,sama7d65-sfrbu Date: Thu, 30 Jan 2025 10:33:42 -0700 Message-ID: X-Mailer: git-send-email 2.43.0 In-Reply-To: References: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250130_093622_233292_13C97D1F X-CRM114-Status: UNSURE ( 8.26 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Ryan Wanner Add SAMA7D65 SFRBU compatible string to DT bindings documentation Signed-off-by: Ryan Wanner --- Documentation/devicetree/bindings/mfd/syscon.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml index 54a6d5957e13a..25c4ed6cbf5d1 100644 --- a/Documentation/devicetree/bindings/mfd/syscon.yaml +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml @@ -90,6 +90,7 @@ select: - microchip,lan966x-cpu-syscon - microchip,mpfs-sysreg-scb - microchip,sam9x60-sfr + - microchip,sama7d65-sfrbu - microchip,sama7g5-ddr3phy - mscc,ocelot-cpu-syscon - mstar,msc313-pmsleep @@ -188,6 +189,7 @@ properties: - microchip,lan966x-cpu-syscon - microchip,mpfs-sysreg-scb - microchip,sam9x60-sfr + - microchip,sama7d65-sfrbu - microchip,sama7d65-ddr3phy - microchip,sama7g5-ddr3phy - mscc,ocelot-cpu-syscon From patchwork Thu Jan 30 17:33:43 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Wanner X-Patchwork-Id: 13954798 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 82D29C0218A for ; Thu, 30 Jan 2025 17:49:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date :Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=/T3EJxOo40vSJsKjdqouwzgYdU1aFdJJZaAU9qjSyLM=; b=ZdK5F22HmjL1I+q/lIph7mHUsE ysfj5xICUpjLEGRMrcMLm8Rcn7FeN1+xO+fPNxgm5HW1WoJ56ExrZP+YP8fcva2TQRYbzSmaGuar0 nklcZysyR+lk9q2ZNbH0FlXOxU/E6b+R8jPCV1ZNsw3tg/Lu0eZA1UmdtXHYbCkUHfsz/+tsqV/I0 sr34EUCH+UvHNT+/kUB+LBEviihyxHP5f8LfaU+Hmy5VCiavgJ9DcV/z3tSVzZB3jEDp7I2498Qej 1N3wR741lplj9PcpUn8bKWfVu6q6sxsKG8fgikAitm2mCllKcCh9/Nis8QoDwKuOyecxYte/yWEz4 zTWqa1Fg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tdYf4-00000009KUn-1qqV; Thu, 30 Jan 2025 17:49:06 +0000 Received: from esa.microchip.iphmx.com ([68.232.154.123]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tdYSl-00000009IRQ-0EzE for linux-arm-kernel@lists.infradead.org; Thu, 30 Jan 2025 17:36:24 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1738258582; x=1769794582; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Fb436NRz70oTKLq9Kkjdb0oIgB7HP4oP2RLulPS2VjY=; b=WEGc92IByZaWa4ZeUw5w/i5GB7Z7+DO8ix5V+7sVQ+/gy+xPeoMPkn/j TlZZBrSohxTTkBg+ZRcexRhpDB4MI/E+LjxYqnQb01hkmg9uqNzvoCO6/ /WK3ExZ9QhR8ifx9MsmDxsy6Tu+KtNywcKSxxoZyFAe9xkSYjslOAqw2R W36VU8BfYxzxc4yD3aokFQ0hhN/OYHnVC05afw9yOtUsiE51bU9YzjEiF 5JQu8lkwfGoXGPzwWrkLxYAIADgGQcf1oeenyXodkbQg5VQbJhVJH1XhW LYs0Jsjt9D9EC1s2xBxgSVHKrrl/leGH0MD1I/f1/zdUibV62Foc33Ie5 A==; X-CSE-ConnectionGUID: Qux6TnwtQkq+U6Cg6JCAlA== X-CSE-MsgGUID: KP0hDFVcTWu/DvrDoSnASQ== X-IronPort-AV: E=Sophos;i="6.13,246,1732604400"; d="scan'208";a="204623009" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 30 Jan 2025 10:36:20 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Thu, 30 Jan 2025 10:35:40 -0700 Received: from ryan-Precision-3630-Tower.microchip.com (10.10.85.11) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Thu, 30 Jan 2025 10:35:40 -0700 From: To: , , , , , , , , , CC: , , , , , Ryan Wanner Subject: [PATCH 03/16] dt-bindings: sram: Add microchip,sama7d65-sram Date: Thu, 30 Jan 2025 10:33:43 -0700 Message-ID: X-Mailer: git-send-email 2.43.0 In-Reply-To: References: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250130_093623_161457_C3F27586 X-CRM114-Status: UNSURE ( 8.33 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Ryan Wanner Add microchip,sama7d65-sram compatibility to DT binding documentation. Signed-off-by: Ryan Wanner Acked-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/sram/sram.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/sram/sram.yaml b/Documentation/devicetree/bindings/sram/sram.yaml index 7c1337e159f23..3071c5075ee48 100644 --- a/Documentation/devicetree/bindings/sram/sram.yaml +++ b/Documentation/devicetree/bindings/sram/sram.yaml @@ -31,6 +31,7 @@ properties: - amlogic,meson-gxbb-sram - arm,juno-sram-ns - atmel,sama5d2-securam + - microchip,sama7d65-securam - nvidia,tegra186-sysram - nvidia,tegra194-sysram - nvidia,tegra234-sysram From patchwork Thu Jan 30 17:33:44 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Wanner X-Patchwork-Id: 13954799 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9D0BAC0218A for ; Thu, 30 Jan 2025 17:50:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date :Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=I+37bzBrtUpMoGDkZ00gvL9v000U8PXgaqxle5ulUp8=; b=Mml2GUYCRHkeNFcj7agZR4h/Vq SwtDKjH31NZE50LZAjqSYl56eDbSFzR3sUvVNaROTD/MFqhWKTbMOWtvtZaqU0RhBZBjaLHSQwaCV slLoJtXyq3BryTVGMvnl4BYRU6ug4PgOtYzLVYOUMJiiOn63a+AKCV+mlmtyDM8ITBkja/friJ57h q5lvmpa2fQowuqKDkwyuLYy0NVWHrgMGG3/gIMuSnIvabg5I/l4F8i19dha5mDkyaXS8J5n0++aH4 sWYKvO+hcl67DrGDLTlXOLv0ZjD56whlw9QWwbYOb+qPzYT8OPjcmfNJLQ3tkq53o/qG6cl/kD25q mjQa+xbg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tdYgL-00000009KhD-0MjZ; Thu, 30 Jan 2025 17:50:25 +0000 Received: from esa.microchip.iphmx.com ([68.232.154.123]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tdYSl-00000009IQp-0SZK for linux-arm-kernel@lists.infradead.org; Thu, 30 Jan 2025 17:36:24 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1738258582; x=1769794582; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Am8+kfWotqu7Acfv6hJmfZCzvd6QfUg8B6QOZ3v8VVw=; b=JeEGx5yzu0NroANit+kdncoUPhdjmT16WgUdPZNgn6JbVD8U6q83vFdO WCZ9fs66tX+/9i1b+9jrFFZpoEPKdllXkpsswZuW8gKUU3ubn238GGGJ1 xMtGIRXym1GNZYpgZ1a/dyJMnDK9cft2Utoe0FXMUlfu23rqsvivIcIOw PsAYr4Fd8yDKItLsCUWSjcrZt2QziZyVdmC8kMTaWdujwm6kTunKC83ke Obk2TR+wA+SEAU2XG6Y8N0NhYsJ2yj7JVw2HJPrZ8OCZ9BcrtGq7ppNdj txCJ3zzBXAQC8wOUzW6sXbVdmOy+qxI3PQaofcRm3KKWM3UudDjSZCSIs w==; X-CSE-ConnectionGUID: Qux6TnwtQkq+U6Cg6JCAlA== X-CSE-MsgGUID: D+sBAwjISlak44ASGKVX5A== X-IronPort-AV: E=Sophos;i="6.13,246,1732604400"; d="scan'208";a="204623010" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 30 Jan 2025 10:36:21 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Thu, 30 Jan 2025 10:35:40 -0700 Received: from ryan-Precision-3630-Tower.microchip.com (10.10.85.11) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Thu, 30 Jan 2025 10:35:40 -0700 From: To: , , , , , , , , , CC: , , , , , Ryan Wanner Subject: [PATCH 04/16] dt-bindings: power: reset: atmel,sama5d2-shdwc: Add microchip,sama7d65-shdwc Date: Thu, 30 Jan 2025 10:33:44 -0700 Message-ID: <1e04bd9b667d2831be3c7f6dc6f3d23f07a7d8e6.1738257860.git.Ryan.Wanner@microchip.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250130_093623_225709_91B61287 X-CRM114-Status: UNSURE ( 8.28 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Ryan Wanner Add SAMA7D65 SHDWC compatible to DT bindings documentation Signed-off-by: Ryan Wanner Acked-by: Rob Herring (Arm) --- .../devicetree/bindings/power/reset/atmel,sama5d2-shdwc.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/power/reset/atmel,sama5d2-shdwc.yaml b/Documentation/devicetree/bindings/power/reset/atmel,sama5d2-shdwc.yaml index 8c58e12cdb600..2930607480ea2 100644 --- a/Documentation/devicetree/bindings/power/reset/atmel,sama5d2-shdwc.yaml +++ b/Documentation/devicetree/bindings/power/reset/atmel,sama5d2-shdwc.yaml @@ -16,6 +16,11 @@ description: | properties: compatible: oneOf: + - items: + - enum: + - microchip,sama7d65-shdwc + - const: microchip,sama7g5-shdwc + - const: syscon - items: - const: microchip,sama7g5-shdwc - const: syscon From patchwork Thu Jan 30 17:33:45 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Wanner X-Patchwork-Id: 13954800 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B110EC0218A for ; Thu, 30 Jan 2025 17:51:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date :Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=1LeFWsQrrTsOfnlxLPug19wunqKR/mTFriwKw2qniS0=; b=DIgO4eoP0AI+9PxMKBRYIvEK9I d/PqSuz+tjB2PgkHjESShC2kntZtux9LS7a+4B2ZYH+iFXqoGQlY8XDa9wXKOdpPfT6YD7rQU9+s6 81lUFSltcPj7PVAt4EAQVXNrAoWoyPBj4u8Sl9DcLYu+k+KbWayw8jn4CA22UFtTEYhseCfCRLTbE v7wfqmXzVlnORTqvuJ5r4RaC9DshJLsVP426oRU7i6zh6LQ6Hp7cCMFnbeyAHkeRcXzauDFzDhWMD aWdF7FoKg2n45649QuWj0V4ABOXharIaN9j8oXkNe6QQWN4YQNoxU/sg97qgkk2+kn3Yv/rskyKz1 xzMEKCkA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tdYhc-00000009Knb-3As4; Thu, 30 Jan 2025 17:51:44 +0000 Received: from esa.microchip.iphmx.com ([68.232.154.123]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tdYSl-00000009IQI-1hTc for linux-arm-kernel@lists.infradead.org; Thu, 30 Jan 2025 17:36:25 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1738258583; x=1769794583; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=+iUScvpZ7YkCRssh6lzoVEeH/EksnEiE7G6D1yHSHRI=; b=BcCvBdDYqW3uyJds9aQVt8+aC9BH35U4P4aFIHX21gH1dsEbVSSf2rJw refRPJcfxTUTS6ioNx2pa/r8eOnwRwnfDJNEvyuz52OFLkaIxhCcTHe0C hTFX9urVo27MfIls0n/dWNHXwM7j2oU8KlWeH3n3asngM6QBfHxg1+6XP bBvlwtee+UfFWBDdB+Up7ej0siAgEnKRZjnvEoN4rIGB/bW+2Fm7Ayejm u9WpfBFSB/VmsqKxv/Vv3o8porrnxUv2fTgUanezT7WFYuJray/n6EcqP WxAMmuUTkwLwlK6/YhESy/gqhzwBdBGHWckcm5O1O2eHFvrIEASFJIDbB Q==; X-CSE-ConnectionGUID: Qux6TnwtQkq+U6Cg6JCAlA== X-CSE-MsgGUID: 3YdoWKTPTdWqkkI7huaAyw== X-IronPort-AV: E=Sophos;i="6.13,246,1732604400"; d="scan'208";a="204623011" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 30 Jan 2025 10:36:21 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Thu, 30 Jan 2025 10:35:40 -0700 Received: from ryan-Precision-3630-Tower.microchip.com (10.10.85.11) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Thu, 30 Jan 2025 10:35:40 -0700 From: To: , , , , , , , , , CC: , , , , , Ryan Wanner Subject: [PATCH 05/16] dt-bindings: reset: atmel,at91sam9260-reset: add microchip,sama7d65-rstc Date: Thu, 30 Jan 2025 10:33:45 -0700 Message-ID: <2350540fd22b181875d3cce272fba87fff924670.1738257860.git.Ryan.Wanner@microchip.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250130_093623_501497_E8C728C5 X-CRM114-Status: UNSURE ( 8.95 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Ryan Wanner Add SAMA7D65 RSTC compatible to DT bindings documentation. The sama7g54-rstc is compatible with the sama7g5-rstc. Signed-off-by: Ryan Wanner --- .../devicetree/bindings/reset/atmel,at91sam9260-reset.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/reset/atmel,at91sam9260-reset.yaml b/Documentation/devicetree/bindings/reset/atmel,at91sam9260-reset.yaml index 98465d26949ee..a1c21c3880f9d 100644 --- a/Documentation/devicetree/bindings/reset/atmel,at91sam9260-reset.yaml +++ b/Documentation/devicetree/bindings/reset/atmel,at91sam9260-reset.yaml @@ -23,6 +23,11 @@ properties: - atmel,sama5d3-rstc - microchip,sam9x60-rstc - microchip,sama7g5-rstc + + - items: + - const: microchip,sama7d65-rstc + - const: microchip,sama7g5-rstc + - items: - const: atmel,sama5d3-rstc - const: atmel,at91sam9g45-rstc From patchwork Thu Jan 30 17:33:46 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Wanner X-Patchwork-Id: 13954801 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 989EFC0218A for ; Thu, 30 Jan 2025 17:53:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date :Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=qHbXfzz2zwzPtXd5Pzch6fIhxiib+E5eo23BfRxXJnE=; b=v6ahv+wf+Ynxu0xhCwR+vGpk/t 10e9HPZVzO/BrP5qvBz5V0zKgrMetMalZp3e91Tp/TM65LOQNIt9jqTcXzghdHQp39tVDAU/zeOqd wiAHJMSQS5AnokYdSjjEWikN06g+2wlXcVyUvs2uWweaPQfyhpPC1cSS/QcBFFNr1g76Oh0B/o8H0 dg8KemKUtxtfESaudxz9Bexc7txqmhg2093krFHRHE7S2lQuRokxNuEe7j7B9QAGhKjji9+9Em8hw 2i4vH8hynSTC26LL4pm6O62xATH7aJfZeKUPDY2+CqNECftnZBQUxQi6QIClj2dQlinX9Mne9kWXq Gz2oalRA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tdYiu-00000009KtR-1wu4; Thu, 30 Jan 2025 17:53:04 +0000 Received: from esa.microchip.iphmx.com ([68.232.154.123]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tdYSm-00000009IRQ-1HB6 for linux-arm-kernel@lists.infradead.org; Thu, 30 Jan 2025 17:36:25 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1738258584; x=1769794584; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=zrbbMTlcUWrm93EkCQYP4a8+4Ji/9a+FhVO9sECvsBQ=; b=MqUKuyI0JSiifVcQEsRBkYRJ98fAgaKSIRwXkmKs4l4AS1/kQjFVJzpu eQZPgdfG0ZZNufE2bcizlKMx9bTk0uTX92ljj/XKxGGFhN1j+0dEl0hKz Uh/18M67/FqCPbPgxdoSnJDSdB4ZD0RGHwgSh7pR9bJYq0O7HtKNAuVGT qmGdevmULCE7wVjNYYZSPnVQg7nNt83FZ0m9jcCpggM01uf+Mmepb2fJ1 6jIRhZe+XDkW/8T9GYvBA+cJ6HuE/NWOuI13g0aWLCGA9KCPM8l67qGv5 tIH27No/B3L8URb/ZVfxRtAoxZlZbh9fa0sk3+x25JDYPKyxPHhKyDceC A==; X-CSE-ConnectionGUID: Qux6TnwtQkq+U6Cg6JCAlA== X-CSE-MsgGUID: 8djFspQTSKygg97mneOtTg== X-IronPort-AV: E=Sophos;i="6.13,246,1732604400"; d="scan'208";a="204623013" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 30 Jan 2025 10:36:21 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Thu, 30 Jan 2025 10:35:40 -0700 Received: from ryan-Precision-3630-Tower.microchip.com (10.10.85.11) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Thu, 30 Jan 2025 10:35:40 -0700 From: To: , , , , , , , , , CC: , , , , , Ryan Wanner Subject: [PATCH 06/16] dt-bindings: rtc: at91rm9200: Reorganize compatible items Date: Thu, 30 Jan 2025 10:33:46 -0700 Message-ID: <2846391c5ffab332ad7a4b65aa60aac9c49a3496.1738257860.git.Ryan.Wanner@microchip.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250130_093624_410968_7BF04BF0 X-CRM114-Status: GOOD ( 10.03 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Ryan Wanner Reorganize compatible to allow more devices to be added to this enum. Signed-off-by: Ryan Wanner --- .../devicetree/bindings/rtc/atmel,at91rm9200-rtc.yaml | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/rtc/atmel,at91rm9200-rtc.yaml b/Documentation/devicetree/bindings/rtc/atmel,at91rm9200-rtc.yaml index c8bb2eef442dd..30d87b74c51dc 100644 --- a/Documentation/devicetree/bindings/rtc/atmel,at91rm9200-rtc.yaml +++ b/Documentation/devicetree/bindings/rtc/atmel,at91rm9200-rtc.yaml @@ -21,9 +21,10 @@ properties: - atmel,sama5d4-rtc - atmel,sama5d2-rtc - microchip,sam9x60-rtc - - microchip,sama7g5-rtc - items: - - const: microchip,sam9x7-rtc + - enum: + - microchip,sama7g5-rtc + - microchip,sam9x7-rtc - const: microchip,sam9x60-rtc reg: From patchwork Thu Jan 30 17:33:47 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Wanner X-Patchwork-Id: 13954802 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 881BDC0218A for ; Thu, 30 Jan 2025 17:54:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date :Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=VhmpIhkytK6+xTrURLCxLIGuAspjIcXpTwbw0+o1Ok4=; b=yvP0pFrxylt93zfXtToMsPIhCx Vg4A/NDOjnCcCVLXmZwfZvqAjp/9UDUzb3JShxSX8X/TrECKDd80NJBUUKPyi+Njj8EjJQwUscxhn dsgdK1vITS02sykuud3yq9We9Acu2oIlQAMby9/qqVgkzg769lMkzy58tC3C6CnXmCzQ82ZtSvF7e LB8k3Qq7bnnwe8vJLVWSGIRuzZp/Vfe975kaqvIhEHtJJM6oBA8eb8ipfiup23/ZvZLhyzHFND2I/ l4K3hqGIReT4BFz2TjBq/WS8m9Bamo8czaxFMsESY7V9yFu5VQfh5xcX9hdT6ZnNb9GSPqzEOGQ8K TQADHPdw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tdYkB-00000009L1z-0L9T; Thu, 30 Jan 2025 17:54:23 +0000 Received: from esa.microchip.iphmx.com ([68.232.154.123]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tdYSm-00000009IQp-2475 for linux-arm-kernel@lists.infradead.org; Thu, 30 Jan 2025 17:36:25 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1738258584; x=1769794584; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=3DIUaseaLPdLuHuizOpT4HlTIidRdrZDDni3saHEVio=; b=EuVGkgMNADkfXLhLQqTgG1MOCAHMb59Fv5GflKUc8/yhXbTPtH4Wuyym RLb/V9U7+QfbXh6figKi3GeHWHxUkEjg/t89046BKw99JCyjQTQsKvPT2 yzHrfOqE25atr05GJjmHZzVUUPgmGJ9Pk2NqkG+HY6mogmiM1iR/Qm9hE jEpINE6nnAEOfzLdupMsfKEPa/4qRUbgwlSjiOIuKASHKSegQfpb6VqMQ CjqgMuvSARpc9R/E9GACMYxb3POCA7FSNXjQ/OtQbH4AREQg4HPGTz/L/ 9s+haH31JZnF43hWgAN3sctWoQ8PGMdldt6jkqqtyaHT5QlB6e0WVXiP7 Q==; X-CSE-ConnectionGUID: Qux6TnwtQkq+U6Cg6JCAlA== X-CSE-MsgGUID: EcLVourmTqyK7csd0aL7tA== X-IronPort-AV: E=Sophos;i="6.13,246,1732604400"; d="scan'208";a="204623014" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 30 Jan 2025 10:36:22 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Thu, 30 Jan 2025 10:35:40 -0700 Received: from ryan-Precision-3630-Tower.microchip.com (10.10.85.11) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Thu, 30 Jan 2025 10:35:40 -0700 From: To: , , , , , , , , , CC: , , , , , Ryan Wanner Subject: [PATCH 07/16] dt-bindings: rtc: at91rm9200: add microchip,sama7d65-rtc Date: Thu, 30 Jan 2025 10:33:47 -0700 Message-ID: <18618f9afd74be84d446608257c37d7bc8271ff8.1738257860.git.Ryan.Wanner@microchip.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250130_093624_601048_95206D22 X-CRM114-Status: UNSURE ( 8.44 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Ryan Wanner Add SAMA7D65 RTC compatible to DT bindings documentation. Signed-off-by: Ryan Wanner --- Documentation/devicetree/bindings/rtc/atmel,at91rm9200-rtc.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/rtc/atmel,at91rm9200-rtc.yaml b/Documentation/devicetree/bindings/rtc/atmel,at91rm9200-rtc.yaml index 30d87b74c51dc..d248cd49dbe23 100644 --- a/Documentation/devicetree/bindings/rtc/atmel,at91rm9200-rtc.yaml +++ b/Documentation/devicetree/bindings/rtc/atmel,at91rm9200-rtc.yaml @@ -23,6 +23,7 @@ properties: - microchip,sam9x60-rtc - items: - enum: + - microchip,sama7d65-rtc - microchip,sama7g5-rtc - microchip,sam9x7-rtc - const: microchip,sam9x60-rtc From patchwork Thu Jan 30 17:33:48 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Wanner X-Patchwork-Id: 13954803 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D031BC0218A for ; Thu, 30 Jan 2025 17:55:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date :Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=jdfnQpmR/s+XiF3nbzSYbbxPpv3OwypOk8JP+sO5tzg=; b=PQsJRlJgmTiUrq/Vb1Dnnap0sZ Kh3hBE87v2SEZRW4W3z/elXCCmcyTyAH5tU12l3xOv2z1ES9Bpk34WJGAvt8RYCDTtpg3t5c+sLJa RJ4BZ9zxKSKphAYIUwXahMP4HfIe1UIehRD7sSIlU6THLZziATQVDl/HjzZE6QMampIH8EXBhHvun k/Ka5lknu+dJye5237Vbzgvn0+2pgGaoIbJBKBQeSgxW4jM9Jy+HrBopjVIGeQWBWIEaL4CpgQx2F WdMPqKV52SWaV1LtniGoPIT1KrMb5m+Gxei9Z1OsQBrI6v7tzFpYRe7HwrO+aklW01eqKt9uiXozV /smpZKHg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tdYlS-00000009L7n-2uXc; Thu, 30 Jan 2025 17:55:42 +0000 Received: from esa.microchip.iphmx.com ([68.232.154.123]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tdYSn-00000009IQI-0jY4 for linux-arm-kernel@lists.infradead.org; Thu, 30 Jan 2025 17:36:26 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1738258584; x=1769794584; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=py/yqNx13hsIQ9lYRrDtu9qmIYc+M8dbM6qysRjVXU0=; b=Z8wpqAe0NlI15qppetzGm1Qhun3sryJVMOS9mDf4h5ZKQlC5puIXz/2n zR4DT8wgkENK1U2ntYoAQiF9GMOXdl4NjR491boLJgh2FrqcoVQMMoIgi 6885PiES51sBhw7ERBWjNgMJWNJ6jhunwaPgxjQvRHim79wfrRk1CJRoJ AQ+YnTBc2SPLfYLTh17MxVU1jUoBWXU3gfrX1ufe4IUQAv5bihTmJC07W M6da2/yFkhKqMC8pRotgrXhhDzo3lGu3AdnOxmD/7olIrmfLRSB5MIXOz dqadt3GTzzixapC2HlW7xOMQtZnxS20bPklzZP6lSvDMlaTHTtK8WLtUk w==; X-CSE-ConnectionGUID: Qux6TnwtQkq+U6Cg6JCAlA== X-CSE-MsgGUID: 9Uc2kZpQTSKP4t4SzjONhA== X-IronPort-AV: E=Sophos;i="6.13,246,1732604400"; d="scan'208";a="204623016" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 30 Jan 2025 10:36:22 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Thu, 30 Jan 2025 10:35:40 -0700 Received: from ryan-Precision-3630-Tower.microchip.com (10.10.85.11) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Thu, 30 Jan 2025 10:35:40 -0700 From: To: , , , , , , , , , CC: , , , , , Ryan Wanner Subject: [PATCH 08/16] dt-bindings: at91rm9260-rtt: add microchip,sama7d65-rtt Date: Thu, 30 Jan 2025 10:33:48 -0700 Message-ID: X-Mailer: git-send-email 2.43.0 In-Reply-To: References: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250130_093625_276576_224F82DB X-CRM114-Status: UNSURE ( 8.50 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Ryan Wanner Add SAMA7D65 RTT compatible to DT bindings documentation. Signed-off-by: Ryan Wanner --- .../devicetree/bindings/rtc/atmel,at91sam9260-rtt.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/rtc/atmel,at91sam9260-rtt.yaml b/Documentation/devicetree/bindings/rtc/atmel,at91sam9260-rtt.yaml index a7f6c1d1a08ab..078b753f453b4 100644 --- a/Documentation/devicetree/bindings/rtc/atmel,at91sam9260-rtt.yaml +++ b/Documentation/devicetree/bindings/rtc/atmel,at91sam9260-rtt.yaml @@ -23,6 +23,11 @@ properties: - microchip,sam9x60-rtt - microchip,sam9x7-rtt - const: atmel,at91sam9260-rtt + - items: + - enum: + - microchip,sama7d65-rtt + - const: microchip,sama7g5-rtt + - const: atmel,at91sam9260-rtt - items: - const: microchip,sama7g5-rtt - const: microchip,sam9x60-rtt From patchwork Thu Jan 30 17:33:49 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Wanner X-Patchwork-Id: 13954804 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 06074C0218A for ; Thu, 30 Jan 2025 17:57:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date :Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=Vf94xrPCacIGgIU8E7miuCZD7yF5tVDjvl3GPUfT3sY=; b=rccemHYzBXR05f5xGxPo0bum0I 3T8pphKLYltsUzsGeLqFlVc8+4FsSo5TMim2zhmmkwHpbQNH7KPM+wM2Mi/8aBPn3kqI4ZMdpujNn zlrKXZJhW2/vVKKwvaTQf5Jf4HpdvEr+V3d2CQ68m+8WkIqv5T2vklZ8G+bvq3M89XaZbs+DI2q66 6fNF0NZ55KhNbD+aIeMQaHWfl5AiWaGmc+dn8dBHFtihE/4Skg6UI8KxQVP0r4SeytDTGkMa4/KcY a+m6RCkNXlEgCTQ8rfsi4DsKpoVsLxisYE76aTF0535T9J1vCmwUASj4c2RfUWA6wNDL2YBtax332 DnZiaU5w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tdYmk-00000009LFw-1Fu9; Thu, 30 Jan 2025 17:57:02 +0000 Received: from esa.microchip.iphmx.com ([68.232.154.123]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tdYSn-00000009IRQ-2TmZ for linux-arm-kernel@lists.infradead.org; Thu, 30 Jan 2025 17:36:26 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1738258585; x=1769794585; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=tr+5ctybWd1qXbabAXHiNSfhGJo/z7RoiOi9HQGyK+g=; b=xowKKDCAJacUpqdrleER1GWiegnS0V3kAK7uNKAZYazJFtslDVhrjr+A Tv9sdalsyfKWxzQoj9JU5gI6Z/NM1Mi1g4bwvuBV7kOgLx5PMwBjJkkLN Sq1Y6nMJoDoVQhvm4Pvi0ZTtJfrbh11SJu4cl0qjGsfu4dBrAyhHPJu+X QMdiFhmWeDZBkugxwxzxYExgU93jxOGnrK/Ie1/GfeQPgntzeSplay43d /t5DWyHQuGkBbfI4hdO97JyIZahU1gtPl58sjNB0tEWteuiiRo+DxuZgf mNEN9G1IT9hGC1qVVdYSi+iJGbN3mzTU1TwSy4MlNx+I7D16Xzn7/DuBs w==; X-CSE-ConnectionGUID: Qux6TnwtQkq+U6Cg6JCAlA== X-CSE-MsgGUID: QG7KiDv0SXmpwDdFB//Xow== X-IronPort-AV: E=Sophos;i="6.13,246,1732604400"; d="scan'208";a="204623018" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 30 Jan 2025 10:36:22 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Thu, 30 Jan 2025 10:35:41 -0700 Received: from ryan-Precision-3630-Tower.microchip.com (10.10.85.11) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Thu, 30 Jan 2025 10:35:41 -0700 From: To: , , , , , , , , , CC: , , , , , Ryan Wanner Subject: [PATCH 09/16] ARM: at91: Add PM support to sama7d65 Date: Thu, 30 Jan 2025 10:33:49 -0700 Message-ID: <9a57da4b20f5fa7ec84af7353cfcdb43efbff29c.1738257860.git.Ryan.Wanner@microchip.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250130_093625_696638_F3E0BF59 X-CRM114-Status: UNSURE ( 9.05 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Ryan Wanner Add PM support to SAMA7D65 SoC. Signed-off-by: Ryan Wanner --- arch/arm/mach-at91/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index 04bd91c72521c..f3ff1220c0fb0 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -65,6 +65,7 @@ config SOC_SAMA7D65 select HAVE_AT91_SAM9X60_PLL select HAVE_AT91_USB_CLK select HAVE_AT91_UTMI + select PM_OPP select SOC_SAMA7 help Select this if you are using one of Microchip's SAMA7D65 family SoC. From patchwork Thu Jan 30 17:33:50 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Wanner X-Patchwork-Id: 13954790 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0EB5EC0218A for ; Thu, 30 Jan 2025 17:42:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date :Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=CDTKkpEoERKGC7pPdTbf0Xm6nMhjImY+0C0+QKIA5pc=; b=2bK5Dw9tkVmz/6wh1jHSyX2J0Z 0xGInAl/9bokb4cF6B5VlMUXGeQ7zbB9L9U/V0nHSVzAK0btcuehMlaLSVb7IWEclK1hPUkCR47Ib LEIm2NZp2UF7FIlMNPjUey5wYvuv9lPPPrSUkeK8kmD9M4vLe4+ybNAaD9qSzkLxGL4EDO0eo0RXv n8NsT85V1BYdj4DLzAnHmCy0j66LQrqkbKtwaUIkHxNqmCdVgeRn2VnxB2dtn+PJ+tDw8eVnMzlB7 ETrAP5IdNKK9M3omxjKi3E1TFF7AQvwpxpMnbg8xVSBdmZB8ySAW7djAkQ8RCdokng4Bzy0RxZpmn oT5DxA4g==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tdYYf-00000009JZ0-0R0y; Thu, 30 Jan 2025 17:42:29 +0000 Received: from esa.microchip.iphmx.com ([68.232.153.233]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tdYSc-00000009INj-19Jt for linux-arm-kernel@lists.infradead.org; Thu, 30 Jan 2025 17:36:15 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1738258574; x=1769794574; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=EWDYRLDJNCSj8RgMr4ncDCesuiq7qtH/1S45Wc/TEoI=; b=M0CIdqjyTm18+XJyKo77fOq27/CLqqXDB93Rjqexz27OrrYHcTQkicT8 XPB8epDCb4s9TlgyharfAs5kjBhQgSRX/8LxgEiSvg4QNlR7KQJ3tgS8M /jlTkSC6y7lR23fFLF/k+rKvRKnzjG2vn3hn/oV/Nhxril+pSzQqSl/2+ 2HY8byVlr8GHsXwrYV07twhiXrmqhEBpc1FV41+H7hihQPfO+CgKkQIsx ht6hYB/5tBQ6dku9Z8S6XEBXsBeGSz8c7OvJqtxXsaqaeQkDonaCMDg6v ol5JeShbdrgj4Xt2o4FgMcMDSCZAPjPVB8H/1XMAbUeW2Z8vn5s4eMjTZ g==; X-CSE-ConnectionGUID: 7iQ0c/B2QHylE8DKLR4q+g== X-CSE-MsgGUID: R4Kkehl8R8mgFbR+LWh4IA== X-IronPort-AV: E=Sophos;i="6.13,246,1732604400"; d="scan'208";a="41090047" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa1.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 30 Jan 2025 10:36:11 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Thu, 30 Jan 2025 10:35:41 -0700 Received: from ryan-Precision-3630-Tower.microchip.com (10.10.85.11) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Thu, 30 Jan 2025 10:35:41 -0700 From: To: , , , , , , , , , CC: , , , , , Li Bin , Ryan Wanner , Durai Manickam KR , Andrei Simion Subject: [PATCH 10/16] ARM: at91: pm: fix at91_suspend_finish for ZQ calibration Date: Thu, 30 Jan 2025 10:33:50 -0700 Message-ID: <862773938ff0b1265cf1e7a5b11ae0eb5b03cb2f.1738257860.git.Ryan.Wanner@microchip.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250130_093614_318739_DF3A0705 X-CRM114-Status: GOOD ( 15.50 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Li Bin For sama7g5 and sama7d65 backup mode, we encountered a "ZQ calibrate error" during recalibrating the impedance in BootStrap. We found that the impedance value saved in at91_suspend_finish() before the DDR entered self-refresh mode did not match the resistor values. The ZDATA field in the DDR3PHY_ZQ0CR0 register uses a modified gray code to select the different impedance setting. But these gray code are incorrect, a workaournd from design team fixed the bug in the calibration logic. The ZDATA contains four independent impedance elements, but the algorithm combined the four elements into one. The elements were fixed using properly shifted offsets. Signed-off-by: Li Bin [nicolas.ferre@microchip.com: fix indentation and combine 2 patches] Signed-off-by: Nicolas Ferre Tested-by: Ryan Wanner Tested-by: Durai Manickam KR Tested-by: Andrei Simion --- arch/arm/mach-at91/pm.c | 21 +++++++++++---------- 1 file changed, 11 insertions(+), 10 deletions(-) diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c index 05a1547642b60..32b8354738752 100644 --- a/arch/arm/mach-at91/pm.c +++ b/arch/arm/mach-at91/pm.c @@ -545,11 +545,12 @@ extern u32 at91_pm_suspend_in_sram_sz; static int at91_suspend_finish(unsigned long val) { - unsigned char modified_gray_code[] = { - 0x00, 0x01, 0x02, 0x03, 0x06, 0x07, 0x04, 0x05, 0x0c, 0x0d, - 0x0e, 0x0f, 0x0a, 0x0b, 0x08, 0x09, 0x18, 0x19, 0x1a, 0x1b, - 0x1e, 0x1f, 0x1c, 0x1d, 0x14, 0x15, 0x16, 0x17, 0x12, 0x13, - 0x10, 0x11, + /* SYNOPSYS workaround to fix a bug in the calibration logic (SYNOPSYS Case Number 01331341) */ + unsigned char modified_fix_code[] = { + 0x00, 0x01, 0x01, 0x06, 0x07, 0x0c, 0x06, 0x07, 0x0b, 0x18, + 0x0a, 0x0b, 0x0c, 0x0d, 0x0d, 0x0a, 0x13, 0x13, 0x12, 0x13, + 0x14, 0x15, 0x15, 0x12, 0x18, 0x19, 0x19, 0x1e, 0x1f, 0x14, + 0x1e, 0x1f, }; unsigned int tmp, index; int i; @@ -560,25 +561,25 @@ static int at91_suspend_finish(unsigned long val) * restore the ZQ0SR0 with the value saved here. But the * calibration is buggy and restoring some values from ZQ0SR0 * is forbidden and risky thus we need to provide processed - * values for these (modified gray code values). + * values for these. */ tmp = readl(soc_pm.data.ramc_phy + DDR3PHY_ZQ0SR0); /* Store pull-down output impedance select. */ index = (tmp >> DDR3PHY_ZQ0SR0_PDO_OFF) & 0x1f; - soc_pm.bu->ddr_phy_calibration[0] = modified_gray_code[index]; + soc_pm.bu->ddr_phy_calibration[0] = modified_fix_code[index] << DDR3PHY_ZQ0SR0_PDO_OFF; /* Store pull-up output impedance select. */ index = (tmp >> DDR3PHY_ZQ0SR0_PUO_OFF) & 0x1f; - soc_pm.bu->ddr_phy_calibration[0] |= modified_gray_code[index]; + soc_pm.bu->ddr_phy_calibration[0] |= modified_fix_code[index] << DDR3PHY_ZQ0SR0_PUO_OFF; /* Store pull-down on-die termination impedance select. */ index = (tmp >> DDR3PHY_ZQ0SR0_PDODT_OFF) & 0x1f; - soc_pm.bu->ddr_phy_calibration[0] |= modified_gray_code[index]; + soc_pm.bu->ddr_phy_calibration[0] |= modified_fix_code[index] << DDR3PHY_ZQ0SR0_PDODT_OFF; /* Store pull-up on-die termination impedance select. */ index = (tmp >> DDR3PHY_ZQ0SRO_PUODT_OFF) & 0x1f; - soc_pm.bu->ddr_phy_calibration[0] |= modified_gray_code[index]; + soc_pm.bu->ddr_phy_calibration[0] |= modified_fix_code[index] << DDR3PHY_ZQ0SRO_PUODT_OFF; /* * The 1st 8 words of memory might get corrupted in the process From patchwork Thu Jan 30 17:33:51 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Wanner X-Patchwork-Id: 13954805 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AD82BC0218A for ; Thu, 30 Jan 2025 17:58:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; 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30 Jan 2025 10:36:41 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Thu, 30 Jan 2025 10:35:41 -0700 Received: from ryan-Precision-3630-Tower.microchip.com (10.10.85.11) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Thu, 30 Jan 2025 10:35:41 -0700 From: To: , , , , , , , , , CC: , , , , , Ryan Wanner Subject: [PATCH 11/16] ARM: at91: pm: add DT compatible support for sama7d65 Date: Thu, 30 Jan 2025 10:33:51 -0700 Message-ID: X-Mailer: git-send-email 2.43.0 In-Reply-To: References: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250130_093642_274394_BFFEFE54 X-CRM114-Status: GOOD ( 13.57 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Ryan Wanner Add support for SAMA7D65 new compatible strings in pm.c file for wakeup source IDs and PMC. This is the first bits of PM for this new SoC. PM depends on other patches. Signed-off-by: Ryan Wanner [nicolas.ferre@microchip.com: split patch and address only the pm.c changes] Signed-off-by: Nicolas Ferre --- arch/arm/mach-at91/pm.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c index 32b8354738752..a8cd1300a8f33 100644 --- a/arch/arm/mach-at91/pm.c +++ b/arch/arm/mach-at91/pm.c @@ -222,12 +222,14 @@ static const struct of_device_id sam9x60_ws_ids[] = { { /* sentinel */ } }; -static const struct of_device_id sama7g5_ws_ids[] = { - { .compatible = "microchip,sama7g5-rtc", .data = &ws_info[1] }, +static const struct of_device_id sama7_ws_ids[] = { + { .compatible = "microchip,sama7d65-rtc", .data = &ws_info[1] }, + { .compatible = "microchip,sama7g5-rtc", .data = &ws_info[1] }, { .compatible = "microchip,sama7g5-ohci", .data = &ws_info[2] }, { .compatible = "usb-ohci", .data = &ws_info[2] }, { .compatible = "atmel,at91sam9g45-ehci", .data = &ws_info[2] }, { .compatible = "usb-ehci", .data = &ws_info[2] }, + { .compatible = "microchip,sama7d65-sdhci", .data = &ws_info[3] }, { .compatible = "microchip,sama7g5-sdhci", .data = &ws_info[3] }, { .compatible = "microchip,sama7g5-rtt", .data = &ws_info[4] }, { /* sentinel */ } @@ -1379,6 +1381,7 @@ static const struct of_device_id atmel_pmc_ids[] __initconst = { { .compatible = "atmel,sama5d2-pmc", .data = &pmc_infos[1] }, { .compatible = "microchip,sam9x60-pmc", .data = &pmc_infos[4] }, { .compatible = "microchip,sam9x7-pmc", .data = &pmc_infos[4] }, + { .compatible = "microchip,sama7d65-pmc", .data = &pmc_infos[4] }, { .compatible = "microchip,sama7g5-pmc", .data = &pmc_infos[5] }, { /* sentinel */ }, }; @@ -1672,7 +1675,7 @@ void __init sama7_pm_init(void) at91_pm_modes_init(iomaps, ARRAY_SIZE(iomaps)); at91_pm_init(NULL); - soc_pm.ws_ids = sama7g5_ws_ids; + soc_pm.ws_ids = sama7_ws_ids; soc_pm.config_pmc_ws = at91_sam9x60_config_pmc_ws; soc_pm.sfrbu_regs.pswbu.key = (0x4BD20C << 8); From patchwork Thu Jan 30 17:33:52 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Wanner X-Patchwork-Id: 13954791 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 37EADC0218A for ; Thu, 30 Jan 2025 17:43:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date :Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; 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Thu, 30 Jan 2025 10:35:41 -0700 From: To: , , , , , , , , , CC: , , , , , Ryan Wanner Subject: [PATCH 12/16] ARM: at91: PM: Add Backup mode for SAMA7D65 Date: Thu, 30 Jan 2025 10:33:52 -0700 Message-ID: X-Mailer: git-send-email 2.43.0 In-Reply-To: References: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250130_093615_452690_1C33A7D6 X-CRM114-Status: GOOD ( 12.10 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Ryan Wanner Add config check that enables Backup mode for SAMA7D65 SoC. Add SHDWC_SR read to clear the status bits once finished exiting low power modes. This is only for SAMA7D65 SoCs. Signed-off-by: Ryan Wanner --- arch/arm/mach-at91/pm.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c index a8cd1300a8f33..5e458254e1f1c 100644 --- a/arch/arm/mach-at91/pm.c +++ b/arch/arm/mach-at91/pm.c @@ -706,6 +706,9 @@ static int at91_pm_enter(suspend_state_t state) static void at91_pm_end(void) { at91_pm_config_ws(soc_pm.data.mode, false); + + if (IS_ENABLED(CONFIG_SOC_SAMA7D65)) + readl(soc_pm.data.shdwc + 0x08); } @@ -1064,7 +1067,8 @@ static int __init at91_pm_backup_init(void) int ret = -ENODEV, located = 0; if (!IS_ENABLED(CONFIG_SOC_SAMA5D2) && - !IS_ENABLED(CONFIG_SOC_SAMA7G5)) + !IS_ENABLED(CONFIG_SOC_SAMA7G5) && + !IS_ENABLED(CONFIG_SOC_SAMA7D65)) return -EPERM; if (!at91_is_pm_mode_active(AT91_PM_BACKUP)) From patchwork Thu Jan 30 17:33:53 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Wanner X-Patchwork-Id: 13954768 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CACA7C0218A for ; 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d="scan'208";a="204622972" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 30 Jan 2025 10:35:45 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Thu, 30 Jan 2025 10:35:41 -0700 Received: from ryan-Precision-3630-Tower.microchip.com (10.10.85.11) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Thu, 30 Jan 2025 10:35:41 -0700 From: To: , , , , , , , , , CC: , , , , , Ryan Wanner Subject: [PATCH 13/16] ARM: at91: pm: Enable ULP0 for SAMA7D65 Date: Thu, 30 Jan 2025 10:33:53 -0700 Message-ID: <24544d75175c47e23eb0a89ab4c1783e191747cc.1738257860.git.Ryan.Wanner@microchip.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250130_093547_489214_F95B7742 X-CRM114-Status: GOOD ( 17.86 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Ryan Wanner New clocks are saved to enable ULP0 for SAMA7D65 because this SoC has a total of 10 main clocks that need to be saved for ULP0 mode. Add mck_count member to at91_pm_data, this will be used to determine how many mcks need to be saved. In the mck_count member will also make sure that no unnecessary clock settings are written during mck_ps_restore. Add SHDWC to ULP0 mapping to clear the SHDWC status after exiting low power modes. Signed-off-by: Ryan Wanner Acked-by: Nicolas Ferre --- arch/arm/mach-at91/pm.c | 19 +++++- arch/arm/mach-at91/pm.h | 1 + arch/arm/mach-at91/pm_data-offsets.c | 2 + arch/arm/mach-at91/pm_suspend.S | 97 ++++++++++++++++++++++++++-- 4 files changed, 110 insertions(+), 9 deletions(-) diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c index 5e458254e1f1c..e29c44924ac22 100644 --- a/arch/arm/mach-at91/pm.c +++ b/arch/arm/mach-at91/pm.c @@ -1336,6 +1336,7 @@ struct pmc_info { unsigned long uhp_udp_mask; unsigned long mckr; unsigned long version; + unsigned long mck_count; }; static const struct pmc_info pmc_infos[] __initconst = { @@ -1343,30 +1344,42 @@ static const struct pmc_info pmc_infos[] __initconst = { .uhp_udp_mask = AT91RM9200_PMC_UHP | AT91RM9200_PMC_UDP, .mckr = 0x30, .version = AT91_PMC_V1, + .mck_count = 1, }, { .uhp_udp_mask = AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP, .mckr = 0x30, .version = AT91_PMC_V1, + .mck_count = 1, }, { .uhp_udp_mask = AT91SAM926x_PMC_UHP, .mckr = 0x30, .version = AT91_PMC_V1, + .mck_count = 1, }, { .uhp_udp_mask = 0, .mckr = 0x30, .version = AT91_PMC_V1, + .mck_count = 1, }, { .uhp_udp_mask = AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP, .mckr = 0x28, .version = AT91_PMC_V2, + .mck_count = 1, }, { .mckr = 0x28, .version = AT91_PMC_V2, + .mck_count = 5, + }, + { + .uhp_udp_mask = AT91SAM926x_PMC_UHP, + .mckr = 0x28, + .version = AT91_PMC_V2, + .mck_count = 10, }, }; @@ -1385,7 +1398,7 @@ static const struct of_device_id atmel_pmc_ids[] __initconst = { { .compatible = "atmel,sama5d2-pmc", .data = &pmc_infos[1] }, { .compatible = "microchip,sam9x60-pmc", .data = &pmc_infos[4] }, { .compatible = "microchip,sam9x7-pmc", .data = &pmc_infos[4] }, - { .compatible = "microchip,sama7d65-pmc", .data = &pmc_infos[4] }, + { .compatible = "microchip,sama7d65-pmc", .data = &pmc_infos[6] }, { .compatible = "microchip,sama7g5-pmc", .data = &pmc_infos[5] }, { /* sentinel */ }, }; @@ -1456,6 +1469,7 @@ static void __init at91_pm_init(void (*pm_idle)(void)) soc_pm.data.uhp_udp_mask = pmc->uhp_udp_mask; soc_pm.data.pmc_mckr_offset = pmc->mckr; soc_pm.data.pmc_version = pmc->version; + soc_pm.data.pmc_mck_count = pmc->mck_count; if (pm_idle) arm_pm_idle = pm_idle; @@ -1658,7 +1672,8 @@ void __init sama7_pm_init(void) AT91_PM_STANDBY, AT91_PM_ULP0, AT91_PM_ULP1, AT91_PM_BACKUP, }; static const u32 iomaps[] __initconst = { - [AT91_PM_ULP0] = AT91_PM_IOMAP(SFRBU), + [AT91_PM_ULP0] = AT91_PM_IOMAP(SFRBU) | + AT91_PM_IOMAP(SHDWC), [AT91_PM_ULP1] = AT91_PM_IOMAP(SFRBU) | AT91_PM_IOMAP(SHDWC) | AT91_PM_IOMAP(ETHC), diff --git a/arch/arm/mach-at91/pm.h b/arch/arm/mach-at91/pm.h index 53bdc9000e447..ccde9c8728c27 100644 --- a/arch/arm/mach-at91/pm.h +++ b/arch/arm/mach-at91/pm.h @@ -39,6 +39,7 @@ struct at91_pm_data { unsigned int suspend_mode; unsigned int pmc_mckr_offset; unsigned int pmc_version; + unsigned int pmc_mck_count; }; #endif diff --git a/arch/arm/mach-at91/pm_data-offsets.c b/arch/arm/mach-at91/pm_data-offsets.c index 40bd4e8fe40a5..59a4838038381 100644 --- a/arch/arm/mach-at91/pm_data-offsets.c +++ b/arch/arm/mach-at91/pm_data-offsets.c @@ -18,6 +18,8 @@ int main(void) pmc_mckr_offset)); DEFINE(PM_DATA_PMC_VERSION, offsetof(struct at91_pm_data, pmc_version)); + DEFINE(PM_DATA_PMC_MCK_COUNT, offsetof(struct at91_pm_data, + pmc_mck_count)); return 0; } diff --git a/arch/arm/mach-at91/pm_suspend.S b/arch/arm/mach-at91/pm_suspend.S index e5869cca5e791..2bbcbb26adb28 100644 --- a/arch/arm/mach-at91/pm_suspend.S +++ b/arch/arm/mach-at91/pm_suspend.S @@ -814,17 +814,19 @@ sr_dis_exit: .endm /** - * at91_mckx_ps_enable: save MCK1..4 settings and switch it to main clock + * at91_mckx_ps_enable: save MCK settings and switch it to main clock * - * Side effects: overwrites tmp1, tmp2 + * Side effects: overwrites tmp1, tmp2, tmp3 */ .macro at91_mckx_ps_enable #ifdef CONFIG_SOC_SAMA7 ldr pmc, .pmc_base + ldr tmp3, .mck_count - /* There are 4 MCKs we need to handle: MCK1..4 */ + /* Start at MCK1 and go until MCK_count */ mov tmp1, #1 -e_loop: cmp tmp1, #5 +e_loop: + cmp tmp1, tmp3 beq e_done /* Write MCK ID to retrieve the settings. */ @@ -850,7 +852,37 @@ e_save_mck3: b e_ps e_save_mck4: + cmp tmp1, #4 + bne e_save_mck5 str tmp2, .saved_mck4 + b e_ps + +e_save_mck5: + cmp tmp1, #5 + bne e_save_mck6 + str tmp2, .saved_mck5 + b e_ps + +e_save_mck6: + cmp tmp1, #6 + bne e_save_mck7 + str tmp2, .saved_mck6 + b e_ps + +e_save_mck7: + cmp tmp1, #7 + bne e_save_mck8 + str tmp2, .saved_mck7 + b e_ps + +e_save_mck8: + cmp tmp1, #8 + bne e_save_mck9 + str tmp2, .saved_mck8 + b e_ps + +e_save_mck9: + str tmp2, .saved_mck9 e_ps: /* Use CSS=MAINCK and DIV=1. */ @@ -870,17 +902,19 @@ e_done: .endm /** - * at91_mckx_ps_restore: restore MCK1..4 settings + * at91_mckx_ps_restore: restore MCKx settings * * Side effects: overwrites tmp1, tmp2 */ .macro at91_mckx_ps_restore #ifdef CONFIG_SOC_SAMA7 ldr pmc, .pmc_base + ldr tmp2, .mck_count - /* There are 4 MCKs we need to handle: MCK1..4 */ + /* Start from MCK1 and go up to MCK_count */ mov tmp1, #1 -r_loop: cmp tmp1, #5 +r_loop: + cmp tmp1, tmp2 beq r_done r_save_mck1: @@ -902,7 +936,37 @@ r_save_mck3: b r_ps r_save_mck4: + cmp tmp1, #4 + bne r_save_mck5 ldr tmp2, .saved_mck4 + b r_ps + +r_save_mck5: + cmp tmp1, #5 + bne r_save_mck6 + ldr tmp2, .saved_mck5 + b r_ps + +r_save_mck6: + cmp tmp1, #6 + bne r_save_mck7 + ldr tmp2, .saved_mck6 + b r_ps + +r_save_mck7: + cmp tmp1, #7 + bne r_save_mck8 + ldr tmp2, .saved_mck7 + b r_ps + +r_save_mck8: + cmp tmp1, #8 + bne r_save_mck9 + ldr tmp2, .saved_mck8 + b r_ps + +r_save_mck9: + ldr tmp2, .saved_mck9 r_ps: /* Write MCK ID to retrieve the settings. */ @@ -921,6 +985,7 @@ r_ps: wait_mckrdy tmp1 add tmp1, tmp1, #1 + ldr tmp2, .mck_count b r_loop r_done: #endif @@ -1045,6 +1110,10 @@ ENTRY(at91_pm_suspend_in_sram) str tmp1, .memtype ldr tmp1, [r0, #PM_DATA_MODE] str tmp1, .pm_mode +#ifdef CONFIG_SOC_SAMA7 + ldr tmp1, [r0, #PM_DATA_PMC_MCK_COUNT] + str tmp1, .mck_count +#endif /* * ldrne below are here to preload their address in the TLB as access @@ -1132,6 +1201,10 @@ ENDPROC(at91_pm_suspend_in_sram) .word 0 .pmc_version: .word 0 +#ifdef CONFIG_SOC_SAMA7 +.mck_count: + .word 0 +#endif .saved_mckr: .word 0 .saved_pllar: @@ -1155,6 +1228,16 @@ ENDPROC(at91_pm_suspend_in_sram) .word 0 .saved_mck4: .word 0 +.saved_mck5: + .word 0 +.saved_mck6: + .word 0 +.saved_mck7: + .word 0 +.saved_mck8: + .word 0 +.saved_mck9: + .word 0 #endif ENTRY(at91_pm_suspend_in_sram_sz) From patchwork Thu Jan 30 17:33:54 2025 Content-Type: text/plain; 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Thu, 30 Jan 2025 10:35:41 -0700 From: To: , , , , , , , , , CC: , , , , , Ryan Wanner Subject: [PATCH 14/16] power: reset: at91-sama5d2_shdwc: Add sama7d65 PMC Date: Thu, 30 Jan 2025 10:33:54 -0700 Message-ID: X-Mailer: git-send-email 2.43.0 In-Reply-To: References: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250130_093549_216678_6CA2907A X-CRM114-Status: UNSURE ( 9.89 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Ryan Wanner Add sama7d65-pmc compatible string to the list of valid PMC IDs. Signed-off-by: Ryan Wanner --- drivers/power/reset/at91-sama5d2_shdwc.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/power/reset/at91-sama5d2_shdwc.c b/drivers/power/reset/at91-sama5d2_shdwc.c index edb0df86aff45..0cb7fe9f25a07 100644 --- a/drivers/power/reset/at91-sama5d2_shdwc.c +++ b/drivers/power/reset/at91-sama5d2_shdwc.c @@ -326,6 +326,7 @@ static const struct of_device_id at91_pmc_ids[] = { { .compatible = "atmel,sama5d2-pmc" }, { .compatible = "microchip,sam9x60-pmc" }, { .compatible = "microchip,sama7g5-pmc" }, + { .compatible = "microchip,sama7d65-pmc" }, { /* Sentinel. */ } }; From patchwork Thu Jan 30 17:33:55 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Wanner X-Patchwork-Id: 13954788 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6C746C0218A for ; Thu, 30 Jan 2025 17:40:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date :Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=i3QkP73j7x5d+AQphvPwjsqmp9onXYdrNTUKx9rTazk=; b=PyBtZ8HTKSve9k82KqenTvjg3D wZQLJo7KDVKBGgNki9vrbAXsR7BRZ7fUF2OR6wY0VRMx+lL7WK6dylPHVKx1843RHR5kPM7EuJjJ2 eQr4kqe/VzM4IArB7LeWF09fIQ3ww7BjFb8kNHTcFwBfZ7c2EQYF3y40A5TehIs3idfzJgVTVdoOG fxwlCmIztbOpuVzDYQi/FajHIjILFvinn6HqzJs/QFEaOKgsUC1zPfvdZpJEII3BPIY2o94p0de+L T0JeU1h+WIiO6Hm1YCi8Tam6R8bnYpuV5L1dOrDG4dae+mzX+rVW87MxELmRXntu73H8kiefroHzf NIuZqiMw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tdYW5-00000009JAr-3Aqy; Thu, 30 Jan 2025 17:39:49 +0000 Received: from esa.microchip.iphmx.com ([68.232.154.123]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tdYSD-00000009IJH-1dTA for linux-arm-kernel@lists.infradead.org; Thu, 30 Jan 2025 17:35:50 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1738258549; x=1769794549; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=wan1Nd3Bl14Mogpslj9rCJupKOyLIC//emvKCJOzmww=; b=CrVbn6B+qMvg716e0uQz68GeHeI3whrF1tmNHM2Q9/Q1wD4YKWAazuih UAqeFES1IYlTke5Vl+xjOqqQ3Jjm8AO14rrZhgbiT+MX0rkPRvQCZUTY0 0UZKXOpEWMARDVeYdFFK8kl/qtrNIrVXsPAk3dMEKdYfyLejOR1PHGdum JslBp7Q4St1U0HrtUiJorWppzHaD3DZnP0MxnolkM+NKOcXpZTD73t7Xd l3m6D6e1zx0HHl68O1AZj7xBJwrR3Z8wyknF6pGRrGpmUWPDXi4IowtT0 g/y88aFZ6whs4REXWQ1WA4jsqxG51T8b9Y5SFrV7aL/CjGHMemIzXL3ZC w==; X-CSE-ConnectionGUID: X8noN3xrSZmPEckyVo5bzw== X-CSE-MsgGUID: UJXhY5GLRvWt9YKMkDMqRA== X-IronPort-AV: E=Sophos;i="6.13,246,1732604400"; d="scan'208";a="204622974" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 30 Jan 2025 10:35:45 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Thu, 30 Jan 2025 10:35:42 -0700 Received: from ryan-Precision-3630-Tower.microchip.com (10.10.85.11) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Thu, 30 Jan 2025 10:35:42 -0700 From: To: , , , , , , , , , CC: , , , , , Ryan Wanner Subject: [PATCH 15/16] ARM: dts: microchip: sama7d65: Add Reset and Shutdown and PM support Date: Thu, 30 Jan 2025 10:33:55 -0700 Message-ID: <4c7226eb6e70ebd8fcc3e1afd0dbdf3d5a16f2a6.1738257860.git.Ryan.Wanner@microchip.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250130_093549_491307_0EEA625B X-CRM114-Status: GOOD ( 10.21 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Ryan Wanner Add support for reset controller, wake up alarm timers, and shutdown controller. Add SRAM, SFR, secumod, UDDRC, and DDR3phy to enable support for low power modes. Signed-off-by: Ryan Wanner --- arch/arm/boot/dts/microchip/sama7d65.dtsi | 77 +++++++++++++++++++++++ 1 file changed, 77 insertions(+) diff --git a/arch/arm/boot/dts/microchip/sama7d65.dtsi b/arch/arm/boot/dts/microchip/sama7d65.dtsi index 854b30d15dcd4..8e117586e5902 100644 --- a/arch/arm/boot/dts/microchip/sama7d65.dtsi +++ b/arch/arm/boot/dts/microchip/sama7d65.dtsi @@ -46,12 +46,42 @@ slow_xtal: clock-slowxtal { }; }; + ns_sram: sram@100000 { + compatible = "mmio-sram"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x100000 0x20000>; + ranges; + }; + soc { compatible = "simple-bus"; ranges; #address-cells = <1>; #size-cells = <1>; + securam: sram@e0000800 { + compatible = "microchip,sama7d65-securam", "atmel,sama5d2-securam", "mmio-sram"; + reg = <0xe0000800 0x4000>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 17>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0xe0000800 0x4000>; + no-memory-wc; + }; + + secumod: secumod@e0004000 { + compatible = "microchip,sama7d65-secumod", "atmel,sama5d2-secumod", "syscon"; + reg = <0xe0004000 0x4000>; + gpio-controller; + #gpio-cells = <2>; + }; + + sfrbu: sfr@e0008000 { + compatible ="microchip,sama7d65-sfrbu", "atmel,sama5d2-sfrbu", "syscon"; + reg = <0xe0008000 0x20>; + }; + pioa: pinctrl@e0014000 { compatible = "microchip,sama7d65-pinctrl", "microchip,sama7g5-pinctrl"; reg = <0xe0014000 0x800>; @@ -76,6 +106,31 @@ pmc: clock-controller@e0018000 { clock-names = "td_slck", "md_slck", "main_xtal"; }; + reset_controller: reset-controller@e001d100 { + compatible = "microchip,sama7d65-rstc", "microchip,sama7g5-rstc"; + reg = <0xe001d100 0xc>, <0xe001d1e4 0x4>; + #reset-cells = <1>; + clocks = <&clk32k 0>; + }; + + shdwc: poweroff@e001d200 { + compatible = "microchip,sama7d65-shdwc", "microchip,sama7g5-shdwc", "syscon"; + reg = <0xe001d200 0x20>; + clocks = <&clk32k 0>; + #address-cells = <1>; + #size-cells = <0>; + atmel,wakeup-rtc-timer; + atmel,wakeup-rtt-timer; + status = "disabled"; + }; + + rtt: rtc@e001d300 { + compatible = "microchip,sama7d65-rtt", "microchip,sama7g5-rtt", "atmel,at91sam9260-rtt"; + reg = <0xe001d300 0x30>; + interrupts = ; + clocks = <&clk32k 0>; + }; + clk32k: clock-controller@e001d500 { compatible = "microchip,sama7d65-sckc", "microchip,sam9x60-sckc"; reg = <0xe001d500 0x4>; @@ -83,6 +138,18 @@ clk32k: clock-controller@e001d500 { #clock-cells = <1>; }; + gpbr: gpbr@e001d700 { + compatible = "microchip,sama7d65-gpbr", "syscon"; + reg = <0xe001d700 0x48>; + }; + + rtc: rtc@e001d800 { + compatible = "microchip,sama7d65-rtc", "microchip,sam9x60-rtc"; + reg = <0xe001d800 0x30>; + interrupts = ; + clocks = <&clk32k 1>; + }; + sdmmc1: mmc@e1208000 { compatible = "microchip,sama7d65-sdhci", "microchip,sam9x60-sdhci"; reg = <0xe1208000 0x400>; @@ -132,6 +199,16 @@ uart6: serial@200 { }; }; + uddrc: uddrc@e3800000 { + compatible = "microchip,sama7d65-uddrc", "microchip,sama7g5-uddrc"; + reg = <0xe3800000 0x4000>; + }; + + ddr3phy: ddr3phy@e3804000 { + compatible = "microchip,sama7d65-ddr3phy", "microchip,sama7g5-ddr3phy"; + reg = <0xe3804000 0x1000>; + }; + gic: interrupt-controller@e8c11000 { compatible = "arm,cortex-a7-gic"; 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Thu, 30 Jan 2025 10:35:42 -0700 From: To: , , , , , , , , , CC: , , , , , Ryan Wanner Subject: [PATCH 16/16] ARM: dts: microchip: add shutdown controller and rtt timer Date: Thu, 30 Jan 2025 10:33:56 -0700 Message-ID: X-Mailer: git-send-email 2.43.0 In-Reply-To: References: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250130_093550_509529_A949287A X-CRM114-Status: UNSURE ( 9.78 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Ryan Wanner Add shutdown controller and rtt timer to support shutdown and wake up. Signed-off-by: Ryan Wanner --- .../boot/dts/microchip/at91-sama7d65_curiosity.dts | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts b/arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts index 0f86360fb733a..d1d0b06fbfc43 100644 --- a/arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts +++ b/arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts @@ -77,6 +77,11 @@ pinctrl_uart6_default: uart6-default { }; }; +&rtt { + atmel,rtt-rtc-time-reg = <&gpbr 0x0>; + status = "disabled"; +}; + &sdmmc1 { bus-width = <4>; pinctrl-names = "default"; @@ -84,6 +89,15 @@ &sdmmc1 { status = "okay"; }; +&shdwc { + debounce-delay-us = <976>; + status = "okay"; + + input@0 { + reg = <0>; + }; +}; + &slow_xtal { clock-frequency = <32768>; };