From patchwork Fri Jan 31 12:49:54 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13955342 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E1064C02194 for ; Fri, 31 Jan 2025 12:50:24 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7654510EA85; Fri, 31 Jan 2025 12:50:24 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="ScmNmAXM"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.17]) by gabe.freedesktop.org (Postfix) with ESMTPS id CDE0510E1EA; Fri, 31 Jan 2025 12:50:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1738327823; x=1769863823; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=BGET/UU/2bV5Re6ziqCj4p0mZbhPAXcfyFDC0FmfJTA=; b=ScmNmAXM+frcFaCE7PMgz2PfchyHi5EnED0JFNZbzdcI1YWWzIsvKjOV +rKhqfFJ/JpIfMdGRCATaibhxU5pe97gs1wqME7rl3LgXtzMaLAbX9m7D 22paNeNir7/VjxsHPdt+GQ+7FZUYL2drsb/ecYK2NVWooodMJ0WeALgBZ m/H4etb8P25hQBGmV3unDO9uAp4weiqcI/HLY7fdSo+dDN+/ztJ1N3FTI jmzIHNX04oAPq9+a9B1RByuL2V2GjeVqfYz/ArB7iu4HnwsXBU88z7bVI tODZg6tcoWprI7wBidZKzl2GZPQ7cSWAGX2Q7YMnIz7jJ6PTt4LFZp9iA g==; X-CSE-ConnectionGUID: NiNnrQtET3SI7M32R4xZgw== X-CSE-MsgGUID: UncN1CtZThKD0y4aDhwMNQ== X-IronPort-AV: E=McAfee;i="6700,10204,11332"; a="38798437" X-IronPort-AV: E=Sophos;i="6.13,248,1732608000"; d="scan'208";a="38798437" Received: from fmviesa009.fm.intel.com ([10.60.135.149]) by fmvoesa111.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 Jan 2025 04:50:22 -0800 X-CSE-ConnectionGUID: zlk9dCfuRNSr/+XeEPvKNA== X-CSE-MsgGUID: h4Zkr3+dTomk03TDK+2HBQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.13,248,1732608000"; d="scan'208";a="110203309" Received: from mwiniars-desk2.ger.corp.intel.com (HELO localhost) ([10.245.246.174]) by fmviesa009-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 Jan 2025 04:50:20 -0800 From: Jani Nikula To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: imre.deak@intel.com, jani.nikula@intel.com, Ankit Nautiyal , stable@vger.kernel.org Subject: [PATCH 01/14] drm/i915/dp: Iterate DSC BPP from high to low on all platforms Date: Fri, 31 Jan 2025 14:49:54 +0200 Message-Id: <3bba67923cbcd13a59d26ef5fa4bb042b13c8a9b.1738327620.git.jani.nikula@intel.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Commit 1c56e9a39833 ("drm/i915/dp: Get optimal link config to have best compressed bpp") tries to find the best compressed bpp for the link. However, it iterates from max to min bpp on display 13+, and from min to max on other platforms. This presumably leads to minimum compressed bpp always being chosen on display 11-12. Iterate from high to low on all platforms to actually use the best possible compressed bpp. Fixes: 1c56e9a39833 ("drm/i915/dp: Get optimal link config to have best compressed bpp") Cc: Ankit Nautiyal Cc: Imre Deak Cc: # v6.7+ Signed-off-by: Jani Nikula Reviewed-by: Imre Deak Reviewed-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_dp.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index d1b4fd542a1f..ecf192262eb9 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -2073,11 +2073,10 @@ icl_dsc_compute_link_config(struct intel_dp *intel_dp, /* Compressed BPP should be less than the Input DSC bpp */ dsc_max_bpp = min(dsc_max_bpp, output_bpp - 1); - for (i = 0; i < ARRAY_SIZE(valid_dsc_bpp); i++) { - if (valid_dsc_bpp[i] < dsc_min_bpp) + for (i = ARRAY_SIZE(valid_dsc_bpp) - 1; i >= 0; i--) { + if (valid_dsc_bpp[i] < dsc_min_bpp || + valid_dsc_bpp[i] > dsc_max_bpp) continue; - if (valid_dsc_bpp[i] > dsc_max_bpp) - break; ret = dsc_compute_link_config(intel_dp, pipe_config, From patchwork Fri Jan 31 12:49:55 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13955346 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C2FA1C0218F for ; Fri, 31 Jan 2025 12:50:48 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 6ED8910EA98; Fri, 31 Jan 2025 12:50:48 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="PoUiEhCl"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.17]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4FF4710E086; Fri, 31 Jan 2025 12:50:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1738327847; x=1769863847; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=W0P/57zD09WfQt+SpgMpybE2uzmRb8K+vxX95crhEVU=; b=PoUiEhCl9JVrl7BBsym3M0t8FnMjfwE0wONU5R+e6w9YxHkhIXlZHeJb lyy3pQ2lJyBDTsiMv6ap0MaBrWacAnMOrOeOSI4cr322/GI2N1wZ5Rbbv cAtr+z1z2nDCrOFlfQ+8jIf6Np66XC7OTDA1bAZaKOdCjACm05CQk4Pfg mSJknkIaKRYBJClwu9KvucYYbgrPzNu6pdaICBvJUbMj/PCrFIIyy9F9J MYz2aJfDBA3Yqjzi1Hnix0TiqlRcYyWdUyJGyqEBcd0QqsoyByH8AT/4z CVgyv/rPh2BIg2p8jLqHcNOKqzvXyOBTH/GpRxCeKcLPa40rjIKVjgj3e g==; X-CSE-ConnectionGUID: U2ydsedtTweL0B2oS11BsQ== X-CSE-MsgGUID: 3LmCNWwoQUKLw11YEIIS7A== X-IronPort-AV: E=McAfee;i="6700,10204,11332"; a="38798469" X-IronPort-AV: E=Sophos;i="6.13,248,1732608000"; d="scan'208";a="38798469" Received: from fmviesa009.fm.intel.com ([10.60.135.149]) by fmvoesa111.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 Jan 2025 04:50:28 -0800 X-CSE-ConnectionGUID: PzWT4ONfRl6JfFkb8vssXA== X-CSE-MsgGUID: jJjjFQ/VTS69OP3Z+wqFZw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.13,248,1732608000"; d="scan'208";a="110203319" Received: from mwiniars-desk2.ger.corp.intel.com (HELO localhost) ([10.245.246.174]) by fmviesa009-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 Jan 2025 04:50:26 -0800 From: Jani Nikula To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: imre.deak@intel.com, jani.nikula@intel.com Subject: [PATCH 02/14] drm/i915/dp: Add intel_dp_dsc_bpp_step_x16() helper to get DSC BPP precision Date: Fri, 31 Jan 2025 14:49:55 +0200 Message-Id: X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Add a platform independent helper for getting the supported DSC BPP step for the link. Signed-off-by: Jani Nikula Reviewed-by: Imre Deak --- drivers/gpu/drm/i915/display/intel_dp.c | 21 ++++++++++++++++----- 1 file changed, 16 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index ecf192262eb9..a7a5bb2075da 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -2054,6 +2054,21 @@ static int dsc_src_max_compressed_bpp(struct intel_dp *intel_dp) return 27; } +/* + * Note: for pre-13 display you still need to check the validity of each step. + */ +static int intel_dp_dsc_bpp_step_x16(const struct intel_connector *connector) +{ + struct intel_display *display = to_intel_display(connector); + u8 incr = drm_dp_dsc_sink_bpp_incr(connector->dp.dsc_dpcd); + + if (DISPLAY_VER(display) < 14 || !incr) + return fxp_q4_from_int(1); + + /* fxp q4 */ + return 16 / incr; +} + /* * From a list of valid compressed bpps try different compressed bpp and find a * suitable link configuration that can support it. @@ -2110,16 +2125,12 @@ xelpd_dsc_compute_link_config(struct intel_dp *intel_dp, int timeslots) { struct intel_display *display = to_intel_display(intel_dp); - u8 bppx16_incr = drm_dp_dsc_sink_bpp_incr(connector->dp.dsc_dpcd); int output_bpp = intel_dp_output_bpp(pipe_config->output_format, pipe_bpp); u16 compressed_bppx16; u8 bppx16_step; int ret; - if (DISPLAY_VER(display) < 14 || bppx16_incr <= 1) - bppx16_step = 16; - else - bppx16_step = 16 / bppx16_incr; + bppx16_step = intel_dp_dsc_bpp_step_x16(connector); /* Compressed BPP should be less than the Input DSC bpp */ dsc_max_bpp = min(dsc_max_bpp << 4, (output_bpp << 4) - bppx16_step); From patchwork Fri Jan 31 12:49:56 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13955343 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C14D8C0218F for ; Fri, 31 Jan 2025 12:50:34 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 692B610EA92; Fri, 31 Jan 2025 12:50:34 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="HyL0NOej"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.20]) by gabe.freedesktop.org (Postfix) with ESMTPS id 42BFD10E086; Fri, 31 Jan 2025 12:50:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1738327833; x=1769863833; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=TfIo486Cpc5xIsQbo1/pbfZser2wB0+c4Ks2AOiE8/s=; b=HyL0NOej8n/gX+X0vkMgDHzCRz//9rv0QlZEHlk3ZIhNIMY3SAXyw8/o zuiLiFaKHvopoALCpDnR/QA8L41rng5270afgWNzxHKjsCJJrf/fO4+3n lMe2u2V5oi2GYIiwMQ9oNYq1mAY53wydpv7Y0xFH0acat2QOLPQxp3oVO CdtEqoCBR+9EC296AFKE4yV1K21Xe4UydEwh8MXwf+5fCppybvck6ND2l 2UWV0Ot7VoMdpgI1g8KoKj6h98+ePYci2TlUBY2AkD/7YNY2w/KSlGyJW zzcC2WQ3OMpLQFwXJf6yeDlkP3XHIcg4Jmh+DRhFrDl8XhQwL7sYkpPsD w==; X-CSE-ConnectionGUID: rX2o5J/AQxSwtLtcKbZPmw== X-CSE-MsgGUID: wMwdLne+T0S4kGnY4g/vPA== X-IronPort-AV: E=McAfee;i="6700,10204,11332"; a="38599490" X-IronPort-AV: E=Sophos;i="6.13,248,1732608000"; d="scan'208";a="38599490" Received: from orviesa004.jf.intel.com ([10.64.159.144]) by orvoesa112.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 Jan 2025 04:50:33 -0800 X-CSE-ConnectionGUID: VxHEaCLaQoOppG7GnBtQHw== X-CSE-MsgGUID: WH1SzbbDTtKhixwpU7cxMQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.13,248,1732608000"; d="scan'208";a="114616966" Received: from mwiniars-desk2.ger.corp.intel.com (HELO localhost) ([10.245.246.174]) by orviesa004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 Jan 2025 04:50:31 -0800 From: Jani Nikula To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: imre.deak@intel.com, jani.nikula@intel.com Subject: [PATCH 03/14] drm/i915/dp: Rename some variables in xelpd_dsc_compute_link_config() Date: Fri, 31 Jan 2025 14:49:56 +0200 Message-Id: <91dd6ef53683b624a978101cca7322ea3e5e2f7b.1738327620.git.jani.nikula@intel.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Use the _x16 suffix for all .4 fixed point variables. Drop compressed_ prefix, as it's implied from the precision suffix. As dsc_min_bpp and dsc_max_bpp change domain from int to .4 in the middle of the function, they remain the same for now. Signed-off-by: Jani Nikula Reviewed-by: Imre Deak --- drivers/gpu/drm/i915/display/intel_dp.c | 19 ++++++++----------- 1 file changed, 8 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index a7a5bb2075da..02d1a5453b46 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -2126,31 +2126,28 @@ xelpd_dsc_compute_link_config(struct intel_dp *intel_dp, { struct intel_display *display = to_intel_display(intel_dp); int output_bpp = intel_dp_output_bpp(pipe_config->output_format, pipe_bpp); - u16 compressed_bppx16; - u8 bppx16_step; + int bpp_x16, bpp_step_x16; int ret; - bppx16_step = intel_dp_dsc_bpp_step_x16(connector); + bpp_step_x16 = intel_dp_dsc_bpp_step_x16(connector); /* Compressed BPP should be less than the Input DSC bpp */ - dsc_max_bpp = min(dsc_max_bpp << 4, (output_bpp << 4) - bppx16_step); + dsc_max_bpp = min(dsc_max_bpp << 4, (output_bpp << 4) - bpp_step_x16); dsc_min_bpp = dsc_min_bpp << 4; - for (compressed_bppx16 = dsc_max_bpp; - compressed_bppx16 >= dsc_min_bpp; - compressed_bppx16 -= bppx16_step) { + for (bpp_x16 = dsc_max_bpp; bpp_x16 >= dsc_min_bpp; bpp_x16 -= bpp_step_x16) { if (intel_dp->force_dsc_fractional_bpp_en && - !fxp_q4_to_frac(compressed_bppx16)) + !fxp_q4_to_frac(bpp_x16)) continue; ret = dsc_compute_link_config(intel_dp, pipe_config, limits, - compressed_bppx16, + bpp_x16, timeslots); if (ret == 0) { - pipe_config->dsc.compressed_bpp_x16 = compressed_bppx16; + pipe_config->dsc.compressed_bpp_x16 = bpp_x16; if (intel_dp->force_dsc_fractional_bpp_en && - fxp_q4_to_frac(compressed_bppx16)) + fxp_q4_to_frac(bpp_x16)) drm_dbg_kms(display->drm, "Forcing DSC fractional bpp\n"); From patchwork Fri Jan 31 12:49:57 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13955344 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9E0AAC02194 for ; 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X-CSE-ConnectionGUID: whyQSgD6R9CFEo2R/2C6wQ== X-CSE-MsgGUID: zgO31/1cRdWrjlRKSbQYog== X-IronPort-AV: E=McAfee;i="6700,10204,11332"; a="38599491" X-IronPort-AV: E=Sophos;i="6.13,248,1732608000"; d="scan'208";a="38599491" Received: from orviesa004.jf.intel.com ([10.64.159.144]) by orvoesa112.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 Jan 2025 04:50:38 -0800 X-CSE-ConnectionGUID: irHD9ghtSlioJWLmRhfWmQ== X-CSE-MsgGUID: pgAY2xtHSP2iwLr8ULmwUw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.13,248,1732608000"; d="scan'208";a="114616980" Received: from mwiniars-desk2.ger.corp.intel.com (HELO localhost) ([10.245.246.174]) by orviesa004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 Jan 2025 04:50:37 -0800 From: Jani Nikula To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: imre.deak@intel.com, jani.nikula@intel.com Subject: [PATCH 04/14] drm/i915/dp: Pass .4 BPP values to {icl, xelpd}_dsc_compute_link_config() Date: Fri, 31 Jan 2025 14:49:57 +0200 Message-Id: X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Try to keep the variables in the same domain a bit longer to reduce juggling between integers and .4 fixed point. Change parameter order to min, max while at it. For now, keep the juggling in dsc_compute_compressed_bpp() ensure min/max will always have 0 fractional part. To be fixed later. Signed-off-by: Jani Nikula Reviewed-by: Imre Deak --- drivers/gpu/drm/i915/display/intel_dp.c | 28 ++++++++++++++----------- 1 file changed, 16 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 02d1a5453b46..b13d806c9de7 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -2077,8 +2077,8 @@ static int icl_dsc_compute_link_config(struct intel_dp *intel_dp, struct intel_crtc_state *pipe_config, const struct link_config_limits *limits, - int dsc_max_bpp, - int dsc_min_bpp, + int min_bpp_x16, + int max_bpp_x16, int pipe_bpp, int timeslots) { @@ -2086,11 +2086,11 @@ icl_dsc_compute_link_config(struct intel_dp *intel_dp, int output_bpp = intel_dp_output_bpp(pipe_config->output_format, pipe_bpp); /* Compressed BPP should be less than the Input DSC bpp */ - dsc_max_bpp = min(dsc_max_bpp, output_bpp - 1); + max_bpp_x16 = min(max_bpp_x16, fxp_q4_from_int(output_bpp - 1)); for (i = ARRAY_SIZE(valid_dsc_bpp) - 1; i >= 0; i--) { - if (valid_dsc_bpp[i] < dsc_min_bpp || - valid_dsc_bpp[i] > dsc_max_bpp) + if (valid_dsc_bpp[i] < fxp_q4_to_int(min_bpp_x16) || + valid_dsc_bpp[i] > fxp_q4_to_int(max_bpp_x16)) continue; ret = dsc_compute_link_config(intel_dp, @@ -2119,8 +2119,8 @@ xelpd_dsc_compute_link_config(struct intel_dp *intel_dp, const struct intel_connector *connector, struct intel_crtc_state *pipe_config, const struct link_config_limits *limits, - int dsc_max_bpp, - int dsc_min_bpp, + int min_bpp_x16, + int max_bpp_x16, int pipe_bpp, int timeslots) { @@ -2132,10 +2132,9 @@ xelpd_dsc_compute_link_config(struct intel_dp *intel_dp, bpp_step_x16 = intel_dp_dsc_bpp_step_x16(connector); /* Compressed BPP should be less than the Input DSC bpp */ - dsc_max_bpp = min(dsc_max_bpp << 4, (output_bpp << 4) - bpp_step_x16); - dsc_min_bpp = dsc_min_bpp << 4; + max_bpp_x16 = min(max_bpp_x16, fxp_q4_from_int(output_bpp) - bpp_step_x16); - for (bpp_x16 = dsc_max_bpp; bpp_x16 >= dsc_min_bpp; bpp_x16 -= bpp_step_x16) { + for (bpp_x16 = max_bpp_x16; bpp_x16 >= min_bpp_x16; bpp_x16 -= bpp_step_x16) { if (intel_dp->force_dsc_fractional_bpp_en && !fxp_q4_to_frac(bpp_x16)) continue; @@ -2168,6 +2167,7 @@ static int dsc_compute_compressed_bpp(struct intel_dp *intel_dp, const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; int dsc_min_bpp; int dsc_max_bpp; + int min_bpp_x16, max_bpp_x16; int dsc_joiner_max_bpp; int num_joined_pipes = intel_crtc_num_joined_pipes(pipe_config); @@ -2178,11 +2178,15 @@ static int dsc_compute_compressed_bpp(struct intel_dp *intel_dp, num_joined_pipes); dsc_max_bpp = min(dsc_joiner_max_bpp, fxp_q4_to_int(limits->link.max_bpp_x16)); + /* FIXME: remove the round trip via integers */ + min_bpp_x16 = fxp_q4_from_int(dsc_min_bpp); + max_bpp_x16 = fxp_q4_from_int(dsc_max_bpp); + if (DISPLAY_VER(display) >= 13) return xelpd_dsc_compute_link_config(intel_dp, connector, pipe_config, limits, - dsc_max_bpp, dsc_min_bpp, pipe_bpp, timeslots); + min_bpp_x16, max_bpp_x16, pipe_bpp, timeslots); return icl_dsc_compute_link_config(intel_dp, pipe_config, limits, - dsc_max_bpp, dsc_min_bpp, pipe_bpp, timeslots); + min_bpp_x16, max_bpp_x16, pipe_bpp, timeslots); } int intel_dp_dsc_min_src_input_bpc(void) From patchwork Fri Jan 31 12:49:58 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13955345 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E3BFAC02194 for ; Fri, 31 Jan 2025 12:50:44 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8E68310EA91; Fri, 31 Jan 2025 12:50:44 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; 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a="38599498" X-IronPort-AV: E=Sophos;i="6.13,248,1732608000"; d="scan'208";a="38599498" Received: from orviesa004.jf.intel.com ([10.64.159.144]) by orvoesa112.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 Jan 2025 04:50:44 -0800 X-CSE-ConnectionGUID: lzNMxwA4Qx+1ogQxv9YyIQ== X-CSE-MsgGUID: AWe4p3j8Qbeex3GSNljDHw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.13,248,1732608000"; d="scan'208";a="114616987" Received: from mwiniars-desk2.ger.corp.intel.com (HELO localhost) ([10.245.246.174]) by orviesa004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 Jan 2025 04:50:42 -0800 From: Jani Nikula To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: imre.deak@intel.com, jani.nikula@intel.com Subject: [PATCH 05/14] drm/i915/dp: Move max DSC BPP reduction one level higher Date: Fri, 31 Jan 2025 14:49:58 +0200 Message-Id: <62fa7f18ea49dce24c5d0ee7b2f0cbde9e2b609c.1738327620.git.jani.nikula@intel.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Now that {icl,xelpd}_dsc_compute_link_config() take .4 fixed point as parameter, move the common max DSC BPP reduction one level higher. Use intel_dp_dsc_bpp_step() to compute the step, and pass on to both platform specific functions. (Though it's unused for now in icl_dsc_compute_link_config()). We can drop the pipe_bpp and connector parameters. Signed-off-by: Jani Nikula Reviewed-by: Imre Deak --- drivers/gpu/drm/i915/display/intel_dp.c | 32 +++++++++++-------------- 1 file changed, 14 insertions(+), 18 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index b13d806c9de7..4e7b3dd4067c 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -2079,14 +2079,10 @@ icl_dsc_compute_link_config(struct intel_dp *intel_dp, const struct link_config_limits *limits, int min_bpp_x16, int max_bpp_x16, - int pipe_bpp, + int bpp_step_x16, int timeslots) { int i, ret; - int output_bpp = intel_dp_output_bpp(pipe_config->output_format, pipe_bpp); - - /* Compressed BPP should be less than the Input DSC bpp */ - max_bpp_x16 = min(max_bpp_x16, fxp_q4_from_int(output_bpp - 1)); for (i = ARRAY_SIZE(valid_dsc_bpp) - 1; i >= 0; i--) { if (valid_dsc_bpp[i] < fxp_q4_to_int(min_bpp_x16) || @@ -2116,24 +2112,17 @@ icl_dsc_compute_link_config(struct intel_dp *intel_dp, */ static int xelpd_dsc_compute_link_config(struct intel_dp *intel_dp, - const struct intel_connector *connector, struct intel_crtc_state *pipe_config, const struct link_config_limits *limits, int min_bpp_x16, int max_bpp_x16, - int pipe_bpp, + int bpp_step_x16, int timeslots) { struct intel_display *display = to_intel_display(intel_dp); - int output_bpp = intel_dp_output_bpp(pipe_config->output_format, pipe_bpp); - int bpp_x16, bpp_step_x16; + int bpp_x16; int ret; - bpp_step_x16 = intel_dp_dsc_bpp_step_x16(connector); - - /* Compressed BPP should be less than the Input DSC bpp */ - max_bpp_x16 = min(max_bpp_x16, fxp_q4_from_int(output_bpp) - bpp_step_x16); - for (bpp_x16 = max_bpp_x16; bpp_x16 >= min_bpp_x16; bpp_x16 -= bpp_step_x16) { if (intel_dp->force_dsc_fractional_bpp_en && !fxp_q4_to_frac(bpp_x16)) @@ -2165,9 +2154,10 @@ static int dsc_compute_compressed_bpp(struct intel_dp *intel_dp, { struct intel_display *display = to_intel_display(intel_dp); const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; + int output_bpp; int dsc_min_bpp; int dsc_max_bpp; - int min_bpp_x16, max_bpp_x16; + int min_bpp_x16, max_bpp_x16, bpp_step_x16; int dsc_joiner_max_bpp; int num_joined_pipes = intel_crtc_num_joined_pipes(pipe_config); @@ -2182,11 +2172,17 @@ static int dsc_compute_compressed_bpp(struct intel_dp *intel_dp, min_bpp_x16 = fxp_q4_from_int(dsc_min_bpp); max_bpp_x16 = fxp_q4_from_int(dsc_max_bpp); + bpp_step_x16 = intel_dp_dsc_bpp_step_x16(connector); + + /* Compressed BPP should be less than the Input DSC bpp */ + output_bpp = intel_dp_output_bpp(pipe_config->output_format, pipe_bpp); + max_bpp_x16 = min(max_bpp_x16, fxp_q4_from_int(output_bpp) - bpp_step_x16); + if (DISPLAY_VER(display) >= 13) - return xelpd_dsc_compute_link_config(intel_dp, connector, pipe_config, limits, - min_bpp_x16, max_bpp_x16, pipe_bpp, timeslots); + return xelpd_dsc_compute_link_config(intel_dp, pipe_config, limits, + min_bpp_x16, max_bpp_x16, bpp_step_x16, timeslots); return icl_dsc_compute_link_config(intel_dp, pipe_config, limits, - min_bpp_x16, max_bpp_x16, pipe_bpp, timeslots); + min_bpp_x16, max_bpp_x16, bpp_step_x16, timeslots); } int intel_dp_dsc_min_src_input_bpc(void) From patchwork Fri Jan 31 12:49:59 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13955347 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1C312C0218F for ; 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X-CSE-ConnectionGUID: 6g+ODueDTeStKlgSkl9HAg== X-CSE-MsgGUID: ardhGeIqQmKzJKG6wOcVOA== X-IronPort-AV: E=McAfee;i="6700,10204,11332"; a="38599511" X-IronPort-AV: E=Sophos;i="6.13,248,1732608000"; d="scan'208";a="38599511" Received: from orviesa004.jf.intel.com ([10.64.159.144]) by orvoesa112.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 Jan 2025 04:50:48 -0800 X-CSE-ConnectionGUID: OjcsF8BuT7O9b+r+WyKD0g== X-CSE-MsgGUID: i96r6O2fTgyLC3dqGRbA6g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.13,248,1732608000"; d="scan'208";a="114617011" Received: from mwiniars-desk2.ger.corp.intel.com (HELO localhost) ([10.245.246.174]) by orviesa004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 Jan 2025 04:50:47 -0800 From: Jani Nikula To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: imre.deak@intel.com, jani.nikula@intel.com Subject: [PATCH 06/14] drm/i915/dp: Change icl_dsc_compute_link_config() DSC BPP iteration Date: Fri, 31 Jan 2025 14:49:59 +0200 Message-Id: X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Instead of iterating the valid BPP array directly, switch to the same approach as xelpd_dsc_compute_link_config(), with a separate function to check if the DSC BPP is valid. This prepares us for unifying the platform specific functions. Signed-off-by: Jani Nikula Reviewed-by: Imre Deak --- drivers/gpu/drm/i915/display/intel_dp.c | 33 +++++++++++++++++++------ 1 file changed, 26 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 4e7b3dd4067c..ac67f2d2f86a 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -2069,6 +2069,26 @@ static int intel_dp_dsc_bpp_step_x16(const struct intel_connector *connector) return 16 / incr; } +/* Note: This is not universally usable! */ +static bool intel_dp_dsc_valid_bpp(struct intel_dp *intel_dp, int bpp_x16) +{ + struct intel_display *display = to_intel_display(intel_dp); + int i; + + if (DISPLAY_VER(display) >= 13) + return true; + + if (fxp_q4_to_frac(bpp_x16)) + return false; + + for (i = 0; i < ARRAY_SIZE(valid_dsc_bpp); i++) { + if (fxp_q4_to_int(bpp_x16) == valid_dsc_bpp[i]) + return true; + } + + return false; +} + /* * From a list of valid compressed bpps try different compressed bpp and find a * suitable link configuration that can support it. @@ -2082,21 +2102,20 @@ icl_dsc_compute_link_config(struct intel_dp *intel_dp, int bpp_step_x16, int timeslots) { - int i, ret; + int bpp_x16; + int ret; - for (i = ARRAY_SIZE(valid_dsc_bpp) - 1; i >= 0; i--) { - if (valid_dsc_bpp[i] < fxp_q4_to_int(min_bpp_x16) || - valid_dsc_bpp[i] > fxp_q4_to_int(max_bpp_x16)) + for (bpp_x16 = max_bpp_x16; bpp_x16 >= min_bpp_x16; bpp_x16 -= bpp_step_x16) { + if (!intel_dp_dsc_valid_bpp(intel_dp, bpp_x16)) continue; ret = dsc_compute_link_config(intel_dp, pipe_config, limits, - valid_dsc_bpp[i] << 4, + bpp_x16, timeslots); if (ret == 0) { - pipe_config->dsc.compressed_bpp_x16 = - fxp_q4_from_int(valid_dsc_bpp[i]); + pipe_config->dsc.compressed_bpp_x16 = bpp_x16; return 0; } } From patchwork Fri Jan 31 12:50:00 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13955348 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CCBE8C0218F for ; Fri, 31 Jan 2025 12:50:54 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7C72B10EA95; Fri, 31 Jan 2025 12:50:54 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="IWzj2Nad"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.20]) by gabe.freedesktop.org (Postfix) with ESMTPS id 6321C10EA9A; Fri, 31 Jan 2025 12:50:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1738327853; x=1769863853; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=NShLCEeP7+JUyTgdizfWhPDIxhpz53s75/ZHdLwtaDE=; b=IWzj2NadTgwlvcXJ0f003vJooFRNkIrD2HmC48XT0RV6feIJDhPW84xE HnJVRLSECGDvfsJRR2NuWtcuASvHmmvfQRLJfiAkOrJQ3UbSNSskqoRDn q9dJ0Z1caGRDzgMUe4JjeKVPkHpR6S8azILPJzC9Bxd1/Qmu/S48CT8Ng VYnMQ9DYmD3+g6YE8SNzxmbMCEEtAvf1vegdCY+imD4B9fAbZNRz9MTwp gHtasalM51p0bxv5E52k0fxefjeKyTGII97PYwkPZCr9oOhplVdyaiPve n6LAloodzAM/00lnY7a/QGbRt5d2ijnhM0khfqU9b7A9t3xPLDes1FEit Q==; X-CSE-ConnectionGUID: 20s74/KJTZOLadKJalGMhw== X-CSE-MsgGUID: vgFfRefVSQqze90PBo8oWA== X-IronPort-AV: E=McAfee;i="6700,10204,11332"; a="38599519" X-IronPort-AV: E=Sophos;i="6.13,248,1732608000"; d="scan'208";a="38599519" Received: from orviesa004.jf.intel.com ([10.64.159.144]) by orvoesa112.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 Jan 2025 04:50:53 -0800 X-CSE-ConnectionGUID: JloUgm7XQxmgz96g+5B++A== X-CSE-MsgGUID: ejIOGlAASE6RVBPddkNQgQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.13,248,1732608000"; d="scan'208";a="114617047" Received: from mwiniars-desk2.ger.corp.intel.com (HELO localhost) ([10.245.246.174]) by orviesa004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 Jan 2025 04:50:51 -0800 From: Jani Nikula To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: imre.deak@intel.com, jani.nikula@intel.com Subject: [PATCH 07/14] drm/i915/dp: Move force_dsc_fractional_bpp_en check to intel_dp_dsc_valid_bpp() Date: Fri, 31 Jan 2025 14:50:00 +0200 Message-Id: <2d8cdfef422dc2229d3ead2201bff4a321cbbdd3.1738327620.git.jani.nikula@intel.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Add the fractional DSC BPP force check to intel_dp_dsc_valid_bpp(), and use that in xelpd_dsc_compute_link_config(). This is another step closer towards unifying the platform specific functions. Signed-off-by: Jani Nikula Reviewed-by: Imre Deak --- drivers/gpu/drm/i915/display/intel_dp.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index ac67f2d2f86a..c7de9efcd740 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -2075,8 +2075,12 @@ static bool intel_dp_dsc_valid_bpp(struct intel_dp *intel_dp, int bpp_x16) struct intel_display *display = to_intel_display(intel_dp); int i; - if (DISPLAY_VER(display) >= 13) + if (DISPLAY_VER(display) >= 13) { + if (intel_dp->force_dsc_fractional_bpp_en && !fxp_q4_to_frac(bpp_x16)) + return false; + return true; + } if (fxp_q4_to_frac(bpp_x16)) return false; @@ -2143,9 +2147,9 @@ xelpd_dsc_compute_link_config(struct intel_dp *intel_dp, int ret; for (bpp_x16 = max_bpp_x16; bpp_x16 >= min_bpp_x16; bpp_x16 -= bpp_step_x16) { - if (intel_dp->force_dsc_fractional_bpp_en && - !fxp_q4_to_frac(bpp_x16)) + if (!intel_dp_dsc_valid_bpp(intel_dp, bpp_x16)) continue; + ret = dsc_compute_link_config(intel_dp, pipe_config, limits, From patchwork Fri Jan 31 12:50:01 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13955349 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2275FC02192 for ; Fri, 31 Jan 2025 12:51:00 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C600210EA93; Fri, 31 Jan 2025 12:50:59 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="TFpAVL4c"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.20]) by gabe.freedesktop.org (Postfix) with ESMTPS id AD2AD10EA9A; Fri, 31 Jan 2025 12:50:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1738327859; x=1769863859; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=S7VwjnPLg8VR0niyUQUdrQf2W1aLa4VjFvIJJoKJ7CI=; b=TFpAVL4cHDTZOoYdO/mMEAPhiUzJjfuDF9GvOHIr4dJrLBLAmuxesNMD pf2+1fAW2VTuHcpRrc9FarSLtSBha7RaZWMtudxjUf23+QUfHjmDvUws0 YQTjwKpQc14/c0m+LfFw+FbhlOyV67/5K1HQZIgWjQEwfKmPJ6w6Exig5 XZ+JcEOxHz8pXTywfEh4GFpVooq4sT4TEVIgvLH8c/akCPini/TIYS43j af+ifdjkaHdLuFsfl9WtFnCcld/UYlUqUMyFiAyNucCTTOBCrzT+Gvbdd 0cxApfIAQpGJZWWfrapmyGvb0eHHWDk/XGBL2YWotQjVkcz3RepXdROir g==; X-CSE-ConnectionGUID: xeag6GpuRfSn4G2WVc5j0Q== X-CSE-MsgGUID: BzDEy0D2QhSEgMdoai03tA== X-IronPort-AV: E=McAfee;i="6700,10204,11332"; a="38599530" X-IronPort-AV: E=Sophos;i="6.13,248,1732608000"; d="scan'208";a="38599530" Received: from orviesa004.jf.intel.com ([10.64.159.144]) by orvoesa112.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 Jan 2025 04:50:59 -0800 X-CSE-ConnectionGUID: KzIcuXUWRXe/UKH9ev3+Wg== X-CSE-MsgGUID: N/38TzSHT8Wsh7Gre57uOQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.13,248,1732608000"; d="scan'208";a="114617063" Received: from mwiniars-desk2.ger.corp.intel.com (HELO localhost) ([10.245.246.174]) by orviesa004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 Jan 2025 04:50:57 -0800 From: Jani Nikula To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: imre.deak@intel.com, jani.nikula@intel.com Subject: [PATCH 08/14] drm/i915/dp: Unify DSC link config functions Date: Fri, 31 Jan 2025 14:50:01 +0200 Message-Id: X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" {icl,xelpd}_dsc_compute_link_config() are now effectively the same, and can be unified to a single platform independent function. Signed-off-by: Jani Nikula Reviewed-by: Imre Deak --- drivers/gpu/drm/i915/display/intel_dp.c | 49 +++---------------------- 1 file changed, 5 insertions(+), 44 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index c7de9efcd740..11a1ac28e21e 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -2094,47 +2094,11 @@ static bool intel_dp_dsc_valid_bpp(struct intel_dp *intel_dp, int bpp_x16) } /* - * From a list of valid compressed bpps try different compressed bpp and find a - * suitable link configuration that can support it. + * Find the max compressed BPP we can find a link configuration for. The BPPs to + * try depend on the source (platform) and sink. */ static int -icl_dsc_compute_link_config(struct intel_dp *intel_dp, - struct intel_crtc_state *pipe_config, - const struct link_config_limits *limits, - int min_bpp_x16, - int max_bpp_x16, - int bpp_step_x16, - int timeslots) -{ - int bpp_x16; - int ret; - - for (bpp_x16 = max_bpp_x16; bpp_x16 >= min_bpp_x16; bpp_x16 -= bpp_step_x16) { - if (!intel_dp_dsc_valid_bpp(intel_dp, bpp_x16)) - continue; - - ret = dsc_compute_link_config(intel_dp, - pipe_config, - limits, - bpp_x16, - timeslots); - if (ret == 0) { - pipe_config->dsc.compressed_bpp_x16 = bpp_x16; - return 0; - } - } - - return -EINVAL; -} - -/* - * From XE_LPD onwards we supports compression bpps in steps of 1 up to - * uncompressed bpp-1. So we start from max compressed bpp and see if any - * link configuration is able to support that compressed bpp, if not we - * step down and check for lower compressed bpp. - */ -static int -xelpd_dsc_compute_link_config(struct intel_dp *intel_dp, +do_dsc_compute_compressed_bpp(struct intel_dp *intel_dp, struct intel_crtc_state *pipe_config, const struct link_config_limits *limits, int min_bpp_x16, @@ -2201,11 +2165,8 @@ static int dsc_compute_compressed_bpp(struct intel_dp *intel_dp, output_bpp = intel_dp_output_bpp(pipe_config->output_format, pipe_bpp); max_bpp_x16 = min(max_bpp_x16, fxp_q4_from_int(output_bpp) - bpp_step_x16); - if (DISPLAY_VER(display) >= 13) - return xelpd_dsc_compute_link_config(intel_dp, pipe_config, limits, - min_bpp_x16, max_bpp_x16, bpp_step_x16, timeslots); - return icl_dsc_compute_link_config(intel_dp, pipe_config, limits, - min_bpp_x16, max_bpp_x16, bpp_step_x16, timeslots); + return do_dsc_compute_compressed_bpp(intel_dp, pipe_config, limits, + min_bpp_x16, max_bpp_x16, bpp_step_x16, timeslots); } int intel_dp_dsc_min_src_input_bpc(void) From patchwork Fri Jan 31 12:50:02 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13955350 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8B49DC02192 for ; Fri, 31 Jan 2025 12:51:05 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 23C4010EA9D; Fri, 31 Jan 2025 12:51:05 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="O7NBIvIH"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.20]) by gabe.freedesktop.org (Postfix) with ESMTPS id DDD6810EA9C; Fri, 31 Jan 2025 12:51:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1738327864; x=1769863864; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=fmIYes2lneqc3XBA0BaMB3UA/YCuxW5mlLPSf1PyDfw=; b=O7NBIvIHJPyBk9t76BKyT+xjQW2cdgnY8o1hPyhh4/AAjzp+yk11ncC3 ptZh8koIWZ2/sW2qhb7Ur3uBw1oSACnp4FfgcWDPhY4UoDGllTt8sBbjl xNSwB6FmEvUJk2ahXZwRZfz304r2z8W9wXxKD4pX99ImsUIAVrARjehcQ 6/j1mfgNth3JPPjdnvg2zHfxhHiHrAHOAQu3ivJLZQ/q+KBoAi/IhJLlM 1xLFvidR5un5loXcJVoUZNwYkjyOwjthAIGQPIcaUraQ49esWj0Bovkip JLk1C0/AYtWb6RxW+eGz0Aq/1R+HmM0PYmhoFhPkkDvUOCw9EsMtn47tw A==; X-CSE-ConnectionGUID: W0pCzgaLQDKi8Bf/L/5RQQ== X-CSE-MsgGUID: mLioM2COTiqa+3ijKtMNSg== X-IronPort-AV: E=McAfee;i="6700,10204,11332"; a="38599536" X-IronPort-AV: E=Sophos;i="6.13,248,1732608000"; d="scan'208";a="38599536" Received: from orviesa004.jf.intel.com ([10.64.159.144]) by orvoesa112.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 Jan 2025 04:51:04 -0800 X-CSE-ConnectionGUID: TbStuoxMSI6kGZctckYbdA== X-CSE-MsgGUID: LJPL37VpRNKcZB3zWaxTCg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.13,248,1732608000"; d="scan'208";a="114617075" Received: from mwiniars-desk2.ger.corp.intel.com (HELO localhost) ([10.245.246.174]) by orviesa004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 Jan 2025 04:51:02 -0800 From: Jani Nikula To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: imre.deak@intel.com, jani.nikula@intel.com Subject: [PATCH 09/14] drm/i915/dp: Inline do_dsc_compute_compressed_bpp() Date: Fri, 31 Jan 2025 14:50:02 +0200 Message-Id: <91ae42cbdffe4938a665667955c577f887b92b9d.1738327620.git.jani.nikula@intel.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" With just the one platform independent loop left in do_dsc_compute_compressed_bpp(), we don't really need the extra function that is simply becoming increasingly hard to even figure out a decent name for. Just merge the whole thing to dsc_compute_compressed_bpp(). Good riddance to the short lived do_dsc_compute_compressed_bpp(). Signed-off-by: Jani Nikula Reviewed-by: Imre Deak --- drivers/gpu/drm/i915/display/intel_dp.c | 60 ++++++++++--------------- 1 file changed, 23 insertions(+), 37 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 11a1ac28e21e..185c9f7e8538 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -2097,41 +2097,6 @@ static bool intel_dp_dsc_valid_bpp(struct intel_dp *intel_dp, int bpp_x16) * Find the max compressed BPP we can find a link configuration for. The BPPs to * try depend on the source (platform) and sink. */ -static int -do_dsc_compute_compressed_bpp(struct intel_dp *intel_dp, - struct intel_crtc_state *pipe_config, - const struct link_config_limits *limits, - int min_bpp_x16, - int max_bpp_x16, - int bpp_step_x16, - int timeslots) -{ - struct intel_display *display = to_intel_display(intel_dp); - int bpp_x16; - int ret; - - for (bpp_x16 = max_bpp_x16; bpp_x16 >= min_bpp_x16; bpp_x16 -= bpp_step_x16) { - if (!intel_dp_dsc_valid_bpp(intel_dp, bpp_x16)) - continue; - - ret = dsc_compute_link_config(intel_dp, - pipe_config, - limits, - bpp_x16, - timeslots); - if (ret == 0) { - pipe_config->dsc.compressed_bpp_x16 = bpp_x16; - if (intel_dp->force_dsc_fractional_bpp_en && - fxp_q4_to_frac(bpp_x16)) - drm_dbg_kms(display->drm, - "Forcing DSC fractional bpp\n"); - - return 0; - } - } - return -EINVAL; -} - static int dsc_compute_compressed_bpp(struct intel_dp *intel_dp, const struct intel_connector *connector, struct intel_crtc_state *pipe_config, @@ -2147,6 +2112,8 @@ static int dsc_compute_compressed_bpp(struct intel_dp *intel_dp, int min_bpp_x16, max_bpp_x16, bpp_step_x16; int dsc_joiner_max_bpp; int num_joined_pipes = intel_crtc_num_joined_pipes(pipe_config); + int bpp_x16; + int ret; dsc_min_bpp = fxp_q4_to_int_roundup(limits->link.min_bpp_x16); @@ -2165,8 +2132,27 @@ static int dsc_compute_compressed_bpp(struct intel_dp *intel_dp, output_bpp = intel_dp_output_bpp(pipe_config->output_format, pipe_bpp); max_bpp_x16 = min(max_bpp_x16, fxp_q4_from_int(output_bpp) - bpp_step_x16); - return do_dsc_compute_compressed_bpp(intel_dp, pipe_config, limits, - min_bpp_x16, max_bpp_x16, bpp_step_x16, timeslots); + for (bpp_x16 = max_bpp_x16; bpp_x16 >= min_bpp_x16; bpp_x16 -= bpp_step_x16) { + if (!intel_dp_dsc_valid_bpp(intel_dp, bpp_x16)) + continue; + + ret = dsc_compute_link_config(intel_dp, + pipe_config, + limits, + bpp_x16, + timeslots); + if (ret == 0) { + pipe_config->dsc.compressed_bpp_x16 = bpp_x16; + if (intel_dp->force_dsc_fractional_bpp_en && + fxp_q4_to_frac(bpp_x16)) + drm_dbg_kms(display->drm, + "Forcing DSC fractional bpp\n"); + + return 0; + } + } + + return -EINVAL; } int intel_dp_dsc_min_src_input_bpc(void) From patchwork Fri Jan 31 12:50:03 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13955351 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7E2A6C02192 for ; Fri, 31 Jan 2025 12:51:11 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id EEA0010E086; Fri, 31 Jan 2025 12:51:10 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="DPX65tr4"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.14]) by gabe.freedesktop.org (Postfix) with ESMTPS id 0E7E010E086; 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31 Jan 2025 04:51:09 -0800 X-CSE-ConnectionGUID: 2oscXlUGQWODo0+d9oUuDg== X-CSE-MsgGUID: bqbmNO1bR7q4d8Nivyqpsg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.13,248,1732608000"; d="scan'208";a="110194437" Received: from mwiniars-desk2.ger.corp.intel.com (HELO localhost) ([10.245.246.174]) by fmviesa010-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 Jan 2025 04:51:07 -0800 From: Jani Nikula To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: imre.deak@intel.com, jani.nikula@intel.com Subject: [PATCH 10/14] drm/i915/dp: Simplify input BPP checks in intel_dp_dsc_compute_pipe_bpp() Date: Fri, 31 Jan 2025 14:50:03 +0200 Message-Id: <5559b14d6af4e001677f23454d6bd8b3606b3d7a.1738327620.git.jani.nikula@intel.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Drop the extra local variables and simplify the conditions. We don't have to try to special case the loop condition and break in the validity checks. Signed-off-by: Jani Nikula Reviewed-by: Imre Deak --- drivers/gpu/drm/i915/display/intel_dp.c | 10 ++-------- 1 file changed, 2 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 185c9f7e8538..7a8a4df1bf1e 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -2202,8 +2202,6 @@ static int intel_dp_dsc_compute_pipe_bpp(struct intel_dp *intel_dp, { const struct intel_connector *connector = to_intel_connector(conn_state->connector); - int dsc_max_bpp; - int dsc_min_bpp; u8 dsc_bpc[3] = {}; int forced_bpp, pipe_bpp; int num_bpc, i, ret; @@ -2219,9 +2217,6 @@ static int intel_dp_dsc_compute_pipe_bpp(struct intel_dp *intel_dp, } } - dsc_max_bpp = limits->pipe.max_bpp; - dsc_min_bpp = limits->pipe.min_bpp; - /* * Get the maximum DSC bpc that will be supported by any valid * link configuration and compressed bpp. @@ -2229,10 +2224,9 @@ static int intel_dp_dsc_compute_pipe_bpp(struct intel_dp *intel_dp, num_bpc = drm_dp_dsc_sink_supported_input_bpcs(connector->dp.dsc_dpcd, dsc_bpc); for (i = 0; i < num_bpc; i++) { pipe_bpp = dsc_bpc[i] * 3; - if (pipe_bpp < dsc_min_bpp) - break; - if (pipe_bpp > dsc_max_bpp) + if (pipe_bpp < limits->pipe.min_bpp || pipe_bpp > limits->pipe.max_bpp) continue; + ret = dsc_compute_compressed_bpp(intel_dp, connector, pipe_config, limits, pipe_bpp, timeslots); if (ret == 0) { From patchwork Fri Jan 31 12:50:04 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13955352 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 301F9C02196 for ; Fri, 31 Jan 2025 12:51:17 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C867810EAA1; Fri, 31 Jan 2025 12:51:16 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="IoDYbgGZ"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.14]) by gabe.freedesktop.org (Postfix) with ESMTPS id E59C110EA9A; Fri, 31 Jan 2025 12:51:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1738327874; x=1769863874; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=jf5XCInE2bfgH9zC46aDkcbQ1MKt/rD+BOa0dp7Dhuo=; b=IoDYbgGZ30P2VbT/JzHTjba5jMq6KcCJTCbV795IowNRN1XUAhQMY6A2 888lnTKZ70+OrcwhmSsgZ8YKuSFszq52xRQyGDSf5+k8ZMJPKHHszD09C 19dGIj9lPJtkq6yjvWYPh7KDMxHKEy2coTzeZ3FYMzryEQDGJL4HOfIwk nrMfILdirUA7lOsuHUsVLaicWFF8NgjZU2c/duHymWawehVYJACi7/Bo8 soCA3tfn8nHNvE+alerUE4Zr8MOCmgnjgk55XmcXYhp56QlC9Zq6cHRUK ba5b00Gsb0uA6lbkM0b1/mu0CU5aJnewrHgWlRmcQwdDat29KFayv2XQb w==; X-CSE-ConnectionGUID: Z5KnxC3ERyS3h7i//LtNPQ== X-CSE-MsgGUID: jCaNUzw4TWeyU/4fw2xfMw== X-IronPort-AV: E=McAfee;i="6700,10204,11332"; a="42645184" X-IronPort-AV: E=Sophos;i="6.13,248,1732608000"; d="scan'208";a="42645184" Received: from fmviesa010.fm.intel.com ([10.60.135.150]) by orvoesa106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 Jan 2025 04:51:14 -0800 X-CSE-ConnectionGUID: lW7NceZvQziHT6CQWKDGXQ== X-CSE-MsgGUID: 8DJlrTp1TlSjbT1kp6IUew== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.13,248,1732608000"; d="scan'208";a="110194462" Received: from mwiniars-desk2.ger.corp.intel.com (HELO localhost) ([10.245.246.174]) by fmviesa010-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 Jan 2025 04:51:12 -0800 From: Jani Nikula To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: imre.deak@intel.com, jani.nikula@intel.com Subject: [PATCH 11/14] drm/i915/dp: Use int for compressed BPP in dsc_compute_link_config() Date: Fri, 31 Jan 2025 14:50:04 +0200 Message-Id: X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Just use ints unless there are actual reasons to do otherwise. Here, there are not. Signed-off-by: Jani Nikula Reviewed-by: Imre Deak --- drivers/gpu/drm/i915/display/intel_dp.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 7a8a4df1bf1e..7c6d277729d0 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -1926,7 +1926,7 @@ static bool intel_dp_dsc_supports_format(const struct intel_connector *connector return drm_dp_dsc_sink_supports_format(connector->dp.dsc_dpcd, sink_dsc_format); } -static bool is_bw_sufficient_for_dsc_config(u16 compressed_bppx16, u32 link_clock, +static bool is_bw_sufficient_for_dsc_config(int dsc_bpp_x16, u32 link_clock, u32 lane_count, u32 mode_clock, enum intel_output_format output_format, int timeslots) @@ -1934,7 +1934,7 @@ static bool is_bw_sufficient_for_dsc_config(u16 compressed_bppx16, u32 link_cloc u32 available_bw, required_bw; available_bw = (link_clock * lane_count * timeslots * 16) / 8; - required_bw = compressed_bppx16 * (intel_dp_mode_to_fec_clock(mode_clock)); + required_bw = dsc_bpp_x16 * (intel_dp_mode_to_fec_clock(mode_clock)); return available_bw > required_bw; } @@ -1942,7 +1942,7 @@ static bool is_bw_sufficient_for_dsc_config(u16 compressed_bppx16, u32 link_cloc static int dsc_compute_link_config(struct intel_dp *intel_dp, struct intel_crtc_state *pipe_config, const struct link_config_limits *limits, - u16 compressed_bppx16, + int dsc_bpp_x16, int timeslots) { const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; @@ -1957,7 +1957,7 @@ static int dsc_compute_link_config(struct intel_dp *intel_dp, for (lane_count = limits->min_lane_count; lane_count <= limits->max_lane_count; lane_count <<= 1) { - if (!is_bw_sufficient_for_dsc_config(compressed_bppx16, link_rate, + if (!is_bw_sufficient_for_dsc_config(dsc_bpp_x16, link_rate, lane_count, adjusted_mode->clock, pipe_config->output_format, timeslots)) From patchwork Fri Jan 31 12:50:05 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13955353 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 60CFDC02195 for ; Fri, 31 Jan 2025 12:51:20 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id EC2BE10EAA3; Fri, 31 Jan 2025 12:51:19 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="X8bgPONM"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.14]) by gabe.freedesktop.org (Postfix) with ESMTPS id D1DF110EAA2; Fri, 31 Jan 2025 12:51:18 +0000 (UTC) DKIM-Signature: v=1; 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d="scan'208";a="110194476" Received: from mwiniars-desk2.ger.corp.intel.com (HELO localhost) ([10.245.246.174]) by fmviesa010-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 Jan 2025 04:51:17 -0800 From: Jani Nikula To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: imre.deak@intel.com, jani.nikula@intel.com Subject: [PATCH 12/14] drm/i915/dp: Drop compute_pipe_bpp parameter from intel_dp_dsc_compute_config() Date: Fri, 31 Jan 2025 14:50:05 +0200 Message-Id: <82a4b84711b1416bb3382f5d8383fe65ab88159a.1738327620.git.jani.nikula@intel.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" The parameter is basically just a proxy for whether the function is being called for DP SST or DP MST. We can figure this out from crtc state. Signed-off-by: Jani Nikula Reviewed-by: Imre Deak --- drivers/gpu/drm/i915/display/intel_dp.c | 14 ++++++-------- drivers/gpu/drm/i915/display/intel_dp.h | 3 +-- drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 +- 3 files changed, 8 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 7c6d277729d0..0f1fa4afb808 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -2307,8 +2307,7 @@ int intel_dp_dsc_compute_config(struct intel_dp *intel_dp, struct intel_crtc_state *pipe_config, struct drm_connector_state *conn_state, const struct link_config_limits *limits, - int timeslots, - bool compute_pipe_bpp) + int timeslots) { struct intel_display *display = to_intel_display(intel_dp); const struct intel_connector *connector = @@ -2316,6 +2315,7 @@ int intel_dp_dsc_compute_config(struct intel_dp *intel_dp, const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; int num_joined_pipes = intel_crtc_num_joined_pipes(pipe_config); + bool is_mst = intel_crtc_has_type(pipe_config, INTEL_OUTPUT_DP_MST); int ret; intel_dp_fec_compute_config(intel_dp, pipe_config); @@ -2324,12 +2324,10 @@ int intel_dp_dsc_compute_config(struct intel_dp *intel_dp, return -EINVAL; /* - * compute pipe bpp is set to false for DP MST DSC case - * and compressed_bpp is calculated same time once - * vpci timeslots are allocated, because overall bpp - * calculation procedure is bit different for MST case. + * Link parameters, pipe bpp and compressed bpp have already been + * figured out for DP MST DSC. */ - if (compute_pipe_bpp) { + if (!is_mst) { if (intel_dp_is_edp(intel_dp)) ret = intel_edp_dsc_compute_pipe_bpp(intel_dp, pipe_config, conn_state, limits); @@ -2640,7 +2638,7 @@ intel_dp_compute_link_config(struct intel_encoder *encoder, return -EINVAL; ret = intel_dp_dsc_compute_config(intel_dp, pipe_config, - conn_state, &limits, 64, true); + conn_state, &limits, 64); if (ret < 0) return ret; } diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h index ffc27f8ad226..9189db4c2594 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.h +++ b/drivers/gpu/drm/i915/display/intel_dp.h @@ -76,8 +76,7 @@ int intel_dp_dsc_compute_config(struct intel_dp *intel_dp, struct intel_crtc_state *pipe_config, struct drm_connector_state *conn_state, const struct link_config_limits *limits, - int timeslots, - bool recompute_pipe_bpp); + int timeslots); void intel_dp_audio_compute_config(struct intel_encoder *encoder, struct intel_crtc_state *pipe_config, struct drm_connector_state *conn_state); diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c index 60b003bcd1ee..868d0948ca27 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c @@ -657,7 +657,7 @@ static int mst_stream_compute_config(struct intel_encoder *encoder, ret = intel_dp_dsc_compute_config(intel_dp, pipe_config, conn_state, &limits, - pipe_config->dp_m_n.tu, false); + pipe_config->dp_m_n.tu); } if (ret) From patchwork Fri Jan 31 12:50:06 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13955354 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A7BB1C0218F for ; Fri, 31 Jan 2025 12:51:25 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 55D4710EA9E; Fri, 31 Jan 2025 12:51:25 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="Yys9s0gs"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.14]) by gabe.freedesktop.org (Postfix) with ESMTPS id A3CDB10EA9E; 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31 Jan 2025 04:51:24 -0800 X-CSE-ConnectionGUID: 4TUnJ/YrT8y5ZhnjwIPWWw== X-CSE-MsgGUID: cYt1lqdnRVyKo18Uj7oGdA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.13,248,1732608000"; d="scan'208";a="110194493" Received: from mwiniars-desk2.ger.corp.intel.com (HELO localhost) ([10.245.246.174]) by fmviesa010-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 Jan 2025 04:51:22 -0800 From: Jani Nikula To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: imre.deak@intel.com, jani.nikula@intel.com Subject: [PATCH 13/14] drm/i915/dp: Pass connector state all the way to dsc_compute_link_config() Date: Fri, 31 Jan 2025 14:50:06 +0200 Message-Id: <645d950a80df5fd4441d69aba4893ab263b3e555.1738327620.git.jani.nikula@intel.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Going forward, we'll need the connector state in dsc_compute_link_config(). Pass it along through the chain. Maintain the same parameter order where relevant. Signed-off-by: Jani Nikula Reviewed-by: Imre Deak --- drivers/gpu/drm/i915/display/intel_dp.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 0f1fa4afb808..25160a5d12eb 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -1941,6 +1941,7 @@ static bool is_bw_sufficient_for_dsc_config(int dsc_bpp_x16, u32 link_clock, static int dsc_compute_link_config(struct intel_dp *intel_dp, struct intel_crtc_state *pipe_config, + struct drm_connector_state *conn_state, const struct link_config_limits *limits, int dsc_bpp_x16, int timeslots) @@ -2098,13 +2099,14 @@ static bool intel_dp_dsc_valid_bpp(struct intel_dp *intel_dp, int bpp_x16) * try depend on the source (platform) and sink. */ static int dsc_compute_compressed_bpp(struct intel_dp *intel_dp, - const struct intel_connector *connector, struct intel_crtc_state *pipe_config, + struct drm_connector_state *conn_state, const struct link_config_limits *limits, int pipe_bpp, int timeslots) { struct intel_display *display = to_intel_display(intel_dp); + const struct intel_connector *connector = to_intel_connector(conn_state->connector); const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; int output_bpp; int dsc_min_bpp; @@ -2138,6 +2140,7 @@ static int dsc_compute_compressed_bpp(struct intel_dp *intel_dp, ret = dsc_compute_link_config(intel_dp, pipe_config, + conn_state, limits, bpp_x16, timeslots); @@ -2209,7 +2212,7 @@ static int intel_dp_dsc_compute_pipe_bpp(struct intel_dp *intel_dp, forced_bpp = intel_dp_force_dsc_pipe_bpp(intel_dp, limits); if (forced_bpp) { - ret = dsc_compute_compressed_bpp(intel_dp, connector, pipe_config, + ret = dsc_compute_compressed_bpp(intel_dp, pipe_config, conn_state, limits, forced_bpp, timeslots); if (ret == 0) { pipe_config->pipe_bpp = forced_bpp; @@ -2227,7 +2230,7 @@ static int intel_dp_dsc_compute_pipe_bpp(struct intel_dp *intel_dp, if (pipe_bpp < limits->pipe.min_bpp || pipe_bpp > limits->pipe.max_bpp) continue; - ret = dsc_compute_compressed_bpp(intel_dp, connector, pipe_config, + ret = dsc_compute_compressed_bpp(intel_dp, pipe_config, conn_state, limits, pipe_bpp, timeslots); if (ret == 0) { pipe_config->pipe_bpp = pipe_bpp; From patchwork Fri Jan 31 12:50:07 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13955355 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 65877C0218F for ; Fri, 31 Jan 2025 12:51:30 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1252A10EA9A; Fri, 31 Jan 2025 12:51:30 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="YRG0XP9e"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.14]) by gabe.freedesktop.org (Postfix) with ESMTPS id EF5D610EAA2; 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31 Jan 2025 04:51:29 -0800 X-CSE-ConnectionGUID: 1GdWzW5yRiWnZ4XPUnSi+Q== X-CSE-MsgGUID: ACfW7CgXQE+InI08qyvOZg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.13,248,1732608000"; d="scan'208";a="110194515" Received: from mwiniars-desk2.ger.corp.intel.com (HELO localhost) ([10.245.246.174]) by fmviesa010-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 Jan 2025 04:51:27 -0800 From: Jani Nikula To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: imre.deak@intel.com, jani.nikula@intel.com Subject: [PATCH 14/14] drm/i915/mst: Convert intel_dp_mtp_tu_compute_config() to .4 format Date: Fri, 31 Jan 2025 14:50:07 +0200 Message-Id: <887306a47ce4550226f5d54178f667a52840a11c.1738327620.git.jani.nikula@intel.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Move towards always using the fxp q4 or .4 fixed point format for compressed bpp. We'll need to pass the more accurate bpp to this function later on. Always use _x16 naming for variables that are in .4 fixed point for clarity. Signed-off-by: Jani Nikula Reviewed-by: Imre Deak --- drivers/gpu/drm/i915/display/intel_dp.c | 4 +- drivers/gpu/drm/i915/display/intel_dp_mst.c | 52 ++++++++++++--------- drivers/gpu/drm/i915/display/intel_dp_mst.h | 2 +- 3 files changed, 33 insertions(+), 25 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 25160a5d12eb..80f550a59bcb 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -2616,8 +2616,8 @@ intel_dp_compute_link_config(struct intel_encoder *encoder, ret = intel_dp_mtp_tu_compute_config(intel_dp, pipe_config, conn_state, - pipe_config->pipe_bpp, - pipe_config->pipe_bpp, + fxp_q4_from_int(pipe_config->pipe_bpp), + fxp_q4_from_int(pipe_config->pipe_bpp), 0, false); if (ret) dsc_needed = true; diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c index 868d0948ca27..b729e27cdde2 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c @@ -212,7 +212,7 @@ static int intel_dp_mst_dsc_get_slice_count(const struct intel_connector *connec int intel_dp_mtp_tu_compute_config(struct intel_dp *intel_dp, struct intel_crtc_state *crtc_state, struct drm_connector_state *conn_state, - int min_bpp, int max_bpp, int step, bool dsc) + int min_bpp_x16, int max_bpp_x16, int bpp_step_x16, bool dsc) { struct intel_display *display = to_intel_display(intel_dp); struct drm_atomic_state *state = crtc_state->uapi.state; @@ -222,9 +222,14 @@ int intel_dp_mtp_tu_compute_config(struct intel_dp *intel_dp, const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; bool is_mst = intel_dp->is_mst; - int bpp, slots = -EINVAL; + int bpp_x16, slots = -EINVAL; int dsc_slice_count = 0; - int max_dpt_bpp; + int max_dpt_bpp_x16; + + /* shouldn't happen, sanity check */ + drm_WARN_ON(display->drm, !dsc && (fxp_q4_to_frac(min_bpp_x16) || + fxp_q4_to_frac(max_bpp_x16) || + fxp_q4_to_frac(bpp_step_x16))); if (is_mst) { mst_state = drm_atomic_get_mst_topology_state(state, &intel_dp->mst_mgr); @@ -242,15 +247,15 @@ int intel_dp_mtp_tu_compute_config(struct intel_dp *intel_dp, crtc_state->fec_enable = !intel_dp_is_uhbr(crtc_state); } - max_dpt_bpp = intel_dp_mst_max_dpt_bpp(crtc_state, dsc); - if (max_bpp > max_dpt_bpp) { - drm_dbg_kms(display->drm, "Limiting bpp to max DPT bpp (%d -> %d)\n", - max_bpp, max_dpt_bpp); - max_bpp = max_dpt_bpp; + max_dpt_bpp_x16 = fxp_q4_from_int(intel_dp_mst_max_dpt_bpp(crtc_state, dsc)); + if (max_bpp_x16 > max_dpt_bpp_x16) { + drm_dbg_kms(display->drm, "Limiting bpp to max DPT bpp (" FXP_Q4_FMT " -> " FXP_Q4_FMT ")\n", + FXP_Q4_ARGS(max_bpp_x16), FXP_Q4_ARGS(max_dpt_bpp_x16)); + max_bpp_x16 = max_dpt_bpp_x16; } - drm_dbg_kms(display->drm, "Looking for slots in range min bpp %d max bpp %d\n", - min_bpp, max_bpp); + drm_dbg_kms(display->drm, "Looking for slots in range min bpp " FXP_Q4_FMT " max bpp " FXP_Q4_FMT "\n", + FXP_Q4_ARGS(min_bpp_x16), FXP_Q4_ARGS(max_bpp_x16)); if (dsc) { dsc_slice_count = intel_dp_mst_dsc_get_slice_count(connector, crtc_state); @@ -261,14 +266,15 @@ int intel_dp_mtp_tu_compute_config(struct intel_dp *intel_dp, } } - for (bpp = max_bpp; bpp >= min_bpp; bpp -= step) { + for (bpp_x16 = max_bpp_x16; bpp_x16 >= min_bpp_x16; bpp_x16 -= bpp_step_x16) { int local_bw_overhead; int link_bpp_x16; - drm_dbg_kms(display->drm, "Trying bpp %d\n", bpp); + drm_dbg_kms(display->drm, "Trying bpp " FXP_Q4_FMT "\n", FXP_Q4_ARGS(bpp_x16)); - link_bpp_x16 = fxp_q4_from_int(dsc ? bpp : - intel_dp_output_bpp(crtc_state->output_format, bpp)); + link_bpp_x16 = dsc ? bpp_x16 : + fxp_q4_from_int(intel_dp_output_bpp(crtc_state->output_format, + fxp_q4_to_int(bpp_x16))); local_bw_overhead = intel_dp_mst_bw_overhead(crtc_state, false, dsc_slice_count, link_bpp_x16); @@ -356,12 +362,12 @@ int intel_dp_mtp_tu_compute_config(struct intel_dp *intel_dp, } if (!dsc) - crtc_state->pipe_bpp = bpp; + crtc_state->pipe_bpp = fxp_q4_to_int(bpp_x16); else - crtc_state->dsc.compressed_bpp_x16 = fxp_q4_from_int(bpp); + crtc_state->dsc.compressed_bpp_x16 = bpp_x16; - drm_dbg_kms(display->drm, "Got %d slots for pipe bpp %d dsc %d\n", - slots, bpp, dsc); + drm_dbg_kms(display->drm, "Got %d slots for pipe bpp " FXP_Q4_FMT " dsc %d\n", + slots, FXP_Q4_ARGS(bpp_x16), dsc); return 0; } @@ -379,9 +385,9 @@ static int mst_stream_compute_link_config(struct intel_dp *intel_dp, * YUV420 is only half of the pipe bpp value. */ return intel_dp_mtp_tu_compute_config(intel_dp, crtc_state, conn_state, - fxp_q4_to_int(limits->link.min_bpp_x16), - fxp_q4_to_int(limits->link.max_bpp_x16), - 2 * 3, false); + limits->link.min_bpp_x16, + limits->link.max_bpp_x16, + fxp_q4_from_int(2 * 3), false); } static int mst_stream_dsc_compute_link_config(struct intel_dp *intel_dp, @@ -435,7 +441,9 @@ static int mst_stream_dsc_compute_link_config(struct intel_dp *intel_dp, crtc_state->port_clock = limits->max_rate; return intel_dp_mtp_tu_compute_config(intel_dp, crtc_state, conn_state, - min_compressed_bpp, max_compressed_bpp, 1, true); + fxp_q4_from_int(min_compressed_bpp), + fxp_q4_from_int(max_compressed_bpp), + fxp_q4_from_int(1), true); } static int mst_stream_update_slots(struct intel_dp *intel_dp, diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.h b/drivers/gpu/drm/i915/display/intel_dp_mst.h index a713a1c10154..c1bbfeb02ca9 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_mst.h +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.h @@ -34,6 +34,6 @@ bool intel_dp_mst_verify_dpcd_state(struct intel_dp *intel_dp); int intel_dp_mtp_tu_compute_config(struct intel_dp *intel_dp, struct intel_crtc_state *crtc_state, struct drm_connector_state *conn_state, - int min_bpp, int max_bpp, int step, bool dsc); + int min_bpp_x16, int max_bpp_x16, int bpp_step_x16, bool dsc); #endif /* __INTEL_DP_MST_H__ */