From patchwork Mon Feb 3 12:38:13 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13957405 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BAE1AC02197 for ; Mon, 3 Feb 2025 12:49:50 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5EBE310E4A3; Mon, 3 Feb 2025 12:49:50 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="EauzBlJC"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) by gabe.freedesktop.org (Postfix) with ESMTPS id EDC4010E07C; Mon, 3 Feb 2025 12:49:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1738586989; x=1770122989; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=/kYH1lIwNp+YNrHwpP0PsEE90e6JTgR/lT7Fsa4eENU=; b=EauzBlJC2JQZdGsUgZkVuTm6ch3jj+cK3SzzTsId4+33SZGpc6vmkDnP +utE8XCM6EDX06637IeDjix7p88bp1dyeT/eVGUZr7g+MfiBQes3s5dSB GRiw1otDO/QIq9Bsfwazo9x0C/wpMvmOaJgAt5DrOVBVqghelltY46vXh HP3Tk5HcUEBhPWg+bVJCeYNYDB7rfCc9J+R3XsU8p4njAmiqwNlJ48YXd w9JoVx2kwfgNV5yPN8AEiOofvhe8ZKLsnoqfa3p10QNmH1d4oI1XxgI8q AmIn2mKm3/DpNgTS0sd52rOhv0kxpCFTdVueiY5kNB5CubBXPCr3FUNWB w==; X-CSE-ConnectionGUID: WubE32f9TyKZXJMTAwvk5Q== X-CSE-MsgGUID: oZMHobdIQHC+5v9sBNhRVw== X-IronPort-AV: E=McAfee;i="6700,10204,11335"; a="61548014" X-IronPort-AV: E=Sophos;i="6.13,255,1732608000"; d="scan'208";a="61548014" Received: from fmviesa002.fm.intel.com ([10.60.135.142]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2025 04:49:49 -0800 X-CSE-ConnectionGUID: HoixI6T6QfmR450lpJYYOQ== X-CSE-MsgGUID: 9N82FPbeQryKXcoRnNO/HA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="133528793" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by fmviesa002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2025 04:49:46 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, jani.nikula@linux.intel.com, ville.syrjala@linux.intel.com, mitulkumar.ajitkumar.golani@intel.com Subject: [PATCH 01/28] drm/i915/vrr: Remove unwanted comment Date: Mon, 3 Feb 2025 18:08:13 +0530 Message-ID: <20250203123840.3855874-2-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20250203123840.3855874-1-ankit.k.nautiyal@intel.com> References: <20250203123840.3855874-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" The comment about fixed average vtotal is incorrect. Remove it. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_vrr.c | 5 ----- 1 file changed, 5 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index adb51609d0a3..532abdb334b2 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -276,11 +276,6 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state, */ crtc_state->vrr.vmin -= intel_vrr_flipline_offset(display); - /* - * When panel is VRR capable and userspace has - * not enabled adaptive sync mode then Fixed Average - * Vtotal mode should be enabled. - */ if (crtc_state->uapi.vrr_enabled) { crtc_state->vrr.enable = true; crtc_state->mode_flags |= I915_MODE_FLAG_VRR; From patchwork Mon Feb 3 12:38:14 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13957406 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id ECEC8C02198 for ; Mon, 3 Feb 2025 12:49:52 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8B6ED10E4AE; Mon, 3 Feb 2025 12:49:52 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="TuuLtcdE"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) by gabe.freedesktop.org (Postfix) with ESMTPS id F3BD610E4AC; Mon, 3 Feb 2025 12:49:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1738586991; x=1770122991; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=+XOl/Isw9ZU8bERcVgFZLBVJSBv+vL+dgBAMvrIk27c=; b=TuuLtcdEMdLlA+CKE28ywxsRE5fBxwdmcYjl+0KQoShMpLyjRlgmFN8p 2yODs7sA57iGmEGDNcQAuzjOJ+o8me58Z8VnHpPZw0mCpanVxf8dAJUKb aeEOM8VYtOebMtb0FQma3sPaOeSSUAGsZ3ORsJBmWKu/Y9VwYhzHZxmak lGWYpoOvRS8oG67wxhG6rpVbb+zsbvx7Lzr4yYR924dasb2fR9cDhJtLd rGOA1BRelkMyGXp/9gnHsdXhgwsGm/tK8hxEtDklGrkGCl3ox1AfHkGmZ cJ9yYpClZDLOveRuxTKxwvLxn/CM3dNcd4LHfe+8NYJFaHbAKcLlFx+c4 A==; X-CSE-ConnectionGUID: 9pLwOOGpT3meAtGxB95bLw== X-CSE-MsgGUID: 62kuDz0URfKYJ1Vy5fczdA== X-IronPort-AV: E=McAfee;i="6700,10204,11335"; a="61548015" X-IronPort-AV: E=Sophos;i="6.13,255,1732608000"; d="scan'208";a="61548015" Received: from fmviesa002.fm.intel.com ([10.60.135.142]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2025 04:49:51 -0800 X-CSE-ConnectionGUID: T42TGBAFSzCOqvXvyzOvGA== X-CSE-MsgGUID: leok2Ck1RHKqDH0f7Z2jyw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="133528806" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by fmviesa002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2025 04:49:49 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, jani.nikula@linux.intel.com, ville.syrjala@linux.intel.com, mitulkumar.ajitkumar.golani@intel.com Subject: [PATCH 02/28] drm/i915:vrr: Separate out functions to compute vmin and vmax Date: Mon, 3 Feb 2025 18:08:14 +0530 Message-ID: <20250203123840.3855874-3-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20250203123840.3855874-1-ankit.k.nautiyal@intel.com> References: <20250203123840.3855874-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Make helpers to compute vmin and vmax. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_vrr.c | 39 +++++++++++++++++++----- 1 file changed, 31 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index 532abdb334b2..e1bac7d24e18 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -222,6 +222,35 @@ cmrr_get_vtotal(struct intel_crtc_state *crtc_state, bool video_mode_required) return vtotal; } +static +int intel_vrr_compute_vmin(struct intel_connector *connector, + struct drm_display_mode *adjusted_mode) +{ + int vmin; + const struct drm_display_info *info = &connector->base.display_info; + + vmin = DIV_ROUND_UP(adjusted_mode->crtc_clock * 1000, + adjusted_mode->crtc_htotal * info->monitor_range.max_vfreq); + vmin = max_t(int, vmin, adjusted_mode->crtc_vtotal); + + return vmin; +} + +static +int intel_vrr_compute_vmax(struct intel_connector *connector, + struct drm_display_mode *adjusted_mode) +{ + int vmax; + const struct drm_display_info *info = &connector->base.display_info; + + vmax = adjusted_mode->crtc_clock * 1000 / + (adjusted_mode->crtc_htotal * info->monitor_range.min_vfreq); + + vmax = max_t(int, vmax, adjusted_mode->crtc_vtotal); + + return vmax; +} + void intel_vrr_compute_config(struct intel_crtc_state *crtc_state, struct drm_connector_state *conn_state) @@ -232,7 +261,6 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state, struct intel_dp *intel_dp = intel_attached_dp(connector); bool is_edp = intel_dp_is_edp(intel_dp); struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; - const struct drm_display_info *info = &connector->base.display_info; int vmin, vmax; /* @@ -253,13 +281,8 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state, if (HAS_LRR(display)) crtc_state->update_lrr = true; - vmin = DIV_ROUND_UP(adjusted_mode->crtc_clock * 1000, - adjusted_mode->crtc_htotal * info->monitor_range.max_vfreq); - vmax = adjusted_mode->crtc_clock * 1000 / - (adjusted_mode->crtc_htotal * info->monitor_range.min_vfreq); - - vmin = max_t(int, vmin, adjusted_mode->crtc_vtotal); - vmax = max_t(int, vmax, adjusted_mode->crtc_vtotal); + vmin = intel_vrr_compute_vmin(connector, adjusted_mode); + vmax = intel_vrr_compute_vmax(connector, adjusted_mode); if (vmin >= vmax) return; From patchwork Mon Feb 3 12:38:15 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13957407 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AF499C02194 for ; Mon, 3 Feb 2025 12:49:54 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4F2BC10E4A5; Mon, 3 Feb 2025 12:49:54 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; 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a="61548016" X-IronPort-AV: E=Sophos;i="6.13,255,1732608000"; d="scan'208";a="61548016" Received: from fmviesa002.fm.intel.com ([10.60.135.142]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2025 04:49:53 -0800 X-CSE-ConnectionGUID: Rx5pOOLvSd23HE8KEJGJpQ== X-CSE-MsgGUID: 4O/LgDIbR5OiXVGX9sabxQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="133528824" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by fmviesa002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2025 04:49:51 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, jani.nikula@linux.intel.com, ville.syrjala@linux.intel.com, mitulkumar.ajitkumar.golani@intel.com Subject: [PATCH 03/28] drm/i915/vrr: Make helpers for cmrr and vrr timings Date: Mon, 3 Feb 2025 18:08:15 +0530 Message-ID: <20250203123840.3855874-4-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20250203123840.3855874-1-ankit.k.nautiyal@intel.com> References: <20250203123840.3855874-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Separate out functions for computing cmrr and vrr timings. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_vrr.c | 45 +++++++++++++++--------- 1 file changed, 28 insertions(+), 17 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index e1bac7d24e18..f8ae3dc6a304 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -222,6 +222,30 @@ cmrr_get_vtotal(struct intel_crtc_state *crtc_state, bool video_mode_required) return vtotal; } +static +void intel_vrr_compute_cmrr_timings(struct intel_crtc_state *crtc_state) +{ + crtc_state->vrr.enable = true; + crtc_state->cmrr.enable = true; + /* + * TODO: Compute precise target refresh rate to determine + * if video_mode_required should be true. Currently set to + * false due to uncertainty about the precise target + * refresh Rate. + */ + crtc_state->vrr.vmax = cmrr_get_vtotal(crtc_state, false); + crtc_state->vrr.vmin = crtc_state->vrr.vmax; + crtc_state->vrr.flipline = crtc_state->vrr.vmin; + crtc_state->mode_flags |= I915_MODE_FLAG_VRR; +} + +static +void intel_vrr_compute_vrr_timings(struct intel_crtc_state *crtc_state) +{ + crtc_state->vrr.enable = true; + crtc_state->mode_flags |= I915_MODE_FLAG_VRR; +} + static int intel_vrr_compute_vmin(struct intel_connector *connector, struct drm_display_mode *adjusted_mode) @@ -299,23 +323,10 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state, */ crtc_state->vrr.vmin -= intel_vrr_flipline_offset(display); - if (crtc_state->uapi.vrr_enabled) { - crtc_state->vrr.enable = true; - crtc_state->mode_flags |= I915_MODE_FLAG_VRR; - } else if (is_cmrr_frac_required(crtc_state) && is_edp) { - crtc_state->vrr.enable = true; - crtc_state->cmrr.enable = true; - /* - * TODO: Compute precise target refresh rate to determine - * if video_mode_required should be true. Currently set to - * false due to uncertainty about the precise target - * refresh Rate. - */ - crtc_state->vrr.vmax = cmrr_get_vtotal(crtc_state, false); - crtc_state->vrr.vmin = crtc_state->vrr.vmax; - crtc_state->vrr.flipline = crtc_state->vrr.vmin; - crtc_state->mode_flags |= I915_MODE_FLAG_VRR; - } + if (crtc_state->uapi.vrr_enabled) + intel_vrr_compute_vrr_timings(crtc_state); + else if (is_cmrr_frac_required(crtc_state) && is_edp) + intel_vrr_compute_cmrr_timings(crtc_state); if (HAS_AS_SDP(display)) { crtc_state->vrr.vsync_start = From patchwork Mon Feb 3 12:38:16 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13957408 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 04D91C02194 for ; Mon, 3 Feb 2025 12:49:57 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9B13310E4B0; Mon, 3 Feb 2025 12:49:57 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="ZD+cm04v"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) by gabe.freedesktop.org (Postfix) with ESMTPS id F302C10E4B0; Mon, 3 Feb 2025 12:49:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1738586996; x=1770122996; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=3KBH3jfigL1dWjiHBks6aEwljTEY0aj2NyghchJZMuQ=; b=ZD+cm04vG14zWkPZtmGDXW1jlhJGSNFHP6W2YEvw0ZQuuBruCLrEntiE eLCE9qo1h9PxEeWC0vHI1iPBAxIQE7p+AZxI2v3/n+/7jJRTv8PhRPO6b 3hTd/gx+8P9DJb7fUGLJtiYBRgTHp/U4egt1WWOBDq3UAn0qyIevXJk6Q VbHx4lUhQPIlJok+dI6hdrKWMOpa+tvNiAdAquOzyyRseB0iYzExI6BDj +u7FTklBW1yXvShKE49Bka9cC7qCdbTXnudu8/2VF+Oy54xI+4CXdD735 hiQKeplu6S9NYyjY/oscQ91ONkn/onRP2q+Jo1vYWejLc6xR43ihSRbd4 Q==; X-CSE-ConnectionGUID: YoNTlox0QTKQaBrqBNl0bQ== X-CSE-MsgGUID: ht0bJbRxTgC5W5lhqqxHIw== X-IronPort-AV: E=McAfee;i="6700,10204,11335"; a="61548020" X-IronPort-AV: E=Sophos;i="6.13,255,1732608000"; d="scan'208";a="61548020" Received: from fmviesa002.fm.intel.com ([10.60.135.142]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2025 04:49:56 -0800 X-CSE-ConnectionGUID: oK0vKOIWQk+75szw3udc8Q== X-CSE-MsgGUID: uI7N43TqQZOxPt5RGnVLLQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="133528838" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by fmviesa002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2025 04:49:53 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, jani.nikula@linux.intel.com, ville.syrjala@linux.intel.com, mitulkumar.ajitkumar.golani@intel.com Subject: [PATCH 04/28] drm/i915/vrr: Simplify CMRR Enable Check in intel_vrr_get_config Date: Mon, 3 Feb 2025 18:08:16 +0530 Message-ID: <20250203123840.3855874-5-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20250203123840.3855874-1-ankit.k.nautiyal@intel.com> References: <20250203123840.3855874-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Combine the CMRR capability and enable check into a single condition. Set crtc_state->cmrr.enable directly within the combined condition. This will make way to absorb cmrr members in vrr struct. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_vrr.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index f8ae3dc6a304..6f314e209e96 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -503,10 +503,9 @@ void intel_vrr_get_config(struct intel_crtc_state *crtc_state) TRANS_VRR_CTL(display, cpu_transcoder)); crtc_state->vrr.enable = trans_vrr_ctl & VRR_CTL_VRR_ENABLE; - if (HAS_CMRR(display)) - crtc_state->cmrr.enable = (trans_vrr_ctl & VRR_CTL_CMRR_ENABLE); - if (crtc_state->cmrr.enable) { + if (HAS_CMRR(display) && trans_vrr_ctl & VRR_CTL_CMRR_ENABLE) { + crtc_state->cmrr.enable = true; crtc_state->cmrr.cmrr_n = intel_de_read64_2x32(display, TRANS_CMRR_N_LO(display, cpu_transcoder), TRANS_CMRR_N_HI(display, cpu_transcoder)); From patchwork Mon Feb 3 12:38:17 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13957409 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E7F6CC02196 for ; Mon, 3 Feb 2025 12:49:58 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8CD5110E4B2; Mon, 3 Feb 2025 12:49:58 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="AUsS9MeU"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) by gabe.freedesktop.org (Postfix) with ESMTPS id EEA3C10E4B1; Mon, 3 Feb 2025 12:49:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1738586998; x=1770122998; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=raosHNLFckxa/X/zZnL2BS3BBnJNC9fC9Dacw9ovcrM=; b=AUsS9MeUJSJd6Lu/MR+TNtQKuZPRKqB3XcHjdbqKOVSPwMOhkbZi1CY8 ylAuXLTSKNz60uML+iQ4xoAiAArkgTxTLjTh3Re+aZOsqF9+svMlXpGqQ 7d5HX6S/pl1jG3zukTyj82s1f8Hq6Hr6KQJJLyO6Jwl3u0x4qQqWelda2 uc0CZoAAmuJQDL9qv8TDbxvMrWWmue+pP3sZ0lBiBYZfu8SyxR21/I1Qe oLhPKuomiHlMrYvgik9pA3nKsrgotRo0C/z3Dj+Hp0fMD1JnLzwUBHIpW QO3ZKo5j6aT4QNP4MxjSgAOp3ACEAFJsnzAPjmSGT2wvGp6Id1AIIiWbh w==; X-CSE-ConnectionGUID: mVasnVWjQdCZImYIfJK7sw== X-CSE-MsgGUID: 4tgceaXDQSKYKTrkCKrQAA== X-IronPort-AV: E=McAfee;i="6700,10204,11335"; a="61548025" X-IronPort-AV: E=Sophos;i="6.13,255,1732608000"; d="scan'208";a="61548025" Received: from fmviesa002.fm.intel.com ([10.60.135.142]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2025 04:49:58 -0800 X-CSE-ConnectionGUID: rPg1kzfvTb+ywT9hACtCtw== X-CSE-MsgGUID: LAuvssxQS8+/NkX9YvXJAA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="133528854" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by fmviesa002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2025 04:49:56 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, jani.nikula@linux.intel.com, ville.syrjala@linux.intel.com, mitulkumar.ajitkumar.golani@intel.com Subject: [PATCH 05/28] drm/i915/vrr: Introduce new field for VRR mode Date: Mon, 3 Feb 2025 18:08:17 +0530 Message-ID: <20250203123840.3855874-6-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20250203123840.3855874-1-ankit.k.nautiyal@intel.com> References: <20250203123840.3855874-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" The VRR timing generator can be used in multiple modes of operation: dynamic refresh rate (VRR), content-matched refresh rate (CMRR), and fixed refresh rate (Fixed_RR). Currently, VRR and CMRR modes are supported, with Fixed_RR mode forthcoming. To track the different operational modes of the VRR timing generator, introduce a new member 'mode' to the VRR struct. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_display_types.h | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index cb51b7936f93..3195c9f33028 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -935,6 +935,12 @@ void intel_io_mmio_fw_write(void *ctx, i915_reg_t reg, u32 val); typedef void (*intel_io_reg_write)(void *ctx, i915_reg_t reg, u32 val); +enum intel_vrrtg_mode { + INTEL_VRRTG_MODE_NONE, + INTEL_VRRTG_MODE_VRR, + INTEL_VRRTG_MODE_CMRR, +}; + struct intel_crtc_state { /* * uapi (drm) state. This is the software state shown to userspace. @@ -1306,6 +1312,7 @@ struct intel_crtc_state { u8 pipeline_full; u16 flipline, vmin, vmax, guardband; u32 vsync_end, vsync_start; + enum intel_vrrtg_mode mode; } vrr; /* Content Match Refresh Rate state */ From patchwork Mon Feb 3 12:38:18 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13957410 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DE41FC02194 for ; Mon, 3 Feb 2025 12:50:01 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7A42910E4B6; Mon, 3 Feb 2025 12:50:01 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="NJJk2pz/"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4199710E4B4; Mon, 3 Feb 2025 12:50:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1738587000; x=1770123000; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Umy/dFuVZKc34y+ss/fc20XGP2Oh0w3vf2mdWqjsVGk=; b=NJJk2pz/oYlIquARpEpDZru65DU0yXSudiT7oGbq2Fr5xEjO+2u1+dGl FTVwxbUb9yAcgaETPjgmT3R4McB5lAJbn7IzfDxUAhS7fNaErmpqXmiyg Rd4qZxa5phYa/vb6kPlIriW69vIHRl//aXWaSzZMQH4UpYPkbzYXGHUlk x6CGV0P9wCgoO1cAhpc00dO/+eJOyhYCq20HENlHvGALduKU+Aj/FUOzK 0RXH69oLx2JDJu7NxQ5mqo0V02Lq/P2y531ieOcJEGqejcUBlst+HOvj9 6j1gOh7HVPwIe4q8siPmHp3wulgK55+vsAwVcCimMt5ipFH6Gb1bQ+wQd w==; X-CSE-ConnectionGUID: 7ZsL1rKtR4+NjLZ3fZc5ow== X-CSE-MsgGUID: Ml7jx33STuedjCy+hX9aVA== X-IronPort-AV: E=McAfee;i="6700,10204,11335"; a="61548031" X-IronPort-AV: E=Sophos;i="6.13,255,1732608000"; d="scan'208";a="61548031" Received: from fmviesa002.fm.intel.com ([10.60.135.142]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2025 04:50:00 -0800 X-CSE-ConnectionGUID: qpmBZOnoRxabp81Iqz+hIQ== X-CSE-MsgGUID: zPwRsrpeSxW6rih+grJkQw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="133528866" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by fmviesa002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2025 04:49:58 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, jani.nikula@linux.intel.com, ville.syrjala@linux.intel.com, mitulkumar.ajitkumar.golani@intel.com Subject: [PATCH 06/28] drm/i915/vrr: Fill VRR timing generator mode for CMRR and VRR Date: Mon, 3 Feb 2025 18:08:18 +0530 Message-ID: <20250203123840.3855874-7-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20250203123840.3855874-1-ankit.k.nautiyal@intel.com> References: <20250203123840.3855874-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Fill vrr.mode during compute_config and update intel_vrr_get_config() to read vrr.mode based on CMRR and VRR enable conditions. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_display.c | 1 + drivers/gpu/drm/i915/display/intel_vrr.c | 5 +++++ 2 files changed, 6 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index a6383ddde871..9cff080d4ff9 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -5803,6 +5803,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config, if (!fastset) { PIPE_CONF_CHECK_BOOL(vrr.enable); + PIPE_CONF_CHECK_X(vrr.mode); PIPE_CONF_CHECK_I(vrr.vmin); PIPE_CONF_CHECK_I(vrr.vmax); PIPE_CONF_CHECK_I(vrr.flipline); diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index 6f314e209e96..ded5466c5214 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -227,6 +227,7 @@ void intel_vrr_compute_cmrr_timings(struct intel_crtc_state *crtc_state) { crtc_state->vrr.enable = true; crtc_state->cmrr.enable = true; + crtc_state->vrr.mode = INTEL_VRRTG_MODE_CMRR; /* * TODO: Compute precise target refresh rate to determine * if video_mode_required should be true. Currently set to @@ -243,6 +244,7 @@ static void intel_vrr_compute_vrr_timings(struct intel_crtc_state *crtc_state) { crtc_state->vrr.enable = true; + crtc_state->vrr.mode = INTEL_VRRTG_MODE_VRR; crtc_state->mode_flags |= I915_MODE_FLAG_VRR; } @@ -506,12 +508,15 @@ void intel_vrr_get_config(struct intel_crtc_state *crtc_state) if (HAS_CMRR(display) && trans_vrr_ctl & VRR_CTL_CMRR_ENABLE) { crtc_state->cmrr.enable = true; + crtc_state->vrr.mode = INTEL_VRRTG_MODE_CMRR; crtc_state->cmrr.cmrr_n = intel_de_read64_2x32(display, TRANS_CMRR_N_LO(display, cpu_transcoder), TRANS_CMRR_N_HI(display, cpu_transcoder)); crtc_state->cmrr.cmrr_m = intel_de_read64_2x32(display, TRANS_CMRR_M_LO(display, cpu_transcoder), TRANS_CMRR_M_HI(display, cpu_transcoder)); + } else if (trans_vrr_ctl & VRR_CTL_VRR_ENABLE) { + crtc_state->vrr.mode = INTEL_VRRTG_MODE_VRR; } if (DISPLAY_VER(display) >= 13) From patchwork Mon Feb 3 12:38:19 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13957411 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1EF9DC02192 for ; Mon, 3 Feb 2025 12:50:05 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id BC92310E07C; Mon, 3 Feb 2025 12:50:04 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="i/tRdJnB"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) by gabe.freedesktop.org (Postfix) with ESMTPS id 0DB7410E07C; Mon, 3 Feb 2025 12:50:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1738587003; x=1770123003; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=trbchAyRnX0jO6t/8Eu9YR5b/25xLIRdIt8OqzqQr+4=; b=i/tRdJnB3mHYRvsno8fHiCxg8u4VRg3QIYXrubq+MdMUYQAn0oltk2dP TcNUGf482wGdtmEBqfjkQkVxnd0U4ys6hKSS2fCt8S+bZHCw+u+SpDda+ Gp3qJL3ll1ofnWWbnenaJxYCqwGliuL/PoPCeUeCCEaTHnR1Ygvm1bttM 8gV2LaoKjoP2XXgJrFjjLKIT4S9f2pntOBoe45v8iIKppkqSaDCFoZiuH Pa/ZW6EFuDD1gstx6aQNbbHQ+uLhQrnYkMlIHNdkWpLyYz+6QFV0E/zjI Q8e/3H3yFcjiqLohxMf1KQVDRgo00DJiTWLRH5owqJ5hML+GAr7NBUucu Q==; X-CSE-ConnectionGUID: cTyvZhetQdS8MCojhKAU1A== X-CSE-MsgGUID: gBz8xatqTMqLO6dh0XgnWA== X-IronPort-AV: E=McAfee;i="6700,10204,11335"; a="61548035" X-IronPort-AV: E=Sophos;i="6.13,255,1732608000"; d="scan'208";a="61548035" Received: from fmviesa002.fm.intel.com ([10.60.135.142]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2025 04:50:03 -0800 X-CSE-ConnectionGUID: fSRbVzAoRLShCfLyQfrYCw== X-CSE-MsgGUID: zW2sB/j7TcOvZseih77TOA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="133528883" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by fmviesa002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2025 04:50:00 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, jani.nikula@linux.intel.com, ville.syrjala@linux.intel.com, mitulkumar.ajitkumar.golani@intel.com Subject: [PATCH 07/28] drm/i915/display: Remove vrr.enable and instead check vrr.mode != NONE Date: Mon, 3 Feb 2025 18:08:19 +0530 Message-ID: <20250203123840.3855874-8-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20250203123840.3855874-1-ankit.k.nautiyal@intel.com> References: <20250203123840.3855874-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Since we now have vrr.mode to track the mode in which the VRR timing generator is running, we no longer need member vrr.enable. Replace the check for vrr.enable and use a helper to check vrr.mode != NONE. Signed-off-by: Ankit Nautiyal --- .../drm/i915/display/intel_crtc_state_dump.c | 2 +- drivers/gpu/drm/i915/display/intel_ddi.c | 3 ++- drivers/gpu/drm/i915/display/intel_display.c | 11 +++++------ .../drm/i915/display/intel_display_types.h | 2 +- drivers/gpu/drm/i915/display/intel_dp.c | 2 +- drivers/gpu/drm/i915/display/intel_dsb.c | 2 +- .../drm/i915/display/intel_modeset_setup.c | 3 ++- drivers/gpu/drm/i915/display/intel_psr.c | 5 +++-- drivers/gpu/drm/i915/display/intel_vrr.c | 19 ++++++++++--------- drivers/gpu/drm/i915/display/intel_vrr.h | 1 + drivers/gpu/drm/i915/display/skl_watermark.c | 3 ++- 11 files changed, 29 insertions(+), 24 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c index 36076e8d639b..56a43f3fc7f6 100644 --- a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c +++ b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c @@ -293,7 +293,7 @@ void intel_crtc_state_dump(const struct intel_crtc_state *pipe_config, pipe_config->framestart_delay, pipe_config->msa_timing_delay); drm_printf(&p, "vrr: %s, vmin: %d, vmax: %d, flipline: %d, pipeline full: %d, guardband: %d vsync start: %d, vsync end: %d\n", - str_yes_no(pipe_config->vrr.enable), + str_yes_no(intel_vrr_is_enabled(pipe_config)), pipe_config->vrr.vmin, pipe_config->vrr.vmax, pipe_config->vrr.flipline, pipe_config->vrr.pipeline_full, pipe_config->vrr.guardband, pipe_config->vrr.vsync_start, pipe_config->vrr.vsync_end); diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index dc319f37b1be..f440299da637 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -77,6 +77,7 @@ #include "intel_tc.h" #include "intel_vdsc.h" #include "intel_vdsc_regs.h" +#include "intel_vrr.h" #include "skl_scaler.h" #include "skl_universal_plane.h" @@ -2280,7 +2281,7 @@ static void intel_dp_sink_set_msa_timing_par_ignore_state(struct intel_dp *intel { struct intel_display *display = to_intel_display(intel_dp); - if (!crtc_state->vrr.enable) + if (!intel_vrr_is_enabled(crtc_state)) return; if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_DOWNSPREAD_CTRL, diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 9cff080d4ff9..053c727d6d7e 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -1130,8 +1130,8 @@ static bool intel_crtc_vrr_enabling(struct intel_atomic_state *state, if (!new_crtc_state->hw.active) return false; - return is_enabling(vrr.enable, old_crtc_state, new_crtc_state) || - (new_crtc_state->vrr.enable && + return is_enabling(vrr.mode, old_crtc_state, new_crtc_state) || + (intel_vrr_is_enabled(new_crtc_state) && (new_crtc_state->update_m_n || new_crtc_state->update_lrr || vrr_params_changed(old_crtc_state, new_crtc_state))); } @@ -1147,8 +1147,8 @@ bool intel_crtc_vrr_disabling(struct intel_atomic_state *state, if (!old_crtc_state->hw.active) return false; - return is_disabling(vrr.enable, old_crtc_state, new_crtc_state) || - (old_crtc_state->vrr.enable && + return is_disabling(vrr.mode, old_crtc_state, new_crtc_state) || + (intel_vrr_is_enabled(old_crtc_state) && (new_crtc_state->update_m_n || new_crtc_state->update_lrr || vrr_params_changed(old_crtc_state, new_crtc_state))); } @@ -5802,7 +5802,6 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config, PIPE_CONF_CHECK_I(splitter.pixel_overlap); if (!fastset) { - PIPE_CONF_CHECK_BOOL(vrr.enable); PIPE_CONF_CHECK_X(vrr.mode); PIPE_CONF_CHECK_I(vrr.vmin); PIPE_CONF_CHECK_I(vrr.vmax); @@ -7280,7 +7279,7 @@ static void intel_update_crtc(struct intel_atomic_state *state, if (intel_crtc_vrr_enabling(state, crtc) || new_crtc_state->update_m_n || new_crtc_state->update_lrr) intel_crtc_update_active_timings(new_crtc_state, - new_crtc_state->vrr.enable); + intel_vrr_is_enabled(new_crtc_state)); /* * We usually enable FIFO underrun interrupts as part of the diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index 3195c9f33028..c553274c2af8 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -1308,7 +1308,7 @@ struct intel_crtc_state { /* Variable Refresh Rate state */ struct { - bool enable, in_range; + bool in_range; u8 pipeline_full; u16 flipline, vmin, vmax, guardband; u32 vsync_end, vsync_start; diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 00b95da18cc5..476cefd41888 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -2924,7 +2924,7 @@ static bool can_enable_drrs(struct intel_connector *connector, { struct drm_i915_private *i915 = to_i915(connector->base.dev); - if (pipe_config->vrr.enable) + if (intel_vrr_is_enabled(pipe_config)) return false; /* diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c b/drivers/gpu/drm/i915/display/intel_dsb.c index 2f2812c23972..78be517352e6 100644 --- a/drivers/gpu/drm/i915/display/intel_dsb.c +++ b/drivers/gpu/drm/i915/display/intel_dsb.c @@ -106,7 +106,7 @@ static bool pre_commit_is_vrr_active(struct intel_atomic_state *state, return false; /* VRR will have been disabled during intel_pre_plane_update() */ - return old_crtc_state->vrr.enable && !intel_crtc_vrr_disabling(state, crtc); + return intel_vrr_is_enabled(old_crtc_state) && !intel_crtc_vrr_disabling(state, crtc); } static int dsb_vblank_delay(struct intel_atomic_state *state, diff --git a/drivers/gpu/drm/i915/display/intel_modeset_setup.c b/drivers/gpu/drm/i915/display/intel_modeset_setup.c index 10cdfdad82e4..9b18599d8b7e 100644 --- a/drivers/gpu/drm/i915/display/intel_modeset_setup.c +++ b/drivers/gpu/drm/i915/display/intel_modeset_setup.c @@ -31,6 +31,7 @@ #include "intel_pmdemand.h" #include "intel_tc.h" #include "intel_vblank.h" +#include "intel_vrr.h" #include "intel_wm.h" #include "skl_watermark.h" @@ -859,7 +860,7 @@ static void intel_modeset_readout_hw_state(struct drm_i915_private *i915) crtc_state->inherited = true; intel_crtc_update_active_timings(crtc_state, - crtc_state->vrr.enable); + intel_vrr_is_enabled(crtc_state)); intel_crtc_copy_hw_to_uapi_state(crtc_state); } diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 2bdb6c9c2283..6fcb8d4a1c39 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -44,6 +44,7 @@ #include "intel_psr.h" #include "intel_psr_regs.h" #include "intel_snps_phy.h" +#include "intel_vrr.h" #include "skl_universal_plane.h" /** @@ -1484,7 +1485,7 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp, } /* Wa_16011303918:adl-p */ - if (crtc_state->vrr.enable && + if (intel_vrr_is_enabled(crtc_state) && IS_ALDERLAKE_P(dev_priv) && IS_DISPLAY_STEP(display, STEP_A0, STEP_B0)) { drm_dbg_kms(display->drm, "PSR2 not enabled, not compatible with HW stepping + VRR\n"); @@ -1689,7 +1690,7 @@ void intel_psr_compute_config(struct intel_dp *intel_dp, /* * Currently PSR/PR doesn't work reliably with VRR enabled. */ - if (crtc_state->vrr.enable) + if (intel_vrr_is_enabled(crtc_state)) return; crtc_state->has_panel_replay = _panel_replay_compute_config(intel_dp, diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index ded5466c5214..5c00eef64bfd 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -225,7 +225,6 @@ cmrr_get_vtotal(struct intel_crtc_state *crtc_state, bool video_mode_required) static void intel_vrr_compute_cmrr_timings(struct intel_crtc_state *crtc_state) { - crtc_state->vrr.enable = true; crtc_state->cmrr.enable = true; crtc_state->vrr.mode = INTEL_VRRTG_MODE_CMRR; /* @@ -243,7 +242,6 @@ void intel_vrr_compute_cmrr_timings(struct intel_crtc_state *crtc_state) static void intel_vrr_compute_vrr_timings(struct intel_crtc_state *crtc_state) { - crtc_state->vrr.enable = true; crtc_state->vrr.mode = INTEL_VRRTG_MODE_VRR; crtc_state->mode_flags |= I915_MODE_FLAG_VRR; } @@ -277,6 +275,11 @@ int intel_vrr_compute_vmax(struct intel_connector *connector, return vmax; } +bool intel_vrr_is_enabled(const struct intel_crtc_state *crtc_state) +{ + return crtc_state->vrr.mode != INTEL_VRRTG_MODE_NONE; +} + void intel_vrr_compute_config(struct intel_crtc_state *crtc_state, struct drm_connector_state *conn_state) @@ -433,7 +436,7 @@ void intel_vrr_send_push(struct intel_dsb *dsb, struct intel_display *display = to_intel_display(crtc_state); enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; - if (!crtc_state->vrr.enable) + if (!intel_vrr_is_enabled(crtc_state)) return; if (dsb) @@ -452,7 +455,7 @@ bool intel_vrr_is_push_sent(const struct intel_crtc_state *crtc_state) struct intel_display *display = to_intel_display(crtc_state); enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; - if (!crtc_state->vrr.enable) + if (!intel_vrr_is_enabled(crtc_state)) return false; return intel_de_read(display, TRANS_PUSH(display, cpu_transcoder)) & TRANS_PUSH_SEND; @@ -463,7 +466,7 @@ void intel_vrr_enable(const struct intel_crtc_state *crtc_state) struct intel_display *display = to_intel_display(crtc_state); enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; - if (!crtc_state->vrr.enable) + if (!intel_vrr_is_enabled(crtc_state)) return; intel_de_write(display, TRANS_PUSH(display, cpu_transcoder), @@ -484,7 +487,7 @@ void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state) struct intel_display *display = to_intel_display(old_crtc_state); enum transcoder cpu_transcoder = old_crtc_state->cpu_transcoder; - if (!old_crtc_state->vrr.enable) + if (!intel_vrr_is_enabled(old_crtc_state)) return; intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder), @@ -504,8 +507,6 @@ void intel_vrr_get_config(struct intel_crtc_state *crtc_state) trans_vrr_ctl = intel_de_read(display, TRANS_VRR_CTL(display, cpu_transcoder)); - crtc_state->vrr.enable = trans_vrr_ctl & VRR_CTL_VRR_ENABLE; - if (HAS_CMRR(display) && trans_vrr_ctl & VRR_CTL_CMRR_ENABLE) { crtc_state->cmrr.enable = true; crtc_state->vrr.mode = INTEL_VRRTG_MODE_CMRR; @@ -546,6 +547,6 @@ void intel_vrr_get_config(struct intel_crtc_state *crtc_state) } } - if (crtc_state->vrr.enable) + if (intel_vrr_is_enabled(crtc_state)) crtc_state->mode_flags |= I915_MODE_FLAG_VRR; } diff --git a/drivers/gpu/drm/i915/display/intel_vrr.h b/drivers/gpu/drm/i915/display/intel_vrr.h index 899cbf40f880..736bf7777abe 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.h +++ b/drivers/gpu/drm/i915/display/intel_vrr.h @@ -33,5 +33,6 @@ int intel_vrr_vmin_vtotal(const struct intel_crtc_state *crtc_state); int intel_vrr_vmax_vblank_start(const struct intel_crtc_state *crtc_state); int intel_vrr_vmin_vblank_start(const struct intel_crtc_state *crtc_state); int intel_vrr_vblank_delay(const struct intel_crtc_state *crtc_state); +bool intel_vrr_is_enabled(const struct intel_crtc_state *crtc_state); #endif /* __INTEL_VRR_H__ */ diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c index 45fe4aaeb450..1e08c0fb03ca 100644 --- a/drivers/gpu/drm/i915/display/skl_watermark.c +++ b/drivers/gpu/drm/i915/display/skl_watermark.c @@ -23,6 +23,7 @@ #include "intel_fb.h" #include "intel_fixed.h" #include "intel_pcode.h" +#include "intel_vrr.h" #include "intel_wm.h" #include "skl_universal_plane_regs.h" #include "skl_watermark.h" @@ -3012,7 +3013,7 @@ intel_program_dpkgc_latency(struct intel_atomic_state *state) return; for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) { - if (!new_crtc_state->vrr.enable || + if (!intel_vrr_is_enabled(new_crtc_state) || (new_crtc_state->vrr.vmin == new_crtc_state->vrr.vmax && new_crtc_state->vrr.vmin == new_crtc_state->vrr.flipline)) fixed_refresh_rate = true; From patchwork Mon Feb 3 12:38:20 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13957412 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6B2AFC02197 for ; Mon, 3 Feb 2025 12:50:07 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0D72410E4B1; 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a="61548042" X-IronPort-AV: E=Sophos;i="6.13,255,1732608000"; d="scan'208";a="61548042" Received: from fmviesa002.fm.intel.com ([10.60.135.142]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2025 04:50:05 -0800 X-CSE-ConnectionGUID: MPnoOUHqRQOdRG/FTe8oxA== X-CSE-MsgGUID: ivoYucPhTP2bt6bL1f6kFA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="133528898" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by fmviesa002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2025 04:50:03 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, jani.nikula@linux.intel.com, ville.syrjala@linux.intel.com, mitulkumar.ajitkumar.golani@intel.com Subject: [PATCH 08/28] drm/i915/display: Absorb cmrr attributes into vrr struct Date: Mon, 3 Feb 2025 18:08:20 +0530 Message-ID: <20250203123840.3855874-9-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20250203123840.3855874-1-ankit.k.nautiyal@intel.com> References: <20250203123840.3855874-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Since cmrr is now one of the mode of operation of VRR timing generator, move its elements in the vrr struct. Replace cmrr.enable with vrr.mode INTEL_VRRTG_MODE_CMRR and move cmrr_m and cmrr_n in vrr struct. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_display.c | 19 +++++--------- .../drm/i915/display/intel_display_types.h | 7 +---- drivers/gpu/drm/i915/display/intel_dp.c | 2 +- drivers/gpu/drm/i915/display/intel_vrr.c | 26 +++++++++---------- 4 files changed, 20 insertions(+), 34 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 053c727d6d7e..3f2c07693ae6 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -1109,14 +1109,9 @@ static bool vrr_params_changed(const struct intel_crtc_state *old_crtc_state, old_crtc_state->vrr.vmin != new_crtc_state->vrr.vmin || old_crtc_state->vrr.vmax != new_crtc_state->vrr.vmax || old_crtc_state->vrr.guardband != new_crtc_state->vrr.guardband || - old_crtc_state->vrr.pipeline_full != new_crtc_state->vrr.pipeline_full; -} - -static bool cmrr_params_changed(const struct intel_crtc_state *old_crtc_state, - const struct intel_crtc_state *new_crtc_state) -{ - return old_crtc_state->cmrr.cmrr_m != new_crtc_state->cmrr.cmrr_m || - old_crtc_state->cmrr.cmrr_n != new_crtc_state->cmrr.cmrr_n; + old_crtc_state->vrr.pipeline_full != new_crtc_state->vrr.pipeline_full || + old_crtc_state->vrr.cmrr_m != new_crtc_state->vrr.cmrr_m || + old_crtc_state->vrr.cmrr_n != new_crtc_state->vrr.cmrr_n; } static bool intel_crtc_vrr_enabling(struct intel_atomic_state *state, @@ -5810,9 +5805,8 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config, PIPE_CONF_CHECK_I(vrr.guardband); PIPE_CONF_CHECK_I(vrr.vsync_start); PIPE_CONF_CHECK_I(vrr.vsync_end); - PIPE_CONF_CHECK_LLI(cmrr.cmrr_m); - PIPE_CONF_CHECK_LLI(cmrr.cmrr_n); - PIPE_CONF_CHECK_BOOL(cmrr.enable); + PIPE_CONF_CHECK_LLI(vrr.cmrr_m); + PIPE_CONF_CHECK_LLI(vrr.cmrr_n); } #undef PIPE_CONF_CHECK_X @@ -7225,8 +7219,7 @@ static void intel_pre_update_crtc(struct intel_atomic_state *state, intel_crtc_needs_fastset(new_crtc_state)) icl_set_pipe_chicken(new_crtc_state); - if (vrr_params_changed(old_crtc_state, new_crtc_state) || - cmrr_params_changed(old_crtc_state, new_crtc_state)) + if (vrr_params_changed(old_crtc_state, new_crtc_state)) intel_vrr_set_transcoder_timings(new_crtc_state); } diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index c553274c2af8..338cfd99e5d3 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -1313,14 +1313,9 @@ struct intel_crtc_state { u16 flipline, vmin, vmax, guardband; u32 vsync_end, vsync_start; enum intel_vrrtg_mode mode; + u64 cmrr_n, cmrr_m; /* Content Match Refresh Rate M and N */ } vrr; - /* Content Match Refresh Rate state */ - struct { - bool enable; - u64 cmrr_n, cmrr_m; - } cmrr; - /* Stream Splitter for eDP MSO */ struct { bool enable; diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 476cefd41888..411df92df4a1 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -2836,7 +2836,7 @@ static void intel_dp_compute_as_sdp(struct intel_dp *intel_dp, as_sdp->duration_incr_ms = 0; as_sdp->vtotal = intel_vrr_vmin_vtotal(crtc_state); - if (crtc_state->cmrr.enable) { + if (crtc_state->vrr.mode == INTEL_VRRTG_MODE_CMRR) { as_sdp->mode = DP_AS_SDP_FAVT_TRR_REACHED; as_sdp->target_rr = drm_mode_vrefresh(adjusted_mode); as_sdp->target_rr_divider = true; diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index 5c00eef64bfd..dc4923d49c29 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -212,12 +212,12 @@ cmrr_get_vtotal(struct intel_crtc_state *crtc_state, bool video_mode_required) multiplier_n = 1000; } - crtc_state->cmrr.cmrr_n = mul_u32_u32(desired_refresh_rate * adjusted_mode->crtc_htotal, - multiplier_n); + crtc_state->vrr.cmrr_n = mul_u32_u32(desired_refresh_rate * adjusted_mode->crtc_htotal, + multiplier_n); vtotal = DIV_ROUND_UP_ULL(mul_u32_u32(adjusted_mode->crtc_clock * 1000, multiplier_n), - crtc_state->cmrr.cmrr_n); + crtc_state->vrr.cmrr_n); adjusted_pixel_rate = mul_u32_u32(adjusted_mode->crtc_clock * 1000, multiplier_m); - crtc_state->cmrr.cmrr_m = do_div(adjusted_pixel_rate, crtc_state->cmrr.cmrr_n); + crtc_state->vrr.cmrr_m = do_div(adjusted_pixel_rate, crtc_state->vrr.cmrr_n); return vtotal; } @@ -225,7 +225,6 @@ cmrr_get_vtotal(struct intel_crtc_state *crtc_state, bool video_mode_required) static void intel_vrr_compute_cmrr_timings(struct intel_crtc_state *crtc_state) { - crtc_state->cmrr.enable = true; crtc_state->vrr.mode = INTEL_VRRTG_MODE_CMRR; /* * TODO: Compute precise target refresh rate to determine @@ -403,15 +402,15 @@ void intel_vrr_set_transcoder_timings(const struct intel_crtc_state *crtc_state) return; } - if (crtc_state->cmrr.enable) { + if (crtc_state->vrr.mode == INTEL_VRRTG_MODE_CMRR) { intel_de_write(display, TRANS_CMRR_M_HI(display, cpu_transcoder), - upper_32_bits(crtc_state->cmrr.cmrr_m)); + upper_32_bits(crtc_state->vrr.cmrr_m)); intel_de_write(display, TRANS_CMRR_M_LO(display, cpu_transcoder), - lower_32_bits(crtc_state->cmrr.cmrr_m)); + lower_32_bits(crtc_state->vrr.cmrr_m)); intel_de_write(display, TRANS_CMRR_N_HI(display, cpu_transcoder), - upper_32_bits(crtc_state->cmrr.cmrr_n)); + upper_32_bits(crtc_state->vrr.cmrr_n)); intel_de_write(display, TRANS_CMRR_N_LO(display, cpu_transcoder), - lower_32_bits(crtc_state->cmrr.cmrr_n)); + lower_32_bits(crtc_state->vrr.cmrr_n)); } intel_de_write(display, TRANS_VRR_VMIN(display, cpu_transcoder), @@ -472,7 +471,7 @@ void intel_vrr_enable(const struct intel_crtc_state *crtc_state) intel_de_write(display, TRANS_PUSH(display, cpu_transcoder), TRANS_PUSH_EN); - if (crtc_state->cmrr.enable) { + if (crtc_state->vrr.mode == INTEL_VRRTG_MODE_CMRR) { intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder), VRR_CTL_VRR_ENABLE | VRR_CTL_CMRR_ENABLE | trans_vrr_ctl(crtc_state)); @@ -508,12 +507,11 @@ void intel_vrr_get_config(struct intel_crtc_state *crtc_state) TRANS_VRR_CTL(display, cpu_transcoder)); if (HAS_CMRR(display) && trans_vrr_ctl & VRR_CTL_CMRR_ENABLE) { - crtc_state->cmrr.enable = true; crtc_state->vrr.mode = INTEL_VRRTG_MODE_CMRR; - crtc_state->cmrr.cmrr_n = + crtc_state->vrr.cmrr_n = intel_de_read64_2x32(display, TRANS_CMRR_N_LO(display, cpu_transcoder), TRANS_CMRR_N_HI(display, cpu_transcoder)); - crtc_state->cmrr.cmrr_m = + crtc_state->vrr.cmrr_m = intel_de_read64_2x32(display, TRANS_CMRR_M_LO(display, cpu_transcoder), TRANS_CMRR_M_HI(display, cpu_transcoder)); } else if (trans_vrr_ctl & VRR_CTL_VRR_ENABLE) { From patchwork Mon Feb 3 12:38:21 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13957413 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 26629C02198 for ; Mon, 3 Feb 2025 12:50:09 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C400010E4AC; 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a="61548048" X-IronPort-AV: E=Sophos;i="6.13,255,1732608000"; d="scan'208";a="61548048" Received: from fmviesa002.fm.intel.com ([10.60.135.142]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2025 04:50:08 -0800 X-CSE-ConnectionGUID: y2jRygCrT1emk+qtNh4jzQ== X-CSE-MsgGUID: tyo+5QZBT0OTGlNEMYf53w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="133528913" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by fmviesa002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2025 04:50:05 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, jani.nikula@linux.intel.com, ville.syrjala@linux.intel.com, mitulkumar.ajitkumar.golani@intel.com Subject: [PATCH 09/28] drm/i915/display: Add vrr mode to crtc_state dump Date: Mon, 3 Feb 2025 18:08:21 +0530 Message-ID: <20250203123840.3855874-10-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20250203123840.3855874-1-ankit.k.nautiyal@intel.com> References: <20250203123840.3855874-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Print Vrr mode along with other vrr members in crtc_state dump. Signed-off-by: Ankit Nautiyal --- .../drm/i915/display/intel_crtc_state_dump.c | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c index 56a43f3fc7f6..9f4c88f05f4c 100644 --- a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c +++ b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c @@ -172,6 +172,20 @@ vlv_dump_csc(struct drm_printer *p, const char *name, csc->coeff[3 * i + 2]); } +static const char * const vrrtg_mode_str[] = { + [INTEL_VRRTG_MODE_NONE] = "none", + [INTEL_VRRTG_MODE_VRR] = "vrr", + [INTEL_VRRTG_MODE_CMRR] = "cmrr", +}; + +static const char *intel_vrrtg_mode_name(enum intel_vrrtg_mode mode) +{ + if (mode >= ARRAY_SIZE(vrrtg_mode_str)) + return "invalid"; + + return vrrtg_mode_str[mode]; +} + void intel_crtc_state_dump(const struct intel_crtc_state *pipe_config, struct intel_atomic_state *state, const char *context) @@ -292,8 +306,9 @@ void intel_crtc_state_dump(const struct intel_crtc_state *pipe_config, pipe_config->hw.adjusted_mode.crtc_vdisplay, pipe_config->framestart_delay, pipe_config->msa_timing_delay); - drm_printf(&p, "vrr: %s, vmin: %d, vmax: %d, flipline: %d, pipeline full: %d, guardband: %d vsync start: %d, vsync end: %d\n", + drm_printf(&p, "vrr: %s, mode: %s, vmin: %d, vmax: %d, flipline: %d, pipeline full: %d, guardband: %d vsync start: %d, vsync end: %d\n", str_yes_no(intel_vrr_is_enabled(pipe_config)), + intel_vrrtg_mode_name(pipe_config->vrr.mode), pipe_config->vrr.vmin, pipe_config->vrr.vmax, pipe_config->vrr.flipline, pipe_config->vrr.pipeline_full, pipe_config->vrr.guardband, pipe_config->vrr.vsync_start, pipe_config->vrr.vsync_end); From patchwork Mon Feb 3 12:38:22 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13957414 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BEDACC02192 for ; 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X-CSE-ConnectionGUID: NHCnfxoUR5GbKXvAMjvYnw== X-CSE-MsgGUID: X8abMQdoR4atJQFTfYHQyQ== X-IronPort-AV: E=McAfee;i="6700,10204,11335"; a="61548054" X-IronPort-AV: E=Sophos;i="6.13,255,1732608000"; d="scan'208";a="61548054" Received: from fmviesa002.fm.intel.com ([10.60.135.142]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2025 04:50:10 -0800 X-CSE-ConnectionGUID: pCCfHAmZQ4Sy7Vdc5CxnJw== X-CSE-MsgGUID: zorq8jypT02pKuDUkLGrhQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="133528928" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by fmviesa002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2025 04:50:08 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, jani.nikula@linux.intel.com, ville.syrjala@linux.intel.com, mitulkumar.ajitkumar.golani@intel.com Subject: [PATCH 10/28] drm/i915/vrr: Disable CMRR Date: Mon, 3 Feb 2025 18:08:22 +0530 Message-ID: <20250203123840.3855874-11-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20250203123840.3855874-1-ankit.k.nautiyal@intel.com> References: <20250203123840.3855874-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Switching between variable and fixed timings is possible as for that we just need to flip between VRR timings. However for CMRR along with the timings, few other bits also need to be changed on the fly, which might cause issues. So disable CMRR for now, till we have variable and fixed timings sorted out. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_vrr.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index dc4923d49c29..56830513c10d 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -182,7 +182,8 @@ is_cmrr_frac_required(struct intel_crtc_state *crtc_state) int calculated_refresh_k, actual_refresh_k, pixel_clock_per_line; struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; - if (!HAS_CMRR(display)) + /* Avoid CMRR for now till we have VRR with fixed timings working */ + if (!HAS_CMRR(display) || true) return false; actual_refresh_k = From patchwork Mon Feb 3 12:38:23 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13957415 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 90FA1C02192 for ; Mon, 3 Feb 2025 12:50:14 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 37CAA10E4B9; Mon, 3 Feb 2025 12:50:14 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="Hu+6J1Of"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) by gabe.freedesktop.org (Postfix) with ESMTPS id 34BFE10E4B9; Mon, 3 Feb 2025 12:50:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1738587012; x=1770123012; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=43GqReod1yU3k4q+ID+2IMS47Vh8UBlyVmbLR4dmNxQ=; b=Hu+6J1OffqLeZV0abSZ782iPln7BNd42xbpIgiB2celUxhluMBs8yRmP Gbk9sunahpN8BAaQb2TTuZJTdvHxn22M5E5B/OMmXqrBqRVg7Yjyp0R8M tuLViCv5vtIGLF8CsTxc+eO/jZWbLVy9m+lGmUVx7GLJaj5nLRopnUi2f XPkdgh1l5cA05L/aBWytGtnaWOPhtRpLE3rEGYp0T1QSwsG3HEH12jpxn shbaKpL6CQoeXtVHL+ejyvxQoZq+gdYrJsM5GlXo0Q3m6lj/oQMRSzKRm PFdvRbLqrPE5e3mMalg3qMvxBZuqjRGbEJZMyw/re2V0Iw0K8oBnbFkF1 A==; X-CSE-ConnectionGUID: NFxvyoC7Se+TcBl5dwQqjw== X-CSE-MsgGUID: k3QsOyPQT7q48KdskZpSsQ== X-IronPort-AV: E=McAfee;i="6700,10204,11335"; a="61548060" X-IronPort-AV: E=Sophos;i="6.13,255,1732608000"; d="scan'208";a="61548060" Received: from fmviesa002.fm.intel.com ([10.60.135.142]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2025 04:50:12 -0800 X-CSE-ConnectionGUID: 4E/pFF94QFaiCatTYgt2rQ== X-CSE-MsgGUID: 9UDx2k7HT8iDHWUNe8763Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="133528950" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by fmviesa002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2025 04:50:10 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, jani.nikula@linux.intel.com, ville.syrjala@linux.intel.com, mitulkumar.ajitkumar.golani@intel.com Subject: [PATCH 11/28] drm/i915/display: Update intel_crtc_vrr_{enable/disable} Date: Mon, 3 Feb 2025 18:08:23 +0530 Message-ID: <20250203123840.3855874-12-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20250203123840.3855874-1-ankit.k.nautiyal@intel.com> References: <20250203123840.3855874-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" With CMRR the vrr.enable was tracking the vrr timing generator, which made the helpers intel_crtc_vrr_{enable/disable} also track the vrr timing generator. Since we don not have CMRR now, the crtc_vrr_{enable/disable} should now track the vrr mode of operation of the vrr timing generator. Update the helpers intel_crtc_vrr_{enable/disable} to track the vrr mode of the vrr timing generator. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_display.c | 24 +++++++++++++------- drivers/gpu/drm/i915/display/intel_vrr.c | 5 ++++ drivers/gpu/drm/i915/display/intel_vrr.h | 1 + 3 files changed, 22 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 3f2c07693ae6..d70e19beef4b 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -1121,14 +1121,18 @@ static bool intel_crtc_vrr_enabling(struct intel_atomic_state *state, intel_atomic_get_old_crtc_state(state, crtc); const struct intel_crtc_state *new_crtc_state = intel_atomic_get_new_crtc_state(state, crtc); + bool old_mode_is_vrr = intel_vrr_is_mode_vrr(old_crtc_state); + bool new_mode_is_vrr = intel_vrr_is_mode_vrr(new_crtc_state); + bool needs_modeset = intel_crtc_needs_modeset(new_crtc_state); + bool update_m_n = new_crtc_state->update_m_n; + bool update_lrr = new_crtc_state->update_lrr; + bool params_changed = vrr_params_changed(old_crtc_state, new_crtc_state); if (!new_crtc_state->hw.active) return false; - return is_enabling(vrr.mode, old_crtc_state, new_crtc_state) || - (intel_vrr_is_enabled(new_crtc_state) && - (new_crtc_state->update_m_n || new_crtc_state->update_lrr || - vrr_params_changed(old_crtc_state, new_crtc_state))); + return (new_mode_is_vrr && (!old_mode_is_vrr || needs_modeset)) || + (new_mode_is_vrr && (update_m_n || update_lrr || params_changed)); } bool intel_crtc_vrr_disabling(struct intel_atomic_state *state, @@ -1138,14 +1142,18 @@ bool intel_crtc_vrr_disabling(struct intel_atomic_state *state, intel_atomic_get_old_crtc_state(state, crtc); const struct intel_crtc_state *new_crtc_state = intel_atomic_get_new_crtc_state(state, crtc); + bool old_mode_is_vrr = intel_vrr_is_mode_vrr(old_crtc_state); + bool new_mode_is_vrr = intel_vrr_is_mode_vrr(new_crtc_state); + bool needs_modeset = intel_crtc_needs_modeset(new_crtc_state); + bool update_m_n = new_crtc_state->update_m_n; + bool update_lrr = new_crtc_state->update_lrr; + bool params_changed = vrr_params_changed(old_crtc_state, new_crtc_state); if (!old_crtc_state->hw.active) return false; - return is_disabling(vrr.mode, old_crtc_state, new_crtc_state) || - (intel_vrr_is_enabled(old_crtc_state) && - (new_crtc_state->update_m_n || new_crtc_state->update_lrr || - vrr_params_changed(old_crtc_state, new_crtc_state))); + return (old_mode_is_vrr && (!new_mode_is_vrr || needs_modeset)) || + (old_mode_is_vrr && (update_m_n || update_lrr || params_changed)); } static bool audio_enabling(const struct intel_crtc_state *old_crtc_state, diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index 56830513c10d..48cfcc3ba7b4 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -280,6 +280,11 @@ bool intel_vrr_is_enabled(const struct intel_crtc_state *crtc_state) return crtc_state->vrr.mode != INTEL_VRRTG_MODE_NONE; } +bool intel_vrr_is_mode_vrr(const struct intel_crtc_state *crtc_state) +{ + return crtc_state->vrr.mode == INTEL_VRRTG_MODE_VRR; +} + void intel_vrr_compute_config(struct intel_crtc_state *crtc_state, struct drm_connector_state *conn_state) diff --git a/drivers/gpu/drm/i915/display/intel_vrr.h b/drivers/gpu/drm/i915/display/intel_vrr.h index 736bf7777abe..5ae8d6409f1a 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.h +++ b/drivers/gpu/drm/i915/display/intel_vrr.h @@ -34,5 +34,6 @@ int intel_vrr_vmax_vblank_start(const struct intel_crtc_state *crtc_state); int intel_vrr_vmin_vblank_start(const struct intel_crtc_state *crtc_state); int intel_vrr_vblank_delay(const struct intel_crtc_state *crtc_state); bool intel_vrr_is_enabled(const struct intel_crtc_state *crtc_state); +bool intel_vrr_is_mode_vrr(const struct intel_crtc_state *crtc_state); #endif /* __INTEL_VRR_H__ */ From patchwork Mon Feb 3 12:38:24 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13957416 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7969BC02194 for ; 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X-CSE-ConnectionGUID: Fbyh+L+1Q/+IlEZou9kUNA== X-CSE-MsgGUID: cA0lfhf0SB26nPcMBxGoZQ== X-IronPort-AV: E=McAfee;i="6700,10204,11335"; a="61548064" X-IronPort-AV: E=Sophos;i="6.13,255,1732608000"; d="scan'208";a="61548064" Received: from fmviesa002.fm.intel.com ([10.60.135.142]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2025 04:50:15 -0800 X-CSE-ConnectionGUID: 73NtNOTpRRWfTpy6ObQJ1w== X-CSE-MsgGUID: I0YB5XZEQhSEUJsX+jG4Jw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="133528967" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by fmviesa002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2025 04:50:12 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, jani.nikula@linux.intel.com, ville.syrjala@linux.intel.com, mitulkumar.ajitkumar.golani@intel.com Subject: [PATCH 12/28] drm/i915/vrr: Use crtc_vtotal for vmin Date: Mon, 3 Feb 2025 18:08:24 +0530 Message-ID: <20250203123840.3855874-13-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20250203123840.3855874-1-ankit.k.nautiyal@intel.com> References: <20250203123840.3855874-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To have fixed refresh rate with VRR timing generator the guardband/pipeline full can't be programmed on the fly. So we need to ensure that the values satisfy both the fixed and variable refresh rates. Since we compute these value based on vmin, lets set the vmin to crtc_vtotal for both fixed and variable timings instead of using the current refresh rate based approach. This way the guardband remains sufficient for both cases. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_vrr.c | 34 +++++++++++++++++------- 1 file changed, 25 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index 48cfcc3ba7b4..77e069d3f393 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -246,18 +246,34 @@ void intel_vrr_compute_vrr_timings(struct intel_crtc_state *crtc_state) crtc_state->mode_flags |= I915_MODE_FLAG_VRR; } +/* + * For fixed refresh rate mode Vmin, Vmax and Flipline all are set to + * Vtotal value. + */ static -int intel_vrr_compute_vmin(struct intel_connector *connector, - struct drm_display_mode *adjusted_mode) +int intel_vrr_fixed_rr_vtotal(const struct intel_crtc_state *crtc_state) { - int vmin; - const struct drm_display_info *info = &connector->base.display_info; + struct intel_display *display = to_intel_display(crtc_state); + int crtc_vtotal = crtc_state->hw.adjusted_mode.crtc_vtotal; - vmin = DIV_ROUND_UP(adjusted_mode->crtc_clock * 1000, - adjusted_mode->crtc_htotal * info->monitor_range.max_vfreq); - vmin = max_t(int, vmin, adjusted_mode->crtc_vtotal); + if (DISPLAY_VER(display) >= 13) + return crtc_vtotal; + else + return crtc_vtotal - + intel_vrr_real_vblank_delay(crtc_state); +} - return vmin; +static +int intel_vrr_compute_vmin(struct intel_crtc_state *crtc_state) +{ + /* + * To make fixed rr and vrr work seamless the guardband/pipeline full + * should be set such that it satisfies both the fixed and variable + * timings. + * For this set the vmin as crtc_vtotal. With this we never need to + * change anything to do with the guardband. + */ + return intel_vrr_fixed_rr_vtotal(crtc_state); } static @@ -315,7 +331,7 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state, if (HAS_LRR(display)) crtc_state->update_lrr = true; - vmin = intel_vrr_compute_vmin(connector, adjusted_mode); + vmin = intel_vrr_compute_vmin(crtc_state); vmax = intel_vrr_compute_vmax(connector, adjusted_mode); if (vmin >= vmax) From patchwork Mon Feb 3 12:38:25 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13957417 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1E841C02198 for ; Mon, 3 Feb 2025 12:50:18 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B431410E4BE; Mon, 3 Feb 2025 12:50:17 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="mC8znO6C"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) by gabe.freedesktop.org (Postfix) with ESMTPS id CF98C10E4B7; Mon, 3 Feb 2025 12:50:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1738587017; x=1770123017; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=uM0uxOmTzdq9bnItlDIIEQiBAZnCS1vemAXix3aQKqc=; b=mC8znO6CT4TsJR3c44Tc5dG5xQUhEj+JHp6GRSikEakMEhznHlRmTfIi pRilVd7XmWUuy3Ju81Un9d5Wu/jUiTdCdoXp43rpmOEyWbobshzy1WTwI yr/X4E2Wc3DjShHaZ7wXe4Nj7RHlBQ4IezPyZ26Rx/+d7gRIU+ERwIUFy 4NfGaF9Ndqdy6SWHTjpbp2lUGKx2N1my5zLSLUI6/pQ7yB3LB/vVZWsUS VvOfVTPBzhzhIRYfS5T7dvZ4IMtNlNHLo08JKI46kkSyE7ch8j8SZfUyL iR9PIpK9EOie3LBMb+5TqgCrv9qxIScrUri4n2jvJzoTrRmm4evBh6fn3 w==; X-CSE-ConnectionGUID: tUId8pBrQaKycJsdTvjQcg== X-CSE-MsgGUID: ErQOrHkaRIK7Pu5+KZN6jQ== X-IronPort-AV: E=McAfee;i="6700,10204,11335"; a="61548073" X-IronPort-AV: E=Sophos;i="6.13,255,1732608000"; d="scan'208";a="61548073" Received: from fmviesa002.fm.intel.com ([10.60.135.142]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2025 04:50:17 -0800 X-CSE-ConnectionGUID: JAGhnmrZTA+dYaPRPQLCXg== X-CSE-MsgGUID: TSPJO4rTRYGnZlN8Ue7u3A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="133528975" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by fmviesa002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2025 04:50:15 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, jani.nikula@linux.intel.com, ville.syrjala@linux.intel.com, mitulkumar.ajitkumar.golani@intel.com Subject: [PATCH 13/28] drm/i915/vrr: Prepare for fixed refresh rate timings Date: Mon, 3 Feb 2025 18:08:25 +0530 Message-ID: <20250203123840.3855874-14-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20250203123840.3855874-1-ankit.k.nautiyal@intel.com> References: <20250203123840.3855874-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Currently we always compute the timings as if vrr is enabled. With this approach the state checker becomes complicated when we introduce fixed refresh rate mode with vrr timing generator. To avoid the complications, instead of always computing vrr timings, we compute vrr timings based on uapi.vrr_enable knob. So when the knob is disabled we always compute vmin=flipline=vmax. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_vrr.c | 54 ++++++++++++++++++++++++ 1 file changed, 54 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index 77e069d3f393..2b4376e985f6 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -263,6 +263,35 @@ int intel_vrr_fixed_rr_vtotal(const struct intel_crtc_state *crtc_state) intel_vrr_real_vblank_delay(crtc_state); } +static +int intel_vrr_fixed_rr_vmax(const struct intel_crtc_state *crtc_state) +{ + return intel_vrr_fixed_rr_vtotal(crtc_state); +} + +static +int intel_vrr_fixed_rr_vmin(const struct intel_crtc_state *crtc_state) +{ + struct intel_display *display = to_intel_display(crtc_state); + + return intel_vrr_fixed_rr_vtotal(crtc_state) - + intel_vrr_flipline_offset(display); +} + +static +int intel_vrr_fixed_rr_flipline(const struct intel_crtc_state *crtc_state) +{ + return intel_vrr_fixed_rr_vtotal(crtc_state); +} + +static +void intel_vrr_prepare_fixed_timings(struct intel_crtc_state *crtc_state) +{ + crtc_state->vrr.vmax = intel_vrr_fixed_rr_vmax(crtc_state); + crtc_state->vrr.vmin = intel_vrr_fixed_rr_vmin(crtc_state); + crtc_state->vrr.flipline = intel_vrr_fixed_rr_flipline(crtc_state); +} + static int intel_vrr_compute_vmin(struct intel_crtc_state *crtc_state) { @@ -353,6 +382,8 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state, intel_vrr_compute_vrr_timings(crtc_state); else if (is_cmrr_frac_required(crtc_state) && is_edp) intel_vrr_compute_cmrr_timings(crtc_state); + else + intel_vrr_prepare_fixed_timings(crtc_state); if (HAS_AS_SDP(display)) { crtc_state->vrr.vsync_start = @@ -490,6 +521,13 @@ void intel_vrr_enable(const struct intel_crtc_state *crtc_state) if (!intel_vrr_is_enabled(crtc_state)) return; + intel_de_write(display, TRANS_VRR_VMIN(display, cpu_transcoder), + crtc_state->vrr.vmin - 1); + intel_de_write(display, TRANS_VRR_VMAX(display, cpu_transcoder), + crtc_state->vrr.vmax - 1); + intel_de_write(display, TRANS_VRR_FLIPLINE(display, cpu_transcoder), + crtc_state->vrr.flipline - 1); + intel_de_write(display, TRANS_PUSH(display, cpu_transcoder), TRANS_PUSH_EN); @@ -503,6 +541,20 @@ void intel_vrr_enable(const struct intel_crtc_state *crtc_state) } } +static +void intel_vrr_set_fixed_rr_timings(const struct intel_crtc_state *crtc_state) +{ + struct intel_display *display = to_intel_display(crtc_state); + enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; + + intel_de_write(display, TRANS_VRR_VMIN(display, cpu_transcoder), + intel_vrr_fixed_rr_vmin(crtc_state) - 1); + intel_de_write(display, TRANS_VRR_VMAX(display, cpu_transcoder), + intel_vrr_fixed_rr_vmax(crtc_state) - 1); + intel_de_write(display, TRANS_VRR_FLIPLINE(display, cpu_transcoder), + intel_vrr_fixed_rr_flipline(crtc_state) - 1); +} + void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state) { struct intel_display *display = to_intel_display(old_crtc_state); @@ -517,6 +569,8 @@ void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state) TRANS_VRR_STATUS(display, cpu_transcoder), VRR_STATUS_VRR_EN_LIVE, 1000); intel_de_write(display, TRANS_PUSH(display, cpu_transcoder), 0); + + intel_vrr_set_fixed_rr_timings(old_crtc_state); } void intel_vrr_get_config(struct intel_crtc_state *crtc_state) From patchwork Mon Feb 3 12:38:26 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13957418 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2A3EEC02196 for ; Mon, 3 Feb 2025 12:50:21 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id BFC6010E4B8; Mon, 3 Feb 2025 12:50:20 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; 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a="61548076" X-IronPort-AV: E=Sophos;i="6.13,255,1732608000"; d="scan'208";a="61548076" Received: from fmviesa002.fm.intel.com ([10.60.135.142]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2025 04:50:19 -0800 X-CSE-ConnectionGUID: m4GwPJjjS1OILI1k3Eht1A== X-CSE-MsgGUID: oUoa1YATRKuxv31jxcwvHQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="133528989" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by fmviesa002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2025 04:50:17 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, jani.nikula@linux.intel.com, ville.syrjala@linux.intel.com, mitulkumar.ajitkumar.golani@intel.com Subject: [PATCH 14/28] drm/i915/dp: Avoid vrr compute config for HDMI sink Date: Mon, 3 Feb 2025 18:08:26 +0530 Message-ID: <20250203123840.3855874-15-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20250203123840.3855874-1-ankit.k.nautiyal@intel.com> References: <20250203123840.3855874-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Currently we do not support VRR with HDMI so skip vrr compute config step for DP with HDMI sink. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_dp.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 411df92df4a1..d493f7436848 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -3208,7 +3208,13 @@ intel_dp_compute_config(struct intel_encoder *encoder, if (pipe_config->splitter.enable) pipe_config->dp_m_n.data_m *= pipe_config->splitter.link_count; - intel_vrr_compute_config(pipe_config, conn_state); + /* + * VRR via PCON is currently unsupported. + * TODO: Add support for VRR for DP HDMI2.1 PCON. + */ + if (!intel_dp_has_hdmi_sink(intel_dp)) + intel_vrr_compute_config(pipe_config, conn_state); + intel_dp_compute_as_sdp(intel_dp, pipe_config); intel_psr_compute_config(intel_dp, pipe_config, conn_state); intel_alpm_lobf_compute_config(intel_dp, pipe_config, conn_state); From patchwork Mon Feb 3 12:38:27 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13957419 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0920AC02192 for ; Mon, 3 Feb 2025 12:50:23 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8E61210E4C2; Mon, 3 Feb 2025 12:50:22 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="KOjZkCjw"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8022E10E4BF; Mon, 3 Feb 2025 12:50:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1738587021; x=1770123021; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=GPu4Zt3LgXY4xe+a9BlsaA8zLAmHNZDSyztqTMuLYvA=; b=KOjZkCjwEx6UQGcGkQfobKU3PIsF2smVeJTduU4PiUC8KrVKYu2r0fBE h/ftmewwtA6jyDhGSvPpU90Qqhk6oY72jP5f3aLB+7h3ZIWhASIWWm2FR 4zzx6sdVfvPpAqOxRMsFGhv39c/QpEQculVGooOoco+mrqUoMThOHtEkI eCl7FKDfTGXAiVgpfKhC3WucHgoZytFvyepub9GUQkRzUjvNbpicfBR7v q3yZklWhbpnzoHeIZZcBX8dUJauRpVMbyyRHAirqARKW6Vidz7RUN5d63 Cfz6yDuSnTMyPfhRMfntFIuTQi+l95cdNK7mt1fxEG87Zf+ahiQdv+WaU A==; X-CSE-ConnectionGUID: mrbJ51JbSxuiIN1E71BhMg== X-CSE-MsgGUID: N5fD1aT1SYq98p7HK1o5Gw== X-IronPort-AV: E=McAfee;i="6700,10204,11335"; a="61548081" X-IronPort-AV: E=Sophos;i="6.13,255,1732608000"; d="scan'208";a="61548081" Received: from fmviesa002.fm.intel.com ([10.60.135.142]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2025 04:50:21 -0800 X-CSE-ConnectionGUID: mvwV6IEwThiQlBmOBrfwZA== X-CSE-MsgGUID: t5GHE3w/RWuDBRwIw9JDGA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="133528996" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by fmviesa002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2025 04:50:19 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, jani.nikula@linux.intel.com, ville.syrjala@linux.intel.com, mitulkumar.ajitkumar.golani@intel.com Subject: [PATCH 15/28] drm/i915/vrr: Introduce VRR mode Fixed RR Date: Mon, 3 Feb 2025 18:08:27 +0530 Message-ID: <20250203123840.3855874-16-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20250203123840.3855874-1-ankit.k.nautiyal@intel.com> References: <20250203123840.3855874-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" VRR timing generator can be used even with fixed refresh rate. With this the legacy timing generator can be phased out and VRR timing generator can be used for all cases, whether panels support VRR or not. Add an enum value to represent the VRR timing generator in fixed refresh rate mode and update the helper vrrtg_mode_str for printing it. Signed-off-by: Ankit Nautiyal --- .../gpu/drm/i915/display/intel_crtc_state_dump.c | 1 + drivers/gpu/drm/i915/display/intel_display_types.h | 1 + drivers/gpu/drm/i915/display/intel_vrr.c | 13 ++++++++++--- 3 files changed, 12 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c index 9f4c88f05f4c..08559c6a5095 100644 --- a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c +++ b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c @@ -176,6 +176,7 @@ static const char * const vrrtg_mode_str[] = { [INTEL_VRRTG_MODE_NONE] = "none", [INTEL_VRRTG_MODE_VRR] = "vrr", [INTEL_VRRTG_MODE_CMRR] = "cmrr", + [INTEL_VRRTG_MODE_FIXED_RR] = "fixed_rr", }; static const char *intel_vrrtg_mode_name(enum intel_vrrtg_mode mode) diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index 338cfd99e5d3..edf021db0d31 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -939,6 +939,7 @@ enum intel_vrrtg_mode { INTEL_VRRTG_MODE_NONE, INTEL_VRRTG_MODE_VRR, INTEL_VRRTG_MODE_CMRR, + INTEL_VRRTG_MODE_FIXED_RR, }; struct intel_crtc_state { diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index 2b4376e985f6..1b522af70696 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -583,15 +583,12 @@ void intel_vrr_get_config(struct intel_crtc_state *crtc_state) TRANS_VRR_CTL(display, cpu_transcoder)); if (HAS_CMRR(display) && trans_vrr_ctl & VRR_CTL_CMRR_ENABLE) { - crtc_state->vrr.mode = INTEL_VRRTG_MODE_CMRR; crtc_state->vrr.cmrr_n = intel_de_read64_2x32(display, TRANS_CMRR_N_LO(display, cpu_transcoder), TRANS_CMRR_N_HI(display, cpu_transcoder)); crtc_state->vrr.cmrr_m = intel_de_read64_2x32(display, TRANS_CMRR_M_LO(display, cpu_transcoder), TRANS_CMRR_M_HI(display, cpu_transcoder)); - } else if (trans_vrr_ctl & VRR_CTL_VRR_ENABLE) { - crtc_state->vrr.mode = INTEL_VRRTG_MODE_VRR; } if (DISPLAY_VER(display) >= 13) @@ -621,6 +618,16 @@ void intel_vrr_get_config(struct intel_crtc_state *crtc_state) } } + if (trans_vrr_ctl & VRR_CTL_VRR_ENABLE) { + if (trans_vrr_ctl & VRR_CTL_CMRR_ENABLE) + crtc_state->vrr.mode = INTEL_VRRTG_MODE_CMRR; + else if (crtc_state->vrr.vmax == crtc_state->vrr.flipline && + crtc_state->vrr.vmin == crtc_state->vrr.flipline) + crtc_state->vrr.mode = INTEL_VRRTG_MODE_FIXED_RR; + else + crtc_state->vrr.mode = INTEL_VRRTG_MODE_VRR; + } + if (intel_vrr_is_enabled(crtc_state)) crtc_state->mode_flags |= I915_MODE_FLAG_VRR; } From patchwork Mon Feb 3 12:38:28 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13957420 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1F416C02194 for ; Mon, 3 Feb 2025 12:50:25 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B4AC610E4CD; Mon, 3 Feb 2025 12:50:24 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="SiEf5R+y"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) by gabe.freedesktop.org (Postfix) with ESMTPS id C1EF710E4C7; Mon, 3 Feb 2025 12:50:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1738587024; x=1770123024; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=C/1T6QII0phBRQAKLG5QKOXH6yYXtC2CgJm9WoaN1+s=; b=SiEf5R+yif0I5pa+/WzpdM6ELJ7rFYwFs3VteDUgpVNb2OMlCIitQJar 0JdgtLHr/l6exOK7h2fsoi54s7XdL3fD8way6He0HVAFGHPNyLIgeXW+U 3+Sc7qerfTK4UymqAJwisg6mATMbXK9RRGpTzROgoclf800YiKLRKLMCw I84DLaqV32R4lW+rmlLmefBc+t/AocJCiY5lFuL/t7qQa+8JqB5LiT2MR BK5uBBi7yofQSzb1oahsMF5VMW4s/1k7yLTZnOeX1478AOG1ngSdRMmtd yALY+awU7ecC4dgR9W+UOHfjdPgU3iZJqQ7Y89MRwuCtgFaLQRCG3dYfH g==; X-CSE-ConnectionGUID: PK1j6sEYSHGUPkRmq4YWDQ== X-CSE-MsgGUID: FjKlOKM8Rtm9UNLzgPXfvA== X-IronPort-AV: E=McAfee;i="6700,10204,11335"; a="61548085" X-IronPort-AV: E=Sophos;i="6.13,255,1732608000"; d="scan'208";a="61548085" Received: from fmviesa002.fm.intel.com ([10.60.135.142]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2025 04:50:24 -0800 X-CSE-ConnectionGUID: cryK07/4Qg64+kF3MvZ6aw== X-CSE-MsgGUID: ASVEI5C3Si+xi7e30wK2Iw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="133529002" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by fmviesa002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2025 04:50:21 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, jani.nikula@linux.intel.com, ville.syrjala@linux.intel.com, mitulkumar.ajitkumar.golani@intel.com Subject: [PATCH 16/28] drm/i915/display: Enable MSA Ignore Timing PAR only when in not fixed_rr mode Date: Mon, 3 Feb 2025 18:08:28 +0530 Message-ID: <20250203123840.3855874-17-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20250203123840.3855874-1-ankit.k.nautiyal@intel.com> References: <20250203123840.3855874-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" MSA Ignore Timing PAR enable is set in the DP sink when we enable variable refresh rate. When using VRR timing generator for fixed refresh rate we do not want to ignore the mode timings, as the refresh rate is still fixed. Modify the checks to enable MSA Ignore Timing PAR only when not in fixed_rr mode. v2: Initialize enable_msa_timing_par_ignore to false. v3: For link training ignore the msa timings if vrr.in_range and drop the flag enable_msa_timing_par_ignore. (Ville) Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_ddi.c | 2 +- drivers/gpu/drm/i915/display/intel_dp_link_training.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index f440299da637..f3a74804b61f 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -2281,7 +2281,7 @@ static void intel_dp_sink_set_msa_timing_par_ignore_state(struct intel_dp *intel { struct intel_display *display = to_intel_display(intel_dp); - if (!intel_vrr_is_enabled(crtc_state)) + if (!intel_vrr_is_enabled(crtc_state) || crtc_state->vrr.flipline == crtc_state->vrr.vmax) return; if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_DOWNSPREAD_CTRL, diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c index 9cb22baafeeb..ebf0657380d2 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c +++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c @@ -725,7 +725,7 @@ static void intel_dp_update_downspread_ctrl(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state) { intel_dp_link_training_set_mode(intel_dp, - crtc_state->port_clock, crtc_state->vrr.flipline); + crtc_state->port_clock, crtc_state->vrr.in_range); } void intel_dp_link_training_set_bw(struct intel_dp *intel_dp, From patchwork Mon Feb 3 12:38:29 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13957421 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 791A6C02192 for ; Mon, 3 Feb 2025 12:50:27 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2250810E4C5; Mon, 3 Feb 2025 12:50:27 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="gSrkqmmu"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) by gabe.freedesktop.org (Postfix) with ESMTPS id 1552710E4D4; Mon, 3 Feb 2025 12:50:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1738587026; x=1770123026; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=d49Mm9Gzixll8o0lQVw1MdxPRHF6AWsyT59u5/EeZJw=; b=gSrkqmmu+jt0b0lg+iMsvLseCDYZSbQFpKQ4nsYE/iUhhkXcyPKVNYEy WtF0xYEfOcHLtWrQtrhUHdPzYV/+X4RpZod6fwbtmcjrz6zYsCBdYfERF TGRWB6SYHJLDiRaKiPdbf1AI4/bbYAz+k1Iuex0oG4DLuAydmnddYBZpH aMwvo4bx2wYQIMKahrhPN7Z1aDKkbjQUVP3l4aTbiIutQlmDL1uj8gyz9 DiZ+GZ+NO1dLAHadSioXMzxa28QWTB6nJ3Z6Y95mTMduPoYvQPZ49mQBY DPb7Jo8wFZwbzj5SuqtgSL9eHlAVnpwfubfvIP4zN1EsY6s+QKpdbr3Ib w==; X-CSE-ConnectionGUID: hpPcOK3sQRSsLFDJymHlew== X-CSE-MsgGUID: loEUOR80QBu4gib1z+7vIQ== X-IronPort-AV: E=McAfee;i="6700,10204,11335"; a="61548095" X-IronPort-AV: E=Sophos;i="6.13,255,1732608000"; d="scan'208";a="61548095" Received: from fmviesa002.fm.intel.com ([10.60.135.142]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2025 04:50:26 -0800 X-CSE-ConnectionGUID: GNQIPp3nQ/2kL+QJAms1ag== X-CSE-MsgGUID: vJGjaC+WR/q+/tNTIesAKA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="133529009" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by fmviesa002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2025 04:50:24 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, jani.nikula@linux.intel.com, ville.syrjala@linux.intel.com, mitulkumar.ajitkumar.golani@intel.com Subject: [PATCH 17/28] drm/i915/hdmi: Use VRR Timing generator for HDMI Date: Mon, 3 Feb 2025 18:08:29 +0530 Message-ID: <20250203123840.3855874-18-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20250203123840.3855874-1-ankit.k.nautiyal@intel.com> References: <20250203123840.3855874-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Add support for using VRR Timing generator for HDMI panels. Signed-off-by: Ankit Nautiyal Reviewed-by: Mitul Golani --- drivers/gpu/drm/i915/display/intel_hdmi.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c index 3b51238022f4..fd1ef0538bf4 100644 --- a/drivers/gpu/drm/i915/display/intel_hdmi.c +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c @@ -64,6 +64,7 @@ #include "intel_panel.h" #include "intel_pfit.h" #include "intel_snps_phy.h" +#include "intel_vrr.h" static void assert_hdmi_port_disabled(struct intel_hdmi *intel_hdmi) @@ -2385,6 +2386,8 @@ int intel_hdmi_compute_config(struct intel_encoder *encoder, } } + intel_vrr_compute_config(pipe_config, conn_state); + intel_hdmi_compute_gcp_infoframe(encoder, pipe_config, conn_state); From patchwork Mon Feb 3 12:38:30 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13957422 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2DBE8C02192 for ; Mon, 3 Feb 2025 12:50:30 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id CBC0A10E4C1; Mon, 3 Feb 2025 12:50:29 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="b7yK03UO"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) by gabe.freedesktop.org (Postfix) with ESMTPS id 66B9510E4C1; Mon, 3 Feb 2025 12:50:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1738587028; x=1770123028; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=MgjFGeMJNM9mQoLufGPMYU2BtGeb3kNGFJhAb8313DI=; b=b7yK03UO7TuFiPrx3TER/v/J4rxCkNwtU1LIzSZIG33ZRunwr5q/oJMB yzhO3nlio9R2Uz7ZJg0r1cCiMAYroHWsAIxZK2dJ12bkI5/j5Xa+PmEpM G2oToyrgsv6wqrC0RfJvVhRhbcCnU4NSFyqWDLDaHQGIjpDOQ9sjLATrW i6GvZjg8twq9moFmJDAbpWAwZ8V+KMzvetI1EPBimka6vgIFx6rs1ePT2 03BEfAXjDCgp+pyReGvxYpwQ1fRlrOVqgPD4j8OTEv45rGmT/6oNc3qWU GB9aK7Mtj2Z6KqOHiB1B/m4Y7/707Ip8Wm2VrA9MGzWQrCaflmlfCKVlT g==; X-CSE-ConnectionGUID: J1tkAkUiSwmekICRi86nqQ== X-CSE-MsgGUID: CVgeifeVTNib0+vBeuIEUA== X-IronPort-AV: E=McAfee;i="6700,10204,11335"; a="61548103" X-IronPort-AV: E=Sophos;i="6.13,255,1732608000"; d="scan'208";a="61548103" Received: from fmviesa002.fm.intel.com ([10.60.135.142]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2025 04:50:28 -0800 X-CSE-ConnectionGUID: cviyqB/3Sr6Akyvgv3H0/Q== X-CSE-MsgGUID: /UcHUnRzS5SVPZ96JKC5tA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="133529016" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by fmviesa002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2025 04:50:26 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, jani.nikula@linux.intel.com, ville.syrjala@linux.intel.com, mitulkumar.ajitkumar.golani@intel.com Subject: [PATCH 18/28] drm/i915/display: Disable PSR before disabling VRR Date: Mon, 3 Feb 2025 18:08:30 +0530 Message-ID: <20250203123840.3855874-19-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20250203123840.3855874-1-ankit.k.nautiyal@intel.com> References: <20250203123840.3855874-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" As per bspec 49268: Disable PSR before disabling VRR. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_display.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index d70e19beef4b..09f881050ccd 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -1315,6 +1315,8 @@ static void intel_pre_plane_update(struct intel_atomic_state *state, intel_atomic_get_new_crtc_state(state, crtc); enum pipe pipe = crtc->pipe; + intel_psr_pre_plane_update(state, crtc); + if (intel_crtc_vrr_disabling(state, crtc)) { intel_vrr_disable(old_crtc_state); intel_crtc_update_active_timings(old_crtc_state, false); @@ -1325,8 +1327,6 @@ static void intel_pre_plane_update(struct intel_atomic_state *state, intel_drrs_deactivate(old_crtc_state); - intel_psr_pre_plane_update(state, crtc); - if (hsw_ips_pre_update(state, crtc)) intel_crtc_wait_for_next_vblank(crtc); From patchwork Mon Feb 3 12:38:31 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13957423 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8DB87C02197 for ; Mon, 3 Feb 2025 12:50:31 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2B54F10E4C6; Mon, 3 Feb 2025 12:50:31 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="JqnNgsU7"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) by gabe.freedesktop.org (Postfix) with ESMTPS id 9A62C10E4C6; Mon, 3 Feb 2025 12:50:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1738587031; x=1770123031; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=xvkVaIGQSoCqKWznSJMzyk8JJFQKvKAZWYjrBwf7ens=; b=JqnNgsU7TNiF8n8x19ytkVO7XUUj/fVb9LjzF/B8CjYubdZoubrOUil4 2NoKvqyz8c3EPXoq5XlBn2U8rGzWsJyfyglFU2ntBpWLKcj9nO7CMbpw8 DYm4NIG+zALEjFXdcDPk4J6aMpXchsrwyKtXIOYiqYGkebwQTtGhBTc8k fnusPY4IUs5ucZ4LBZq8nQjaACjO38nG7tnWA3GDI1q4eqsgo3JSrXryM BXsMNvBbt9hfxO1zszWkmViJQzckZHENFS6tvZrOFlTb/YcN35OXSSmVG wsoIpGNqpfd9ZhnBjY4oGLJdh7BOcWIAPa/Is3ujaxXgIRDVMcMQSKv55 w==; X-CSE-ConnectionGUID: NVjcMkiwQzu2k2PmkjVrHA== X-CSE-MsgGUID: uHpq0sibQuSxdt6nrEJEFQ== X-IronPort-AV: E=McAfee;i="6700,10204,11335"; a="61548105" X-IronPort-AV: E=Sophos;i="6.13,255,1732608000"; d="scan'208";a="61548105" Received: from fmviesa002.fm.intel.com ([10.60.135.142]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2025 04:50:30 -0800 X-CSE-ConnectionGUID: 0JlZEd4dSZWIUBWsWlbidw== X-CSE-MsgGUID: KNMhFe2bQx6zXV6VGwFwNw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="133529028" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by fmviesa002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2025 04:50:28 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, jani.nikula@linux.intel.com, ville.syrjala@linux.intel.com, mitulkumar.ajitkumar.golani@intel.com Subject: [PATCH 19/28] drm/i915/psr: Allow PSR for fixed refrsh rate with VRR TG Date: Mon, 3 Feb 2025 18:08:31 +0530 Message-ID: <20250203123840.3855874-20-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20250203123840.3855874-1-ankit.k.nautiyal@intel.com> References: <20250203123840.3855874-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" At the moment PSR/PSR2 are not supported with variable refresh rate. However it can be supported with fixed refresh rate while running with VRR timing generator. Enable PSR for fixed refresh rate when using the VRR timing generator. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_psr.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 6fcb8d4a1c39..9a029d322fdd 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -1688,9 +1688,9 @@ void intel_psr_compute_config(struct intel_dp *intel_dp, } /* - * Currently PSR/PR doesn't work reliably with VRR enabled. + * Avoid PSR/PR when not in fixed refresh rate mode. */ - if (intel_vrr_is_enabled(crtc_state)) + if (intel_vrr_is_enabled(crtc_state) && crtc_state->vrr.mode != INTEL_VRRTG_MODE_FIXED_RR) return; crtc_state->has_panel_replay = _panel_replay_compute_config(intel_dp, From patchwork Mon Feb 3 12:38:32 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13957424 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DD124C02192 for ; Mon, 3 Feb 2025 12:50:33 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7D38B10E4CC; Mon, 3 Feb 2025 12:50:33 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="IPZXfnt1"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) by gabe.freedesktop.org (Postfix) with ESMTPS id E9D7E10E4CC; Mon, 3 Feb 2025 12:50:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1738587033; x=1770123033; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=egN6yFAMPF0qk02U39ScuO3nVrGL1FTx0A49kAKPvjI=; b=IPZXfnt1Ga06JsfCsLhCTBblOauavolXx+UkLJFXf1ENrGQLdPm4FYvT ygUwIV/B6CFOAdkqdmlUWaiQyhc4fYp+69CqgfFX4lgKy9FCPzhS8Vol4 pN1XzVGaU2xxnmTfb5h0JRJ2Cjgh7SU2zYrYTKS+xPPXeIhVsT513nLDk rBz90ooHcYVIx7zPiyB9cyfUPYeG08AHAmwGCcEsdtRpSnnmdkKj78AHd MctO4/aR5bTO8tThIDvcCmAQzEEjkaoqDSIRKzKwlm4Ki2HciNRBIUJa5 bnwahivL0WU8lrWb2J5/K5xs9nWrLBSnYNqOS2b5AFgqlLID/uRQhYG8D w==; X-CSE-ConnectionGUID: 9iGdTBBlSAS0Yk3MyQQcKQ== X-CSE-MsgGUID: MwZ8UjxyQzmhxhCEnGO7Qw== X-IronPort-AV: E=McAfee;i="6700,10204,11335"; a="61548106" X-IronPort-AV: E=Sophos;i="6.13,255,1732608000"; d="scan'208";a="61548106" Received: from fmviesa002.fm.intel.com ([10.60.135.142]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2025 04:50:33 -0800 X-CSE-ConnectionGUID: ImWgexFRSdOu8NQuGE5m5g== X-CSE-MsgGUID: VmafF43GTPCzXrf7TOW8JA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="133529041" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by fmviesa002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2025 04:50:31 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, jani.nikula@linux.intel.com, ville.syrjala@linux.intel.com, mitulkumar.ajitkumar.golani@intel.com Subject: [PATCH 20/28] drm/i915/display: Extend WA 14015406119 for PSR2 Date: Mon, 3 Feb 2025 18:08:32 +0530 Message-ID: <20250203123840.3855874-21-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20250203123840.3855874-1-ankit.k.nautiyal@intel.com> References: <20250203123840.3855874-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Wa_14015406119 is required for PSR1/2 while working with fixed refresh rate with VRR timing generator. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_display.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 09f881050ccd..a920d06278fe 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -2617,8 +2617,9 @@ static bool intel_crtc_needs_wa_14015401596(const struct intel_crtc_state *crtc_ { struct intel_display *display = to_intel_display(crtc_state); - return intel_vrr_possible(crtc_state) && crtc_state->has_psr && - IS_DISPLAY_VER(display, 13, 14); + return intel_vrr_possible(crtc_state) && + (crtc_state->has_psr || crtc_state->has_sel_update) && + IS_DISPLAY_VER(display, 13, 14); } static int intel_crtc_vblank_delay(const struct intel_crtc_state *crtc_state) From patchwork Mon Feb 3 12:38:33 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13957425 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 69FBDC02198 for ; Mon, 3 Feb 2025 12:50:36 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 09A2C10E4D3; Mon, 3 Feb 2025 12:50:36 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="RhyPgFLv"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) by gabe.freedesktop.org (Postfix) with ESMTPS id 3A67610E4CF; Mon, 3 Feb 2025 12:50:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1738587035; x=1770123035; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=3QzJyMZNKZfN/eA0KBFROH/+srdH5AvmHu1nmzE43Bc=; b=RhyPgFLvFOLzrKUBwGJ9dCZoDW65Q0eHAonGlm7mqCNIpiasxx+OS7wu lGNyxIEZ9Emk28UT2Z2t98voAII1EyFYkv41NCoO90bjTHOPUIgIHBnaz cRXob2RS6elqwGRJ8qUjZmOuPTNgGpH1pS9i1QEPvmOilSNFAzt2bAwy9 1Rax6It1vYQdkRLkQXjKYmNb7Gip9H9BLY4Zj9aXL0Y4TZME5Q0fDXSRY ahIEHV05KfGwU50050+lgKO1TMq0DR1Lc0ocd8LL0wddEzb2zM9nHBR0q IV7MreztEXKdysCeMXqrxVX1l04zaPoul6RIc3nREo22OZpswY5H9MpUx g==; X-CSE-ConnectionGUID: 0euWHz8JQUS5PATXHI9Wyg== X-CSE-MsgGUID: w4SFFRDSRemyL8XYQgwwuQ== X-IronPort-AV: E=McAfee;i="6700,10204,11335"; a="61548114" X-IronPort-AV: E=Sophos;i="6.13,255,1732608000"; d="scan'208";a="61548114" Received: from fmviesa002.fm.intel.com ([10.60.135.142]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2025 04:50:35 -0800 X-CSE-ConnectionGUID: wmuOfoKvTfC5VAF5fPlXIA== X-CSE-MsgGUID: FE+aM6rjSXWndr+mXSFTFA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="133529055" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by fmviesa002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2025 04:50:33 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, jani.nikula@linux.intel.com, ville.syrjala@linux.intel.com, mitulkumar.ajitkumar.golani@intel.com Subject: [PATCH 21/28] drm/i915/vrr: Handle joiner with vrr Date: Mon, 3 Feb 2025 18:08:33 +0530 Message-ID: <20250203123840.3855874-22-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20250203123840.3855874-1-ankit.k.nautiyal@intel.com> References: <20250203123840.3855874-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Do not program transcoder registers for VRR for the secondary pipe of the joiner. Remove check to skip VRR for joiner case. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_vrr.c | 19 ++++++++++++------- 1 file changed, 12 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index 1b522af70696..7fad8ded9794 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -342,13 +342,6 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state, struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; int vmin, vmax; - /* - * FIXME all joined pipes share the same transcoder. - * Need to account for that during VRR toggle/push/etc. - */ - if (crtc_state->joiner_pipes) - return; - if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) return; @@ -440,6 +433,9 @@ void intel_vrr_set_transcoder_timings(const struct intel_crtc_state *crtc_state) struct intel_display *display = to_intel_display(crtc_state); enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; + if (intel_crtc_is_joiner_secondary(crtc_state)) + return; + /* * This bit seems to have two meanings depending on the platform: * TGL: generate VRR "safe window" for DSB vblank waits @@ -491,6 +487,9 @@ void intel_vrr_send_push(struct intel_dsb *dsb, if (!intel_vrr_is_enabled(crtc_state)) return; + if (intel_crtc_is_joiner_secondary(crtc_state)) + return; + if (dsb) intel_dsb_nonpost_start(dsb); @@ -518,6 +517,9 @@ void intel_vrr_enable(const struct intel_crtc_state *crtc_state) struct intel_display *display = to_intel_display(crtc_state); enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; + if (intel_crtc_is_joiner_secondary(crtc_state)) + return; + if (!intel_vrr_is_enabled(crtc_state)) return; @@ -560,6 +562,9 @@ void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state) struct intel_display *display = to_intel_display(old_crtc_state); enum transcoder cpu_transcoder = old_crtc_state->cpu_transcoder; + if (intel_crtc_is_joiner_secondary(old_crtc_state)) + return; + if (!intel_vrr_is_enabled(old_crtc_state)) return; From patchwork Mon Feb 3 12:38:34 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13957426 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2C386C02194 for ; Mon, 3 Feb 2025 12:50:39 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id CB16510E4D5; Mon, 3 Feb 2025 12:50:38 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="iejHKKOD"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) by gabe.freedesktop.org (Postfix) with ESMTPS id 85CE610E4CF; Mon, 3 Feb 2025 12:50:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1738587038; x=1770123038; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=yIiVBJUtpDPjyKyubVRu2DUL7VJKldgY/omxq+XZIP8=; b=iejHKKODh5YRl8TJ6J9Jqyn2CmFp9RE1T0TXSg2ltdKoqaV0kfHxE6i7 uRo+dSYzESXB2RghMCCiWhFNkNTP/AXFIg7RjzZqO4siCknoKlKP8WEoe gTA//V94oDOCbnYXw3awsnoFCDhOqzfgDDbaRJovLzsZCrTNoKHtqWyuu UbipowIO/adKgx+Q1kCd5jLIC8jMyDofWoic/g+mNGCKFOi1/Ub2WVWYx 6/bmhGmL+olXpMR3xuAtF4G5U5yni5hWKO1IJCi1u6zPkPDolg/dsjuxl Wadk2jikp5nxiKbcTEDxONyA8Ec/Q2IqGXLdhj9hCUQ7Wnyh26Zn8J5n/ w==; X-CSE-ConnectionGUID: 0HdH0J2sQLG1hNvRPFSHNQ== X-CSE-MsgGUID: BUZOYx8XQXmjVENrd7Lahw== X-IronPort-AV: E=McAfee;i="6700,10204,11335"; a="61548119" X-IronPort-AV: E=Sophos;i="6.13,255,1732608000"; d="scan'208";a="61548119" Received: from fmviesa002.fm.intel.com ([10.60.135.142]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2025 04:50:37 -0800 X-CSE-ConnectionGUID: fxwcK1+NS6mf0PZ4up6xyA== X-CSE-MsgGUID: 2lz1QgA1S9OdU0vxVTY79g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="133529073" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by fmviesa002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2025 04:50:35 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, jani.nikula@linux.intel.com, ville.syrjala@linux.intel.com, mitulkumar.ajitkumar.golani@intel.com Subject: [PATCH 22/28] drm/i915/vrr: Refactor condition for computing vmax and LRR Date: Mon, 3 Feb 2025 18:08:34 +0530 Message-ID: <20250203123840.3855874-23-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20250203123840.3855874-1-ankit.k.nautiyal@intel.com> References: <20250203123840.3855874-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" LRR and Vmax can be computed only if VRR is supported and vrr.in_range is set. Currently we proceed with vrr timings only for VRR supporting panels and return otherwise. For using VRR TG with fix timings, need to continue even for panels that do not support VRR. To achieve this, refactor the condition for computing vmax and update_lrr so that we can continue for fixed timings for panels that do not support VRR. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_vrr.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index 7fad8ded9794..c852de748ce3 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -340,21 +340,21 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state, struct intel_dp *intel_dp = intel_attached_dp(connector); bool is_edp = intel_dp_is_edp(intel_dp); struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; - int vmin, vmax; + int vmin = 0, vmax = 0; if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) return; crtc_state->vrr.in_range = intel_vrr_is_in_range(connector, drm_mode_vrefresh(adjusted_mode)); - if (!crtc_state->vrr.in_range) - return; - if (HAS_LRR(display)) - crtc_state->update_lrr = true; + if (crtc_state->vrr.in_range) { + if (HAS_LRR(display)) + crtc_state->update_lrr = true; + vmax = intel_vrr_compute_vmax(connector, adjusted_mode); + } vmin = intel_vrr_compute_vmin(crtc_state); - vmax = intel_vrr_compute_vmax(connector, adjusted_mode); if (vmin >= vmax) return; From patchwork Mon Feb 3 12:38:35 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13957427 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 54812C02196 for ; Mon, 3 Feb 2025 12:50:41 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 00E8C10E4D4; Mon, 3 Feb 2025 12:50:41 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="Sva+t9e8"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) by gabe.freedesktop.org (Postfix) with ESMTPS id C47EE10E4D4; Mon, 3 Feb 2025 12:50:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1738587040; x=1770123040; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=rMvmIZdrWQLNgwza+o0Lod5rVKvUf21ZOyld5VgyBco=; b=Sva+t9e855Nyf98wHl4kEGL2tP0eXxNVYxdgL5z0PqIvRTz/FcKjbhiK r47izUrebA07WtU30/VzhnBhjNsx/fr4rXFL4RzheFHysyGN+xxDIMRdk 5V4wIkSUzHEmXJggZ0hdhJPMKdV5nj6tIJ4Wj5ycFfhWx551MgRJGGmL+ MrMoZ0VmWW0dlyMpnHRIpCpSUTtixMvRnX8M6mcNHmLv5yxltUmzwGHN2 oZ5K9Aa5iAt+Kbmxt1Y7rvTWlagJVuXA5k/9iPk/kH299f5tTOZAEW0zo EI2d+Pf48IeUB3tmYUogOk98oAerTC/9dK7ywwn8RIA6lV5txSW8Yt4Mw Q==; X-CSE-ConnectionGUID: +PiYlWWaSVG66yLniq6p6A== X-CSE-MsgGUID: gY+d17k7Q8eRRRgZMySWFA== X-IronPort-AV: E=McAfee;i="6700,10204,11335"; a="61548124" X-IronPort-AV: E=Sophos;i="6.13,255,1732608000"; d="scan'208";a="61548124" Received: from fmviesa002.fm.intel.com ([10.60.135.142]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2025 04:50:40 -0800 X-CSE-ConnectionGUID: UW6t+F6HRI2xmD/Vau6koQ== X-CSE-MsgGUID: dsSlaB1VRxyIC7uqB9e+WQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="133529081" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by fmviesa002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2025 04:50:37 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, jani.nikula@linux.intel.com, ville.syrjala@linux.intel.com, mitulkumar.ajitkumar.golani@intel.com Subject: [PATCH 23/28] drm/i915/display: Pass vrr.mode to intel_crtc_update_active_timings() Date: Mon, 3 Feb 2025 18:08:35 +0530 Message-ID: <20250203123840.3855874-24-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20250203123840.3855874-1-ankit.k.nautiyal@intel.com> References: <20250203123840.3855874-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Modify the helper intel_crtc_update_active_timings() to update the timings based on the given vrr.mode. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_display.c | 6 +++--- drivers/gpu/drm/i915/display/intel_vblank.c | 22 ++++++++++++-------- drivers/gpu/drm/i915/display/intel_vblank.h | 4 +++- 3 files changed, 19 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index a920d06278fe..2127888d459e 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -1319,7 +1319,7 @@ static void intel_pre_plane_update(struct intel_atomic_state *state, if (intel_crtc_vrr_disabling(state, crtc)) { intel_vrr_disable(old_crtc_state); - intel_crtc_update_active_timings(old_crtc_state, false); + intel_crtc_update_active_timings(old_crtc_state, INTEL_VRRTG_MODE_NONE); } if (audio_disabling(old_crtc_state, new_crtc_state)) @@ -7189,7 +7189,7 @@ static void intel_enable_crtc(struct intel_atomic_state *state, intel_atomic_get_new_crtc_state(state, pipe_crtc); /* VRR will be enable later, if required */ - intel_crtc_update_active_timings(pipe_crtc_state, false); + intel_crtc_update_active_timings(pipe_crtc_state, INTEL_VRRTG_MODE_NONE); } dev_priv->display.funcs.display->crtc_enable(state, crtc); @@ -7281,7 +7281,7 @@ static void intel_update_crtc(struct intel_atomic_state *state, if (intel_crtc_vrr_enabling(state, crtc) || new_crtc_state->update_m_n || new_crtc_state->update_lrr) intel_crtc_update_active_timings(new_crtc_state, - intel_vrr_is_enabled(new_crtc_state)); + new_crtc_state->vrr.mode); /* * We usually enable FIFO underrun interrupts as part of the diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c b/drivers/gpu/drm/i915/display/intel_vblank.c index 4efd4f7d497a..3ed814245b61 100644 --- a/drivers/gpu/drm/i915/display/intel_vblank.c +++ b/drivers/gpu/drm/i915/display/intel_vblank.c @@ -510,22 +510,26 @@ void intel_wait_for_pipe_scanline_moving(struct intel_crtc *crtc) static void intel_crtc_active_timings(struct drm_display_mode *mode, int *vmax_vblank_start, const struct intel_crtc_state *crtc_state, - bool vrr_enable) + enum intel_vrrtg_mode vrr_mode) { drm_mode_init(mode, &crtc_state->hw.adjusted_mode); *vmax_vblank_start = 0; - if (!vrr_enable) + if (vrr_mode == INTEL_VRRTG_MODE_NONE) return; - mode->crtc_vtotal = intel_vrr_vmax_vtotal(crtc_state); - mode->crtc_vblank_end = intel_vrr_vmax_vtotal(crtc_state); - mode->crtc_vblank_start = intel_vrr_vmin_vblank_start(crtc_state); - *vmax_vblank_start = intel_vrr_vmax_vblank_start(crtc_state); + if (vrr_mode == INTEL_VRRTG_MODE_VRR) { + mode->crtc_vtotal = intel_vrr_vmax_vtotal(crtc_state); + mode->crtc_vblank_end = intel_vrr_vmax_vtotal(crtc_state); + mode->crtc_vblank_start = intel_vrr_vmin_vblank_start(crtc_state); + *vmax_vblank_start = intel_vrr_vmax_vblank_start(crtc_state); + } else { + MISSING_CASE(vrr_mode); + } } void intel_crtc_update_active_timings(const struct intel_crtc_state *crtc_state, - bool vrr_enable) + enum intel_vrrtg_mode vrr_mode) { struct intel_display *display = to_intel_display(crtc_state); struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); @@ -535,9 +539,9 @@ void intel_crtc_update_active_timings(const struct intel_crtc_state *crtc_state, unsigned long irqflags; intel_crtc_active_timings(&adjusted_mode, &vmax_vblank_start, - crtc_state, vrr_enable); + crtc_state, vrr_mode); - if (vrr_enable) + if (vrr_mode != INTEL_VRRTG_MODE_NONE) drm_WARN_ON(display->drm, (mode_flags & I915_MODE_FLAG_VRR) == 0); else mode_flags &= ~I915_MODE_FLAG_VRR; diff --git a/drivers/gpu/drm/i915/display/intel_vblank.h b/drivers/gpu/drm/i915/display/intel_vblank.h index 21fbb08d61d5..addd6db14df2 100644 --- a/drivers/gpu/drm/i915/display/intel_vblank.h +++ b/drivers/gpu/drm/i915/display/intel_vblank.h @@ -9,6 +9,8 @@ #include #include +enum intel_vrrtg_mode; + struct drm_crtc; struct drm_display_mode; struct intel_atomic_state; @@ -41,7 +43,7 @@ int intel_get_crtc_scanline(struct intel_crtc *crtc); void intel_wait_for_pipe_scanline_stopped(struct intel_crtc *crtc); void intel_wait_for_pipe_scanline_moving(struct intel_crtc *crtc); void intel_crtc_update_active_timings(const struct intel_crtc_state *crtc_state, - bool vrr_enable); + enum intel_vrrtg_mode vrr_mode); int intel_crtc_scanline_offset(const struct intel_crtc_state *crtc_state); const struct intel_crtc_state * From patchwork Mon Feb 3 12:38:36 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13957428 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6D05BC02192 for ; Mon, 3 Feb 2025 12:50:44 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 114E210E4D7; Mon, 3 Feb 2025 12:50:44 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="DslZVp0L"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) by gabe.freedesktop.org (Postfix) with ESMTPS id 41A7310E4D0; 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03 Feb 2025 04:50:42 -0800 X-CSE-ConnectionGUID: NTkx1CWgRJygf9pYL8vGyA== X-CSE-MsgGUID: RW4tl4/BRxOP06msvPAR3A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="133529088" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by fmviesa002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2025 04:50:40 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, jani.nikula@linux.intel.com, ville.syrjala@linux.intel.com, mitulkumar.ajitkumar.golani@intel.com Subject: [PATCH 24/28] drm/i915/vblank: Add crtc active timings for fixed_rr mode Date: Mon, 3 Feb 2025 18:08:36 +0530 Message-ID: <20250203123840.3855874-25-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20250203123840.3855874-1-ankit.k.nautiyal@intel.com> References: <20250203123840.3855874-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Make provision for fixed refresh rate timings while updating the crtc timings for vrr. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_vblank.c | 5 +++++ drivers/gpu/drm/i915/display/intel_vrr.c | 7 ++++++- drivers/gpu/drm/i915/display/intel_vrr.h | 2 ++ 3 files changed, 13 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c b/drivers/gpu/drm/i915/display/intel_vblank.c index 3ed814245b61..8abcf4c2cfe7 100644 --- a/drivers/gpu/drm/i915/display/intel_vblank.c +++ b/drivers/gpu/drm/i915/display/intel_vblank.c @@ -523,6 +523,11 @@ static void intel_crtc_active_timings(struct drm_display_mode *mode, mode->crtc_vblank_end = intel_vrr_vmax_vtotal(crtc_state); mode->crtc_vblank_start = intel_vrr_vmin_vblank_start(crtc_state); *vmax_vblank_start = intel_vrr_vmax_vblank_start(crtc_state); + } else if (vrr_mode == INTEL_VRRTG_MODE_FIXED_RR) { + mode->crtc_vtotal = intel_vrr_fixed_rr_vtotal(crtc_state); + mode->crtc_vblank_end = intel_vrr_fixed_rr_vtotal(crtc_state); + mode->crtc_vblank_start = intel_vrr_vmin_vblank_start(crtc_state); + *vmax_vblank_start = intel_vrr_fixed_rr_vmax_vblank_start(crtc_state); } else { MISSING_CASE(vrr_mode); } diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index c852de748ce3..e44335cdc383 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -250,7 +250,6 @@ void intel_vrr_compute_vrr_timings(struct intel_crtc_state *crtc_state) * For fixed refresh rate mode Vmin, Vmax and Flipline all are set to * Vtotal value. */ -static int intel_vrr_fixed_rr_vtotal(const struct intel_crtc_state *crtc_state) { struct intel_display *display = to_intel_display(crtc_state); @@ -263,6 +262,12 @@ int intel_vrr_fixed_rr_vtotal(const struct intel_crtc_state *crtc_state) intel_vrr_real_vblank_delay(crtc_state); } +int intel_vrr_fixed_rr_vmax_vblank_start(const struct intel_crtc_state *crtc_state) +{ + return intel_vrr_fixed_rr_vtotal(crtc_state) - + intel_vrr_vblank_exit_length(crtc_state); +} + static int intel_vrr_fixed_rr_vmax(const struct intel_crtc_state *crtc_state) { diff --git a/drivers/gpu/drm/i915/display/intel_vrr.h b/drivers/gpu/drm/i915/display/intel_vrr.h index 5ae8d6409f1a..9ba988af703a 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.h +++ b/drivers/gpu/drm/i915/display/intel_vrr.h @@ -35,5 +35,7 @@ int intel_vrr_vmin_vblank_start(const struct intel_crtc_state *crtc_state); int intel_vrr_vblank_delay(const struct intel_crtc_state *crtc_state); bool intel_vrr_is_enabled(const struct intel_crtc_state *crtc_state); bool intel_vrr_is_mode_vrr(const struct intel_crtc_state *crtc_state); +int intel_vrr_fixed_rr_vtotal(const struct intel_crtc_state *crtc_state); +int intel_vrr_fixed_rr_vmax_vblank_start(const struct intel_crtc_state *crtc_state); #endif /* __INTEL_VRR_H__ */ From patchwork Mon Feb 3 12:38:37 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13957429 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AB365C02192 for ; Mon, 3 Feb 2025 12:50:46 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4CBEF10E4F0; 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a="61548141" X-IronPort-AV: E=Sophos;i="6.13,255,1732608000"; d="scan'208";a="61548141" Received: from fmviesa002.fm.intel.com ([10.60.135.142]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2025 04:50:44 -0800 X-CSE-ConnectionGUID: kjzHPFBWT4mkKp2gy9lNnQ== X-CSE-MsgGUID: yJUw9LM4QiuBqaDgAzmWZw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="133529095" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by fmviesa002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2025 04:50:42 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, jani.nikula@linux.intel.com, ville.syrjala@linux.intel.com, mitulkumar.ajitkumar.golani@intel.com Subject: [PATCH 25/28] drm/i915/vrr: Always set vrr vmax/vmin/flipline in vrr_{enable/disable} Date: Mon, 3 Feb 2025 18:08:37 +0530 Message-ID: <20250203123840.3855874-26-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20250203123840.3855874-1-ankit.k.nautiyal@intel.com> References: <20250203123840.3855874-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" For platforms for which vrr timing generator is always set, VRR_CTL enable bit does not need to toggle, so modify the vrr_{enable/disable} for this. At the moment the helper intel_vrr_always_use_vrr_tg() return false for all cases. This will be set later when all other bits are in place. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_vrr.c | 46 +++++++++++++++--------- 1 file changed, 30 insertions(+), 16 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index e44335cdc383..046c19336b91 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -517,6 +517,16 @@ bool intel_vrr_is_push_sent(const struct intel_crtc_state *crtc_state) return intel_de_read(display, TRANS_PUSH(display, cpu_transcoder)) & TRANS_PUSH_SEND; } +static +bool intel_vrr_always_use_vrr_tg(struct intel_display *display) +{ + if (!HAS_VRR(display)) + return false; + + /* #TODO return true for platforms supporting fixed_rr */ + return false; +} + void intel_vrr_enable(const struct intel_crtc_state *crtc_state) { struct intel_display *display = to_intel_display(crtc_state); @@ -535,16 +545,18 @@ void intel_vrr_enable(const struct intel_crtc_state *crtc_state) intel_de_write(display, TRANS_VRR_FLIPLINE(display, cpu_transcoder), crtc_state->vrr.flipline - 1); - intel_de_write(display, TRANS_PUSH(display, cpu_transcoder), - TRANS_PUSH_EN); - - if (crtc_state->vrr.mode == INTEL_VRRTG_MODE_CMRR) { - intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder), - VRR_CTL_VRR_ENABLE | VRR_CTL_CMRR_ENABLE | - trans_vrr_ctl(crtc_state)); - } else { - intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder), - VRR_CTL_VRR_ENABLE | trans_vrr_ctl(crtc_state)); + if (!intel_vrr_always_use_vrr_tg(display)) { + intel_de_write(display, TRANS_PUSH(display, cpu_transcoder), + TRANS_PUSH_EN); + + if (crtc_state->vrr.mode == INTEL_VRRTG_MODE_CMRR) { + intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder), + VRR_CTL_VRR_ENABLE | VRR_CTL_CMRR_ENABLE | + trans_vrr_ctl(crtc_state)); + } else { + intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder), + VRR_CTL_VRR_ENABLE | trans_vrr_ctl(crtc_state)); + } } } @@ -573,12 +585,14 @@ void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state) if (!intel_vrr_is_enabled(old_crtc_state)) return; - intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder), - trans_vrr_ctl(old_crtc_state)); - intel_de_wait_for_clear(display, - TRANS_VRR_STATUS(display, cpu_transcoder), - VRR_STATUS_VRR_EN_LIVE, 1000); - intel_de_write(display, TRANS_PUSH(display, cpu_transcoder), 0); + if (!intel_vrr_always_use_vrr_tg(display)) { + intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder), + trans_vrr_ctl(old_crtc_state)); + intel_de_wait_for_clear(display, + TRANS_VRR_STATUS(display, cpu_transcoder), + VRR_STATUS_VRR_EN_LIVE, 1000); + intel_de_write(display, TRANS_PUSH(display, cpu_transcoder), 0); + } intel_vrr_set_fixed_rr_timings(old_crtc_state); } From patchwork Mon Feb 3 12:38:38 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13957430 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1402AC02196 for ; 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X-CSE-ConnectionGUID: rn93JHdMR+eB1OW7Pitx6Q== X-CSE-MsgGUID: 2ou3BlAFT06pkfxKo0yUIA== X-IronPort-AV: E=McAfee;i="6700,10204,11335"; a="61548152" X-IronPort-AV: E=Sophos;i="6.13,255,1732608000"; d="scan'208";a="61548152" Received: from fmviesa002.fm.intel.com ([10.60.135.142]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2025 04:50:46 -0800 X-CSE-ConnectionGUID: 6wz4sT2LRqq1MYhAGYRK/g== X-CSE-MsgGUID: HPOsFcmlRm2o8hceS1zVfg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="133529102" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by fmviesa002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2025 04:50:44 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, jani.nikula@linux.intel.com, ville.syrjala@linux.intel.com, mitulkumar.ajitkumar.golani@intel.com Subject: [PATCH 26/28] drm/i915/display: Use fixed_rr timings in modeset sequence Date: Mon, 3 Feb 2025 18:08:38 +0530 Message-ID: <20250203123840.3855874-27-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20250203123840.3855874-1-ankit.k.nautiyal@intel.com> References: <20250203123840.3855874-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" During modeset enable sequence, program the fixed timings, and turn on the VRR Timing Generator (VRR TG) for platforms that always use VRR TG. Later if vrr timings are required, vrr_enable() will switch to the real VRR timings. With this we dont want to set the vrr timings during intel_pre_update_crtc(), as these are already handled in vrr_{enable/disable}. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_display.c | 16 ++++++++++++---- drivers/gpu/drm/i915/display/intel_vrr.c | 18 +++++++++++++++++- drivers/gpu/drm/i915/display/intel_vrr.h | 3 +++ 3 files changed, 32 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 2127888d459e..1f6309f63bf2 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -1757,6 +1757,7 @@ static void hsw_set_frame_start_delay(const struct intel_crtc_state *crtc_state) static void hsw_configure_cpu_transcoder(const struct intel_crtc_state *crtc_state) { + struct intel_display *display = to_intel_display(crtc_state); struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; @@ -1772,9 +1773,14 @@ static void hsw_configure_cpu_transcoder(const struct intel_crtc_state *crtc_sta } intel_set_transcoder_timings(crtc_state); - if (HAS_VRR(dev_priv)) - intel_vrr_set_transcoder_timings(crtc_state); - + if (HAS_VRR(dev_priv)) { + if (intel_vrr_always_use_vrr_tg(display)) { + intel_vrr_enable_fixed_rr_timings(crtc_state); + intel_crtc_update_active_timings(crtc_state, INTEL_VRRTG_MODE_FIXED_RR); + } else { + intel_vrr_set_transcoder_timings(crtc_state); + } + } if (cpu_transcoder != TRANSCODER_EDP) intel_de_write(dev_priv, TRANS_MULT(dev_priv, cpu_transcoder), crtc_state->pixel_multiplier - 1); @@ -7201,6 +7207,7 @@ static void intel_enable_crtc(struct intel_atomic_state *state, static void intel_pre_update_crtc(struct intel_atomic_state *state, struct intel_crtc *crtc) { + struct intel_display *display = to_intel_display(state); struct drm_i915_private *i915 = to_i915(state->base.dev); const struct intel_crtc_state *old_crtc_state = intel_atomic_get_old_crtc_state(state, crtc); @@ -7228,7 +7235,8 @@ static void intel_pre_update_crtc(struct intel_atomic_state *state, intel_crtc_needs_fastset(new_crtc_state)) icl_set_pipe_chicken(new_crtc_state); - if (vrr_params_changed(old_crtc_state, new_crtc_state)) + if (vrr_params_changed(old_crtc_state, new_crtc_state) && + !intel_vrr_always_use_vrr_tg(display)) intel_vrr_set_transcoder_timings(new_crtc_state); } diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index 046c19336b91..ab0fdb204442 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -517,7 +517,6 @@ bool intel_vrr_is_push_sent(const struct intel_crtc_state *crtc_state) return intel_de_read(display, TRANS_PUSH(display, cpu_transcoder)) & TRANS_PUSH_SEND; } -static bool intel_vrr_always_use_vrr_tg(struct intel_display *display) { if (!HAS_VRR(display)) @@ -597,6 +596,23 @@ void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state) intel_vrr_set_fixed_rr_timings(old_crtc_state); } +void intel_vrr_enable_fixed_rr_timings(const struct intel_crtc_state *crtc_state) +{ + struct intel_display *display = to_intel_display(crtc_state); + enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; + + intel_vrr_set_fixed_rr_timings(crtc_state); + + if (HAS_AS_SDP(display)) + intel_de_write(display, + TRANS_VRR_VSYNC(display, cpu_transcoder), + VRR_VSYNC_END(crtc_state->vrr.vsync_end) | + VRR_VSYNC_START(crtc_state->vrr.vsync_start)); + + intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder), + VRR_CTL_VRR_ENABLE | trans_vrr_ctl(crtc_state)); +} + void intel_vrr_get_config(struct intel_crtc_state *crtc_state) { struct intel_display *display = to_intel_display(crtc_state); diff --git a/drivers/gpu/drm/i915/display/intel_vrr.h b/drivers/gpu/drm/i915/display/intel_vrr.h index 9ba988af703a..f5fcd130434a 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.h +++ b/drivers/gpu/drm/i915/display/intel_vrr.h @@ -12,6 +12,7 @@ struct drm_connector_state; struct intel_atomic_state; struct intel_connector; struct intel_crtc_state; +struct intel_display; struct intel_dsb; bool intel_vrr_is_capable(struct intel_connector *connector); @@ -37,5 +38,7 @@ bool intel_vrr_is_enabled(const struct intel_crtc_state *crtc_state); bool intel_vrr_is_mode_vrr(const struct intel_crtc_state *crtc_state); int intel_vrr_fixed_rr_vtotal(const struct intel_crtc_state *crtc_state); int intel_vrr_fixed_rr_vmax_vblank_start(const struct intel_crtc_state *crtc_state); +bool intel_vrr_always_use_vrr_tg(struct intel_display *display); +void intel_vrr_enable_fixed_rr_timings(const struct intel_crtc_state *crtc_state); #endif /* __INTEL_VRR_H__ */ From patchwork Mon Feb 3 12:38:39 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13957431 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BEADDC02197 for ; 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X-CSE-ConnectionGUID: Wdln8XxnRl+eM4FXwxzs6w== X-CSE-MsgGUID: 8Sp8wGoKRNinScwD+Dhzmw== X-IronPort-AV: E=McAfee;i="6700,10204,11335"; a="61548161" X-IronPort-AV: E=Sophos;i="6.13,255,1732608000"; d="scan'208";a="61548161" Received: from fmviesa002.fm.intel.com ([10.60.135.142]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2025 04:50:49 -0800 X-CSE-ConnectionGUID: XcTRnyD2TwKyt/itJ6SziQ== X-CSE-MsgGUID: 5SYUV5Z3RpaB1/XdXGwPNg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="133529107" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by fmviesa002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2025 04:50:47 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, jani.nikula@linux.intel.com, ville.syrjala@linux.intel.com, mitulkumar.ajitkumar.golani@intel.com Subject: [PATCH 27/28] drm/i915/vrr: Always use VRR timing generator for MTL+ Date: Mon, 3 Feb 2025 18:08:39 +0530 Message-ID: <20250203123840.3855874-28-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20250203123840.3855874-1-ankit.k.nautiyal@intel.com> References: <20250203123840.3855874-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Currently VRR timing generator is used only when VRR is enabled by userspace. From MTL+, gradually move away from older timing generator and use VRR timing generator for fixed refresh rate also. In such a case, Flipline Vmin and Vmax all are set to the Vtotal of the mode, which effectively makes the VRR timing generator work in fixed refresh rate mode. The MSA Vtotal is derived from Vmax register. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_vrr.c | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index ab0fdb204442..206244714a61 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -297,6 +297,14 @@ void intel_vrr_prepare_fixed_timings(struct intel_crtc_state *crtc_state) crtc_state->vrr.flipline = intel_vrr_fixed_rr_flipline(crtc_state); } +static +void intel_vrr_compute_fixed_rr_timings(struct intel_crtc_state *crtc_state) +{ + intel_vrr_prepare_fixed_timings(crtc_state); + crtc_state->vrr.mode = INTEL_VRRTG_MODE_FIXED_RR; + crtc_state->mode_flags |= I915_MODE_FLAG_VRR; +} + static int intel_vrr_compute_vmin(struct intel_crtc_state *crtc_state) { @@ -361,7 +369,7 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state, vmin = intel_vrr_compute_vmin(crtc_state); - if (vmin >= vmax) + if (vmin >= vmax && !intel_vrr_always_use_vrr_tg(display)) return; crtc_state->vrr.vmin = vmin; @@ -376,10 +384,12 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state, */ crtc_state->vrr.vmin -= intel_vrr_flipline_offset(display); - if (crtc_state->uapi.vrr_enabled) + if (crtc_state->uapi.vrr_enabled && vmin < vmax) intel_vrr_compute_vrr_timings(crtc_state); else if (is_cmrr_frac_required(crtc_state) && is_edp) intel_vrr_compute_cmrr_timings(crtc_state); + else if (intel_vrr_always_use_vrr_tg(display)) + intel_vrr_compute_fixed_rr_timings(crtc_state); else intel_vrr_prepare_fixed_timings(crtc_state); @@ -522,7 +532,9 @@ bool intel_vrr_always_use_vrr_tg(struct intel_display *display) if (!HAS_VRR(display)) return false; - /* #TODO return true for platforms supporting fixed_rr */ + if (DISPLAY_VER(display) >= 14) + return true; + return false; } From patchwork Mon Feb 3 12:38:40 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13957432 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 46298C02192 for ; Mon, 3 Feb 2025 12:50:53 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E56A210E035; Mon, 3 Feb 2025 12:50:52 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="hTVPfpb6"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) by gabe.freedesktop.org (Postfix) with ESMTPS id 59CC510E035; Mon, 3 Feb 2025 12:50:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1738587052; x=1770123052; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=At8P6bL9xkWjU8ytrjunukZys2HTbKSwKxWmHa79jbI=; b=hTVPfpb6kTegjfNPqogls+bPnflGRbCTt3Flugvlz9RL3di3QO+zngWS 3D3sOqFGZOt1cBZSSF4mKSTRzDilHm7hNx5MujB4RH6Xv5DwCX4PMJClt eOsyb+dwPFw6UT64icNIPS/9lcefqOCnqUgiFE2OKcUfH3DQimaUPoSje KpLzG6sSd51m2NM+QYE0DMS1077beFUyfeMfeV2YnQixklj/JzWe9JF3B tlg1LiNnKA7bMimV0tz0Z5wTNRxIvgGK2naTFSwo5XOmKR7TT+qejRFyg eWaBFOBeB5xCGjhksklch7nyZYcjbgBdwWQSik1UYUvLYKZXVMc+2vnZ8 Q==; X-CSE-ConnectionGUID: y0c7HnELRXaAELIrP/Nhrg== X-CSE-MsgGUID: ZuS/K0Y7QTOCzSuWcufrDw== X-IronPort-AV: E=McAfee;i="6700,10204,11335"; a="61548171" X-IronPort-AV: E=Sophos;i="6.13,255,1732608000"; d="scan'208";a="61548171" Received: from fmviesa002.fm.intel.com ([10.60.135.142]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2025 04:50:51 -0800 X-CSE-ConnectionGUID: TsiBH/TTQFipEuJmMH/QPg== X-CSE-MsgGUID: mY8uN0dwQGOmIGNt99cQ6w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="133529117" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by fmviesa002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2025 04:50:49 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, jani.nikula@linux.intel.com, ville.syrjala@linux.intel.com, mitulkumar.ajitkumar.golani@intel.com Subject: [PATCH 28/28] drm/i915/vblank: Avoid warning for platforms that always use VRR TG Date: Mon, 3 Feb 2025 18:08:40 +0530 Message-ID: <20250203123840.3855874-29-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20250203123840.3855874-1-ankit.k.nautiyal@intel.com> References: <20250203123840.3855874-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" For fixed refresh rate timings, the VRR TG is not disabled and timings are changed on the fly. Modify the check for warning for changing timings with VRR TG disabled. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_vblank.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c b/drivers/gpu/drm/i915/display/intel_vblank.c index 8abcf4c2cfe7..3053babcd0b0 100644 --- a/drivers/gpu/drm/i915/display/intel_vblank.c +++ b/drivers/gpu/drm/i915/display/intel_vblank.c @@ -670,9 +670,13 @@ void intel_vblank_evade_init(const struct intel_crtc_state *old_crtc_state, adjusted_mode = &crtc_state->hw.adjusted_mode; if (crtc->mode_flags & I915_MODE_FLAG_VRR) { - /* timing changes should happen with VRR disabled */ - drm_WARN_ON(crtc->base.dev, intel_crtc_needs_modeset(new_crtc_state) || - new_crtc_state->update_m_n || new_crtc_state->update_lrr); + /* + * For platforms that do not always use VRR Timing generator, + * timing changes should happen with VRR disabled. + */ + if (!intel_vrr_always_use_vrr_tg(display)) + drm_WARN_ON(crtc->base.dev, intel_crtc_needs_modeset(new_crtc_state) || + new_crtc_state->update_m_n || new_crtc_state->update_lrr); if (intel_vrr_is_push_sent(crtc_state)) evade->vblank_start = intel_vrr_vmin_vblank_start(crtc_state);