From patchwork Wed Feb 5 01:21:48 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 13960388 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 06235C02194 for ; Wed, 5 Feb 2025 01:22:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Wq/KiKfHzL50StKgUXypTPj74N+O02KfsXDeQcwmBZ4=; b=q+PHEaXQ6sKNIS p4XpBu3yrN+Z6xZMDT3a+TyKc6t5eZohEuY+ZCh+YQsEUwdivYCCGZaQEsnWRXBx6NL9GXR1ejAHA 0D5d+qIl3GBPTIGuixt1Ch5nmWXNfkmE0K6iBJtueL65RCDeaU5mtDLTL8VFpt3KaqyJxTFwb5sOf cdvP5dy/+yTotd6s7iw2TfjDfmpjwz7IxlhUQ4Yatkf8Kmsp5A5rIgBAnWkz05pHxn6dXLfLc44pm 9uSccuw7MfU7JWPcr+eCWo+3cuNYvZH8KC9lKrsywPaOVxVADpGOhS3Y0pzkrWSIeXkW73MG0iDAO wUKa6yL5MyuhK/oo6wIA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tfU75-0000000218f-1wXo; Wed, 05 Feb 2025 01:21:59 +0000 Received: from mail-pl1-x632.google.com ([2607:f8b0:4864:20::632]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tfU73-0000000216s-07sQ for linux-riscv@lists.infradead.org; Wed, 05 Feb 2025 01:21:58 +0000 Received: by mail-pl1-x632.google.com with SMTP id d9443c01a7336-2165448243fso27687805ad.1 for ; Tue, 04 Feb 2025 17:21:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1738718516; x=1739323316; darn=lists.infradead.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=PZsmyzkl0ZY8OELLzFzrWZpLBbmgmsnkcCCgL90vWsc=; b=2U0tG23TGfiryisVRDVjQpCN5rLxy9zNTozswdzTcvHEkXoabUcAMovmRWW9bm1P9O 28/c5gg9HUe1XUo1w6PLknOJNWd8VKJMS5AEbK0rDPDjDpdE0YeIKXQ32NU8uVwYG76R Wo9/DTuPEz4T+HAD1Vjt7tWpmVbyBjoQ7KaK4mLYqdBdIp+llal4tMgRyJaXMZ42Jbqa vMpLDGAotgodhSrnY5PJ1D9kh7LXeIArp8cnmN8PZPK7HPXwgrJf2rm8zRWXhVd5Kuts 7rGh9O9PMy4D06rHpB/hl9jF0CC2RCRtTra2xeimPGvhhQ5/hpFU8lP6nCeyW+tab8H/ cP9w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1738718516; x=1739323316; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=PZsmyzkl0ZY8OELLzFzrWZpLBbmgmsnkcCCgL90vWsc=; b=Pa7FEE2g8pufkhr69f6yD7jCndFR9YzfVlTrPhFzQHYzvmBe1ZZ6RF9U0Mv3crD/if 2RUEwRFkRmnifdm9L805ODPxZhQwrYFrmxstpLLXe7sq1wuvfJI+Mt21vdaDXzs44TwC om8W/MVH7uHUcNyP6wLm/HJ4CyhVF/pxwoVH7fDUxx16LalR9s9oVepa861C0YcDMfZW aM1TJ1Z+2F5XHv0H1bsU9D8KOsobeDf5kM07Y0TaKkazgA1vY7grGSOzMTH8mDR6Zj2y k4t+lyk3DrbZXRGk2me+4A5jODWEZ1olaUFxPaOLnScHQRq/eMVk5ImZYlYlxF+IxobM r91Q== X-Forwarded-Encrypted: i=1; AJvYcCVy16DeKTnp6YwghDsdlz4mBnMvvHvopA1nW+P0qm1Oe291jSBLlXfhLqwpGhDaivLE0ltw0prfNCSTtg==@lists.infradead.org X-Gm-Message-State: AOJu0YynOawTn9mqCtiuvYhiCWshydgsWivhuKmll8Hd5Npl7z2JFyz4 dEwsDvLeRx+QgbKD8+QFTWg2vUZ03na4AkYb34NYitm3h35RKPk5qWqCndG0dFujzZbqroPVe8A i X-Gm-Gg: ASbGnctScy/h3FHEqxYHehH6M6dOFbrioZBxSqQGJAM4oghiMnVm+GQhZqvvxoqHRti gmwH+Nf5ZPuTHK3ovZbyAZw0HxUdYiRcDDigJy6+zZW8oT882aaZUnIyojMkkcb0L5RvZDMWYme vClqk7a5Puz+Phv1N4942NiGLgClPubWfwTB3WxQl0sq45G5EKUE0Xo/UIYnt4wbhHUwDw42pH8 qLXr9j0aGjj4LnlAY7AXqxP9sa8ABWQfDlbwTxBG2/ldO2GNnuaN0qgn9t7viI+oNfDiULWc0lS RsRr5USGLT/Svudc1Cthn7ZWbg== X-Google-Smtp-Source: AGHT+IEGfToRmeKwtJLwJvQfR9G8FomtSd4VlGvn3V3djANNYRSyP8PCgL91KTN4ECR+cbbbSTicog== X-Received: by 2002:a05:6a21:9007:b0:1ed:9e58:5195 with SMTP id adf61e73a8af0-1ede8834f7cmr1948485637.13.1738718515327; Tue, 04 Feb 2025 17:21:55 -0800 (PST) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-72fe69cec0fsm11457202b3a.137.2025.02.04.17.21.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 04 Feb 2025 17:21:55 -0800 (PST) From: Deepak Gupta Date: Tue, 04 Feb 2025 17:21:48 -0800 Subject: [PATCH v9 01/26] mm: helper `is_shadow_stack_vma` to check shadow stack vma MIME-Version: 1.0 Message-Id: <20250204-v5_user_cfi_series-v9-1-b37a49c5205c@rivosinc.com> References: <20250204-v5_user_cfi_series-v9-0-b37a49c5205c@rivosinc.com> In-Reply-To: <20250204-v5_user_cfi_series-v9-0-b37a49c5205c@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan , Jann Horn , Conor Dooley Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta X-Mailer: b4 0.14.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250204_172157_072771_472A6C0F X-CRM114-Status: GOOD ( 13.99 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org VM_SHADOW_STACK (alias to VM_HIGH_ARCH_5) is used to encode shadow stack VMA on three architectures (x86 shadow stack, arm GCS and RISC-V shadow stack). In case architecture doesn't implement shadow stack, it's VM_NONE Introducing a helper `is_shadow_stack_vma` to determine shadow stack vma or not. Signed-off-by: Deepak Gupta Reviewed-by: Mark Brown --- mm/gup.c | 2 +- mm/mmap.c | 2 +- mm/vma.h | 10 +++++++--- 3 files changed, 9 insertions(+), 5 deletions(-) diff --git a/mm/gup.c b/mm/gup.c index 3883b307780e..8c64f3ff34ab 100644 --- a/mm/gup.c +++ b/mm/gup.c @@ -1291,7 +1291,7 @@ static int check_vma_flags(struct vm_area_struct *vma, unsigned long gup_flags) !writable_file_mapping_allowed(vma, gup_flags)) return -EFAULT; - if (!(vm_flags & VM_WRITE) || (vm_flags & VM_SHADOW_STACK)) { + if (!(vm_flags & VM_WRITE) || is_shadow_stack_vma(vm_flags)) { if (!(gup_flags & FOLL_FORCE)) return -EFAULT; /* diff --git a/mm/mmap.c b/mm/mmap.c index cda01071c7b1..7b6be4eec35d 100644 --- a/mm/mmap.c +++ b/mm/mmap.c @@ -648,7 +648,7 @@ SYSCALL_DEFINE1(old_mmap, struct mmap_arg_struct __user *, arg) */ static inline unsigned long stack_guard_placement(vm_flags_t vm_flags) { - if (vm_flags & VM_SHADOW_STACK) + if (is_shadow_stack_vma(vm_flags)) return PAGE_SIZE; return 0; diff --git a/mm/vma.h b/mm/vma.h index a2e8710b8c47..47482a25f5c3 100644 --- a/mm/vma.h +++ b/mm/vma.h @@ -278,7 +278,7 @@ static inline struct vm_area_struct *vma_prev_limit(struct vma_iterator *vmi, } /* - * These three helpers classifies VMAs for virtual memory accounting. + * These four helpers classifies VMAs for virtual memory accounting. */ /* @@ -289,6 +289,11 @@ static inline bool is_exec_mapping(vm_flags_t flags) return (flags & (VM_EXEC | VM_WRITE | VM_STACK)) == VM_EXEC; } +static inline bool is_shadow_stack_vma(vm_flags_t vm_flags) +{ + return !!(vm_flags & VM_SHADOW_STACK); +} + /* * Stack area (including shadow stacks) * @@ -297,7 +302,7 @@ static inline bool is_exec_mapping(vm_flags_t flags) */ static inline bool is_stack_mapping(vm_flags_t flags) { - return ((flags & VM_STACK) == VM_STACK) || (flags & VM_SHADOW_STACK); + return ((flags & VM_STACK) == VM_STACK) || is_shadow_stack_vma(flags); } /* @@ -308,7 +313,6 @@ static inline bool is_data_mapping(vm_flags_t flags) return (flags & (VM_WRITE | VM_SHARED | VM_STACK)) == VM_WRITE; } - static inline void vma_iter_config(struct vma_iterator *vmi, unsigned long index, unsigned long last) { From patchwork Wed Feb 5 01:21:49 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 13960389 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AF174C02196 for ; Wed, 5 Feb 2025 01:22:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=jU0T5QkEr3232RN3yDhzbxX5XeNOIdmcHfVs2jzrTyQ=; b=GSKHXxoO7PdhNc Ld8Hi6ChlczaSKyGbFVkF9d3ZpM5XIUDubZgVdV11mWFSXtSOWHAIPBp93R8WWxPgYIclR4u52TyM 5EX7vzd1smhecfCLlpJiTKCvqL0e7o5odD/W26OnGYjrj+xG3SgS4jFLI+1HCDHC9U0sCmzWJjeL7 53ET4xnq3Ix35Ey6BFNieMY5YTQM6fF7HLoCYbZ2zo3yN5TxdaQgfON1VkZdISCWqNmFskSHwiaVp ucbiFRsNT7KtEzsk/lSXWNG2Eo8Ck8jWCQc9r8IZNRBRyvFbXci5LzIwECEF164W3UNY1ZNg811ex 6BD6TakVXUcmbYE/CAug==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tfU77-0000000219y-0MX4; Wed, 05 Feb 2025 01:22:01 +0000 Received: from mail-pl1-x62f.google.com ([2607:f8b0:4864:20::62f]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tfU74-0000000217s-2Rzd for linux-riscv@lists.infradead.org; Wed, 05 Feb 2025 01:21:59 +0000 Received: by mail-pl1-x62f.google.com with SMTP id d9443c01a7336-21f0bc811dbso5059375ad.1 for ; Tue, 04 Feb 2025 17:21:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1738718518; x=1739323318; darn=lists.infradead.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=kHEXIimjUTXAyC0fOzh8XAkym19Q72QcmDI6hc+cq4k=; b=KrmeEV05JiMwuDTLNjKE/zZ40CkxpRfQd9oAstPnTU6CxRMzbNp97Pr5Yv84GNXuCo Tx10bHr8rLf8yCpp61T51gpgP81pPff3SlDEXZA+zWXhR1kD1lVocht8BW3Nz5Rvdck7 1mjfdp18GLSj3pZuvqRV9k+18JQBoGx/EXNJsOyZpmbqo6REXC0UYcbX68pxfyIdvpmW o9nmgeNMt6DPbYE+dvGPH5+Lr1kBH/Ww1Z2YRicPTU0eS7OcKCnuZyDITPz/+9BGMgL4 dfANdjm/VQpOfFSyrYxFS7oJvj+w/KV1ZJ73BrqXDBtQo+ncqaYrh1AleJpzWJbXxjI8 Aypw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1738718518; x=1739323318; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=kHEXIimjUTXAyC0fOzh8XAkym19Q72QcmDI6hc+cq4k=; b=wkAALu/cnBKu5lNyQBNUz9gCHQLVb8B0b9tKNyCMa96gjPnXflcveicNGajpvwG2+7 VVhhixSp5QLF1GIm41GREMPd+JsAoW2xzew+kxWOP6nRJxZvC0JWIqxn0wf3LokZ5UXb 4vlKUroNeOALIV34MluN5P37L+kHtHKckgsLoKLjs3gEIUmEdD4GSlRJIzTyHHWN/1MJ oVMAsiWk4E1LMXoRwbS8SeSJVzqsVwja3naPhBEawSmN1ffGhAnKbYOk5Dwbec7i9TmH j6YZvmvnAiy9tU1+uPgjmK+YzjYbdtZoKikp5ipPInWEbX7P+Y7MEpml4UvF9w0SW9hz 6USQ== X-Forwarded-Encrypted: i=1; AJvYcCUXhCuGAZqL2Na60ymOEMlkbGVZXerGeYo6YQEWmnJYYrrQy9X6Rk3jdqlFq+q3Bhl/eGKVMYXJtode/Q==@lists.infradead.org X-Gm-Message-State: AOJu0YwUHiHoTWtgFnpSaqBwh6M7+RGMLPNT3jUGsIgfnrcqI44mxo4A Eud7BDWHaXS0CIf/tGdQUiKqK4iqb4o74XFfeCfYnJntLqjO/TOSiONWMa7Kz+C6ZXM1gLEHzq8 t X-Gm-Gg: ASbGncsbTlSzYWUyeb7y0yBce3p5hK0EvF2n67pVzVN4eRrhuontqwmcg8i+qZZDVUC eoI2J2KqJtTFdOhAuSuoFWktGRnLULw79+4bot17+re9cafLe7p7QCwihlhiN1Z+H46qFpq4qVN oyCJQjm3YoFyemz7k9/z1XDDzcQS4wYC2/2gkIROUPUWgGFaTPY/JGST2w+AvWXLIwCzvnjPh+T EbZSI396wFrcN/Sgz8TPV/ujl8DQOHUpxYY3K3Ml0hsmdF11eR8NI+HwX+q+dybs/VHgP04VHlX 8pVGIQ++LBDKNdvAURLqVHo85Q== X-Google-Smtp-Source: AGHT+IHzHonQ1oXGudf3ZfMVrMZV3mKwGoRuXs9FutPohSBaJGIm20BPBEq9+EHRoF58EkXIbMe1gA== X-Received: by 2002:aa7:888c:0:b0:726:a820:921d with SMTP id d2e1a72fcca58-7303523eaaamr1533935b3a.10.1738718517175; Tue, 04 Feb 2025 17:21:57 -0800 (PST) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-72fe69cec0fsm11457202b3a.137.2025.02.04.17.21.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 04 Feb 2025 17:21:56 -0800 (PST) From: Deepak Gupta Date: Tue, 04 Feb 2025 17:21:49 -0800 Subject: [PATCH v9 02/26] dt-bindings: riscv: zicfilp and zicfiss in dt-bindings (extensions.yaml) MIME-Version: 1.0 Message-Id: <20250204-v5_user_cfi_series-v9-2-b37a49c5205c@rivosinc.com> References: <20250204-v5_user_cfi_series-v9-0-b37a49c5205c@rivosinc.com> In-Reply-To: <20250204-v5_user_cfi_series-v9-0-b37a49c5205c@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan , Jann Horn , Conor Dooley Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta X-Mailer: b4 0.14.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250204_172158_627859_831D34CB X-CRM114-Status: UNSURE ( 9.54 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Make an entry for cfi extensions in extensions.yaml. Signed-off-by: Deepak Gupta Acked-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/riscv/extensions.yaml | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml index a63b994e0763..9b9024dbc8d2 100644 --- a/Documentation/devicetree/bindings/riscv/extensions.yaml +++ b/Documentation/devicetree/bindings/riscv/extensions.yaml @@ -426,6 +426,20 @@ properties: The standard Zicboz extension for cache-block zeroing as ratified in commit 3dd606f ("Create cmobase-v1.0.pdf") of riscv-CMOs. + - const: zicfilp + description: | + The standard Zicfilp extension for enforcing forward edge + control-flow integrity as ratified in commit 3f8e450 ("merge + pull request #227 from ved-rivos/0709") of riscv-cfi + github repo. + + - const: zicfiss + description: | + The standard Zicfiss extension for enforcing backward edge + control-flow integrity as ratified in commit 3f8e450 ("merge + pull request #227 from ved-rivos/0709") of riscv-cfi + github repo. + - const: zicntr description: The standard Zicntr extension for base counters and timers, as From patchwork Wed Feb 5 01:21:50 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 13960445 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CE73DC0219C for ; Wed, 5 Feb 2025 02:31:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=ch3SOYhf0Xz+GEYt937GpoIpBnGh5moWbubsuIlLl/Q=; b=R6PsNUYiW4GQnH Er6teThkkG5FQxXTKzu28JT21IqT2ot1ZsNbUO43mMHvl3ze3okvalL+OfIR+TU4wpRQ1YzO8Q6Xo AcZVmmWbNkcZNn7jvozX8Ou/0YsxCxr5ZKw6+0D/qVbM/6mTkiObC8Y8voKqpevsF2JbOG+hEplv+ MG2yziyoC2Dknjq1qzs/d/ccNdRiydsc32uDha2FjmcDXCANPAySD2cYuRdMptktlJqd5Q/Cd8hRW rn5D5Z/SQiI+VKnuh+M11Gcy7hXM/t5tL0Nxwte0kKKMBzLdF8uRD7cCVVBUF68X1ETOl588Aui85 bO1toz+N6cDIIyF0iUyw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tfVBw-000000028UJ-2YPw; Wed, 05 Feb 2025 02:31:04 +0000 Received: from mail-pl1-x636.google.com ([2607:f8b0:4864:20::636]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tfU76-0000000218y-2YWK for linux-riscv@lists.infradead.org; Wed, 05 Feb 2025 01:22:01 +0000 Received: by mail-pl1-x636.google.com with SMTP id d9443c01a7336-216426b0865so109106865ad.0 for ; Tue, 04 Feb 2025 17:22:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1738718520; x=1739323320; darn=lists.infradead.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=8tcFAXVAWiQrY6HWFsnaHkFz6kw+io7jzixAAtP9lAg=; b=FgparNrxODkcGfOKozrWEohGYS4O13CPoW3/LSApucsjg2Zys43Gtd2MIVR4SdzEWv cl7FyqyyMc7lfTzHjAljf8pL1nTmTC5aLYIMEFBhn37qjBdpfYjOSBJW246sNr2B46oe 6yoPWawo3WGxdaDzLkaITjit3qKqaagZ4j7JMq+is3AyBuyTiZe1h8V4bu+vc5Cc9a/O SsmScKijfTrBslCnnwNSHOQaO/n4jPtwkBt2qLO65IOgvIGEqJGotjCvw9iHxduxfSxS NESBR12wMgjpsyiTilhxXgevKDXwa+VoppV6W8B3BOn8RM5HSLj2JlNkdOA2hSfWOlAc vmow== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1738718520; x=1739323320; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=8tcFAXVAWiQrY6HWFsnaHkFz6kw+io7jzixAAtP9lAg=; b=jw+CJZcSGp939J6xcWCdhLZScamJG8bApThPFtvlXewS/NCkO4TYGS+l4zjENnw0/z sL+IQs8mzgAhy0qsQHQWqnN8dOI/lgIxeKkQkMNZMM0OCMPNX8Zppp1MJ8gNJF/9IDsI MQDyRy6I2K4YrTr3LqsTQ4PfMmWSPQebLEPxsSHw1EfiH/HQvJMiYqOsfrg6MNn9T0qQ 0prz1QxN1iEST3NaPl8iBeTzsJ+Kg1eluJyAJr0NzEsVZbRmhuwLAfuFwqryfxNB8bKt 1epVPWmswxMRO9tuV/GowcObLOBpU8dDn8lyv0TZdtmRdok1J04NYo7MnWfUESlIy6qi Tjsg== X-Forwarded-Encrypted: i=1; AJvYcCWoFr4p3nEsBG1m0BesYTdEk8y4YSFN6V6yWKh34Cn/bQaja8oosJWElHgEVFawlj+iw7kqyFJeusc+Dw==@lists.infradead.org X-Gm-Message-State: AOJu0YxFPrWsHN7OfF0hfS6p5uLsfu8nm3oWfhgHGOXeTxvGqt4ZCGZs 1+UNTLSp75yT/V+7pXHcn5xrlVDmvtoPpisl0TOrT0i8R3xdpixJ/lsfnI1q9m2T4uXMdgcr/5J K X-Gm-Gg: ASbGnctWqLkr3R/cAj9XUI34s/TYUTN3aJZwyNg5KP5mmZF+zEF9QbkAkHqhfYgI0IL cofsDL2cJoP5/yEBvoHHawmvT317g4cEzdw48vxoogNEfCtd1i7dPyLBOMfN+4Jz0Gds9cONVyl oce6UIhh5zfm2ED7/rnflLR2hBJijLrHEA2sMQMZY7+WxqsTX0Q0L1lxrZ5CJCJsgU1L7VWDfQ/ mEucjvnNig0eh7IWXbl7BcrXf1RoANxTzCIn6RddmHeuBhUQRonrDH9N9fZUddn0AgNe9LEFcwa a40bkfOqLSPNNa0AkEoGYB4pXw== X-Google-Smtp-Source: AGHT+IGcLpXN7H1Vb3ytJk/GwyCBkowKecTGXsuuIYbq2cDK4TUx8xLv1sxd9tib0WLuvG/ZPY9AqQ== X-Received: by 2002:a05:6a00:acc:b0:725:f18a:da52 with SMTP id d2e1a72fcca58-730350e50c2mr1616706b3a.4.1738718519861; Tue, 04 Feb 2025 17:21:59 -0800 (PST) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-72fe69cec0fsm11457202b3a.137.2025.02.04.17.21.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 04 Feb 2025 17:21:59 -0800 (PST) From: Deepak Gupta Date: Tue, 04 Feb 2025 17:21:50 -0800 Subject: [PATCH v9 03/26] riscv: zicfiss / zicfilp enumeration MIME-Version: 1.0 Message-Id: <20250204-v5_user_cfi_series-v9-3-b37a49c5205c@rivosinc.com> References: <20250204-v5_user_cfi_series-v9-0-b37a49c5205c@rivosinc.com> In-Reply-To: <20250204-v5_user_cfi_series-v9-0-b37a49c5205c@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan , Jann Horn , Conor Dooley Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta X-Mailer: b4 0.14.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250204_172200_654153_CF82E874 X-CRM114-Status: GOOD ( 14.52 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org This patch adds support for detecting zicfiss and zicfilp. zicfiss and zicfilp stands for unprivleged integer spec extension for shadow stack and branch tracking on indirect branches, respectively. This patch looks for zicfiss and zicfilp in device tree and accordinlgy lights up bit in cpu feature bitmap. Furthermore this patch adds detection utility functions to return whether shadow stack or landing pads are supported by cpu. Signed-off-by: Deepak Gupta --- arch/riscv/include/asm/cpufeature.h | 13 +++++++++++++ arch/riscv/include/asm/hwcap.h | 2 ++ arch/riscv/include/asm/processor.h | 1 + arch/riscv/kernel/cpufeature.c | 2 ++ 4 files changed, 18 insertions(+) diff --git a/arch/riscv/include/asm/cpufeature.h b/arch/riscv/include/asm/cpufeature.h index 569140d6e639..69007b8100ca 100644 --- a/arch/riscv/include/asm/cpufeature.h +++ b/arch/riscv/include/asm/cpufeature.h @@ -12,6 +12,7 @@ #include #include #include +#include #include #include @@ -137,4 +138,16 @@ static __always_inline bool riscv_cpu_has_extension_unlikely(int cpu, const unsi return __riscv_isa_extension_available(hart_isa[cpu].isa, ext); } +static inline bool cpu_supports_shadow_stack(void) +{ + return (IS_ENABLED(CONFIG_RISCV_USER_CFI) && + riscv_cpu_has_extension_unlikely(smp_processor_id(), RISCV_ISA_EXT_ZICFISS)); +} + +static inline bool cpu_supports_indirect_br_lp_instr(void) +{ + return (IS_ENABLED(CONFIG_RISCV_USER_CFI) && + riscv_cpu_has_extension_unlikely(smp_processor_id(), RISCV_ISA_EXT_ZICFILP)); +} + #endif diff --git a/arch/riscv/include/asm/hwcap.h b/arch/riscv/include/asm/hwcap.h index 869da082252a..2dc4232bdb3e 100644 --- a/arch/riscv/include/asm/hwcap.h +++ b/arch/riscv/include/asm/hwcap.h @@ -100,6 +100,8 @@ #define RISCV_ISA_EXT_ZICCRSE 91 #define RISCV_ISA_EXT_SVADE 92 #define RISCV_ISA_EXT_SVADU 93 +#define RISCV_ISA_EXT_ZICFILP 94 +#define RISCV_ISA_EXT_ZICFISS 95 #define RISCV_ISA_EXT_XLINUXENVCFG 127 diff --git a/arch/riscv/include/asm/processor.h b/arch/riscv/include/asm/processor.h index 5f56eb9d114a..e3aba3336e63 100644 --- a/arch/riscv/include/asm/processor.h +++ b/arch/riscv/include/asm/processor.h @@ -13,6 +13,7 @@ #include #include +#include #define arch_get_mmap_end(addr, len, flags) \ ({ \ diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c index c6ba750536c3..e72de12e5b99 100644 --- a/arch/riscv/kernel/cpufeature.c +++ b/arch/riscv/kernel/cpufeature.c @@ -333,6 +333,8 @@ const struct riscv_isa_ext_data riscv_isa_ext[] = { __RISCV_ISA_EXT_SUPERSET_VALIDATE(zicboz, RISCV_ISA_EXT_ZICBOZ, riscv_xlinuxenvcfg_exts, riscv_ext_zicboz_validate), __RISCV_ISA_EXT_DATA(ziccrse, RISCV_ISA_EXT_ZICCRSE), + __RISCV_ISA_EXT_SUPERSET(zicfilp, RISCV_ISA_EXT_ZICFILP, riscv_xlinuxenvcfg_exts), + __RISCV_ISA_EXT_SUPERSET(zicfiss, RISCV_ISA_EXT_ZICFISS, riscv_xlinuxenvcfg_exts), __RISCV_ISA_EXT_DATA(zicntr, RISCV_ISA_EXT_ZICNTR), __RISCV_ISA_EXT_DATA(zicond, RISCV_ISA_EXT_ZICOND), __RISCV_ISA_EXT_DATA(zicsr, RISCV_ISA_EXT_ZICSR), From patchwork Wed Feb 5 01:21:51 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 13960393 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1393DC02199 for ; Wed, 5 Feb 2025 01:22:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=hRKwbmU5qBvoQWc+V/8xtLYTXQbaV7ZdQ8JJQmB+HDc=; b=06ODJyuZNwfZ4M Ab7sFdMmyWxpDs9kmNnDmRBxNorupRxO1EuoCvcmt9NzH/mlQ3HI5z5HnK9oTRor4zzurXmlYSdSN NCj/vNAGaWgCR4LnKOaVrBR8IA9dZaxNY2bERaLPmcNjnlWOLMk3g6/xH1usM9rnXy2mw3p0R8+Tw G1gjJOsoH1nukou0HL190brdTG2DNPKZNOQe8zFs8ouXbGjGUW6vER5sKACEgY5FmhyF0BcQMvqe3 oLOcA+MYguPMjSiqXZf+BILLJ7N/Y8mQ57wF2cd9hObBKW47pIZAFw/MOOjIuz0EoYAw3FsRJvJLs 8lFW0LsrWIiZ130oIcPQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tfU7G-000000021IZ-3MNl; Wed, 05 Feb 2025 01:22:10 +0000 Received: from desiato.infradead.org ([2001:8b0:10b:1:d65d:64ff:fe57:4e05]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tfU7F-000000021GI-0bwN for linux-riscv@bombadil.infradead.org; Wed, 05 Feb 2025 01:22:09 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Cc:To:In-Reply-To:References: Message-Id:Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date: From:Sender:Reply-To:Content-ID:Content-Description; bh=n3DM8zy+WllPP0TujEXFZ0Ycc0zGrpNRrMRWPkPmGZc=; b=M6QdiNEyyjZON7dFJBd+p6wDZG /NRzhI41j9+jmZpXN8J6+7L2cut3+rHnkcpHu1QIPEkhTf7ANXLo/7GrOtH0ZI8OKF2dwhoyde0Fs E+w1I/wUB8ScMeAAzpsFtP0wVQ0xOo1NcaQRZXFzzvWmnKEgT+sLtpxt+wv3RflR+bPIbeuUCYS41 nAY4g4RA01DhLzlkXmX5IIezjWezbqTFATxnHjienbQ1PyRcojmGd5tsb5bjsYYiCV+3Z4mVXTvC+ SR5S6Fxw/TjohcMx6Y741Rlldzb0Q+lkSdtQO1TBVbGtMRzjKqFhVGIJ0cOeQRmSSuxwnXMVXjQzz fUSO3kAQ==; Received: from mail-pj1-x1029.google.com ([2607:f8b0:4864:20::1029]) by desiato.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tfU7B-0000000GTo8-23ci for linux-riscv@lists.infradead.org; Wed, 05 Feb 2025 01:22:07 +0000 Received: by mail-pj1-x1029.google.com with SMTP id 98e67ed59e1d1-2f9c69aefdbso2172017a91.2 for ; Tue, 04 Feb 2025 17:22:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1738718522; x=1739323322; darn=lists.infradead.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=n3DM8zy+WllPP0TujEXFZ0Ycc0zGrpNRrMRWPkPmGZc=; b=vEuPAuOw66q6qHMQ4i7+QbPikhW2qoRyCCrQl6cSIPgDx+fSf1BQsd5sring1GrXbI U9X0uRdrDnbmAd20S5R7VPiN04scvft/WI/s1HRjlRyueALmGcorNucCCpxWLYkf0Wbm iT5f1RdrP67OFNdnC5+PIaWUNm/hyKTqbEBB9vXH9uxFQvMYNY0IULsKPihEejtf330r uNl1NZRvaFBQ88JHpvxhrQ9zSu8VgrdOf1SqupSWKaRQ2pslyaQ0aMPO8owxPMWEuyOx 7UxTRxVAoRRHYpc0URI+ZGhFMmcHrlSeXkrjBlQV9B1LaPF5TZHVUYacITERozd8o5U3 O3ZA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1738718522; x=1739323322; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=n3DM8zy+WllPP0TujEXFZ0Ycc0zGrpNRrMRWPkPmGZc=; b=vIKFWoZVogwo8xnNT6z1adpKDL9Ysg0/xfBU6jFMfuPGnVMSV6woyoUspzntpmT1RQ uS1kOdg60e6h7DfxVaw1id6pWRZzTYWYF4VNgHIupKyteo9CErS8yDXpVP5FklXCVR5H O69tJhPnoN5pSGx0Z5qIY0QPkUbeE/MVFj0dQwNuLcUa9aH2mJT69JJAHFvN7j+FHc7g keUDx/qLXQjzgqYlS4QNVe1WFdFPDkQVkQIiEXpqlj8ubdWOsjh8xFIzL8b9+hKmoXbq plxyJ2qSb8DjBRVTKRqx20c5/V8bzVLfQrg0XWFCuq8kdZm5eFulATnli2jk/0DAKjc9 wKLg== X-Forwarded-Encrypted: i=1; AJvYcCXCBLa+Lh5SyycGU8tAlTQjxKKBDVzySH4X4QckYuUsktWDKCDLxj+ZQLFcmfEUpkU1iE9evqKriLGb0A==@lists.infradead.org X-Gm-Message-State: AOJu0YyEpJQyL+xrFnPagFkCn8csn6N3Nl0HktY8z6rtHU1wF+k+QTA4 XywdX667O1JfyOKedwOLaCvFwUCrLt8laoe7WOSD6EWjLrw9io8o+U7Y+JCGlHVVOoFavdPo+u7 j X-Gm-Gg: ASbGncv3pX6GC1UgLSAuDi6ZyeR5/jQ1OaYrMUzWgUblL68hyZKOsG8c33GI9VqbN31 es5p+pA6Ew8045wxai3aebOgUyF4vX0Y7/1Yr1KxbYCWCrD2TMwTogpPh2oRx/n1PectDubSpUd YLMBDaQbDx7V9lME12PD7m8Qfw2L7KLswVpMiMqTPZSlDDl6d2wvnz5shgJeX5OcDlE70+0pPof xQjEKMHJDU8182U/kh+HoUP8gFxxF0hrhumyh7EeBvluOnjO6QQeDRGhvlqxeTekCvzqVmhml3m UVzc1tpvLGuz6TQqf/MAFsADXg== X-Google-Smtp-Source: AGHT+IGTMhaxmFsvWrTefkXBFDqJevilxfDmNJ8PU7kLoH+rq+SB81MDslBfLWbGGJU9DTXRp8pAhQ== X-Received: by 2002:a05:6a00:2287:b0:725:e499:5b86 with SMTP id d2e1a72fcca58-7303521977bmr1539398b3a.20.1738718521754; Tue, 04 Feb 2025 17:22:01 -0800 (PST) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-72fe69cec0fsm11457202b3a.137.2025.02.04.17.22.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 04 Feb 2025 17:22:01 -0800 (PST) From: Deepak Gupta Date: Tue, 04 Feb 2025 17:21:51 -0800 Subject: [PATCH v9 04/26] riscv: zicfiss / zicfilp extension csr and bit definitions MIME-Version: 1.0 Message-Id: <20250204-v5_user_cfi_series-v9-4-b37a49c5205c@rivosinc.com> References: <20250204-v5_user_cfi_series-v9-0-b37a49c5205c@rivosinc.com> In-Reply-To: <20250204-v5_user_cfi_series-v9-0-b37a49c5205c@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan , Jann Horn , Conor Dooley Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta X-Mailer: b4 0.14.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250205_012205_952524_288C576C X-CRM114-Status: GOOD ( 10.47 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org zicfiss and zicfilp extension gets enabled via b3 and b2 in *envcfg CSR. menvcfg controls enabling for S/HS mode. henvcfg control enabling for VS while senvcfg controls enabling for U/VU mode. zicfilp extension extends *status CSR to hold `expected landing pad` bit. A trap or interrupt can occur between an indirect jmp/call and target instr. `expected landing pad` bit from CPU is recorded into xstatus CSR so that when supervisor performs xret, `expected landing pad` state of CPU can be restored. zicfiss adds one new CSR - CSR_SSP: CSR_SSP contains current shadow stack pointer. Signed-off-by: Deepak Gupta Reviewed-by: Charlie Jenkins --- arch/riscv/include/asm/csr.h | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/riscv/include/asm/csr.h b/arch/riscv/include/asm/csr.h index 6fed42e37705..2f49b9663640 100644 --- a/arch/riscv/include/asm/csr.h +++ b/arch/riscv/include/asm/csr.h @@ -18,6 +18,15 @@ #define SR_MPP _AC(0x00001800, UL) /* Previously Machine */ #define SR_SUM _AC(0x00040000, UL) /* Supervisor User Memory Access */ +/* zicfilp landing pad status bit */ +#define SR_SPELP _AC(0x00800000, UL) +#define SR_MPELP _AC(0x020000000000, UL) +#ifdef CONFIG_RISCV_M_MODE +#define SR_ELP SR_MPELP +#else +#define SR_ELP SR_SPELP +#endif + #define SR_FS _AC(0x00006000, UL) /* Floating-point Status */ #define SR_FS_OFF _AC(0x00000000, UL) #define SR_FS_INITIAL _AC(0x00002000, UL) @@ -212,6 +221,8 @@ #define ENVCFG_PMM_PMLEN_16 (_AC(0x3, ULL) << 32) #define ENVCFG_CBZE (_AC(1, UL) << 7) #define ENVCFG_CBCFE (_AC(1, UL) << 6) +#define ENVCFG_LPE (_AC(1, UL) << 2) +#define ENVCFG_SSE (_AC(1, UL) << 3) #define ENVCFG_CBIE_SHIFT 4 #define ENVCFG_CBIE (_AC(0x3, UL) << ENVCFG_CBIE_SHIFT) #define ENVCFG_CBIE_ILL _AC(0x0, UL) @@ -230,6 +241,11 @@ #define SMSTATEEN0_HSENVCFG (_ULL(1) << SMSTATEEN0_HSENVCFG_SHIFT) #define SMSTATEEN0_SSTATEEN0_SHIFT 63 #define SMSTATEEN0_SSTATEEN0 (_ULL(1) << SMSTATEEN0_SSTATEEN0_SHIFT) +/* + * zicfiss user mode csr + * CSR_SSP holds current shadow stack pointer. + */ +#define CSR_SSP 0x011 /* mseccfg bits */ #define MSECCFG_PMM ENVCFG_PMM From patchwork Wed Feb 5 01:21:52 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 13960392 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B5A28C0219A for ; Wed, 5 Feb 2025 01:22:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=jPj283BtWr1YV5XtqtJNdszkwiQNQWOiuO8/7l5CUdY=; b=4b1dOPqPaqRfU/ +c0lwaWVEqzDefSSKiy5mGwrm7OCvBaZIzsyrC9I+NbIXpcmo9Puq7wWMUhz3ipSx33OfNP3hJz/F OphGhZSYzeDVE/+zIYxMqCOJ8E2oZHKwIDs+Y0s4FA2gG65CMiAFNC/OJjtagXneDTqMnNtlabBTn vrrlBarQak10aahzcIA+EXiZmJRDrw2OnetnTFzut5if6OmbWDEULG4WOPH8PjAeD5sdFlGGz3tzD PRg94ZjUxUDAZj+JkkURn/olgqh0WMK4j0srKU4uTDqJ6u4My1Dsnbe5tamBY83inmNTKquZySWLX p+ZuyzeP1YuyuYEvqPaw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tfU7I-000000021Jp-0JQu; Wed, 05 Feb 2025 01:22:12 +0000 Received: from desiato.infradead.org ([2001:8b0:10b:1:d65d:64ff:fe57:4e05]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tfU7G-000000021Gy-0950 for linux-riscv@bombadil.infradead.org; Wed, 05 Feb 2025 01:22:10 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Cc:To:In-Reply-To:References: Message-Id:Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date: From:Sender:Reply-To:Content-ID:Content-Description; bh=XFoiG9nO9GzRbM78aaWwJK+Q/U0QRSToN08KNluZphY=; b=NcXIRa1xS5V0tJFpCaN3RpWaLL E9+nbZ8aa8OPzTnXENYDa9VrEnFL5tuwb8Ut5Vvr9Fte0BODFPiZ7yXPL9ya2v9CWL7FG50G0zBDT 9FaOKb/VQBq+CH00yS0U3v3smWeOCXUWFVnyYwQu2DVE8xfaJORO1GZ3B5CK+QXW9ZbLKlme2HRGl p/nBsCOx5cq0c1Kms0rzJ1OarBRluUnwR+X8yPT2CXq0ECNgMsDynkJSFZS3yigKlCynBoayJqoEV VGcON//9uW1TFw5kO8gM3jWjsISxgt0uIwfIu/HiUpPAT00zsQTX9cROVPhjsvRkkwiSzN38bWT2P EfFYASIQ==; Received: from mail-pl1-x629.google.com ([2607:f8b0:4864:20::629]) by desiato.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tfU7C-0000000GToB-1n9e for linux-riscv@lists.infradead.org; Wed, 05 Feb 2025 01:22:08 +0000 Received: by mail-pl1-x629.google.com with SMTP id d9443c01a7336-21f16af1f71so4828665ad.3 for ; Tue, 04 Feb 2025 17:22:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1738718523; x=1739323323; darn=lists.infradead.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=XFoiG9nO9GzRbM78aaWwJK+Q/U0QRSToN08KNluZphY=; b=nuet+0K2/pWbMI74mE/mm2AOfW7yntINlT/8NnRgPo3rkx9jSYH4GBvZjx7fEcHq0Y Bz2jtGmcvINjSdwyYY9JQyxpcgU8ZFxkqNGVYcBKYV9L22YA9Ozl7JAp/59bIZQO5IYN 1zvDai8iH49fws7Tupe/5JOHgmdl1UXaNv/Yu7pZwjYwhPSC7NjoUTvFCyJee8MeM+vY 346xa2cDW4EMhlHUzIMxHWoBnY8oIf1wIcV9fRNbQ0/m+HCLarfAnGIloorbTdtAKPF8 EnSAp4EgGX2t/7pl3gFcLn1IRXqjuzehneTadmFnwW4ABMLP2bnnIFPJdAuJjxy3kg8V Sbng== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1738718523; x=1739323323; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=XFoiG9nO9GzRbM78aaWwJK+Q/U0QRSToN08KNluZphY=; b=XzrYW35OPz8PBU+DBcnZpI+jPVc68TwaMfw/AMTIuHVOG/pDVmW/FN44LFdMV1YnO6 cs+T/p4qtUlpqnl02ZXTGCzfglHTmpJefD/6qKCFnwDnIYJyKWk6wmzeWM7//38xlPo5 YQ/BXmrh3MuJuV0P2Q037v2XJedcQm1jSCenb/5KNLEmify0A6gVCrWlNBAaqz2i4QSF VBI09BL3U0o9O1B8QbDxjnk20PBdF4+aWI78bkso2XuT+Oe6FQJXaFTAMfLhLRkwOeql 3kWwTk1p7RAcn/1YIv6+eG3rQTbQDbkFNhZ10N8C2T4pwoEhpstDfNS+Z9C9z8dzEqWV 7pXw== X-Forwarded-Encrypted: i=1; AJvYcCVKLtKN4XMpjJz/fMSuUUvBNymnKg4u6q7OSJLhTi3lviTtyRmt++ENBupIPxs4iAV6nIY9IS6HbMSm8A==@lists.infradead.org X-Gm-Message-State: AOJu0YzWrtzdyBBmFhZrMs61f/1z4o7QLgO/sf4NYi7f9ckocu0cqhdm vfRhrj1tqq4+z7H76xa0qA9gKnBqUcvPHxT0qmY5aPjPql/XrVM818/udDcEXYLhsTQqBU5Yt33 l X-Gm-Gg: ASbGncuOYcg/hyit6OjsEbgbbbi2FqHb/IMVo6GH5h88SF4ozL+7BwVaF7Q18n+ugkR UXTQOYqT1Vt2wy2JAr1KRKDNLhBNmFrKhOTrbFJJ+wf8T6A1W4Awlyn2IGX2k+vEoavMB1oz2Ef 24J0N35PkvzQO3Sk6q0/iiPB1s5dHev1DAvoaUqbcK7ei8EJFLW6AIUvJUDWm3FBuTug0050q6q DoLdvcpQBAQOkz8SDsBynNSxb5oRp0GnrbHMRMASpJtq1f2CuSsAOLArh61erBTvd+95SHUCs6Y gQ5H/yc4UiDugaMCaRDJ8iJpBQ== X-Google-Smtp-Source: AGHT+IEJH+wrDsmQPEIkR5pVBGlKeUP6WNEh0OjFhPnTJqvMzIBJHV63zzIl7KoIxuXF1C9q00ecWw== X-Received: by 2002:a05:6a20:d498:b0:1e1:ca27:89f0 with SMTP id adf61e73a8af0-1ede88d5aa2mr1761718637.37.1738718523627; Tue, 04 Feb 2025 17:22:03 -0800 (PST) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-72fe69cec0fsm11457202b3a.137.2025.02.04.17.22.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 04 Feb 2025 17:22:03 -0800 (PST) From: Deepak Gupta Date: Tue, 04 Feb 2025 17:21:52 -0800 Subject: [PATCH v9 05/26] riscv: usercfi state for task and save/restore of CSR_SSP on trap entry/exit MIME-Version: 1.0 Message-Id: <20250204-v5_user_cfi_series-v9-5-b37a49c5205c@rivosinc.com> References: <20250204-v5_user_cfi_series-v9-0-b37a49c5205c@rivosinc.com> In-Reply-To: <20250204-v5_user_cfi_series-v9-0-b37a49c5205c@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan , Jann Horn , Conor Dooley Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta X-Mailer: b4 0.14.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250205_012207_114222_8E06F255 X-CRM114-Status: GOOD ( 21.90 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Carves out space in arch specific thread struct for cfi status and shadow stack in usermode on riscv. This patch does following - defines a new structure cfi_status with status bit for cfi feature - defines shadow stack pointer, base and size in cfi_status structure - defines offsets to new member fields in thread in asm-offsets.c - Saves and restore shadow stack pointer on trap entry (U --> S) and exit (S --> U) Shadow stack save/restore is gated on feature availiblity and implemented using alternative. CSR can be context switched in `switch_to` as well but soon as kernel shadow stack support gets rolled in, shadow stack pointer will need to be switched at trap entry/exit point (much like `sp`). It can be argued that kernel using shadow stack deployment scenario may not be as prevalant as user mode using this feature. But even if there is some minimal deployment of kernel shadow stack, that means that it needs to be supported. And thus save/restore of shadow stack pointer in entry.S instead of in `switch_to.h`. Signed-off-by: Deepak Gupta Reviewed-by: Charlie Jenkins --- arch/riscv/include/asm/processor.h | 1 + arch/riscv/include/asm/thread_info.h | 3 +++ arch/riscv/include/asm/usercfi.h | 24 ++++++++++++++++++++++++ arch/riscv/kernel/asm-offsets.c | 4 ++++ arch/riscv/kernel/entry.S | 26 ++++++++++++++++++++++++++ 5 files changed, 58 insertions(+) diff --git a/arch/riscv/include/asm/processor.h b/arch/riscv/include/asm/processor.h index e3aba3336e63..d851bb5c6da0 100644 --- a/arch/riscv/include/asm/processor.h +++ b/arch/riscv/include/asm/processor.h @@ -14,6 +14,7 @@ #include #include +#include #define arch_get_mmap_end(addr, len, flags) \ ({ \ diff --git a/arch/riscv/include/asm/thread_info.h b/arch/riscv/include/asm/thread_info.h index f5916a70879a..a0cfe00c2ca6 100644 --- a/arch/riscv/include/asm/thread_info.h +++ b/arch/riscv/include/asm/thread_info.h @@ -62,6 +62,9 @@ struct thread_info { long user_sp; /* User stack pointer */ int cpu; unsigned long syscall_work; /* SYSCALL_WORK_ flags */ +#ifdef CONFIG_RISCV_USER_CFI + struct cfi_status user_cfi_state; +#endif #ifdef CONFIG_SHADOW_CALL_STACK void *scs_base; void *scs_sp; diff --git a/arch/riscv/include/asm/usercfi.h b/arch/riscv/include/asm/usercfi.h new file mode 100644 index 000000000000..5f2027c51917 --- /dev/null +++ b/arch/riscv/include/asm/usercfi.h @@ -0,0 +1,24 @@ +/* SPDX-License-Identifier: GPL-2.0 + * Copyright (C) 2024 Rivos, Inc. + * Deepak Gupta + */ +#ifndef _ASM_RISCV_USERCFI_H +#define _ASM_RISCV_USERCFI_H + +#ifndef __ASSEMBLY__ +#include + +#ifdef CONFIG_RISCV_USER_CFI +struct cfi_status { + unsigned long ubcfi_en : 1; /* Enable for backward cfi. */ + unsigned long rsvd : ((sizeof(unsigned long) * 8) - 1); + unsigned long user_shdw_stk; /* Current user shadow stack pointer */ + unsigned long shdw_stk_base; /* Base address of shadow stack */ + unsigned long shdw_stk_size; /* size of shadow stack */ +}; + +#endif /* CONFIG_RISCV_USER_CFI */ + +#endif /* __ASSEMBLY__ */ + +#endif /* _ASM_RISCV_USERCFI_H */ diff --git a/arch/riscv/kernel/asm-offsets.c b/arch/riscv/kernel/asm-offsets.c index e89455a6a0e5..0c188aaf3925 100644 --- a/arch/riscv/kernel/asm-offsets.c +++ b/arch/riscv/kernel/asm-offsets.c @@ -50,6 +50,10 @@ void asm_offsets(void) #endif OFFSET(TASK_TI_CPU_NUM, task_struct, thread_info.cpu); +#ifdef CONFIG_RISCV_USER_CFI + OFFSET(TASK_TI_CFI_STATUS, task_struct, thread_info.user_cfi_state); + OFFSET(TASK_TI_USER_SSP, task_struct, thread_info.user_cfi_state.user_shdw_stk); +#endif OFFSET(TASK_THREAD_F0, task_struct, thread.fstate.f[0]); OFFSET(TASK_THREAD_F1, task_struct, thread.fstate.f[1]); OFFSET(TASK_THREAD_F2, task_struct, thread.fstate.f[2]); diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S index 33a5a9f2a0d4..68c99124ea55 100644 --- a/arch/riscv/kernel/entry.S +++ b/arch/riscv/kernel/entry.S @@ -147,6 +147,20 @@ SYM_CODE_START(handle_exception) REG_L s0, TASK_TI_USER_SP(tp) csrrc s1, CSR_STATUS, t0 + /* + * If previous mode was U, capture shadow stack pointer and save it away + * Zero CSR_SSP at the same time for sanitization. + */ + ALTERNATIVE("nop; nop; nop; nop", + __stringify( \ + andi s2, s1, SR_SPP; \ + bnez s2, skip_ssp_save; \ + csrrw s2, CSR_SSP, x0; \ + REG_S s2, TASK_TI_USER_SSP(tp); \ + skip_ssp_save:), + 0, + RISCV_ISA_EXT_ZICFISS, + CONFIG_RISCV_USER_CFI) csrr s2, CSR_EPC csrr s3, CSR_TVAL csrr s4, CSR_CAUSE @@ -236,6 +250,18 @@ SYM_CODE_START_NOALIGN(ret_from_exception) * structures again. */ csrw CSR_SCRATCH, tp + + /* + * Going back to U mode, restore shadow stack pointer + */ + ALTERNATIVE("nop; nop", + __stringify( \ + REG_L s3, TASK_TI_USER_SSP(tp); \ + csrw CSR_SSP, s3), + 0, + RISCV_ISA_EXT_ZICFISS, + CONFIG_RISCV_USER_CFI) + 1: #ifdef CONFIG_RISCV_ISA_V_PREEMPTIVE move a0, sp From patchwork Wed Feb 5 01:21:53 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 13960432 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E9E51C02196 for ; Wed, 5 Feb 2025 02:31:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=0BK617Gy1WKKeQRHCfYdFiBRCdcQrpiAUE6oGxEPdqY=; b=Sa6UZpe2qtLIxa eOxnki18+pJKK33JLbDloAOvjjNQbGqDp7T/rjvviLq9H5s6X/e05gO1MAb/WcUcaWmfVY/OQPuHg 1GUyfJG5tsRyvGsuhvBNoI2FzyacPF0wBAQrSXtArAkaotA7kagRn1lArqCc26p708bt9QZevr2Js QqXC1/JlmSNUBAx7+4QF+ssUBii3f4DjxiYtUDoWsEwtk2GYZkXn8XK/BtglP+NZS1S4R66VpmW+i v8BEsgPV6MrlUNA+meBUfZJFDgl/N2YBv0PFTTrA2BZIlJkPlpl5Iez5+KawlB/ovdqHPR/TET9q0 cfD7MbCvC0fjpRBVEjbA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tfVBx-000000028UQ-0ilN; Wed, 05 Feb 2025 02:31:05 +0000 Received: from desiato.infradead.org ([2001:8b0:10b:1:d65d:64ff:fe57:4e05]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tfU7K-000000021M6-2MIr for linux-riscv@bombadil.infradead.org; Wed, 05 Feb 2025 01:22:14 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Cc:To:In-Reply-To:References: Message-Id:Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date: From:Sender:Reply-To:Content-ID:Content-Description; bh=1e5RgGuqZS+AKw5oTSgp47pWFJ0GDjWFc7jT6Xd5TJc=; b=c3+vFnjuLrp/2cAaLfZ9bkdtfo DEdJ876+le4AM67WU+2bJLy68h4dRoQVlOr0B2qyA056xs2VHw0thkkJzd3FCsAURpPsPL9sRznm+ hPmuU8EtcYaUymQNLq6iKcrKwTjBTJCPIs6ylZOYvwJQdkdOuQMbmMNgGIK1izTRSt2LuJxZyb6wp d6rSpzs/xbhMkIwSbQqSeQuo/xZ0mLnIfkT1P4nnH04E/NrgSm0K92CKOj/ZGVfUXxZ4T1R3sBdYb 7LwEmkbJyy2sLEwC9coory9rKY8cx7/dD63CSzmwukISL3XtvtItcZDQ7w/FETtH9UMLKWo7Fwr3O UIxFJV8w==; Received: from mail-pj1-x1036.google.com ([2607:f8b0:4864:20::1036]) by desiato.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tfU7E-0000000GToj-1S4v for linux-riscv@lists.infradead.org; Wed, 05 Feb 2025 01:22:10 +0000 Received: by mail-pj1-x1036.google.com with SMTP id 98e67ed59e1d1-2f9bed1f521so2239211a91.3 for ; Tue, 04 Feb 2025 17:22:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1738718525; x=1739323325; darn=lists.infradead.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=1e5RgGuqZS+AKw5oTSgp47pWFJ0GDjWFc7jT6Xd5TJc=; b=BNxAkROj9eXICjQ1Fg83bk9iYxErqoGEKnpiR990Xbt2AO0O21PlPsj8kOjOtECqQW Z0UZ4UEmyW07zZDHbrema+YcxIFQPaKvuG3TvkPxhuTJFw0nd5pXxFKhWY3NM1iEbwz/ O8tsztup9p4khrUFP45N8e6zAI0E/pakxebkAzvXPjx4lui4otDTpaiaPsK15PQX9Xea sezMeJtYKiTNPy5sE+X/ge5l7nnlvXafxZhJBnfVdT1XKGlXQkrc3eNbX+33VvNwaRQT 7knsApOOF3HmFhvN/bRtQ8e9JfhYgapCBiMfgYgQllHWF0CMDesOH3Rmqt8cOIDfl29K XahA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1738718525; x=1739323325; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=1e5RgGuqZS+AKw5oTSgp47pWFJ0GDjWFc7jT6Xd5TJc=; b=JHgrKr/3+4lIoVJCb8nfiLM8jZIj0aYs/L1EA8aNK56Bevj30nu3OsMXMwQWbbw/s7 g+OElONY/WdLpFZ3J0AUqZf4w31oV8Z5mWOGgILTYH4LDFvpE1sw53WTs9d3zw1Nj4T0 pL98lR3mt6gQ5PQkyVU2a4GFJvyLJe8xvvbdPzdmF2LSWZhocJipJh8heGFXih7al10K 17xBmWKSNG4TXA3QrBSxDyCCqxgkYrtJgKH4g4MFbvPEMRBlANr9c+igMY9gU+NFxDUa +bJmaHPGwTg0ayPMl/MbudL8tLIBDKj5P5FKxkI2uNaZzg5m88CCgK+0XAVBMoNIwR+D ue5Q== X-Forwarded-Encrypted: i=1; AJvYcCUfZOPn/vBk66OfTr2QnxvA/WB88HCyVgV7PYkssdeLMq1hRmSlmUQHB+uy4vl1RjIpDTcVz/GfvvJ7GA==@lists.infradead.org X-Gm-Message-State: AOJu0YyP+9Ul2cuHowDNLy9MgUwM/LU+qtx3zIUr1Jl/u+TpcNBlktQJ CgpfFIMoDo9hpjrtwufM1m2sM4OczGm54FWCv3UP9nerR7PneVTJlVcSXJSiR8bgxU9jR/7HOpY 5 X-Gm-Gg: ASbGncuZ34Y5qTPwXnB8C10jQ8qVi7XuJcOpixvoE3tAfS9rXwnxkEIapIB+K8slTPt QT/383w87oDOWDzqrEzIGviyaI8AybV4nKWkT9IOgU8ddevuu6Z8a4AeSuR2pQDPdVfFzyFdUxO jQklWUJzVsmI7aKY9fA3Lcv0Zv7D2OQfQ28yHJooDjct/11CW5rvSL6RtjGfvAkedohgPaqpFct w71kwR/TXWkr80OlHe1V/Y8XX79KTBRxNaHTSeAR8x67n0tJ0Au1YPjK0/ofqDHBwCUVN3vx4b7 RLvczcz/UL1Kwn0GZgKKQ03jAQ== X-Google-Smtp-Source: AGHT+IGmwZmqjzvPRO4j1QnW6c26qtiThBAMPujeU03hhi/wAPDw8k7cHzAb2QmKpofb/oE3lFc7aw== X-Received: by 2002:a05:6a00:e13:b0:725:e37d:cd36 with SMTP id d2e1a72fcca58-730350e4f2amr1787173b3a.2.1738718525565; Tue, 04 Feb 2025 17:22:05 -0800 (PST) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-72fe69cec0fsm11457202b3a.137.2025.02.04.17.22.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 04 Feb 2025 17:22:05 -0800 (PST) From: Deepak Gupta Date: Tue, 04 Feb 2025 17:21:53 -0800 Subject: [PATCH v9 06/26] riscv/mm : ensure PROT_WRITE leads to VM_READ | VM_WRITE MIME-Version: 1.0 Message-Id: <20250204-v5_user_cfi_series-v9-6-b37a49c5205c@rivosinc.com> References: <20250204-v5_user_cfi_series-v9-0-b37a49c5205c@rivosinc.com> In-Reply-To: <20250204-v5_user_cfi_series-v9-0-b37a49c5205c@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan , Jann Horn , Conor Dooley Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta X-Mailer: b4 0.14.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250205_012208_885685_CD204242 X-CRM114-Status: GOOD ( 20.62 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org `arch_calc_vm_prot_bits` is implemented on risc-v to return VM_READ | VM_WRITE if PROT_WRITE is specified. Similarly `riscv_sys_mmap` is updated to convert all incoming PROT_WRITE to (PROT_WRITE | PROT_READ). This is to make sure that any existing apps using PROT_WRITE still work. Earlier `protection_map[VM_WRITE]` used to pick read-write PTE encodings. Now `protection_map[VM_WRITE]` will always pick PAGE_SHADOWSTACK PTE encodings for shadow stack. Above changes ensure that existing apps continue to work because underneath kernel will be picking `protection_map[VM_WRITE|VM_READ]` PTE encodings. Signed-off-by: Deepak Gupta --- arch/riscv/include/asm/mman.h | 25 +++++++++++++++++++++++++ arch/riscv/include/asm/pgtable.h | 1 + arch/riscv/kernel/sys_riscv.c | 10 ++++++++++ arch/riscv/mm/init.c | 2 +- 4 files changed, 37 insertions(+), 1 deletion(-) diff --git a/arch/riscv/include/asm/mman.h b/arch/riscv/include/asm/mman.h new file mode 100644 index 000000000000..392c9c2d2e78 --- /dev/null +++ b/arch/riscv/include/asm/mman.h @@ -0,0 +1,25 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef __ASM_MMAN_H__ +#define __ASM_MMAN_H__ + +#include +#include +#include + +static inline unsigned long arch_calc_vm_prot_bits(unsigned long prot, + unsigned long pkey __always_unused) +{ + unsigned long ret = 0; + + /* + * If PROT_WRITE was specified, force it to VM_READ | VM_WRITE. + * Only VM_WRITE means shadow stack. + */ + if (prot & PROT_WRITE) + ret = (VM_READ | VM_WRITE); + return ret; +} + +#define arch_calc_vm_prot_bits(prot, pkey) arch_calc_vm_prot_bits(prot, pkey) + +#endif /* ! __ASM_MMAN_H__ */ diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h index 050fdc49b5ad..8c528cd7347a 100644 --- a/arch/riscv/include/asm/pgtable.h +++ b/arch/riscv/include/asm/pgtable.h @@ -178,6 +178,7 @@ extern struct pt_alloc_ops pt_ops __meminitdata; #define PAGE_READ_EXEC __pgprot(_PAGE_BASE | _PAGE_READ | _PAGE_EXEC) #define PAGE_WRITE_EXEC __pgprot(_PAGE_BASE | _PAGE_READ | \ _PAGE_EXEC | _PAGE_WRITE) +#define PAGE_SHADOWSTACK __pgprot(_PAGE_BASE | _PAGE_WRITE) #define PAGE_COPY PAGE_READ #define PAGE_COPY_EXEC PAGE_READ_EXEC diff --git a/arch/riscv/kernel/sys_riscv.c b/arch/riscv/kernel/sys_riscv.c index d77afe05578f..43a448bf254b 100644 --- a/arch/riscv/kernel/sys_riscv.c +++ b/arch/riscv/kernel/sys_riscv.c @@ -7,6 +7,7 @@ #include #include +#include static long riscv_sys_mmap(unsigned long addr, unsigned long len, unsigned long prot, unsigned long flags, @@ -16,6 +17,15 @@ static long riscv_sys_mmap(unsigned long addr, unsigned long len, if (unlikely(offset & (~PAGE_MASK >> page_shift_offset))) return -EINVAL; + /* + * If PROT_WRITE is specified then extend that to PROT_READ + * protection_map[VM_WRITE] is now going to select shadow stack encodings. + * So specifying PROT_WRITE actually should select protection_map [VM_WRITE | VM_READ] + * If user wants to create shadow stack then they should use `map_shadow_stack` syscall. + */ + if (unlikely((prot & PROT_WRITE) && !(prot & PROT_READ))) + prot |= PROT_READ; + return ksys_mmap_pgoff(addr, len, prot, flags, fd, offset >> (PAGE_SHIFT - page_shift_offset)); } diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c index 15b2eda4c364..9d6661638d0b 100644 --- a/arch/riscv/mm/init.c +++ b/arch/riscv/mm/init.c @@ -342,7 +342,7 @@ pgd_t early_pg_dir[PTRS_PER_PGD] __initdata __aligned(PAGE_SIZE); static const pgprot_t protection_map[16] = { [VM_NONE] = PAGE_NONE, [VM_READ] = PAGE_READ, - [VM_WRITE] = PAGE_COPY, + [VM_WRITE] = PAGE_SHADOWSTACK, [VM_WRITE | VM_READ] = PAGE_COPY, [VM_EXEC] = PAGE_EXEC, [VM_EXEC | VM_READ] = PAGE_READ_EXEC, From patchwork Wed Feb 5 01:21:54 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 13960391 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 92A3EC02193 for ; Wed, 5 Feb 2025 01:22:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=ouo6DX3+Zo2X0OcJAXK5MF+nGOnvNHn35A1HrfTTM7o=; b=pvI/15TNhOAkLc yInSXNPJn/MOrPa286LHzYVWsyuJuKOW5DEsvfvnBPG2vT17oWKBNu8LiIchCoBJiMplqlKlmmhkU cYHH3pCawh4F+JNP5s7YfTb86zshOCbOhMloY9Pvj9sMP84dI15yelifWvahjh4z4Hvn0+t4Y9YWm q74FxZ5LCsg6BCJ0Wdww3agWxt84q7E9BsBXOzuO/M7kS+TGdQ3+zSwFg7iAbgSege3MwGa9TwFFQ /thVyWtwffdNye8D4krGXDC1vBmcmi8uOFa8XiUofLN14ZKlqLvmCjz+rtOzmMJJfKpkUXGYQGq/Q n7gvZEQqe9545uTnEaHg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tfU7H-000000021JA-1nf1; Wed, 05 Feb 2025 01:22:11 +0000 Received: from mail-pj1-f47.google.com ([209.85.216.47]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tfU7E-000000021Fi-3IDb for linux-riscv@lists.infradead.org; Wed, 05 Feb 2025 01:22:10 +0000 Received: by mail-pj1-f47.google.com with SMTP id 98e67ed59e1d1-2f9c97af32eso1664747a91.2 for ; Tue, 04 Feb 2025 17:22:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1738718527; x=1739323327; darn=lists.infradead.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=Bi056oDr44X6mEA5ptOBWamFE29btTVHHp5F60vYQ4s=; b=StXbW+hdl67X+abPCdOO6KlatKxlyJSea1Tz/g9KfYmy/RTP0Kgh3ylzBzi93n0+GI uq0ut9zog51mj8Xi5BpQvnlXC9amtkUP16Y0RiiW5E+MrUT5XV9IVNZGlEb3/F4bdtj5 IF6AyMzortfI5OVmb83bosE7IqfIjDtPYrJL3IDlsIKptGMC5QVIU2qWlJ94j4239Pur wnOkeg734+NgFBihLV1L5u3dauEC+myKcTIVSVbYoDfLzaOWi42G0KizlF04ojo+pArK Daj4rUT0x++PyYBHEAQevxIaROVO/y+EdTTJyVjW16bkG/t6ys6x5ILsW0OtipCQAqHM lFtQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1738718527; x=1739323327; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Bi056oDr44X6mEA5ptOBWamFE29btTVHHp5F60vYQ4s=; b=TCKkQ7R6ynMXNBpqx8PJyE4zIgZ2PwcRshURQQOgMr91cZ+3kt1UhkVGQfnqe1CcKU uA2WG9UPgpqnyEFaZ6YUGPYHjkQUe/hagdccdVDfx93MLwcBoeVHvP78UEvlREtmQrgT KCC6unNhVh0JlxR8MK/1U4uRaGe27ddpRP5WZVDAuMBQeYOVGvt3Qn1ttvOiW6gofukE i8dV4dSvvs8CJvCBfFdbcQPT2VMVF2KHcYiDF5rN9B8mngh8Em1vwmNE0Pi5id2h7Zsu Uon5S7omvPUP4yxLINVJPjHZQdCFw6JNJc0AloqOJG3SY9AZ2zJtShey16aYuDAM64XM ZIuQ== X-Forwarded-Encrypted: i=1; AJvYcCXN9X/rjKyuyISyF3NSCdeX2ibEhnGftY/vVmYSED6H6tZ5UVLju9O8VPLnRP2/fk0oqbNWaRl/Akwm7Q==@lists.infradead.org X-Gm-Message-State: AOJu0Ywmm7+Pj2CS7H/IxtPHhhAynfxCzXF1pL8F8l2t/xu8aulUbm8V JgzPg4kNnvTS2VuRsyCnVFhBpOPfg9rK/YYgWxA5CPw71yESwogDpvE4bo4tr8NN6MFmXbBrozY h X-Gm-Gg: ASbGnctFNl17ubS460b9AsnZwwxPnhpTbR2P9JDqCjma201MKdF9RCgM2+JFCvMW0NM BSc+laoGHw/5ffpuu/j4272irHQXY73J82LNsSm7WMHo3hYg9GCxKoh5TWnliWoahv41k8v9oNL JHQUKu16ouOBvJBYXNez9n0H+IEjKVFqjOaiRkvrD0domtygm9zm6UGoPXKqBbYjJ9D0KJfoYI9 L3So3NXf6hEGiFMRN7PPH4XWfLnYQq7cA0oFLwqwA4+M9XogjD8b2mjS/n2gAcXt59nuK0GWlvh OX4fuIvy4qg4UbkzU5h2IGm88g== X-Google-Smtp-Source: AGHT+IGqNdkqdj5d5A5aA6gKpwq89EtcxR1nZ3Ul1+SB6k4syDnXtWKiLDwMtPZuQ0/gHb49XAPbWg== X-Received: by 2002:a05:6a00:1d88:b0:72f:d7ce:4ff8 with SMTP id d2e1a72fcca58-7303520d315mr1572110b3a.22.1738718527421; Tue, 04 Feb 2025 17:22:07 -0800 (PST) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-72fe69cec0fsm11457202b3a.137.2025.02.04.17.22.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 04 Feb 2025 17:22:07 -0800 (PST) From: Deepak Gupta Date: Tue, 04 Feb 2025 17:21:54 -0800 Subject: [PATCH v9 07/26] riscv mm: manufacture shadow stack pte MIME-Version: 1.0 Message-Id: <20250204-v5_user_cfi_series-v9-7-b37a49c5205c@rivosinc.com> References: <20250204-v5_user_cfi_series-v9-0-b37a49c5205c@rivosinc.com> In-Reply-To: <20250204-v5_user_cfi_series-v9-0-b37a49c5205c@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan , Jann Horn , Conor Dooley Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta X-Mailer: b4 0.14.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250204_172208_819872_F19D54FF X-CRM114-Status: UNSURE ( 9.97 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org This patch implements creating shadow stack pte (on riscv). Creating shadow stack PTE on riscv means that clearing RWX and then setting W=1. Signed-off-by: Deepak Gupta Reviewed-by: Alexandre Ghiti --- arch/riscv/include/asm/pgtable.h | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h index 8c528cd7347a..ede43185ffdf 100644 --- a/arch/riscv/include/asm/pgtable.h +++ b/arch/riscv/include/asm/pgtable.h @@ -421,6 +421,11 @@ static inline pte_t pte_mkwrite_novma(pte_t pte) return __pte(pte_val(pte) | _PAGE_WRITE); } +static inline pte_t pte_mkwrite_shstk(pte_t pte) +{ + return __pte((pte_val(pte) & ~(_PAGE_LEAF)) | _PAGE_WRITE); +} + /* static inline pte_t pte_mkexec(pte_t pte) */ static inline pte_t pte_mkdirty(pte_t pte) @@ -749,6 +754,11 @@ static inline pmd_t pmd_mkwrite_novma(pmd_t pmd) return pte_pmd(pte_mkwrite_novma(pmd_pte(pmd))); } +static inline pmd_t pmd_mkwrite_shstk(pmd_t pte) +{ + return __pmd((pmd_val(pte) & ~(_PAGE_LEAF)) | _PAGE_WRITE); +} + static inline pmd_t pmd_wrprotect(pmd_t pmd) { return pte_pmd(pte_wrprotect(pmd_pte(pmd))); From patchwork Wed Feb 5 01:21:55 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 13960433 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4E3F8C0219A for ; Wed, 5 Feb 2025 02:31:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=ar4SyAPKPfkSHaklPGCLUcvtZ4U6CoVqdHZBbcC+pn0=; b=qU427wq4wNoD0I rez5vi13FsYAme3sXULdo1d3qxe/RMri86onymMbJk6r57KJTh7QUtXaW5tdkZ/bYq35xi4243MQE S54FiUa/5t4JqVB+tLgsKCWWDh3Bx4W/D6ZMn9VweWI/1T+Usf12edGzAjH7nN1GjJLqSy6jcLJ5d kF7vXnGy40MIEqFhdcomynN9PrkaTW2ddOX1td9SmVkv0zUMor2PkYq2Q5VuApKma9+psyZEasgAu uF55BjyOCsQiQ1TK8or8dK26TXqrgPFmPJdund1rkmYbRwIkRze01S49Gsv2NmEbtYpaq+Rmk0qda fy+35mscQwonPDvktbvg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tfVBy-000000028Uz-4AF3; Wed, 05 Feb 2025 02:31:06 +0000 Received: from desiato.infradead.org ([2001:8b0:10b:1:d65d:64ff:fe57:4e05]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tfU7W-000000021Xd-3cis for linux-riscv@bombadil.infradead.org; Wed, 05 Feb 2025 01:22:27 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Cc:To:In-Reply-To:References: Message-Id:Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date: From:Sender:Reply-To:Content-ID:Content-Description; bh=WPde6NcIQ47rHbegQG8dPMP+orPth983zEAPX8ktkAY=; b=BrK3/vLAvh2oYdm/M2xsRcjDMd YlHHNUGhjy34+q2bEElDrAv9kCUlRLic7wqjglrIhRp0QmlCuylXOKfxEENdNE9y5J681iYx0jx8L Azouzp6ZWxehdAjhs7/87Zpk/0SrtmRsmD+meUJ9nxujeo7fzgAtkv9HbYqkpdbt61N2Z5VMzvgsG Sxg4IgdwIQR/N+s3yb/GBqJOlOKkCELv4PFgYn1s39F5UVlcvwI1xgTomhKA/GY5tROwggb319ZRu ScDJOB0V5FB4RDk5p+QDzVsrmg/JkiN8YY6jmpHw0D9qqkS3+ijk8vyQQMymlvhdRjDW5fXULsKoX ELs9wwww==; Received: from mail-pj1-x1034.google.com ([2607:f8b0:4864:20::1034]) by desiato.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tfU7J-0000000GTq0-2qmD for linux-riscv@lists.infradead.org; Wed, 05 Feb 2025 01:22:18 +0000 Received: by mail-pj1-x1034.google.com with SMTP id 98e67ed59e1d1-2ef72924e53so10942288a91.3 for ; Tue, 04 Feb 2025 17:22:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1738718529; x=1739323329; darn=lists.infradead.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=WPde6NcIQ47rHbegQG8dPMP+orPth983zEAPX8ktkAY=; b=jGfPOGF9HaX59j03tItNsQyWq3ZmlqJVCrnUKO7irJMcy5xj67h4Ghl1jONeHW3jJL 4dR4FuDXntJmMMBDammBPxgNnbc8jmNBNrd1mLQPEaGtfpJ8e9zNr/r7IK1ySm1luNRY 89IIl2MjYFo9iuJaJgjpxCmC8pTvOxkkbPEvmuNbVucRiReYtlayL2G5ujBd7VjE8B+n ZdHzSNQDDUHroJH1zFqoVTKBb94vYI/W3LYrGDKHw6ACF/hNpFUy5jJRD8a8QnHKBDRN TadiOT1eTij4RcLcRkaB9X7oZvx7iYahKSGzV15e1Ebx8eL1gXAhN71vL+9PBsBAnICv 6ntQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1738718529; x=1739323329; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=WPde6NcIQ47rHbegQG8dPMP+orPth983zEAPX8ktkAY=; b=rV78kl/8pFDy8u0XWpIDU4aaNnaZaoLBzoBoRQKOGm57hQyDLU6PZ0vQv/LZEq7I+A hrPYNh3ywtSw0uUWnfTCGSx5YPYxWHzHAaB5GV6ZQ9Gqwn4INjkBNclDD+vEqfVat27r wVYIZbSTyihTBuPToIFvdPNg2daz4erIyAebQcrfUEEc6FEbwtAis1ZCrbsCIeLpRf8n eaNjPSfXbA/Kq29WxJZ3ksrjFdXtsCrhatSfm34ZjImHjOx0H03jtIYDD3L8e8kXA6xS G3CufnwxR05jFRddajKUWT+qWjHrATfYoKARI+JVPqKmifiVl5z+0gcxq1BadnbYaM+B XjqQ== X-Forwarded-Encrypted: i=1; AJvYcCXUilvCrK6ZI2Cq0ozcpL0a4vJMsaUMWXN8giUGrDoAFB+LNMtt92mI7izgIbY7dkCaHe9KrGJNH0wFxQ==@lists.infradead.org X-Gm-Message-State: AOJu0Yxx5IKYalK5KZ/Xrl0z2HG6xBMpDaaJ5aq7zfzyw1JcfKKw0dct X/Bps3gHhzyEcKkCcQmRCBViQqkhk/ZfW31eAoGZtuh/n1SI8qFuQPH9fZguKHMJFxH+4w/KhIw w X-Gm-Gg: ASbGnctUowzF/Jz4FPVxwfyD3490RTet1Gw9FhNNe/3sLjc6ebQZ/vw8AIM24n+dQWi XEknCkKst3hmsyIsZyKPh9BgLlsLxPdXI7ucyFO2/GIJbCdoRGcf0HrvbO4Kd+nhkvZsWPo5YOY W1xd2OLiR7vGUxFqZGrGRIoLe0SXIupReHIxljX8GmT3+b2n90377rzck+KO4JEp8/xjPQHljnM 5hCwLNISV1MzAbyHKEyNE48KclC20CbBEyhcmZwNK7IGZMQt6UYNgznyvOVawu5tD+L9BRgw92g ZrKr2PGoJBT/dpp3Yyq0A97tGw== X-Google-Smtp-Source: AGHT+IEPr/jAZdU1BeAv0MTLO4+mRSsOemI+fwwJ0UmsHYAhZKBwL5jRXw2/FSsvJQ9vrjQzGW+zkw== X-Received: by 2002:a05:6a00:35cb:b0:72d:8fa2:9999 with SMTP id d2e1a72fcca58-73035140b35mr1685541b3a.11.1738718529305; Tue, 04 Feb 2025 17:22:09 -0800 (PST) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-72fe69cec0fsm11457202b3a.137.2025.02.04.17.22.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 04 Feb 2025 17:22:08 -0800 (PST) From: Deepak Gupta Date: Tue, 04 Feb 2025 17:21:55 -0800 Subject: [PATCH v9 08/26] riscv mmu: teach pte_mkwrite to manufacture shadow stack PTEs MIME-Version: 1.0 Message-Id: <20250204-v5_user_cfi_series-v9-8-b37a49c5205c@rivosinc.com> References: <20250204-v5_user_cfi_series-v9-0-b37a49c5205c@rivosinc.com> In-Reply-To: <20250204-v5_user_cfi_series-v9-0-b37a49c5205c@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan , Jann Horn , Conor Dooley Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta X-Mailer: b4 0.14.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250205_012214_134266_1BAD2A6C X-CRM114-Status: GOOD ( 11.21 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org pte_mkwrite creates PTEs with WRITE encodings for underlying arch. Underlying arch can have two types of writeable mappings. One that can be written using regular store instructions. Another one that can only be written using specialized store instructions (like shadow stack stores). pte_mkwrite can select write PTE encoding based on VMA range (i.e. VM_SHADOW_STACK) Signed-off-by: Deepak Gupta Reviewed-by: Alexandre Ghiti --- arch/riscv/include/asm/pgtable.h | 7 +++++++ arch/riscv/mm/pgtable.c | 17 +++++++++++++++++ 2 files changed, 24 insertions(+) diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h index ede43185ffdf..ccd2fa34afb8 100644 --- a/arch/riscv/include/asm/pgtable.h +++ b/arch/riscv/include/asm/pgtable.h @@ -416,6 +416,10 @@ static inline pte_t pte_wrprotect(pte_t pte) /* static inline pte_t pte_mkread(pte_t pte) */ +struct vm_area_struct; +pte_t pte_mkwrite(pte_t pte, struct vm_area_struct *vma); +#define pte_mkwrite pte_mkwrite + static inline pte_t pte_mkwrite_novma(pte_t pte) { return __pte(pte_val(pte) | _PAGE_WRITE); @@ -749,6 +753,9 @@ static inline pmd_t pmd_mkyoung(pmd_t pmd) return pte_pmd(pte_mkyoung(pmd_pte(pmd))); } +pmd_t pmd_mkwrite(pmd_t pmd, struct vm_area_struct *vma); +#define pmd_mkwrite pmd_mkwrite + static inline pmd_t pmd_mkwrite_novma(pmd_t pmd) { return pte_pmd(pte_mkwrite_novma(pmd_pte(pmd))); diff --git a/arch/riscv/mm/pgtable.c b/arch/riscv/mm/pgtable.c index 4ae67324f992..be5d38546bb3 100644 --- a/arch/riscv/mm/pgtable.c +++ b/arch/riscv/mm/pgtable.c @@ -155,3 +155,20 @@ pmd_t pmdp_collapse_flush(struct vm_area_struct *vma, return pmd; } #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ + +pte_t pte_mkwrite(pte_t pte, struct vm_area_struct *vma) +{ + if (vma->vm_flags & VM_SHADOW_STACK) + return pte_mkwrite_shstk(pte); + + return pte_mkwrite_novma(pte); +} + +pmd_t pmd_mkwrite(pmd_t pmd, struct vm_area_struct *vma) +{ + if (vma->vm_flags & VM_SHADOW_STACK) + return pmd_mkwrite_shstk(pmd); + + return pmd_mkwrite_novma(pmd); +} + From patchwork Wed Feb 5 01:21:56 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 13960441 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 733FEC02193 for ; Wed, 5 Feb 2025 02:31:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=XWhX7KTALhBWN0GZS7sZPYl83dx2ohX8BBU6AnNM49I=; b=WYHt38Vzfpq+Gf r5CkMQWYRzOTAmpE5fvRZQDAdZZs+UMEYWtr7OMVPOs12uSjeDJ69aB+0Zwjre9CxlzCMDQiPsEfZ 77bOil1x0KBuaM+8X/Hy7CPC1GhXQJxrxvycWGbCtKGHQVqVLfmVC90QMMHAwjiJclzt9JNJFsFwm Qeke+d2BrSGnI8/c6fOoPx+Mwe2yf7/cRhwOqwxmmKpLcNIJ4cZKqgA1DXTyt8u5/etI4RR9GtHPd wrC6Lr8216bHsmDcP0APRSImew9C8GQpMpKAEcA/SuJeG1Snbilh1dkQfUYBcS74lnIybyATi0JTY hVNXEFeyYh+ppaBnImNA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tfVC4-000000028aH-3KvY; Wed, 05 Feb 2025 02:31:12 +0000 Received: from desiato.infradead.org ([2001:8b0:10b:1:d65d:64ff:fe57:4e05]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tfU7l-000000021mc-1afd for linux-riscv@bombadil.infradead.org; Wed, 05 Feb 2025 01:22:41 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Cc:To:In-Reply-To:References: Message-Id:Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date: From:Sender:Reply-To:Content-ID:Content-Description; bh=rjuyUsrRmjsdgE2eHiV1ew63cZ7gXvE8Gyqp5e7FHmI=; b=RMFEFckyfkvoI7oywAPuj/jMIE V5wpKMsjfU/llx32Pwxr9aOcmvr7384R0GSrGgp18J2mgoyafmnbH/KyGUcremU/96mQGgrk+Gk0x VkHY4HzIeqQsgq48zDclNlvmfOpH3Eio5SfPbPDUxR9OfsV5HnuTEMYysA0wNtHi3dlqZlLTH2vBE a1fqzSMLpo5d0KFwxEiyol2TyZHgd3/FBd4UXv6dr5CiRl467gYky2w61SipbQQ/N6iI6pI6h02rQ /OVU0SQHZJSaEH5WO/QQG6IDU0ny3RhwBLyyqobqKTIPEznrL8anCMfaUpqZqum+lTwhTvd6GBimw rXA7z5ow==; Received: from mail-pl1-x62b.google.com ([2607:f8b0:4864:20::62b]) by desiato.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tfU7S-0000000GTql-2WV8 for linux-riscv@lists.infradead.org; Wed, 05 Feb 2025 01:22:39 +0000 Received: by mail-pl1-x62b.google.com with SMTP id d9443c01a7336-2162c0f6a39so6259595ad.0 for ; Tue, 04 Feb 2025 17:22:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1738718533; x=1739323333; darn=lists.infradead.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=rjuyUsrRmjsdgE2eHiV1ew63cZ7gXvE8Gyqp5e7FHmI=; b=A2oVomuHiU19RGqdFqMMf+PAT4QYE5DreeOeXHN8HFqmCahDAaWDWR6vSEA8xMUC8z 2M0eh7cm9TK3waugPf3WPRk3snPIn3BNh7QoSsAakoWZTUgeNX2NbJiDXJDVLiSJ/fzi IiXo8l+jJAGZUQQbGitAhTPsXFZLG00Ku2YX5JZv/HKqPkubcFoUm4BWeT7ostTkqWfB IOZc4qXA6ZQ77Lk8ratWujWAAv9K13ehtwsD9XxITFC6J10fj3NIC4kc4nzsG52H5MxK QffgT3zvwLEtHFzHOdlgV3Tqckvf+N0FgTO5XW62KVLpve1VHfL+s0JWT+HDH2u8El2+ 8IYQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1738718533; x=1739323333; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=rjuyUsrRmjsdgE2eHiV1ew63cZ7gXvE8Gyqp5e7FHmI=; b=Uue8wxtJKZ6kylmDDgxKynAGhuZxVmKkoyg3UxDVp6zCrMv42urP7XvAc0VcC3uH5l hILZyxRnPO2xt3qebQnbGfVCDF/WpFus9iX00HQXzqhR3FH6q8qoYL+axUvkgLHR+LxM u/MUAuMui+6D6OMBgXffUyDeEYZsvcECbLF6iyzdhyUuw2UZP78P+ftYb6BWm2OPtR9Z uncFVx+gEoWkzqafUd43Z21sCnpDUh1PThrWDiRyt1UjjueY11ha+VnVl1r2uOcrv0WC C3u9wYROFjlqzXA7QafkirVV8j7k7IIi3xt7N74OssQ1YLBENvMA3uFND/aDLVBBCsDU UW0g== X-Forwarded-Encrypted: i=1; AJvYcCW3yTjzQiwbOHyXAdtM4njMMHoBUcbFplVc3BD7xpy4AIbut9FR17Jkpwtx9as7PVVXu8nzbg29TrwwRA==@lists.infradead.org X-Gm-Message-State: AOJu0Yxs+ZkkaiZbINNrc/Gw+gTxrNylwzx/H0KiS9jpL194bQsje6FD VDmry4Sa+ROV6iAL56B95towObTdKqb0ua9pEr2w81lkm6nys/Gac4CLp4omeUIWEzUWMoz9+Rn E X-Gm-Gg: ASbGncvSxjvExscNkiuHLscwx053kS9/np/r9t+hBlLn1wdVNNrBPIQZWxlxjq5og8B puzYO19P1Pdo+pILSQfDazeORrqUUUYhaW1L4tpcA0rtOSdDCkSdbp+ghwQiueqY5khsEZo5/rv 6086gAEwGoqCTy2TcwuDWloAUJCR+30BbBnn2yAp8LKR0MF4OEnkOEAdaENYaiM66tX0Z0OsSbe fSQ89fYOgmXEgxea1bFuiu4kD8jaakRx/PP82/L1vvM2RAZ3Gs66xewYBSrs/IIwFKXhkFUCGoZ 6EC7HomFN5sX2xWjcOoDr1FH+A== X-Google-Smtp-Source: AGHT+IHlwnAptZSky9Y1DYo277tRu5dBk5BHHEzzWIoM+u4E8FH3BeXq2ANIOmZF+k6xGQHG5TCG8g== X-Received: by 2002:a05:6a00:2306:b0:725:4915:c10 with SMTP id d2e1a72fcca58-73027296652mr8559134b3a.10.1738718531190; Tue, 04 Feb 2025 17:22:11 -0800 (PST) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-72fe69cec0fsm11457202b3a.137.2025.02.04.17.22.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 04 Feb 2025 17:22:10 -0800 (PST) From: Deepak Gupta Date: Tue, 04 Feb 2025 17:21:56 -0800 Subject: [PATCH v9 09/26] riscv mmu: write protect and shadow stack MIME-Version: 1.0 Message-Id: <20250204-v5_user_cfi_series-v9-9-b37a49c5205c@rivosinc.com> References: <20250204-v5_user_cfi_series-v9-0-b37a49c5205c@rivosinc.com> In-Reply-To: <20250204-v5_user_cfi_series-v9-0-b37a49c5205c@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan , Jann Horn , Conor Dooley Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta X-Mailer: b4 0.14.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250205_012235_466523_5AAD395D X-CRM114-Status: GOOD ( 15.19 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org `fork` implements copy on write (COW) by making pages readonly in child and parent both. ptep_set_wrprotect and pte_wrprotect clears _PAGE_WRITE in PTE. Assumption is that page is readable and on fault copy on write happens. To implement COW on shadow stack pages, clearing up W bit makes them XWR = 000. This will result in wrong PTE setting which says no perms but V=1 and PFN field pointing to final page. Instead desired behavior is to turn it into a readable page, take an access (load/store) fault on sspush/sspop (shadow stack) and then perform COW on such pages. This way regular reads would still be allowed and not lead to COW maintaining current behavior of COW on non-shadow stack but writeable memory. On the other hand it doesn't interfere with existing COW for read-write memory. Assumption is always that _PAGE_READ must have been set and thus setting _PAGE_READ is harmless. Signed-off-by: Deepak Gupta Alexandre Ghiti --- arch/riscv/include/asm/pgtable.h | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h index ccd2fa34afb8..54707686f042 100644 --- a/arch/riscv/include/asm/pgtable.h +++ b/arch/riscv/include/asm/pgtable.h @@ -411,7 +411,7 @@ static inline int pte_devmap(pte_t pte) static inline pte_t pte_wrprotect(pte_t pte) { - return __pte(pte_val(pte) & ~(_PAGE_WRITE)); + return __pte((pte_val(pte) & ~(_PAGE_WRITE)) | (_PAGE_READ)); } /* static inline pte_t pte_mkread(pte_t pte) */ @@ -612,7 +612,15 @@ static inline pte_t ptep_get_and_clear(struct mm_struct *mm, static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long address, pte_t *ptep) { - atomic_long_and(~(unsigned long)_PAGE_WRITE, (atomic_long_t *)ptep); + pte_t read_pte = READ_ONCE(*ptep); + /* + * ptep_set_wrprotect can be called for shadow stack ranges too. + * shadow stack memory is XWR = 010 and thus clearing _PAGE_WRITE will lead to + * encoding 000b which is wrong encoding with V = 1. This should lead to page fault + * but we dont want this wrong configuration to be set in page tables. + */ + atomic_long_set((atomic_long_t *)ptep, + ((pte_val(read_pte) & ~(unsigned long)_PAGE_WRITE) | _PAGE_READ)); } #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH From patchwork Wed Feb 5 01:21:57 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 13960396 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 39C2BC02196 for ; Wed, 5 Feb 2025 01:22:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=fqRZ4wBEWVT1nosKJndSQ3S2KQmy/MHGsbij1m9f03k=; b=f6Ti8BR35pucJ4 KX/yq5Q6JNgTFjzVKC/L65VAF+vP7uZBHjLN1g9Tu74emYWyZidRxA8sTwe5/rvCQ+gSyvvX7Q4T9 pCwfrBOdVjXjigyooSaegNZM/Pej/zinBd4nsOu81MUShObNG2U6lZ8TWUwi59FhM/7+P1rFwPpt7 Z1LGOvOo+awVCnJWhVbP3L8ZljrnMiqEsqhN38+ayLw3xRIcglp5Uht+0wlDHpz+/CvgA7NL2UwzO UlrbFB4Wt0MeyA+6B5rPkeGq+4YieUtfv2ULJki+gU2zTKjwgMmk5jBuUJnlxK+51eeKD0doT9TPE TWwFynpejKGP+mqbVAFQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tfU7n-000000021qB-3rr8; Wed, 05 Feb 2025 01:22:43 +0000 Received: from desiato.infradead.org ([2001:8b0:10b:1:d65d:64ff:fe57:4e05]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tfU7m-000000021nl-2e9m for linux-riscv@bombadil.infradead.org; Wed, 05 Feb 2025 01:22:42 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Cc:To:In-Reply-To:References: Message-Id:Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date: From:Sender:Reply-To:Content-ID:Content-Description; bh=hK7DlmuIRYzIsuvvXHgsbKnv3WN7JKJpEt1D7vAnJaQ=; b=nzH53Krz9wfohNR5XEpgU6zgsV jT8GvDu05dolmHZ7qaXpGJkZvODu06jiKwfV+rPzWRcsx8D2na+rwQlVJU9+p/UciacRq61yfdd5w g2ncM/1+aloW4VBDcVLEi1Zf/NZu8UJADmgBAJpRp4DRYjzHkrWXAE8oRZPPeRnaRym+2yUt6sM2a DFGdfu+c0FTT2L6hO7GM4M6c+Scqw1y8DXLYLeGTLSxSagUu3XOwDr0KOCCHqmC7WvDcNwozu8quT t9WWHpkHm8PNiALsAWu96+ql8lyhEU+XLN2eOETPjEhz6LImXjPewnTBx0Bob/BKItmYB1dydOfN+ g3wqB8Fg==; Received: from mail-pj1-x102b.google.com ([2607:f8b0:4864:20::102b]) by desiato.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tfU7S-0000000GTrQ-3Ufn for linux-riscv@lists.infradead.org; Wed, 05 Feb 2025 01:22:41 +0000 Received: by mail-pj1-x102b.google.com with SMTP id 98e67ed59e1d1-2f44353649aso8334357a91.0 for ; Tue, 04 Feb 2025 17:22:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1738718533; x=1739323333; darn=lists.infradead.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=hK7DlmuIRYzIsuvvXHgsbKnv3WN7JKJpEt1D7vAnJaQ=; b=fmI333xqQAh/Vq9Ugn24vii9HKbjoSAZcu/7oxhVj2DSZJBvYsDdUYYB5M6GjuugK0 ZQA+7Y4pAYtEjlAopgOaawZZHGiVAC0PRCoR2ICWxL2060NsBliikVHdBjL3dt9GkzIY B/S+DMaSpfPXU7n8ouAzT44SDlooGdfDX/cxuXRc7YlKEhtVbApWZH8zuwLV3GEcCTsP n1f1n2QBJRqwzgNqTuCIQG2+MZfZhpo9cC28WIKOjmueixY4IV+Ckh2HlEe2rJXroKD+ CPYtlm9vujgoVFUTqEyVCSL5b+Nfel7tollTxfHVVV3G0PHpNRNxy3EBPvTU0LHsdNJJ rcQg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1738718533; x=1739323333; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=hK7DlmuIRYzIsuvvXHgsbKnv3WN7JKJpEt1D7vAnJaQ=; b=kXC9eg7PRpPsSxc1YIVU62OeYU7CeeBbcs6/J02IAu2CyUgz8cKY8LXnjXimBEeOom cs+p4RQa1Iz4I1mHej891CuEiLxEiXYXQ3fx3Dq894f5swP15fxpwKC/9PFzqWZJDOel 9HJtS/K5WMVAUA4aK8tF07DmY0JtqpeLRIyifzxuC+ItPELCuxZYvUJmUXujxkOdOR5/ EvV+AtpRsyMFFR4wAM7Lzf5HLQfwv+2C+uFsBJ51cempNb/gOro3N7f0p2vREQUN05dt OcLBZH40FX2EpqkWTLpmETvEKF+AdRE0iOnO8Rm4TA4jFLjbvOknVz9lS4EkUxdjs9Q7 SwqA== X-Forwarded-Encrypted: i=1; AJvYcCVuHf9bJSVV1SieF1RisJ72V1XghyQ1wluwlYIp/mMSM1cUrMq8ro4CjDs/P0TRba0WB8UVA4zq7JouAQ==@lists.infradead.org X-Gm-Message-State: AOJu0YzzATmXjWB4VydAyXIyr7HvFzBoO5fjILB1scZOTyeRUBPud3f0 69JdguKOyrze+3/R84T6ZHuAVJ8KpCgwzIn+gOsgFjNtDKQ7/5/xm7r3Fb7EddPU+P9K+gVZbIm K X-Gm-Gg: ASbGnctROOnP1y4NNk6cPfsvD5YUKsyfPxr8DhlPpZveuT2KT9n5gB/cXTaS0ee+FIc SB4FK1ttvQlPNjCqlCErNTQhu1zOdf32lVdak+WOR3kLmT/sRx23XyUnM7U36oM/RvJXjzMhS9I oJiLMAYLn712uQijBMm7NIwrQyXnprUF2xKanWMElQtvA/cdxQfdCyEgDymB9M0AXZ4nWeTQWb1 CnHchajCsnPhn9tGcoJvsRjmdA9tjTWW3o4O8qR2CaCQj41GkUg6aOweTp9273ksyU/6CpcgzjA AgM4gOi0CifejZYgM+1LeyNlxw== X-Google-Smtp-Source: AGHT+IHSDstT0FGTL1rKn5OYVTictI2F7hNGUqzMma/U3VqWcjoJawW9HqWn0ZJ0B/nhVBR5FKHupQ== X-Received: by 2002:a05:6a00:1d88:b0:72f:d7ce:4ff8 with SMTP id d2e1a72fcca58-7303520d315mr1572427b3a.22.1738718533123; Tue, 04 Feb 2025 17:22:13 -0800 (PST) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-72fe69cec0fsm11457202b3a.137.2025.02.04.17.22.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 04 Feb 2025 17:22:12 -0800 (PST) From: Deepak Gupta Date: Tue, 04 Feb 2025 17:21:57 -0800 Subject: [PATCH v9 10/26] riscv/mm: Implement map_shadow_stack() syscall MIME-Version: 1.0 Message-Id: <20250204-v5_user_cfi_series-v9-10-b37a49c5205c@rivosinc.com> References: <20250204-v5_user_cfi_series-v9-0-b37a49c5205c@rivosinc.com> In-Reply-To: <20250204-v5_user_cfi_series-v9-0-b37a49c5205c@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan , Jann Horn , Conor Dooley Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta X-Mailer: b4 0.14.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250205_012236_649002_38001E81 X-CRM114-Status: GOOD ( 23.96 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org As discussed extensively in the changelog for the addition of this syscall on x86 ("x86/shstk: Introduce map_shadow_stack syscall") the existing mmap() and madvise() syscalls do not map entirely well onto the security requirements for shadow stack memory since they lead to windows where memory is allocated but not yet protected or stacks which are not properly and safely initialised. Instead a new syscall map_shadow_stack() has been defined which allocates and initialises a shadow stack page. This patch implements this syscall for riscv. riscv doesn't require token to be setup by kernel because user mode can do that by itself. However to provide compatibility and portability with other architectues, user mode can specify token set flag. Signed-off-by: Deepak Gupta --- arch/riscv/kernel/Makefile | 1 + arch/riscv/kernel/usercfi.c | 144 ++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 145 insertions(+) diff --git a/arch/riscv/kernel/Makefile b/arch/riscv/kernel/Makefile index 8d186bfced45..3a861d320654 100644 --- a/arch/riscv/kernel/Makefile +++ b/arch/riscv/kernel/Makefile @@ -125,3 +125,4 @@ obj-$(CONFIG_ACPI) += acpi.o obj-$(CONFIG_ACPI_NUMA) += acpi_numa.o obj-$(CONFIG_GENERIC_CPU_VULNERABILITIES) += bugs.o +obj-$(CONFIG_RISCV_USER_CFI) += usercfi.o diff --git a/arch/riscv/kernel/usercfi.c b/arch/riscv/kernel/usercfi.c new file mode 100644 index 000000000000..24022809a7b5 --- /dev/null +++ b/arch/riscv/kernel/usercfi.c @@ -0,0 +1,144 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2024 Rivos, Inc. + * Deepak Gupta + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define SHSTK_ENTRY_SIZE sizeof(void *) + +/* + * Writes on shadow stack can either be `sspush` or `ssamoswap`. `sspush` can happen + * implicitly on current shadow stack pointed to by CSR_SSP. `ssamoswap` takes pointer to + * shadow stack. To keep it simple, we plan to use `ssamoswap` to perform writes on shadow + * stack. + */ +static noinline unsigned long amo_user_shstk(unsigned long *addr, unsigned long val) +{ + /* + * Never expect -1 on shadow stack. Expect return addresses and zero + */ + unsigned long swap = -1; + + __enable_user_access(); + asm goto( + ".option push\n" + ".option arch, +zicfiss\n" + "1: ssamoswap.d %[swap], %[val], %[addr]\n" + _ASM_EXTABLE(1b, %l[fault]) + RISCV_ACQUIRE_BARRIER + ".option pop\n" + : [swap] "=r" (swap), [addr] "+A" (*addr) + : [val] "r" (val) + : "memory" + : fault + ); + __disable_user_access(); + return swap; +fault: + __disable_user_access(); + return -1; +} + +/* + * Create a restore token on the shadow stack. A token is always XLEN wide + * and aligned to XLEN. + */ +static int create_rstor_token(unsigned long ssp, unsigned long *token_addr) +{ + unsigned long addr; + + /* Token must be aligned */ + if (!IS_ALIGNED(ssp, SHSTK_ENTRY_SIZE)) + return -EINVAL; + + /* On RISC-V we're constructing token to be function of address itself */ + addr = ssp - SHSTK_ENTRY_SIZE; + + if (amo_user_shstk((unsigned long __user *)addr, (unsigned long)ssp) == -1) + return -EFAULT; + + if (token_addr) + *token_addr = addr; + + return 0; +} + +static unsigned long allocate_shadow_stack(unsigned long addr, unsigned long size, + unsigned long token_offset, bool set_tok) +{ + int flags = MAP_ANONYMOUS | MAP_PRIVATE; + struct mm_struct *mm = current->mm; + unsigned long populate, tok_loc = 0; + + if (addr) + flags |= MAP_FIXED_NOREPLACE; + + mmap_write_lock(mm); + addr = do_mmap(NULL, addr, size, PROT_READ, flags, + VM_SHADOW_STACK | VM_WRITE, 0, &populate, NULL); + mmap_write_unlock(mm); + + if (!set_tok || IS_ERR_VALUE(addr)) + goto out; + + if (create_rstor_token(addr + token_offset, &tok_loc)) { + vm_munmap(addr, size); + return -EINVAL; + } + + addr = tok_loc; + +out: + return addr; +} + +SYSCALL_DEFINE3(map_shadow_stack, unsigned long, addr, unsigned long, size, unsigned int, flags) +{ + bool set_tok = flags & SHADOW_STACK_SET_TOKEN; + unsigned long aligned_size = 0; + + if (!cpu_supports_shadow_stack()) + return -EOPNOTSUPP; + + /* Anything other than set token should result in invalid param */ + if (flags & ~SHADOW_STACK_SET_TOKEN) + return -EINVAL; + + /* + * Unlike other architectures, on RISC-V, SSP pointer is held in CSR_SSP and is available + * CSR in all modes. CSR accesses are performed using 12bit index programmed in instruction + * itself. This provides static property on register programming and writes to CSR can't + * be unintentional from programmer's perspective. As long as programmer has guarded areas + * which perform writes to CSR_SSP properly, shadow stack pivoting is not possible. Since + * CSR_SSP is writeable by user mode, it itself can setup a shadow stack token subsequent + * to allocation. Although in order to provide portablity with other architecture (because + * `map_shadow_stack` is arch agnostic syscall), RISC-V will follow expectation of a token + * flag in flags and if provided in flags, setup a token at the base. + */ + + /* If there isn't space for a token */ + if (set_tok && size < SHSTK_ENTRY_SIZE) + return -ENOSPC; + + if (addr && (addr & (PAGE_SIZE - 1))) + return -EINVAL; + + aligned_size = PAGE_ALIGN(size); + if (aligned_size < size) + return -EOVERFLOW; + + return allocate_shadow_stack(addr, aligned_size, size, set_tok); +} From patchwork Wed Feb 5 01:21:58 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 13960444 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 829E3C02196 for ; Wed, 5 Feb 2025 02:31:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=js2Y6rKRWbZN2EBupnuiQxmO53R9yz977a6iMfeU+dg=; b=hmWMe31luZbX+9 2Y05r0yFGphj1P2zFNVJkkqnIyVoGwezapFDE9GPnalY/kZQt2ASbGqyNCbtUZgqDQ0GZI7xtnRWQ 0VZZtYRPOMY8QtCQo6mBMhCZhNzt1o872nLqW0ynTifJq8qC6ucxyIhmNbVFnrGYeYLtYfQBzld4D 9QxaD/g0TJaEiqVfBPg8Ts0hvgcubHPz3xXUJXD7l2q6ggwUeqWt060+MCjJUc+md1K+ol03PReuT iAntpo9sZffiCHtnF3ORCrw3VyRPBX3NBg7gbuvq2+kEfFhAj22dMY/l1OZU8O8/yWv5SRFA51ALK nZKZ6/8aRKRPjwF3ZaOQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tfVC4-000000028Zf-0bIi; Wed, 05 Feb 2025 02:31:12 +0000 Received: from desiato.infradead.org ([2001:8b0:10b:1:d65d:64ff:fe57:4e05]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tfU7j-000000021jn-1nht for linux-riscv@bombadil.infradead.org; Wed, 05 Feb 2025 01:22:39 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Cc:To:In-Reply-To:References: Message-Id:Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date: From:Sender:Reply-To:Content-ID:Content-Description; bh=42Qh4XiAuZulv75xzl4kByDL6UOmUjop2oq2YsBLVIA=; b=S/pk3gbly32HJ5nbjBNiULxcJg 55Eg4Kxgj/j7luvgk+2JOOUJIR0+12jhN1blWLubrEoGpAlAzcbsaRtJaNPeacNP8m3dL2ApZTGR2 R/hJPcpZWr+zibs7UoTYa6Fhz1ZcoHRc7oMhdKOleASHJlWJPlEKwX7xtninPAG5ZAs5mx2Wt5x7z S8AebAYDsZa6r1u43dJ/FfnJRySxsvFpiKoG+owo5lwkFi83BAyTKmmwHEPtpEr9jweNou4g+daRS 3s1C1D7MBAn8HeIrwZ7gf+Bev2N0ZW9objhKrYSmgFAohgrw62IdCHEPiFh9j4NJDUZeuT2lDzSo/ k4Lsfqsg==; Received: from mail-pl1-x632.google.com ([2607:f8b0:4864:20::632]) by desiato.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tfU7U-0000000GTrx-3QOc for linux-riscv@lists.infradead.org; Wed, 05 Feb 2025 01:22:37 +0000 Received: by mail-pl1-x632.google.com with SMTP id d9443c01a7336-2162c0f6a39so6260125ad.0 for ; Tue, 04 Feb 2025 17:22:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1738718535; x=1739323335; darn=lists.infradead.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=42Qh4XiAuZulv75xzl4kByDL6UOmUjop2oq2YsBLVIA=; b=TqKQhvAnDP04O+yCTM9jf7iiy/6uyGrPOk0NZLItnzXCmYy89qfmm4aWKStdBYCUkj nUocibg4Wb3O2dhXMfnsHa1UWRVXO+piheq9UWFyNekDFbSKHKAwe7Tc+TdFGYdGmbdH WTsWATEpucegn3eQEHIbxxVY9KtIfQqVJiU698K9aui3UtjZjZEzmbahtuKGIb5zuXE2 jRJGBkApDwgAObD4W/sKjG/QEeN4fPUWD76tfcrhpqjKpO8GBr7xux8/6yQf0ZI7ZvdQ oi9WUwUB7u/uvlhQ6fslhZDp5D/DFivX51HKm50j/JKExlGDuNI354Nacloqy7EZvWkd 3KTw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1738718535; x=1739323335; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=42Qh4XiAuZulv75xzl4kByDL6UOmUjop2oq2YsBLVIA=; b=EcNpcUHTD9r3C45glQG5yaaARYggBz+p9CDZp1bVrOE8Qfydx/Nx/RxDhdvGTAZL6o 8thJEjsT1WVNngQvXSsaSn5ykNW0qYThZvO4iJ7LduAhh9sQpMT0uqRZF22BW3o3sO/q w1F5kV1yjS1F7hanDhK5RIzSKkwHcoY++wy6GfaF0Asm/7tCp/gVqh5vSgaEioJSFKjn 40JBnKCPSW2xBQpTwqv7kdmQ5wUu87AMHlKmEQBFcZgV60ClNgEjRzrklItvT71TYWWV hh57RK3WlLtb0gdRSvXJne79EagIDYSV/RKquZORiqjg1smtB9loK2C6idH0vCFXMC+N f5Dg== X-Forwarded-Encrypted: i=1; AJvYcCWSWtv0uQIhapiBtKlH/GDQ+LHORsecdu6U5rsqi8xJPajzgRjtfpQPgbkdHcFqHx7N7gBnYUPAjJ6HCw==@lists.infradead.org X-Gm-Message-State: AOJu0Yyu3V4f5FApPo0dMQ1LdvBMJdQ/9tMTTP2RKh8Amf0CJ5U4PnMH QK3tUVM9nRC2qnC4M4VoD6ALGLsF5bqyemUvjkxZ5eQjkFo7GvilQ87DEoYUfNa+NFfPzV8t0od e X-Gm-Gg: ASbGnctzWz/w655jDFB1Q8eUW/+Pt9+ARTVFI8elDgOJX+LNLcotb+AAgLnGfyu4qVP Rvmr8TaJsrvTHKvjFfbA1Li0wutmo9U0vtqiHE+1gvirCM0D2FeowSu+S0QRg4ZJLigbDN/LSh5 CF2/ZgJsF+qgk6WlrGBJBytrGDGc20DJWZ+pcVENZ+V1cgHVS3cetzOk/DuTGea5AnaFsFXVCry Z0eZsaQxEkF8HTd6BswpcAmOpyr+MTE+fv4cxDG7hm4m1ampBHNDZE71qIzLh0XS/UZ5raypLlg 7j5ZMGocIsZw0UbpNfySA0WhNw== X-Google-Smtp-Source: AGHT+IH/Psd/onCatzWOL9h1hC6OuXGTzue1ff8vsdlioogCR33P6WJDwTS7Y6T23ip1mN212dv4pg== X-Received: by 2002:a05:6a00:179c:b0:725:e386:3c5b with SMTP id d2e1a72fcca58-730271ffbd9mr10428644b3a.5.1738718535041; Tue, 04 Feb 2025 17:22:15 -0800 (PST) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-72fe69cec0fsm11457202b3a.137.2025.02.04.17.22.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 04 Feb 2025 17:22:14 -0800 (PST) From: Deepak Gupta Date: Tue, 04 Feb 2025 17:21:58 -0800 Subject: [PATCH v9 11/26] riscv/shstk: If needed allocate a new shadow stack on clone MIME-Version: 1.0 Message-Id: <20250204-v5_user_cfi_series-v9-11-b37a49c5205c@rivosinc.com> References: <20250204-v5_user_cfi_series-v9-0-b37a49c5205c@rivosinc.com> In-Reply-To: <20250204-v5_user_cfi_series-v9-0-b37a49c5205c@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan , Jann Horn , Conor Dooley Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta X-Mailer: b4 0.14.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250205_012227_790189_F077B3F4 X-CRM114-Status: GOOD ( 29.65 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Userspace specifies CLONE_VM to share address space and spawn new thread. `clone` allow userspace to specify a new stack for new thread. However there is no way to specify new shadow stack base address without changing API. This patch allocates a new shadow stack whenever CLONE_VM is given. In case of CLONE_VFORK, parent is suspended until child finishes and thus can child use parent shadow stack. In case of !CLONE_VM, COW kicks in because entire address space is copied from parent to child. `clone3` is extensible and can provide mechanisms using which shadow stack as an input parameter can be provided. This is not settled yet and being extensively discussed on mailing list. Once that's settled, this commit will adapt to that. Signed-off-by: Deepak Gupta --- arch/riscv/include/asm/mmu_context.h | 7 ++ arch/riscv/include/asm/usercfi.h | 25 ++++++++ arch/riscv/kernel/process.c | 9 +++ arch/riscv/kernel/usercfi.c | 120 +++++++++++++++++++++++++++++++++++ 4 files changed, 161 insertions(+) diff --git a/arch/riscv/include/asm/mmu_context.h b/arch/riscv/include/asm/mmu_context.h index 8c4bc49a3a0f..dbf27a78df6c 100644 --- a/arch/riscv/include/asm/mmu_context.h +++ b/arch/riscv/include/asm/mmu_context.h @@ -48,6 +48,13 @@ static inline unsigned long mm_untag_mask(struct mm_struct *mm) } #endif +#define deactivate_mm deactivate_mm +static inline void deactivate_mm(struct task_struct *tsk, + struct mm_struct *mm) +{ + shstk_release(tsk); +} + #include #endif /* _ASM_RISCV_MMU_CONTEXT_H */ diff --git a/arch/riscv/include/asm/usercfi.h b/arch/riscv/include/asm/usercfi.h index 5f2027c51917..82d28ac98d76 100644 --- a/arch/riscv/include/asm/usercfi.h +++ b/arch/riscv/include/asm/usercfi.h @@ -8,6 +8,9 @@ #ifndef __ASSEMBLY__ #include +struct task_struct; +struct kernel_clone_args; + #ifdef CONFIG_RISCV_USER_CFI struct cfi_status { unsigned long ubcfi_en : 1; /* Enable for backward cfi. */ @@ -17,6 +20,28 @@ struct cfi_status { unsigned long shdw_stk_size; /* size of shadow stack */ }; +unsigned long shstk_alloc_thread_stack(struct task_struct *tsk, + const struct kernel_clone_args *args); +void shstk_release(struct task_struct *tsk); +void set_shstk_base(struct task_struct *task, unsigned long shstk_addr, unsigned long size); +unsigned long get_shstk_base(struct task_struct *task, unsigned long *size); +void set_active_shstk(struct task_struct *task, unsigned long shstk_addr); +bool is_shstk_enabled(struct task_struct *task); + +#else + +#define shstk_alloc_thread_stack(tsk, args) 0 + +#define shstk_release(tsk) + +#define get_shstk_base(task, size) 0UL + +#define set_shstk_base(task, shstk_addr, size) + +#define set_active_shstk(task, shstk_addr) + +#define is_shstk_enabled(task) false + #endif /* CONFIG_RISCV_USER_CFI */ #endif /* __ASSEMBLY__ */ diff --git a/arch/riscv/kernel/process.c b/arch/riscv/kernel/process.c index 7c244de77180..99acb6342a37 100644 --- a/arch/riscv/kernel/process.c +++ b/arch/riscv/kernel/process.c @@ -29,6 +29,7 @@ #include #include #include +#include #if defined(CONFIG_STACKPROTECTOR) && !defined(CONFIG_STACKPROTECTOR_PER_TASK) #include @@ -211,6 +212,7 @@ int copy_thread(struct task_struct *p, const struct kernel_clone_args *args) unsigned long clone_flags = args->flags; unsigned long usp = args->stack; unsigned long tls = args->tls; + unsigned long ssp = 0; struct pt_regs *childregs = task_pt_regs(p); /* Ensure all threads in this mm have the same pointer masking mode. */ @@ -229,11 +231,18 @@ int copy_thread(struct task_struct *p, const struct kernel_clone_args *args) p->thread.s[0] = (unsigned long)args->fn; p->thread.s[1] = (unsigned long)args->fn_arg; } else { + /* allocate new shadow stack if needed. In case of CLONE_VM we have to */ + ssp = shstk_alloc_thread_stack(p, args); + if (IS_ERR_VALUE(ssp)) + return PTR_ERR((void *)ssp); + *childregs = *(current_pt_regs()); /* Turn off status.VS */ riscv_v_vstate_off(childregs); if (usp) /* User fork */ childregs->sp = usp; + /* if needed, set new ssp */ + ssp ? set_active_shstk(p, ssp) : 0; if (clone_flags & CLONE_SETTLS) childregs->tp = tls; childregs->a0 = 0; /* Return value of fork() */ diff --git a/arch/riscv/kernel/usercfi.c b/arch/riscv/kernel/usercfi.c index 24022809a7b5..73cf87dab186 100644 --- a/arch/riscv/kernel/usercfi.c +++ b/arch/riscv/kernel/usercfi.c @@ -19,6 +19,41 @@ #define SHSTK_ENTRY_SIZE sizeof(void *) +bool is_shstk_enabled(struct task_struct *task) +{ + return task->thread_info.user_cfi_state.ubcfi_en ? true : false; +} + +void set_shstk_base(struct task_struct *task, unsigned long shstk_addr, unsigned long size) +{ + task->thread_info.user_cfi_state.shdw_stk_base = shstk_addr; + task->thread_info.user_cfi_state.shdw_stk_size = size; +} + +unsigned long get_shstk_base(struct task_struct *task, unsigned long *size) +{ + if (size) + *size = task->thread_info.user_cfi_state.shdw_stk_size; + return task->thread_info.user_cfi_state.shdw_stk_base; +} + +void set_active_shstk(struct task_struct *task, unsigned long shstk_addr) +{ + task->thread_info.user_cfi_state.user_shdw_stk = shstk_addr; +} + +/* + * If size is 0, then to be compatible with regular stack we want it to be as big as + * regular stack. Else PAGE_ALIGN it and return back + */ +static unsigned long calc_shstk_size(unsigned long size) +{ + if (size) + return PAGE_ALIGN(size); + + return PAGE_ALIGN(min_t(unsigned long long, rlimit(RLIMIT_STACK), SZ_4G)); +} + /* * Writes on shadow stack can either be `sspush` or `ssamoswap`. `sspush` can happen * implicitly on current shadow stack pointed to by CSR_SSP. `ssamoswap` takes pointer to @@ -142,3 +177,88 @@ SYSCALL_DEFINE3(map_shadow_stack, unsigned long, addr, unsigned long, size, unsi return allocate_shadow_stack(addr, aligned_size, size, set_tok); } + +/* + * This gets called during clone/clone3/fork. And is needed to allocate a shadow stack for + * cases where CLONE_VM is specified and thus a different stack is specified by user. We + * thus need a separate shadow stack too. How does separate shadow stack is specified by + * user is still being debated. Once that's settled, remove this part of the comment. + * This function simply returns 0 if shadow stack are not supported or if separate shadow + * stack allocation is not needed (like in case of !CLONE_VM) + */ +unsigned long shstk_alloc_thread_stack(struct task_struct *tsk, + const struct kernel_clone_args *args) +{ + unsigned long addr, size; + + /* If shadow stack is not supported, return 0 */ + if (!cpu_supports_shadow_stack()) + return 0; + + /* + * If shadow stack is not enabled on the new thread, skip any + * switch to a new shadow stack. + */ + if (!is_shstk_enabled(tsk)) + return 0; + + /* + * For CLONE_VFORK the child will share the parents shadow stack. + * Set base = 0 and size = 0, this is special means to track this state + * so the freeing logic run for child knows to leave it alone. + */ + if (args->flags & CLONE_VFORK) { + set_shstk_base(tsk, 0, 0); + return 0; + } + + /* + * For !CLONE_VM the child will use a copy of the parents shadow + * stack. + */ + if (!(args->flags & CLONE_VM)) + return 0; + + /* + * reaching here means, CLONE_VM was specified and thus a separate shadow + * stack is needed for new cloned thread. Note: below allocation is happening + * using current mm. + */ + size = calc_shstk_size(args->stack_size); + addr = allocate_shadow_stack(0, size, 0, false); + if (IS_ERR_VALUE(addr)) + return addr; + + set_shstk_base(tsk, addr, size); + + return addr + size; +} + +void shstk_release(struct task_struct *tsk) +{ + unsigned long base = 0, size = 0; + /* If shadow stack is not supported or not enabled, nothing to release */ + if (!cpu_supports_shadow_stack() || !is_shstk_enabled(tsk)) + return; + + /* + * When fork() with CLONE_VM fails, the child (tsk) already has a + * shadow stack allocated, and exit_thread() calls this function to + * free it. In this case the parent (current) and the child share + * the same mm struct. Move forward only when they're same. + */ + if (!tsk->mm || tsk->mm != current->mm) + return; + + /* + * We know shadow stack is enabled but if base is NULL, then + * this task is not managing its own shadow stack (CLONE_VFORK). So + * skip freeing it. + */ + base = get_shstk_base(tsk, &size); + if (!base) + return; + + vm_munmap(base, size); + set_shstk_base(tsk, 0, 0); +} From patchwork Wed Feb 5 01:21:59 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 13960434 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EE032C02199 for ; Wed, 5 Feb 2025 02:31:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=4tWZuXcpoiQvWKJxlIra5S65tkHcJk+ZXShwOiX/68E=; b=ULeeo1r4g6cgp+ T3HHbuh0bkjKfLdmTgEnyS6uywQXZWRrtv2AdGW4Rn8fh82oFKfLd3E2PRUygP1Ko1zlWyL2YcHxe S3vKnZGWY6h+cB+002IbJw/fqROiEuS3zhxKbsnCgkDxg0tQ3Dn9EDhO/yiYJAD7aDP+f12LtjU4j NMy1sxgto/z3f6vsBowwg8SAaFK7hzanuKYf4P+WN3wJ7WCp7TOM/tPM5iGqT0oxoqeIAvE1OqxI1 t8lY7+L4HNkHATE+bjy3b9TsGfJOw7D3+qhzaar4DnOHxXp6uZFmA7pynIO/DvPS3XsGoa0/xEOTs nhqWBEwFXw9utn5dNiCA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tfVBx-000000028Ub-35uz; Wed, 05 Feb 2025 02:31:05 +0000 Received: from casper.infradead.org ([2001:8b0:10b:1236::1]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tfU7V-000000021WI-0NZc for linux-riscv@bombadil.infradead.org; Wed, 05 Feb 2025 01:22:25 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=Cc:To:In-Reply-To:References:Message-Id :Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date:From:Sender :Reply-To:Content-ID:Content-Description; bh=Zfw9OtoVzzM7Z5oL2c+Ej/yDm51xyr1WNtqXJN3fx8s=; b=e5RQWjDzaauNdGShFvl+yMGYz4 jazPJRtFr4fThctDMHdgMB5slwAJV3glpOVgjEO40VhH2ecWQf2gAdSlinhpPwjL/FWpTUPIItoKT hgxZE3+E4ZAGyuodwhJD/MPjlrv+QvtqV3u+Zd8GzSf0VOQuZC8wOxQBVcx/ewVadejbooM9hvCeH WptUkXpQzEZc1QIWGgiksFhJKm7vqxEJqMHQE+ZIZfrOBtbmGjp00EesnCwgo0L14PmDz1X68+C1A B8AGz01cU7YrjaPmI3xCjQPCxP6QnMOh15n+E3h8h+riaiArJXDUlmdHVFTicagTisyKvEi9AnGY+ iyFJXd3w==; Received: from mail-pj1-x1032.google.com ([2607:f8b0:4864:20::1032]) by casper.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tfU7R-00000003c5P-1OEO for linux-riscv@lists.infradead.org; Wed, 05 Feb 2025 01:22:23 +0000 Received: by mail-pj1-x1032.google.com with SMTP id 98e67ed59e1d1-2ee9a780de4so8250689a91.3 for ; Tue, 04 Feb 2025 17:22:19 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1738718537; x=1739323337; darn=lists.infradead.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=Zfw9OtoVzzM7Z5oL2c+Ej/yDm51xyr1WNtqXJN3fx8s=; b=ieeYk2v/Wh99Kc0oR4aCaGJ4qa0YZ1Z7HNTZ5jUasR0pweXJR4Xr3DT+11wqxZ/mdA nuehCofK9O3+7t3wfiYP+hGdJLewKtnOC7Fqfr/rjjchU+JYD+bzqHMih80ubGnZomkZ zwp8OZETTL3c0S4XE0DYClz7A4krJdDYkguNzxygps6CxS7tzgqo2PrPC1d3a1rLCwWx wWNG08DVXXJhIb8UeaI/KIY4zCMnpubXvuI6ZRmPmuxEtJlTy7SIqlefxWJ3TC8fo1++ KRaj0WiFjJaO8XoFgIBKDW4WZEph9t+eQUObwAjj0hpz69tWP4i7QobQY0i6JSTxyoP2 Zr1w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1738718537; x=1739323337; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Zfw9OtoVzzM7Z5oL2c+Ej/yDm51xyr1WNtqXJN3fx8s=; b=vJz2bxLgrQQXvRZoONzrkTKbwBiprZq78MvAg+H05IOSJ5G57GWEyVP7owVYU1wuT2 ZEX01BDN4LXls1X79XQSBG92xxX+rc+fuZHnIMelU9o493bgg/yMWNxmCQsr3bJFTZvA xAjkwFJMpZS14R+PNRVFR3ETyGDXqO9fVSC89usf+YqyAizbw0YVo26FASJSXludcjwx vyxmJDAVQYkxR1TTPMlcfXFdr6Hrhip4ZJfCNkKwB8yGRHXQyaDgd4w833BB9H96i5zz TzcLb4bjcbi9vMTuxiOU2yrlmI9Sh5yPoacU8HWsZMABrXybqMVGdEaavajnlYylbjuT vJpw== X-Forwarded-Encrypted: i=1; AJvYcCVlJiYeyhB/SEpc53jkZlQZcc3PTfkzKD/52J8SgVtG4jA24AvvTKZnU46Br3eTYCpvdC4GmZ9mtTqPnw==@lists.infradead.org X-Gm-Message-State: AOJu0YwG+YIFiemROjme6Iqm2gojmDAt5lAbz2vioEL8Dn198OD9V6kN Llya8J4ONaIF/a9632D6kw3DqnmQWUODhvQcp833Zl7dE+b0gN9LraLfx10zAjnkk4LrLqYmqeN M X-Gm-Gg: ASbGncuu6uAYBA2cNyX3rZC7o1ZaHSovFsZO4Ap1wtp95Te2VpNQuxzOKpr1N0e4srf hG6j0b1KqKmxvt7mmIl19cF2N1hzXriK9DYXBPJp7SBT00mmtivnYusCYXIgFosH2u2yuaWv0Fs 51C6fz48F2BU2WPxyW3RIRLq5nVO7jbIsrtzP87OWcOppJErrPmihAx+oWP28HTaUyj+OoWB2Hz mxGmp7qGVL9ixpH5/ndEf5PyX++5RCTHhd9k2XQAeLbAHrPtBWzPUrkGK4DAgRR5e10PaJV2rox G4op3Nj7isMi3bitlCwIBJxrbA== X-Google-Smtp-Source: AGHT+IEV2JRI/u7jJ+DMFTPXNcstQgsHVFgvv9cPCm1RBElDa+SvGAhtxoxPORcsFm2xZuy3PMKfmQ== X-Received: by 2002:a05:6a00:3991:b0:728:e2cc:bfd6 with SMTP id d2e1a72fcca58-730351dd5d3mr1505033b3a.18.1738718536922; Tue, 04 Feb 2025 17:22:16 -0800 (PST) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-72fe69cec0fsm11457202b3a.137.2025.02.04.17.22.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 04 Feb 2025 17:22:16 -0800 (PST) From: Deepak Gupta Date: Tue, 04 Feb 2025 17:21:59 -0800 Subject: [PATCH v9 12/26] riscv: Implements arch agnostic shadow stack prctls MIME-Version: 1.0 Message-Id: <20250204-v5_user_cfi_series-v9-12-b37a49c5205c@rivosinc.com> References: <20250204-v5_user_cfi_series-v9-0-b37a49c5205c@rivosinc.com> In-Reply-To: <20250204-v5_user_cfi_series-v9-0-b37a49c5205c@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan , Jann Horn , Conor Dooley Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta X-Mailer: b4 0.14.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250205_012221_386301_537CB37B X-CRM114-Status: GOOD ( 24.85 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Implement architecture agnostic prctls() interface for setting and getting shadow stack status. prctls implemented are PR_GET_SHADOW_STACK_STATUS, PR_SET_SHADOW_STACK_STATUS and PR_LOCK_SHADOW_STACK_STATUS. As part of PR_SET_SHADOW_STACK_STATUS/PR_GET_SHADOW_STACK_STATUS, only PR_SHADOW_STACK_ENABLE is implemented because RISCV allows each mode to write to their own shadow stack using `sspush` or `ssamoswap`. PR_LOCK_SHADOW_STACK_STATUS locks current configuration of shadow stack enabling. Signed-off-by: Deepak Gupta --- arch/riscv/include/asm/usercfi.h | 18 ++++++- arch/riscv/kernel/process.c | 8 +++ arch/riscv/kernel/usercfi.c | 107 +++++++++++++++++++++++++++++++++++++++ 3 files changed, 132 insertions(+), 1 deletion(-) diff --git a/arch/riscv/include/asm/usercfi.h b/arch/riscv/include/asm/usercfi.h index 82d28ac98d76..c4dcd256f19a 100644 --- a/arch/riscv/include/asm/usercfi.h +++ b/arch/riscv/include/asm/usercfi.h @@ -7,6 +7,7 @@ #ifndef __ASSEMBLY__ #include +#include struct task_struct; struct kernel_clone_args; @@ -14,7 +15,8 @@ struct kernel_clone_args; #ifdef CONFIG_RISCV_USER_CFI struct cfi_status { unsigned long ubcfi_en : 1; /* Enable for backward cfi. */ - unsigned long rsvd : ((sizeof(unsigned long) * 8) - 1); + unsigned long ubcfi_locked : 1; + unsigned long rsvd : ((sizeof(unsigned long) * 8) - 2); unsigned long user_shdw_stk; /* Current user shadow stack pointer */ unsigned long shdw_stk_base; /* Base address of shadow stack */ unsigned long shdw_stk_size; /* size of shadow stack */ @@ -27,6 +29,12 @@ void set_shstk_base(struct task_struct *task, unsigned long shstk_addr, unsigned unsigned long get_shstk_base(struct task_struct *task, unsigned long *size); void set_active_shstk(struct task_struct *task, unsigned long shstk_addr); bool is_shstk_enabled(struct task_struct *task); +bool is_shstk_locked(struct task_struct *task); +bool is_shstk_allocated(struct task_struct *task); +void set_shstk_lock(struct task_struct *task); +void set_shstk_status(struct task_struct *task, bool enable); + +#define PR_SHADOW_STACK_SUPPORTED_STATUS_MASK (PR_SHADOW_STACK_ENABLE) #else @@ -42,6 +50,14 @@ bool is_shstk_enabled(struct task_struct *task); #define is_shstk_enabled(task) false +#define is_shstk_locked(task) false + +#define is_shstk_allocated(task) false + +#define set_shstk_lock(task) + +#define set_shstk_status(task, enable) + #endif /* CONFIG_RISCV_USER_CFI */ #endif /* __ASSEMBLY__ */ diff --git a/arch/riscv/kernel/process.c b/arch/riscv/kernel/process.c index 99acb6342a37..cd11667593fe 100644 --- a/arch/riscv/kernel/process.c +++ b/arch/riscv/kernel/process.c @@ -153,6 +153,14 @@ void start_thread(struct pt_regs *regs, unsigned long pc, regs->epc = pc; regs->sp = sp; + /* + * clear shadow stack state on exec. + * libc will set it later via prctl. + */ + set_shstk_status(current, false); + set_shstk_base(current, 0, 0); + set_active_shstk(current, 0); + #ifdef CONFIG_64BIT regs->status &= ~SR_UXL; diff --git a/arch/riscv/kernel/usercfi.c b/arch/riscv/kernel/usercfi.c index 73cf87dab186..37d6fb8144e7 100644 --- a/arch/riscv/kernel/usercfi.c +++ b/arch/riscv/kernel/usercfi.c @@ -24,6 +24,16 @@ bool is_shstk_enabled(struct task_struct *task) return task->thread_info.user_cfi_state.ubcfi_en ? true : false; } +bool is_shstk_allocated(struct task_struct *task) +{ + return task->thread_info.user_cfi_state.shdw_stk_base ? true : false; +} + +bool is_shstk_locked(struct task_struct *task) +{ + return task->thread_info.user_cfi_state.ubcfi_locked ? true : false; +} + void set_shstk_base(struct task_struct *task, unsigned long shstk_addr, unsigned long size) { task->thread_info.user_cfi_state.shdw_stk_base = shstk_addr; @@ -42,6 +52,23 @@ void set_active_shstk(struct task_struct *task, unsigned long shstk_addr) task->thread_info.user_cfi_state.user_shdw_stk = shstk_addr; } +void set_shstk_status(struct task_struct *task, bool enable) +{ + task->thread_info.user_cfi_state.ubcfi_en = enable ? 1 : 0; + + if (enable) + task->thread.envcfg |= ENVCFG_SSE; + else + task->thread.envcfg &= ~ENVCFG_SSE; + + csr_write(CSR_ENVCFG, task->thread.envcfg); +} + +void set_shstk_lock(struct task_struct *task) +{ + task->thread_info.user_cfi_state.ubcfi_locked = 1; +} + /* * If size is 0, then to be compatible with regular stack we want it to be as big as * regular stack. Else PAGE_ALIGN it and return back @@ -262,3 +289,83 @@ void shstk_release(struct task_struct *tsk) vm_munmap(base, size); set_shstk_base(tsk, 0, 0); } + +int arch_get_shadow_stack_status(struct task_struct *t, unsigned long __user *status) +{ + unsigned long bcfi_status = 0; + + if (!cpu_supports_shadow_stack()) + return -EINVAL; + + /* this means shadow stack is enabled on the task */ + bcfi_status |= (is_shstk_enabled(t) ? PR_SHADOW_STACK_ENABLE : 0); + + return copy_to_user(status, &bcfi_status, sizeof(bcfi_status)) ? -EFAULT : 0; +} + +int arch_set_shadow_stack_status(struct task_struct *t, unsigned long status) +{ + unsigned long size = 0, addr = 0; + bool enable_shstk = false; + + if (!cpu_supports_shadow_stack()) + return -EINVAL; + + /* Reject unknown flags */ + if (status & ~PR_SHADOW_STACK_SUPPORTED_STATUS_MASK) + return -EINVAL; + + /* bcfi status is locked and further can't be modified by user */ + if (is_shstk_locked(t)) + return -EINVAL; + + enable_shstk = status & PR_SHADOW_STACK_ENABLE; + /* Request is to enable shadow stack and shadow stack is not enabled already */ + if (enable_shstk && !is_shstk_enabled(t)) { + /* shadow stack was allocated and enable request again + * no need to support such usecase and return EINVAL. + */ + if (is_shstk_allocated(t)) + return -EINVAL; + + size = calc_shstk_size(0); + addr = allocate_shadow_stack(0, size, 0, false); + if (IS_ERR_VALUE(addr)) + return -ENOMEM; + set_shstk_base(t, addr, size); + set_active_shstk(t, addr + size); + } + + /* + * If a request to disable shadow stack happens, let's go ahead and release it + * Although, if CLONE_VFORKed child did this, then in that case we will end up + * not releasing the shadow stack (because it might be needed in parent). Although + * we will disable it for VFORKed child. And if VFORKed child tries to enable again + * then in that case, it'll get entirely new shadow stack because following condition + * are true + * - shadow stack was not enabled for vforked child + * - shadow stack base was anyways pointing to 0 + * This shouldn't be a big issue because we want parent to have availability of shadow + * stack whenever VFORKed child releases resources via exit or exec but at the same + * time we want VFORKed child to break away and establish new shadow stack if it desires + * + */ + if (!enable_shstk) + shstk_release(t); + + set_shstk_status(t, enable_shstk); + return 0; +} + +int arch_lock_shadow_stack_status(struct task_struct *task, + unsigned long arg) +{ + /* If shtstk not supported or not enabled on task, nothing to lock here */ + if (!cpu_supports_shadow_stack() || + !is_shstk_enabled(task) || arg != 0) + return -EINVAL; + + set_shstk_lock(task); + + return 0; +} From patchwork Wed Feb 5 01:22:00 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 13960436 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 06A79C02197 for ; Wed, 5 Feb 2025 02:31:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=kfy4eS9FV9w6MtMP9gjxFp+GJ73mPOqDk6bl0EcGfo0=; b=hYzFqGMhOTJqol 0kwuUxKnNE5yAO1fOL2i85AvVU3I4HMXvZDhnZQNIiT5q0uDCOnZss5nEZQbzHegE/+aMZRkaMPYL 9v+KUao3/554/mJffjB62bVW7XHj6YOGFiuBE8i2HWOK/yG5pQKni2bTYnZ/fDGkte9leC6l+PIwF fNwATwqcAFC57kDU+XwP4nr3NqdnjI5R2pj7tQKZPE0VcNqYZ2fvJpInRt1cliinjMkVPqx8UWuLh eDz5BMsQw/X4ISV1DpKmph1UJnZiwZ7TtpzM9iUDxeDPFxsT8w/EIwGkymX+urJqhe4D0UmGG0+Qp KwHfPWVmHxhm0AjtpujQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tfVBy-000000028Uh-1VuN; Wed, 05 Feb 2025 02:31:06 +0000 Received: from casper.infradead.org ([2001:8b0:10b:1236::1]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tfU7V-000000021WX-1jBl for linux-riscv@bombadil.infradead.org; Wed, 05 Feb 2025 01:22:25 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=Cc:To:In-Reply-To:References:Message-Id :Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date:From:Sender :Reply-To:Content-ID:Content-Description; bh=n4wOXS0/20DvZRxruHD7mFnd6lRzln/dV2wTFJ6STYc=; b=uR6sLmI+V25v67c4ny675+N58d wrc1VmVKK43WobNtiqWcYQRxYwC7Q2z9knSr+8g9nj5lK9wBe+96fGNQ1fI41d7IVGxduPbjCWwGZ mWUd8F472j56lI45iYD+6BnZv4cLznHbcg1/EU8tOmy3clemcYdwGM2KT5nxTdhdtBgKW2KzpYfZf XrKNCfl4hVcFJm0atdpedgXiD8KsqFaWK2xoCK+bF62bJJ/83xaCctOScwbsJOViQqQ0lRWpfVOtu Tn1JO0WSq3XRSpPgHEghTauahAu+2pARx6ez1eFOJ3fk+O/p+FrFYWAChXvrJKP0qdlPjyHY/Wmx9 jMGYa5fA==; Received: from mail-pj1-x1035.google.com ([2607:f8b0:4864:20::1035]) by casper.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tfU7S-00000003c5f-17rF for linux-riscv@lists.infradead.org; Wed, 05 Feb 2025 01:22:24 +0000 Received: by mail-pj1-x1035.google.com with SMTP id 98e67ed59e1d1-2f9c3ec68c7so1957820a91.2 for ; Tue, 04 Feb 2025 17:22:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1738718539; x=1739323339; darn=lists.infradead.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=n4wOXS0/20DvZRxruHD7mFnd6lRzln/dV2wTFJ6STYc=; b=aQOPq58IyCueqOEbmqmoA8WcwRRSnXOAFmLtVeIp1I2RrRgVMv5om/cGzP0SX90vvv ffb7hpgUEMfF+QNpGH9L/ckCGxG2XSRb2jdKx+Hf88qNGziUgWhMCX74K/mStaQeL2pv DiJ9E+wqVRRQ7qCyBdxt889Fvr7imfuVwJ7m520/cdMYzNoTpddhR0iRZ0ISjI8zT4/a IG+QD5tXwsGlMrrrOxs2tWuvuTwv7A1R8j1NDOAm05Z17WWuOwzAp8bIvSGVGkw+TgyI j4tRAhTzCaLIZQ/uYkdlVthwNpTPj8oFZuRYXUactH5T1QTKC4jyywTNpCHPrDYwpysf eaLA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1738718539; x=1739323339; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=n4wOXS0/20DvZRxruHD7mFnd6lRzln/dV2wTFJ6STYc=; b=j8OiEHXXA3DpjIHNtCPclv6obBbKr/HO8Ekt9N6otG1hkE5vJx1kAAiyzMDSUblrkD zsjSrE1OnptBxNLlGCDfFWpssFHd19QaNGDFE1V76klCP1zuisCBhDjKGAfnbCiK7Evr yKkj9SQyI5Co/4ZDd/96CwYvEFyHvDHuUKLeG7+q39t9LsnrIPlelbzrPy6DwbpFkDll R59lkexWAvb5qETD9+M77ot92E7bRaGCAu9VaURicvSw/yhgTqbrxfg8RepUcyq4eDUf AbMW2lpDpaUCo/zdp3nYet8zy4tUX0O+2Fyc58iSE6l7VnppIi8kh7Bz9zNnvSMoZg0m G+bw== X-Forwarded-Encrypted: i=1; AJvYcCXcRYgQxo4A7yAOJEnLfvI6o761en6fBAdanpJTYrCDUxXaHn1YFq+ae4GS0ryXQzAToTcOrvjt+lRmDQ==@lists.infradead.org X-Gm-Message-State: AOJu0YwHr30ia6/KvFWEf1/bLDITBgkVC5aw0bbB9icX0uuxmBke0jet EQMCfoHFxFGHeCl4LBaa7qA3czLL79Pe8I/U9Sfc30LTH8eMsnDHdCXtPc2ZJ/yAJ1dRnE+vOrR j X-Gm-Gg: ASbGncuyDN8mzmbY1Y7jOuFucT3n6E0GkZWF879PUDtx5sLb8kIF5fI0i6i2o7ojmAL tymJyTHSjgG37ra6GrgY5aB5IWTSHRgWImxNO8mvX061hQtEHW/9NVzO/d1GScvEBVYxFjDFnCw hZeEKjdDcG21kBPpQeFgk0aCKL8cSMN8EjZhDYqp3LN3gmg4a0wvP6jtwDalghQ7qkx6mG37Q8A oyk053pl4NQXpf40o84NWnfKJR9AoDq8HJgoUbWvej4soEwybSXUFRmKnJQnqKcsC52wXZ7j4ar 6y0J/hNPPsgCPWN37WuFFE/uRw== X-Google-Smtp-Source: AGHT+IEkMV3NZQlTfgqHebic0yhy4xKkC1OVABBD14xN7hIjWbNvTWOJifhfgskqBrlP8VDgH29eiw== X-Received: by 2002:a05:6a00:2886:b0:729:1b8f:9645 with SMTP id d2e1a72fcca58-7303521c6d7mr1821327b3a.24.1738718538832; Tue, 04 Feb 2025 17:22:18 -0800 (PST) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-72fe69cec0fsm11457202b3a.137.2025.02.04.17.22.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 04 Feb 2025 17:22:18 -0800 (PST) From: Deepak Gupta Date: Tue, 04 Feb 2025 17:22:00 -0800 Subject: [PATCH v9 13/26] prctl: arch-agnostic prctl for indirect branch tracking MIME-Version: 1.0 Message-Id: <20250204-v5_user_cfi_series-v9-13-b37a49c5205c@rivosinc.com> References: <20250204-v5_user_cfi_series-v9-0-b37a49c5205c@rivosinc.com> In-Reply-To: <20250204-v5_user_cfi_series-v9-0-b37a49c5205c@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan , Jann Horn , Conor Dooley Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta X-Mailer: b4 0.14.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250205_012222_363158_CA6E00C5 X-CRM114-Status: GOOD ( 25.38 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Three architectures (x86, aarch64, riscv) have support for indirect branch tracking feature in a very similar fashion. On a very high level, indirect branch tracking is a CPU feature where CPU tracks branches which uses memory operand to perform control transfer in program. As part of this tracking on indirect branches, CPU goes in a state where it expects a landing pad instr on target and if not found then CPU raises some fault (architecture dependent) x86 landing pad instr - `ENDBRANCH` aarch64 landing pad instr - `BTI` riscv landing instr - `lpad` Given that three major arches have support for indirect branch tracking, This patch makes `prctl` for indirect branch tracking arch agnostic. To allow userspace to enable this feature for itself, following prtcls are defined: - PR_GET_INDIR_BR_LP_STATUS: Gets current configured status for indirect branch tracking. - PR_SET_INDIR_BR_LP_STATUS: Sets a configuration for indirect branch tracking. Following status options are allowed - PR_INDIR_BR_LP_ENABLE: Enables indirect branch tracking on user thread. - PR_INDIR_BR_LP_DISABLE; Disables indirect branch tracking on user thread. - PR_LOCK_INDIR_BR_LP_STATUS: Locks configured status for indirect branch tracking for user thread. Signed-off-by: Deepak Gupta Reviewed-by: Mark Brown --- arch/riscv/include/asm/usercfi.h | 16 ++++++++- arch/riscv/kernel/entry.S | 2 +- arch/riscv/kernel/process.c | 5 +++ arch/riscv/kernel/usercfi.c | 76 ++++++++++++++++++++++++++++++++++++++++ include/linux/cpu.h | 4 +++ include/uapi/linux/prctl.h | 27 ++++++++++++++ kernel/sys.c | 30 ++++++++++++++++ 7 files changed, 158 insertions(+), 2 deletions(-) diff --git a/arch/riscv/include/asm/usercfi.h b/arch/riscv/include/asm/usercfi.h index c4dcd256f19a..a8cec7c14d1d 100644 --- a/arch/riscv/include/asm/usercfi.h +++ b/arch/riscv/include/asm/usercfi.h @@ -16,7 +16,9 @@ struct kernel_clone_args; struct cfi_status { unsigned long ubcfi_en : 1; /* Enable for backward cfi. */ unsigned long ubcfi_locked : 1; - unsigned long rsvd : ((sizeof(unsigned long) * 8) - 2); + unsigned long ufcfi_en : 1; /* Enable for forward cfi. Note that ELP goes in sstatus */ + unsigned long ufcfi_locked : 1; + unsigned long rsvd : ((sizeof(unsigned long) * 8) - 4); unsigned long user_shdw_stk; /* Current user shadow stack pointer */ unsigned long shdw_stk_base; /* Base address of shadow stack */ unsigned long shdw_stk_size; /* size of shadow stack */ @@ -33,6 +35,10 @@ bool is_shstk_locked(struct task_struct *task); bool is_shstk_allocated(struct task_struct *task); void set_shstk_lock(struct task_struct *task); void set_shstk_status(struct task_struct *task, bool enable); +bool is_indir_lp_enabled(struct task_struct *task); +bool is_indir_lp_locked(struct task_struct *task); +void set_indir_lp_status(struct task_struct *task, bool enable); +void set_indir_lp_lock(struct task_struct *task); #define PR_SHADOW_STACK_SUPPORTED_STATUS_MASK (PR_SHADOW_STACK_ENABLE) @@ -58,6 +64,14 @@ void set_shstk_status(struct task_struct *task, bool enable); #define set_shstk_status(task, enable) +#define is_indir_lp_enabled(task) false + +#define is_indir_lp_locked(task) false + +#define set_indir_lp_status(task, enable) + +#define set_indir_lp_lock(task) + #endif /* CONFIG_RISCV_USER_CFI */ #endif /* __ASSEMBLY__ */ diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S index 68c99124ea55..00494b54ff4a 100644 --- a/arch/riscv/kernel/entry.S +++ b/arch/riscv/kernel/entry.S @@ -143,7 +143,7 @@ SYM_CODE_START(handle_exception) * Disable the FPU/Vector to detect illegal usage of floating point * or vector in kernel space. */ - li t0, SR_SUM | SR_FS_VS + li t0, SR_SUM | SR_FS_VS | SR_ELP REG_L s0, TASK_TI_USER_SP(tp) csrrc s1, CSR_STATUS, t0 diff --git a/arch/riscv/kernel/process.c b/arch/riscv/kernel/process.c index cd11667593fe..4587201dd81d 100644 --- a/arch/riscv/kernel/process.c +++ b/arch/riscv/kernel/process.c @@ -160,6 +160,11 @@ void start_thread(struct pt_regs *regs, unsigned long pc, set_shstk_status(current, false); set_shstk_base(current, 0, 0); set_active_shstk(current, 0); + /* + * disable indirect branch tracking on exec. + * libc will enable it later via prctl. + */ + set_indir_lp_status(current, false); #ifdef CONFIG_64BIT regs->status &= ~SR_UXL; diff --git a/arch/riscv/kernel/usercfi.c b/arch/riscv/kernel/usercfi.c index 37d6fb8144e7..3a66f149a4ef 100644 --- a/arch/riscv/kernel/usercfi.c +++ b/arch/riscv/kernel/usercfi.c @@ -69,6 +69,32 @@ void set_shstk_lock(struct task_struct *task) task->thread_info.user_cfi_state.ubcfi_locked = 1; } +bool is_indir_lp_enabled(struct task_struct *task) +{ + return task->thread_info.user_cfi_state.ufcfi_en ? true : false; +} + +bool is_indir_lp_locked(struct task_struct *task) +{ + return task->thread_info.user_cfi_state.ufcfi_locked ? true : false; +} + +void set_indir_lp_status(struct task_struct *task, bool enable) +{ + task->thread_info.user_cfi_state.ufcfi_en = enable ? 1 : 0; + + if (enable) + task->thread.envcfg |= ENVCFG_LPE; + else + task->thread.envcfg &= ~ENVCFG_LPE; + + csr_write(CSR_ENVCFG, task->thread.envcfg); +} + +void set_indir_lp_lock(struct task_struct *task) +{ + task->thread_info.user_cfi_state.ufcfi_locked = 1; +} /* * If size is 0, then to be compatible with regular stack we want it to be as big as * regular stack. Else PAGE_ALIGN it and return back @@ -369,3 +395,53 @@ int arch_lock_shadow_stack_status(struct task_struct *task, return 0; } + +int arch_get_indir_br_lp_status(struct task_struct *t, unsigned long __user *status) +{ + unsigned long fcfi_status = 0; + + if (!cpu_supports_indirect_br_lp_instr()) + return -EINVAL; + + /* indirect branch tracking is enabled on the task or not */ + fcfi_status |= (is_indir_lp_enabled(t) ? PR_INDIR_BR_LP_ENABLE : 0); + + return copy_to_user(status, &fcfi_status, sizeof(fcfi_status)) ? -EFAULT : 0; +} + +int arch_set_indir_br_lp_status(struct task_struct *t, unsigned long status) +{ + bool enable_indir_lp = false; + + if (!cpu_supports_indirect_br_lp_instr()) + return -EINVAL; + + /* indirect branch tracking is locked and further can't be modified by user */ + if (is_indir_lp_locked(t)) + return -EINVAL; + + /* Reject unknown flags */ + if (status & ~PR_INDIR_BR_LP_ENABLE) + return -EINVAL; + + enable_indir_lp = (status & PR_INDIR_BR_LP_ENABLE) ? true : false; + set_indir_lp_status(t, enable_indir_lp); + + return 0; +} + +int arch_lock_indir_br_lp_status(struct task_struct *task, + unsigned long arg) +{ + /* + * If indirect branch tracking is not supported or not enabled on task, + * nothing to lock here + */ + if (!cpu_supports_indirect_br_lp_instr() || + !is_indir_lp_enabled(task) || arg != 0) + return -EINVAL; + + set_indir_lp_lock(task); + + return 0; +} diff --git a/include/linux/cpu.h b/include/linux/cpu.h index 6a0a8f1c7c90..fb0c394430c6 100644 --- a/include/linux/cpu.h +++ b/include/linux/cpu.h @@ -204,4 +204,8 @@ static inline bool cpu_mitigations_auto_nosmt(void) } #endif +int arch_get_indir_br_lp_status(struct task_struct *t, unsigned long __user *status); +int arch_set_indir_br_lp_status(struct task_struct *t, unsigned long status); +int arch_lock_indir_br_lp_status(struct task_struct *t, unsigned long status); + #endif /* _LINUX_CPU_H_ */ diff --git a/include/uapi/linux/prctl.h b/include/uapi/linux/prctl.h index 5c6080680cb2..6cd90460cbad 100644 --- a/include/uapi/linux/prctl.h +++ b/include/uapi/linux/prctl.h @@ -353,4 +353,31 @@ struct prctl_mm_map { */ #define PR_LOCK_SHADOW_STACK_STATUS 76 +/* + * Get the current indirect branch tracking configuration for the current + * thread, this will be the value configured via PR_SET_INDIR_BR_LP_STATUS. + */ +#define PR_GET_INDIR_BR_LP_STATUS 77 + +/* + * Set the indirect branch tracking configuration. PR_INDIR_BR_LP_ENABLE will + * enable cpu feature for user thread, to track all indirect branches and ensure + * they land on arch defined landing pad instruction. + * x86 - If enabled, an indirect branch must land on `ENDBRANCH` instruction. + * arch64 - If enabled, an indirect branch must land on `BTI` instruction. + * riscv - If enabled, an indirect branch must land on `lpad` instruction. + * PR_INDIR_BR_LP_DISABLE will disable feature for user thread and indirect + * branches will no more be tracked by cpu to land on arch defined landing pad + * instruction. + */ +#define PR_SET_INDIR_BR_LP_STATUS 78 +# define PR_INDIR_BR_LP_ENABLE (1UL << 0) + +/* + * Prevent further changes to the specified indirect branch tracking + * configuration. All bits may be locked via this call, including + * undefined bits. + */ +#define PR_LOCK_INDIR_BR_LP_STATUS 79 + #endif /* _LINUX_PRCTL_H */ diff --git a/kernel/sys.c b/kernel/sys.c index cb366ff8703a..f347f3518d0b 100644 --- a/kernel/sys.c +++ b/kernel/sys.c @@ -2336,6 +2336,21 @@ int __weak arch_lock_shadow_stack_status(struct task_struct *t, unsigned long st return -EINVAL; } +int __weak arch_get_indir_br_lp_status(struct task_struct *t, unsigned long __user *status) +{ + return -EINVAL; +} + +int __weak arch_set_indir_br_lp_status(struct task_struct *t, unsigned long status) +{ + return -EINVAL; +} + +int __weak arch_lock_indir_br_lp_status(struct task_struct *t, unsigned long status) +{ + return -EINVAL; +} + #define PR_IO_FLUSHER (PF_MEMALLOC_NOIO | PF_LOCAL_THROTTLE) #ifdef CONFIG_ANON_VMA_NAME @@ -2811,6 +2826,21 @@ SYSCALL_DEFINE5(prctl, int, option, unsigned long, arg2, unsigned long, arg3, return -EINVAL; error = arch_lock_shadow_stack_status(me, arg2); break; + case PR_GET_INDIR_BR_LP_STATUS: + if (arg3 || arg4 || arg5) + return -EINVAL; + error = arch_get_indir_br_lp_status(me, (unsigned long __user *)arg2); + break; + case PR_SET_INDIR_BR_LP_STATUS: + if (arg3 || arg4 || arg5) + return -EINVAL; + error = arch_set_indir_br_lp_status(me, arg2); + break; + case PR_LOCK_INDIR_BR_LP_STATUS: + if (arg3 || arg4 || arg5) + return -EINVAL; + error = arch_lock_indir_br_lp_status(me, arg2); + break; default: trace_task_prctl_unknown(option, arg2, arg3, arg4, arg5); error = -EINVAL; From patchwork Wed Feb 5 01:22:01 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 13960394 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 67F88C02194 for ; Wed, 5 Feb 2025 01:22:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=vvf5U8P1ZUcySyE1vXvRk52WWtxnDT+sqWXeLjvDYqg=; b=sz125QnVVacraM Vd+bz2dmBYEm2Fi6XYy33HrSQ7qoqBVaIxsLrTEG1RSiVQu9hSNrTarHJLu1YPziCeaBXxueyqDHI yh0Dcd3nyEHUgk/ePYZO/bLAfXED564/47v5fsPT7g3A2AV60hiNrihqRTaCYMqDDRM04lGHgkzwp EKr9puYPD02Y4lCKva0LckjWzYukETq4nmXf8rNO64qithQKrrxhOORQUuVRuLo62vk2zurtOdyEU ajshVnAp/khYG+121mgVxHn5/73X0fN1UqT+Xq53vb9IhLACNDwYG+2U7pAGmNSueflj+Ef+DJ0fB H7VX9D5kJFm/I5ZCNBjA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tfU7Z-000000021bN-3zhy; Wed, 05 Feb 2025 01:22:29 +0000 Received: from casper.infradead.org ([2001:8b0:10b:1236::1]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tfU7X-000000021YH-2lz7 for linux-riscv@bombadil.infradead.org; Wed, 05 Feb 2025 01:22:27 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=Cc:To:In-Reply-To:References:Message-Id :Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date:From:Sender :Reply-To:Content-ID:Content-Description; bh=M49HWf8gzr6wWBf1Qtr4VOivQAEEQjfyuWgORGOVTSw=; b=I5fgoDt7tQXaJZDZclth0zdOpY af+6W08kllhe7hUvJxIcyO2wa/EajwjvNRjtIlhYcqIa2u1AwPVICJomu3FvZx7go5j1qI5BjxI7y SLdK7u4wpVfJ6t1alCWTypqHFQenBismq0ZeZHw+O4enMbI/MNtOsLeid5lhE8/lncJEcGXfUfw/b 2Ts9Aa4B7M7q/KSeUGkV8KTqO3oAqiC3q4D8tA0ip7asDeUlXCk01b7RnexvevLAbiJtdy8ozwClu 1XhP+AW9SuOM6p1bKQsIULLHNC/tmE0GGA+f5laQfR28DM5X0XMjsaQgQB1H6COU09rlE4iOw+ajX mlKaClWQ==; Received: from mail-pj1-x1031.google.com ([2607:f8b0:4864:20::1031]) by casper.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tfU7U-00000003c6A-0WkI for linux-riscv@lists.infradead.org; Wed, 05 Feb 2025 01:22:26 +0000 Received: by mail-pj1-x1031.google.com with SMTP id 98e67ed59e1d1-2f9da2a7004so883215a91.0 for ; Tue, 04 Feb 2025 17:22:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1738718541; x=1739323341; darn=lists.infradead.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=M49HWf8gzr6wWBf1Qtr4VOivQAEEQjfyuWgORGOVTSw=; b=jC8FkK43F+LPdU/9WAEB8glvSDemMhLcC6UlsRZPWrox1MTiP6DtSjR49k4yHnnxSP Pd0H/BB8rQ0UyngkEyeV5NuqCwkJtjRd+WV68UCSAa8cfrOQmwgBkKWQpYmemAOsPTmw ttxJCY+bHokYmGaS2gQMSAub62qFqGWjWg6+CABS3g9kWCIzKoKb+TEvRxKbElCZ/UU/ uYq03i+GoigYAC5Xfg3w1Yi0uH6lGOA6VSq9bgwbrZ8URpetuIZbNQugSAYo4tVMWgzK BFMaBM2XeYEVAl1FGxAuDSdVAORCBQz0Hq7u6rRpxdyvshknrIctV5Jc5R4lKc4FIyvp 6SaQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1738718541; x=1739323341; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=M49HWf8gzr6wWBf1Qtr4VOivQAEEQjfyuWgORGOVTSw=; b=kFrB24em9I3mLU3vcZ1oNqMMfB8Z0WmYwaOzn3qMY8+4tCW0Nc+U7vYJfoXzBaHLRG VbwKV7LZsTG4da1HvegQx6XduEATfmaoJesZnw5IwncYjI8L1agHmUW8xBRy6PVDgDG7 VSgBzvz58X3WYyyYiS+0bq1XZgSDwSKUGtGr3WbZeTjbsPvjTB3/ZU1CFnh44wz39x0U r5jXREI2cadjdF2BmOiC6yjqxMLzCWhlpYSgYsUV/vQLD3EFwTeoGAId5muWdXxeu+Xz 5lzBGdiwjUUJFl2P959ad8/0OhkBKREcR3v1fXGjlFyekgsbw4ThQ0q/GUJf3kyLt7UH RBlA== X-Forwarded-Encrypted: i=1; AJvYcCW91GBgHo0OeyfO4fd7sevWUoMV7jBEGzVkNJH5jtkzeXXewrG5fEHp+mqVgauuCghKNvlSv+2sd62BnQ==@lists.infradead.org X-Gm-Message-State: AOJu0YydgqGGipzgHUJaRZcgNuZpXAP/oO19o7B6yJ8GIgptf5PfzIzr HKdsvPiIsav2DXrmRcXfw7Bd4IiQ8iH1kW6GVF2JjrVyw3D4kPdyrLYI3LdGeybKgmlaZGfj65n 7 X-Gm-Gg: ASbGncv8LlE5wG0lRRbFM/qrbf89PanR0SMLtnmW49a/q4dGGWb4FK9m4XqeAFWIV8j toItq4CZnsTj281QQ/+acysPVcpAVaKsy4qI/v8SsJQvFpOWNcDaR7XkmLadmLZi7Bwabfih3JN V8l7FY9/HwWZS8fGwiuZGoDOD94gZPiBZr5VyMdQMA6EeWlWRCSt18kXgdgCJqs/DyuvKJ1tXb/ Zpun3c2eNgV0u5onYsdgjUAaY+9Rt1JGzt2WDfygmX3ea3Flik7ldIOL4XdOzgpdM5HGrYHhY+6 4ADcpSGkIDMaznZ3MB3eIJuw1Q== X-Google-Smtp-Source: AGHT+IFplfoY4kwYRUYkUapPyLUTmtCYI1kOBemc2Fu2DroKYmpICeBEsM6C9QAH02Mf3MaRp7pG+A== X-Received: by 2002:a05:6a00:3cc1:b0:72d:4d77:ccc with SMTP id d2e1a72fcca58-7303511ae5cmr1489432b3a.6.1738718540683; Tue, 04 Feb 2025 17:22:20 -0800 (PST) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-72fe69cec0fsm11457202b3a.137.2025.02.04.17.22.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 04 Feb 2025 17:22:20 -0800 (PST) From: Deepak Gupta Date: Tue, 04 Feb 2025 17:22:01 -0800 Subject: [PATCH v9 14/26] riscv/traps: Introduce software check exception MIME-Version: 1.0 Message-Id: <20250204-v5_user_cfi_series-v9-14-b37a49c5205c@rivosinc.com> References: <20250204-v5_user_cfi_series-v9-0-b37a49c5205c@rivosinc.com> In-Reply-To: <20250204-v5_user_cfi_series-v9-0-b37a49c5205c@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan , Jann Horn , Conor Dooley Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta X-Mailer: b4 0.14.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250205_012224_211271_1525004D X-CRM114-Status: GOOD ( 19.45 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org zicfiss / zicfilp introduces a new exception to priv isa `software check exception` with cause code = 18. This patch implements software check exception. Additionally it implements a cfi violation handler which checks for code in xtval. If xtval=2, it means that sw check exception happened because of an indirect branch not landing on 4 byte aligned PC or not landing on `lpad` instruction or label value embedded in `lpad` not matching label value setup in `x7`. If xtval=3, it means that sw check exception happened because of mismatch between link register (x1 or x5) and top of shadow stack (on execution of `sspopchk`). In case of cfi violation, SIGSEGV is raised with code=SEGV_CPERR. SEGV_CPERR was introduced by x86 shadow stack patches. Signed-off-by: Deepak Gupta --- arch/riscv/include/asm/asm-prototypes.h | 1 + arch/riscv/include/asm/entry-common.h | 2 ++ arch/riscv/kernel/entry.S | 3 +++ arch/riscv/kernel/traps.c | 43 +++++++++++++++++++++++++++++++++ 4 files changed, 49 insertions(+) diff --git a/arch/riscv/include/asm/asm-prototypes.h b/arch/riscv/include/asm/asm-prototypes.h index cd627ec289f1..5a27cefd7805 100644 --- a/arch/riscv/include/asm/asm-prototypes.h +++ b/arch/riscv/include/asm/asm-prototypes.h @@ -51,6 +51,7 @@ DECLARE_DO_ERROR_INFO(do_trap_ecall_u); DECLARE_DO_ERROR_INFO(do_trap_ecall_s); DECLARE_DO_ERROR_INFO(do_trap_ecall_m); DECLARE_DO_ERROR_INFO(do_trap_break); +DECLARE_DO_ERROR_INFO(do_trap_software_check); asmlinkage void handle_bad_stack(struct pt_regs *regs); asmlinkage void do_page_fault(struct pt_regs *regs); diff --git a/arch/riscv/include/asm/entry-common.h b/arch/riscv/include/asm/entry-common.h index b28ccc6cdeea..34ed149af5d1 100644 --- a/arch/riscv/include/asm/entry-common.h +++ b/arch/riscv/include/asm/entry-common.h @@ -40,4 +40,6 @@ static inline int handle_misaligned_store(struct pt_regs *regs) } #endif +bool handle_user_cfi_violation(struct pt_regs *regs); + #endif /* _ASM_RISCV_ENTRY_COMMON_H */ diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S index 00494b54ff4a..9c00cac3f6f2 100644 --- a/arch/riscv/kernel/entry.S +++ b/arch/riscv/kernel/entry.S @@ -472,6 +472,9 @@ SYM_DATA_START_LOCAL(excp_vect_table) RISCV_PTR do_page_fault /* load page fault */ RISCV_PTR do_trap_unknown RISCV_PTR do_page_fault /* store page fault */ + RISCV_PTR do_trap_unknown /* cause=16 */ + RISCV_PTR do_trap_unknown /* cause=17 */ + RISCV_PTR do_trap_software_check /* cause=18 is sw check exception */ SYM_DATA_END_LABEL(excp_vect_table, SYM_L_LOCAL, excp_vect_table_end) #ifndef CONFIG_MMU diff --git a/arch/riscv/kernel/traps.c b/arch/riscv/kernel/traps.c index 8ff8e8b36524..3f7709f4595a 100644 --- a/arch/riscv/kernel/traps.c +++ b/arch/riscv/kernel/traps.c @@ -354,6 +354,49 @@ void do_trap_ecall_u(struct pt_regs *regs) } +#define CFI_TVAL_FCFI_CODE 2 +#define CFI_TVAL_BCFI_CODE 3 +/* handle cfi violations */ +bool handle_user_cfi_violation(struct pt_regs *regs) +{ + bool ret = false; + unsigned long tval = csr_read(CSR_TVAL); + + if ((tval == CFI_TVAL_FCFI_CODE && cpu_supports_indirect_br_lp_instr()) || + (tval == CFI_TVAL_BCFI_CODE && cpu_supports_shadow_stack())) { + do_trap_error(regs, SIGSEGV, SEGV_CPERR, regs->epc, + "Oops - control flow violation"); + ret = true; + } + + return ret; +} + +/* + * software check exception is defined with risc-v cfi spec. Software check + * exception is raised when:- + * a) An indirect branch doesn't land on 4 byte aligned PC or `lpad` + * instruction or `label` value programmed in `lpad` instr doesn't + * match with value setup in `x7`. reported code in `xtval` is 2. + * b) `sspopchk` instruction finds a mismatch between top of shadow stack (ssp) + * and x1/x5. reported code in `xtval` is 3. + */ +asmlinkage __visible __trap_section void do_trap_software_check(struct pt_regs *regs) +{ + if (user_mode(regs)) { + irqentry_enter_from_user_mode(regs); + + /* not a cfi violation, then merge into flow of unknown trap handler */ + if (!handle_user_cfi_violation(regs)) + do_trap_unknown(regs); + + irqentry_exit_to_user_mode(regs); + } else { + /* sw check exception coming from kernel is a bug in kernel */ + die(regs, "Kernel BUG"); + } +} + #ifdef CONFIG_MMU asmlinkage __visible noinstr void do_page_fault(struct pt_regs *regs) { From patchwork Wed Feb 5 01:22:02 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 13960439 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C9FDEC0219D for ; Wed, 5 Feb 2025 02:31:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=4zqeylQw6K1XmeN+KmrsDIr9DHpPuxliJ1VDOvHF6kw=; b=uWLBVN/GYr0QQg XlQu75ilEEFs+/Ci6O+CvGaRE5SLV10kMBn2XdxiOoDon3rLFsOYrJKdKvEHO4C6ks0BGDT4SCRDi X7iMGyLALjvWEvNU7U5W6sdzntip/vcGsBObUD9PseROZlkS0aCLW6n25+zB5CJsB2jD4RP8rVznN uBKjb8smFo/WG5HXx/WELtpcBtMvQtsBft/oU64kI2J2mHC4g6F8X1YTvlIwdpcFc7eik1dVAoSKX mNJX3fkpoljXosgm4plKfJFNu2I4ar0nB0Ju7tEmpByRRlMS/T6+4gePn+FKhrLCWOxkFNDZjeFQW 01/5HAsqA/yfBbDnAb3w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tfVBz-000000028W8-2jSm; Wed, 05 Feb 2025 02:31:07 +0000 Received: from casper.infradead.org ([2001:8b0:10b:1236::1]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tfU7Z-000000021a8-1kod for linux-riscv@bombadil.infradead.org; Wed, 05 Feb 2025 01:22:29 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=Cc:To:In-Reply-To:References:Message-Id :Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date:From:Sender :Reply-To:Content-ID:Content-Description; bh=N78rd5bu5L3Nb7UCylb6NhXzPkib+ej1wIZfC16ALRg=; b=bZ8wP4DuDfgrnXINu1xnZXPlLJ 7E37EJqmeKAzWletDGuabR2WWG4//EtBYWuflR//7N8ZrqTCtXtzy2n1MRRHXIz6ESULZKQxVuHzl ym7YmXQK5r6d9FeyjLuEBuRQgTAyxbVlCoDo78OH/F5rjSI326Z5k2Lge1z2dqrCV79G842q9ZGBg fAQLo/8Ig7JUKSFfdtVGlQetHoBeccbuI8KulSJbn1sj2dNUmYjcQYioAhj2zOuJBv1kebmonK+B5 ZyCaCeaeLy9ZTavfRpzaa2KFKzD9b99EEXmzTdl7Nvtr4sxIgm8lYw3VS+hHWxjNZ9gdALXleMOp5 sMtDYwbQ==; Received: from mail-pj1-x1029.google.com ([2607:f8b0:4864:20::1029]) by casper.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tfU7W-00000003c6a-09Iv for linux-riscv@lists.infradead.org; Wed, 05 Feb 2025 01:22:28 +0000 Received: by mail-pj1-x1029.google.com with SMTP id 98e67ed59e1d1-2f9c3124f31so1983545a91.0 for ; Tue, 04 Feb 2025 17:22:24 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1738718542; x=1739323342; darn=lists.infradead.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=N78rd5bu5L3Nb7UCylb6NhXzPkib+ej1wIZfC16ALRg=; b=ojR2YON4xd4nJ1Ff8lRI/vq/VausyD9sMixB14/yMqP1pugDPXxbynT5PJdbXk/8zV 92TGSI/dscerLtHGAUeYeQ13ijlCqh6kcCuB8Hxlffh2OQqOpiFyjbX6G+BTdqf5lBAN QAnU8OoCPfUhb2+Jo+aB1l/jyJ24CJFvw1M5/FMgq0S4fbbJ3hETy68hx4ZYx6Mpw+dp 5DIE9knh3wdtpfJER6Op6zkh3s5wI0AQIla29uCzn9YQdNa28MqMavqes1xkdGw8Rf1m eDPXWsE0a3uM9/5unl7x9P/M1NqfmJ5oeSjJZ8/578BtJi39wK3RQaII+4QphflFjCpl iMyw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1738718542; x=1739323342; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=N78rd5bu5L3Nb7UCylb6NhXzPkib+ej1wIZfC16ALRg=; b=pnEDqL8971FP7iMOIMTitMrD+v1/nU80ZcBcuYMpAkJzRC57HX8n9I9YCDasrgaw7B peJjBPho6tK6PpiLY5NnM3YiaKftCoAyC00AuIHDG1TjjJZ7aHQlWAeTqMIa0goJYhJk NP+rbCtvoOP1pPGvZ+Ys8kmiUo09qnfDn5IpQh3vnyeXQ9wXMs28hRb+NasRHdo1+1Lf ARktxkY1314KepAx9rwlYdHCXrHnskPwKnqWZIBbSMYiYXeReAyf2staGkUr0o641ZA5 ALz701BYqjbIelmf6qjUFxdtQcOh0dkTBPu3KL1qV+nBa5hpdGJozt5q2ere9gYJJw0i vkrg== X-Forwarded-Encrypted: i=1; AJvYcCWgHrXfbUEt4vhEaFevIpUBptj/zwePVygi/kAkWK6BV6hk0r9e+/GqixdZu1RlR0UT3XqvjmGTP5bBww==@lists.infradead.org X-Gm-Message-State: AOJu0YzGhJGfYloCS9Yby1lEe3u1gozL8e4egbKYGXrm3FojeJQU2xiM qSu3JVWLGalOB89cYE+ROK8NtQxqDTc8d8gz3+q7gaI9F9qe9Crt1VrHL4D+cZ6I3TbDfHurro4 s X-Gm-Gg: ASbGncvicdsNd/9E8nJv41dbq0QdfJtF+kquATagTrDca3nUL96RHVcFK/NODIkMl9u CGwhW8JVi4NYBkNTfqjQaeoJutbj3R53beispljg1y2Rj8+CTWpfRvEsM7uyPM2U7jrIVMCNCWO Ap/4bv+ufFbKqrkLYvAwBCYcbxGTAmv+5Do8IpGvi0JD0tmsRGCd4VQVqXyH69HYoFZ9WhtD+Us ltsye/EmzqK7+I87NMke0TqzRYmrloDJIFNiU1cNHAVmufZxfmFdKrQ1agQfrLLPyUu7gat+LIB 6Zr84IZf1+ornkbnJBaxxR99Dg== X-Google-Smtp-Source: AGHT+IFP/nZiHgN8IdOqdmoR6h7NcsY1CSiQrUwXf/VaRJ07hdJ31km67MYlbRhpJdCkwehTOyokKQ== X-Received: by 2002:a05:6a00:3a1d:b0:725:f1b1:cb9f with SMTP id d2e1a72fcca58-7303520e7f3mr1721528b3a.20.1738718542562; Tue, 04 Feb 2025 17:22:22 -0800 (PST) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-72fe69cec0fsm11457202b3a.137.2025.02.04.17.22.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 04 Feb 2025 17:22:22 -0800 (PST) From: Deepak Gupta Date: Tue, 04 Feb 2025 17:22:02 -0800 Subject: [PATCH v9 15/26] riscv: signal: abstract header saving for setup_sigcontext MIME-Version: 1.0 Message-Id: <20250204-v5_user_cfi_series-v9-15-b37a49c5205c@rivosinc.com> References: <20250204-v5_user_cfi_series-v9-0-b37a49c5205c@rivosinc.com> In-Reply-To: <20250204-v5_user_cfi_series-v9-0-b37a49c5205c@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan , Jann Horn , Conor Dooley Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com X-Mailer: b4 0.14.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250205_012226_419198_468AD3D9 X-CRM114-Status: GOOD ( 22.75 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org From: Andy Chiu The function save_v_state() served two purposes. First, it saved extension context into the signal stack. Then, it constructed the extension header if there was no fault. The second part is independent of the extension itself. As a result, we can pull that part out, so future extensions may reuse it. This patch adds arch_ext_list and makes setup_sigcontext() go through all possible extensions' save() callback. The callback returns a positive value indicating the size of the successfully saved extension. Then the kernel proceeds to construct the header for that extension. The kernel skips an extension if it does not exist, or if the saving fails for some reasons. The error code is propagated out on the later case. This patch does not introduce any functional changes. Signed-off-by: Andy Chiu --- arch/riscv/include/asm/vector.h | 3 ++ arch/riscv/kernel/signal.c | 62 +++++++++++++++++++++++++++-------------- 2 files changed, 44 insertions(+), 21 deletions(-) diff --git a/arch/riscv/include/asm/vector.h b/arch/riscv/include/asm/vector.h index e8a83f55be2b..05390538ea8a 100644 --- a/arch/riscv/include/asm/vector.h +++ b/arch/riscv/include/asm/vector.h @@ -407,6 +407,9 @@ static inline bool riscv_v_vstate_ctrl_user_allowed(void) { return false; } #define riscv_v_thread_free(tsk) do {} while (0) #define riscv_v_setup_ctx_cache() do {} while (0) #define riscv_v_thread_alloc(tsk) do {} while (0) +#define get_cpu_vector_context() do {} while (0) +#define put_cpu_vector_context() do {} while (0) +#define riscv_v_vstate_set_restore(task, regs) do {} while (0) #endif /* CONFIG_RISCV_ISA_V */ diff --git a/arch/riscv/kernel/signal.c b/arch/riscv/kernel/signal.c index 94e905eea1de..80c70dccf09f 100644 --- a/arch/riscv/kernel/signal.c +++ b/arch/riscv/kernel/signal.c @@ -68,18 +68,19 @@ static long save_fp_state(struct pt_regs *regs, #define restore_fp_state(task, regs) (0) #endif -#ifdef CONFIG_RISCV_ISA_V - -static long save_v_state(struct pt_regs *regs, void __user **sc_vec) +static long save_v_state(struct pt_regs *regs, void __user *sc_vec) { - struct __riscv_ctx_hdr __user *hdr; struct __sc_riscv_v_state __user *state; void __user *datap; long err; - hdr = *sc_vec; - /* Place state to the user's signal context space after the hdr */ - state = (struct __sc_riscv_v_state __user *)(hdr + 1); + if (!IS_ENABLED(CONFIG_RISCV_ISA_V) || + !((has_vector() || has_xtheadvector()) && + riscv_v_vstate_query(regs))) + return 0; + + /* Place state to the user's signal context spac */ + state = (struct __sc_riscv_v_state __user *)sc_vec; /* Point datap right after the end of __sc_riscv_v_state */ datap = state + 1; @@ -97,15 +98,11 @@ static long save_v_state(struct pt_regs *regs, void __user **sc_vec) err |= __put_user((__force void *)datap, &state->v_state.datap); /* Copy the whole vector content to user space datap. */ err |= __copy_to_user(datap, current->thread.vstate.datap, riscv_v_vsize); - /* Copy magic to the user space after saving all vector conetext */ - err |= __put_user(RISCV_V_MAGIC, &hdr->magic); - err |= __put_user(riscv_v_sc_size, &hdr->size); if (unlikely(err)) - return err; + return -EFAULT; - /* Only progress the sv_vec if everything has done successfully */ - *sc_vec += riscv_v_sc_size; - return 0; + /* Only return the size if everything has done successfully */ + return riscv_v_sc_size; } /* @@ -142,10 +139,20 @@ static long __restore_v_state(struct pt_regs *regs, void __user *sc_vec) */ return copy_from_user(current->thread.vstate.datap, datap, riscv_v_vsize); } -#else -#define save_v_state(task, regs) (0) -#define __restore_v_state(task, regs) (0) -#endif + +struct arch_ext_priv { + __u32 magic; + long (*save)(struct pt_regs *regs, void __user *sc_vec); +}; + +struct arch_ext_priv arch_ext_list[] = { + { + .magic = RISCV_V_MAGIC, + .save = &save_v_state, + }, +}; + +const size_t nr_arch_exts = ARRAY_SIZE(arch_ext_list); static long restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc) @@ -276,7 +283,8 @@ static long setup_sigcontext(struct rt_sigframe __user *frame, { struct sigcontext __user *sc = &frame->uc.uc_mcontext; struct __riscv_ctx_hdr __user *sc_ext_ptr = &sc->sc_extdesc.hdr; - long err; + struct arch_ext_priv *arch_ext; + long err, i, ext_size; /* sc_regs is structured the same as the start of pt_regs */ err = __copy_to_user(&sc->sc_regs, regs, sizeof(sc->sc_regs)); @@ -284,8 +292,20 @@ static long setup_sigcontext(struct rt_sigframe __user *frame, if (has_fpu()) err |= save_fp_state(regs, &sc->sc_fpregs); /* Save the vector state. */ - if ((has_vector() || has_xtheadvector()) && riscv_v_vstate_query(regs)) - err |= save_v_state(regs, (void __user **)&sc_ext_ptr); + for (i = 0; i < nr_arch_exts; i++) { + arch_ext = &arch_ext_list[i]; + if (!arch_ext->save) + continue; + + ext_size = arch_ext->save(regs, sc_ext_ptr + 1); + if (ext_size <= 0) { + err |= ext_size; + } else { + err |= __put_user(arch_ext->magic, &sc_ext_ptr->magic); + err |= __put_user(ext_size, &sc_ext_ptr->size); + sc_ext_ptr = (void *)sc_ext_ptr + ext_size; + } + } /* Write zero to fp-reserved space and check it on restore_sigcontext */ err |= __put_user(0, &sc->sc_extdesc.reserved); /* And put END __riscv_ctx_hdr at the end. */ From patchwork Wed Feb 5 01:22:03 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 13960442 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7C3D4C021A0 for ; Wed, 5 Feb 2025 02:31:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=PVHDhfJzN+BDHx5jRDst+9YI3wRYIBBBDKfIAkjYYOI=; b=y8+WYK6GM2s5KE wqe26vnG0Quw9+3WtcxNzeHNDAZBpyAzBdpjhadFjIMnScbji2XUkMz9ZKLQXfu8wNBHPo+TmCQhW arrrOjmGGyLyzO1PpNPENtz8W42JnVDh2eYOM5H8+63YbIVKiMvHKbAOvcA61zbLQ2jGuSJfPmuvZ WnhVpIYWadPTZLnzHLq0slnRtLK+o4NlJJ3Vm0VpFqd3B6Qa5TXZZ8MJ6vZBL+5FW2ArzYr3OVJ59 B75sEQkQfcoLoEluthzP1bZh7m1CsLbchzPxekUU7dp9ah4H/DT5XdkUW9tbG/8eLQc0dCp4dyUAu ZJ4g3xarh/rr4DW7dXSA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tfVC0-000000028XC-3x1f; Wed, 05 Feb 2025 02:31:08 +0000 Received: from casper.infradead.org ([2001:8b0:10b:1236::1]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tfU7b-000000021cV-2KBM for linux-riscv@bombadil.infradead.org; Wed, 05 Feb 2025 01:22:31 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=Cc:To:In-Reply-To:References:Message-Id :Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date:From:Sender :Reply-To:Content-ID:Content-Description; bh=FZizf8oZeAex4CEwHeMnGWZudkjFQvNzoIsL7CfIy1g=; b=X26Yuj1anJK+9oJ4m7dN+nuF4w 4+UWhcFWdSrK2uX+XmYvxPzjpSd1TYakh9e7nrbK4Fr5AKaBBHGUVOSOrfcFg1mbPAQLcCj6RLpmT OYP/1UkbHEI5AVqsJfU0Tx2sP7gVPJHICaccoWDse49Up8rwyS+YQrGggD+Bmt1ki3n3bVtBX+V6J mT8d4RJc5Zl+a3RX2QyZYtWibkSYxlrvokjP6kU1L4g3dWw/0eO8ZnV0Zl0qHljEk8snSMwebumlC 2tDTJlIkC6oA7NCve1H5Ft3lDvWTVedxsPtVVLdBW2u/xMizrUHjWoIhqcP7Oam4IRS7eHIa+j8G/ 6+p+kPEg==; Received: from mail-pl1-x629.google.com ([2607:f8b0:4864:20::629]) by casper.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tfU7Y-00000003c7R-0Nhg for linux-riscv@lists.infradead.org; Wed, 05 Feb 2025 01:22:30 +0000 Received: by mail-pl1-x629.google.com with SMTP id d9443c01a7336-21ddab8800bso88859525ad.3 for ; Tue, 04 Feb 2025 17:22:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1738718545; x=1739323345; darn=lists.infradead.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=FZizf8oZeAex4CEwHeMnGWZudkjFQvNzoIsL7CfIy1g=; b=MYgVK64N94djHqeel4qYSvWlJFDvSs5bh+Wq7tywR5pPYMWCbo3jtvULs8urtMBqdU ehRMV8YZCf0CioNXJLD/kGry/HaC698orr9bJ5kKouNlxCSuuTsU1Vj7nGCVtjmBrA/I JsJKrYtBbdM4oyZGxipshbW820AtfwVurOreJjnFQXeRyOy0ny53fEfrgVAZ+WMJAL9n IU8mJfx3Szuwn5TrqN5GA86VDDN2ePzDf07eiaj4L6IlxSUz4KIr8FhkHPsB40hVcdKA 8bTteA4T9IHmIqe+H+LT8IxU3GPR91ZxKucvQmyfpE+RHw7/aosj81MeZdG21NisbiUI rehQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1738718545; x=1739323345; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=FZizf8oZeAex4CEwHeMnGWZudkjFQvNzoIsL7CfIy1g=; b=SNO9of77g6bjhy+zsoP7Md++YSUPOcbgaGsssccE++Wr7sVm/pDnLzfBPYrvlK3wPH ZLgRErHkwRb9lgtkFjzqy//GbDBFWvZJP16H/d2Yh+ZnU9WCAMfIs8coVXupIwHCzPHB 5znKelWBfHD8/nP+/VGoEw5C9FR3l+iWVVDWK/QIVQCSdREactM/ZgOIGVu90XFiopZ1 DDQkwI8gRMcH6fum32J8diQ0Ey8Z81bBwMrTiuLauNKt2HyOS7YwM5uMtqtdK/kcqwlE UyeEzU1mZA2SXXOSGtgQYPyYT5/CLsimp10nbyUu9prYYs/0vm+rSxBEr2MgmClV3hKy piyw== X-Forwarded-Encrypted: i=1; AJvYcCWsS+fpWr5Xc/83xslGjzBx0Nc6kTpUhdYQvkcr1j78B3zxU+WSMkjoC/LaXqrE2h4z7M5ik9KDlD0HDg==@lists.infradead.org X-Gm-Message-State: AOJu0YznT/S6gYk+50KtnWiKXjciJdWTuHisjAJDp9OMoivrrZ5fztIi z3AECAgg6LvikG/r3bp0iTY1hzoeIBxVq/3hFCUc9l9P+bWhDh8dAqpH8TmezzkYdATchY5ILzL Y X-Gm-Gg: ASbGnctGYsQN1YsyfJi/c1UYFZMsxJkPCJCFSIRsp1yZYs8V4OjEjcyL/JUVy6oj5ir fHok6/xpf1fo60HQIpUYiNW2C3KwgzoZqdjYlFrYV91eCvKikkLb72Cb/o9GWeuc5PW34iRB/rO dVet70miWCeeNcFH9RutfN/xDLY66n+VvqTNRfzN9YBb6njFap5zibAp05KJ11hN8eJXTfTtdEB hJwy3bab9TFLynGj4Kfi0G1oXKDv3QAAN4nVpJ2pl79dQQ68yHWW8YJPzxeh2E172HoCFPl26F4 Obkn7ffQLAyPMOQTSpITaRfsQw== X-Google-Smtp-Source: AGHT+IEqJS41+LJt7inAR5iPhE1y82el2DHhoGjAbkJX4IwMn8QFNmHGfzX0UCg4AcbCiAYuTtk5yw== X-Received: by 2002:a05:6a21:350d:b0:1ed:8cd8:77fb with SMTP id adf61e73a8af0-1ede8836074mr1402463637.16.1738718544490; Tue, 04 Feb 2025 17:22:24 -0800 (PST) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-72fe69cec0fsm11457202b3a.137.2025.02.04.17.22.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 04 Feb 2025 17:22:24 -0800 (PST) From: Deepak Gupta Date: Tue, 04 Feb 2025 17:22:03 -0800 Subject: [PATCH v9 16/26] riscv/signal: save and restore of shadow stack for signal MIME-Version: 1.0 Message-Id: <20250204-v5_user_cfi_series-v9-16-b37a49c5205c@rivosinc.com> References: <20250204-v5_user_cfi_series-v9-0-b37a49c5205c@rivosinc.com> In-Reply-To: <20250204-v5_user_cfi_series-v9-0-b37a49c5205c@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan , Jann Horn , Conor Dooley Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta , Andy Chiu X-Mailer: b4 0.14.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250205_012228_148332_CB2F0D69 X-CRM114-Status: GOOD ( 24.79 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Save shadow stack pointer in sigcontext structure while delivering signal. Restore shadow stack pointer from sigcontext on sigreturn. As part of save operation, kernel uses `ssamoswap` to save snapshot of current shadow stack on shadow stack itself (can be called as a save token). During restore on sigreturn, kernel retrieves token from top of shadow stack and validates it. This allows that user mode can't arbitrary pivot to any shadow stack address without having a token and thus provide strong security assurance between signaly delivery and sigreturn window. Use ABI compatible way of saving/restoring shadow stack pointer into signal stack. This follows what Vector extension, where extra registers are placed in a form of extension header + extension body in the stack. The extension header indicates the size of the extra architectural states plus the size of header itself, and a magic identifier of the extension. Then, the extensions body contains the new architectural states in the form defined by uapi. Signed-off-by: Andy Chiu Signed-off-by: Deepak Gupta --- arch/riscv/include/asm/usercfi.h | 10 ++++ arch/riscv/include/uapi/asm/ptrace.h | 4 ++ arch/riscv/include/uapi/asm/sigcontext.h | 1 + arch/riscv/kernel/signal.c | 80 ++++++++++++++++++++++++++++++++ arch/riscv/kernel/usercfi.c | 56 ++++++++++++++++++++++ 5 files changed, 151 insertions(+) diff --git a/arch/riscv/include/asm/usercfi.h b/arch/riscv/include/asm/usercfi.h index a8cec7c14d1d..361f59edbdef 100644 --- a/arch/riscv/include/asm/usercfi.h +++ b/arch/riscv/include/asm/usercfi.h @@ -8,6 +8,7 @@ #ifndef __ASSEMBLY__ #include #include +#include struct task_struct; struct kernel_clone_args; @@ -35,6 +36,9 @@ bool is_shstk_locked(struct task_struct *task); bool is_shstk_allocated(struct task_struct *task); void set_shstk_lock(struct task_struct *task); void set_shstk_status(struct task_struct *task, bool enable); +unsigned long get_active_shstk(struct task_struct *task); +int restore_user_shstk(struct task_struct *tsk, unsigned long shstk_ptr); +int save_user_shstk(struct task_struct *tsk, unsigned long *saved_shstk_ptr); bool is_indir_lp_enabled(struct task_struct *task); bool is_indir_lp_locked(struct task_struct *task); void set_indir_lp_status(struct task_struct *task, bool enable); @@ -72,6 +76,12 @@ void set_indir_lp_lock(struct task_struct *task); #define set_indir_lp_lock(task) +#define restore_user_shstk(tsk, shstk_ptr) -EINVAL + +#define save_user_shstk(tsk, saved_shstk_ptr) -EINVAL + +#define get_active_shstk(task) 0UL + #endif /* CONFIG_RISCV_USER_CFI */ #endif /* __ASSEMBLY__ */ diff --git a/arch/riscv/include/uapi/asm/ptrace.h b/arch/riscv/include/uapi/asm/ptrace.h index a38268b19c3d..659ea3af5680 100644 --- a/arch/riscv/include/uapi/asm/ptrace.h +++ b/arch/riscv/include/uapi/asm/ptrace.h @@ -127,6 +127,10 @@ struct __riscv_v_regset_state { */ #define RISCV_MAX_VLENB (8192) +struct __sc_riscv_cfi_state { + unsigned long ss_ptr; /* shadow stack pointer */ +}; + #endif /* __ASSEMBLY__ */ #endif /* _UAPI_ASM_RISCV_PTRACE_H */ diff --git a/arch/riscv/include/uapi/asm/sigcontext.h b/arch/riscv/include/uapi/asm/sigcontext.h index cd4f175dc837..f37e4beffe03 100644 --- a/arch/riscv/include/uapi/asm/sigcontext.h +++ b/arch/riscv/include/uapi/asm/sigcontext.h @@ -10,6 +10,7 @@ /* The Magic number for signal context frame header. */ #define RISCV_V_MAGIC 0x53465457 +#define RISCV_ZICFISS_MAGIC 0x9487 #define END_MAGIC 0x0 /* The size of END signal context header. */ diff --git a/arch/riscv/kernel/signal.c b/arch/riscv/kernel/signal.c index 80c70dccf09f..a7472a6fcdca 100644 --- a/arch/riscv/kernel/signal.c +++ b/arch/riscv/kernel/signal.c @@ -22,11 +22,13 @@ #include #include #include +#include unsigned long signal_minsigstksz __ro_after_init; extern u32 __user_rt_sigreturn[2]; static size_t riscv_v_sc_size __ro_after_init; +static size_t riscv_zicfiss_sc_size __ro_after_init; #define DEBUG_SIG 0 @@ -140,6 +142,62 @@ static long __restore_v_state(struct pt_regs *regs, void __user *sc_vec) return copy_from_user(current->thread.vstate.datap, datap, riscv_v_vsize); } +static long save_cfiss_state(struct pt_regs *regs, void __user *sc_cfi) +{ + struct __sc_riscv_cfi_state __user *state = sc_cfi; + unsigned long ss_ptr = 0; + long err = 0; + + if (!IS_ENABLED(CONFIG_RISCV_USER_CFI) || !is_shstk_enabled(current)) + return 0; + + /* + * Save a pointer to shadow stack itself on shadow stack as a form of token. + * A token on shadow gives following properties + * - Safe save and restore for shadow stack switching. Any save of shadow stack + * must have had saved a token on shadow stack. Similarly any restore of shadow + * stack must check the token before restore. Since writing to shadow stack with + * address of shadow stack itself is not easily allowed. A restore without a save + * is quite difficult for an attacker to perform. + * - A natural break. A token in shadow stack provides a natural break in shadow stack + * So a single linear range can be bucketed into different shadow stack segments. Any + * sspopchk will detect the condition and fault to kernel as sw check exception. + */ + err |= save_user_shstk(current, &ss_ptr); + err |= __put_user(ss_ptr, &state->ss_ptr); + if (unlikely(err)) + return -EFAULT; + + return riscv_zicfiss_sc_size; +} + +static long __restore_cfiss_state(struct pt_regs *regs, void __user *sc_cfi) +{ + struct __sc_riscv_cfi_state __user *state = sc_cfi; + unsigned long ss_ptr = 0; + long err; + + /* + * Restore shadow stack as a form of token stored on shadow stack itself as a safe + * way to restore. + * A token on shadow gives following properties + * - Safe save and restore for shadow stack switching. Any save of shadow stack + * must have had saved a token on shadow stack. Similarly any restore of shadow + * stack must check the token before restore. Since writing to shadow stack with + * address of shadow stack itself is not easily allowed. A restore without a save + * is quite difficult for an attacker to perform. + * - A natural break. A token in shadow stack provides a natural break in shadow stack + * So a single linear range can be bucketed into different shadow stack segments. + * sspopchk will detect the condition and fault to kernel as sw check exception. + */ + err = __copy_from_user(&ss_ptr, &state->ss_ptr, sizeof(unsigned long)); + + if (unlikely(err)) + return err; + + return restore_user_shstk(current, ss_ptr); +} + struct arch_ext_priv { __u32 magic; long (*save)(struct pt_regs *regs, void __user *sc_vec); @@ -150,6 +208,10 @@ struct arch_ext_priv arch_ext_list[] = { .magic = RISCV_V_MAGIC, .save = &save_v_state, }, + { + .magic = RISCV_ZICFISS_MAGIC, + .save = &save_cfiss_state, + }, }; const size_t nr_arch_exts = ARRAY_SIZE(arch_ext_list); @@ -202,6 +264,12 @@ static long restore_sigcontext(struct pt_regs *regs, err = __restore_v_state(regs, sc_ext_ptr); break; + case RISCV_ZICFISS_MAGIC: + if (!is_shstk_enabled(current) || size != riscv_zicfiss_sc_size) + return -EINVAL; + + err = __restore_cfiss_state(regs, sc_ext_ptr); + break; default: return -EINVAL; } @@ -222,6 +290,10 @@ static size_t get_rt_frame_size(bool cal_all) if (cal_all || riscv_v_vstate_query(task_pt_regs(current))) total_context_size += riscv_v_sc_size; } + + if (is_shstk_enabled(current)) + total_context_size += riscv_zicfiss_sc_size; + /* * Preserved a __riscv_ctx_hdr for END signal context header if an * extension uses __riscv_extra_ext_header @@ -365,6 +437,11 @@ static int setup_rt_frame(struct ksignal *ksig, sigset_t *set, #ifdef CONFIG_MMU regs->ra = (unsigned long)VDSO_SYMBOL( current->mm->context.vdso, rt_sigreturn); + + /* if bcfi is enabled x1 (ra) and x5 (t0) must match. not sure if we need this? */ + if (is_shstk_enabled(current)) + regs->t0 = regs->ra; + #else /* * For the nommu case we don't have a VDSO. Instead we push two @@ -493,6 +570,9 @@ void __init init_rt_signal_env(void) { riscv_v_sc_size = sizeof(struct __riscv_ctx_hdr) + sizeof(struct __sc_riscv_v_state) + riscv_v_vsize; + + riscv_zicfiss_sc_size = sizeof(struct __riscv_ctx_hdr) + + sizeof(struct __sc_riscv_cfi_state); /* * Determine the stack space required for guaranteed signal delivery. * The signal_minsigstksz will be populated into the AT_MINSIGSTKSZ entry diff --git a/arch/riscv/kernel/usercfi.c b/arch/riscv/kernel/usercfi.c index 3a66f149a4ef..6e561256bfaf 100644 --- a/arch/riscv/kernel/usercfi.c +++ b/arch/riscv/kernel/usercfi.c @@ -52,6 +52,11 @@ void set_active_shstk(struct task_struct *task, unsigned long shstk_addr) task->thread_info.user_cfi_state.user_shdw_stk = shstk_addr; } +unsigned long get_active_shstk(struct task_struct *task) +{ + return task->thread_info.user_cfi_state.user_shdw_stk; +} + void set_shstk_status(struct task_struct *task, bool enable) { task->thread_info.user_cfi_state.ubcfi_en = enable ? 1 : 0; @@ -164,6 +169,57 @@ static int create_rstor_token(unsigned long ssp, unsigned long *token_addr) return 0; } +/* + * Save user shadow stack pointer on shadow stack itself and return pointer to saved location + * returns -EFAULT if operation was unsuccessful + */ +int save_user_shstk(struct task_struct *tsk, unsigned long *saved_shstk_ptr) +{ + unsigned long ss_ptr = 0; + unsigned long token_loc = 0; + int ret = 0; + + if (saved_shstk_ptr == NULL) + return -EINVAL; + + ss_ptr = get_active_shstk(tsk); + ret = create_rstor_token(ss_ptr, &token_loc); + + if (!ret) { + *saved_shstk_ptr = token_loc; + set_active_shstk(tsk, token_loc); + } + + return ret; +} + +/* + * Restores user shadow stack pointer from token on shadow stack for task `tsk` + * returns -EFAULT if operation was unsuccessful + */ +int restore_user_shstk(struct task_struct *tsk, unsigned long shstk_ptr) +{ + unsigned long token = 0; + + token = amo_user_shstk((unsigned long __user *)shstk_ptr, 0); + + if (token == -1) + return -EFAULT; + + /* invalid token, return EINVAL */ + if ((token - shstk_ptr) != SHSTK_ENTRY_SIZE) { + pr_info_ratelimited( + "%s[%d]: bad restore token in %s: pc=%p sp=%p, token=%p, shstk_ptr=%p\n", + tsk->comm, task_pid_nr(tsk), __func__, (void *)(task_pt_regs(tsk)->epc), + (void *)(task_pt_regs(tsk)->sp), (void *)token, (void *)shstk_ptr); + return -EINVAL; + } + + /* all checks passed, set active shstk and return success */ + set_active_shstk(tsk, token); + return 0; +} + static unsigned long allocate_shadow_stack(unsigned long addr, unsigned long size, unsigned long token_offset, bool set_tok) { From patchwork Wed Feb 5 01:22:04 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 13960440 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5AF03C0219E for ; Wed, 5 Feb 2025 02:31:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=74LSszYMAoAE1VDF1AyNhPd2u+JFsMbdW+6TQlA6WKw=; b=QclzMcfJITSgIW Z6ehjaFBhLZ89NsHddOfhj6tWcKkBgisr8vkuXkKs9jkSgR8llsNqQa0T07HZ55G2/HziOHZ7nAg1 JeRhgyc1iPYvvM9stRqKuud+pmw+QUvBdoIUnvEU2Lp2LtPbkUthBbYCFrJ7jJ1r/iCBE3Xq/9KYh b289iSsCy+2kj4RpX4DpmneSSyEAhhhtcuRnRG/vwZktQfwyH2DkLoLxMyShpZw/0faUabPc1vqGv jcVB+xXZAIojeETBP7g8mqZ4e7TseiGsFEK8q5YaF3Xr79Ja8ojDqq7pf7urZAmnUWHN1/+IokS+q NIehBeAvQGjrcvVa1gOQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tfVC3-000000028ZM-2GBS; Wed, 05 Feb 2025 02:31:11 +0000 Received: from desiato.infradead.org ([2001:8b0:10b:1:d65d:64ff:fe57:4e05]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tfU7i-000000021j7-1H9B for linux-riscv@bombadil.infradead.org; Wed, 05 Feb 2025 01:22:38 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Cc:To:In-Reply-To:References: Message-Id:Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date: From:Sender:Reply-To:Content-ID:Content-Description; bh=hU6IAlGSwKWKw5iWDrFBqBdwaJZ69/+Cs7+/DXu3do8=; b=I7CFsZeJ/DPPmwXWHeFn3+9ie6 4NFUHAJlo/VLX4RvTyRkt01QNkfwWiBoO3UceIB7lqX+Z3GPmw3gMS0owmgdFLnzmC2vwPJsY6p7/ LI9DjP3IGDtN4ucB0o1JOk0EI15RqOPK3fg5MvppkRvDkEicxYC4Tgc7LIkcL9LHVWb5pKdnck0ov rVAVcV7vVYIYBy9qDh9AIISUK7XfKrtJaiIC9T2rkIvg5x4iUlC/XcZr2cFC32JIZGlYrTNkhQVOX 7y6B+WFlEytINVy052XvjTJogvB8MTUkbH3cobLx/1q8axxYzCnIXyCuUCoOxpQoSZk8LmqZaHqgS kfE6UIUw==; Received: from mail-pl1-x634.google.com ([2607:f8b0:4864:20::634]) by desiato.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tfU7Z-0000000GTtS-2xP2 for linux-riscv@lists.infradead.org; Wed, 05 Feb 2025 01:22:36 +0000 Received: by mail-pl1-x634.google.com with SMTP id d9443c01a7336-21f0c4275a1so16428755ad.2 for ; Tue, 04 Feb 2025 17:22:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1738718546; x=1739323346; darn=lists.infradead.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=hU6IAlGSwKWKw5iWDrFBqBdwaJZ69/+Cs7+/DXu3do8=; b=Bm1CJUBp1Kpdapse109HIemvwzsOYl/fyCAOPeo22jsVqrsDCvmstu7rG5PTTaZfYK 7+wgAz3FDrzUzQlTdGxUx5m5W/2blA25jTH1KYKc2eoMe2dfs2Tj95YNXk9T2W0OUUal q6IS338bVD1cik5k2fkMyBw1eJYasLwfoGM55rNMgpqz1u428fFBObbNi9SCfuW4czhG x1ie4oe1Z1quLu4fBVR7qjiGCpwWzw/1NjmEjryFjHjNxDIMdsw5+kK8V9RUJcvI4jZ8 hDxd9EGiz/ytdo5WQDBHSqLJ6T8/eAXPFJ38IS07NjJ/KDlYVw4wZj8hG57J/7kIqfEN /WtQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1738718546; x=1739323346; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=hU6IAlGSwKWKw5iWDrFBqBdwaJZ69/+Cs7+/DXu3do8=; b=e1WVJMKN2HeVjyRyINe3Qp2Ml1JIZzymBGAQPtrArQawyLQSjwb5rFNR6RCoLHqegS NlUbGyTxE8+oID4ISDsY3yHvTsOfs9UQn19YW4TI2bkK2fpNjEMEminIYED/yoRn4h64 wDQPxRe1o77MJr+taVjgm4Ng/7dZrhmRExS2eqlr15F3tXG76VwR/yhkzmAQZOl+4w32 8ttkK4l52zIpzlAT6BSvbaExX1llQ9moMNdLivSvOy52ApwwWXGVXMRGkl7KwiRKF+/5 3InlKTLBH3a5Yegha4dxCELJ9EM54q0vvqNV7XJN46eloD/7A8UkHnBoTPl16/xUcVOv V32w== X-Forwarded-Encrypted: i=1; AJvYcCVS5HwEw5qs2MgHCK7fFQ00DI9L+rxngKa/3fyn6Cj+d12lVkgfkIGeqRkOqvOFUvTXFKWM11K41eCsxQ==@lists.infradead.org X-Gm-Message-State: AOJu0YxcVM1tMDQvaRU5enfeZqKmOJtzwoM/vtJ0YRCyJLOc1HP1OXgZ MLaKfNYWmjYvIYjEFKQFsyvxtY4GnrrifVE92pCxXtgbGdhRnFP6svKMFqW6vsRwjPSi8eekRsX 2 X-Gm-Gg: ASbGnctFPpvxuQ5GZ6H/5hFSt+eLnsizhh0Wr7Xnd+UVnyOuon3E3gk/ub2ZMI49H8C tMK21/e1radQWct8by66Or6PNABPdsoJFmo8pPt0Cs/vvJB62sklWt42FQxRXVhPAzdDU36cOtq AAHhAaVQCwB8jZf6lvUMVBNx17MaNhGIWaltmWqeKttLTHgSlPtFa6XodW77DLFrQGgrmhODhut EBl4X/C7PhoGfhev6u1oNC45KRMI0nApAG1zyfJw9qn/Jdivh00t+5vIpKt9tYBZP3gDTqOYPAH VUBRXdSv1jMXAyk4efTehRJb8w== X-Google-Smtp-Source: AGHT+IGWWoW/7lRLh8J45NtMl4EugfElwrrMWaqnc/KSZ7FxaiKV7MT8r9isBGhbF0Mg00kAPNlQiw== X-Received: by 2002:a05:6a20:ce45:b0:1e1:a75a:c452 with SMTP id adf61e73a8af0-1ede8844f5emr1528777637.19.1738718546388; Tue, 04 Feb 2025 17:22:26 -0800 (PST) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-72fe69cec0fsm11457202b3a.137.2025.02.04.17.22.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 04 Feb 2025 17:22:26 -0800 (PST) From: Deepak Gupta Date: Tue, 04 Feb 2025 17:22:04 -0800 Subject: [PATCH v9 17/26] riscv/kernel: update __show_regs to print shadow stack register MIME-Version: 1.0 Message-Id: <20250204-v5_user_cfi_series-v9-17-b37a49c5205c@rivosinc.com> References: <20250204-v5_user_cfi_series-v9-0-b37a49c5205c@rivosinc.com> In-Reply-To: <20250204-v5_user_cfi_series-v9-0-b37a49c5205c@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan , Jann Horn , Conor Dooley Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta X-Mailer: b4 0.14.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250205_012233_903094_9C94E785 X-CRM114-Status: GOOD ( 11.11 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Updating __show_regs to print captured shadow stack pointer as well. On tasks where shadow stack is disabled, it'll simply print 0. Signed-off-by: Deepak Gupta Reviewed-by: Alexandre Ghiti --- arch/riscv/kernel/process.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/riscv/kernel/process.c b/arch/riscv/kernel/process.c index 4587201dd81d..6bb53ce72ed5 100644 --- a/arch/riscv/kernel/process.c +++ b/arch/riscv/kernel/process.c @@ -90,8 +90,8 @@ void __show_regs(struct pt_regs *regs) regs->s8, regs->s9, regs->s10); pr_cont(" s11: " REG_FMT " t3 : " REG_FMT " t4 : " REG_FMT "\n", regs->s11, regs->t3, regs->t4); - pr_cont(" t5 : " REG_FMT " t6 : " REG_FMT "\n", - regs->t5, regs->t6); + pr_cont(" t5 : " REG_FMT " t6 : " REG_FMT " ssp : " REG_FMT "\n", + regs->t5, regs->t6, get_active_shstk(current)); pr_cont("status: " REG_FMT " badaddr: " REG_FMT " cause: " REG_FMT "\n", regs->status, regs->badaddr, regs->cause); From patchwork Wed Feb 5 01:22:05 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 13960431 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6CBADC02193 for ; Wed, 5 Feb 2025 02:31:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=LAf6MslLH1W1Qudsmw0JxdiT7ib3uJj4Ssg/wObdBvc=; b=aAUxRzH/kOAAtJ 3YfXJCPwF7onJ32EP9Bkq23KTFkXRwNV9XW77X3xd+z1MDYUdDaa/NNiwjsS/pjUcxFxNhvr1TaYo 2072e4s77R/pbZPhxlMF/Dc2pwIGs5u1LsuonSIez9DOMR+YGWj5JBNlelmDMiQWr5D+4kOWNlVql iiiJ/wEFXrkInYng3KsmvyIteE82IUBkZ6NF+McK5hfcabWutjOKfga9KbyBDAgEkWoJMNETWTaBi DEO73FgnIbEpxgN2gK6Hf0dHMYF+5T6Z8etzmeHGoAnAugiPQLmnpxC0v3OWwBJHJgsa/nwXUco+E L+ywv5dPx0o/ncx8mrPg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tfVC0-000000028We-1JPg; Wed, 05 Feb 2025 02:31:08 +0000 Received: from mail-pj1-x1030.google.com ([2607:f8b0:4864:20::1030]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tfU7Z-000000021aE-2KI7 for linux-riscv@lists.infradead.org; Wed, 05 Feb 2025 01:22:30 +0000 Received: by mail-pj1-x1030.google.com with SMTP id 98e67ed59e1d1-2f9d5f6df4cso1219723a91.1 for ; Tue, 04 Feb 2025 17:22:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1738718548; x=1739323348; darn=lists.infradead.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=qihiC//CQppmEvCBgeNt37whYo0mSsmsLXBW9eHBYhI=; b=dBHSgUXcODMed14d439FHDt7DLoydKwWDCpeaTbIVSsO50BzzpZe9adNelOuF6GxwZ ft1nLtStlH8D2wux+Zbp2AqYevske5ui45qGT7ag1ZSHYE1hvB7WXPw4DU4ZkJNOEeQ6 MslvDgyO6kkjXw2j3Qb4/5jiaHV3gIjtfZz5AEtTINNwyUZi0NtisfuqBqLVr10NJNM4 CaqU/eBj+0gXRg0kqv373h1D2+5qMusLwS6T9lNUx9tlOspexssXsu6Qp4VjXEnhB+Rl MiU/jpvPrXoT3OQeh4lAo77FQXrZAMAMjsXGJvPkHkRf/u5yWwiIKBH+gCMFKMuqFTv/ Ydiw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1738718548; x=1739323348; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=qihiC//CQppmEvCBgeNt37whYo0mSsmsLXBW9eHBYhI=; b=qHUbOwFE45JaXLjM5BZ4zs9uzPy9lMja/kZEf5qFN0+jbOVR+c0gAV6K1DPduG98UV V8a5iub8YLAvGKHNpQWQn4nCknGTR6EFm0W/x//8lw7RyNKAI4c6QBDnCc3l3EArFkjW r42JbznLOJyPVmvRHkv58dXjHkpcSz11KYvdMdh95l00JrT5jCUo2jECrxDYuZTs32wM Henc8k54n4htbUMkqs9aLtfxatBfSygzBjodlJXW73/M57I/lSautHJpq0j6e3obMQ/o enReBuMO04t8lXHYYW0AspammffzFFt0BMa2EFnpjRA0k5/s2n198ImgeBeot7wVoB8d kxSA== X-Forwarded-Encrypted: i=1; AJvYcCW7SlvjtryROWqasATScWwK+kR+/4q0AuBudZcBlRWjWeijy9kW2BCvOGIACR6KQIJZyGTRPfR1Kp8OKw==@lists.infradead.org X-Gm-Message-State: AOJu0YxdU3IJdxU2QxQx1Huxcoo6itP0qQvftGDnGBhN5FoTAo7tP24B gdJizjIOIp5VskmbD9ZsX/0gg6tT+34NQzlm44hEDZrIbNN+NM2LyBkeXitU1b6KZpkuPKuAi7u Z X-Gm-Gg: ASbGncsMd5R0hoG4vIJ+uTHR1HQGI+VWV/HYdhdr4oyIvfdp5CgEg0FY/arznp9JyhV gUx/8HviHCWuFjxz2/GebL/zzcwQEzx/5kagHk1donU+wvrI9fs4DNkXDu3ytb3OGjqYImWjafd +jlR7Ew3GLmbivuQNpqFQoahuWzqEJ5usXnTDVsKNkCOqHdT2tzCnbqyr51IsUSzSEMierMk6Bj pzSjlsmx5Z1OiuDqmYuwV6iRVFW5uyeEOxeAxhfQjA1dlL1krt6PxyXcSbuwg+Yuje8o22Hq2MU LcASFOOU08wtb+PE639YFmqioA== X-Google-Smtp-Source: AGHT+IHWbQfADLd+Ob8Vnh0rOA4NZ0z4/6KaV7B9hVIajt+57sgLHfd+vtzkYcT3cxRQ/UAnvuEoKw== X-Received: by 2002:a05:6a00:2886:b0:728:b601:86ee with SMTP id d2e1a72fcca58-730351ec0acmr1566871b3a.16.1738718548311; Tue, 04 Feb 2025 17:22:28 -0800 (PST) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-72fe69cec0fsm11457202b3a.137.2025.02.04.17.22.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 04 Feb 2025 17:22:27 -0800 (PST) From: Deepak Gupta Date: Tue, 04 Feb 2025 17:22:05 -0800 Subject: [PATCH v9 18/26] riscv/ptrace: riscv cfi status and state via ptrace and in core files MIME-Version: 1.0 Message-Id: <20250204-v5_user_cfi_series-v9-18-b37a49c5205c@rivosinc.com> References: <20250204-v5_user_cfi_series-v9-0-b37a49c5205c@rivosinc.com> In-Reply-To: <20250204-v5_user_cfi_series-v9-0-b37a49c5205c@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan , Jann Horn , Conor Dooley Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta X-Mailer: b4 0.14.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250204_172229_604305_7E5D57C3 X-CRM114-Status: GOOD ( 21.40 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Expose a new register type NT_RISCV_USER_CFI for risc-v cfi status and state. Intentionally both landing pad and shadow stack status and state are rolled into cfi state. Creating two different NT_RISCV_USER_XXX would not be useful and wastage of a note type. Enabling or disabling of feature is not allowed via ptrace set interface. However setting `elp` state or setting shadow stack pointer are allowed via ptrace set interface. It is expected `gdb` might have use to fixup `elp` state or `shadow stack` pointer. Signed-off-by: Deepak Gupta --- arch/riscv/include/uapi/asm/ptrace.h | 18 ++++++++ arch/riscv/kernel/ptrace.c | 83 ++++++++++++++++++++++++++++++++++++ include/uapi/linux/elf.h | 1 + 3 files changed, 102 insertions(+) diff --git a/arch/riscv/include/uapi/asm/ptrace.h b/arch/riscv/include/uapi/asm/ptrace.h index 659ea3af5680..e6571fba8a8a 100644 --- a/arch/riscv/include/uapi/asm/ptrace.h +++ b/arch/riscv/include/uapi/asm/ptrace.h @@ -131,6 +131,24 @@ struct __sc_riscv_cfi_state { unsigned long ss_ptr; /* shadow stack pointer */ }; +struct __cfi_status { + /* indirect branch tracking state */ + __u64 lp_en : 1; + __u64 lp_lock : 1; + __u64 elp_state : 1; + + /* shadow stack status */ + __u64 shstk_en : 1; + __u64 shstk_lock : 1; + + __u64 rsvd : sizeof(__u64) - 5; +}; + +struct user_cfi_state { + struct __cfi_status cfi_status; + __u64 shstk_ptr; +}; + #endif /* __ASSEMBLY__ */ #endif /* _UAPI_ASM_RISCV_PTRACE_H */ diff --git a/arch/riscv/kernel/ptrace.c b/arch/riscv/kernel/ptrace.c index ea67e9fb7a58..df8b7c6ab671 100644 --- a/arch/riscv/kernel/ptrace.c +++ b/arch/riscv/kernel/ptrace.c @@ -19,6 +19,7 @@ #include #include #include +#include enum riscv_regset { REGSET_X, @@ -31,6 +32,9 @@ enum riscv_regset { #ifdef CONFIG_RISCV_ISA_SUPM REGSET_TAGGED_ADDR_CTRL, #endif +#ifdef CONFIG_RISCV_USER_CFI + REGSET_CFI, +#endif }; static int riscv_gpr_get(struct task_struct *target, @@ -184,6 +188,75 @@ static int tagged_addr_ctrl_set(struct task_struct *target, } #endif +#ifdef CONFIG_RISCV_USER_CFI +static int riscv_cfi_get(struct task_struct *target, + const struct user_regset *regset, + struct membuf to) +{ + struct user_cfi_state user_cfi; + struct pt_regs *regs; + + regs = task_pt_regs(target); + + user_cfi.cfi_status.lp_en = is_indir_lp_enabled(target); + user_cfi.cfi_status.lp_lock = is_indir_lp_locked(target); + user_cfi.cfi_status.elp_state = (regs->status & SR_ELP); + + user_cfi.cfi_status.shstk_en = is_shstk_enabled(target); + user_cfi.cfi_status.shstk_lock = is_shstk_locked(target); + user_cfi.shstk_ptr = get_active_shstk(target); + + return membuf_write(&to, &user_cfi, sizeof(user_cfi)); +} + +/* + * Does it make sense to allowing enable / disable of cfi via ptrace? + * Not allowing enable / disable / locking control via ptrace for now. + * Setting shadow stack pointer is allowed. GDB might use it to unwind or + * some other fixup. Similarly gdb might want to suppress elp and may want + * to reset elp state. + */ +static int riscv_cfi_set(struct task_struct *target, + const struct user_regset *regset, + unsigned int pos, unsigned int count, + const void *kbuf, const void __user *ubuf) +{ + int ret; + struct user_cfi_state user_cfi; + struct pt_regs *regs; + + regs = task_pt_regs(target); + + ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &user_cfi, 0, -1); + if (ret) + return ret; + + /* + * Not allowing enabling or locking shadow stack or landing pad + * There is no disabling of shadow stack or landing pad via ptrace + * rsvd field should be set to zero so that if those fields are needed in future + */ + if (user_cfi.cfi_status.lp_en || user_cfi.cfi_status.lp_lock || + user_cfi.cfi_status.shstk_en || user_cfi.cfi_status.shstk_lock || + !user_cfi.cfi_status.rsvd) + return -EINVAL; + + /* If lpad is enabled on target and ptrace requests to set / clear elp, do that */ + if (is_indir_lp_enabled(target)) { + if (user_cfi.cfi_status.elp_state) /* set elp state */ + regs->status |= SR_ELP; + else + regs->status &= ~SR_ELP; /* clear elp state */ + } + + /* If shadow stack enabled on target, set new shadow stack pointer */ + if (is_shstk_enabled(target)) + set_active_shstk(target, user_cfi.shstk_ptr); + + return 0; +} +#endif + static const struct user_regset riscv_user_regset[] = { [REGSET_X] = { .core_note_type = NT_PRSTATUS, @@ -224,6 +297,16 @@ static const struct user_regset riscv_user_regset[] = { .set = tagged_addr_ctrl_set, }, #endif +#ifdef CONFIG_RISCV_USER_CFI + [REGSET_CFI] = { + .core_note_type = NT_RISCV_USER_CFI, + .align = sizeof(__u64), + .n = sizeof(struct user_cfi_state) / sizeof(__u64), + .size = sizeof(__u64), + .regset_get = riscv_cfi_get, + .set = riscv_cfi_set, + }, +#endif }; static const struct user_regset_view riscv_user_native_view = { diff --git a/include/uapi/linux/elf.h b/include/uapi/linux/elf.h index b44069d29cec..b9daed4ab780 100644 --- a/include/uapi/linux/elf.h +++ b/include/uapi/linux/elf.h @@ -452,6 +452,7 @@ typedef struct elf64_shdr { #define NT_RISCV_CSR 0x900 /* RISC-V Control and Status Registers */ #define NT_RISCV_VECTOR 0x901 /* RISC-V vector registers */ #define NT_RISCV_TAGGED_ADDR_CTRL 0x902 /* RISC-V tagged address control (prctl()) */ +#define NT_RISCV_USER_CFI 0x903 /* RISC-V shadow stack state */ #define NT_LOONGARCH_CPUCFG 0xa00 /* LoongArch CPU config registers */ #define NT_LOONGARCH_CSR 0xa01 /* LoongArch control and status registers */ #define NT_LOONGARCH_LSX 0xa02 /* LoongArch Loongson SIMD Extension registers */ From patchwork Wed Feb 5 01:22:06 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 13960435 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 719A8C0219C for ; Wed, 5 Feb 2025 02:31:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Q1u0VIQ4NIUXAEjzatnUQcz/1UrmCmOCCedYEOwwYYk=; b=t7pyA4MPIckWbS Vu47G3KW0mW7iTIDn+mc10zFy8x/ETMMrlSfNr/3n8jlPvqW11hIdqHldYD438p/u6tsIrZYei4qT VpfhD+lDAaVc4nYhUdohw7T4Vw79ZQJId1nS3jJZ7dd3wi0ku3ZZm4IjqK/ctw4VZLpqcWmK2A20R ynI68TJwm9KTQdYSwjYLjaI8YoYLAkN/93nEKMeTSXnG7bsfsTSdsdYNnOLp8RPgCJPoO6Hvd/CD8 qah9cRdFyUrZbgV7lMzlHlWKX82DyIrfd9os/XT5VKnlVUEcehguJIT10ZZTE9GCU4qWRY4gA3DJs vxs6/a4IlMKIURGWp81Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tfVC1-000000028XZ-2XUK; Wed, 05 Feb 2025 02:31:09 +0000 Received: from casper.infradead.org ([2001:8b0:10b:1236::1]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tfU7f-000000021gI-3R8H for linux-riscv@bombadil.infradead.org; Wed, 05 Feb 2025 01:22:35 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=Cc:To:In-Reply-To:References:Message-Id :Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date:From:Sender :Reply-To:Content-ID:Content-Description; bh=BEoq6zqSeLFMaXOoiuM7yp6ZSaKHVlNR4X3PvApIHRU=; b=mIY7KrcuCMfmd0AGFbK/Fh4QDS Py7wp2H5RIxPOI9BXJxFc1ELU59L6kOHl9bMCeGwxF8e4UAeLbQwKCAb45kWxzDmk2o2AHGYvkb70 o52acWAI8gqoRy8kL7APYXkwEWFu4UhsMTXTrFpnDELRBRcnsmPvCX6jkpGPtej26TzBNDf8TKRZR 14iu54os+D7Xzu+uksmp3GpCaceHMCXXcZFuB0K1SX1GtN2Wqj01+kBxuXgg9Tg7oN9LYB/C/BuZz cjx3C4E/RUTAJGxv+Kq8PVkhTkvUa2hyf56FmI1L/Ah7+dnL+aPMac/LmE2jpQ3gvG19tc6hwC5ru zHKpentw==; Received: from mail-pj1-x1032.google.com ([2607:f8b0:4864:20::1032]) by casper.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tfU7c-00000003cCn-2Zea for linux-riscv@lists.infradead.org; Wed, 05 Feb 2025 01:22:34 +0000 Received: by mail-pj1-x1032.google.com with SMTP id 98e67ed59e1d1-2ee50ffcf14so581981a91.0 for ; Tue, 04 Feb 2025 17:22:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1738718550; x=1739323350; darn=lists.infradead.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=BEoq6zqSeLFMaXOoiuM7yp6ZSaKHVlNR4X3PvApIHRU=; b=nHDvzmgRNIerlqlg58OMrAfWxmjaT3APBPqQNt9PYqW+FacsVJEbgNSfA4AQ75dwzT GLYLJw8+3ZsO4I/MD2BDudUrYwRtp2PkNxtBniCOYqctU3mA7STfNGBuGUTOdd1SZrVS QjY0zSEN7oqa1PJZXIZ1bTiKCNRfM0UqtDhe5sUK2VJOS4OxEV9yTICAPbzK03+GDZ+R 9qTbUDAsCJdDxP80RG60Lhz6LGidVHWrgh+qn1IUtLAsfqSm/V+Dbj8wnsWiLV/zl8Ep eS+mfUohzNzbGA3NAfOK1196e6Pvyhlq0Iiu92WQdp4CiwE8liuMjSaHWw7djKd0ey8H vUJA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1738718550; x=1739323350; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=BEoq6zqSeLFMaXOoiuM7yp6ZSaKHVlNR4X3PvApIHRU=; b=TKkazwwq7EVCvBg1SCKk7aeD/c31oAG9/zsZZuRtTXzmMr4MoXFj9ESZl6SwwCZwhV QrZTxTcJmTAOBl5YsKl0GQDAR05uUCGkzptLCP1FUPZNvjpZtYVxKjS4gNM7UOBxbJnt YIfj+IZzx0shAkgSM7iCLAgQYgK6pRJszVxVBXjEuoawwNR/TmnouUBVj+q6kFDDZ8Oo H/ns2r07JNcPInbkLPY1vrD78UubV3+3zBXbXzgK0FTl6i0OA/BrX+XFwFBMIjmxkimf RAqCoj8003yhcCv0rumntmgkFh4AHzK6VSBKJ1ikXYISvGaABRLt84fEJQ7rmlqYnNaP 9amQ== X-Forwarded-Encrypted: i=1; AJvYcCX3xzefKARZVWExgjMvVscyOVhDVbaxcKFaMMJfAHt3e+tvkq4aC+v44O4hCse3HK+R21wqIs99+FQadQ==@lists.infradead.org X-Gm-Message-State: AOJu0YwaSdaSc+mPMVWOws1LM2iEKoFRi1FGhJbPKgQ/qdHAQ4QRq9cP zjBANspzQAMpN6b/dgn5I8KEJq1Sf/oKFOXVMdAxd9F8/7XBS0ileYcj99SlAUaGX5eBGWA9Nbp p X-Gm-Gg: ASbGnctM+WZuf0IKY0vY/NkP4pDETBM1LhTYkSL4Iot9C6NchfTbVzTV9LZcj+A0m1M oE6W+8ZOdcE+RaZ/pjNNcOnInfmTkXe1Y+K3fiXB1wp/JLHY1UC/6YiE+Kbb8374Z1dgcbNzbXE IoJ310dNw5+N0CqyLxKaI+GKJ37tx3XqFG7pUnew1hvB3yVyRLaVWzQDRf5fwOote0xLHW3NGBt UpiKeAxYBUMLaLbb5q9yDV135hyZBMyuxooHi3yq/6zhmHmbcxuBGZcp5ASp6FO3xCgkgxAiFu3 g7+cKnJqtyzASAIo4vytngkzjg== X-Google-Smtp-Source: AGHT+IFRFqE0ahq5ulRUML95GVOJ0DexxJ072ed1PioG6NF+P3Y5e0hdICNgMJ1J/XjbYt4HuYIKmA== X-Received: by 2002:a05:6a00:3a19:b0:729:1c0f:b94e with SMTP id d2e1a72fcca58-73035131885mr1809338b3a.6.1738718550207; Tue, 04 Feb 2025 17:22:30 -0800 (PST) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-72fe69cec0fsm11457202b3a.137.2025.02.04.17.22.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 04 Feb 2025 17:22:29 -0800 (PST) From: Deepak Gupta Date: Tue, 04 Feb 2025 17:22:06 -0800 Subject: [PATCH v9 19/26] riscv/hwprobe: zicfilp / zicfiss enumeration in hwprobe MIME-Version: 1.0 Message-Id: <20250204-v5_user_cfi_series-v9-19-b37a49c5205c@rivosinc.com> References: <20250204-v5_user_cfi_series-v9-0-b37a49c5205c@rivosinc.com> In-Reply-To: <20250204-v5_user_cfi_series-v9-0-b37a49c5205c@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan , Jann Horn , Conor Dooley Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta X-Mailer: b4 0.14.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250205_012232_770417_A5376D5E X-CRM114-Status: GOOD ( 11.11 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Adding enumeration of zicfilp and zicfiss extensions in hwprobe syscall. Signed-off-by: Deepak Gupta --- arch/riscv/include/uapi/asm/hwprobe.h | 2 ++ arch/riscv/kernel/sys_hwprobe.c | 2 ++ 2 files changed, 4 insertions(+) diff --git a/arch/riscv/include/uapi/asm/hwprobe.h b/arch/riscv/include/uapi/asm/hwprobe.h index c3c1cc951cb9..c1b537b50158 100644 --- a/arch/riscv/include/uapi/asm/hwprobe.h +++ b/arch/riscv/include/uapi/asm/hwprobe.h @@ -73,6 +73,8 @@ struct riscv_hwprobe { #define RISCV_HWPROBE_EXT_ZCMOP (1ULL << 47) #define RISCV_HWPROBE_EXT_ZAWRS (1ULL << 48) #define RISCV_HWPROBE_EXT_SUPM (1ULL << 49) +#define RISCV_HWPROBE_EXT_ZICFILP (1ULL << 50) +#define RISCV_HWPROBE_EXT_ZICFISS (1ULL << 51) #define RISCV_HWPROBE_KEY_CPUPERF_0 5 #define RISCV_HWPROBE_MISALIGNED_UNKNOWN (0 << 0) #define RISCV_HWPROBE_MISALIGNED_EMULATED (1 << 0) diff --git a/arch/riscv/kernel/sys_hwprobe.c b/arch/riscv/kernel/sys_hwprobe.c index bcd3b816306c..d802ff707913 100644 --- a/arch/riscv/kernel/sys_hwprobe.c +++ b/arch/riscv/kernel/sys_hwprobe.c @@ -108,6 +108,8 @@ static void hwprobe_isa_ext0(struct riscv_hwprobe *pair, EXT_KEY(ZCB); EXT_KEY(ZCMOP); EXT_KEY(ZICBOZ); + EXT_KEY(ZICFILP); + EXT_KEY(ZICFISS); EXT_KEY(ZICOND); EXT_KEY(ZIHINTNTL); EXT_KEY(ZIHINTPAUSE); From patchwork Wed Feb 5 01:22:07 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 13960395 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id ED6E6C02196 for ; Wed, 5 Feb 2025 01:22:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=yMOrut6R4TAN79yO8IxtUtFdOzZL3mTEbv1n5iblEg8=; b=AkJsJd/kzGkauz bdDtbaQamQc3G69H3YHBGliCVkFRsHtQUKZDMyOBjQ8AD0SFy54K3MEfviUce5yduc5xt4h3K4vOm eNtXpBBiE/5TJ+Z3+duqNNvBE15L+QfJ/xGJepVAzZhONf5aSK9k38KFv8IdfEQYL+3dhxXEDG+Ms Og7VxG/EpX0ODdkacZlvsEzNADRKYniYYAVORkgobGJpR0OjiySvXujEXVXtyXNt/XfVTnYlvtpfl +pzOdSGSi1gkg7d/It1N+2tXzjZyUOsuYklx/DPuq+I1O6VWiYhsgloLPmPw1g3KuVMs0CrbI15xf +RJCRF/oNdAFS2pmYTxQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tfU7f-000000021gz-3EaE; Wed, 05 Feb 2025 01:22:35 +0000 Received: from mail-pl1-x635.google.com ([2607:f8b0:4864:20::635]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tfU7d-000000021e7-16l3 for linux-riscv@lists.infradead.org; Wed, 05 Feb 2025 01:22:34 +0000 Received: by mail-pl1-x635.google.com with SMTP id d9443c01a7336-219f8263ae0so117685335ad.0 for ; Tue, 04 Feb 2025 17:22:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1738718552; x=1739323352; darn=lists.infradead.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=a5uI84SXblQRDID2BHNWhhHsRc7xVUDdoiei4kS9c/0=; b=RhXBYP9qzvZ6TTO6Ci4knHnCDQFf54PjjQFzqtKO8tffvPV5/XaIfc7jAgW/h7raaz HoDx/lSGtz2Ak0rbTnJEwZqMc+UG9zapvQHS5f8yU2sR9qqDw1dibbuLEAwR86ELKYXu jzSwu4Y58ap4xb+HoSb1HXzlgIVu9+PUaNjbrIPLlZdK0QOhfibBpES5SD0I8o+M9SoX KppLi8lN1FtEXZJOTM2PwgL0jraCvPsd9IwjaTGv+2m4hBSBPJj3s9A6/eo24L+5DPiY nkvkpt7sE6HpHegnx4JLWlR4bRZVu46/jPpMRCRGxLxx9x8PfJqCWpPAcRSIWYLWZ6Oi 8Glw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1738718552; x=1739323352; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=a5uI84SXblQRDID2BHNWhhHsRc7xVUDdoiei4kS9c/0=; b=g1oqgpBtIzZZREagK7pzbQTuEmTiykxHMI6nsSfH4FvsVUmDby3S8RITDZYN1FYOOX f3ohPvuOkjgPI0/CxbllMZKH7fcZ5ammRUk9EGqh52OcXMmXhiG8w+M/fPNP66H2gfIv AXHE+UV2//L3xDwANpN/QkYbUeh626vtPf4t4Hj1rPZ/v+eqWISdMYrocjdLoQZy/Pvn zNQKnVkwY/0uw0RV5pHTfFA54XlT8BQWqFTLyZiv0S5/vNjys3QFBA/68nA3fhvNm0YA Iees2Yp1+syCZTSd7BlpJen2cxGkflLhziU8Kj5vsPecHwV384n98nzFcW8ocs4l+DKK nfiw== X-Forwarded-Encrypted: i=1; AJvYcCWmOeYSauojpOIgQCRii4l4WXqnnKGfitDHFybyNJqtT/BzuuZR2+hjT+5gAIPzhX1fR4vBpLOo8Lbgqg==@lists.infradead.org X-Gm-Message-State: AOJu0YxSMl2oI+S92P/Jpw0wj3rqSLIGL5pr8f0TXVqgFRtvcXmFs9nX BsydCEzA11Zkmw0uThwLqDKSj+K4vygeRFJXNvKQeSKVb9saqE4k2AGwIE+FhMcVd8xCFiITl40 H X-Gm-Gg: ASbGncutjhT0sjES+OqUc2Wj1aYBZq4yFPS0jNS90xwFuAbyziI3+YLHdqrSMQD+qwW bmVw6K6np+9jvksAbw9+ozep/cplLin0u5RP8z9s6L3ZysuNwix5xKNHs97VtOSzczXfmwAjXSC QIfBnHlLBFng/7EKVi3EO+sAy/p9Hkh3NGy1uxijA60hZobRzMTvX/Ix+xmJyCfHJwR7DBKO391 sKBEMv90mc2sfgtEmtQffKtO13KF+teyHV6+3X0qYyXQlISreFymlxqiPQPAavJhgaYOI+LRfcf 8qDI5reP3CkgIOntO6uVxyoT4g== X-Google-Smtp-Source: AGHT+IFCF6Qyo3q2G3dGEoXnovMcbEOll06APDlJ/baKR1lUf1tJ5kFaxAt+4U15uatvwIepGIzY3g== X-Received: by 2002:a05:6a21:6da4:b0:1d9:2705:699e with SMTP id adf61e73a8af0-1ede88106d4mr1669830637.7.1738718552107; Tue, 04 Feb 2025 17:22:32 -0800 (PST) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-72fe69cec0fsm11457202b3a.137.2025.02.04.17.22.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 04 Feb 2025 17:22:31 -0800 (PST) From: Deepak Gupta Date: Tue, 04 Feb 2025 17:22:07 -0800 Subject: [PATCH v9 20/26] riscv: Add Firmware Feature SBI extensions definitions MIME-Version: 1.0 Message-Id: <20250204-v5_user_cfi_series-v9-20-b37a49c5205c@rivosinc.com> References: <20250204-v5_user_cfi_series-v9-0-b37a49c5205c@rivosinc.com> In-Reply-To: <20250204-v5_user_cfi_series-v9-0-b37a49c5205c@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan , Jann Horn , Conor Dooley Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com X-Mailer: b4 0.14.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250204_172233_306391_80F8F16C X-CRM114-Status: UNSURE ( 9.86 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org From: Clément Léger Add necessary SBI definitions to use the FWFT extension. Signed-off-by: Clément Léger --- arch/riscv/include/asm/sbi.h | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h index 3d250824178b..23bfb254e3f4 100644 --- a/arch/riscv/include/asm/sbi.h +++ b/arch/riscv/include/asm/sbi.h @@ -35,6 +35,7 @@ enum sbi_ext_id { SBI_EXT_DBCN = 0x4442434E, SBI_EXT_STA = 0x535441, SBI_EXT_NACL = 0x4E41434C, + SBI_EXT_FWFT = 0x46574654, /* Experimentals extensions must lie within this range */ SBI_EXT_EXPERIMENTAL_START = 0x08000000, @@ -401,6 +402,31 @@ enum sbi_ext_nacl_feature { #define SBI_NACL_SHMEM_SRET_X(__i) ((__riscv_xlen / 8) * (__i)) #define SBI_NACL_SHMEM_SRET_X_LAST 31 +/* SBI function IDs for FW feature extension */ +#define SBI_EXT_FWFT_SET 0x0 +#define SBI_EXT_FWFT_GET 0x1 + +enum sbi_fwft_feature_t { + SBI_FWFT_MISALIGNED_EXC_DELEG = 0x0, + SBI_FWFT_LANDING_PAD = 0x1, + SBI_FWFT_SHADOW_STACK = 0x2, + SBI_FWFT_DOUBLE_TRAP = 0x3, + SBI_FWFT_PTE_AD_HW_UPDATING = 0x4, + SBI_FWFT_LOCAL_RESERVED_START = 0x5, + SBI_FWFT_LOCAL_RESERVED_END = 0x3fffffff, + SBI_FWFT_LOCAL_PLATFORM_START = 0x40000000, + SBI_FWFT_LOCAL_PLATFORM_END = 0x7fffffff, + + SBI_FWFT_GLOBAL_RESERVED_START = 0x80000000, + SBI_FWFT_GLOBAL_RESERVED_END = 0xbfffffff, + SBI_FWFT_GLOBAL_PLATFORM_START = 0xc0000000, + SBI_FWFT_GLOBAL_PLATFORM_END = 0xffffffff, +}; + +#define SBI_FWFT_GLOBAL_FEATURE_BIT (1 << 31) +#define SBI_FWFT_PLATFORM_FEATURE_BIT (1 << 30) + +#define SBI_FWFT_SET_FLAG_LOCK (1 << 0) /* SBI spec version fields */ #define SBI_SPEC_VERSION_DEFAULT 0x1 From patchwork Wed Feb 5 01:22:08 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 13960438 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 84760C3DA4A for ; Wed, 5 Feb 2025 02:31:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=JyKdW/ZXsRTBe1RQ4y0DAX/QqCOyoDEFe+L02jBTanY=; b=Y5vnRLrfN5EWGp dwLk/eSNYqrGiMJrkW+2s1HpS44MdI6ypUK8Z58QVyvDiT/HYd4XBccNMepsa8fbqm1QAi9OP7yMi br3KXaFmhsazJRQJENKIGgwWcHPgpitQzqEIDlUJQNfgNglT9jk/UDZHX8hJHxeY3IWt6soCZbdYK o25g9rUS5l8MNAEgFV0JIe8I26OmAPRcMRbwkXKnH71H/mKwBD9Fm8L0LWTzym6TvvBklyBJW8zQj u+Y+BthyHLwH1iRdxjbGYnq9VgppOFT2No0Ou4CWbIwU4ZDO6qBHqRU2HO82cSrt/gWURaMOdlDLp Kr7lJcJTdnoPgmHLOXcQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tfVC2-000000028Xy-195s; Wed, 05 Feb 2025 02:31:10 +0000 Received: from mail-pl1-x62b.google.com ([2607:f8b0:4864:20::62b]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tfU7f-000000021g5-1Qfd for linux-riscv@lists.infradead.org; Wed, 05 Feb 2025 01:22:36 +0000 Received: by mail-pl1-x62b.google.com with SMTP id d9443c01a7336-21c2f1b610dso147820175ad.0 for ; Tue, 04 Feb 2025 17:22:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1738718554; x=1739323354; darn=lists.infradead.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=YHkNmM6XuphgUqeYDdwRc1f9MaOV9mSfy6OUDBv2dEo=; b=k1wcS0D7rGvq5pOQsKRhr0bA1cWGUApku2cvOhEPG60JdTfr0EtSGfAzZ4HZZQGVrE RFiBXMHhQMVWxtdW/Q8lWDUJq9sAFDCt1cgel+iHofevFuP+q46INHPZy08xUSV+OuIG cXz7HFDCbXoEjymqRo0LQQ1Ko5cv0+wZ7JFMjWRtwynEuqDuq7FzwitmfcUqyDAlsKg3 y5aYRPMn2mGL4Qmd2LJjWl4jtxlMerSOgrtV+BPdwIWJ+Ksnxg1lo3Y2Xq386c90peFA 41Jibs0AxMn9pP3hPkSzAmpnZzHZJho8hp+uAMWdSoMDP5yFm9JsXJI3RQe8eWZjbzRM z/0g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1738718554; x=1739323354; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=YHkNmM6XuphgUqeYDdwRc1f9MaOV9mSfy6OUDBv2dEo=; b=wdfuoqhGInqWi03atPe1SD1qyAyXWxjAxuhBvMP6Mea9dil/ffnZbGnC0CAXM9N7eJ k2HthG+odYkQPtk4Vov/uEDBeGH8rcdyJSNV30QOBvmx5ZnbGkmwc5wnmrNvmt0AgjMm WHda6CuhqwWJq+EpxZ369cE6SJXNH2FrJy3aEtYq2wkVuR+xOXX2oKtT9L2MtpEzejGK dlLX+RQk5v647DJkSXMPMzlRvlfIVqHMUcJjQgJaV6ai7DRUCTCx4VdbQezeXl8c488d XPNHFV1mEWOyZFna1YoUL7fqTL6pmndxeeHEaAR+EuOnd2pO+0TW1Bya/87JqK9TcaMY 92VQ== X-Forwarded-Encrypted: i=1; AJvYcCVPYszq4rvo5DLI3dtK2cHG5lUuyYrfWlxZuD8q5s0kbh70dyl8V9OcndCSJi5iFD6JUhHSvDzRT7ZfMA==@lists.infradead.org X-Gm-Message-State: AOJu0YyjG/W/2pklWJPWmCc5wirXJ84k1Libi56scjAyZhQBBQx2OQKO nxrQnKZT9rT9gTzB3MKlvyYbqLM5ag2YOJkFUweYYO594qQA5DZGbWzZoZKQilIh7917ya+v8n9 S X-Gm-Gg: ASbGncuAy22OmkWVPm/9qX8/BP4py9PkcMhOh9RBE4T74RGoHI8wz8Gc5xwyYeE65Nn eNN/3OG5AS/4D2Wj1qpBXFWBmSwIk6r4WA3M5RucqQdMiI1JwT5Z+1cOeO654JwrP+oDBw4Cy3a x1c1KswiIqqRTObT9Y6PX0HLGJHWuT39v0Rt452bDrcThneWTfucQSRx0bpZa/DPaMrynEEr5Iq 2IheRziCVZsUP3AzeN8a8mtiBD4WuMQAChGnJDR4d5FYiXfpm10BJTAwWLA6oP2xyZ4CEvlGryL 6C5NerxzfADm5mlA+KSxG/c4KQ== X-Google-Smtp-Source: AGHT+IH0iBI7GsrizybTxNC+zOavZ1B/y8eyRteK7EdWTKItBlHpIizmBx4MRSyGuMGAUg4TIAF8EA== X-Received: by 2002:a05:6a00:2e14:b0:725:ffe:4dae with SMTP id d2e1a72fcca58-73035122ac9mr1196692b3a.10.1738718554007; Tue, 04 Feb 2025 17:22:34 -0800 (PST) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-72fe69cec0fsm11457202b3a.137.2025.02.04.17.22.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 04 Feb 2025 17:22:33 -0800 (PST) From: Deepak Gupta Date: Tue, 04 Feb 2025 17:22:08 -0800 Subject: [PATCH v9 21/26] riscv: enable kernel access to shadow stack memory via FWFT sbi call MIME-Version: 1.0 Message-Id: <20250204-v5_user_cfi_series-v9-21-b37a49c5205c@rivosinc.com> References: <20250204-v5_user_cfi_series-v9-0-b37a49c5205c@rivosinc.com> In-Reply-To: <20250204-v5_user_cfi_series-v9-0-b37a49c5205c@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan , Jann Horn , Conor Dooley Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta X-Mailer: b4 0.14.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250204_172235_393647_FF9C17E4 X-CRM114-Status: GOOD ( 10.67 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Kernel will have to perform shadow stack operations on user shadow stack. Like during signal delivery and sigreturn, shadow stack token must be created and validated respectively. Thus shadow stack access for kernel must be enabled. In future when kernel shadow stacks are enabled for linux kernel, it must be enabled as early as possible for better coverage and prevent imbalance between regular stack and shadow stack. After `relocate_enable_mmu` has been done, this is as early as possible it can enabled. Signed-off-by: Deepak Gupta --- arch/riscv/kernel/asm-offsets.c | 4 ++++ arch/riscv/kernel/head.S | 12 ++++++++++++ 2 files changed, 16 insertions(+) diff --git a/arch/riscv/kernel/asm-offsets.c b/arch/riscv/kernel/asm-offsets.c index 0c188aaf3925..21f99d5757b6 100644 --- a/arch/riscv/kernel/asm-offsets.c +++ b/arch/riscv/kernel/asm-offsets.c @@ -515,4 +515,8 @@ void asm_offsets(void) DEFINE(FREGS_A6, offsetof(struct __arch_ftrace_regs, a6)); DEFINE(FREGS_A7, offsetof(struct __arch_ftrace_regs, a7)); #endif + DEFINE(SBI_EXT_FWFT, SBI_EXT_FWFT); + DEFINE(SBI_EXT_FWFT_SET, SBI_EXT_FWFT_SET); + DEFINE(SBI_FWFT_SHADOW_STACK, SBI_FWFT_SHADOW_STACK); + DEFINE(SBI_FWFT_SET_FLAG_LOCK, SBI_FWFT_SET_FLAG_LOCK); } diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S index 356d5397b2a2..6244408ca917 100644 --- a/arch/riscv/kernel/head.S +++ b/arch/riscv/kernel/head.S @@ -164,6 +164,12 @@ secondary_start_sbi: call relocate_enable_mmu #endif call .Lsetup_trap_vector + li a7, SBI_EXT_FWFT + li a6, SBI_EXT_FWFT_SET + li a0, SBI_FWFT_SHADOW_STACK + li a1, 1 /* enable supervisor to access shadow stack access */ + li a2, SBI_FWFT_SET_FLAG_LOCK + ecall scs_load_current call smp_callin #endif /* CONFIG_SMP */ @@ -320,6 +326,12 @@ SYM_CODE_START(_start_kernel) la tp, init_task la sp, init_thread_union + THREAD_SIZE addi sp, sp, -PT_SIZE_ON_STACK + li a7, SBI_EXT_FWFT + li a6, SBI_EXT_FWFT_SET + li a0, SBI_FWFT_SHADOW_STACK + li a1, 1 /* enable supervisor to access shadow stack access */ + li a2, SBI_FWFT_SET_FLAG_LOCK + ecall scs_load_current #ifdef CONFIG_KASAN From patchwork Wed Feb 5 01:22:09 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 13960437 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 477CFC0219F for ; Wed, 5 Feb 2025 02:31:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=swzmXRjzrZahvaKS38+2rZOE8C+vtm45seRzh2II8UQ=; b=Vf1l4kJUJZf7pi 2+ettkg1yeqYtUl3IG9rIMw5vbv8uYa/dSMnKVRc/ZMg+6WE7/yK37YuMbohXBsnDW+rE2XAzmf69 31q333F1akOroe0EEzBMWPsqtigH8vODgwjiMMhJnk1WFQO6ls4qanEUHwjG2M39+Oot2Bc26hjRW +jpXiVYgQzIL9VcPy2Gs/yqYE5Q0sxxvvsDnkTeI8S8eeAKO3p0q9FyTY7tvmCo+b+3/x5Uz2nmQ1 RBnCdqwMT9BWwaAegwzdvgox1qlgznnxMQ2FVcMMOJAzvZJEulgjh1pSqvtoVN9shpy/LlRmfQb7E LF7AmaQc0Z04Pvauo1pw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tfVC2-000000028YY-3wAM; Wed, 05 Feb 2025 02:31:10 +0000 Received: from mail-pj1-x1032.google.com ([2607:f8b0:4864:20::1032]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tfU7g-000000021hh-2rUW for linux-riscv@lists.infradead.org; Wed, 05 Feb 2025 01:22:37 +0000 Received: by mail-pj1-x1032.google.com with SMTP id 98e67ed59e1d1-2f9b91dff71so2450244a91.2 for ; Tue, 04 Feb 2025 17:22:36 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1738718556; x=1739323356; darn=lists.infradead.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=opxHamP1ejpgUrZttGLg4zwDHWHLF3xPs1/Qb/08WRM=; b=2LyR6dC/d1up4noN/gD69AfnpdH4o4TWtTH3eK9AQvIapy6W2ESs1w0M14ncLHiscy IDh4EyMEl0ZDhiZk3lzJECs9wDDlHJGq0GSXQFKndNAgA+l6h8tHzY2T3+tCULHhwAf2 LTeNiiwkkW9uOSOsbTon61ut8xKsapm78ilacZsHOfjcuoZPLIUgJpooSxMqZ4b6gA9m fTI4kdVHEie4CfNLm5Bky00poWnkYEHFrxLAbqfH6Cog/YJe2pTbyBLxZzRknUI4hTy4 qZdwciTqygLitwUGlxscFC1O+wVsrozMSz5iqANLNpdDWe+6eLZQfrAKZPYP2sQgtzmH FDcA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1738718556; x=1739323356; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=opxHamP1ejpgUrZttGLg4zwDHWHLF3xPs1/Qb/08WRM=; b=bGvy2/v9QgslvSsKSFbNjnEQq21R4hW1Twh9Z5g+SDMMjCc3YgcRfKMSuRqMf/zKJv GyGL6B9UgSgLUnKcVN/QzDrLMj6U+ODPb8NVkFI0OmvDN5//47qxADTEXToiyP0FSKKF PnAcBtQIJGoS3/kf9RDY/prEAzIZbf2dVjURfnET6uEiBoW89yvd6nWp5vEEehD+t71Y 9tVjILjZdHv+74m3gt8mZ8PxYBCSRAAFExwh0yvjDZiPeAWoPo6LTKu3gPdJhrio8OZW MvHDm2YXzUzLUGl273QJp7EzXjMBmZHUag8mXlThl2Fw61hJaR8nwH5qKjQpQh2UoNVP TrqQ== X-Forwarded-Encrypted: i=1; AJvYcCXKlvPMm7/oYe+ZsHMBbECAzzUhtvOdyzV7+2v+df33WSxGhlfasL2UsMC2r5YdqVSsGW76ylDWJ0i6Ow==@lists.infradead.org X-Gm-Message-State: AOJu0YzqHjfcCXgVR/8cFq2ZMjzkbhgrapDZUGjsX6dqyxWspp+jcxEt sBxJPjjp6NYWbI/x+s1Bm4LDYYYbOCGNJxhds9mkIltzDNAmBwPElYyoxs1dhZJ8UNzYY6rwjUe g X-Gm-Gg: ASbGncuZGuF/dh8jN74Zexiif0FGepuJ0O4d8PNKWvuGXnnSOKrt4B5irCC8IXKjvzj xvhUzjPt8z8mj44mEuWewaXRY/fFgIEjeOoYWJpZwvm8CUIjt6lECmpt7ZpQtVxp+Ny8Gibff3Y FW53VbOuR3Lb91wxZI24aiCGtCLTuv5ac5xzCMOpdXtBevExfFT3IhD75kgZLnWZbVIN5LlKjYK m3eG+mJz9K6VCjBG4hqwj7LRpvQH2CvQJj+7hDhOuR/kIzQX/KGWz3MJQ6gLvdN9+aQA0TUy8cE 7TZlZAFCkmI3/8sHBVz//Ogo9w== X-Google-Smtp-Source: AGHT+IF7aU3deMwt8hgfhlcc0/P4Onueg0OBpQL+amjmp/PRJZc8dKL/Qrb5rJ/l7MtlZbqHel59Ag== X-Received: by 2002:a05:6a00:6018:b0:724:bf30:3030 with SMTP id d2e1a72fcca58-73034fbc86bmr1933458b3a.0.1738718555911; Tue, 04 Feb 2025 17:22:35 -0800 (PST) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-72fe69cec0fsm11457202b3a.137.2025.02.04.17.22.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 04 Feb 2025 17:22:35 -0800 (PST) From: Deepak Gupta Date: Tue, 04 Feb 2025 17:22:09 -0800 Subject: [PATCH v9 22/26] riscv: kernel command line option to opt out of user cfi MIME-Version: 1.0 Message-Id: <20250204-v5_user_cfi_series-v9-22-b37a49c5205c@rivosinc.com> References: <20250204-v5_user_cfi_series-v9-0-b37a49c5205c@rivosinc.com> In-Reply-To: <20250204-v5_user_cfi_series-v9-0-b37a49c5205c@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan , Jann Horn , Conor Dooley Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta X-Mailer: b4 0.14.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250204_172236_723304_78717281 X-CRM114-Status: GOOD ( 13.58 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org This commit adds a kernel command line option using which user cfi can be disabled. Signed-off-by: Deepak Gupta --- arch/riscv/kernel/usercfi.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/arch/riscv/kernel/usercfi.c b/arch/riscv/kernel/usercfi.c index 6e561256bfaf..be08e5bb6e62 100644 --- a/arch/riscv/kernel/usercfi.c +++ b/arch/riscv/kernel/usercfi.c @@ -17,6 +17,8 @@ #include #include +bool disable_riscv_usercfi; + #define SHSTK_ENTRY_SIZE sizeof(void *) bool is_shstk_enabled(struct task_struct *task) @@ -390,6 +392,9 @@ int arch_set_shadow_stack_status(struct task_struct *t, unsigned long status) unsigned long size = 0, addr = 0; bool enable_shstk = false; + if (disable_riscv_usercfi) + return 0; + if (!cpu_supports_shadow_stack()) return -EINVAL; @@ -469,6 +474,9 @@ int arch_set_indir_br_lp_status(struct task_struct *t, unsigned long status) { bool enable_indir_lp = false; + if (disable_riscv_usercfi) + return 0; + if (!cpu_supports_indirect_br_lp_instr()) return -EINVAL; @@ -501,3 +509,16 @@ int arch_lock_indir_br_lp_status(struct task_struct *task, return 0; } + +static int __init setup_global_riscv_enable(char *str) +{ + if (strcmp(str, "true") == 0) + disable_riscv_usercfi = true; + + pr_info("Setting riscv usercfi to be %s\n", + (disable_riscv_usercfi ? "disabled" : "enabled")); + + return 1; +} + +__setup("disable_riscv_usercfi=", setup_global_riscv_enable); From patchwork Wed Feb 5 01:22:10 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 13960397 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 76441C02193 for ; Wed, 5 Feb 2025 01:22:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=QtbSUQe4nKmAXnCTInEk1WY5vPoUNqfHcvrQI2XShC8=; b=4ZYoeys7Fje44Q fxaX1GFDk4EVSGb0/r3qQRfdSEyjRa0ER67euN6gcTImAYjt2Gj+Bs1LOD8RDRHwA0s/7LYdiAArd FAWfeBEOQvaOBBmImeiNgQ/Xzr/wfx9QqHq1IOxNdcpX+Am/sb2nd2JqFfiPGfzb2JTWQskzcz1FJ x3snX/wJM8CffcZaP06/CViQkaihQUZ6wGb39cYbpgofPbSrigQxbb3vx1CbB7vUl7DS1Ni7slR3U UjwZNgnR71wtzCFBb3H1XrK7X+Iu2Ev0I+KOFiIYLiiEeGxhdlFnf3+Aw+fQzt212OE9Bo67m+V+S NUqskBjqBYNuuM0iLqvw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tfU7p-000000021sZ-2viN; Wed, 05 Feb 2025 01:22:45 +0000 Received: from desiato.infradead.org ([2001:8b0:10b:1:d65d:64ff:fe57:4e05]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tfU7o-000000021pq-02K7 for linux-riscv@bombadil.infradead.org; Wed, 05 Feb 2025 01:22:44 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Cc:To:In-Reply-To:References: Message-Id:Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date: From:Sender:Reply-To:Content-ID:Content-Description; bh=9LN1OOVFFK55bIQe9Bj7KSCICvDpdODqLxcVYOIQy28=; b=XWNKKkHh5uOAXJbOkKSjDY04PN fRmbc60ZA+abyx7cTeyIz0djkvGwpfjRBwqRHJjQXLQHTewxTqB3Nx/b43FDaqFG1uv8pu3HlmI5p 2jP5fxQ1Ja3S+rnZgYTtmPeIFOq5FcrkVJf+T9kQZqbGbwAjAGTHi8K/ZhFhENX2Cc0qq124EgFuE p6VyEFqKsrZEYOWURy9EIf4P1y7NYQDSNfC+fQrhkR/DgDRX4dmX72aKk/6FwtLdO9M1ybEmwIa07 PKJ2G81dQmEkNyZGjwNPtCkx/9lD8FrqmRV+aI6flHMIEPt9jbepMuiAV3SFYWNNQC4ZB5Wr1fMMU FHy8iCgQ==; Received: from mail-pl1-x629.google.com ([2607:f8b0:4864:20::629]) by desiato.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tfU7j-0000000GTyZ-2I38 for linux-riscv@lists.infradead.org; Wed, 05 Feb 2025 01:22:42 +0000 Received: by mail-pl1-x629.google.com with SMTP id d9443c01a7336-21f1b2480a2so397215ad.0 for ; Tue, 04 Feb 2025 17:22:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1738718558; x=1739323358; darn=lists.infradead.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=9LN1OOVFFK55bIQe9Bj7KSCICvDpdODqLxcVYOIQy28=; b=fkFEVKdcna7G2nbnzXxC6mLIsQ2LzpsQ8YeEQsMI2OMMNCyzY9c1DyiQHXGzjNdx1W wNfAa6+oHIKfNH77Zz3qslR+nL//LRoOCOsTOn2wa8SqDjv7ucfIWfE2YijDQOxhgy1k XowRIQxFYBfHpN1P/DUzXqZr/iJUfck/6B+rpmUFPsCPcX3TVe0jEWYFBxWsCfzqyph6 Poq2U0RW76h3xMGhCz3QS05+LSA7OWjJEqYYz7L/OOec0SDpTb+d4Zxv+i02tfZ7PXH8 AbfA7dz1teIKbRexrmhgoUIX8NsSvyUj6+5BXhCFaPLBnf3doCGYWQc22s34rZjJgEp1 WbVQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1738718558; x=1739323358; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=9LN1OOVFFK55bIQe9Bj7KSCICvDpdODqLxcVYOIQy28=; b=BDC2BynY/cVRrxH4U64yixGTZq+tzMJjWvbufrVYbyv2J/APvRKM+pGmaasS5j7Ybe 2YSc334bgHzWxvug6sCYKUm5vZApPUSRTSg+CtXhkvUxm7CYn+0Rt+jYS/1MH2a3ljDo srEuT5dW2JLhiLgc+CLde8vwyVfTEZXu8l/ak5gtFWzOWhvEO057C8c837DhXOmbkN59 9mKGK/4V8ATMi6Cva420gBZThuTv1DfVHr/RcjDi9NjM2zHjFBwDPSzeUWdnTh3W+dAU P4jcR4TJCuKabf/735jDK1dgq/U3DOCuQ1df/6fa9JNB0WPv49r95gTjQ2TtiDwMBvZo Psgg== X-Forwarded-Encrypted: i=1; AJvYcCUr+6C+9p+k1hSER0As6PxrbHBZipct+RXJ5PPaCI/A9DKEKLBElP06PfF5YZ9p5/gudJNVefLXkuRWUQ==@lists.infradead.org X-Gm-Message-State: AOJu0Yw/MxStYYXwJwh0ry2fPv3CAmD966koqL5pN0YYadevdjtNsQQH iXy6+NMad7np6igp2tSi5y/yg9m5iyceG3Gg+LvdEMp2JG5Hy0/3N+HalPrcBHEB1hR+LN4bxPG G X-Gm-Gg: ASbGncvjIDhnL1+MlikRJAfe1LmugP5quFBBrmcz/dxbBjrOGeCltAmzLh9Cfe56c1a 5AYoiOJ20Xp5FTnJZRwm42iY/f1aAtBbwcEJ5llQCFm7mlshqaTdlbPzVVKIaUdtyZyzRaHEQ76 fAWwFxyKKq95aQjDg50laR5ucUwalMzWnoqTimgS628WbzdmboMJhg99uwmTJYJv8O4jjh7I+rY MWhAEK+aEFsV8+14fiIab65p/NJ/hJCjd0m5E2uFn+S79i57Tl3XXkygXdjMFR5soVIl5x3fQuy v0NlReNMcLfck4EWArlPnRjZHw== X-Google-Smtp-Source: AGHT+IEz0qHgqun1HMRAWwYPxj4lEXbUX4lq/KHX/YPS8k5v/b/oBuAj+3XdSaG2F4SQ1olAiHNptg== X-Received: by 2002:a05:6a20:6f09:b0:1e1:ca25:8da3 with SMTP id adf61e73a8af0-1ede8845f6amr1551216637.20.1738718557822; Tue, 04 Feb 2025 17:22:37 -0800 (PST) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-72fe69cec0fsm11457202b3a.137.2025.02.04.17.22.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 04 Feb 2025 17:22:37 -0800 (PST) From: Deepak Gupta Date: Tue, 04 Feb 2025 17:22:10 -0800 Subject: [PATCH v9 23/26] riscv: create a config for shadow stack and landing pad instr support MIME-Version: 1.0 Message-Id: <20250204-v5_user_cfi_series-v9-23-b37a49c5205c@rivosinc.com> References: <20250204-v5_user_cfi_series-v9-0-b37a49c5205c@rivosinc.com> In-Reply-To: <20250204-v5_user_cfi_series-v9-0-b37a49c5205c@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan , Jann Horn , Conor Dooley Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta X-Mailer: b4 0.14.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250205_012240_549809_129E26B4 X-CRM114-Status: GOOD ( 11.41 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org This patch creates a config for shadow stack support and landing pad instr support. Shadow stack support and landing instr support can be enabled by selecting `CONFIG_RISCV_USER_CFI`. Selecting `CONFIG_RISCV_USER_CFI` wires up path to enumerate CPU support and if cpu support exists, kernel will support cpu assisted user mode cfi. If CONFIG_RISCV_USER_CFI is selected, select `ARCH_USES_HIGH_VMA_FLAGS`, `ARCH_HAS_USER_SHADOW_STACK` and DYNAMIC_SIGFRAME for riscv. Signed-off-by: Deepak Gupta --- arch/riscv/Kconfig | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 7612c52e9b1e..0a2e50f056e8 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -250,6 +250,26 @@ config ARCH_HAS_BROKEN_DWARF5 # https://github.com/llvm/llvm-project/commit/7ffabb61a5569444b5ac9322e22e5471cc5e4a77 depends on LD_IS_LLD && LLD_VERSION < 180000 +config RISCV_USER_CFI + def_bool y + bool "riscv userspace control flow integrity" + depends on 64BIT && $(cc-option,-mabi=lp64 -march=rv64ima_zicfiss) + depends on RISCV_ALTERNATIVE + select ARCH_HAS_USER_SHADOW_STACK + select ARCH_USES_HIGH_VMA_FLAGS + select DYNAMIC_SIGFRAME + help + Provides CPU assisted control flow integrity to userspace tasks. + Control flow integrity is provided by implementing shadow stack for + backward edge and indirect branch tracking for forward edge in program. + Shadow stack protection is a hardware feature that detects function + return address corruption. This helps mitigate ROP attacks. + Indirect branch tracking enforces that all indirect branches must land + on a landing pad instruction else CPU will fault. This mitigates against + JOP / COP attacks. Applications must be enabled to use it, and old user- + space does not get protection "for free". + default y + config ARCH_MMAP_RND_BITS_MIN default 18 if 64BIT default 8 From patchwork Wed Feb 5 01:22:11 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 13960443 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7C15FC0219B for ; Wed, 5 Feb 2025 02:31:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=JGBnYRCFj2pq9AMdyqj4UEl4WGlEgnvBxRgQcjbNKgw=; b=fwDP5yA2V6sWvC F9BnrxBCnao6zMjevdNWJUloUUve8eF7x1d5pfICbmQ+XrQJ/RWKBoZuifDQuBDXle2aq62v9qXSm METBnnAPLyhYp/cZDSO1n81isv7maEowBRgxx+gFnXjPXrdKojsrl2dqTP94XBgrpgkW1Jaobxa01 DpU1/jkQM7PsgKcpvVqT4xC4YUD4J19Xvfh7qhpdGeNw5UbJFY2+Rmr0cT1sv0uiOi/uD83iJgoMr 8sMXa8fcyDeVZb9usNmqLZ9QqASXS++fuji0cc1zFSnl7FxohSJAWYJRVuXKuJJSPVUuHnplPYD8k UjAdizED662OAGlP0mog==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tfVC5-000000028ai-1w5u; Wed, 05 Feb 2025 02:31:13 +0000 Received: from desiato.infradead.org ([2001:8b0:10b:1:d65d:64ff:fe57:4e05]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tfU7z-00000002218-017h for linux-riscv@bombadil.infradead.org; Wed, 05 Feb 2025 01:22:55 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Cc:To:In-Reply-To:References: Message-Id:Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date: From:Sender:Reply-To:Content-ID:Content-Description; bh=vh4CUvpz/fzJO7m3g4Lrx30VWLQNLgBESiJnDVTGIvg=; b=PAE4jon6k9OgWSu0zJ2l0mmCaA ZoIzW++BufaOxlcLSl9o4TF/CtFHzYedLdUosZ01Wr4H85L31hLbcv31yZgLREjmwEsEpN/l71/qO gaUYspi+ye+eiNurikFuedaNy85Y4Wavm8XpUtHBnJ4UOHjUJsbF2ER+FTOjxyZ5euWpUE2viOP07 TlGf9QmGJcWpA7yDD2XPnk/cHyB+jGU8Qo75XFc/jLs0M8lZ/PCvp4m/SsiEIqx6y5t98z4xnWtdG 2Nd8+66cqbd3vxtvzZRtuasmtzAKSQgnLUUOE0I22knJkq0ZnuD6d6SnAs+QlPNqeuKMxkBdYuiI5 RiJPM9+g==; Received: from mail-pl1-x62e.google.com ([2607:f8b0:4864:20::62e]) by desiato.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tfU7m-0000000GTzV-1XM6 for linux-riscv@lists.infradead.org; Wed, 05 Feb 2025 01:22:44 +0000 Received: by mail-pl1-x62e.google.com with SMTP id d9443c01a7336-21f1b2480a2so397565ad.0 for ; Tue, 04 Feb 2025 17:22:41 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1738718560; x=1739323360; darn=lists.infradead.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=vh4CUvpz/fzJO7m3g4Lrx30VWLQNLgBESiJnDVTGIvg=; b=TU8KS7QV5POfGBvwdOS08B8NQcYRpI/i3F2MAk66p/deK0xTL3Ng45kXiyuFNpwFkj pt3KPjUjm4dKFlk28IgiL6a0RRLrWjsCR8wmPjWU4xsdu2+g335JD9n1135ZAO6aQHbA 6MZwcr98i2jPDy2xo/tKKw1KwV4KtQPTsddT/l598XwLgTlou8/8lPrRlBdtVw/oUo/a 3wU1otAnDJy/1qJMj9hplLU8Prvu+8wMP2NldL9WAt2UIbipyjU2doTDN0lISOjOAsUa J56IwbmPNZjrHiOrsk3kRpX62Hl6gGCS5p3ML9nXH2A4YnT6Jfea9OthLL7cGaOLV8YW Znfw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1738718560; x=1739323360; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=vh4CUvpz/fzJO7m3g4Lrx30VWLQNLgBESiJnDVTGIvg=; b=mcFu9XixOLjMlQUMfZUZvJVq0oDNVlqDpwG2ZGeNdJFgnQtwFHqRKoFtQvFvBIO9ZT RDPPpE2A4y9TDH2gz0h5p94+11hLD3k4FoMINBcmEVSe5XQ6mYv9sDNbB9k+ejcIA6Lm JhsOwodsA9XdhtHAaPf5VEXuMkF2M1UCK+mJrj0iK3vvoh0McR+Lg9Cj3uS9KKG0JU7Q oFXalw0TjI1DOLsCgZMLUmBc98oWyRtsfZ80POgTY6fWtxWxcT5CWkkXg5kPP2mQapRf No3kCthMCaK6TUvuDyDN3BY+Y/9Xr+jGRtV102iBnXx8VuJ1VKDFyLL7JpL9A8Q73+A9 hnUw== X-Forwarded-Encrypted: i=1; AJvYcCU5F8aR77dtZUZOZ3fSvdH1vGtTdHRYr7t4fDxopwQ6ZyMY0ogH/HpUC0KMo6wk0zza4C2ud5ZGLDyqiQ==@lists.infradead.org X-Gm-Message-State: AOJu0YwhdkSTMjyRxXNOInopLgvkJAMYRZeT9huNYuAe+2EGIrtXUdG4 Qsz4cr7IpTvGVHyHKVET6xmtRW569RiSBWrR1JPMoCYtrdAkU7juompXr2dZ9V9FwSbBIcPmKut B X-Gm-Gg: ASbGncve6im7vv/L9jgebTjrYYkusznDWCpqOEauTbaDuSi04uSAPtRBMKiztbP63Ib bicHl6KT4fY+vx8C39oZvIDSxpzKe07CdTbjmG46Xic14MwgOOWFEPuw5bd0zYXxc3ePgSSDI/S 42zYTHmwgjFNVb/qTg8vMfKYEkYOdQhIuV8YdrHA5VHzu0EjmWGrzjOCxfV0KMi3GtFUlTolIYh 6EZUp16ybzLqit86unBMqy3sjx/UXKKcNbjCF7OzY9c4hrkYitTTkqxmK/Q8ghDpmcysE5S0Typ 87L6uQZNr7Bn6B2qf6ia+R73XQ== X-Google-Smtp-Source: AGHT+IGeoQKYcs4hg862DdjQrrtWBKGNz8eQ6PlumY8b2Mk053BpOYNGRkKeyLaC94q3jdNjysT+gg== X-Received: by 2002:a05:6a20:2d0b:b0:1e1:9f77:da92 with SMTP id adf61e73a8af0-1ede88ab501mr1525342637.33.1738718559719; Tue, 04 Feb 2025 17:22:39 -0800 (PST) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-72fe69cec0fsm11457202b3a.137.2025.02.04.17.22.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 04 Feb 2025 17:22:39 -0800 (PST) From: Deepak Gupta Date: Tue, 04 Feb 2025 17:22:11 -0800 Subject: [PATCH v9 24/26] riscv: Documentation for landing pad / indirect branch tracking MIME-Version: 1.0 Message-Id: <20250204-v5_user_cfi_series-v9-24-b37a49c5205c@rivosinc.com> References: <20250204-v5_user_cfi_series-v9-0-b37a49c5205c@rivosinc.com> In-Reply-To: <20250204-v5_user_cfi_series-v9-0-b37a49c5205c@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan , Jann Horn , Conor Dooley Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta X-Mailer: b4 0.14.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250205_012242_656463_4F107ABD X-CRM114-Status: GOOD ( 19.28 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Adding documentation on landing pad aka indirect branch tracking on riscv and kernel interfaces exposed so that user tasks can enable it. Signed-off-by: Deepak Gupta --- Documentation/arch/riscv/index.rst | 1 + Documentation/arch/riscv/zicfilp.rst | 115 +++++++++++++++++++++++++++++++++++ 2 files changed, 116 insertions(+) diff --git a/Documentation/arch/riscv/index.rst b/Documentation/arch/riscv/index.rst index eecf347ce849..be7237b69682 100644 --- a/Documentation/arch/riscv/index.rst +++ b/Documentation/arch/riscv/index.rst @@ -14,6 +14,7 @@ RISC-V architecture uabi vector cmodx + zicfilp features diff --git a/Documentation/arch/riscv/zicfilp.rst b/Documentation/arch/riscv/zicfilp.rst new file mode 100644 index 000000000000..a188d78fcde6 --- /dev/null +++ b/Documentation/arch/riscv/zicfilp.rst @@ -0,0 +1,115 @@ +.. SPDX-License-Identifier: GPL-2.0 + +:Author: Deepak Gupta +:Date: 12 January 2024 + +==================================================== +Tracking indirect control transfers on RISC-V Linux +==================================================== + +This document briefly describes the interface provided to userspace by Linux +to enable indirect branch tracking for user mode applications on RISV-V + +1. Feature Overview +-------------------- + +Memory corruption issues usually result in to crashes, however when in hands of +an adversary and if used creatively can result into variety security issues. + +One of those security issues can be code re-use attacks on program where adversary +can use corrupt function pointers and chain them together to perform jump oriented +programming (JOP) or call oriented programming (COP) and thus compromising control +flow integrity (CFI) of the program. + +Function pointers live in read-write memory and thus are susceptible to corruption +and allows an adversary to reach any program counter (PC) in address space. On +RISC-V zicfilp extension enforces a restriction on such indirect control +transfers: + +- indirect control transfers must land on a landing pad instruction ``lpad``. + There are two exception to this rule: + + - rs1 = x1 or rs1 = x5, i.e. a return from a function and returns are + protected using shadow stack (see zicfiss.rst) + + - rs1 = x7. On RISC-V compiler usually does below to reach function + which is beyond the offset possible J-type instruction:: + + auipc x7, + jalr (x7) + + Such form of indirect control transfer are still immutable and don't rely + on memory and thus rs1=x7 is exempted from tracking and considered software + guarded jumps. + +``lpad`` instruction is pseudo of ``auipc rd, `` with ``rd=x0`` and +is a HINT nop. ``lpad`` instruction must be aligned on 4 byte boundary and +compares 20 bit immediate withx7. If ``imm_20bit`` == 0, CPU don't perform any +comparision with ``x7``. If ``imm_20bit`` != 0, then ``imm_20bit`` must match +``x7`` else CPU will raise ``software check exception`` (``cause=18``) with +``*tval = 2``. + +Compiler can generate a hash over function signatures and setup them (truncated +to 20bit) in x7 at callsites and function prologues can have ``lpad`` with same +function hash. This further reduces number of program counters a call site can +reach. + +2. ELF and psABI +----------------- + +Toolchain sets up :c:macro:`GNU_PROPERTY_RISCV_FEATURE_1_FCFI` for property +:c:macro:`GNU_PROPERTY_RISCV_FEATURE_1_AND` in notes section of the object file. + +3. Linux enabling +------------------ + +User space programs can have multiple shared objects loaded in its address space +and it's a difficult task to make sure all the dependencies have been compiled +with support of indirect branch. Thus it's left to dynamic loader to enable +indirect branch tracking for the program. + +4. prctl() enabling +-------------------- + +:c:macro:`PR_SET_INDIR_BR_LP_STATUS` / :c:macro:`PR_GET_INDIR_BR_LP_STATUS` / +:c:macro:`PR_LOCK_INDIR_BR_LP_STATUS` are three prctls added to manage indirect +branch tracking. prctls are arch agnostic and returns -EINVAL on other arches. + +* prctl(PR_SET_INDIR_BR_LP_STATUS, unsigned long arg) + +If arg1 is :c:macro:`PR_INDIR_BR_LP_ENABLE` and if CPU supports ``zicfilp`` +then kernel will enabled indirect branch tracking for the task. Dynamic loader +can issue this :c:macro:`prctl` once it has determined that all the objects +loaded in address space support indirect branch tracking. Additionally if there +is a `dlopen` to an object which wasn't compiled with ``zicfilp``, dynamic +loader can issue this prctl with arg1 set to 0 (i.e. +:c:macro:`PR_INDIR_BR_LP_ENABLE` being clear) + +* prctl(PR_GET_INDIR_BR_LP_STATUS, unsigned long arg) + +Returns current status of indirect branch tracking. If enabled it'll return +:c:macro:`PR_INDIR_BR_LP_ENABLE` + +* prctl(PR_LOCK_INDIR_BR_LP_STATUS, unsigned long arg) + +Locks current status of indirect branch tracking on the task. User space may +want to run with strict security posture and wouldn't want loading of objects +without ``zicfilp`` support in it and thus would want to disallow disabling of +indirect branch tracking. In that case user space can use this prctl to lock +current settings. + +5. violations related to indirect branch tracking +-------------------------------------------------- + +Pertaining to indirect branch tracking, CPU raises software check exception in +following conditions: + +- missing ``lpad`` after indirect call / jmp +- ``lpad`` not on 4 byte boundary +- ``imm_20bit`` embedded in ``lpad`` instruction doesn't match with ``x7`` + +In all 3 cases, ``*tval = 2`` is captured and software check exception is +raised (``cause=18``) + +Linux kernel will treat this as :c:macro:`SIGSEV`` with code = +:c:macro:`SEGV_CPERR` and follow normal course of signal delivery. From patchwork Wed Feb 5 01:22:12 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 13960446 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 59648C0219A for ; Wed, 5 Feb 2025 02:31:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=9TQ+a8yVy3B/bxqeOdneO2JL5XTeOfgmUQ3FcZuqPaw=; b=UJzgl+tk6t9M8c oVsPm6j45U1tlGgFCFK5EoeoF1uAPYjaRu9weEGFx4v6az/5iUAsvu74nNyLnelrlximvPJRVW0l6 32arCHOfJvrdi92ddVPSu6ZthMDjk0aYTu4+pznG2Nq37mpfL36ND9Z2ut4otHvZ2/xJ19iUEsqWh 8pr89I0M5SmbuipL4ONex7wNkQQ9fauWq/4a5Dvm2SCpW/66hHZmCcKhgtBC2wTiP4Dv8FNSwJZaZ H+7ufyPkakK8bkWsHwx0qKPHJEqebQjw1GmFqjQJ11pFNiJnOMGRIr7nEoGL0Mxb6J+MRxwKkmfUT YRQ4I3QhrZbYxR3W0eIw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tfVC6-000000028bN-0YZL; Wed, 05 Feb 2025 02:31:14 +0000 Received: from desiato.infradead.org ([2001:8b0:10b:1:d65d:64ff:fe57:4e05]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tfU83-0000000224k-1B7o for linux-riscv@bombadil.infradead.org; Wed, 05 Feb 2025 01:22:59 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Cc:To:In-Reply-To:References: Message-Id:Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date: From:Sender:Reply-To:Content-ID:Content-Description; bh=tdDNQkSVTKtNTxsV0uSmAnlAiDQNW7ggaTdWphzDp8I=; b=FRgYa7NDEPeTPe6ZQReNQKtWQo HzRh4HsRu1Nh8sgACLjOn/yGNJWdQ7z1gv0hyBvZ+Lgsmx7Nnn0OfG9Hogz2bxzsYRXHjCywPiQqy QUtQiQri0D8lFF+dEOI5g48n1vH/DrMVjSdfauTBmPjypoLdPqEz9u2yA2siw4hFCGwN76u8T2pF3 WFPkUZ25m6Axq5ZsF3skp8fqqOvZzrxKy5+wBHinG4+utM3LgsQmCAohtjhEq73+hI6y+nMn6bOHV dtRr37+ZugheNbhg31/xSMeLEyxVNdBFq2vEUwHY2fm4egrIldBUtFWEbbyc2623hjPY4Cbiu64P5 Bk8/IX0Q==; Received: from mail-pl1-f178.google.com ([209.85.214.178]) by desiato.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tfU7o-0000000GU12-3AVu for linux-riscv@lists.infradead.org; Wed, 05 Feb 2025 01:22:51 +0000 Received: by mail-pl1-f178.google.com with SMTP id d9443c01a7336-21f1b2480a2so397915ad.0 for ; Tue, 04 Feb 2025 17:22:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1738718562; x=1739323362; darn=lists.infradead.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=tdDNQkSVTKtNTxsV0uSmAnlAiDQNW7ggaTdWphzDp8I=; b=Wh19o8GDkrWb9ce0JDrDASzx+zcjxLeQ+mzKc+NMENEhlMPmHsCRtUt8DwDAQB9PIS LJ7bpIdn9VwZQXPkwb0a36Na8Zw0XHOZa2MdXDTxfdvjmiug33ig4bxI5Y/rDmAPoY9m v6xsi+B1BeEohkF0czxmN4UbelWu3pNg0tRyWf7p6d9HbaOKLp2/Lxll93Qlr1sQhgzy Blvg+peVHV2XdF8ijJp6sMBxK/4/1uoU4jWO3828+SVH2lTRFExyoIQVZPytDIB6wf/R iO3EIai3xB2SnMXJMgCBWdLBGOGPIdASTDBrX1rGGoSePKBpOdZA2a5ClQ+GirbzqmOm nb+w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1738718562; x=1739323362; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=tdDNQkSVTKtNTxsV0uSmAnlAiDQNW7ggaTdWphzDp8I=; b=Di/YrPAYfHjF/5fONXgicQld4dD7YUpUlnOYR7YhDiLAUf1hIKdcuihYlebFd2l/Xu gducHdPIy+wsrU/EI2yOkdxxb1bom17qQ+xLellycr/O+zYE36mQJ+c9iU2sIrjX4MeM Sql4vsvZCmmsG5Tzy63EPaMv/gc7O6o8BtbCCORZl/mF7ymrDF225Qi0oKjxmKYlNnaT Yp1/a/4Ii0UZjJf9NfZvszL8SG+myq4WXsYf1JfWrajhKN0Fnl9BIN/2E/qpoJv7zFGn w8KMkTXmWz6dLkzpriHc9zYY98Qu/v8jlTlfEubDOF21KHTiiuNT/e6vgTAwFwAkHmKR CCPA== X-Forwarded-Encrypted: i=1; AJvYcCV3W3WYy6C5ZbFbqKxHTdUq2A6cJ3xlDzN8i6A5tTwirY/KGDIxMlm7KSRQHi8FqLC2gyLbu1D0Dz/kNw==@lists.infradead.org X-Gm-Message-State: AOJu0YwRRYhSkFQ+mfnb2U2Fv6Z8+hq/Nn22m+WHjTVFxY3+2/71XMwf 0hUblV+5NIpyHuqjqI9rIf8NPwbeE2AHuywpwe45dtAvSxvR4AXBcYZcFSOFUdyxdfdF4mgTW5A X X-Gm-Gg: ASbGncte2ytC1WW5JBSGpWHG42QBaOluq120sY9vm8BQZ4yUdtJd6mHHmZdP/4OyBh+ HMrONA7JTOL+Cg/kwlg+f76RJ/1hLkfAfggVSKKPa8laT2Y0lp6KYp5758tVDJTz04vhKtcNEAn Jg/R6nNb4ynh+ezEu3kE/vU+sPSwk3aSWyvQLrGHdqEWTa/3vkMqhJNWLTLIA+dUqgQZ9+gQStK bubLbdxwvP3CYsfDy0VxmsmYfFhKWy65BM8SI3tK9ksics/mwx7EI6TELK5Iy16MDxsDQNNm83Q VgGZ2E0ei2RoGKAUTBm+hjOiwQ== X-Google-Smtp-Source: AGHT+IGL7fIu4kBCNVhHF/oYTJgronEm0XH3kZauHP9nqwG/U0J2y3PAuF3fExMjCq+Sq89z969Y4g== X-Received: by 2002:a05:6a21:2d05:b0:1e1:c0d7:7502 with SMTP id adf61e73a8af0-1ede88b872dmr1661901637.37.1738718561611; Tue, 04 Feb 2025 17:22:41 -0800 (PST) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-72fe69cec0fsm11457202b3a.137.2025.02.04.17.22.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 04 Feb 2025 17:22:41 -0800 (PST) From: Deepak Gupta Date: Tue, 04 Feb 2025 17:22:12 -0800 Subject: [PATCH v9 25/26] riscv: Documentation for shadow stack on riscv MIME-Version: 1.0 Message-Id: <20250204-v5_user_cfi_series-v9-25-b37a49c5205c@rivosinc.com> References: <20250204-v5_user_cfi_series-v9-0-b37a49c5205c@rivosinc.com> In-Reply-To: <20250204-v5_user_cfi_series-v9-0-b37a49c5205c@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan , Jann Horn , Conor Dooley Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta X-Mailer: b4 0.14.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250205_012249_776205_DBE1CDB5 X-CRM114-Status: GOOD ( 23.57 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Adding documentation on shadow stack for user mode on riscv and kernel interfaces exposed so that user tasks can enable it. Signed-off-by: Deepak Gupta --- Documentation/arch/riscv/index.rst | 1 + Documentation/arch/riscv/zicfiss.rst | 176 +++++++++++++++++++++++++++++++++++ 2 files changed, 177 insertions(+) diff --git a/Documentation/arch/riscv/index.rst b/Documentation/arch/riscv/index.rst index be7237b69682..e240eb0ceb70 100644 --- a/Documentation/arch/riscv/index.rst +++ b/Documentation/arch/riscv/index.rst @@ -15,6 +15,7 @@ RISC-V architecture vector cmodx zicfilp + zicfiss features diff --git a/Documentation/arch/riscv/zicfiss.rst b/Documentation/arch/riscv/zicfiss.rst new file mode 100644 index 000000000000..5ba389f15b3f --- /dev/null +++ b/Documentation/arch/riscv/zicfiss.rst @@ -0,0 +1,176 @@ +.. SPDX-License-Identifier: GPL-2.0 + +:Author: Deepak Gupta +:Date: 12 January 2024 + +========================================================= +Shadow stack to protect function returns on RISC-V Linux +========================================================= + +This document briefly describes the interface provided to userspace by Linux +to enable shadow stack for user mode applications on RISV-V + +1. Feature Overview +-------------------- + +Memory corruption issues usually result in to crashes, however when in hands of +an adversary and if used creatively can result into variety security issues. + +One of those security issues can be code re-use attacks on program where +adversary can use corrupt return addresses present on stack and chain them +together to perform return oriented programming (ROP) and thus compromising +control flow integrity (CFI) of the program. + +Return addresses live on stack and thus in read-write memory and thus are +susceptible to corruption and allows an adversary to reach any program counter +(PC) in address space. On RISC-V ``zicfiss`` extension provides an alternate +stack termed as shadow stack on which return addresses can be safely placed in +prolog of the function and retrieved in epilog. ``zicfiss`` extension makes +following changes: + +- PTE encodings for shadow stack virtual memory + An earlier reserved encoding in first stage translation i.e. + PTE.R=0, PTE.W=1, PTE.X=0 becomes PTE encoding for shadow stack pages. + +- ``sspush x1/x5`` instruction pushes (stores) ``x1/x5`` to shadow stack. + +- ``sspopchk x1/x5`` instruction pops (loads) from shadow stack and compares + with ``x1/x5`` and if un-equal, CPU raises ``software check exception`` with + ``*tval = 3`` + +Compiler toolchain makes sure that function prologue have ``sspush x1/x5`` to +save return address on shadow stack in addition to regular stack. Similarly +function epilogs have ``ld x5, offset(x2)`` followed by ``sspopchk x5`` to +ensure that popped value from regular stack matches with popped value from +shadow stack. + +2. Shadow stack protections and linux memory manager +----------------------------------------------------- + +As mentioned earlier, shadow stack get new page table encodings and thus have +some special properties assigned to them and instructions that operate on them +as below: + +- Regular stores to shadow stack memory raises access store faults. This way + shadow stack memory is protected from stray inadvertant writes. + +- Regular loads to shadow stack memory are allowed. This allows stack trace + utilities or backtrace functions to read true callstack (not tampered). + +- Only shadow stack instructions can generate shadow stack load or shadow stack + store. + +- Shadow stack load / shadow stack store on read-only memory raises AMO/store + page fault. Thus both ``sspush x1/x5`` and ``sspopchk x1/x5`` will raise AMO/ + store page fault. This simplies COW handling in kernel During fork, kernel + can convert shadow stack pages into read-only memory (as it does for regular + read-write memory) and as soon as subsequent ``sspush`` or ``sspopchk`` in + userspace is encountered, then kernel can perform COW. + +- Shadow stack load / shadow stack store on read-write, read-write-execute + memory raises an access fault. This is a fatal condition because shadow stack + should never be operating on read-write, read-write-execute memory. + +3. ELF and psABI +----------------- + +Toolchain sets up :c:macro:`GNU_PROPERTY_RISCV_FEATURE_1_BCFI` for property +:c:macro:`GNU_PROPERTY_RISCV_FEATURE_1_AND` in notes section of the object file. + +4. Linux enabling +------------------ + +User space programs can have multiple shared objects loaded in its address space +and it's a difficult task to make sure all the dependencies have been compiled +with support of shadow stack. Thus it's left to dynamic loader to enable +shadow stack for the program. + +5. prctl() enabling +-------------------- + +:c:macro:`PR_SET_SHADOW_STACK_STATUS` / :c:macro:`PR_GET_SHADOW_STACK_STATUS` / +:c:macro:`PR_LOCK_SHADOW_STACK_STATUS` are three prctls added to manage shadow +stack enabling for tasks. prctls are arch agnostic and returns -EINVAL on other +arches. + +* prctl(PR_SET_SHADOW_STACK_STATUS, unsigned long arg) + +If arg1 :c:macro:`PR_SHADOW_STACK_ENABLE` and if CPU supports ``zicfiss`` then +kernel will enable shadow stack for the task. Dynamic loader can issue this +:c:macro:`prctl` once it has determined that all the objects loaded in address +space have support for shadow stack. Additionally if there is a +:c:macro:`dlopen` to an object which wasn't compiled with ``zicfiss``, dynamic +loader can issue this prctl with arg1 set to 0 (i.e. +:c:macro:`PR_SHADOW_STACK_ENABLE` being clear) + +* prctl(PR_GET_SHADOW_STACK_STATUS, unsigned long *arg) + +Returns current status of indirect branch tracking. If enabled it'll return +:c:macro:`PR_SHADOW_STACK_ENABLE`. + +* prctl(PR_LOCK_SHADOW_STACK_STATUS, unsigned long arg) + +Locks current status of shadow stack enabling on the task. User space may want +to run with strict security posture and wouldn't want loading of objects +without ``zicfiss`` support in it and thus would want to disallow disabling of +shadow stack on current task. In that case user space can use this prctl to +lock current settings. + +5. violations related to returns with shadow stack enabled +----------------------------------------------------------- + +Pertaining to shadow stack, CPU raises software check exception in following +condition: + +- On execution of ``sspopchk x1/x5``, ``x1/x5`` didn't match top of shadow + stack. If mismatch happens then cpu does ``*tval = 3`` and raise software + check exception. + +Linux kernel will treat this as :c:macro:`SIGSEV`` with code = +:c:macro:`SEGV_CPERR` and follow normal course of signal delivery. + +6. Shadow stack tokens +----------------------- +Regular stores on shadow stacks are not allowed and thus can't be tampered +with via arbitrary stray writes due to bugs. Method of pivoting / switching to +shadow stack is simply writing to csr ``CSR_SSP`` changes active shadow stack. +This can be problematic because usually value to be written to ``CSR_SSP`` will +be loaded somewhere in writeable memory and thus allows an adversary to +corruption bug in software to pivot to an any address in shadow stack range. +Shadow stack tokens can help mitigate this problem by making sure that: + +- When software is switching away from a shadow stack, shadow stack pointer + should be saved on shadow stack itself and call it ``shadow stack token`` + +- When software is switching to a shadow stack, it should read the + ``shadow stack token`` from shadow stack pointer and verify that + ``shadow stack token`` itself is pointer to shadow stack itself. + +- Once the token verification is done, software can perform the write to + ``CSR_SSP`` to switch shadow stack. + +Here software can be user mode task runtime itself which is managing various +contexts as part of single thread. Software can be kernel as well when kernel +has to deliver a signal to user task and must save shadow stack pointer. Kernel +can perform similar procedure by saving a token on user shadow stack itself. +This way whenever :c:macro:`sigreturn` happens, kernel can read the token and +verify the token and then switch to shadow stack. Using this mechanism, kernel +helps user task so that any corruption issue in user task is not exploited by +adversary by arbitrarily using :c:macro:`sigreturn`. Adversary will have to +make sure that there is a ``shadow stack token`` in addition to invoking +:c:macro:`sigreturn` + +7. Signal shadow stack +----------------------- +Following structure has been added to sigcontext for RISC-V:: + + struct __sc_riscv_cfi_state { + unsigned long ss_ptr; + }; + +As part of signal delivery, shadow stack token is saved on current shadow stack +itself and updated pointer is saved away in :c:macro:`ss_ptr` field in +:c:macro:`__sc_riscv_cfi_state` under :c:macro:`sigcontext`. Existing shadow +stack allocation is used for signal delivery. During :c:macro:`sigreturn`, +kernel will obtain :c:macro:`ss_ptr` from :c:macro:`sigcontext` and verify the +saved token on shadow stack itself and switch shadow stack. From patchwork Wed Feb 5 01:22:13 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Deepak Gupta X-Patchwork-Id: 13960447 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C80FCC02199 for ; Wed, 5 Feb 2025 02:31:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Gj2sMvOMp3Jj4q8lsR+Ze44GE6tPEoF3P9lzbjbgh8c=; b=0SNnUsl38k3wJE s2uSrpms0KtZqMn9b+UiSBb+8wpUl+aMTkZLEJ5YabjZztsa8aNgwsSqELKpHE/40WzR1qoE0ZXnR z8Sjw/08ZUp4LPtKNEvNraqKGRi9gBK3eksl6iaD+b6TVEdKsHVhxTLIFxtAQLc52m+2YtmATvxNs k3005qsS67gFvwp1AoRMd/yksYLCZTTyHPZKTzMEMbNelMeuNmRZZ2OBJ3RFRFlqFdR9SqDlhjhlt JNosSJNHhTBafsvJnEQ54w3n/uYFUmdVL9QGRVbNq5uwfX/f/DCbkVFlWl9IV3aNJqizOzpsG+wt1 WVTo+o1WjqQ/U7cANl9w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tfVC6-000000028c6-3Fqs; Wed, 05 Feb 2025 02:31:14 +0000 Received: from desiato.infradead.org ([2001:8b0:10b:1:d65d:64ff:fe57:4e05]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tfU83-00000002255-2uuN for linux-riscv@bombadil.infradead.org; Wed, 05 Feb 2025 01:22:59 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Cc:To:In-Reply-To:References: Message-Id:Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date: From:Sender:Reply-To:Content-ID:Content-Description; bh=ruj/JnwPHtkrEOpCEVLVNX7RrlNYJUu0NWWeo3U6Fsk=; b=XOvXKkaaQzX8g+ijAQc8Bxa/pK gtTdZUBcxCLfigqfFZpcD3Asq5fMiZySUrcAiXVmyY/fALRoHRXGk12DCXi7hcFpltOHPiY95LVJN xZs5mcD/Vhs8GegOVQp3SAtuv4pQUvNxrV9Tsr7s4ldGIG38/U9rlcFTnYvKxL1RBreUV9OVMStn6 aIj78PNAeWX5hFm17xt/ECu6sbMjvtoFBG66K1pi+FB0Upbdlvbu/0RzGnVgkzDAayUr+ePK85q+l JBkjXYzjODrG4vxibUAWOUqHoRyXssyezhzMFxn9cpEAGJC0eu6yKLdkn/V7n6FpvNMiYiyinTtir 351WKwEA==; Received: from mail-pj1-x1035.google.com ([2607:f8b0:4864:20::1035]) by desiato.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tfU7q-0000000GU2Z-2ZAO for linux-riscv@lists.infradead.org; Wed, 05 Feb 2025 01:22:53 +0000 Received: by mail-pj1-x1035.google.com with SMTP id 98e67ed59e1d1-2f9dbd7d80dso908474a91.1 for ; Tue, 04 Feb 2025 17:22:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1738718564; x=1739323364; darn=lists.infradead.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=ruj/JnwPHtkrEOpCEVLVNX7RrlNYJUu0NWWeo3U6Fsk=; b=pxLytL1MSpVw2L183Xmh+oJfwZid1iIST/RTSdmnbc21OkcehfPHrdzHALiVG7lObH UM/SJ7Y60lBdb/yHz6ZgO0+wC2lkt3+F2P/BevjoE9nkk+M0NqGFmr9ljzsEy4w/7q0F QyR9KF/9FAVk/FyGsJDEcsNTPgOL0u3KIL6NVkPkEvUuBTnW9O4e0Y3mrxR6U8R3PxyT y2wUApaVk/TYYV27o/gDxySfhgMiP2ceKdIA1/F+BbtkUov77JIaygULYtywUztDTafJ goMJxpMjVtnN1rPEyuE+kaBwgzjlvtDrOxr5t/qJD8oAuJsuXo8ndGnOCT/WCqD+THAO P71A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1738718564; x=1739323364; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ruj/JnwPHtkrEOpCEVLVNX7RrlNYJUu0NWWeo3U6Fsk=; b=EEDZNCKN/0l/31RIvwStPqkn3BWKL7fR8lTxF9rN+8axOaWolUq8pWc4VLfhtKuAPx va0bhgPK/4Xfn9vTQKfzev911BUPKYHzKGEmgsbuJ7ha/dfECH1kgowBMcb7PfsOdmmb FqAX0MrJGuMvlNejWKAfOxw/zk+scFXGk+BwwVT9LCyHaPQRbTuCV3bRApTF80NggRbr HambmTNFp0/yC/ejZYDExXOKhhlaxz9kwv81TUsxQNJfx3AAgZ1+w/qab59xkfURUC7W t4kby1I1BZQrUycp1WVeGgmX+bRvhPApRZD42xy5jYp7EjWTn4Rn1/vYoj6RlM6GhWal I2sA== X-Forwarded-Encrypted: i=1; AJvYcCU9hbEXQOk+2v83hb/AN/7LipjG7Fdl8PSvou8IoNNhKqO6qD669ee8MUhS6sTb/A6WgAoF2mreBrZpCA==@lists.infradead.org X-Gm-Message-State: AOJu0YwwaA7/FTWnhguiNpFehTdTHRNo//zLEwRwPS0FgVz6PDnkLimZ ZXvXaeirZkDjPQlY7s29ySfs2TEl2DPyUH5pBPeztxOUUBzls0qv37TOUqHYJYyofgR+/Gz6Aqt 8 X-Gm-Gg: ASbGnct9e9HWOd7rF1ZCmVFz0glgJk13mYSIimbalQSgpyFrwaqwrUoxXoYj9k6kcgx TsXops6kzk0qYKXxPbXtumJD7vWnZtunrpSJT4Cj1NQEnAL+eyt+VDr2adO/7b5e0rCPXSyZPO0 lTJJguImqXVi7GzO2atuTaDM5JPJKx6tXQy76Isdz3XjGUNSl2PEUv2ek1BUe32NAEUoaSZPvGd C+jyqWzb6+/yeMwUmrsSVbA+wC4cHQR1PPZmwK0MEun+Oiu8JhQrVhl4fhegC5nLhlTFh1c2Bnz ABnauRxOEowSMwF0cf4sL313Cw== X-Google-Smtp-Source: AGHT+IGovFmix8KI5SEIHoNgZcqFZZ5GF0zJzXSysIVc548LH6c/1u2ve/E4BqdnIk+ftzZNWRYx3A== X-Received: by 2002:aa7:9a82:0:b0:728:e906:e446 with SMTP id d2e1a72fcca58-7303521cbb1mr2012625b3a.24.1738718563525; Tue, 04 Feb 2025 17:22:43 -0800 (PST) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-72fe69cec0fsm11457202b3a.137.2025.02.04.17.22.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 04 Feb 2025 17:22:43 -0800 (PST) From: Deepak Gupta Date: Tue, 04 Feb 2025 17:22:13 -0800 Subject: [PATCH v9 26/26] kselftest/riscv: kselftest for user mode cfi MIME-Version: 1.0 Message-Id: <20250204-v5_user_cfi_series-v9-26-b37a49c5205c@rivosinc.com> References: <20250204-v5_user_cfi_series-v9-0-b37a49c5205c@rivosinc.com> In-Reply-To: <20250204-v5_user_cfi_series-v9-0-b37a49c5205c@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan , Jann Horn , Conor Dooley Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, Deepak Gupta X-Mailer: b4 0.14.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250205_012250_563712_EC759F49 X-CRM114-Status: GOOD ( 23.04 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Adds kselftest for RISC-V control flow integrity implementation for user mode. There is not a lot going on in kernel for enabling landing pad for user mode. cfi selftest are intended to be compiled with zicfilp and zicfiss enabled compiler. Thus kselftest simply checks if landing pad and shadow stack for the binary and process are enabled or not. selftest then register a signal handler for SIGSEGV. Any control flow violation are reported as SIGSEGV with si_code = SEGV_CPERR. Test will fail on receiving any SEGV_CPERR. Shadow stack part has more changes in kernel and thus there are separate tests for that - Exercise `map_shadow_stack` syscall - `fork` test to make sure COW works for shadow stack pages - gup tests Kernel uses FOLL_FORCE when access happens to memory via /proc//mem. Not breaking that for shadow stack. - signal test. Make sure signal delivery results in token creation on shadow stack and consumes (and verifies) token on sigreturn - shadow stack protection test. attempts to write using regular store instruction on shadow stack memory must result in access faults Test outut ========== """ TAP version 13 1..5 This is to ensure shadow stack is indeed enabled and working This is to ensure shadow stack is indeed enabled and working ok 1 shstk fork test ok 2 map shadow stack syscall ok 3 shadow stack gup tests ok 4 shadow stack signal tests ok 5 memory protections of shadow stack memory """ Signed-off-by: Deepak Gupta --- tools/testing/selftests/riscv/Makefile | 2 +- tools/testing/selftests/riscv/cfi/.gitignore | 3 + tools/testing/selftests/riscv/cfi/Makefile | 10 + tools/testing/selftests/riscv/cfi/cfi_rv_test.h | 84 +++++ tools/testing/selftests/riscv/cfi/riscv_cfi_test.c | 78 +++++ tools/testing/selftests/riscv/cfi/shadowstack.c | 375 +++++++++++++++++++++ tools/testing/selftests/riscv/cfi/shadowstack.h | 37 ++ 7 files changed, 588 insertions(+), 1 deletion(-) diff --git a/tools/testing/selftests/riscv/Makefile b/tools/testing/selftests/riscv/Makefile index 099b8c1f46f8..5671b4405a12 100644 --- a/tools/testing/selftests/riscv/Makefile +++ b/tools/testing/selftests/riscv/Makefile @@ -5,7 +5,7 @@ ARCH ?= $(shell uname -m 2>/dev/null || echo not) ifneq (,$(filter $(ARCH),riscv)) -RISCV_SUBTARGETS ?= abi hwprobe mm sigreturn vector +RISCV_SUBTARGETS ?= abi hwprobe mm sigreturn vector cfi else RISCV_SUBTARGETS := endif diff --git a/tools/testing/selftests/riscv/cfi/.gitignore b/tools/testing/selftests/riscv/cfi/.gitignore new file mode 100644 index 000000000000..82545863bac6 --- /dev/null +++ b/tools/testing/selftests/riscv/cfi/.gitignore @@ -0,0 +1,3 @@ +cfitests +riscv_cfi_test +shadowstack diff --git a/tools/testing/selftests/riscv/cfi/Makefile b/tools/testing/selftests/riscv/cfi/Makefile new file mode 100644 index 000000000000..b65f7ff38a32 --- /dev/null +++ b/tools/testing/selftests/riscv/cfi/Makefile @@ -0,0 +1,10 @@ +CFLAGS += -I$(top_srcdir)/tools/include + +CFLAGS += -march=rv64gc_zicfilp_zicfiss + +TEST_GEN_PROGS := cfitests + +include ../../lib.mk + +$(OUTPUT)/cfitests: riscv_cfi_test.c shadowstack.c + $(CC) -o$@ $(CFLAGS) $(LDFLAGS) $^ diff --git a/tools/testing/selftests/riscv/cfi/cfi_rv_test.h b/tools/testing/selftests/riscv/cfi/cfi_rv_test.h new file mode 100644 index 000000000000..a9d5d6f8e29c --- /dev/null +++ b/tools/testing/selftests/riscv/cfi/cfi_rv_test.h @@ -0,0 +1,84 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef SELFTEST_RISCV_CFI_H +#define SELFTEST_RISCV_CFI_H +#include +#include +#include "shadowstack.h" + +#define RISCV_CFI_SELFTEST_COUNT RISCV_SHADOW_STACK_TESTS + +#define CHILD_EXIT_CODE_SSWRITE 10 +#define CHILD_EXIT_CODE_SIG_TEST 11 + +#define my_syscall5(num, arg1, arg2, arg3, arg4, arg5) \ +({ \ + register long _num __asm__ ("a7") = (num); \ + register long _arg1 __asm__ ("a0") = (long)(arg1); \ + register long _arg2 __asm__ ("a1") = (long)(arg2); \ + register long _arg3 __asm__ ("a2") = (long)(arg3); \ + register long _arg4 __asm__ ("a3") = (long)(arg4); \ + register long _arg5 __asm__ ("a4") = (long)(arg5); \ + \ + __asm__ volatile( \ + "ecall\n" \ + : "+r" \ + (_arg1) \ + : "r"(_arg2), "r"(_arg3), "r"(_arg4), "r"(_arg5), \ + "r"(_num) \ + : "memory", "cc" \ + ); \ + _arg1; \ +}) + +#define my_syscall3(num, arg1, arg2, arg3) \ +({ \ + register long _num __asm__ ("a7") = (num); \ + register long _arg1 __asm__ ("a0") = (long)(arg1); \ + register long _arg2 __asm__ ("a1") = (long)(arg2); \ + register long _arg3 __asm__ ("a2") = (long)(arg3); \ + \ + __asm__ volatile( \ + "ecall\n" \ + : "+r" (_arg1) \ + : "r"(_arg2), "r"(_arg3), \ + "r"(_num) \ + : "memory", "cc" \ + ); \ + _arg1; \ +}) + +#ifndef __NR_prctl +#define __NR_prctl 167 +#endif + +#ifndef __NR_map_shadow_stack +#define __NR_map_shadow_stack 453 +#endif + +#define CSR_SSP 0x011 + +#ifdef __ASSEMBLY__ +#define __ASM_STR(x) x +#else +#define __ASM_STR(x) #x +#endif + +#define csr_read(csr) \ +({ \ + register unsigned long __v; \ + __asm__ __volatile__ ("csrr %0, " __ASM_STR(csr) \ + : "=r" (__v) : \ + : "memory"); \ + __v; \ +}) + +#define csr_write(csr, val) \ +({ \ + unsigned long __v = (unsigned long)(val); \ + __asm__ __volatile__ ("csrw " __ASM_STR(csr) ", %0" \ + : : "rK" (__v) \ + : "memory"); \ +}) + +#endif diff --git a/tools/testing/selftests/riscv/cfi/riscv_cfi_test.c b/tools/testing/selftests/riscv/cfi/riscv_cfi_test.c new file mode 100644 index 000000000000..cf33aa25cc73 --- /dev/null +++ b/tools/testing/selftests/riscv/cfi/riscv_cfi_test.c @@ -0,0 +1,78 @@ +// SPDX-License-Identifier: GPL-2.0-only + +#include "../../kselftest.h" +#include +#include +#include +#include "cfi_rv_test.h" + +/* do not optimize cfi related test functions */ +#pragma GCC push_options +#pragma GCC optimize("O0") + +void sigsegv_handler(int signum, siginfo_t *si, void *uc) +{ + struct ucontext *ctx = (struct ucontext *)uc; + + if (si->si_code == SEGV_CPERR) { + ksft_print_msg("Control flow violation happened somewhere\n"); + ksft_print_msg("PC where violation happened %lx\n", ctx->uc_mcontext.gregs[0]); + exit(-1); + } + + /* all other cases are expected to be of shadow stack write case */ + exit(CHILD_EXIT_CODE_SSWRITE); +} + +bool register_signal_handler(void) +{ + struct sigaction sa = {}; + + sa.sa_sigaction = sigsegv_handler; + sa.sa_flags = SA_SIGINFO; + if (sigaction(SIGSEGV, &sa, NULL)) { + ksft_print_msg("Registering signal handler for landing pad violation failed\n"); + return false; + } + + return true; +} + +int main(int argc, char *argv[]) +{ + int ret = 0; + unsigned long lpad_status = 0, ss_status = 0; + + ksft_print_header(); + + ksft_print_msg("Starting risc-v tests\n"); + + /* + * Landing pad test. Not a lot of kernel changes to support landing + * pad for user mode except lighting up a bit in senvcfg via a prctl + * Enable landing pad through out the execution of test binary + */ + ret = my_syscall5(__NR_prctl, PR_GET_INDIR_BR_LP_STATUS, &lpad_status, 0, 0, 0); + if (ret) + ksft_exit_fail_msg("Get landing pad status failed with %d\n", ret); + + if (!(lpad_status & PR_INDIR_BR_LP_ENABLE)) + ksft_exit_fail_msg("Landing pad is not enabled, should be enabled via glibc\n"); + + ret = my_syscall5(__NR_prctl, PR_GET_SHADOW_STACK_STATUS, &ss_status, 0, 0, 0); + if (ret) + ksft_exit_fail_msg("Get shadow stack failed with %d\n", ret); + + if (!(ss_status & PR_SHADOW_STACK_ENABLE)) + ksft_exit_fail_msg("Shadow stack is not enabled, should be enabled via glibc\n"); + + if (!register_signal_handler()) + ksft_exit_fail_msg("Registering signal handler for SIGSEGV failed\n"); + + ksft_print_msg("Landing pad and shadow stack are enabled for binary\n"); + execute_shadow_stack_tests(); + + return 0; +} + +#pragma GCC pop_options diff --git a/tools/testing/selftests/riscv/cfi/shadowstack.c b/tools/testing/selftests/riscv/cfi/shadowstack.c new file mode 100644 index 000000000000..a0ef066e98ab --- /dev/null +++ b/tools/testing/selftests/riscv/cfi/shadowstack.c @@ -0,0 +1,375 @@ +// SPDX-License-Identifier: GPL-2.0-only + +#include "../../kselftest.h" +#include +#include +#include +#include +#include +#include "shadowstack.h" +#include "cfi_rv_test.h" + +/* do not optimize shadow stack related test functions */ +#pragma GCC push_options +#pragma GCC optimize("O0") + +void zar(void) +{ + unsigned long ssp = 0; + + ssp = csr_read(CSR_SSP); + ksft_print_msg("Spewing out shadow stack ptr: %lx\n" + " This is to ensure shadow stack is indeed enabled and working\n", + ssp); +} + +void bar(void) +{ + zar(); +} + +void foo(void) +{ + bar(); +} + +void zar_child(void) +{ + unsigned long ssp = 0; + + ssp = csr_read(CSR_SSP); + ksft_print_msg("Spewing out shadow stack ptr: %lx\n" + " This is to ensure shadow stack is indeed enabled and working\n", + ssp); +} + +void bar_child(void) +{ + zar_child(); +} + +void foo_child(void) +{ + bar_child(); +} + +typedef void (call_func_ptr)(void); +/* + * call couple of functions to test push pop. + */ +int shadow_stack_call_tests(call_func_ptr fn_ptr, bool parent) +{ + ksft_print_msg("dummy calls for sspush and sspopchk in context of %s\n", + parent ? "parent" : "child"); + + (fn_ptr)(); + + return 0; +} + +/* forks a thread, and ensure shadow stacks fork out */ +bool shadow_stack_fork_test(unsigned long test_num, void *ctx) +{ + int pid = 0, child_status = 0, parent_pid = 0, ret = 0; + unsigned long ss_status = 0; + + ksft_print_msg("Exercising shadow stack fork test\n"); + + ret = my_syscall5(__NR_prctl, PR_GET_SHADOW_STACK_STATUS, &ss_status, 0, 0, 0); + if (ret) { + ksft_exit_skip("Shadow stack get status prctl failed with errorcode %d\n", ret); + return false; + } + + if (!(ss_status & PR_SHADOW_STACK_ENABLE)) + ksft_exit_skip("Shadow stack is not enabled, should be enabled via glibc\n"); + + parent_pid = getpid(); + pid = fork(); + + if (pid) { + ksft_print_msg("Parent pid %d and child pid %d\n", parent_pid, pid); + shadow_stack_call_tests(&foo, true); + } else { + shadow_stack_call_tests(&foo_child, false); + } + + if (pid) { + ksft_print_msg("Waiting on child to finish\n"); + wait(&child_status); + } else { + /* exit child gracefully */ + exit(0); + } + + if (pid && WIFSIGNALED(child_status)) { + ksft_print_msg("Child faulted, fork test failed\n"); + return false; + } + + return true; +} + +/* exercise `map_shadow_stack`, pivot to it and call some functions to ensure it works */ +#define SHADOW_STACK_ALLOC_SIZE 4096 +bool shadow_stack_map_test(unsigned long test_num, void *ctx) +{ + unsigned long shdw_addr; + int ret = 0; + + ksft_print_msg("Exercising shadow stack map test\n"); + + shdw_addr = my_syscall3(__NR_map_shadow_stack, NULL, SHADOW_STACK_ALLOC_SIZE, 0); + + if (((long)shdw_addr) <= 0) { + ksft_print_msg("map_shadow_stack failed with error code %d\n", + (int)shdw_addr); + return false; + } + + ret = munmap((void *)shdw_addr, SHADOW_STACK_ALLOC_SIZE); + + if (ret) { + ksft_print_msg("munmap failed with error code %d\n", ret); + return false; + } + + return true; +} + +/* + * shadow stack protection tests. map a shadow stack and + * validate all memory protections work on it + */ +bool shadow_stack_protection_test(unsigned long test_num, void *ctx) +{ + unsigned long shdw_addr; + unsigned long *write_addr = NULL; + int ret = 0, pid = 0, child_status = 0; + + ksft_print_msg("Exercising shadow stack protection test (WPT)\n"); + + shdw_addr = my_syscall3(__NR_map_shadow_stack, NULL, SHADOW_STACK_ALLOC_SIZE, 0); + + if (((long)shdw_addr) <= 0) { + ksft_print_msg("map_shadow_stack failed with error code %d\n", + (int)shdw_addr); + return false; + } + + write_addr = (unsigned long *)shdw_addr; + pid = fork(); + + /* no child was created, return false */ + if (pid == -1) + return false; + + /* + * try to perform a store from child on shadow stack memory + * it should result in SIGSEGV + */ + if (!pid) { + /* below write must lead to SIGSEGV */ + *write_addr = 0xdeadbeef; + } else { + wait(&child_status); + } + + /* test fail, if 0xdeadbeef present on shadow stack address */ + if (*write_addr == 0xdeadbeef) { + ksft_print_msg("Shadow stack WPT failed\n"); + return false; + } + + /* if child reached here, then fail */ + if (!pid) { + ksft_print_msg("Shadow stack WPT failed: child reached unreachable state\n"); + return false; + } + + /* if child exited via signal handler but not for write on ss */ + if (WIFEXITED(child_status) && + WEXITSTATUS(child_status) != CHILD_EXIT_CODE_SSWRITE) { + ksft_print_msg("Shadow stack WPT failed: child wasn't signaled for write\n"); + return false; + } + + ret = munmap(write_addr, SHADOW_STACK_ALLOC_SIZE); + if (ret) { + ksft_print_msg("Shadow stack WPT failed: munmap failed, error code %d\n", + ret); + return false; + } + + return true; +} + +#define SS_MAGIC_WRITE_VAL 0xbeefdead + +int gup_tests(int mem_fd, unsigned long *shdw_addr) +{ + unsigned long val = 0; + + lseek(mem_fd, (unsigned long)shdw_addr, SEEK_SET); + if (read(mem_fd, &val, sizeof(val)) < 0) { + ksft_print_msg("Reading shadow stack mem via gup failed\n"); + return 1; + } + + val = SS_MAGIC_WRITE_VAL; + lseek(mem_fd, (unsigned long)shdw_addr, SEEK_SET); + if (write(mem_fd, &val, sizeof(val)) < 0) { + ksft_print_msg("Writing shadow stack mem via gup failed\n"); + return 1; + } + + if (*shdw_addr != SS_MAGIC_WRITE_VAL) { + ksft_print_msg("GUP write to shadow stack memory failed\n"); + return 1; + } + + return 0; +} + +bool shadow_stack_gup_tests(unsigned long test_num, void *ctx) +{ + unsigned long shdw_addr = 0; + unsigned long *write_addr = NULL; + int fd = 0; + bool ret = false; + + ksft_print_msg("Exercising shadow stack gup tests\n"); + shdw_addr = my_syscall3(__NR_map_shadow_stack, NULL, SHADOW_STACK_ALLOC_SIZE, 0); + + if (((long)shdw_addr) <= 0) { + ksft_print_msg("map_shadow_stack failed with error code %d\n", (int)shdw_addr); + return false; + } + + write_addr = (unsigned long *)shdw_addr; + + fd = open("/proc/self/mem", O_RDWR); + if (fd == -1) + return false; + + if (gup_tests(fd, write_addr)) { + ksft_print_msg("gup tests failed\n"); + goto out; + } + + ret = true; +out: + if (shdw_addr && munmap(write_addr, SHADOW_STACK_ALLOC_SIZE)) { + ksft_print_msg("munmap failed with error code %d\n", ret); + ret = false; + } + + return ret; +} + +volatile bool break_loop; + +void sigusr1_handler(int signo) +{ + break_loop = true; +} + +bool sigusr1_signal_test(void) +{ + struct sigaction sa = {}; + + sa.sa_handler = sigusr1_handler; + sa.sa_flags = 0; + sigemptyset(&sa.sa_mask); + if (sigaction(SIGUSR1, &sa, NULL)) { + ksft_print_msg("Registering signal handler for SIGUSR1 failed\n"); + return false; + } + + return true; +} + +/* + * shadow stack signal test. shadow stack must be enabled. + * register a signal, fork another thread which is waiting + * on signal. Send a signal from parent to child, verify + * that signal was received by child. If not test fails + */ +bool shadow_stack_signal_test(unsigned long test_num, void *ctx) +{ + int pid = 0, child_status = 0, ret = 0; + unsigned long ss_status = 0; + + ksft_print_msg("Exercising shadow stack signal test\n"); + + ret = my_syscall5(__NR_prctl, PR_GET_SHADOW_STACK_STATUS, &ss_status, 0, 0, 0); + if (ret) { + ksft_print_msg("Shadow stack get status prctl failed with errorcode %d\n", ret); + return false; + } + + if (!(ss_status & PR_SHADOW_STACK_ENABLE)) + ksft_print_msg("Shadow stack is not enabled, should be enabled via glibc\n"); + + /* this should be caught by signal handler and do an exit */ + if (!sigusr1_signal_test()) { + ksft_print_msg("Registering sigusr1 handler failed\n"); + exit(-1); + } + + pid = fork(); + + if (pid == -1) { + ksft_print_msg("Signal test: fork failed\n"); + goto out; + } + + if (pid == 0) { + while (!break_loop) + sleep(1); + + exit(11); + /* child shouldn't go beyond here */ + } + + /* send SIGUSR1 to child */ + kill(pid, SIGUSR1); + wait(&child_status); + +out: + + return (WIFEXITED(child_status) && + WEXITSTATUS(child_status) == 11); +} + +int execute_shadow_stack_tests(void) +{ + int ret = 0; + unsigned long test_count = 0; + unsigned long shstk_status = 0; + bool test_pass = false; + + ksft_print_msg("Executing RISC-V shadow stack self tests\n"); + ksft_set_plan(RISCV_SHADOW_STACK_TESTS); + + ret = my_syscall5(__NR_prctl, PR_GET_SHADOW_STACK_STATUS, &shstk_status, 0, 0, 0); + + if (ret != 0) + ksft_exit_fail_msg("Get shadow stack status failed with %d\n", ret); + + /* + * If we are here that means get shadow stack status succeeded and + * thus shadow stack support is baked in the kernel. + */ + while (test_count < ARRAY_SIZE(shstk_tests)) { + test_pass = (*shstk_tests[test_count].t_func)(test_count, NULL); + ksft_test_result(test_pass, shstk_tests[test_count].name); + test_count++; + } + + ksft_finished(); + + return 0; +} + +#pragma GCC pop_options diff --git a/tools/testing/selftests/riscv/cfi/shadowstack.h b/tools/testing/selftests/riscv/cfi/shadowstack.h new file mode 100644 index 000000000000..b43e74136a26 --- /dev/null +++ b/tools/testing/selftests/riscv/cfi/shadowstack.h @@ -0,0 +1,37 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef SELFTEST_SHADOWSTACK_TEST_H +#define SELFTEST_SHADOWSTACK_TEST_H +#include +#include + +/* + * a cfi test returns true for success or false for fail + * takes a number for test number to index into array and void pointer. + */ +typedef bool (*shstk_test_func)(unsigned long test_num, void *); + +struct shadow_stack_tests { + char *name; + shstk_test_func t_func; +}; + +bool shadow_stack_fork_test(unsigned long test_num, void *ctx); +bool shadow_stack_map_test(unsigned long test_num, void *ctx); +bool shadow_stack_protection_test(unsigned long test_num, void *ctx); +bool shadow_stack_gup_tests(unsigned long test_num, void *ctx); +bool shadow_stack_signal_test(unsigned long test_num, void *ctx); + +static struct shadow_stack_tests shstk_tests[] = { + { "shstk fork test\n", shadow_stack_fork_test }, + { "map shadow stack syscall\n", shadow_stack_map_test }, + { "shadow stack gup tests\n", shadow_stack_gup_tests }, + { "shadow stack signal tests\n", shadow_stack_signal_test}, + { "memory protections of shadow stack memory\n", shadow_stack_protection_test } +}; + +#define RISCV_SHADOW_STACK_TESTS ARRAY_SIZE(shstk_tests) + +int execute_shadow_stack_tests(void); + +#endif