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Thu, 6 Feb 2025 11:16:05 GMT Received: from hu-akakum-hyd.qualcomm.com (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 6 Feb 2025 03:16:00 -0800 From: Akash Kumar To: Thinh Nguyen , Greg Kroah-Hartman , Jack Pham , , Wesley Cheng CC: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "Vijayavardhan Vennapusa" , , , Akash Kumar Subject: [PATCH 01/18] usb: dwc3: Reserve Higher Bandwidth for HS Periodic EPs Date: Thu, 6 Feb 2025 16:45:26 +0530 Message-ID: <20250206111543.17392-2-quic_akakum@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20250206111543.17392-1-quic_akakum@quicinc.com> References: <20250206111543.17392-1-quic_akakum@quicinc.com> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: NMMhjMV0qdKvlE7b6MZwkZdbml9fvzKZ X-Proofpoint-GUID: NMMhjMV0qdKvlE7b6MZwkZdbml9fvzKZ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-02-06_03,2025-02-05_03,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 impostorscore=0 priorityscore=1501 mlxlogscore=999 clxscore=1011 adultscore=0 spamscore=0 lowpriorityscore=0 suspectscore=0 bulkscore=0 phishscore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2501170000 definitions=main-2502060092 On targets using synopsys usb dwc3 controller, it is observed while testing multiple audio devices, a glitch is observed during testing. As per dwc datasheet,By default, HC reserves 80% of the bandwidth for periodic EPs which can be increased with GUCTL Bit 16. Add quirk to set GUCTL register BIT 16 to accommodate higher bandwidth for 2 isoc eps. If this bit is set, the bandwidth is relaxed to 85% to accommodate two high speed, high bandwidth ISOC EPs. USB 2.0 required 80% bandwidth allocated for ISOC traffic. If two High-bandwidth ISOC devices (HD Webcams) are connected, and if each requires 1024-bytes X 3 packets per Micro-Frame, then the bandwidth required is around 82%. If this bit is set, then it is possible to connect two Webcams of 1024bytes X 3 paylod per Micro-Frame each. Alternatively, you might need to lower the resolution of the webcams. This bit is valid in Host and DRD configuration and is used in host mode operation only. Set this bit for host mode uvc uac usecases where two isoc eps are used and flicker is seen. Signed-off-by: Akash Kumar --- drivers/usb/dwc3/core.c | 11 +++++++++++ drivers/usb/dwc3/core.h | 4 ++++ 2 files changed, 15 insertions(+) diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index dfa1b5fe48dc..7e55c234e4e5 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -1461,6 +1461,14 @@ static int dwc3_core_init(struct dwc3 *dwc) dwc3_writel(dwc->regs, DWC3_GUCTL1, reg); } + if (dwc->revision >= DWC3_REVISION_250A) { + if (dwc->dwc3_guctl_resbwhseps_quirk) { + reg = dwc3_readl(dwc->regs, DWC3_GUCTL); + reg |= DWC3_GUCTL_RESBWHSEPS; + dwc3_writel(dwc->regs, DWC3_GUCTL, reg); + } + } + dwc3_config_threshold(dwc); /* @@ -1818,6 +1826,9 @@ static void dwc3_get_properties(struct dwc3 *dwc) dwc->dis_split_quirk = device_property_read_bool(dev, "snps,dis-split-quirk"); + dwc->dwc3_guctl_resbwhseps_quirk = device_property_read_bool(dev, + "snps,dwc3_guctl_resbwhseps_quirk"); + dwc->lpm_nyet_threshold = lpm_nyet_threshold; dwc->tx_de_emphasis = tx_de_emphasis; diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index ac7c730f81ac..00f4582edfca 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -283,6 +283,9 @@ #define DWC3_GUCTL1_PARKMODE_DISABLE_HS BIT(16) #define DWC3_GUCTL1_RESUME_OPMODE_HS_HOST BIT(10) +/* Global User Control Register */ +#define DWC3_GUCTL_RESBWHSEPS BIT(16) + /* Global Status Register */ #define DWC3_GSTS_OTG_IP BIT(10) #define DWC3_GSTS_BC_IP BIT(9) @@ -1393,6 +1396,7 @@ struct dwc3 { int num_ep_resized; struct dentry *debug_root; u32 gsbuscfg0_reqinfo; + bool dwc3_guctl_resbwhseps_quirk; }; #define INCRX_BURST_MODE 0 From patchwork Thu Feb 6 11:15:27 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AKASH KUMAR X-Patchwork-Id: 13962874 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 341EC46BF; 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Thu, 06 Feb 2025 11:16:12 +0000 (GMT) Received: from nasanex01a.na.qualcomm.com (nasanex01a.na.qualcomm.com [10.52.223.231]) by NASANPPMTA04.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 516BGBiI008535 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 6 Feb 2025 11:16:11 GMT Received: from hu-akakum-hyd.qualcomm.com (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 6 Feb 2025 03:16:07 -0800 From: Akash Kumar To: Thinh Nguyen , Greg Kroah-Hartman , Jack Pham , , Wesley Cheng CC: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "Vijayavardhan Vennapusa" , , , Akash Kumar Subject: [PATCH 02/18] arm64: dts: qcom: sa8775p: Enable high bandwidth for hs isoc eps Date: Thu, 6 Feb 2025 16:45:27 +0530 Message-ID: <20250206111543.17392-3-quic_akakum@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20250206111543.17392-1-quic_akakum@quicinc.com> References: <20250206111543.17392-1-quic_akakum@quicinc.com> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: lC0nzx8NPTDpxRvcHgT0CgyMwmKs4v2S X-Proofpoint-GUID: lC0nzx8NPTDpxRvcHgT0CgyMwmKs4v2S X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-02-06_03,2025-02-05_03,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 malwarescore=0 phishscore=0 impostorscore=0 mlxlogscore=926 suspectscore=0 mlxscore=0 bulkscore=0 adultscore=0 clxscore=1015 priorityscore=1501 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2501170000 definitions=main-2502060093 It is observed while testing multiple audio devices, a glitch is observed during testing. As per dwc datasheet,By default, HC reserves 80% of the bandwidth for periodic EPs. Add quirk to set GUCTL BIT 16 to accommodate higher bandwidth for 2 isoc eps. If this bit is set, the bandwidth is relaxed to 85% to accommodate two high speed, high bandwidth ISOC EPs. USB 2.0 required 80% bandwidth allocated for ISOC traffic. If two High-bandwidth ISOC devices (HD Webcams) are connected, and if each requires 1024-bytes X 3 packets per Micro-Frame, then the bandwidth required is around 82%. If this bit is set, then it is possible to connect two Webcams of 1024bytes X 3 paylod per Micro-Frame each. Otherwise, you may have to reduce the resolution of the Webcams. This bit is valid in Host and DRD configuration and is used in host mode operation only. USe this quirk to set bit for host mode uvc uac usecases where two isoc eps are used and flicker is seen. Signed-off-by: Akash Kumar --- arch/arm64/boot/dts/qcom/sa8775p.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi index 3394ae2d1300..230b432cc3ac 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi @@ -3431,6 +3431,7 @@ phy-names = "usb2-phy", "usb3-phy"; snps,dis-u1-entry-quirk; snps,dis-u2-entry-quirk; + snps,dwc3_guctl_resbwhseps_quirk; }; }; @@ -3522,6 +3523,7 @@ phy-names = "usb2-phy", "usb3-phy"; snps,dis-u1-entry-quirk; snps,dis-u2-entry-quirk; + snps,dwc3_guctl_resbwhseps_quirk; }; }; @@ -3587,6 +3589,7 @@ phy-names = "usb2-phy"; snps,dis-u1-entry-quirk; snps,dis-u2-entry-quirk; + snps,dwc3_guctl_resbwhseps_quirk; }; }; From patchwork Thu Feb 6 11:15:28 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AKASH KUMAR X-Patchwork-Id: 13962875 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E3FCF46BF; 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Thu, 06 Feb 2025 11:16:20 +0000 (GMT) Received: from nasanex01a.na.qualcomm.com (nasanex01a.na.qualcomm.com [10.52.223.231]) by NASANPPMTA02.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 516BGJiY020942 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 6 Feb 2025 11:16:19 GMT Received: from hu-akakum-hyd.qualcomm.com (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 6 Feb 2025 03:16:15 -0800 From: Akash Kumar To: Thinh Nguyen , Greg Kroah-Hartman , Jack Pham , , Wesley Cheng CC: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "Vijayavardhan Vennapusa" , , , Akash Kumar Subject: [PATCH 03/18] arm64: dts: qcom: sm8350: Enable high bandwidth for hs isoc eps Date: Thu, 6 Feb 2025 16:45:28 +0530 Message-ID: <20250206111543.17392-4-quic_akakum@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20250206111543.17392-1-quic_akakum@quicinc.com> References: <20250206111543.17392-1-quic_akakum@quicinc.com> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: CToTMh9nCaqnfNOhIEBJX0IEIi4IBV9I X-Proofpoint-ORIG-GUID: CToTMh9nCaqnfNOhIEBJX0IEIi4IBV9I X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-02-06_03,2025-02-05_03,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 bulkscore=0 malwarescore=0 clxscore=1015 priorityscore=1501 mlxlogscore=984 impostorscore=0 lowpriorityscore=0 phishscore=0 suspectscore=0 adultscore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2501170000 definitions=main-2502060092 It is observed while testing multiple audio devices, a glitch is observed during testing. As per dwc datasheet,By default, HC reserves 80% of the bandwidth for periodic EPs. Add quirk to set GUCTL BIT 16 to accommodate higher bandwidth for 2 isoc eps. If this bit is set, the bandwidth is relaxed to 85% to accommodate two high speed, high bandwidth ISOC EPs. USB 2.0 required 80% bandwidth allocated for ISOC traffic. If two High-bandwidth ISOC devices (HD Webcams) are connected, and if each requires 1024-bytes X 3 packets per Micro-Frame, then the bandwidth required is around 82%. If this bit is set, then it is possible to connect two Webcams of 1024bytes X 3 paylod per Micro-Frame each. Otherwise, you may have to reduce the resolution of the Webcams. This bit is valid in Host and DRD configuration and is used in host mode operation only. USe this quirk to set bit for host mode uvc uac usecases where two isoc eps are used and flicker is seen. Signed-off-by: Akash Kumar --- arch/arm64/boot/dts/qcom/sm8350.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi index 69da30f35baa..430ecca13798 100644 --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi @@ -2656,6 +2656,7 @@ snps,dis_enblslpm_quirk; snps,dis-u1-entry-quirk; snps,dis-u2-entry-quirk; + snps,dwc3_guctl_resbwhseps_quirk; phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; phy-names = "usb2-phy", "usb3-phy"; @@ -2734,6 +2735,7 @@ snps,dis_enblslpm_quirk; snps,dis-u1-entry-quirk; snps,dis-u2-entry-quirk; + snps,dwc3_guctl_resbwhseps_quirk; phys = <&usb_2_hsphy>, <&usb_2_qmpphy>; phy-names = "usb2-phy", "usb3-phy"; }; From patchwork Thu Feb 6 11:15:29 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AKASH KUMAR X-Patchwork-Id: 13962876 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E5CD321422B; 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Thu, 06 Feb 2025 11:16:24 +0000 (GMT) Received: from nasanex01a.na.qualcomm.com (nasanex01a.na.qualcomm.com [10.52.223.231]) by NASANPPMTA02.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 516BGNxl020997 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 6 Feb 2025 11:16:23 GMT Received: from hu-akakum-hyd.qualcomm.com (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 6 Feb 2025 03:16:19 -0800 From: Akash Kumar To: Thinh Nguyen , Greg Kroah-Hartman , Jack Pham , , Wesley Cheng CC: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "Vijayavardhan Vennapusa" , , , Akash Kumar Subject: [PATCH 04/18] arm64: dts: qcom: sm8450: Enable high bandwidth for hs isoc eps Date: Thu, 6 Feb 2025 16:45:29 +0530 Message-ID: <20250206111543.17392-5-quic_akakum@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20250206111543.17392-1-quic_akakum@quicinc.com> References: <20250206111543.17392-1-quic_akakum@quicinc.com> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: Hk8w4i6VPdCj_FjKsuV9KjayUTS58th3 X-Proofpoint-GUID: Hk8w4i6VPdCj_FjKsuV9KjayUTS58th3 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-02-06_03,2025-02-05_03,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 priorityscore=1501 malwarescore=0 bulkscore=0 adultscore=0 lowpriorityscore=0 impostorscore=0 mlxlogscore=999 clxscore=1015 mlxscore=0 suspectscore=0 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2501170000 definitions=main-2502060093 It is observed while testing multiple audio devices, a glitch is observed during testing. As per dwc datasheet,By default, HC reserves 80% of the bandwidth for periodic EPs. Add quirk to set GUCTL BIT 16 to accommodate higher bandwidth for 2 isoc eps. If this bit is set, the bandwidth is relaxed to 85% to accommodate two high speed, high bandwidth ISOC EPs. USB 2.0 required 80% bandwidth allocated for ISOC traffic. If two High-bandwidth ISOC devices (HD Webcams) are connected, and if each requires 1024-bytes X 3 packets per Micro-Frame, then the bandwidth required is around 82%. If this bit is set, then it is possible to connect two Webcams of 1024bytes X 3 paylod per Micro-Frame each. Otherwise, you may have to reduce the resolution of the Webcams. This bit is valid in Host and DRD configuration and is used in host mode operation only. USe this quirk to set bit for host mode uvc uac usecases where two isoc eps are used and flicker is seen. Signed-off-by: Akash Kumar --- arch/arm64/boot/dts/qcom/sm8450.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi index 9c809fc5fa45..95d5a67b7b9a 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -5400,6 +5400,7 @@ snps,dis_enblslpm_quirk; snps,dis-u1-entry-quirk; snps,dis-u2-entry-quirk; + snps,dwc3_guctl_resbwhseps_quirk; phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; phy-names = "usb2-phy", "usb3-phy"; From patchwork Thu Feb 6 11:15:30 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AKASH KUMAR X-Patchwork-Id: 13962877 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5022C22D4F7; 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Thu, 06 Feb 2025 11:16:28 +0000 (GMT) Received: from nasanex01a.na.qualcomm.com (nasanex01a.na.qualcomm.com [10.52.223.231]) by NASANPPMTA05.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 516BGRi9002160 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 6 Feb 2025 11:16:27 GMT Received: from hu-akakum-hyd.qualcomm.com (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 6 Feb 2025 03:16:23 -0800 From: Akash Kumar To: Thinh Nguyen , Greg Kroah-Hartman , Jack Pham , , Wesley Cheng CC: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "Vijayavardhan Vennapusa" , , , Akash Kumar Subject: [PATCH 05/18] arm64: dts: qcom: sm8150: Enable high bandwidth for hs isoc eps Date: Thu, 6 Feb 2025 16:45:30 +0530 Message-ID: <20250206111543.17392-6-quic_akakum@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20250206111543.17392-1-quic_akakum@quicinc.com> References: <20250206111543.17392-1-quic_akakum@quicinc.com> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: zaXhAw4WJotHa3zVl5GiOocDC7zFmU1u X-Proofpoint-ORIG-GUID: zaXhAw4WJotHa3zVl5GiOocDC7zFmU1u X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-02-06_03,2025-02-05_03,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 phishscore=0 lowpriorityscore=0 spamscore=0 impostorscore=0 priorityscore=1501 clxscore=1015 mlxscore=0 adultscore=0 bulkscore=0 mlxlogscore=984 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2501170000 definitions=main-2502060093 It is observed while testing multiple audio devices, a glitch is observed during testing. As per dwc datasheet,By default, HC reserves 80% of the bandwidth for periodic EPs. Add quirk to set GUCTL BIT 16 to accommodate higher bandwidth for 2 isoc eps. If this bit is set, the bandwidth is relaxed to 85% to accommodate two high speed, high bandwidth ISOC EPs. USB 2.0 required 80% bandwidth allocated for ISOC traffic. If two High-bandwidth ISOC devices (HD Webcams) are connected, and if each requires 1024-bytes X 3 packets per Micro-Frame, then the bandwidth required is around 82%. If this bit is set, then it is possible to connect two Webcams of 1024bytes X 3 paylod per Micro-Frame each. Otherwise, you may have to reduce the resolution of the Webcams. This bit is valid in Host and DRD configuration and is used in host mode operation only. USe this quirk to set bit for host mode uvc uac usecases where two isoc eps are used and flicker is seen. Signed-off-by: Akash Kumar --- arch/arm64/boot/dts/qcom/sm8150.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index 4dbda54b47a5..56d0d72aa499 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -3660,6 +3660,7 @@ snps,dis_enblslpm_quirk; snps,dis-u1-entry-quirk; snps,dis-u2-entry-quirk; + snps,dwc3_guctl_resbwhseps_quirk; phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; phy-names = "usb2-phy", "usb3-phy"; @@ -3739,6 +3740,7 @@ snps,dis_enblslpm_quirk; snps,dis-u1-entry-quirk; snps,dis-u2-entry-quirk; + snps,dwc3_guctl_resbwhseps_quirk; phys = <&usb_2_hsphy>, <&usb_2_qmpphy>; phy-names = "usb2-phy", "usb3-phy"; }; From patchwork Thu Feb 6 11:15:31 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AKASH KUMAR X-Patchwork-Id: 13962878 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E3A6422E41C; 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Thu, 06 Feb 2025 11:16:33 +0000 (GMT) Received: from nasanex01a.na.qualcomm.com (nasanex01a.na.qualcomm.com [10.52.223.231]) by NASANPPMTA05.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 516BGWUw002240 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 6 Feb 2025 11:16:32 GMT Received: from hu-akakum-hyd.qualcomm.com (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 6 Feb 2025 03:16:27 -0800 From: Akash Kumar To: Thinh Nguyen , Greg Kroah-Hartman , Jack Pham , , Wesley Cheng CC: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "Vijayavardhan Vennapusa" , , , Akash Kumar Subject: [PATCH 06/18] arm64: dts: qcom: sm6125: Enable high bandwidth for hs isoc eps Date: Thu, 6 Feb 2025 16:45:31 +0530 Message-ID: <20250206111543.17392-7-quic_akakum@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20250206111543.17392-1-quic_akakum@quicinc.com> References: <20250206111543.17392-1-quic_akakum@quicinc.com> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: rxiiaw0n3sF1rD2eemMtg3GulQfYTJfu X-Proofpoint-ORIG-GUID: rxiiaw0n3sF1rD2eemMtg3GulQfYTJfu X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-02-06_03,2025-02-05_03,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 phishscore=0 lowpriorityscore=0 spamscore=0 impostorscore=0 priorityscore=1501 clxscore=1011 mlxscore=0 adultscore=0 bulkscore=0 mlxlogscore=956 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2501170000 definitions=main-2502060093 It is observed while testing multiple audio devices, a glitch is observed during testing. As per dwc datasheet,By default, HC reserves 80% of the bandwidth for periodic EPs. Add quirk to set GUCTL BIT 16 to accommodate higher bandwidth for 2 isoc eps. If this bit is set, the bandwidth is relaxed to 85% to accommodate two high speed, high bandwidth ISOC EPs. USB 2.0 required 80% bandwidth allocated for ISOC traffic. If two High-bandwidth ISOC devices (HD Webcams) are connected, and if each requires 1024-bytes X 3 packets per Micro-Frame, then the bandwidth required is around 82%. If this bit is set, then it is possible to connect two Webcams of 1024bytes X 3 paylod per Micro-Frame each. Otherwise, you may have to reduce the resolution of the Webcams. This bit is valid in Host and DRD configuration and is used in host mode operation only. USe this quirk to set bit for host mode uvc uac usecases where two isoc eps are used and flicker is seen. Signed-off-by: Akash Kumar --- arch/arm64/boot/dts/qcom/sm6125.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi b/arch/arm64/boot/dts/qcom/sm6125.dtsi index 350d807a622f..d84c85342851 100644 --- a/arch/arm64/boot/dts/qcom/sm6125.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6125.dtsi @@ -1211,6 +1211,7 @@ snps,dis_enblslpm_quirk; snps,dis-u1-entry-quirk; snps,dis-u2-entry-quirk; + snps,dwc3_guctl_resbwhseps_quirk; maximum-speed = "high-speed"; dr_mode = "peripheral"; }; From patchwork Thu Feb 6 11:15:32 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AKASH KUMAR X-Patchwork-Id: 13962879 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 66BC722F173; Thu, 6 Feb 2025 11:16:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Thu, 06 Feb 2025 11:16:36 +0000 (GMT) Received: from nasanex01a.na.qualcomm.com (nasanex01a.na.qualcomm.com [10.52.223.231]) by NASANPPMTA04.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 516BGa0I009068 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 6 Feb 2025 11:16:36 GMT Received: from hu-akakum-hyd.qualcomm.com (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 6 Feb 2025 03:16:32 -0800 From: Akash Kumar To: Thinh Nguyen , Greg Kroah-Hartman , Jack Pham , , Wesley Cheng CC: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "Vijayavardhan Vennapusa" , , , Akash Kumar Subject: [PATCH 07/18] arm64: dts: qcom: sm8250: Enable high bandwidth for hs isoc eps Date: Thu, 6 Feb 2025 16:45:32 +0530 Message-ID: <20250206111543.17392-8-quic_akakum@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20250206111543.17392-1-quic_akakum@quicinc.com> References: <20250206111543.17392-1-quic_akakum@quicinc.com> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: lc9ZvJ0YTDzRUC9RSVTfHXyvJ7I-8kZW X-Proofpoint-GUID: lc9ZvJ0YTDzRUC9RSVTfHXyvJ7I-8kZW X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-02-06_03,2025-02-05_03,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 priorityscore=1501 malwarescore=0 bulkscore=0 adultscore=0 lowpriorityscore=0 impostorscore=0 mlxlogscore=984 clxscore=1015 mlxscore=0 suspectscore=0 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2501170000 definitions=main-2502060093 It is observed while testing multiple audio devices, a glitch is observed during testing. As per dwc datasheet,By default, HC reserves 80% of the bandwidth for periodic EPs. Add quirk to set GUCTL BIT 16 to accommodate higher bandwidth for 2 isoc eps. If this bit is set, the bandwidth is relaxed to 85% to accommodate two high speed, high bandwidth ISOC EPs. USB 2.0 required 80% bandwidth allocated for ISOC traffic. If two High-bandwidth ISOC devices (HD Webcams) are connected, and if each requires 1024-bytes X 3 packets per Micro-Frame, then the bandwidth required is around 82%. If this bit is set, then it is possible to connect two Webcams of 1024bytes X 3 paylod per Micro-Frame each. Otherwise, you may have to reduce the resolution of the Webcams. This bit is valid in Host and DRD configuration and is used in host mode operation only. USe this quirk to set bit for host mode uvc uac usecases where two isoc eps are used and flicker is seen. Signed-off-by: Akash Kumar --- arch/arm64/boot/dts/qcom/sm8250.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index c2937b4d9f18..13a2d198b548 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -4209,6 +4209,7 @@ snps,dis_enblslpm_quirk; snps,dis-u1-entry-quirk; snps,dis-u2-entry-quirk; + snps,dwc3_guctl_resbwhseps_quirk; phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; phy-names = "usb2-phy", "usb3-phy"; @@ -4298,6 +4299,7 @@ snps,dis_enblslpm_quirk; snps,dis-u1-entry-quirk; snps,dis-u2-entry-quirk; + snps,dwc3_guctl_resbwhseps_quirk; phys = <&usb_2_hsphy>, <&usb_2_qmpphy>; phy-names = "usb2-phy", "usb3-phy"; }; From patchwork Thu Feb 6 11:15:33 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AKASH KUMAR X-Patchwork-Id: 13962880 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7B5A922F389; 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Thu, 06 Feb 2025 11:16:41 +0000 (GMT) Received: from nasanex01a.na.qualcomm.com (nasanex01a.na.qualcomm.com [10.52.223.231]) by NASANPPMTA05.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 516BGeir002347 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 6 Feb 2025 11:16:40 GMT Received: from hu-akakum-hyd.qualcomm.com (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 6 Feb 2025 03:16:36 -0800 From: Akash Kumar To: Thinh Nguyen , Greg Kroah-Hartman , Jack Pham , , Wesley Cheng CC: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "Vijayavardhan Vennapusa" , , , Akash Kumar Subject: [PATCH 08/18] arm64: dts: qcom: sm6350: Enable high bandwidth for hs isoc eps Date: Thu, 6 Feb 2025 16:45:33 +0530 Message-ID: <20250206111543.17392-9-quic_akakum@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20250206111543.17392-1-quic_akakum@quicinc.com> References: <20250206111543.17392-1-quic_akakum@quicinc.com> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: BqGbgtjoAmLN7W02fyk3vkhqUbcOiojL X-Proofpoint-GUID: BqGbgtjoAmLN7W02fyk3vkhqUbcOiojL X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-02-06_03,2025-02-05_03,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 suspectscore=0 spamscore=0 clxscore=1015 mlxlogscore=999 lowpriorityscore=0 bulkscore=0 impostorscore=0 phishscore=0 priorityscore=1501 malwarescore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2501170000 definitions=main-2502060093 It is observed while testing multiple audio devices, a glitch is observed during testing. As per dwc datasheet,By default, HC reserves 80% of the bandwidth for periodic EPs. Add quirk to set GUCTL BIT 16 to accommodate higher bandwidth for 2 isoc eps. If this bit is set, the bandwidth is relaxed to 85% to accommodate two high speed, high bandwidth ISOC EPs. USB 2.0 required 80% bandwidth allocated for ISOC traffic. If two High-bandwidth ISOC devices (HD Webcams) are connected, and if each requires 1024-bytes X 3 packets per Micro-Frame, then the bandwidth required is around 82%. If this bit is set, then it is possible to connect two Webcams of 1024bytes X 3 paylod per Micro-Frame each. Otherwise, you may have to reduce the resolution of the Webcams. This bit is valid in Host and DRD configuration and is used in host mode operation only. USe this quirk to set bit for host mode uvc uac usecases where two isoc eps are used and flicker is seen. Signed-off-by: Akash Kumar --- arch/arm64/boot/dts/qcom/sm6350.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi index 00ad1d09a195..5bfef5800548 100644 --- a/arch/arm64/boot/dts/qcom/sm6350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi @@ -1926,6 +1926,7 @@ snps,parkmode-disable-ss-quirk; snps,dis-u1-entry-quirk; snps,dis-u2-entry-quirk; + snps,dwc3_guctl_resbwhseps_quirk; phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; phy-names = "usb2-phy", "usb3-phy"; usb-role-switch; From patchwork Thu Feb 6 11:15:34 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AKASH KUMAR X-Patchwork-Id: 13962881 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A35BA22F3AF; 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Thu, 06 Feb 2025 11:16:45 +0000 (GMT) Received: from nasanex01a.na.qualcomm.com (nasanex01a.na.qualcomm.com [10.52.223.231]) by NASANPPMTA02.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 516BGiQM021843 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 6 Feb 2025 11:16:44 GMT Received: from hu-akakum-hyd.qualcomm.com (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 6 Feb 2025 03:16:40 -0800 From: Akash Kumar To: Thinh Nguyen , Greg Kroah-Hartman , Jack Pham , , Wesley Cheng CC: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "Vijayavardhan Vennapusa" , , , Akash Kumar Subject: [PATCH 09/18] arm64: dts: qcom: sc7280: Enable high bandwidth for hs isoc eps Date: Thu, 6 Feb 2025 16:45:34 +0530 Message-ID: <20250206111543.17392-10-quic_akakum@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20250206111543.17392-1-quic_akakum@quicinc.com> References: <20250206111543.17392-1-quic_akakum@quicinc.com> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: G5FVtURwAzNOPSVHtZWPtmM0CNUaS8wh X-Proofpoint-ORIG-GUID: G5FVtURwAzNOPSVHtZWPtmM0CNUaS8wh X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-02-06_03,2025-02-05_03,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 phishscore=0 lowpriorityscore=0 spamscore=0 impostorscore=0 priorityscore=1501 clxscore=1011 mlxscore=0 adultscore=0 bulkscore=0 mlxlogscore=949 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2501170000 definitions=main-2502060093 It is observed while testing multiple audio devices, a glitch is observed during testing. As per dwc datasheet,By default, HC reserves 80% of the bandwidth for periodic EPs. Add quirk to set GUCTL BIT 16 to accommodate higher bandwidth for 2 isoc eps. If this bit is set, the bandwidth is relaxed to 85% to accommodate two high speed, high bandwidth ISOC EPs. USB 2.0 required 80% bandwidth allocated for ISOC traffic. If two High-bandwidth ISOC devices (HD Webcams) are connected, and if each requires 1024-bytes X 3 packets per Micro-Frame, then the bandwidth required is around 82%. If this bit is set, then it is possible to connect two Webcams of 1024bytes X 3 paylod per Micro-Frame each. Otherwise, you may have to reduce the resolution of the Webcams. This bit is valid in Host and DRD configuration and is used in host mode operation only. USe this quirk to set bit for host mode uvc uac usecases where two isoc eps are used and flicker is seen. Signed-off-by: Akash Kumar --- arch/arm64/boot/dts/qcom/sc7280.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index 0f2caf36910b..f4ea0eb0bb58 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -3717,6 +3717,7 @@ snps,dis_enblslpm_quirk; snps,dis-u1-entry-quirk; snps,dis-u2-entry-quirk; + snps,dwc3_guctl_resbwhseps_quirk; phys = <&usb_2_hsphy>; phy-names = "usb2-phy"; maximum-speed = "high-speed"; @@ -4248,6 +4249,7 @@ snps,parkmode-disable-ss-quirk; snps,dis-u1-entry-quirk; snps,dis-u2-entry-quirk; + snps,dwc3_guctl_resbwhseps_quirk; phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; phy-names = "usb2-phy", "usb3-phy"; maximum-speed = "super-speed"; From patchwork Thu Feb 6 11:15:35 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AKASH KUMAR X-Patchwork-Id: 13962882 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9579A22AE71; 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Thu, 06 Feb 2025 11:16:49 +0000 (GMT) Received: from nasanex01a.na.qualcomm.com (nasanex01a.na.qualcomm.com [10.52.223.231]) by NASANPPMTA03.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 516BGnGl014071 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 6 Feb 2025 11:16:49 GMT Received: from hu-akakum-hyd.qualcomm.com (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 6 Feb 2025 03:16:44 -0800 From: Akash Kumar To: Thinh Nguyen , Greg Kroah-Hartman , Jack Pham , , Wesley Cheng CC: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "Vijayavardhan Vennapusa" , , , Akash Kumar Subject: [PATCH 10/18] arm64: dts: qcom: sdm630: Enable high bandwidth for hs isoc eps Date: Thu, 6 Feb 2025 16:45:35 +0530 Message-ID: <20250206111543.17392-11-quic_akakum@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20250206111543.17392-1-quic_akakum@quicinc.com> References: <20250206111543.17392-1-quic_akakum@quicinc.com> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: FZAD6IxXctlWam2qw1z9heaFXMQreJFo X-Proofpoint-GUID: FZAD6IxXctlWam2qw1z9heaFXMQreJFo X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-02-06_03,2025-02-05_03,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 impostorscore=0 priorityscore=1501 mlxlogscore=979 clxscore=1011 adultscore=0 spamscore=0 lowpriorityscore=0 suspectscore=0 bulkscore=0 phishscore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2501170000 definitions=main-2502060092 It is observed while testing multiple audio devices, a glitch is observed during testing. As per dwc datasheet,By default, HC reserves 80% of the bandwidth for periodic EPs. Add quirk to set GUCTL BIT 16 to accommodate higher bandwidth for 2 isoc eps. If this bit is set, the bandwidth is relaxed to 85% to accommodate two high speed, high bandwidth ISOC EPs. USB 2.0 required 80% bandwidth allocated for ISOC traffic. If two High-bandwidth ISOC devices (HD Webcams) are connected, and if each requires 1024-bytes X 3 packets per Micro-Frame, then the bandwidth required is around 82%. If this bit is set, then it is possible to connect two Webcams of 1024bytes X 3 paylod per Micro-Frame each. Otherwise, you may have to reduce the resolution of the Webcams. This bit is valid in Host and DRD configuration and is used in host mode operation only. USe this quirk to set bit for host mode uvc uac usecases where two isoc eps are used and flicker is seen. Signed-off-by: Akash Kumar --- arch/arm64/boot/dts/qcom/sdm630.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi index a2c079bac1a7..985f1252d7fd 100644 --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi @@ -1302,6 +1302,7 @@ snps,parkmode-disable-ss-quirk; snps,dis-u1-entry-quirk; snps,dis-u2-entry-quirk; + snps,dwc3_guctl_resbwhseps_quirk; phys = <&qusb2phy0>, <&usb3_qmpphy>; phy-names = "usb2-phy", "usb3-phy"; @@ -1509,6 +1510,7 @@ snps,dis_enblslpm_quirk; snps,dis-u1-entry-quirk; snps,dis-u2-entry-quirk; + snps,dwc3_guctl_resbwhseps_quirk; /* This is the HS-only host */ maximum-speed = "high-speed"; From patchwork Thu Feb 6 11:15:36 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AKASH KUMAR X-Patchwork-Id: 13962883 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3894922FDF7; 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Thu, 06 Feb 2025 11:16:53 +0000 (GMT) Received: from nasanex01a.na.qualcomm.com (nasanex01a.na.qualcomm.com [10.52.223.231]) by NASANPPMTA05.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 516BGrAd002510 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 6 Feb 2025 11:16:53 GMT Received: from hu-akakum-hyd.qualcomm.com (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 6 Feb 2025 03:16:49 -0800 From: Akash Kumar To: Thinh Nguyen , Greg Kroah-Hartman , Jack Pham , , Wesley Cheng CC: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "Vijayavardhan Vennapusa" , , , Akash Kumar Subject: [PATCH 11/18] arm64: dts: qcom: sdm845: Enable high bandwidth for hs isoc eps Date: Thu, 6 Feb 2025 16:45:36 +0530 Message-ID: <20250206111543.17392-12-quic_akakum@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20250206111543.17392-1-quic_akakum@quicinc.com> References: <20250206111543.17392-1-quic_akakum@quicinc.com> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: EdUvggoYVzbl9nbZbVRWWXJPa1DAT9qI X-Proofpoint-GUID: EdUvggoYVzbl9nbZbVRWWXJPa1DAT9qI X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-02-06_03,2025-02-05_03,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 priorityscore=1501 malwarescore=0 bulkscore=0 adultscore=0 lowpriorityscore=0 impostorscore=0 mlxlogscore=988 clxscore=1015 mlxscore=0 suspectscore=0 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2501170000 definitions=main-2502060093 It is observed while testing multiple audio devices, a glitch is observed during testing. As per dwc datasheet,By default, HC reserves 80% of the bandwidth for periodic EPs. Add quirk to set GUCTL BIT 16 to accommodate higher bandwidth for 2 isoc eps. If this bit is set, the bandwidth is relaxed to 85% to accommodate two high speed, high bandwidth ISOC EPs. USB 2.0 required 80% bandwidth allocated for ISOC traffic. If two High-bandwidth ISOC devices (HD Webcams) are connected, and if each requires 1024-bytes X 3 packets per Micro-Frame, then the bandwidth required is around 82%. If this bit is set, then it is possible to connect two Webcams of 1024bytes X 3 paylod per Micro-Frame each. Otherwise, you may have to reduce the resolution of the Webcams. This bit is valid in Host and DRD configuration and is used in host mode operation only. USe this quirk to set bit for host mode uvc uac usecases where two isoc eps are used and flicker is seen. Signed-off-by: Akash Kumar --- arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index e0ce804bb1a3..90810b94a7de 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -4141,6 +4141,7 @@ snps,parkmode-disable-ss-quirk; snps,dis-u1-entry-quirk; snps,dis-u2-entry-quirk; + snps,dwc3_guctl_resbwhseps_quirk; phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; phy-names = "usb2-phy", "usb3-phy"; @@ -4219,6 +4220,7 @@ snps,parkmode-disable-ss-quirk; snps,dis-u1-entry-quirk; snps,dis-u2-entry-quirk; + snps,dwc3_guctl_resbwhseps_quirk; phys = <&usb_2_hsphy>, <&usb_2_qmpphy>; phy-names = "usb2-phy", "usb3-phy"; }; From patchwork Thu Feb 6 11:15:37 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AKASH KUMAR X-Patchwork-Id: 13962884 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CFC46230262; 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Thu, 06 Feb 2025 11:16:58 +0000 (GMT) Received: from nasanex01a.na.qualcomm.com (nasanex01a.na.qualcomm.com [10.52.223.231]) by NASANPPMTA03.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 516BGvUr014183 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 6 Feb 2025 11:16:57 GMT Received: from hu-akakum-hyd.qualcomm.com (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 6 Feb 2025 03:16:53 -0800 From: Akash Kumar To: Thinh Nguyen , Greg Kroah-Hartman , Jack Pham , , Wesley Cheng CC: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "Vijayavardhan Vennapusa" , , , Akash Kumar Subject: [PATCH 12/18] arm64: dts: qcom: sdx75: Enable high bandwidth for hs isoc eps Date: Thu, 6 Feb 2025 16:45:37 +0530 Message-ID: <20250206111543.17392-13-quic_akakum@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20250206111543.17392-1-quic_akakum@quicinc.com> References: <20250206111543.17392-1-quic_akakum@quicinc.com> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: XSOrxTQYojEvnw5jwr3DJZtUsNKAVAUU X-Proofpoint-GUID: XSOrxTQYojEvnw5jwr3DJZtUsNKAVAUU X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-02-06_03,2025-02-05_03,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 impostorscore=0 priorityscore=1501 mlxlogscore=999 clxscore=1015 adultscore=0 spamscore=0 lowpriorityscore=0 suspectscore=0 bulkscore=0 phishscore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2501170000 definitions=main-2502060092 It is observed while testing multiple audio devices, a glitch is observed during testing. As per dwc datasheet,By default, HC reserves 80% of the bandwidth for periodic EPs. Add quirk to set GUCTL BIT 16 to accommodate higher bandwidth for 2 isoc eps. If this bit is set, the bandwidth is relaxed to 85% to accommodate two high speed, high bandwidth ISOC EPs. USB 2.0 required 80% bandwidth allocated for ISOC traffic. If two High-bandwidth ISOC devices (HD Webcams) are connected, and if each requires 1024-bytes X 3 packets per Micro-Frame, then the bandwidth required is around 82%. If this bit is set, then it is possible to connect two Webcams of 1024bytes X 3 paylod per Micro-Frame each. Otherwise, you may have to reduce the resolution of the Webcams. This bit is valid in Host and DRD configuration and is used in host mode operation only. USe this quirk to set bit for host mode uvc uac usecases where two isoc eps are used and flicker is seen. Signed-off-by: Akash Kumar --- arch/arm64/boot/dts/qcom/sdx75.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/qcom/sdx75.dtsi b/arch/arm64/boot/dts/qcom/sdx75.dtsi index b0a8a0fe5f39..f46374fd785c 100644 --- a/arch/arm64/boot/dts/qcom/sdx75.dtsi +++ b/arch/arm64/boot/dts/qcom/sdx75.dtsi @@ -1039,6 +1039,7 @@ snps,dis_enblslpm_quirk; snps,dis-u1-entry-quirk; snps,dis-u2-entry-quirk; + snps,dwc3_guctl_resbwhseps_quirk; phys = <&usb_hsphy>, <&usb_qmpphy>; phy-names = "usb2-phy", From patchwork Thu Feb 6 11:15:38 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AKASH KUMAR X-Patchwork-Id: 13962885 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A2564230983; Thu, 6 Feb 2025 11:17:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Thu, 06 Feb 2025 11:17:02 +0000 (GMT) Received: from nasanex01a.na.qualcomm.com (nasanex01a.na.qualcomm.com [10.52.223.231]) by NASANPPMTA05.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 516BH1vN002648 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 6 Feb 2025 11:17:01 GMT Received: from hu-akakum-hyd.qualcomm.com (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 6 Feb 2025 03:16:57 -0800 From: Akash Kumar To: Thinh Nguyen , Greg Kroah-Hartman , Jack Pham , , Wesley Cheng CC: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "Vijayavardhan Vennapusa" , , , Akash Kumar Subject: [PATCH 13/18] arm64: dts: qcom: qcs404: Enable high bandwidth for hs isoc eps Date: Thu, 6 Feb 2025 16:45:38 +0530 Message-ID: <20250206111543.17392-14-quic_akakum@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20250206111543.17392-1-quic_akakum@quicinc.com> References: <20250206111543.17392-1-quic_akakum@quicinc.com> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: IqhfAidhr1KV4lAqznP6c9YmIGAy1mdX X-Proofpoint-GUID: IqhfAidhr1KV4lAqznP6c9YmIGAy1mdX X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-02-06_03,2025-02-05_03,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 suspectscore=0 spamscore=0 clxscore=1015 mlxlogscore=948 lowpriorityscore=0 bulkscore=0 impostorscore=0 phishscore=0 priorityscore=1501 malwarescore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2501170000 definitions=main-2502060093 It is observed while testing multiple audio devices, a glitch is observed during testing. As per dwc datasheet,By default, HC reserves 80% of the bandwidth for periodic EPs. Add quirk to set GUCTL BIT 16 to accommodate higher bandwidth for 2 isoc eps. If this bit is set, the bandwidth is relaxed to 85% to accommodate two high speed, high bandwidth ISOC EPs. USB 2.0 required 80% bandwidth allocated for ISOC traffic. If two High-bandwidth ISOC devices (HD Webcams) are connected, and if each requires 1024-bytes X 3 packets per Micro-Frame, then the bandwidth required is around 82%. If this bit is set, then it is possible to connect two Webcams of 1024bytes X 3 paylod per Micro-Frame each. Otherwise, you may have to reduce the resolution of the Webcams. This bit is valid in Host and DRD configuration and is used in host mode operation only. USe this quirk to set bit for host mode uvc uac usecases where two isoc eps are used and flicker is seen. Signed-off-by: Akash Kumar --- arch/arm64/boot/dts/qcom/qcs404.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi index 5a9df6b12305..4a4126b9b45d 100644 --- a/arch/arm64/boot/dts/qcom/qcs404.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi @@ -696,6 +696,7 @@ snps,usb3_lpm_capable; snps,dis-u1-entry-quirk; snps,dis-u2-entry-quirk; + snps,dwc3_guctl_resbwhseps_quirk; dr_mode = "otg"; }; }; @@ -735,6 +736,7 @@ snps,usb3_lpm_capable; snps,dis-u1-entry-quirk; snps,dis-u2-entry-quirk; + snps,dwc3_guctl_resbwhseps_quirk; dr_mode = "peripheral"; }; }; From patchwork Thu Feb 6 11:15:39 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AKASH KUMAR X-Patchwork-Id: 13962886 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6687B22CBFC; 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Thu, 06 Feb 2025 11:17:07 +0000 (GMT) Received: from nasanex01a.na.qualcomm.com (nasanex01a.na.qualcomm.com [10.52.223.231]) by NASANPPMTA04.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 516BH6tf009854 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 6 Feb 2025 11:17:06 GMT Received: from hu-akakum-hyd.qualcomm.com (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 6 Feb 2025 03:17:01 -0800 From: Akash Kumar To: Thinh Nguyen , Greg Kroah-Hartman , Jack Pham , , Wesley Cheng CC: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "Vijayavardhan Vennapusa" , , , Akash Kumar Subject: [PATCH 14/18] arm64: dts: qcom: sc7180: Enable high bandwidth for hs isoc eps Date: Thu, 6 Feb 2025 16:45:39 +0530 Message-ID: <20250206111543.17392-15-quic_akakum@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20250206111543.17392-1-quic_akakum@quicinc.com> References: <20250206111543.17392-1-quic_akakum@quicinc.com> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: AgZLHUf3z49DrgDmEDKIqX_WdeblPr6J X-Proofpoint-GUID: AgZLHUf3z49DrgDmEDKIqX_WdeblPr6J X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-02-06_03,2025-02-05_03,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 malwarescore=0 phishscore=0 impostorscore=0 mlxlogscore=995 suspectscore=0 mlxscore=0 bulkscore=0 adultscore=0 clxscore=1015 priorityscore=1501 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2501170000 definitions=main-2502060093 It is observed while testing multiple audio devices, a glitch is observed during testing. As per dwc datasheet,By default, HC reserves 80% of the bandwidth for periodic EPs. Add quirk to set GUCTL BIT 16 to accommodate higher bandwidth for 2 isoc eps. If this bit is set, the bandwidth is relaxed to 85% to accommodate two high speed, high bandwidth ISOC EPs. USB 2.0 required 80% bandwidth allocated for ISOC traffic. If two High-bandwidth ISOC devices (HD Webcams) are connected, and if each requires 1024-bytes X 3 packets per Micro-Frame, then the bandwidth required is around 82%. If this bit is set, then it is possible to connect two Webcams of 1024bytes X 3 paylod per Micro-Frame each. Otherwise, you may have to reduce the resolution of the Webcams. This bit is valid in Host and DRD configuration and is used in host mode operation only. USe this quirk to set bit for host mode uvc uac usecases where two isoc eps are used and flicker is seen. Signed-off-by: Akash Kumar --- arch/arm64/boot/dts/qcom/sc7180.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index 87c432c12a24..e22aa8a757f9 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -3066,6 +3066,7 @@ snps,parkmode-disable-ss-quirk; snps,dis-u1-entry-quirk; snps,dis-u2-entry-quirk; + snps,dwc3_guctl_resbwhseps_quirk; phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; phy-names = "usb2-phy", "usb3-phy"; maximum-speed = "super-speed"; From patchwork Thu Feb 6 11:15:40 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AKASH KUMAR X-Patchwork-Id: 13962887 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EFFAE2309BF; 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As per dwc datasheet,By default, HC reserves 80% of the bandwidth for periodic EPs. Add quirk to set GUCTL BIT 16 to accommodate higher bandwidth for 2 isoc eps. If this bit is set, the bandwidth is relaxed to 85% to accommodate two high speed, high bandwidth ISOC EPs. USB 2.0 required 80% bandwidth allocated for ISOC traffic. If two High-bandwidth ISOC devices (HD Webcams) are connected, and if each requires 1024-bytes X 3 packets per Micro-Frame, then the bandwidth required is around 82%. If this bit is set, then it is possible to connect two Webcams of 1024bytes X 3 paylod per Micro-Frame each. Otherwise, you may have to reduce the resolution of the Webcams. This bit is valid in Host and DRD configuration and is used in host mode operation only. USe this quirk to set bit for host mode uvc uac usecases where two isoc eps are used and flicker is seen. Signed-off-by: Akash Kumar --- arch/arm64/boot/dts/qcom/x1e80100.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi index 4936fa5b98ff..69b767d0fb18 100644 --- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi +++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi @@ -4725,6 +4725,7 @@ snps,usb3_lpm_capable; snps,dis-u1-entry-quirk; snps,dis-u2-entry-quirk; + snps,dwc3_guctl_resbwhseps_quirk; dma-coherent; @@ -4813,6 +4814,7 @@ maximum-speed = "high-speed"; snps,dis-u1-entry-quirk; snps,dis-u2-entry-quirk; + snps,dwc3_guctl_resbwhseps_quirk; ports { #address-cells = <1>; @@ -4911,6 +4913,7 @@ snps,usb3_lpm_capable; snps,dis-u1-entry-quirk; snps,dis-u2-entry-quirk; + snps,dwc3_guctl_resbwhseps_quirk; dma-coherent; }; @@ -4984,6 +4987,7 @@ snps,usb3_lpm_capable; snps,dis-u1-entry-quirk; snps,dis-u2-entry-quirk; + snps,dwc3_guctl_resbwhseps_quirk; dma-coherent; @@ -5084,6 +5088,7 @@ snps,usb3_lpm_capable; snps,dis-u1-entry-quirk; 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As per dwc datasheet,By default, HC reserves 80% of the bandwidth for periodic EPs. Add quirk to set GUCTL BIT 16 to accommodate higher bandwidth for 2 isoc eps. If this bit is set, the bandwidth is relaxed to 85% to accommodate two high speed, high bandwidth ISOC EPs. USB 2.0 required 80% bandwidth allocated for ISOC traffic. If two High-bandwidth ISOC devices (HD Webcams) are connected, and if each requires 1024-bytes X 3 packets per Micro-Frame, then the bandwidth required is around 82%. If this bit is set, then it is possible to connect two Webcams of 1024bytes X 3 paylod per Micro-Frame each. Otherwise, you may have to reduce the resolution of the Webcams. This bit is valid in Host and DRD configuration and is used in host mode operation only. USe this quirk to set bit for host mode uvc uac usecases where two isoc eps are used and flicker is seen. Signed-off-by: Akash Kumar --- arch/arm64/boot/dts/qcom/qdu1000.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/qcom/qdu1000.dtsi b/arch/arm64/boot/dts/qcom/qdu1000.dtsi index f973aa8f7477..bc1a0b7e0d3a 100644 --- a/arch/arm64/boot/dts/qcom/qdu1000.dtsi +++ b/arch/arm64/boot/dts/qcom/qdu1000.dtsi @@ -1025,6 +1025,7 @@ snps,dis_enblslpm_quirk; snps,dis-u1-entry-quirk; snps,dis-u2-entry-quirk; + snps,dwc3_guctl_resbwhseps_quirk; phys = <&usb_1_hsphy>, <&usb_1_qmpphy>; phy-names = "usb2-phy", From patchwork Thu Feb 6 11:15:42 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AKASH KUMAR X-Patchwork-Id: 13962889 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CCAFD231A32; Thu, 6 Feb 2025 11:17:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Thu, 06 Feb 2025 11:17:19 +0000 (GMT) Received: from nasanex01a.na.qualcomm.com (nasanex01a.na.qualcomm.com [10.52.223.231]) by NASANPPMTA05.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 516BHIjM002975 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 6 Feb 2025 11:17:18 GMT Received: from hu-akakum-hyd.qualcomm.com (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 6 Feb 2025 03:17:14 -0800 From: Akash Kumar To: Thinh Nguyen , Greg Kroah-Hartman , Jack Pham , , Wesley Cheng CC: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "Vijayavardhan Vennapusa" , , , Akash Kumar Subject: [PATCH 17/18] arm64: dts: qcom: sc8280xp: Enable high bandwidth for hs isoc eps Date: Thu, 6 Feb 2025 16:45:42 +0530 Message-ID: <20250206111543.17392-18-quic_akakum@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20250206111543.17392-1-quic_akakum@quicinc.com> References: <20250206111543.17392-1-quic_akakum@quicinc.com> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: FIs1Z80xiN_HFR_oSBPYGV_CnkfVlO4l X-Proofpoint-GUID: FIs1Z80xiN_HFR_oSBPYGV_CnkfVlO4l X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-02-06_03,2025-02-05_03,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 phishscore=0 adultscore=0 priorityscore=1501 impostorscore=0 mlxscore=0 spamscore=0 lowpriorityscore=0 suspectscore=0 mlxlogscore=936 malwarescore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2501170000 definitions=main-2502060093 It is observed while testing multiple audio devices, a glitch is observed during testing. As per dwc datasheet,By default, HC reserves 80% of the bandwidth for periodic EPs. Add quirk to set GUCTL BIT 16 to accommodate higher bandwidth for 2 isoc eps. If this bit is set, the bandwidth is relaxed to 85% to accommodate two high speed, high bandwidth ISOC EPs. USB 2.0 required 80% bandwidth allocated for ISOC traffic. If two High-bandwidth ISOC devices (HD Webcams) are connected, and if each requires 1024-bytes X 3 packets per Micro-Frame, then the bandwidth required is around 82%. If this bit is set, then it is possible to connect two Webcams of 1024bytes X 3 paylod per Micro-Frame each. Otherwise, you may have to reduce the resolution of the Webcams. This bit is valid in Host and DRD configuration and is used in host mode operation only. USe this quirk to set bit for host mode uvc uac usecases where two isoc eps are used and flicker is seen. Signed-off-by: Akash Kumar --- arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi index 01501acb1790..8535244e4105 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -3538,6 +3538,7 @@ dr_mode = "host"; snps,dis-u1-entry-quirk; snps,dis-u2-entry-quirk; + snps,dwc3_guctl_resbwhseps_quirk; }; }; @@ -3597,6 +3598,7 @@ phy-names = "usb2-phy", "usb3-phy"; snps,dis-u1-entry-quirk; snps,dis-u2-entry-quirk; + snps,dwc3_guctl_resbwhseps_quirk; ports { #address-cells = <1>; @@ -3676,6 +3678,7 @@ phy-names = "usb2-phy", "usb3-phy"; snps,dis-u1-entry-quirk; snps,dis-u2-entry-quirk; + snps,dwc3_guctl_resbwhseps_quirk; ports { #address-cells = <1>; From patchwork Thu Feb 6 11:15:43 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AKASH KUMAR X-Patchwork-Id: 13962890 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 76617231A4C; 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Thu, 06 Feb 2025 11:17:24 +0000 (GMT) Received: from nasanex01a.na.qualcomm.com (nasanex01a.na.qualcomm.com [10.52.223.231]) by NASANPPMTA03.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 516BHNKw014514 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 6 Feb 2025 11:17:23 GMT Received: from hu-akakum-hyd.qualcomm.com (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 6 Feb 2025 03:17:19 -0800 From: Akash Kumar To: Thinh Nguyen , Greg Kroah-Hartman , Jack Pham , , Wesley Cheng CC: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "Vijayavardhan Vennapusa" , , , Akash Kumar Subject: [PATCH 18/18] arm64: dts: qcom: sc8180x: Enable high bandwidth for hs isoc eps Date: Thu, 6 Feb 2025 16:45:43 +0530 Message-ID: <20250206111543.17392-19-quic_akakum@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20250206111543.17392-1-quic_akakum@quicinc.com> References: <20250206111543.17392-1-quic_akakum@quicinc.com> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: Fiapd-lVlyX6-irdFofSnmoPr1q9Tttw X-Proofpoint-ORIG-GUID: Fiapd-lVlyX6-irdFofSnmoPr1q9Tttw X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-02-06_03,2025-02-05_03,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 bulkscore=0 malwarescore=0 clxscore=1015 priorityscore=1501 mlxlogscore=989 impostorscore=0 lowpriorityscore=0 phishscore=0 suspectscore=0 adultscore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2501170000 definitions=main-2502060092 It is observed while testing multiple audio devices, a glitch is observed during testing. As per dwc datasheet,By default, HC reserves 80% of the bandwidth for periodic EPs. Add quirk to set GUCTL BIT 16 to accommodate higher bandwidth for 2 isoc eps. If this bit is set, the bandwidth is relaxed to 85% to accommodate two high speed, high bandwidth ISOC EPs. USB 2.0 required 80% bandwidth allocated for ISOC traffic. If two High-bandwidth ISOC devices (HD Webcams) are connected, and if each requires 1024-bytes X 3 packets per Micro-Frame, then the bandwidth required is around 82%. If this bit is set, then it is possible to connect two Webcams of 1024bytes X 3 paylod per Micro-Frame each. Otherwise, you may have to reduce the resolution of the Webcams. This bit is valid in Host and DRD configuration and is used in host mode operation only. USe this quirk to set bit for host mode uvc uac usecases where two isoc eps are used and flicker is seen. Signed-off-by: Akash Kumar --- arch/arm64/boot/dts/qcom/sc8180x.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8180x.dtsi b/arch/arm64/boot/dts/qcom/sc8180x.dtsi index 28693a3bfc7f..fafc907efa84 100644 --- a/arch/arm64/boot/dts/qcom/sc8180x.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8180x.dtsi @@ -2764,6 +2764,7 @@ snps,dis_enblslpm_quirk; snps,dis-u1-entry-quirk; snps,dis-u2-entry-quirk; + snps,dwc3_guctl_resbwhseps_quirk; phys = <&usb_mp_hsphy0>, <&usb_mp_qmpphy0>, <&usb_mp_hsphy1>, @@ -2829,6 +2830,7 @@ snps,dis_enblslpm_quirk; snps,dis-u1-entry-quirk; snps,dis-u2-entry-quirk; + snps,dwc3_guctl_resbwhseps_quirk; phys = <&usb_prim_hsphy>, <&usb_prim_qmpphy QMP_USB43DP_USB3_PHY>; phy-names = "usb2-phy", "usb3-phy"; @@ -2908,6 +2910,7 @@ snps,dis_enblslpm_quirk; snps,dis-u1-entry-quirk; snps,dis-u2-entry-quirk; + snps,dwc3_guctl_resbwhseps_quirk; phys = <&usb_sec_hsphy>, <&usb_sec_qmpphy QMP_USB43DP_USB3_PHY>; phy-names = "usb2-phy", "usb3-phy";