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Thu, 6 Feb 2025 16:41:48 +0000 From: Ganapatrao Kulkarni To: kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org Cc: maz@kernel.org, oliver.upton@linux.dev, joey.gouly@arm.com, suzuki.poulose@arm.com, darren@os.amperecomputing.com, scott@os.amperecomputing.com, gankulkarni@os.amperecomputing.com Subject: [RFC PATCH 1/2] KVM: arm64: nv: selftests: Add guest hypervisor test Date: Thu, 6 Feb 2025 08:41:19 -0800 Message-ID: <20250206164120.4045569-2-gankulkarni@os.amperecomputing.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20250206164120.4045569-1-gankulkarni@os.amperecomputing.com> References: <20250206164120.4045569-1-gankulkarni@os.amperecomputing.com> X-ClientProxiedBy: CH0PR13CA0019.namprd13.prod.outlook.com (2603:10b6:610:b1::24) To SJ2PR01MB8101.prod.exchangelabs.com (2603:10b6:a03:4f6::10) Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ2PR01MB8101:EE_|IA0PR01MB8377:EE_ X-MS-Office365-Filtering-Correlation-Id: c45b04f8-66d5-48f0-88e4-08dd46cd2605 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|52116014|376014|366016|38350700014; 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Also adds a KVM selftest to execute guest code as a guest hypervisor(L1). Signed-off-by: Ganapatrao Kulkarni --- tools/testing/selftests/kvm/Makefile.kvm | 1 + .../selftests/kvm/arm64/nv_guest_hypervisor.c | 83 +++++++++++++++++++ .../kvm/include/arm64/kvm_util_arch.h | 3 + .../selftests/kvm/include/arm64/nv_util.h | 28 +++++++ .../testing/selftests/kvm/include/kvm_util.h | 1 + .../selftests/kvm/lib/arm64/processor.c | 59 +++++++++---- 6 files changed, 161 insertions(+), 14 deletions(-) create mode 100644 tools/testing/selftests/kvm/arm64/nv_guest_hypervisor.c create mode 100644 tools/testing/selftests/kvm/include/arm64/nv_util.h diff --git a/tools/testing/selftests/kvm/Makefile.kvm b/tools/testing/selftests/kvm/Makefile.kvm index 4277b983cace..a85d3bec9fb1 100644 --- a/tools/testing/selftests/kvm/Makefile.kvm +++ b/tools/testing/selftests/kvm/Makefile.kvm @@ -154,6 +154,7 @@ TEST_GEN_PROGS_arm64 += arm64/vgic_irq TEST_GEN_PROGS_arm64 += arm64/vgic_lpi_stress TEST_GEN_PROGS_arm64 += arm64/vpmu_counter_access TEST_GEN_PROGS_arm64 += arm64/no-vgic-v3 +TEST_GEN_PROGS_arm64 += arm64/nv_guest_hypervisor TEST_GEN_PROGS_arm64 += access_tracking_perf_test TEST_GEN_PROGS_arm64 += arch_timer TEST_GEN_PROGS_arm64 += coalesced_io_test diff --git a/tools/testing/selftests/kvm/arm64/nv_guest_hypervisor.c b/tools/testing/selftests/kvm/arm64/nv_guest_hypervisor.c new file mode 100644 index 000000000000..5aeefe43aff7 --- /dev/null +++ b/tools/testing/selftests/kvm/arm64/nv_guest_hypervisor.c @@ -0,0 +1,83 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2025 Ampere Computing LLC + */ +#include +#include +#include +#include + +static void guest_code(void) +{ + if (read_sysreg(CurrentEL) == CurrentEL_EL2) + GUEST_PRINTF("Executing guest code in vEL2\n"); + else + GUEST_FAIL("Fail to run in vEL2\n"); + + GUEST_DONE(); +} + +static void guest_undef_handler(struct ex_regs *regs) +{ + GUEST_FAIL("Unexpected exception far_el1 = 0x%lx", read_sysreg(far_el1)); +} + +static void test_run_vcpu(struct kvm_vcpu *vcpu) +{ + struct ucall uc; + + do { + vcpu_run(vcpu); + + switch (get_ucall(vcpu, &uc)) { + case UCALL_ABORT: + REPORT_GUEST_ASSERT(uc); + break; + case UCALL_PRINTF: + printf("%s", uc.buffer); + break; + case UCALL_DONE: + printf("Test PASS\n"); + break; + default: + TEST_FAIL("Unknown ucall %lu", uc.cmd); + } + } while (uc.cmd != UCALL_DONE); +} + +static void test_nv_guest_hypervisor(void) +{ + struct kvm_vcpu *vcpu; + struct kvm_vm *vm; + struct kvm_vcpu_init init; + int gic_fd; + + vm = vm_create(1); + vm_ioctl(vm, KVM_ARM_PREFERRED_TARGET, &init); + + init.features[0] = 0; + init_vcpu_nested(&init); + vcpu = aarch64_vcpu_add(vm, 0, &init, guest_code); + + __TEST_REQUIRE(is_vcpu_nested(vcpu), "Failed to Enable NV"); + + vm_init_descriptor_tables(vm); + vcpu_init_descriptor_tables(vcpu); + gic_fd = vgic_v3_setup(vm, 1, 64); + __TEST_REQUIRE(gic_fd >= 0, "Failed to create vgic-v3"); + + vm_install_sync_handler(vm, VECTOR_SYNC_CURRENT, + ESR_ELx_EC_UNKNOWN, guest_undef_handler); + + test_run_vcpu(vcpu); + kvm_vm_free(vm); +} + +int main(int argc, char *argv[]) +{ + TEST_REQUIRE(kvm_has_cap(KVM_CAP_ARM_EL2)); + + test_nv_guest_hypervisor(); + + return 0; +} diff --git a/tools/testing/selftests/kvm/include/arm64/kvm_util_arch.h b/tools/testing/selftests/kvm/include/arm64/kvm_util_arch.h index e43a57d99b56..ab5279c24413 100644 --- a/tools/testing/selftests/kvm/include/arm64/kvm_util_arch.h +++ b/tools/testing/selftests/kvm/include/arm64/kvm_util_arch.h @@ -2,6 +2,9 @@ #ifndef SELFTEST_KVM_UTIL_ARCH_H #define SELFTEST_KVM_UTIL_ARCH_H +#define CurrentEL_EL1 (1 << 2) +#define CurrentEL_EL2 (2 << 2) + struct kvm_vm_arch {}; #endif // SELFTEST_KVM_UTIL_ARCH_H diff --git a/tools/testing/selftests/kvm/include/arm64/nv_util.h b/tools/testing/selftests/kvm/include/arm64/nv_util.h new file mode 100644 index 000000000000..4fecf1f18554 --- /dev/null +++ b/tools/testing/selftests/kvm/include/arm64/nv_util.h @@ -0,0 +1,28 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2025 Ampere Computing + */ +#ifndef SELFTEST_NV_UTIL_H +#define SELFTEST_NV_UTIL_H + +#include + +/* NV helpers */ +static inline void init_vcpu_nested(struct kvm_vcpu_init *init) +{ + init->features[0] |= (1 << KVM_ARM_VCPU_HAS_EL2); +} + +static inline bool kvm_arm_vcpu_has_el2(struct kvm_vcpu_init *init) +{ + unsigned long features = init->features[0]; + + return test_bit(KVM_ARM_VCPU_HAS_EL2, &features); +} + +static inline bool is_vcpu_nested(struct kvm_vcpu *vcpu) +{ + return vcpu->nested; +} + +#endif /* SELFTEST_NV_UTIL_H */ diff --git a/tools/testing/selftests/kvm/include/kvm_util.h b/tools/testing/selftests/kvm/include/kvm_util.h index 4c4e5a847f67..8c53dbc17f8f 100644 --- a/tools/testing/selftests/kvm/include/kvm_util.h +++ b/tools/testing/selftests/kvm/include/kvm_util.h @@ -58,6 +58,7 @@ struct kvm_vcpu { struct kvm_dirty_gfn *dirty_gfns; uint32_t fetch_index; uint32_t dirty_gfns_count; + bool nested; }; struct userspace_mem_regions { diff --git a/tools/testing/selftests/kvm/lib/arm64/processor.c b/tools/testing/selftests/kvm/lib/arm64/processor.c index 7ba3aa3755f3..35ba2ace61a2 100644 --- a/tools/testing/selftests/kvm/lib/arm64/processor.c +++ b/tools/testing/selftests/kvm/lib/arm64/processor.c @@ -10,6 +10,7 @@ #include "guest_modes.h" #include "kvm_util.h" +#include "nv_util.h" #include "processor.h" #include "ucall_common.h" @@ -258,14 +259,47 @@ void virt_arch_dump(FILE *stream, struct kvm_vm *vm, uint8_t indent) } } +static void aarch64_vcpu_set_reg(struct kvm_vcpu *vcpu, uint64_t sctlr_el1, + uint64_t tcr_el1, uint64_t ttbr0_el1) +{ + uint64_t fpen; + + /* + * Enable FP/ASIMD to avoid trapping when accessing Q0-Q15 + * registers, which the variable argument list macros do. + */ + fpen = 3 << 20; + + if (is_vcpu_nested(vcpu)) { + vcpu_set_reg(vcpu, KVM_ARM64_SYS_REG(SYS_CPTR_EL2), fpen); + vcpu_set_reg(vcpu, KVM_ARM64_SYS_REG(SYS_SCTLR_EL2), sctlr_el1); + vcpu_set_reg(vcpu, KVM_ARM64_SYS_REG(SYS_TCR_EL2), tcr_el1); + vcpu_set_reg(vcpu, KVM_ARM64_SYS_REG(SYS_MAIR_EL2), DEFAULT_MAIR_EL1); + vcpu_set_reg(vcpu, KVM_ARM64_SYS_REG(SYS_TTBR0_EL2), ttbr0_el1); + vcpu_set_reg(vcpu, KVM_ARM64_SYS_REG(SYS_TPIDR_EL2), vcpu->id); + } else { + vcpu_set_reg(vcpu, KVM_ARM64_SYS_REG(SYS_CPACR_EL1), fpen); + vcpu_set_reg(vcpu, KVM_ARM64_SYS_REG(SYS_SCTLR_EL1), sctlr_el1); + vcpu_set_reg(vcpu, KVM_ARM64_SYS_REG(SYS_TCR_EL1), tcr_el1); + vcpu_set_reg(vcpu, KVM_ARM64_SYS_REG(SYS_MAIR_EL1), DEFAULT_MAIR_EL1); + vcpu_set_reg(vcpu, KVM_ARM64_SYS_REG(SYS_TTBR0_EL1), ttbr0_el1); + vcpu_set_reg(vcpu, KVM_ARM64_SYS_REG(SYS_TPIDR_EL1), vcpu->id); +} +} + void aarch64_vcpu_setup(struct kvm_vcpu *vcpu, struct kvm_vcpu_init *init) { struct kvm_vcpu_init default_init = { .target = -1, }; struct kvm_vm *vm = vcpu->vm; uint64_t sctlr_el1, tcr_el1, ttbr0_el1; - if (!init) + if (!init) { init = &default_init; + } else { + /* Is this vcpu a Guest-Hypersior */ + if (kvm_arm_vcpu_has_el2(init)) + vcpu->nested = true; + } if (init->target == -1) { struct kvm_vcpu_init preferred; @@ -275,12 +309,6 @@ void aarch64_vcpu_setup(struct kvm_vcpu *vcpu, struct kvm_vcpu_init *init) vcpu_ioctl(vcpu, KVM_ARM_VCPU_INIT, init); - /* - * Enable FP/ASIMD to avoid trapping when accessing Q0-Q15 - * registers, which the variable argument list macros do. - */ - vcpu_set_reg(vcpu, KVM_ARM64_SYS_REG(SYS_CPACR_EL1), 3 << 20); - sctlr_el1 = vcpu_get_reg(vcpu, KVM_ARM64_SYS_REG(SYS_SCTLR_EL1)); tcr_el1 = vcpu_get_reg(vcpu, KVM_ARM64_SYS_REG(SYS_TCR_EL1)); @@ -349,11 +377,7 @@ void aarch64_vcpu_setup(struct kvm_vcpu *vcpu, struct kvm_vcpu_init *init) if (use_lpa2_pte_format(vm)) tcr_el1 |= (1ul << 59) /* DS */; - vcpu_set_reg(vcpu, KVM_ARM64_SYS_REG(SYS_SCTLR_EL1), sctlr_el1); - vcpu_set_reg(vcpu, KVM_ARM64_SYS_REG(SYS_TCR_EL1), tcr_el1); - vcpu_set_reg(vcpu, KVM_ARM64_SYS_REG(SYS_MAIR_EL1), DEFAULT_MAIR_EL1); - vcpu_set_reg(vcpu, KVM_ARM64_SYS_REG(SYS_TTBR0_EL1), ttbr0_el1); - vcpu_set_reg(vcpu, KVM_ARM64_SYS_REG(SYS_TPIDR_EL1), vcpu->id); + aarch64_vcpu_set_reg(vcpu, sctlr_el1, tcr_el1, ttbr0_el1); } void vcpu_arch_dump(FILE *stream, struct kvm_vcpu *vcpu, uint8_t indent) @@ -387,7 +411,11 @@ static struct kvm_vcpu *__aarch64_vcpu_add(struct kvm_vm *vm, uint32_t vcpu_id, aarch64_vcpu_setup(vcpu, init); - vcpu_set_reg(vcpu, ARM64_CORE_REG(sp_el1), stack_vaddr + stack_size); + if (is_vcpu_nested(vcpu)) + vcpu_set_reg(vcpu, KVM_ARM64_SYS_REG(SYS_SP_EL2), stack_vaddr + stack_size); + else + vcpu_set_reg(vcpu, ARM64_CORE_REG(sp_el1), stack_vaddr + stack_size); + return vcpu; } @@ -457,7 +485,10 @@ void vcpu_init_descriptor_tables(struct kvm_vcpu *vcpu) { extern char vectors; - vcpu_set_reg(vcpu, KVM_ARM64_SYS_REG(SYS_VBAR_EL1), (uint64_t)&vectors); + if (is_vcpu_nested(vcpu)) + vcpu_set_reg(vcpu, KVM_ARM64_SYS_REG(SYS_VBAR_EL2), (uint64_t)&vectors); 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Thu, 6 Feb 2025 16:41:49 +0000 From: Ganapatrao Kulkarni To: kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org Cc: maz@kernel.org, oliver.upton@linux.dev, joey.gouly@arm.com, suzuki.poulose@arm.com, darren@os.amperecomputing.com, scott@os.amperecomputing.com, gankulkarni@os.amperecomputing.com Subject: [RFC PATCH 2/2] KVM: arm64: nv: selftests: Access VNCR mapped registers Date: Thu, 6 Feb 2025 08:41:20 -0800 Message-ID: <20250206164120.4045569-3-gankulkarni@os.amperecomputing.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20250206164120.4045569-1-gankulkarni@os.amperecomputing.com> References: <20250206164120.4045569-1-gankulkarni@os.amperecomputing.com> X-ClientProxiedBy: CH0PR13CA0019.namprd13.prod.outlook.com (2603:10b6:610:b1::24) To SJ2PR01MB8101.prod.exchangelabs.com (2603:10b6:a03:4f6::10) Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ2PR01MB8101:EE_|SJ0PR01MB6478:EE_ X-MS-Office365-Filtering-Correlation-Id: d24f4c67-dcb5-4b2f-a837-08dd46cd270b X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|366016|1800799024|52116014|376014|38350700014; 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This test code accesses all those registers in guest code to validate that they are not trapped to L0. Signed-off-by: Ganapatrao Kulkarni --- tools/testing/selftests/kvm/Makefile.kvm | 1 + .../selftests/kvm/arm64/nv_vncr_regs_test.c | 255 ++++++++++++++++++ 2 files changed, 256 insertions(+) create mode 100644 tools/testing/selftests/kvm/arm64/nv_vncr_regs_test.c diff --git a/tools/testing/selftests/kvm/Makefile.kvm b/tools/testing/selftests/kvm/Makefile.kvm index a85d3bec9fb1..7790e4021013 100644 --- a/tools/testing/selftests/kvm/Makefile.kvm +++ b/tools/testing/selftests/kvm/Makefile.kvm @@ -155,6 +155,7 @@ TEST_GEN_PROGS_arm64 += arm64/vgic_lpi_stress TEST_GEN_PROGS_arm64 += arm64/vpmu_counter_access TEST_GEN_PROGS_arm64 += arm64/no-vgic-v3 TEST_GEN_PROGS_arm64 += arm64/nv_guest_hypervisor +TEST_GEN_PROGS_arm64 += arm64/nv_vncr_regs_test TEST_GEN_PROGS_arm64 += access_tracking_perf_test TEST_GEN_PROGS_arm64 += arch_timer TEST_GEN_PROGS_arm64 += coalesced_io_test diff --git a/tools/testing/selftests/kvm/arm64/nv_vncr_regs_test.c b/tools/testing/selftests/kvm/arm64/nv_vncr_regs_test.c new file mode 100644 index 000000000000..d05b20b828ff --- /dev/null +++ b/tools/testing/selftests/kvm/arm64/nv_vncr_regs_test.c @@ -0,0 +1,255 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2025 Ampere Computing LLC + * + * This is a test to validate Nested Virtualization. + */ +#include +#include +#include +#include + +#define __check_sr_read(r) \ + ({ \ + uint64_t val; \ + \ + handled = false; \ + dsb(sy); \ + val = read_sysreg_s(SYS_ ## r); \ + val; \ + }) + +#define __check_sr_write(r) \ + do { \ + handled = false; \ + dsb(sy); \ + write_sysreg_s(0, SYS_ ## r); \ + isb(); \ + } while (0) + + +#define check_sr_read(r) \ + do { \ + __check_sr_read(r); \ + __GUEST_ASSERT(!handled, #r "Read Test Failed"); \ + } while (0) + +#define check_sr_write(r) \ + do { \ + __check_sr_write(r); \ + __GUEST_ASSERT(!handled, #r "Write Test Failed"); \ + } while (0) + +#define check_sr_rw(r) \ + do { \ + GUEST_PRINTF("%s\n", #r); \ + check_sr_write(r); \ + check_sr_read(r); \ + } while (0) + +static void test_vncr_mapped_regs(void); +static void regs_test_ich_lr(void); + +static volatile bool handled; + +static void regs_test_ich_lr(void) +{ + int nr_lr, lr; + + nr_lr = (read_sysreg_s(SYS_ICH_VTR_EL2) & 0xf); + + for (lr = 0; lr <= nr_lr; lr++) { + switch (lr) { + case 0: + check_sr_rw(ICH_LR0_EL2); + break; + case 1: + check_sr_rw(ICH_LR1_EL2); + break; + case 2: + check_sr_rw(ICH_LR2_EL2); + break; + case 3: + check_sr_rw(ICH_LR3_EL2); + break; + case 4: + check_sr_rw(ICH_LR4_EL2); + break; + case 5: + check_sr_rw(ICH_LR5_EL2); + break; + case 6: + check_sr_rw(ICH_LR6_EL2); + break; + case 7: + check_sr_rw(ICH_LR7_EL2); + break; + case 8: + check_sr_rw(ICH_LR8_EL2); + break; + case 9: + check_sr_rw(ICH_LR9_EL2); + break; + case 10: + check_sr_rw(ICH_LR10_EL2); + break; + case 11: + check_sr_rw(ICH_LR11_EL2); + break; + case 12: + check_sr_rw(ICH_LR12_EL2); + break; + case 13: + check_sr_rw(ICH_LR13_EL2); + break; + case 14: + check_sr_rw(ICH_LR14_EL2); + break; + case 15: + check_sr_rw(ICH_LR15_EL2); + break; + default: + break; + } + } +} + +/* + * Validate READ/WRITE to VNCR Mapped registers for NV1=0 + */ + +static void test_vncr_mapped_regs(void) +{ + /* + * Access all VNCR Mapped registers, and fail if we get an UNDEF. + */ + + GUEST_PRINTF("VNCR Mapped registers access test:\n"); + check_sr_rw(VTTBR_EL2); + check_sr_rw(VTCR_EL2); + check_sr_rw(VMPIDR_EL2); + check_sr_rw(CNTVOFF_EL2); + check_sr_rw(HCR_EL2); + check_sr_rw(HSTR_EL2); + check_sr_rw(VPIDR_EL2); + check_sr_rw(TPIDR_EL2); + check_sr_rw(VNCR_EL2); + check_sr_rw(CPACR_EL12); + check_sr_rw(CONTEXTIDR_EL12); + check_sr_rw(SCTLR_EL12); + check_sr_rw(ACTLR_EL1); + check_sr_rw(TCR_EL12); + check_sr_rw(AFSR0_EL12); + check_sr_rw(AFSR1_EL12); + check_sr_rw(ESR_EL12); + check_sr_rw(MAIR_EL12); + check_sr_rw(AMAIR_EL12); + check_sr_rw(MDSCR_EL1); + check_sr_rw(SPSR_EL12); + check_sr_rw(CNTV_CVAL_EL02); + check_sr_rw(CNTV_CTL_EL02); + check_sr_rw(CNTP_CVAL_EL02); + check_sr_rw(CNTP_CTL_EL02); + check_sr_rw(HAFGRTR_EL2); + check_sr_rw(TTBR0_EL12); + check_sr_rw(TTBR1_EL12); + check_sr_rw(FAR_EL12); + check_sr_rw(ELR_EL12); + check_sr_rw(SP_EL1); + check_sr_rw(VBAR_EL12); + + regs_test_ich_lr(); + + check_sr_rw(ICH_AP0R0_EL2); + check_sr_rw(ICH_AP1R0_EL2); + check_sr_rw(ICH_HCR_EL2); + check_sr_rw(ICH_VMCR_EL2); + check_sr_rw(VDISR_EL2); + check_sr_rw(MPAM1_EL12); + check_sr_rw(MPAMHCR_EL2); + check_sr_rw(MPAMVPMV_EL2); + check_sr_rw(MPAMVPM0_EL2); + check_sr_rw(MPAMVPM1_EL2); + check_sr_rw(MPAMVPM2_EL2); + check_sr_rw(MPAMVPM3_EL2); + check_sr_rw(MPAMVPM4_EL2); + check_sr_rw(MPAMVPM5_EL2); + check_sr_rw(MPAMVPM6_EL2); + check_sr_rw(MPAMVPM7_EL2); +} + +static void guest_code(void) +{ + if (read_sysreg(CurrentEL) != CurrentEL_EL2) + GUEST_FAIL("Fail to run in vEL2\n"); + + test_vncr_mapped_regs(); + GUEST_DONE(); +} + +static void guest_undef_handler(struct ex_regs *regs) +{ + handled = true; + regs->pc += 4; + GUEST_FAIL("TEST FAIL: register access trap to EL2"); +} + +static void test_run_vcpu(struct kvm_vcpu *vcpu) +{ + struct ucall uc; + + do { + vcpu_run(vcpu); + + switch (get_ucall(vcpu, &uc)) { + case UCALL_ABORT: + REPORT_GUEST_ASSERT(uc); + break; + case UCALL_PRINTF: + printf("%s", uc.buffer); + break; + case UCALL_DONE: + printf("TEST PASS\n"); + break; + default: + TEST_FAIL("Unknown ucall %lu", uc.cmd); + } + } while (uc.cmd != UCALL_DONE); +} + +static void test_nv_vncr(void) +{ + struct kvm_vcpu *vcpu; + struct kvm_vm *vm; + struct kvm_vcpu_init init; + int gic_fd; + + vm = vm_create(1); + vm_ioctl(vm, KVM_ARM_PREFERRED_TARGET, &init); + + init.features[0] = 0; + init_vcpu_nested(&init); + vcpu = aarch64_vcpu_add(vm, 0, &init, guest_code); + + __TEST_REQUIRE(is_vcpu_nested(vcpu), "Failed to Enable NV"); + + vm_init_descriptor_tables(vm); + vcpu_init_descriptor_tables(vcpu); + gic_fd = vgic_v3_setup(vm, 1, 64); + __TEST_REQUIRE(gic_fd >= 0, "Failed to create vgic-v3"); + + vm_install_sync_handler(vm, VECTOR_SYNC_CURRENT, + ESR_ELx_EC_UNKNOWN, guest_undef_handler); + + test_run_vcpu(vcpu); + kvm_vm_free(vm); +} + +int main(int argc, char *argv[]) +{ + TEST_REQUIRE(kvm_has_cap(KVM_CAP_ARM_EL2)); + + test_nv_vncr(); + + return 0; +}