From patchwork Fri Feb 7 16:19:41 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Jones X-Patchwork-Id: 13965422 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B1F28C0219C for ; Fri, 7 Feb 2025 16:19:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=WAnycvpwe7N2wAiGHeXhBXocRMSYTvcjyPSu6NS/PoM=; b=jPN/7gbPS9/+Zf jWwCNZjWg6Ty3pzIdr6k4P9yMtPwdlPbJsDcF7sox7cY8YwHaRntl/ifGBGv0ARSIlnJxC5D16L8X oDVOte1MSiloHkMn6nyipVA6HrxE3fbHgcG0fofQWJQdDgergus89KPXwCzSQIATe5TAcKxP7SPQB w0gFqREW4JMLWmpPA617Ef+S5vr6dDBI4ts5H/zqrqUAL01dPghTnuADa2U1oO2xHLiDIiVPJVNz3 zjyNcO3pwZiv2y015LM95CiWP3E+nvr6dmbbKEUqNZk6a+8f4IFV/jdxroU8ydmtJe7XgacXmDrhM WbTTmrdDJRY2nQ9FZvXw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tgR53-0000000AFB4-1yn1; Fri, 07 Feb 2025 16:19:49 +0000 Received: from mail-wr1-x431.google.com ([2a00:1450:4864:20::431]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tgR51-0000000AFA1-0lR0 for linux-riscv@lists.infradead.org; Fri, 07 Feb 2025 16:19:48 +0000 Received: by mail-wr1-x431.google.com with SMTP id ffacd0b85a97d-38dc5b8ed86so762251f8f.1 for ; Fri, 07 Feb 2025 08:19:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1738945186; x=1739549986; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=IuJMR1N/b1qpsKDKcoeIqZx9TZLHFvG76FujKxOxlNs=; b=fEJvZk0XhgRCg7TyHHCbQXTx7vEitnCcXqwSLsVS9XG4kvnpAQI4td3oKCby49odZc Vr79eHSBR+ovnnRNN3qiUpvkPLNepOErtpGMoQDz+e7FDqnU/aTTs9O0X2rxMy0UCFsi AfgUfhJOTadxHtdtsKckh7KX3dUhZk+Yi9reTjv35y8rdSa9l7+092iaQmSlCbd5juga TpKBSp+aEwp+PUCduGpghiyAJP5yMDLXfG3HLdjckW3IfuQOmy1IskgH/XxAhHYL6Q0Z M3YDEAwGCySPWl9TA+Grw+MDEOco0Sou+cTD9OLL4KgzxQ7Eec8U5jv8qoyLYIQyvNKW yZMg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1738945186; x=1739549986; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=IuJMR1N/b1qpsKDKcoeIqZx9TZLHFvG76FujKxOxlNs=; b=VRaVEBNS7ak4b2fL5/lNFzThhFiXGuDlBCYPlNofMcLPbjhzEvGoR9nE9uxml1EVJB 6ZvAWpf8Ns0ADr+wr1MT6R/ZCTomyXBinE7afqtU709yahjY9t3FgaqDNw0Jd+iDdT0S DXZJ5lajJcGVZk7i2ZY39M3ATgvoN2tdRFZddYPhAabxpMv2PyejHZ0KvgiEJ0LPPH3i VKt5d2KcFXI20i7Zy7lCgmEyBZ/qwlDrucrxYP8BZT8WxELXz4o05RLuTqSP84Q1ccJp f6dG6Bud9hK3u/wKY57PXKmOV1wcgC7XfDSUMTpo+7mFxIDSaDLTsbm4WHL57C42A/pZ PhSg== X-Gm-Message-State: AOJu0YylnaLPlstrCEXSYy/oqughzKXmKxA7yqoeb8+tevX74aE+ElFt VbXk7Yr4iH2PQA7yEcMUEt+mIoH/da3nBSUW6whsXZZDyjp3Fjyqvp1DF/97COWmVSjGFFY2uNr S7S4= X-Gm-Gg: ASbGnctfgb7ViWmlqv09PzLfEpu8hJOpMfuup7+K/TDiFGBZemPza2b6G0GyfEuKyMk jsOP3BALp2qNUNid0B4IncNHaofb5hYRutGd7MtsKcoDbc3PFCeyiPyLAwl23E47ASRl3CYr1iW TFf5To6eotQDaFu0Am3cYAtqKVc76lE3b1VPFe/ylWNfZmPc/njqCC1yMR2rFKc/PhMq1ZL+hKh K7FlvtR247U2rR7OoDBp4c9VbBateP5c3rM4Cxxegf8cp+bO07BeGbJVoFeTo6L43oWjCCiW1J4 6PBaXZq4qjk0YqL2l5DsSvCtht1P73ceSTSTn2rToXXR/Uw43vgCNd7yTQ== X-Google-Smtp-Source: AGHT+IF2QBiK/6fJgHT5gF+3avImUBiADzRKV6TlV+pcR6wlIV7GNBKNVzGepoKdRql8iUw7eoyotg== X-Received: by 2002:a05:6000:1787:b0:38d:a876:845a with SMTP id ffacd0b85a97d-38dc959fab9mr2553003f8f.47.1738945185782; Fri, 07 Feb 2025 08:19:45 -0800 (PST) Received: from localhost (089144193052.atnat0002.highway.a1.net. [89.144.193.52]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38dc6c80df2sm3037899f8f.18.2025.02.07.08.19.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 07 Feb 2025 08:19:45 -0800 (PST) From: Andrew Jones To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Cc: paul.walmsley@sifive.com, palmer@dabbelt.com, charlie@rivosinc.com, jesse@rivosinc.com, Anup Patel Subject: [PATCH 1/9] riscv: Annotate unaligned access init functions Date: Fri, 7 Feb 2025 17:19:41 +0100 Message-ID: <20250207161939.46139-12-ajones@ventanamicro.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250207161939.46139-11-ajones@ventanamicro.com> References: <20250207161939.46139-11-ajones@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250207_081947_239043_B144A112 X-CRM114-Status: GOOD ( 10.07 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Several functions used in unaligned access probing are only run at init time. Annotate them appropriately. Fixes: f413aae96cda ("riscv: Set unaligned access speed at compile time") Signed-off-by: Andrew Jones Reviewed-by: Alexandre Ghiti --- arch/riscv/include/asm/cpufeature.h | 4 ++-- arch/riscv/kernel/traps_misaligned.c | 8 ++++---- arch/riscv/kernel/unaligned_access_speed.c | 14 +++++++------- 3 files changed, 13 insertions(+), 13 deletions(-) diff --git a/arch/riscv/include/asm/cpufeature.h b/arch/riscv/include/asm/cpufeature.h index 569140d6e639..19defdc2002d 100644 --- a/arch/riscv/include/asm/cpufeature.h +++ b/arch/riscv/include/asm/cpufeature.h @@ -63,7 +63,7 @@ void __init riscv_user_isa_enable(void); #define __RISCV_ISA_EXT_SUPERSET_VALIDATE(_name, _id, _sub_exts, _validate) \ _RISCV_ISA_EXT_DATA(_name, _id, _sub_exts, ARRAY_SIZE(_sub_exts), _validate) -bool check_unaligned_access_emulated_all_cpus(void); +bool __init check_unaligned_access_emulated_all_cpus(void); #if defined(CONFIG_RISCV_SCALAR_MISALIGNED) void check_unaligned_access_emulated(struct work_struct *work __always_unused); void unaligned_emulation_finish(void); @@ -76,7 +76,7 @@ static inline bool unaligned_ctl_available(void) } #endif -bool check_vector_unaligned_access_emulated_all_cpus(void); +bool __init check_vector_unaligned_access_emulated_all_cpus(void); #if defined(CONFIG_RISCV_VECTOR_MISALIGNED) void check_vector_unaligned_access_emulated(struct work_struct *work __always_unused); DECLARE_PER_CPU(long, vector_misaligned_access); diff --git a/arch/riscv/kernel/traps_misaligned.c b/arch/riscv/kernel/traps_misaligned.c index 7cc108aed74e..aacbd9d7196e 100644 --- a/arch/riscv/kernel/traps_misaligned.c +++ b/arch/riscv/kernel/traps_misaligned.c @@ -605,7 +605,7 @@ void check_vector_unaligned_access_emulated(struct work_struct *work __always_un kernel_vector_end(); } -bool check_vector_unaligned_access_emulated_all_cpus(void) +bool __init check_vector_unaligned_access_emulated_all_cpus(void) { int cpu; @@ -625,7 +625,7 @@ bool check_vector_unaligned_access_emulated_all_cpus(void) return true; } #else -bool check_vector_unaligned_access_emulated_all_cpus(void) +bool __init check_vector_unaligned_access_emulated_all_cpus(void) { return false; } @@ -659,7 +659,7 @@ void check_unaligned_access_emulated(struct work_struct *work __always_unused) } } -bool check_unaligned_access_emulated_all_cpus(void) +bool __init check_unaligned_access_emulated_all_cpus(void) { int cpu; @@ -684,7 +684,7 @@ bool unaligned_ctl_available(void) return unaligned_ctl; } #else -bool check_unaligned_access_emulated_all_cpus(void) +bool __init check_unaligned_access_emulated_all_cpus(void) { return false; } diff --git a/arch/riscv/kernel/unaligned_access_speed.c b/arch/riscv/kernel/unaligned_access_speed.c index 91f189cf1611..b7a8ff7ba6df 100644 --- a/arch/riscv/kernel/unaligned_access_speed.c +++ b/arch/riscv/kernel/unaligned_access_speed.c @@ -121,7 +121,7 @@ static int check_unaligned_access(void *param) return 0; } -static void check_unaligned_access_nonboot_cpu(void *param) +static void __init check_unaligned_access_nonboot_cpu(void *param) { unsigned int cpu = smp_processor_id(); struct page **pages = param; @@ -175,7 +175,7 @@ static void set_unaligned_access_static_branches(void) modify_unaligned_access_branches(&fast_and_online, num_online_cpus()); } -static int lock_and_set_unaligned_access_static_branch(void) +static int __init lock_and_set_unaligned_access_static_branch(void) { cpus_read_lock(); set_unaligned_access_static_branches(); @@ -218,7 +218,7 @@ static int riscv_offline_cpu(unsigned int cpu) } /* Measure unaligned access speed on all CPUs present at boot in parallel. */ -static int check_unaligned_access_speed_all_cpus(void) +static int __init check_unaligned_access_speed_all_cpus(void) { unsigned int cpu; unsigned int cpu_count = num_possible_cpus(); @@ -264,7 +264,7 @@ static int check_unaligned_access_speed_all_cpus(void) return 0; } #else /* CONFIG_RISCV_PROBE_UNALIGNED_ACCESS */ -static int check_unaligned_access_speed_all_cpus(void) +static int __init check_unaligned_access_speed_all_cpus(void) { return 0; } @@ -379,7 +379,7 @@ static int riscv_online_cpu_vec(unsigned int cpu) } /* Measure unaligned access speed on all CPUs present at boot in parallel. */ -static int vec_check_unaligned_access_speed_all_cpus(void *unused __always_unused) +static int __init vec_check_unaligned_access_speed_all_cpus(void *unused __always_unused) { schedule_on_each_cpu(check_vector_unaligned_access); @@ -393,13 +393,13 @@ static int vec_check_unaligned_access_speed_all_cpus(void *unused __always_unuse return 0; } #else /* CONFIG_RISCV_PROBE_VECTOR_UNALIGNED_ACCESS */ -static int vec_check_unaligned_access_speed_all_cpus(void *unused __always_unused) +static int __init vec_check_unaligned_access_speed_all_cpus(void *unused __always_unused) { return 0; } #endif -static int check_unaligned_access_all_cpus(void) +static int __init check_unaligned_access_all_cpus(void) { bool all_cpus_emulated, all_cpus_vec_unsupported; From patchwork Fri Feb 7 16:19:42 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Jones X-Patchwork-Id: 13965423 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 474DDC02194 for ; Fri, 7 Feb 2025 16:19:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=NrC5cmgdjoPEQKWZ7HNNTswVgsNBLevnb2h8DIpQWEs=; b=IOhVL7evQr9vJ0 HMyuuFWiseu7bjyVBwPpMDR56PMjpBJ+8P4P2o9ZVJbK9fMH5w+xjndzW20VVdQnmkoI2BX9KsO7N v+uCuMHLsSUCMfFcVMMsMYIvLA3X66SXmiAob7L4D3WlmnuLOJ7xtjCOu1aeWFw3B/3PrTExC06ZT Od+P91vx2jB69I1RwltlrUSuFxwxGGeLk3vifs3TospYKEtAYo4HAWQMommBobRziiAUm6XtgVV0N 97Aa8zdLuCx2mlKjRXm1lPk3934ZuS/jwC6/AUUegfj09mR3yaKTnAXP2FlHsrp1XMhrIh5RFa0Vz htUjlVLbhVm3a+IdZBZw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tgR58-0000000AFDZ-0KO3; Fri, 07 Feb 2025 16:19:54 +0000 Received: from mail-wm1-x331.google.com ([2a00:1450:4864:20::331]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tgR55-0000000AFBi-1WYb for linux-riscv@lists.infradead.org; Fri, 07 Feb 2025 16:19:52 +0000 Received: by mail-wm1-x331.google.com with SMTP id 5b1f17b1804b1-43621d27adeso15717945e9.2 for ; Fri, 07 Feb 2025 08:19:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1738945190; x=1739549990; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=voJ+wA65lTYRPtl00Mu/vMvJWZVBpxfrm7iohsFL00w=; b=UXyFe020E6Lvnrvvn+JU2DNJSSA5m9b8VpdfAcbC8p0PFaXmGfzuVhXmCuZUjDJmnE 0LJDePnH4PuZNmPxdWll7823O/0bSCw2R40wPQp1M4AYO7fpTI0euvc/KZ39K6kiydvq S4NCDTYmdC1hbXEgPk1X9igwz7eykk2XBHaJArSk3nc7G/3Ulrr1Qvd/JwvcD6wkuI81 wrbdInczTQ5I3t2CnqFk0GbJNRmefOHdu/yOGmghh0/Cu+IRTLlqfVA59YehBOqT5VFr tIbKfdTPQ0kpA/i2r2wtX3PAfMPJIW47+kep0Bwj/FSSExICjkr7vTzRSvPJxiV3yPBi 3r9g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1738945190; x=1739549990; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=voJ+wA65lTYRPtl00Mu/vMvJWZVBpxfrm7iohsFL00w=; b=Tg5SBrnfdkuc9BNpex5Jpwuq8iDWBgqB8t4ED0fFYLz48e96TX8/wvUOYsAQl4aC4n weq0GuM8g806UoNijhntgaLdqoYaiGedMhZx2NPMzhmx+6th3eOdK8CeWM88HDNR7JAF DzxNNUL7MyCGAIccv0fh4RDOAMsGNu3ImuLhswoBhu/hzjEJjesgwv83rJgldPjt4PAV TIBnzrqI87ddaWlcgYnVbzehaaDPfsoGneVkKa7YHUa1LeDs31ePHu4N+PdBiXuqEz8t uSBMkSseKavrihcptZQ5z1NjhP/ifhaOrlgnMtyirB4xCLPXE87NtHS37tgrhUeThlYL RQSQ== X-Gm-Message-State: AOJu0YyhrZLT7O4kENxt99D89SseuHQD5KQvk1AhgmDMbEpEqjSbxtLl lJQqIdAA/4KUVczHwnZRgtoyjkvxJcBryxtUlYNeKTplrAH6XBAqPC3TnIJzQGF2e+YuehyFIfA QTO4= X-Gm-Gg: ASbGncvT+tsjpDer6UnR3mVCY4KYZJqgriJbEcOKPrt0OucO6kul24MaoCT7DOekEFw /XKJqGJnUSvlvOSzj3h8h0ODUHXt4POo4efcn0HCWX9SAS2ak98YoxTu+BHsQu6EA9PlGEm+j1W TXtOYEp3a61Menok3roMw4KRL/goM7hT2Tr8nNRXgvtsrvMjVXxZfDcQmF94E7LmLBwsntz9DFh Gkocvf+C6eHfZipIoquZS+U3xMvyT2gREDRunroJSgYCzGk7o7YrG0FqhZIjaUxvnaeLCbngCR1 DtOUnC+SwXyRfZZT8zaFZ6+AoRJOGITSXhpzOx2O/HJo1NVkStHfEIJ3rQ== X-Google-Smtp-Source: AGHT+IGx7QtVfT1JWtMIVcFCuUhUKogTMnYDmeTHogDn6k+cWvy1lOJNfmJ1oXM4MfFvDJRwJ1K8fg== X-Received: by 2002:a05:600c:4687:b0:430:563a:b20a with SMTP id 5b1f17b1804b1-4392498b3b5mr43554075e9.11.1738945189904; Fri, 07 Feb 2025 08:19:49 -0800 (PST) Received: from localhost (089144193052.atnat0002.highway.a1.net. [89.144.193.52]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4390d94db77sm94595135e9.15.2025.02.07.08.19.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 07 Feb 2025 08:19:49 -0800 (PST) From: Andrew Jones To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Cc: paul.walmsley@sifive.com, palmer@dabbelt.com, charlie@rivosinc.com, jesse@rivosinc.com, Anup Patel Subject: [PATCH 2/9] riscv: Fix riscv_online_cpu_vec Date: Fri, 7 Feb 2025 17:19:42 +0100 Message-ID: <20250207161939.46139-13-ajones@ventanamicro.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250207161939.46139-11-ajones@ventanamicro.com> References: <20250207161939.46139-11-ajones@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250207_081951_396727_1E378886 X-CRM114-Status: GOOD ( 11.47 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org We shouldn't probe when we already know vector is unsupported and we should probe when we see we don't yet know whether it's supported. Furthermore, we should ensure we've set the access type to unsupported when we don't have vector at all. Fixes: e7c9d66e313b ("RISC-V: Report vector unaligned access speed hwprobe") Signed-off-by: Andrew Jones Reviewed-by: Alexandre Ghiti --- arch/riscv/kernel/unaligned_access_speed.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/riscv/kernel/unaligned_access_speed.c b/arch/riscv/kernel/unaligned_access_speed.c index b7a8ff7ba6df..161964cf2abc 100644 --- a/arch/riscv/kernel/unaligned_access_speed.c +++ b/arch/riscv/kernel/unaligned_access_speed.c @@ -367,10 +367,12 @@ static void check_vector_unaligned_access(struct work_struct *work __always_unus static int riscv_online_cpu_vec(unsigned int cpu) { - if (!has_vector()) + if (!has_vector()) { + per_cpu(vector_misaligned_access, cpu) = RISCV_HWPROBE_MISALIGNED_VECTOR_UNSUPPORTED; return 0; + } - if (per_cpu(vector_misaligned_access, cpu) != RISCV_HWPROBE_MISALIGNED_VECTOR_UNSUPPORTED) + if (per_cpu(vector_misaligned_access, cpu) != RISCV_HWPROBE_MISALIGNED_VECTOR_UNKNOWN) return 0; check_vector_unaligned_access_emulated(NULL); From patchwork Fri Feb 7 16:19:43 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Jones X-Patchwork-Id: 13965424 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DF58EC02194 for ; Fri, 7 Feb 2025 16:20:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=t/qCly8xkRlXTQb5luMNNRg4wkAaRE3MMiV3QU3AsfQ=; b=f/svnnNQYxjjn+ WcKe86cMtY3xjPx1mFrtVenQRTfT6YlW2KlDVuqu3sE5BkyZaiqKQb03tgyi4YFrbuKD0f0Hg44oX pEAOofkvUOuOgSoVBl3BnIDPLcsa/J27jzNIUOPYfMaAElKdaFjNkswY0ZUZPdrEXjqIKlvMKqrjx g2C8n3qGizPOi73p5V+Lj82eI45pWxwOkI3fW2J815O6JLoQfHyOOoHcYl/8+fdwOh3G/JpVzMTda VrQDKr/1g3yQ2TzrPlPu1jUdGX6X7TSKfRRY7VHTdWk4kWNGV19xLaVcrsxkbuSAZWA4FpeOgWHO7 WIcN13azQHyfcZ0rk2Bw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tgR5H-0000000AFIf-2xgG; Fri, 07 Feb 2025 16:20:03 +0000 Received: from mail-wr1-x42e.google.com ([2a00:1450:4864:20::42e]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tgR5F-0000000AFGo-1gC6 for linux-riscv@lists.infradead.org; Fri, 07 Feb 2025 16:20:02 +0000 Received: by mail-wr1-x42e.google.com with SMTP id ffacd0b85a97d-38dd0dc21b2so145982f8f.2 for ; Fri, 07 Feb 2025 08:20:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1738945200; x=1739550000; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=2fCHXwdFaeXSBwfTQI74JIYWCeXWis7TCtNv1LZo0xM=; b=l9VSzVMRkFUtmwUuUXFJc62jAWonypU3qZx1XobtPYwKigafvbzZlOJFzgzfm0X6NA 53yqt8+3dsF/Ay32lB/5z+k3H1vIyeKFVNrBaZbEEh2bW7ouJk+L35UMpo/MezL+mjoA qponkEuaIU7DTZL+ymmoncu2IJD6WZ3VMWRFjJkhAz9Pt4FfDaf+7QoKx4MV4JhSuO4y FzF1LP7lvdJmsuzR3H0EeX76DkA/dVrad8HklRUah4G9UH62tfLFxKKkCTFCTLr4QEWE dmkV0lFHA2iEwrinz7iN6SLUaoc/jwrUOUh8/Orj5UNARJ6ejRVsUWwBCvmDl8/WSgBW vgdw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1738945200; x=1739550000; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=2fCHXwdFaeXSBwfTQI74JIYWCeXWis7TCtNv1LZo0xM=; b=XhkmZ3MuCtx8ZU6lO+CSvpm3LOg5/CEaDM3jh5Z51x9JnopxamP9azlcfZBnNLC4Wh AkRwO0spRa24kJG9+pfDYfwyJ/UdddDC0IqV6/Dqkhvj8NyA2Ur/pCUk61bbjNojhoul zEZALy/2jA8YBviNSTF4qFikgdWM/rOFQHSqxj2L66bFdfJKSZwGDpNKdrZ3A1dgBixz HK64RZ/FaX2kVQaH8Ry270qwi0bkjpgtLDVs4PtzsouBRlVp0jUJCXkR7AkoJhHN7dke /UXnbkZ6EL2YSz3YhaaDUZnm+5cuenptB7Egc4N1dLjhFgJ6YqC3deAQHYX/54v4v+TC q1gw== X-Gm-Message-State: AOJu0YyJXJKg1s5LUsoUVAiSuiMfd9UupWbYUBs+AXRb22mL5PGAlUkh FyZ4cmAkcK/4/cG/G6XmgsuFUF4M1q5b8hIg2RwnDUlifqbEfb1U56qq13pySP4pKSxkuzUUKFv 61fw= X-Gm-Gg: ASbGncskFHlcwJYjqVS98PWCA8g8tY81wGAys7ybqD+CLncHCEqoO7Sg9K6PhZBIW9D mCZ44FziVtMwN360v8X3bYoE5FYHz0ElNux/VKBsNY5P3h9eLDpmuvPLVEY858mtNodRfDhTXcL d7Oa9L4jIjni1kurbSwQcV6EbmTKh7JpUCrgglz2QzvMPnFtHSOvfrHQZFQvvxpqWi4c67suHOf nfwSTzHrdp/ZgZWPT4gn2U0GwTlhnoN7MvRhcFmuNHNiG2GEWb+Iyp7rruzMrGaoJaENIWtR+if eQeODRp8Ktvr7XSfuZ3CbTdr8zNsgmttDwE4X18AzAC3sAdzQwZgSW6AWw== X-Google-Smtp-Source: AGHT+IFhySvKCOlwcj4Qxz8J3e5OCL6BcBFdracdimWviE7gGpdopqanQ+HxZIazvgx44GvoG2zmWA== X-Received: by 2002:a5d:457a:0:b0:38d:b610:190b with SMTP id ffacd0b85a97d-38dc9350d85mr2241809f8f.46.1738945199927; Fri, 07 Feb 2025 08:19:59 -0800 (PST) Received: from localhost (089144193052.atnat0002.highway.a1.net. [89.144.193.52]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38dbde0fd23sm4860354f8f.71.2025.02.07.08.19.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 07 Feb 2025 08:19:59 -0800 (PST) From: Andrew Jones To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Cc: paul.walmsley@sifive.com, palmer@dabbelt.com, charlie@rivosinc.com, jesse@rivosinc.com, Anup Patel Subject: [PATCH 3/9] riscv: Fix check_unaligned_access_all_cpus Date: Fri, 7 Feb 2025 17:19:43 +0100 Message-ID: <20250207161939.46139-14-ajones@ventanamicro.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250207161939.46139-11-ajones@ventanamicro.com> References: <20250207161939.46139-11-ajones@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250207_082001_441249_0BF18210 X-CRM114-Status: GOOD ( 11.99 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org check_vector_unaligned_access_emulated_all_cpus(), like its name suggests, will return true when all cpus emulate unaligned vector accesses. If the function returned false it may have been because vector isn't supported at all (!has_vector()) or because at least one cpu doesn't emulate unaligned vector accesses. Since false may be returned for two cases, checking for it isn't sufficient when attempting to determine if we should proceed with the vector speed check. Move the !has_vector() functionality to check_unaligned_access_all_cpus() in order for check_vector_unaligned_access_emulated_all_cpus() to return false for a single case. Fixes: e7c9d66e313b ("RISC-V: Report vector unaligned access speed hwprobe") Signed-off-by: Andrew Jones Reviewed-by: Alexandre Ghiti --- arch/riscv/kernel/traps_misaligned.c | 6 ------ arch/riscv/kernel/unaligned_access_speed.c | 11 +++++++---- 2 files changed, 7 insertions(+), 10 deletions(-) diff --git a/arch/riscv/kernel/traps_misaligned.c b/arch/riscv/kernel/traps_misaligned.c index aacbd9d7196e..4354c87c0376 100644 --- a/arch/riscv/kernel/traps_misaligned.c +++ b/arch/riscv/kernel/traps_misaligned.c @@ -609,12 +609,6 @@ bool __init check_vector_unaligned_access_emulated_all_cpus(void) { int cpu; - if (!has_vector()) { - for_each_online_cpu(cpu) - per_cpu(vector_misaligned_access, cpu) = RISCV_HWPROBE_MISALIGNED_VECTOR_UNSUPPORTED; - return false; - } - schedule_on_each_cpu(check_vector_unaligned_access_emulated); for_each_online_cpu(cpu) diff --git a/arch/riscv/kernel/unaligned_access_speed.c b/arch/riscv/kernel/unaligned_access_speed.c index 161964cf2abc..02b485dc4bc4 100644 --- a/arch/riscv/kernel/unaligned_access_speed.c +++ b/arch/riscv/kernel/unaligned_access_speed.c @@ -403,13 +403,16 @@ static int __init vec_check_unaligned_access_speed_all_cpus(void *unused __alway static int __init check_unaligned_access_all_cpus(void) { - bool all_cpus_emulated, all_cpus_vec_unsupported; + bool all_cpus_emulated; + int cpu; all_cpus_emulated = check_unaligned_access_emulated_all_cpus(); - all_cpus_vec_unsupported = check_vector_unaligned_access_emulated_all_cpus(); - if (!all_cpus_vec_unsupported && - IS_ENABLED(CONFIG_RISCV_PROBE_VECTOR_UNALIGNED_ACCESS)) { + if (!has_vector()) { + for_each_online_cpu(cpu) + per_cpu(vector_misaligned_access, cpu) = RISCV_HWPROBE_MISALIGNED_VECTOR_UNSUPPORTED; + } else if (!check_vector_unaligned_access_emulated_all_cpus() && + IS_ENABLED(CONFIG_RISCV_PROBE_VECTOR_UNALIGNED_ACCESS)) { kthread_run(vec_check_unaligned_access_speed_all_cpus, NULL, "vec_check_unaligned_access_speed_all_cpus"); } From patchwork Fri Feb 7 16:19:44 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Andrew Jones X-Patchwork-Id: 13965425 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5CAC6C02199 for ; Fri, 7 Feb 2025 16:20:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=MWm1gRfKHbL5YHWs//KaTiFNmKntZJzO7yxBuXpx+Fg=; b=4jnYhXUD3TeiHr 9dkCqxKn0//3kBvjaSQ2MgK0anGRFVDfQgE+YstW9UGRz8KbrMRW6NZMAI10QbK1uPymlpQ1liKSL ZrWZUbOhBUjQY94oZ/5kUDbyh64MS95ieWp87R5jUWTlMZTc2REcR+HN8qoTOXleI6FaKtf1fWGFT QiAPaXl/y31mgMYhQ7swqHRadyS4FIWW0E7IpYagm77tTzOe92SK8Cz1ag5+lyQOTu4zh+evPUOxK J03ySK1OPpBmpLCSAnkdaKWkTH5QmKcpTJ0UnpQQ8VPMS6LeY+C9Zh67fxW6ZgZVSC9KNyGB+mtIh AxQ/LSPqPolKCB3jakEg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tgR5M-0000000AFLK-1I1o; Fri, 07 Feb 2025 16:20:08 +0000 Received: from mail-wm1-x330.google.com ([2a00:1450:4864:20::330]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tgR5J-0000000AFJG-3Scr for linux-riscv@lists.infradead.org; Fri, 07 Feb 2025 16:20:06 +0000 Received: by mail-wm1-x330.google.com with SMTP id 5b1f17b1804b1-43635796b48so13915145e9.0 for ; Fri, 07 Feb 2025 08:20:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1738945204; x=1739550004; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=uuW8lN3LlL4CuR3qOD5OEg9Po1ieu6WyRch8wZV6JCU=; b=CwG/vRE8eDHMpoFllGAwmc/V9oh+ev75UYBHzUiXEReX3vANv9CIoN1gItlsvdFhLW IJ8nNw6jCdtPyC+XDQznkDtk/oGsXCp4NqLvsCcY30/TqtriBPWKdfcbFrMhGSUH07tm ulZMYSc5rl1Qk1XyOcK0Xc48fT+P0849LgZER5ZWSnTcbkJBH6ueEeTBQp2ZMGtxbbr/ +FUEUlC1SWd6zSny9437oKN91RnXcDT3uSlGcPZo6Rs/1oUhfwkl2Uv6712EG/fkBlLQ dmhS5EzLIZ2ARutG0bXFNUNzohI9Kxaqf8QPL4VP8lJywBW2JQXU6D/6CEzJjCD7oqSt 1qJg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1738945204; x=1739550004; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=uuW8lN3LlL4CuR3qOD5OEg9Po1ieu6WyRch8wZV6JCU=; b=u42X+6RPhvSO82LBnrh/a4NbXEwXU/+FzTWoOSky9tZ8tuLCe6DyLdtaZNIe2MB6uv XSD+pirfbbdrfCs0Dw2dNZ7eaDmU2CCssNl0OYLzQHPDOEnurV5JWNGX4JA6URz0BG29 lWEDrjG4nvKWMN6Q3h7vnY1xXmTj7hHkNMv/Svtmq14YdQpG4biKsIYgSgf74PdRpnex RuQy6XaQ23a+3njZXV0TYDkwBamuJGIuUhtGK9hPPJ9wF19oIBXYrb9vRRt2m5o++abM wOJ6eN+Cn2JdhlR9Vyhn9m3/NDDhdWHeyzIhw5I0Y6MQ4QkmRppQgJxVl+D4bopPq7xC WD3g== X-Gm-Message-State: AOJu0Yy+Koa4lD3/+tgUphQ1D7vg4FYYj+dh8zzGdIzJA/weZi3QCCL+ tcofqtC5oEgQpIN5CsOcXY2pC6ox9gmkuJF6GjTst3PjMz2iIrt7ekDgup/0eUXtBe0EYRuS8j3 qf8o= X-Gm-Gg: ASbGncuF1UohCdnrIoxMk2GwLQRbO1wHhYCVqZtUl79/WgVY5kfJs2th1CPh7I2oL7k 2TaIu5lGMCpTfBkb49FSFYGdbzn0YeFRn7vQlxZ7d62c0CVTMHmtUD4UcGH/530BLFrxADhOsh1 I6abPzaUu6fIpU7Vqc4b/zie4M9Zgo0jE8NS3UgcuLnYI4/LDGDHIuj514VMFXqTpuoospstlMv LoUeQzId6WcRz4mLlAjYWDEysieG7nDTjB2730ECXusX2+JvMfSy6g6s4Fq6+Y9cAt/Id9S7CBj TqdZ7GAdwzdn6ZC3lbfE3n9LCiFDJfRI8cGLCXS9HE3t7RENIJbap8pOFA== X-Google-Smtp-Source: AGHT+IGMKi65e/Z5vWbx7WgCmphLVzyy3Q2WyYGIC9JFl7WcR1tKm4dOZKbtrD9rcb9U1JUgAquIdw== X-Received: by 2002:a05:600c:6c01:b0:436:1b77:b5aa with SMTP id 5b1f17b1804b1-43912d22565mr59485145e9.8.1738945203976; Fri, 07 Feb 2025 08:20:03 -0800 (PST) Received: from localhost (089144193052.atnat0002.highway.a1.net. [89.144.193.52]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4391da96640sm62546005e9.8.2025.02.07.08.20.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 07 Feb 2025 08:20:03 -0800 (PST) From: Andrew Jones To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Cc: paul.walmsley@sifive.com, palmer@dabbelt.com, charlie@rivosinc.com, jesse@rivosinc.com, Anup Patel Subject: [PATCH 4/9] riscv: Change check_unaligned_access_speed_all_cpus to void Date: Fri, 7 Feb 2025 17:19:44 +0100 Message-ID: <20250207161939.46139-15-ajones@ventanamicro.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250207161939.46139-11-ajones@ventanamicro.com> References: <20250207161939.46139-11-ajones@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250207_082005_860384_3580F076 X-CRM114-Status: GOOD ( 11.15 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org The return value of check_unaligned_access_speed_all_cpus() is always zero, so make the function void so we don't need to concern ourselves with it. The change also allows us to tidy up check_unaligned_access_all_cpus() a bit. Signed-off-by: Andrew Jones Reviewed-by: Clément Léger Reviewed-by: Alexandre Ghiti --- arch/riscv/kernel/unaligned_access_speed.c | 15 +++++---------- 1 file changed, 5 insertions(+), 10 deletions(-) diff --git a/arch/riscv/kernel/unaligned_access_speed.c b/arch/riscv/kernel/unaligned_access_speed.c index 02b485dc4bc4..780f1c5f512a 100644 --- a/arch/riscv/kernel/unaligned_access_speed.c +++ b/arch/riscv/kernel/unaligned_access_speed.c @@ -218,7 +218,7 @@ static int riscv_offline_cpu(unsigned int cpu) } /* Measure unaligned access speed on all CPUs present at boot in parallel. */ -static int __init check_unaligned_access_speed_all_cpus(void) +static void __init check_unaligned_access_speed_all_cpus(void) { unsigned int cpu; unsigned int cpu_count = num_possible_cpus(); @@ -226,7 +226,7 @@ static int __init check_unaligned_access_speed_all_cpus(void) if (!bufs) { pr_warn("Allocation failure, not measuring misaligned performance\n"); - return 0; + return; } /* @@ -261,12 +261,10 @@ static int __init check_unaligned_access_speed_all_cpus(void) } kfree(bufs); - return 0; } #else /* CONFIG_RISCV_PROBE_UNALIGNED_ACCESS */ -static int __init check_unaligned_access_speed_all_cpus(void) +static void __init check_unaligned_access_speed_all_cpus(void) { - return 0; } #endif @@ -403,10 +401,10 @@ static int __init vec_check_unaligned_access_speed_all_cpus(void *unused __alway static int __init check_unaligned_access_all_cpus(void) { - bool all_cpus_emulated; int cpu; - all_cpus_emulated = check_unaligned_access_emulated_all_cpus(); + if (!check_unaligned_access_emulated_all_cpus()) + check_unaligned_access_speed_all_cpus(); if (!has_vector()) { for_each_online_cpu(cpu) @@ -417,9 +415,6 @@ static int __init check_unaligned_access_all_cpus(void) NULL, "vec_check_unaligned_access_speed_all_cpus"); } - if (!all_cpus_emulated) - return check_unaligned_access_speed_all_cpus(); - return 0; } From patchwork Fri Feb 7 16:19:45 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Andrew Jones X-Patchwork-Id: 13965426 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8ECF0C02194 for ; Fri, 7 Feb 2025 16:20:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=mIdAU0E+euJH84/3NtpxDnoyQMDdo4H5ls1Ntiacg/c=; b=la9XY+tDfMLVGA Dj3h5955o5poUxsyyp00TEfaZuyujA8SYeuhV4djgvpYCXM229UXvzHpD+RAupSR2roVx4KKfM8sd yEa2t8yVfmvJfG7p0QNSgDEvZYB4kErnK7QEKH0N0fgdB7CQQYkDfKGatjPmkK6Q3HBMcSjxZaPD6 PO+D0XboO4DuzZxq/cDYuk473xXB1Pjyx08eRCNCSAdobkrlmqNDlL7dcUeJMlWPAK4Pto22+3IOI NtOza40nERxZuLtEznHDk9pK3HnYZmYFHkHxiBq4jDP55rcwL3e6WrUNbq+zxWXLvM5cnBugVzHjf BwXTPCGwkVGqqIiTjk3w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tgR5c-0000000AFVq-3whP; Fri, 07 Feb 2025 16:20:24 +0000 Received: from mail-wm1-x336.google.com ([2a00:1450:4864:20::336]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tgR5a-0000000AFTo-2XQk for linux-riscv@lists.infradead.org; Fri, 07 Feb 2025 16:20:23 +0000 Received: by mail-wm1-x336.google.com with SMTP id 5b1f17b1804b1-43690d4605dso15880485e9.0 for ; Fri, 07 Feb 2025 08:20:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1738945221; x=1739550021; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=EPC+Zc9/VMADj7AL3TU4wV27hjuGZt3xK3eoVREeXu0=; b=pkv3mse5K4u4m7JCOryHejONwE8co5P49T1k9Qypb5BPN+RHbJiuKSht4CYUAc+W2I XJm2bqaD9g00xFlfliS0hm01pN2RJxXEEh0PWu9ZISA8Rz9ZKNsqOdouRH3pU1M9X1oi Z2wDeW6+VK+thG2pE6JySgg/q/de1itLqpTN9Uubdj1HiSk9z9x6M7jGPNaVJDlGke+a j5ZH5vzN1NDaHQkUBLosUQ3P6MuXv+qylvHIxUIX5Rjpz0H9PP1+1IcBrOcTn6SV77qK EKQpdh46UwiGN0TdQ3s1BD3JOi1JCxmxjsaCpnXmRVKdzFN36PsRVjF9VLWDselYzGpE 61Zg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1738945221; x=1739550021; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=EPC+Zc9/VMADj7AL3TU4wV27hjuGZt3xK3eoVREeXu0=; b=YFVgvgFMGJJ2H9vyjyqrl3+TUH/2YzgMzqSghaIbk628+taaEhsVjsKZGM5i5OuaXW y/kq4H5W082NTQCXyRpQvqJ+zSHPb/9F2FhT8iFjgv0gZ6uOPwky+pT3dFf1+oHpkn1q x8ZON0C3LOzXCA8EBapnt3j3M/PkIeebA50bG8rhsCFb1HcfOkhxtsSenoTfl3aQJ37U P1OYN6jzq3BwARBOVAghdJrDU9DouKtyeHE85V2J2UEiqHLzlbKmL+xlnbsomuHdGOgz gwFNkkS3ne3xtGG3FoNabALXBmw4njPQEXeGzCn1gMAwd+OkjPFrfWzb0o8vtK4lZ8XZ F2Og== X-Gm-Message-State: AOJu0YwPhnvL56VEpRDfqb0o8LyZGNvZN/mL/w1uUeWtx6OtpYuz3tst A50cDEf8V2A25SsZ78SQhI86TgUu2Ug6n4wlLmFtRXfnj74oIHqEpaOyhAqnf1LUzYJGnzYCKFH pO6o= X-Gm-Gg: ASbGnctFljyk40JgSLwwuiziunZpzBuQKR2hZi/DiJsXqiCjoIpxnCXV+tn2eIeSXIX CFujJ2GIcnejl1Vm7CdzdyCjZl1BiIGjwJxLxv2Lt7qPyOW74dgGXdbk8K1bKi0CbFINuzIPl37 ebJyvCZDkmDo3giGQrs+ADBRY8+GaUGiywbOzZHJvyIHxUmZhKHcoCfGS/Erig4jbkbLLjzTr5L ARsSSyw3cJ86lnh/HH8A9iuLQG65fz45KHVnWEMlvGYUxrn/MSr31Wc8ykCsN90NUZFun9x6GgB J338Zw7vZ23ZgiTE8nHeHwMRFGmqVToF7noxEYhTwp2tREvgmNYTzvySvw== X-Google-Smtp-Source: AGHT+IGFd0vA7i2TE/EqWQzSneLkfz1wZqI3DHki2JEKLR0vkj9VuQIpV1+0LuH7EO7EbRwBTj9qwg== X-Received: by 2002:a05:600c:3c9b:b0:436:5fc9:30ba with SMTP id 5b1f17b1804b1-439249c385cmr37153945e9.29.1738945221124; Fri, 07 Feb 2025 08:20:21 -0800 (PST) Received: from localhost (089144193052.atnat0002.highway.a1.net. [89.144.193.52]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43907f16ffasm77934055e9.1.2025.02.07.08.20.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 07 Feb 2025 08:20:20 -0800 (PST) From: Andrew Jones To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Cc: paul.walmsley@sifive.com, palmer@dabbelt.com, charlie@rivosinc.com, jesse@rivosinc.com, Anup Patel Subject: [PATCH 5/9] riscv: Fix set up of cpu hotplug callbacks Date: Fri, 7 Feb 2025 17:19:45 +0100 Message-ID: <20250207161939.46139-16-ajones@ventanamicro.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250207161939.46139-11-ajones@ventanamicro.com> References: <20250207161939.46139-11-ajones@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250207_082022_646195_25685AE3 X-CRM114-Status: GOOD ( 12.48 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org CPU hotplug callbacks should be set up even if we detected all current cpus emulate misaligned accesses, since we want to ensure our expectations of all cpus emulating is maintained. Fixes: 6e5ce7f2eae3 ("riscv: Decouple emulated unaligned accesses from access speed") Fixes: e7c9d66e313b ("RISC-V: Report vector unaligned access speed hwprobe") Signed-off-by: Andrew Jones Reviewed-by: Clément Léger Reviewed-by: Alexandre Ghiti --- arch/riscv/kernel/unaligned_access_speed.c | 27 +++++++++++----------- 1 file changed, 13 insertions(+), 14 deletions(-) diff --git a/arch/riscv/kernel/unaligned_access_speed.c b/arch/riscv/kernel/unaligned_access_speed.c index 780f1c5f512a..c9d3237649bb 100644 --- a/arch/riscv/kernel/unaligned_access_speed.c +++ b/arch/riscv/kernel/unaligned_access_speed.c @@ -247,13 +247,6 @@ static void __init check_unaligned_access_speed_all_cpus(void) /* Check core 0. */ smp_call_on_cpu(0, check_unaligned_access, bufs[0], true); - /* - * Setup hotplug callbacks for any new CPUs that come online or go - * offline. - */ - cpuhp_setup_state_nocalls(CPUHP_AP_ONLINE_DYN, "riscv:online", - riscv_online_cpu, riscv_offline_cpu); - out: for_each_cpu(cpu, cpu_online_mask) { if (bufs[cpu]) @@ -383,13 +376,6 @@ static int __init vec_check_unaligned_access_speed_all_cpus(void *unused __alway { schedule_on_each_cpu(check_vector_unaligned_access); - /* - * Setup hotplug callbacks for any new CPUs that come online or go - * offline. - */ - cpuhp_setup_state_nocalls(CPUHP_AP_ONLINE_DYN, "riscv:online", - riscv_online_cpu_vec, NULL); - return 0; } #else /* CONFIG_RISCV_PROBE_VECTOR_UNALIGNED_ACCESS */ @@ -415,6 +401,19 @@ static int __init check_unaligned_access_all_cpus(void) NULL, "vec_check_unaligned_access_speed_all_cpus"); } + /* + * Setup hotplug callbacks for any new CPUs that come online or go + * offline. + */ +#ifdef CONFIG_RISCV_PROBE_UNALIGNED_ACCESS + cpuhp_setup_state_nocalls(CPUHP_AP_ONLINE_DYN, "riscv:online", + riscv_online_cpu, riscv_offline_cpu); +#endif +#ifdef CONFIG_RISCV_PROBE_VECTOR_UNALIGNED_ACCESS + cpuhp_setup_state_nocalls(CPUHP_AP_ONLINE_DYN, "riscv:online", + riscv_online_cpu_vec, NULL); +#endif + return 0; } From patchwork Fri Feb 7 16:19:46 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Jones X-Patchwork-Id: 13965427 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A9D70C02199 for ; Fri, 7 Feb 2025 16:20:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=ovMIzkaD6cJNqKqklnpSy7zrs7WX4r5/LLBmqRubgSc=; b=Pev+sVWu7A9pl8 DXDO6lGuMucaNq5JVLBP9ti131Ca+RlSzTipCj74hY2DA8kO04lHPFNpCTUPkCW0mT9XyOIWmXlCa uSbYfpDPlAioUZ1TXqVnqBxLTtuixKhKVVzzQkKREku22wSlCOA/5hKWLBYjhV2UdEslM04HLeQim w/WED06QcdYpfw/GmgZPZZwGvDqY7dhMY7pG27HZWu9z3FuObluS92zv2dIlBzdmPLLbLC8VLSCOZ NCDopI2o2ci3RXQhdwY5RK8R/9i+YJ03pYebBHD85MuMaMHn0xVEqjUnvklFQA/KaKvWPnkZ5F2aj jYRzHpwOKQqdaJVVoTRg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tgR5o-0000000AFcj-2XWN; Fri, 07 Feb 2025 16:20:36 +0000 Received: from mail-wr1-x42c.google.com ([2a00:1450:4864:20::42c]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tgR5l-0000000AFaV-40Zm for linux-riscv@lists.infradead.org; Fri, 07 Feb 2025 16:20:35 +0000 Received: by mail-wr1-x42c.google.com with SMTP id ffacd0b85a97d-38dc33931d3so878893f8f.1 for ; Fri, 07 Feb 2025 08:20:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1738945232; x=1739550032; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Po82zolBmxhVPQkc00G0dtG6NMWIt9O8oQKIvW2rpQo=; b=YCZIotZT7GjnQCBzcaEobEop63WE30+B4F7TiiP3SLFnRjyP2Lk77Vr3MsKO+e6AwL XBGe2ews8XLndOedQhIjRHtYdBtL5rEZBAVQUxelNVI3FBn+szR8whlkzzZRDoSzAYcc fhGve2hoJJa3ENxYDzls3uk+McIbXcqEyKqnYebuEn8heP7OP9zFkFFqL05A40wkETjY 60DxeDOny4szeWdcrdBGRsoOIOVC+HwjKLvm54UAFMdBriK72bQIfqQVR6dkEKaLDD9Q tVbf11QyyFFUvd7RY5Iz++iKRQB7i91JWYMXlOMx+zFxlzsfUay6eDxmqyz5e3hnX6E9 rwAg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1738945232; x=1739550032; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Po82zolBmxhVPQkc00G0dtG6NMWIt9O8oQKIvW2rpQo=; b=owmp2g+1eQpbRaA9UXiI30KTrULJnAxVRBNPnhZ69v2RsUIvjnA/6may8S27Gn2e63 TRa5m3frwxsrVeTzvRhc0YQ2Z9Q1DT1CC8G6SjEtp7erLB3E7al7kBwillrw8n9wle8y RiIC/sxT59BwUtjySu0XWuBZKsGMv926FGvMIYgD38uqWScYrRRmo9wJ61st1f3anEJ1 IBBBXipI07up09BU9KPOMM8Sn3yfr/Y3QSRM/XE+EfEr8LI1Hsn4y5GGa44KwXi+2aJx poXTRcPtE/iTVoMi9IUvusJQHd5AuCda7+EY9+lVFlXfI/4tIjlEtbuVnjc4BRqSb6K2 B8zA== X-Gm-Message-State: AOJu0YzkkeEZZCyHdU0kVwUG1NZKXvEGdQyj2a9jMOefw3vVNatIsojv z3aMvKSdanJVQ0XbC7L5CvpWLv8MHq8cuQfMIn0FvJ6GcXWcGsh3q8cGsT+8rdxAnSUaOpP9R0A c30g= X-Gm-Gg: ASbGncsRbw1TYgxI3xyt7l15Sn6l+5DNbomJMVtKz/kkMTyB1SUEfzR1+YQ5h3pjTmD ebkUP8Wg2ZbkM1GjmunecU4o88lZdI50MFlqcb9YXmqUinHAJgoSLd1eSYn+BWDd9xzAe9jKzwD EA9KJQLtobcx4w5lgJCRutNGyRolFMj5l5zk+W5MMwuVQ5krJ71PS9zxh+RCHtb4hM77lZqm+LA eOcVGJciyTkd/fvmi0nxS3o+zyniXFq6OIjSNijAqHYYvjPFaB0YW+ju00wUBaMUV2gaYwCmMZt WlUvC9udglTEgoKjXzL/6x8H39Jvf5G0PqFHa8YLOSrztcs3BYxU2rHvQw== X-Google-Smtp-Source: AGHT+IFYzRkLD2/iNXs8ekCwva+Q7XAjeoRJSdBX1SHt2e7DvSU1eBo/Pp0WwXjQHrpcwp7IId0zvg== X-Received: by 2002:a5d:598d:0:b0:38d:ac2d:6dbc with SMTP id ffacd0b85a97d-38dc8dc1ab0mr2372712f8f.17.1738945232146; Fri, 07 Feb 2025 08:20:32 -0800 (PST) Received: from localhost (089144193052.atnat0002.highway.a1.net. [89.144.193.52]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4390db10b2fsm94032895e9.33.2025.02.07.08.20.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 07 Feb 2025 08:20:31 -0800 (PST) From: Andrew Jones To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Cc: paul.walmsley@sifive.com, palmer@dabbelt.com, charlie@rivosinc.com, jesse@rivosinc.com, Anup Patel Subject: [PATCH 6/9] riscv: Fix set up of vector cpu hotplug callback Date: Fri, 7 Feb 2025 17:19:46 +0100 Message-ID: <20250207161939.46139-17-ajones@ventanamicro.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250207161939.46139-11-ajones@ventanamicro.com> References: <20250207161939.46139-11-ajones@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250207_082033_996737_813B4CE0 X-CRM114-Status: GOOD ( 11.08 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Whether or not we have RISCV_PROBE_VECTOR_UNALIGNED_ACCESS we need to set up a cpu hotplug callback to check if we have vector at all, since, when we don't have vector, we need to set vector_misaligned_access to unsupported rather than leave it the default of unknown. Fixes: e7c9d66e313b ("RISC-V: Report vector unaligned access speed hwprobe") Signed-off-by: Andrew Jones Reviewed-by: Alexandre Ghiti --- arch/riscv/kernel/unaligned_access_speed.c | 31 +++++++++++----------- 1 file changed, 16 insertions(+), 15 deletions(-) diff --git a/arch/riscv/kernel/unaligned_access_speed.c b/arch/riscv/kernel/unaligned_access_speed.c index c9d3237649bb..d9d4ca1fadc7 100644 --- a/arch/riscv/kernel/unaligned_access_speed.c +++ b/arch/riscv/kernel/unaligned_access_speed.c @@ -356,6 +356,20 @@ static void check_vector_unaligned_access(struct work_struct *work __always_unus per_cpu(vector_misaligned_access, cpu) = speed; } +/* Measure unaligned access speed on all CPUs present at boot in parallel. */ +static int __init vec_check_unaligned_access_speed_all_cpus(void *unused __always_unused) +{ + schedule_on_each_cpu(check_vector_unaligned_access); + + return 0; +} +#else /* CONFIG_RISCV_PROBE_VECTOR_UNALIGNED_ACCESS */ +static int __init vec_check_unaligned_access_speed_all_cpus(void *unused __always_unused) +{ + return 0; +} +#endif + static int riscv_online_cpu_vec(unsigned int cpu) { if (!has_vector()) { @@ -363,27 +377,16 @@ static int riscv_online_cpu_vec(unsigned int cpu) return 0; } +#ifdef CONFIG_RISCV_PROBE_VECTOR_UNALIGNED_ACCESS if (per_cpu(vector_misaligned_access, cpu) != RISCV_HWPROBE_MISALIGNED_VECTOR_UNKNOWN) return 0; check_vector_unaligned_access_emulated(NULL); check_vector_unaligned_access(NULL); - return 0; -} - -/* Measure unaligned access speed on all CPUs present at boot in parallel. */ -static int __init vec_check_unaligned_access_speed_all_cpus(void *unused __always_unused) -{ - schedule_on_each_cpu(check_vector_unaligned_access); +#endif return 0; } -#else /* CONFIG_RISCV_PROBE_VECTOR_UNALIGNED_ACCESS */ -static int __init vec_check_unaligned_access_speed_all_cpus(void *unused __always_unused) -{ - return 0; -} -#endif static int __init check_unaligned_access_all_cpus(void) { @@ -409,10 +412,8 @@ static int __init check_unaligned_access_all_cpus(void) cpuhp_setup_state_nocalls(CPUHP_AP_ONLINE_DYN, "riscv:online", riscv_online_cpu, riscv_offline_cpu); #endif -#ifdef CONFIG_RISCV_PROBE_VECTOR_UNALIGNED_ACCESS cpuhp_setup_state_nocalls(CPUHP_AP_ONLINE_DYN, "riscv:online", riscv_online_cpu_vec, NULL); -#endif return 0; } From patchwork Fri Feb 7 16:19:47 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Jones X-Patchwork-Id: 13965428 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DEBC6C02199 for ; Fri, 7 Feb 2025 16:20:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=LjO4BtzknSixDUJbU4rWeG/58eA/58IkbB8Zjeux+GU=; b=mIhZQyp2xbMgRh F5xoOO4e1261Q2NFcYXLI9XjrIdDT/cXqQeh5M210sWjFnX+ZV0cu87GHDrCnYeTLn8hq4rWiwgrC jpN/MKQhZ/prvEEvI+EyBoLQxi8awGgrbHGhCAINRisfNko8W3nW+BkN8LB8M1e3/c1AKb4WQ0Ve6 izQgexX49Xf9miJ8PZipGOMNkuuobzfJ2Wp/qvzMQycfBTQ6kotepkiBO6+WSNi6XeOkWGm084vnl vbsTc6BumcYPKhUZdgz+3yM/JAJKPyoBddKXJTyKmj9w0xOrDinyhbFLisYcadCNKQNxs8Iz//7Em aUsu+gDql5iB1lhoURDA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tgR5y-0000000AFjK-15rB; Fri, 07 Feb 2025 16:20:46 +0000 Received: from mail-wr1-x42f.google.com ([2a00:1450:4864:20::42f]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tgR5v-0000000AFgx-0Xyz for linux-riscv@lists.infradead.org; Fri, 07 Feb 2025 16:20:44 +0000 Received: by mail-wr1-x42f.google.com with SMTP id ffacd0b85a97d-38dc5764fc0so1249148f8f.3 for ; Fri, 07 Feb 2025 08:20:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1738945241; x=1739550041; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=rZV9Bvxyy8oBnqpcvuhP90zRC/EQE6fM7xvGU71P15A=; b=YSAmFSsMSOu2qUvb8UgFf5xWweZDj4OZiUOPcQJ+afILFOOb7WvYJY/A8N24B+DRH0 D4ofANbyBOU2UregLUS4KFqpPor08A715SD5jLsa4zetWrZxCrhfKG1X5PJq+JKPsilQ uW2KPhgcXhrBugmMr4dMzDdwCD2H+C6gm6I2QyF9ZpkWRR0+ILAGjsq1RZoW22uHgFlU 4awXBrgp9fTv77JQu5kcLbTEBgjuOHze2sTB75AzPyFO4vcSqkQsDFR/3auJgA++Vhbb BuAhttbkY0b2b8WeigqdSwdSyKNHANZ9+NEaezJIGD6XLR5TPeKAhDlVQpfhuzNyjos+ QJAg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1738945241; x=1739550041; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=rZV9Bvxyy8oBnqpcvuhP90zRC/EQE6fM7xvGU71P15A=; b=d2cE1fjrs3jwpsD+ym3HI11Rr5quWGqxrOswEtots9nwXatQ6zcGlEqycuBZ8nc4AY 6gGLMhoge4fpBOb6L2e+rKKnyhrsvUSpvReKITzxgl/OY9j+KIB3WotDZHfN66+ZEfpQ zeZmLA7Z9aG7VkMq8ML4L7iv/jiiW5EJrYqZd6jlcq2S3jPK0bs9ipEhKWeXh7g8D5nf O3x/KbB/Pyy9lrk3aEYksbpoAJnl/2zfj5zAkuophcMT2KvuPyYKZXpOGVuTbXsb+4P8 Q9tv0HZTuRRnlF0dUFKNDlKJ3eKU0gQhZd3rFqCwPpn72VpLN4zb8JXrleuiQJpMTtHA YVqA== X-Gm-Message-State: AOJu0YyHDPEaQqrkmdiCevj+O1VgzOFVKUgg3p/yfUh3iqVIedmyNlfg gs2qSWmPE6kmY8VH2cvDvyc3ggvqxYa6ubBPwNl3UZLyTAKRISDt6+zmpY8M9HrJ22doX65WPgM FdlY= X-Gm-Gg: ASbGncvlLOS4XdugvM98B0ptGn9kTLd+hwz7+yvLVZjo/iGS6oSQ2KWZ15C4XojRl0Y uMJo/5FbDXi6oA3uMWc48MB7A4XIrJJHHzsx9nSCcVXnpyD1mQBzTmd4rPqcj94rHmck/DqSINC /yY+buX/6rAQshrbOi1NyV+xVS72MH+0CM8/NofptbNuenBjwGlfc9BJ/itSLh53jF1NaKkF4fM Xu2SUURlgYVEagp8EY99nD9ydIOK0BAgOAivH5wyEytZANzUuhxozOLG4I/uQ8+4Q4EMWr+fldD Z8LA/2fLe1Av9CA+6z1cpmXdrYC4G+YnFg2WlTwGUgr4X7NA/K25r5BdPQ== X-Google-Smtp-Source: AGHT+IEOg6IG0kjsFKTvz6AcKlvyJUvdpYugEgGxtXEalKSZMbMjvynoGIK3ylHbblQH+CwYP9eGsQ== X-Received: by 2002:a5d:588e:0:b0:38d:d274:4533 with SMTP id ffacd0b85a97d-38dd2745860mr6721f8f.55.1738945240610; Fri, 07 Feb 2025 08:20:40 -0800 (PST) Received: from localhost (089144193052.atnat0002.highway.a1.net. [89.144.193.52]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38dbdd1af32sm5010225f8f.16.2025.02.07.08.20.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 07 Feb 2025 08:20:40 -0800 (PST) From: Andrew Jones To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Cc: paul.walmsley@sifive.com, palmer@dabbelt.com, charlie@rivosinc.com, jesse@rivosinc.com, Anup Patel Subject: [PATCH 7/9] riscv: Prepare for unaligned access type table lookups Date: Fri, 7 Feb 2025 17:19:47 +0100 Message-ID: <20250207161939.46139-18-ajones@ventanamicro.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250207161939.46139-11-ajones@ventanamicro.com> References: <20250207161939.46139-11-ajones@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250207_082043_761933_CF9BA692 X-CRM114-Status: GOOD ( 16.92 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Probing unaligned accesses on boot is time consuming. Provide a function which will be used to look up the access type in a table by id registers. Vendors which provide table entries can then skip the probing. Signed-off-by: Andrew Jones --- arch/riscv/kernel/unaligned_access_speed.c | 114 ++++++++++++--------- 1 file changed, 66 insertions(+), 48 deletions(-) diff --git a/arch/riscv/kernel/unaligned_access_speed.c b/arch/riscv/kernel/unaligned_access_speed.c index d9d4ca1fadc7..f8497097e79d 100644 --- a/arch/riscv/kernel/unaligned_access_speed.c +++ b/arch/riscv/kernel/unaligned_access_speed.c @@ -130,6 +130,50 @@ static void __init check_unaligned_access_nonboot_cpu(void *param) check_unaligned_access(pages[cpu]); } +/* Measure unaligned access speed on all CPUs present at boot in parallel. */ +static void __init check_unaligned_access_speed_all_cpus(void) +{ + unsigned int cpu; + unsigned int cpu_count = num_possible_cpus(); + struct page **bufs = kcalloc(cpu_count, sizeof(*bufs), GFP_KERNEL); + + if (!bufs) { + pr_warn("Allocation failure, not measuring misaligned performance\n"); + return; + } + + /* + * Allocate separate buffers for each CPU so there's no fighting over + * cache lines. + */ + for_each_cpu(cpu, cpu_online_mask) { + bufs[cpu] = alloc_pages(GFP_KERNEL, MISALIGNED_BUFFER_ORDER); + if (!bufs[cpu]) { + pr_warn("Allocation failure, not measuring misaligned performance\n"); + goto out; + } + } + + /* Check everybody except 0, who stays behind to tend jiffies. */ + on_each_cpu(check_unaligned_access_nonboot_cpu, bufs, 1); + + /* Check core 0. */ + smp_call_on_cpu(0, check_unaligned_access, bufs[0], true); + +out: + for_each_cpu(cpu, cpu_online_mask) { + if (bufs[cpu]) + __free_pages(bufs[cpu], MISALIGNED_BUFFER_ORDER); + } + + kfree(bufs); +} +#else /* CONFIG_RISCV_PROBE_UNALIGNED_ACCESS */ +static void __init check_unaligned_access_speed_all_cpus(void) +{ +} +#endif + DEFINE_STATIC_KEY_FALSE(fast_unaligned_access_speed_key); static void modify_unaligned_access_branches(cpumask_t *mask, int weight) @@ -186,8 +230,17 @@ static int __init lock_and_set_unaligned_access_static_branch(void) arch_initcall_sync(lock_and_set_unaligned_access_static_branch); +static bool check_unaligned_access_table(void) +{ + return false; +} + static int riscv_online_cpu(unsigned int cpu) { + if (check_unaligned_access_table()) + goto exit; + +#ifdef CONFIG_RISCV_PROBE_UNALIGNED_ACCESS static struct page *buf; /* We are already set since the last check */ @@ -203,6 +256,7 @@ static int riscv_online_cpu(unsigned int cpu) check_unaligned_access(buf); __free_pages(buf, MISALIGNED_BUFFER_ORDER); +#endif exit: set_unaligned_access_static_branches(); @@ -217,50 +271,6 @@ static int riscv_offline_cpu(unsigned int cpu) return 0; } -/* Measure unaligned access speed on all CPUs present at boot in parallel. */ -static void __init check_unaligned_access_speed_all_cpus(void) -{ - unsigned int cpu; - unsigned int cpu_count = num_possible_cpus(); - struct page **bufs = kcalloc(cpu_count, sizeof(*bufs), GFP_KERNEL); - - if (!bufs) { - pr_warn("Allocation failure, not measuring misaligned performance\n"); - return; - } - - /* - * Allocate separate buffers for each CPU so there's no fighting over - * cache lines. - */ - for_each_cpu(cpu, cpu_online_mask) { - bufs[cpu] = alloc_pages(GFP_KERNEL, MISALIGNED_BUFFER_ORDER); - if (!bufs[cpu]) { - pr_warn("Allocation failure, not measuring misaligned performance\n"); - goto out; - } - } - - /* Check everybody except 0, who stays behind to tend jiffies. */ - on_each_cpu(check_unaligned_access_nonboot_cpu, bufs, 1); - - /* Check core 0. */ - smp_call_on_cpu(0, check_unaligned_access, bufs[0], true); - -out: - for_each_cpu(cpu, cpu_online_mask) { - if (bufs[cpu]) - __free_pages(bufs[cpu], MISALIGNED_BUFFER_ORDER); - } - - kfree(bufs); -} -#else /* CONFIG_RISCV_PROBE_UNALIGNED_ACCESS */ -static void __init check_unaligned_access_speed_all_cpus(void) -{ -} -#endif - #ifdef CONFIG_RISCV_PROBE_VECTOR_UNALIGNED_ACCESS static void check_vector_unaligned_access(struct work_struct *work __always_unused) { @@ -370,6 +380,11 @@ static int __init vec_check_unaligned_access_speed_all_cpus(void *unused __alway } #endif +static bool check_vector_unaligned_access_table(void) +{ + return false; +} + static int riscv_online_cpu_vec(unsigned int cpu) { if (!has_vector()) { @@ -377,6 +392,9 @@ static int riscv_online_cpu_vec(unsigned int cpu) return 0; } + if (check_vector_unaligned_access_table()) + return 0; + #ifdef CONFIG_RISCV_PROBE_VECTOR_UNALIGNED_ACCESS if (per_cpu(vector_misaligned_access, cpu) != RISCV_HWPROBE_MISALIGNED_VECTOR_UNKNOWN) return 0; @@ -392,13 +410,15 @@ static int __init check_unaligned_access_all_cpus(void) { int cpu; - if (!check_unaligned_access_emulated_all_cpus()) + if (!check_unaligned_access_table() && + !check_unaligned_access_emulated_all_cpus()) check_unaligned_access_speed_all_cpus(); if (!has_vector()) { for_each_online_cpu(cpu) per_cpu(vector_misaligned_access, cpu) = RISCV_HWPROBE_MISALIGNED_VECTOR_UNSUPPORTED; - } else if (!check_vector_unaligned_access_emulated_all_cpus() && + } else if (!check_vector_unaligned_access_table() && + !check_vector_unaligned_access_emulated_all_cpus() && IS_ENABLED(CONFIG_RISCV_PROBE_VECTOR_UNALIGNED_ACCESS)) { kthread_run(vec_check_unaligned_access_speed_all_cpus, NULL, "vec_check_unaligned_access_speed_all_cpus"); @@ -408,10 +428,8 @@ static int __init check_unaligned_access_all_cpus(void) * Setup hotplug callbacks for any new CPUs that come online or go * offline. */ -#ifdef CONFIG_RISCV_PROBE_UNALIGNED_ACCESS cpuhp_setup_state_nocalls(CPUHP_AP_ONLINE_DYN, "riscv:online", riscv_online_cpu, riscv_offline_cpu); -#endif cpuhp_setup_state_nocalls(CPUHP_AP_ONLINE_DYN, "riscv:online", riscv_online_cpu_vec, NULL); From patchwork Fri Feb 7 18:10:49 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Jones X-Patchwork-Id: 13965567 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 30328C02194 for ; Fri, 7 Feb 2025 18:13:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=QK5dPJXnBkK/dmXko+yG5V+e5kgufgMURL4qhLfsRKA=; b=NxAyOZAQLWWM54 f1XnRLE4xtfPxShMbB80PSV5ABVgwd7ZBwqy1Am/KHCXPWXlRChPYr0VdDd3tu36/NsaM7G6jBJjp Eno9UaxyNmLoa2bSHWCa/Ayq7D9wauzGxXc2lTboO5G0Hzxt0WjenTc8Y0iT3g2m+SlU7xVt5+5wB Pb4K8hqg3l0gbeQ3bfNo5iNdh59SYcO2w0aXvf9WW5BbUeXVwrxqbXMy+gB2E4mhsnMSVAmiuLSzO sXCwCmcjmR2Xde7o+/wE0fiC0B0oGOKKk+aEN3Vj/+d47YLNStYN7kTovvuAfKvfSDCApPHcSZiEq lAk1p7LxBf8ZVWwST8EQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tgSqf-0000000AdvV-2Lnp; Fri, 07 Feb 2025 18:13:05 +0000 Received: from mail-wr1-x42e.google.com ([2a00:1450:4864:20::42e]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tgSoW-0000000AdUW-46f8 for linux-riscv@lists.infradead.org; Fri, 07 Feb 2025 18:10:54 +0000 Received: by mail-wr1-x42e.google.com with SMTP id ffacd0b85a97d-38db570a639so1393504f8f.1 for ; Fri, 07 Feb 2025 10:10:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1738951851; x=1739556651; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ZaGa43r2JveY8ihF44rUo4WO7W9CMxjRpmYKl91QS2U=; b=Df6rLNraSSUYumwnhi41JwCkRy1PSERgmTRJCSLyLI4MPqlQW1v/a4CnOqnTumSDCx kD8hLzpHJSqiiaU+oDDR1oco+2yV2Vt9loIgvZVc1QvQ8ya+JZl6K+G63ZvahMFSwMXO alj6eZFjJMQXmJXvmLgAjAjnGFuoCP0HLt5aBnCVx/GzLFAbUWrjI8SvulUXMQiy0XvK ETbM3g1gez1F+S3Cv7GJXmuQLLgKPMG8/dBNSBxgYPziaaNQfVK5EEZ5KCywMdlZyT8D cH4co+LEfws2D38P9Hp17ZC610ayNZpMgHcOfWWRnxYKtfuYGpw+iUx80lyhL1pNvf1e S49A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1738951851; x=1739556651; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ZaGa43r2JveY8ihF44rUo4WO7W9CMxjRpmYKl91QS2U=; b=SqmJgWxNxgBtIXdVaIRqOYTY6fhKtHZQRvuLrI/Njg30fhC239s+5j4fgs+HNFsW/o sZ89po35moAAvOBN0LbsSDgb0e4s3sRV47uWkh0ZZe19oKbP6wAawaiGAtTeAQ2rhFJY 968YGpQFe6FhlWNkXCDpvy5bgF5oFmcwg1CMdHRFja30g0qZCDrHn51TTOWaFoWNTFj2 Mg1PfSzjTyHEs43mms1yNZV1ChpRTbZSrz5VqqJ1IDUHPgdalMBnsasW/oZt1eKbZIWq 8fPygaxipZyp9gbl5LhJ1UgcIs0xqnJEty2q3KvDqVs27RZ6eqLdNyk+xi+2mW1ZINGK 2UsQ== X-Gm-Message-State: AOJu0YwVrTHKMdB4N9sRLoqn96TeNEi45Xmu8ChVAL/ZnmibChnColG2 2n0ADJb+2ugcKxUjJ3Qi2FxFHFeQ65/NZTbYlJxZGCdmCnCBI0JU638aVSybixGURZCGKCz7Uf6 tE7Q= X-Gm-Gg: ASbGnctN+WOY3S08JOGqalv3ZN9n0IUftfpOcujzmoKvgAx9VbNqVQQDY1Pvrlon8QM E+hzUaXX4+rcG/DrwGugl5f8QMW7U0W4NBiu5kAefan1ntLpM6MYoL6y33PTrL3LoUMFfj0blEY vaPBoFErdM2Kfw4Awm//o9ybXEqDeRfnyl8o4R+yKO9vL/OXEpybD20DLiQS365TxzVtmGs8EEi kKL1BLT7AB7DYHobxkWKy1b6ZopXX7FP4fnSZ4cza27Xt80S11mm8GpSU0aTHbGMcByLU1xuzkw fpE23GRPfXk1ofLszcP9 X-Google-Smtp-Source: AGHT+IHOihO78F1JYjZBcL716TkRfKyLKlP1MuS9GngQcG+qjWBNUOBMY89/HVssLqqzYEkL5feOmg== X-Received: by 2002:a05:6000:188b:b0:38d:b7dc:30b8 with SMTP id ffacd0b85a97d-38dbb2cf5b8mr7099206f8f.18.1738951851310; Fri, 07 Feb 2025 10:10:51 -0800 (PST) Received: from localhost ([2a00:11b1:103b:18b0:943f:8e0:c299:6db0]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4390d933794sm100227965e9.7.2025.02.07.10.10.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 07 Feb 2025 10:10:50 -0800 (PST) From: Andrew Jones To: linux-riscv@lists.infradead.org Cc: cleger@rivosinc.com Subject: [PATCH 8/9] riscv: Implement check_unaligned_access_table Date: Fri, 7 Feb 2025 19:10:49 +0100 Message-ID: <20250207181048.6045-2-ajones@ventanamicro.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250207161939.46139-11-ajones@ventanamicro.com> References: <20250207161939.46139-11-ajones@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250207_101053_010132_77FE4E62 X-CRM114-Status: GOOD ( 15.84 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Define the table entry type and implement the table lookup to find unaligned access types by id registers which is used to skip probing. Signed-off-by: Andrew Jones --- arch/riscv/kernel/unaligned_access_speed.c | 91 +++++++++++++++++++++- 1 file changed, 89 insertions(+), 2 deletions(-) diff --git a/arch/riscv/kernel/unaligned_access_speed.c b/arch/riscv/kernel/unaligned_access_speed.c index f8497097e79d..bd6db4c42daf 100644 --- a/arch/riscv/kernel/unaligned_access_speed.c +++ b/arch/riscv/kernel/unaligned_access_speed.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include "copy-unaligned.h" @@ -230,11 +231,89 @@ static int __init lock_and_set_unaligned_access_static_branch(void) arch_initcall_sync(lock_and_set_unaligned_access_static_branch); -static bool check_unaligned_access_table(void) +/* + * An unaligned_access_table_entry maps harts (or collections of harts) to + * unaligned access types. @level is used to determine whether @marchid and/or + * @mimpid should to be considered. All (level, mvendorid, marchid, mimpid) + * tuples formed from each table entry must be unique. + */ +enum id_level { + LEVEL_VENDOR, + LEVEL_ARCH, + LEVEL_IMP, +}; +struct unaligned_access_table_entry { + enum id_level level; + u32 mvendorid; + ulong marchid; + ulong mimpid; + long type; +}; + +static struct unaligned_access_table_entry unaligned_access_table_entries[] = { +}; + +/* + * Search unaligned_access_table_entries[] for the most specific match, + * i.e. if there are two entries, one with mvendorid = V and level = VENDOR + * and another with mvendorid = V, level = ARCH, and marchid = A, then + * a hart with {V,A,?} will match the latter while a hart with {V,!A,?} + * will match the former. + */ +static bool __check_unaligned_access_table(int cpu, long *ptr, int nr_entries, + struct unaligned_access_table_entry table[]) { + struct unaligned_access_table_entry *entry, *match = NULL; + u32 mvendorid = riscv_cached_mvendorid(cpu); + ulong marchid = riscv_cached_marchid(cpu); + ulong mimpid = riscv_cached_mimpid(cpu); + int i; + + for (i = 0; i < nr_entries; ++i) { + entry = &table[i]; + + switch (entry->level) { + case LEVEL_VENDOR: + if (!match && entry->mvendorid == mvendorid) { + /* The match, unless we find an ARCH or IMP level match. */ + match = entry; + } + break; + case LEVEL_ARCH: + if (entry->mvendorid == mvendorid && entry->marchid == marchid) { + /* The match, unless we find an IMP level match. */ + match = entry; + } + break; + case LEVEL_IMP: + if (entry->mvendorid == mvendorid && entry->marchid == marchid && + entry->mimpid == mimpid) { + match = entry; + goto matched; + } + break; + } + } + + if (match) { +matched: + *ptr = match->type; + return true; + } + return false; } +static bool check_unaligned_access_table(void) +{ + int cpu = smp_processor_id(); + long *ptr = per_cpu_ptr(&misaligned_access_speed, cpu); + + return __check_unaligned_access_table(cpu, ptr, + ARRAY_SIZE(unaligned_access_table_entries), + unaligned_access_table_entries); +} + static int riscv_online_cpu(unsigned int cpu) { if (check_unaligned_access_table()) @@ -380,9 +459,17 @@ static int __init vec_check_unaligned_access_speed_all_cpus(void *unused __alway } #endif +static struct unaligned_access_table_entry vec_unaligned_access_table_entries[] = { +}; + static bool check_vector_unaligned_access_table(void) { - return false; + int cpu = smp_processor_id(); + long *ptr = per_cpu_ptr(&vector_misaligned_access, cpu); + + return __check_unaligned_access_table(cpu, ptr, + ARRAY_SIZE(vec_unaligned_access_table_entries), + vec_unaligned_access_table_entries); } static int riscv_online_cpu_vec(unsigned int cpu) From patchwork Fri Feb 7 16:19:49 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Jones X-Patchwork-Id: 13965429 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6BD44C02194 for ; Fri, 7 Feb 2025 16:20:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=dDy9DyaQxmwCz+kwTgqGF27D5KVi5Jhy8+hQt5XCDKk=; b=hgOMaoy1dqrurh EkoywAMGQvkKEqaMK34y89r2fxwofnCQaRqFsYpkq+HRPnsAH/FwmJX5mUUik5eH4Ao87CQgldAE3 DXD+RJJp3sxRfvlv6W6zZWxVNIocykCVEuednvCNQw20PBakACY0n/lrFTITHc5Qw0bTVJoV+FWM5 e6laDuU4zqsXs2+ZpoItonykW3Q+IVlP0Tnu7qDVyYNu4whuhVEVTLzPxv/QOMPyepWMBD+Ba7co1 sYFVLXYs5hBSLRfTY/wu8sbyt6zbS5jscKayNtFxSAuBEZmvT1A3abwwq3geYU4nhw0YWMJNq3QxY R5nQpOmHYDJL8Pr4DA5g==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tgR64-0000000AFpO-3yYZ; Fri, 07 Feb 2025 16:20:52 +0000 Received: from mail-wr1-x431.google.com ([2a00:1450:4864:20::431]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tgR63-0000000AFnl-0VwH for linux-riscv@lists.infradead.org; Fri, 07 Feb 2025 16:20:52 +0000 Received: by mail-wr1-x431.google.com with SMTP id ffacd0b85a97d-38dd0dc21b2so146592f8f.2 for ; Fri, 07 Feb 2025 08:20:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1738945250; x=1739550050; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=EXWq8j6voTaeGRr8J3gg8YAr/RtfWvANeWegFFYO8S4=; b=WmXr9QJIhUUuheXRAcu5rfXrJ7YXoYqlqce96QzJghalfvcqyugSE4U3lfA7zZbUdT R+soiSc40AhmWuOzh1i1sECzupkqeWNp1PDlucmcxhC9AHs/7YXXXsvc5AY+MoGImzyb yWhmKT0g3VkFUIYC2sZWl0LpQCAtbUPuC/M4liOTCdXGc2cXLgKKDQCpW32Tmjn3Bc7i bm18sSq6GnrXzWP5rNYq+O4asmxQuVJIo56nGSBysCyo5iwuOITfOyrsa7IaWwsh4Z7V R6Bdgu/8McqmDo/HsOKnSNFTV/ooeBbfikIsembg/EtGKDogX/SziMCH3jF0o0d3fHHR bx9w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1738945250; x=1739550050; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=EXWq8j6voTaeGRr8J3gg8YAr/RtfWvANeWegFFYO8S4=; b=ISZUxo13dIbbGQrP7ay9RRqSWbmHT4UcC/tqjnrpR8cK4KH3cyvTWP0GcC91gZ08Us w72Im2EuqydwT07YaRk64wOyBRljZFU+nH4eT23dwi13N7pktwbGFCL/ZJ/B+Q4FVYvV NSWigD1ggy8qjwItm02NUW3ZiIQsMmH4mGGQNDUPCVyIBBzFVFSz1Rv//P93nFA+QUa3 FeTauIfygkFm8ydJPSF88bv84IjpbcM4MHuSUZMkjCb3fKXllxM0TcVbojhK+rbt6kVN Q4lOLRgz5Q04ybO8QR+w5po6YCB+snMHzgfh58FY3BUEIW9UrV6O4wVzU5faXSyPYzz6 AvOg== X-Gm-Message-State: AOJu0YzYMl7XtqsUnItgTngxQuSSIlikvCfy5swPCzyjOpbrkerntoyZ Y9tim8kbJcn1DkSLDEZTgHw494g1HzVxGXVNDduE3NAPeR+2J+H4VCVb2gzBVPIbMu50nVBg5Ca lLUU= X-Gm-Gg: ASbGncu38q6UKh+A0/2ajvQXuw79y16O2EbV5oIbkBo6z+8T8HYgea8vRPmx7P4KhPl BU3hN0T4Vzp+8TGisILEdtUbDlzr+9DdxaNuxFS7yQGTHjonbTOpakpac1DxSSrVIsAXXzqm7T2 HSLUCK0kHOWVu0Phqog1zojnpawrjQmCdj3O0KbeLNXpvwSRzg5lwyGTNtkYI0ZhhhvUH6+IorC 9kBW5z8EYrKN6/wSjNEr5NBkrFbK43B5BP+IARp93E/5zEK4WqwS+r9eciG1zApsqTnCv4fM8M0 kCSHN7QGUdaG/MIr/bP1TmlgGEa6FyRYIzz+28Wjxu9VS99PTwN+pXcrlg== X-Google-Smtp-Source: AGHT+IHh6JwLYQePZBMujNRYI8A6XwD5WkfD3Ot/VtJsrqiS9T18sjhPkT+oNZek1pT+BypYrsY7PQ== X-Received: by 2002:a05:6000:18a3:b0:38a:a037:a517 with SMTP id ffacd0b85a97d-38dc8dd27f1mr2638562f8f.19.1738945249611; Fri, 07 Feb 2025 08:20:49 -0800 (PST) Received: from localhost (089144193052.atnat0002.highway.a1.net. [89.144.193.52]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4391dfd8448sm60238835e9.38.2025.02.07.08.20.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 07 Feb 2025 08:20:49 -0800 (PST) From: Andrew Jones To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Cc: paul.walmsley@sifive.com, palmer@dabbelt.com, charlie@rivosinc.com, jesse@rivosinc.com, Anup Patel Subject: [PATCH 9/9] riscv: Add Ventana unaligned access table entries Date: Fri, 7 Feb 2025 17:19:49 +0100 Message-ID: <20250207161939.46139-20-ajones@ventanamicro.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250207161939.46139-11-ajones@ventanamicro.com> References: <20250207161939.46139-11-ajones@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250207_082051_163076_34C52D86 X-CRM114-Status: GOOD ( 10.75 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Ventana harts always have fast unaligned access speeds, so skip the unnecessary probing. Signed-off-by: Andrew Jones --- arch/riscv/include/asm/vendorid_list.h | 1 + arch/riscv/kernel/unaligned_access_speed.c | 3 +++ 2 files changed, 4 insertions(+) diff --git a/arch/riscv/include/asm/vendorid_list.h b/arch/riscv/include/asm/vendorid_list.h index a5150cdf34d8..8dd55a847893 100644 --- a/arch/riscv/include/asm/vendorid_list.h +++ b/arch/riscv/include/asm/vendorid_list.h @@ -9,5 +9,6 @@ #define MICROCHIP_VENDOR_ID 0x029 #define SIFIVE_VENDOR_ID 0x489 #define THEAD_VENDOR_ID 0x5b7 +#define VENTANA_VENDOR_ID 0x61f #endif diff --git a/arch/riscv/kernel/unaligned_access_speed.c b/arch/riscv/kernel/unaligned_access_speed.c index bd6db4c42daf..ff9905274c60 100644 --- a/arch/riscv/kernel/unaligned_access_speed.c +++ b/arch/riscv/kernel/unaligned_access_speed.c @@ -14,6 +14,7 @@ #include #include #include +#include #include "copy-unaligned.h" @@ -251,6 +252,7 @@ struct unaligned_access_table_entry { }; static struct unaligned_access_table_entry unaligned_access_table_entries[] = { + { LEVEL_VENDOR, VENTANA_VENDOR_ID, 0, 0, RISCV_HWPROBE_MISALIGNED_SCALAR_FAST }, }; /* @@ -460,6 +462,7 @@ static int __init vec_check_unaligned_access_speed_all_cpus(void *unused __alway #endif static struct unaligned_access_table_entry vec_unaligned_access_table_entries[] = { + { LEVEL_VENDOR, VENTANA_VENDOR_ID, 0, 0, RISCV_HWPROBE_MISALIGNED_VECTOR_FAST }, }; static bool check_vector_unaligned_access_table(void)