From patchwork Sat Feb 8 05:03:28 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Helgaas X-Patchwork-Id: 13966261 X-Patchwork-Delegate: bhelgaas@google.com Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B59A819F115; Sat, 8 Feb 2025 05:03:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738991016; cv=none; b=NZN1WtZThjO5Ezu8jlX4/ossJIpWOP57yPhH3mhx1r4XMui0k6pQMbH+lw5RUSUCwK9+Bi4BHsg3962wVKkHfEpOkqAWxud89RV95SyWUUgHzerQEVrQKzdRBDP10j6uEtAz+NCKtlTczPbxdba1MqY7ctHO0A0FGLLRmsSzK9A= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738991016; c=relaxed/simple; bh=5+WepBgrJ9vnrfCD2exNLAnJnxXrfpzwCGQna165RnY=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=lBq7OzEVSp0iIWQokvOOhsVmpzSm9eIvTCvst2Hl7Wp5Bj1bNN3gcyHDqs+Ch2wI1FtZJ8UfJUiChMq09uksMxWlXtCV+RdmDrlxVh4GiaHkt8AXf6XAW1YjXu1B2JDRw6eAy1v4T9FvI6otckWNVrDn6LKZX5wpS/eduWGBLSQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=M+uSmFw6; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="M+uSmFw6" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 0757FC4CEDF; Sat, 8 Feb 2025 05:03:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1738991016; bh=5+WepBgrJ9vnrfCD2exNLAnJnxXrfpzwCGQna165RnY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=M+uSmFw6BCoO6TUsJWXPNKMDzisLafc0mAMpEOtlogyYHLejdtfHxrWEpxJ+0SXDH +x7lPrSY0f3KRSCafBdR/5fTlMaUgxVAtEtyBFXqqVa9bOZTpgrKYdE7UpNvTVWrWX PsrykdDUmNT0IViC8jW0lJUpGAT1XQrzx0sUI//V5IJ4brseCYXrL6Pjnt2FoGmFW7 seMY2JQsuTIUxwrponpfwEmw0Cv/staEVMoJ5xBCJUinBc1zfYlScMMjxoiYWOOfMy 3i3IQiWE00URacMyzESTNktxwdIfOfEibRyQZeA7RN+/33na5y8jRLhvkwOdEBl7g9 jKN02st3JvLKQ== From: Bjorn Helgaas To: Alex Williamson , =?utf-8?q?Christian_K?= =?utf-8?q?=C3=B6nig?= Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Bjorn Helgaas Subject: [PATCH 1/2] PCI: Avoid pointless capability searches Date: Fri, 7 Feb 2025 23:03:28 -0600 Message-Id: <20250208050329.1092214-2-helgaas@kernel.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250208050329.1092214-1-helgaas@kernel.org> References: <20250208050329.1092214-1-helgaas@kernel.org> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Bjorn Helgaas Many of the save/restore functions in the pci_save_state() and pci_restore_state() paths depend on both a PCI capability of the device and a pci_cap_saved_state structure to hold the configuration data, and they skip the operation if either is missing. Look for the pci_cap_saved_state first so if we don't have one, we can skip searching for the device capability, which requires several slow config space accesses. Remove some error messages if the pci_cap_saved_state is not found so we don't complain about having no saved state for a capability the device doesn't have. We have already warned in pci_allocate_cap_save_buffers() if the capability is present but we were unable to allocate a buffer. Other than the message change, no functional change intended. Signed-off-by: Bjorn Helgaas --- drivers/pci/pci.c | 27 ++++++++++++++------------- drivers/pci/pcie/aspm.c | 15 ++++++++------- drivers/pci/vc.c | 22 +++++++++++----------- 3 files changed, 33 insertions(+), 31 deletions(-) diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 869d204a70a3..503376bf7e75 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -1686,10 +1686,8 @@ static int pci_save_pcie_state(struct pci_dev *dev) return 0; save_state = pci_find_saved_cap(dev, PCI_CAP_ID_EXP); - if (!save_state) { - pci_err(dev, "buffer not found in %s\n", __func__); + if (!save_state) return -ENOMEM; - } cap = (u16 *)&save_state->cap.data[0]; pcie_capability_read_word(dev, PCI_EXP_DEVCTL, &cap[i++]); @@ -1742,19 +1740,17 @@ static void pci_restore_pcie_state(struct pci_dev *dev) static int pci_save_pcix_state(struct pci_dev *dev) { - int pos; struct pci_cap_saved_state *save_state; + u8 pos; + + save_state = pci_find_saved_cap(dev, PCI_CAP_ID_PCIX); + if (!save_state) + return -ENOMEM; pos = pci_find_capability(dev, PCI_CAP_ID_PCIX); if (!pos) return 0; - save_state = pci_find_saved_cap(dev, PCI_CAP_ID_PCIX); - if (!save_state) { - pci_err(dev, "buffer not found in %s\n", __func__); - return -ENOMEM; - } - pci_read_config_word(dev, pos + PCI_X_CMD, (u16 *)save_state->cap.data); @@ -1763,14 +1759,19 @@ static int pci_save_pcix_state(struct pci_dev *dev) static void pci_restore_pcix_state(struct pci_dev *dev) { - int i = 0, pos; struct pci_cap_saved_state *save_state; + u8 pos; + int i = 0; u16 *cap; save_state = pci_find_saved_cap(dev, PCI_CAP_ID_PCIX); - pos = pci_find_capability(dev, PCI_CAP_ID_PCIX); - if (!save_state || !pos) + if (!save_state) return; + + pos = pci_find_capability(dev, PCI_CAP_ID_PCIX); + if (!pos) + return; + cap = (u16 *)&save_state->cap.data[0]; pci_write_config_word(dev, pos + PCI_X_CMD, cap[i++]); diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c index e0bc90597dca..007e4a082e6f 100644 --- a/drivers/pci/pcie/aspm.c +++ b/drivers/pci/pcie/aspm.c @@ -35,16 +35,14 @@ void pci_save_ltr_state(struct pci_dev *dev) if (!pci_is_pcie(dev)) return; + save_state = pci_find_saved_ext_cap(dev, PCI_EXT_CAP_ID_LTR); + if (!save_state) + return; + ltr = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_LTR); if (!ltr) return; - save_state = pci_find_saved_ext_cap(dev, PCI_EXT_CAP_ID_LTR); - if (!save_state) { - pci_err(dev, "no suspend buffer for LTR; ASPM issues possible after resume\n"); - return; - } - /* Some broken devices only support dword access to LTR */ cap = &save_state->cap.data[0]; pci_read_config_dword(dev, ltr + PCI_LTR_MAX_SNOOP_LAT, cap); @@ -57,8 +55,11 @@ void pci_restore_ltr_state(struct pci_dev *dev) u32 *cap; save_state = pci_find_saved_ext_cap(dev, PCI_EXT_CAP_ID_LTR); + if (!save_state) + return; + ltr = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_LTR); - if (!save_state || !ltr) + if (!ltr) return; /* Some broken devices only support dword access to LTR */ diff --git a/drivers/pci/vc.c b/drivers/pci/vc.c index a4ff7f5f66dd..c39f3be518d4 100644 --- a/drivers/pci/vc.c +++ b/drivers/pci/vc.c @@ -355,20 +355,17 @@ int pci_save_vc_state(struct pci_dev *dev) int i; for (i = 0; i < ARRAY_SIZE(vc_caps); i++) { - int pos, ret; struct pci_cap_saved_state *save_state; + int pos, ret; + + save_state = pci_find_saved_ext_cap(dev, vc_caps[i].id); + if (!save_state) + return -ENOMEM; pos = pci_find_ext_capability(dev, vc_caps[i].id); if (!pos) continue; - save_state = pci_find_saved_ext_cap(dev, vc_caps[i].id); - if (!save_state) { - pci_err(dev, "%s buffer not found in %s\n", - vc_caps[i].name, __func__); - return -ENOMEM; - } - ret = pci_vc_do_save_buffer(dev, pos, save_state, true); if (ret) { pci_err(dev, "%s save unsuccessful %s\n", @@ -392,12 +389,15 @@ void pci_restore_vc_state(struct pci_dev *dev) int i; for (i = 0; i < ARRAY_SIZE(vc_caps); i++) { - int pos; struct pci_cap_saved_state *save_state; + int pos; + + save_state = pci_find_saved_ext_cap(dev, vc_caps[i].id); + if (!save_state) + continue; pos = pci_find_ext_capability(dev, vc_caps[i].id); - save_state = pci_find_saved_ext_cap(dev, vc_caps[i].id); - if (!save_state || !pos) + if (!pos) continue; pci_vc_do_save_buffer(dev, pos, save_state, false); From patchwork Sat Feb 8 05:03:29 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Bjorn Helgaas X-Patchwork-Id: 13966262 X-Patchwork-Delegate: bhelgaas@google.com Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2371E1A2C29; Sat, 8 Feb 2025 05:03:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738991018; cv=none; b=WPRX4cGMRC+sICARWZNwSzZgtDyY6Qxfiw0oH6CHgxcpCIUu/nP0sIsRGLPgbPzACfWj9rSJPlSzxcooNVXoKwZr/4PEkCYaHef8lyyyoAhAALDADQOONmS+q3UtsyBotVl9MvD0r6oTZzS41CQMNlaWAn5NMj62Fhr9NrSnmVA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738991018; c=relaxed/simple; bh=0mykn84dG9D2ONSFmXFeEpUD90P096gYCkiHrYqJSdg=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=UeUCnSCtWhvBt8DFFDJOWUceLiTIsHTx0ye0ou4jgtfLSGMY8zZVeUMYSlwn0nitAGFJilUmlqloHkgZu8dRU7FaIGvNVJcuoeawX3KF8ZjKlaoW2/VaYh1z6L8vLeecyMvUNcWeMlOAskThedDCtso2mr+UaSuUkSgTaLWy84o= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=oTr03tVr; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="oTr03tVr" Received: by smtp.kernel.org (Postfix) with ESMTPSA id C7278C4CEDF; Sat, 8 Feb 2025 05:03:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1738991018; bh=0mykn84dG9D2ONSFmXFeEpUD90P096gYCkiHrYqJSdg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=oTr03tVrUin0okrlPb6XzfF5KTJcH4eVK9PgcB5elORDKRh1dFdIMkenQL6k2YtcP qo4YDaTtIVEGCszPCoUu4RTyacaY//Ok/6uB6gv3ZPSD1QVxRekmVCrR4tUy6Re/1F QSYkbktEiC6FfQvVNZAAqslwieEmUd+EH72Hac9ItM0kOTYgAsUKl2BZg8ssm3JxbM RciaNVlxMK1vMZX8afKCPIRu42v+3+JeH/GHzKm3VX6E0BwIx/UeLUJiDY8OT6ky60 gj/sP/eHkRFKRjW+KDNYH7wM/+Y3+GD+X/K0hg/gHLII2KrxTRh809Y2x/uflEgH4H q1f1dKKak4rzQ== From: Bjorn Helgaas To: Alex Williamson , =?utf-8?q?Christian_K?= =?utf-8?q?=C3=B6nig?= Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Bjorn Helgaas Subject: [PATCH 2/2] PCI: Cache offset of Resizable BAR capability Date: Fri, 7 Feb 2025 23:03:29 -0600 Message-Id: <20250208050329.1092214-3-helgaas@kernel.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250208050329.1092214-1-helgaas@kernel.org> References: <20250208050329.1092214-1-helgaas@kernel.org> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Bjorn Helgaas Previously most resizable BAR interfaces (pci_rebar_get_possible_sizes(), pci_rebar_set_size(), etc) as well as pci_restore_state() searched config space for a Resizable BAR capability. Most devices don't have such a capability, so this is wasted effort, especially for pci_restore_state(). Search for a Resizable BAR capability once at enumeration-time and cache the offset so we don't have to search every time we need it. No functional change intended. Signed-off-by: Bjorn Helgaas Reviewed-by: Ilpo Järvinen --- drivers/pci/pci.c | 9 +++++++-- drivers/pci/pci.h | 1 + drivers/pci/probe.c | 1 + include/linux/pci.h | 1 + 4 files changed, 10 insertions(+), 2 deletions(-) diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 503376bf7e75..cf2632080a94 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -1872,7 +1872,7 @@ static void pci_restore_rebar_state(struct pci_dev *pdev) unsigned int pos, nbars, i; u32 ctrl; - pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_REBAR); + pos = pdev->rebar_cap; if (!pos) return; @@ -3719,6 +3719,11 @@ void pci_acs_init(struct pci_dev *dev) pci_enable_acs(dev); } +void pci_rebar_init(struct pci_dev *pdev) +{ + pdev->rebar_cap = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_REBAR); +} + /** * pci_rebar_find_pos - find position of resize ctrl reg for BAR * @pdev: PCI device @@ -3733,7 +3738,7 @@ static int pci_rebar_find_pos(struct pci_dev *pdev, int bar) unsigned int pos, nbars, i; u32 ctrl; - pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_REBAR); + pos = pdev->rebar_cap; if (!pos) return -ENOTSUPP; diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index 01e51db8d285..d7b46ddfd6d2 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h @@ -799,6 +799,7 @@ static inline int acpi_get_rc_resources(struct device *dev, const char *hid, } #endif +void pci_rebar_init(struct pci_dev *pdev); int pci_rebar_get_current_size(struct pci_dev *pdev, int bar); int pci_rebar_set_size(struct pci_dev *pdev, int bar, int size); static inline u64 pci_rebar_size_to_bytes(int size) diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index b6536ed599c3..24dd3dcfd223 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -2564,6 +2564,7 @@ static void pci_init_capabilities(struct pci_dev *dev) pci_rcec_init(dev); /* Root Complex Event Collector */ pci_doe_init(dev); /* Data Object Exchange */ pci_tph_init(dev); /* TLP Processing Hints */ + pci_rebar_init(dev); /* Resizable BAR */ pcie_report_downtraining(dev); pci_init_reset_methods(dev); diff --git a/include/linux/pci.h b/include/linux/pci.h index 47b31ad724fa..9e5bbd996c83 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -353,6 +353,7 @@ struct pci_dev { struct pci_dev *rcec; /* Associated RCEC device */ #endif u32 devcap; /* PCIe Device Capabilities */ + u16 rebar_cap; /* Resizable BAR capability offset */ u8 pcie_cap; /* PCIe capability offset */ u8 msi_cap; /* MSI capability offset */ u8 msix_cap; /* MSI-X capability offset */