From patchwork Mon Feb 10 22:16:05 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrick Wildt X-Patchwork-Id: 13968492 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DB29CC0219E for ; Mon, 10 Feb 2025 23:40:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Subject:Cc:To: From:Date:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=vohdNPpZg8VU2liA65noU5rXMHO01UKaFfKxamJ9sqM=; b=0Wr8AnH5m2oKD7 KHYAFTOEYSJF2VyDUfv8Ae8Gu9THRb9/ahM6so6g/Em1B09qTRM01RliKNJY19tLlz8tHWAlFrdzV 2VzR8uc4fsxano1gS94JvODiakbLIso7JJbE8BtGFJf0e7sEiur61Zxa4tATYAcESZ2pn6lE4fqW8 VGFmuEW9RoKlafTIk9/iq+Ji1fZZfDesNQ6jEuX641UNGznK8UJ1KPxyqC6A8ay2H4MPwevMDWaic v9Ua0z0ACUcz9Zpx+55gfx/2K3m9+lE1GAiy6VYQrmcIL1sppQ5Jn/7EflQucu1hG3X31n3tHj1UG DAKxeDRXGYgiErG6waCA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1thdOW-00000001scJ-1JGK; Mon, 10 Feb 2025 23:40:52 +0000 Received: from mail-wm1-x362.google.com ([2a00:1450:4864:20::362]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1thc4Y-00000001cXE-1syn for linux-rockchip@lists.infradead.org; Mon, 10 Feb 2025 22:16:11 +0000 Received: by mail-wm1-x362.google.com with SMTP id 5b1f17b1804b1-439350f1a0bso14024375e9.0 for ; Mon, 10 Feb 2025 14:16:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=patrick-wildt-de.20230601.gappssmtp.com; s=20230601; t=1739225769; x=1739830569; darn=lists.infradead.org; h=content-disposition:mime-version:message-id:subject:cc:to:from:date :from:to:cc:subject:date:message-id:reply-to; bh=13HhyQSKe9R/ysYBmBYlN/OC3FOpvN6dJIQ+dDqvrXY=; b=gvTD7XoA6iSbDukOAPeAMTdHzyGeyZsqrWwNDpTZQwXjeHbijCe8ia+T0cwFFVfxHn lOiQ3Q5z4AbqsT+Kzw6/lyXFLyh/WYOywubJehlZ1lixAaTJfMM/CuxH/c7okEVsMmOa z1R6pJ2lsy9FLHJcQcMoT48xS81FxlslM2dHpy1qatujQuseejjAhrucCueH92gJnpx0 mrdP2Ms0Ds+y/48fd3VnwxLD70yrD3dq1R6gYjNWUw3Lwqa7ipC767VkhXXNvNA9OHSj pyxEmy7Bhp+/KSzYJ3WnRr5Y2iOOJY/bexr6sxXullSAMLE4UKBZTvOLvfkHQMLQ575Q 4f9w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1739225769; x=1739830569; h=content-disposition:mime-version:message-id:subject:cc:to:from:date :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=13HhyQSKe9R/ysYBmBYlN/OC3FOpvN6dJIQ+dDqvrXY=; b=ZY+dc9le2rJPIzss4IEo/lKl+ZQ+omrGdwHWRxR+1Lfor1BTTVdgbyqW2aFB5CltT5 K5eSgQBIutGP8GwOoi+vY8NtHG8Cf724u/7WOfCwaCqnYWnVt2Vnrx5ThKTeHW8q/0yz l2KHySM4H36qSHOK3FPOVesTj0erpppLV5NnTRC5nYxDnNVnhpOWFEwwPUl0iRmDSOb9 uNYzm0XBIR+aZU0gPghVct/taE8bcHfj8z7rsfv7yEPxi3VsYEZ1I0hcoxEQB29iGCuN cs+zBZWGK/XI6a71Tl7uWw81dvV31LgZQxdyg2llikxnjzoqvqOikYnEYpbp2ctOymhA 8rZg== X-Gm-Message-State: AOJu0YzIaAoPQPl0piK5M56GPVBFD2LNEutuYqAVgbe1wTa2q2X42Oc5 e5Rc8nuWwoywl+klKRUzaNvheroRmv73iMy2CYYRiG74mxOaDiQW/fmTTw28pNp10CYCQBHdZmU qb1jRzJNGaCAP+auX+mfZUE5aZV3I4zAclGHgbvv9 X-Gm-Gg: ASbGnctPWYZCInSBW7dl6VUw+6eMiF1cojfDgJ1saXJacgHUC5ndl0UsMcIldCNUmPd x0rJGOhUyd8Jeo7InG3FBD1KzyUuPfoRstDYPXxKqNnGjqdAkInor8yve2GgjbZyUpHH8/w45Pq d+Yd/nvsOA3H0QZiHsg4eKLIzIdGhih9yk5/OWl4LOTez3+jSYD8JBVf2DpONiecdhr3jDUZ4qK OiDhGtByPps4S6AMSOBrR9GFQcmwNPAKZw+unnsdccQw8sgTzMKuknmnqMfUPHDcRzTVnDFpWOo KhlRr32ELUkxvrgVHxjtDdnOHOFlKNue X-Google-Smtp-Source: AGHT+IGIpesWPH995t5ObgCbest3RPXsMCOOqvkk8OX3wG7izUgYYfXIQA1gziN/MFCY0sX5NzInpnZxX2s1 X-Received: by 2002:a05:600c:2d0c:b0:435:edb0:5d27 with SMTP id 5b1f17b1804b1-4394cebd10emr8852015e9.9.1739225768451; Mon, 10 Feb 2025 14:16:08 -0800 (PST) Received: from windev.fritz.box (pc19f8e2d.dip0.t-ipconnect.de. [193.159.142.45]) by smtp-relay.gmail.com with ESMTPS id 5b1f17b1804b1-439324eedf7sm5407785e9.40.2025.02.10.14.16.07 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 10 Feb 2025 14:16:08 -0800 (PST) X-Relaying-Domain: blueri.se Date: Mon, 10 Feb 2025 23:16:05 +0100 From: Patrick Wildt To: linux-rockchip@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, Kever Yang , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Krzysztof Kozlowski Subject: [PATCH v2 1/2] dt-bindings: arm: rockchip: Add MNT Reform 2 (RCORE) Message-ID: MIME-Version: 1.0 Content-Disposition: inline X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250210_141610_489741_4AFB56AA X-CRM114-Status: UNSURE ( 8.05 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org Document board compatible bindings. Signed-off-by: Patrick Wildt Acked-by: Krzysztof Kozlowski --- Changes for v2: - No changes, apart from Acked-by Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index 522a6f0450ea..bc995db8cbfe 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -710,6 +710,11 @@ properties: - const: mqmaker,miqi - const: rockchip,rk3288 + - description: MNT Reform2 (RCORE) + items: + - const: mntre,reform2-rcore + - const: rockchip,rk3588 + - description: Neardi LBA3368 items: - const: neardi,lba3368 From patchwork Mon Feb 10 22:17:21 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrick Wildt X-Patchwork-Id: 13968478 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 33739C02198 for ; Mon, 10 Feb 2025 22:41:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=OBsoc/+QNd22BN5UsW1gRFHapw/xb9nyh3yHgprkCSA=; b=30PLpimBTsaYCs Oiq5Zz36lYVRSvTGzvJfc+UrAdm2hthI+KAvyX267H1Jq71b77DF42hDYEZXQhb8uQIDQMFr6fTSw tz8gqRG0nolC5dOsxCB/NI5+ycb9tQrUihl9CzEfGd8CmjHjVrOWB6GrX7B4q9tJdgmMJ/Sk8+/K/ zIHa8RJ8ldkXDQUBAkOiG8ugrbzxulgs8l5uZvHGWzaRFZQ2tZgbB0pRYBbktiyikucIFa2KRYY3e 5DSYpAoJse0rPsfdntUbZWizeFeKE87uP+EHLWrJGxmBJROKGre6sW7RSTu4ol5rf60Et6EKDbKSI RElvv8dGx8jPN7XozZ5A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1thcSz-00000001hQ6-3wmy; Mon, 10 Feb 2025 22:41:25 +0000 Received: from desiato.infradead.org ([2001:8b0:10b:1:d65d:64ff:fe57:4e05]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1thc5v-00000001crE-0tLU for linux-rockchip@bombadil.infradead.org; Mon, 10 Feb 2025 22:17:35 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=In-Reply-To:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=A9MuMo850S9ACN52+1aOF1XZvXFaq2MX/8Fk/4tgDto=; b=pa/eknUvMZfiXHRWEsiSC1NXjN y3LaC8rr+BSLQNjR15CoCBiH7TDaDA2diTtOLFXHv1hrIMSiA8vMKbgheceS7JW/kk99GbmHgDH6+ aCSBeZtdzcj/CMaJJNkCRRQlQ1ymnZN3UUKoYsSxlJ4zkhkeReli5vAF9lSSILMo4BSGvxSqJgY0Q gCp5fmILg3kFtc8q0Ce6enI2rQJQqPijqVVdXM1YsGXhb/2VjK4x1rjmP1pU1MdalBi/Dsc+sIoO9 PLUenw3Agtpqtq34Z6Otpb+pBn5vfxABGA58pCyXc5hNatMvYfu8bRNVC3l508zEsbC9Hj3qGdyuc BZ7X2Vyg==; Received: from mail-lj1-x263.google.com ([2a00:1450:4864:20::263]) by desiato.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1thc5q-00000000JfK-0TC7 for linux-rockchip@lists.infradead.org; Mon, 10 Feb 2025 22:17:34 +0000 Received: by mail-lj1-x263.google.com with SMTP id 38308e7fff4ca-308f71d5efcso7736641fa.3 for ; Mon, 10 Feb 2025 14:17:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=patrick-wildt-de.20230601.gappssmtp.com; s=20230601; t=1739225847; x=1739830647; darn=lists.infradead.org; h=in-reply-to:content-disposition:mime-version:references:message-id :subject:cc:to:from:date:from:to:cc:subject:date:message-id:reply-to; bh=A9MuMo850S9ACN52+1aOF1XZvXFaq2MX/8Fk/4tgDto=; b=nSuMcxQCJGSn+poTh3sGxo8tjJ8ih6cp4eTS+sjRlwohI7zkswqYITsiBTbsnLtP2G e/D4SkfPaLb4xmY7eqFPZGZcJ7+j+fw0KyKa7jePHMFU5vUnyqCVLt4NX0O2O7K8rzQe v+vLXaVOjdk66LdsEtxNL0OCLjdMxauBF9sdc2S6yMWXTCRw7GfrUjCelRsWvc5cDlmI i2IGqiK2jOBVSiAYYn2anhZ3Ymcnq7ieAM+d2mXJvudOSdMVJDE8DpS43POb4BdOdtBC +NMunsJqmPeCSZLihqH3+GZlwiUp5ZVQQXgzbR5BVVEM/AL6XhdiXcFaBMq+doVzYhuJ l5wQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1739225847; x=1739830647; h=in-reply-to:content-disposition:mime-version:references:message-id :subject:cc:to:from:date:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=A9MuMo850S9ACN52+1aOF1XZvXFaq2MX/8Fk/4tgDto=; b=t3u2nlLLmKrOt32BYG2ouCaNo1b2P68sM9GiOiKvYid2k0H56aCVID6Cl4TGWCrwmn GjV+AMoDb/QRNWSmTdVSc7kNhAazdFKTAwMHyEi1/gudXaycTgf/UZKp/2UHeFhw6zr4 esX2kyZEH/WP9aP7mCAoZybUrQ0OnRGmS2fwUYwJ2/jwo/6nyMpPxT0MlSjfGrM3RdwU ATTj3aaPmuTsf8EkRjnw61NzBvDPeprUkx/jEdnxy3XeLumgXjfCCOdo8iXTjQNuKQ74 KHvZBNce5xZOkGjiurB1mPg0DhsRVZRwRpnNmkbgkZZOo/U/w5dcrspNXuqphVDadkij uTRQ== X-Gm-Message-State: AOJu0YwDA/4A6n2A9DRKj2CTw/nCMW8SRGfq0HKUFnLrIINdEuUOKGt/ lORiy+yxOfUFq94WUFXz/oixVGCTLkOMmPU/+y+dDco64FInIrer8vAVnJXH501SKO3NCGfeZYL ekfaUURb4fcXVizReKfD4zikdbLGILMfrykUbSxW9 X-Gm-Gg: ASbGncs1MBqgdcVlr/rpT6BN2xWNdN2u0UtHXInsX/zpVkFVq9BA+pgS4bnWKcGSPZm MM8bOe/oHC6JKkHzX73HVuFQTuku4WeQ26g1osuuZwtaY/sXvL24zHgyVSp6sdw2CuO4Lb4ZV4B cYJb01zKXnCZJvYJaKCKHqx+xBW3WTLsy8fmybLqHLoTSWv2qL1kx3AH5qJ0frCbS8odaTjZB4n D/wNac+cxw/NeqPpkGje9T3Uz/ududkN7ZmuYgAxSGWGAfl5sTIYc1EmoIttx92AZR8dtKMMv9b VeyyscR5rFjUSXIHYRfyc2AuIAbEOMz9 X-Google-Smtp-Source: AGHT+IEeJsYHd/SXheKI3B4X5IJPZpLyAb0vkSV2y7qxNZz9U2a4jlaWGNLpvADF/7fEGlF4Um5w0+8D9yPI X-Received: by 2002:a2e:a808:0:b0:2ff:d49f:dd4b with SMTP id 38308e7fff4ca-307e58029f2mr42421181fa.15.1739225846369; Mon, 10 Feb 2025 14:17:26 -0800 (PST) Received: from windev.fritz.box (pc19f8e2d.dip0.t-ipconnect.de. [193.159.142.45]) by smtp-relay.gmail.com with ESMTPS id 38308e7fff4ca-307de13b396sm2779761fa.2.2025.02.10.14.17.24 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 10 Feb 2025 14:17:26 -0800 (PST) X-Relaying-Domain: blueri.se Date: Mon, 10 Feb 2025 23:17:21 +0100 From: Patrick Wildt To: linux-rockchip@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, Kever Yang , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner Subject: [PATCH v2 2/2] arm64: dts: rockchip: add MNT Reform 2 Message-ID: References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250210_221730_387776_82AACD49 X-CRM114-Status: GOOD ( 14.51 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org MNT Reform 2 is an open source laptop with replaceable CPU modules, including a version with the RK3588-based MNT RCORE[1]: - Rockchip RK3588 - Quad A76 and Quad A55 CPU - 6 TOPS NPU - up to 32GB LPDDR4x RAM - SD Card slot - Gigabit ethernet port - HDMI port - 2x mPCIe ports for WiFi or NVMe - 3x USB 3.0 Type-A HOST port [1] https://shop.mntre.com/products/mnt-reform Signed-off-by: Lukas F. Hartmann Signed-off-by: Patrick Wildt --- Changes for v2: - Aligned with bindings and schemas to appease DTB check warnings. - Aligned with format of other RK3588 boards for consistency. arch/arm64/boot/dts/rockchip/Makefile | 1 + .../boot/dts/rockchip/rk3588-mnt-reform2.dts | 785 ++++++++++++++++++ 2 files changed, 786 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3588-mnt-reform2.dts diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile index def1222c1907..88381d9a20e3 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -145,6 +145,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-firefly-itx-3588j.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-friendlyelec-cm3588-nas.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-h96-max-v58.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-jaguar.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-mnt-reform2.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-nanopc-t6.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-nanopc-t6-lts.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-ok3588-c.dtb diff --git a/arch/arm64/boot/dts/rockchip/rk3588-mnt-reform2.dts b/arch/arm64/boot/dts/rockchip/rk3588-mnt-reform2.dts new file mode 100644 index 000000000000..07c7adbc2c8e --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3588-mnt-reform2.dts @@ -0,0 +1,785 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2021 Rockchip Electronics Co., Ltd. + * Copyright (c) 2024 MNT Research GmbH + * + */ + +/dts-v1/; + +#include +#include +#include +#include +#include +#include "rk3588.dtsi" + +/ { + model = "MNT Reform 2 with RCORE RK3588 Module"; + compatible = "mntre,reform2-rcore", "rockchip,rk3588"; + + aliases { + ethernet0 = &gmac0; + mmc0 = &sdhci; + mmc1 = &sdmmc; + }; + + chosen { + stdout-path = "serial2:1500000n8"; + }; + + backlight: backlight { + compatible = "pwm-backlight"; + pwms = <&pwm8 0 10000 0>; + enable-gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_HIGH>; + brightness-levels = <0 8 16 32 64 128 160 200 255>; + default-brightness-level = <128>; + }; + + gmac0_clkin: external-gmac0-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <125000000>; + clock-output-names = "gmac0_clkin"; + }; + + pcie30_avdd1v8: regulator-pcie30-avdd1v8 { + compatible = "regulator-fixed"; + regulator-name = "pcie30_avdd1v8"; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&avcc_1v8_s0>; + }; + + pcie30_avdd0v75: regulator-pcie30-avdd0v75 { + compatible = "regulator-fixed"; + regulator-name = "pcie30_avdd0v75"; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <750000>; + vin-supply = <&avdd_0v75_s0>; + }; + + vcc12v_dcin: regulator-vcc12v-dcin { + compatible = "regulator-fixed"; + regulator-name = "vcc12v_dcin"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + }; + + vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 { + compatible = "regulator-fixed"; + regulator-name = "vcc_1v1_nldo_s3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + vin-supply = <&vcc5v0_sys>; + }; + + vcc3v3_pcie30: regulator-vcc3v3-pcie30 { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_pcie30"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + vin-supply = <&vcc12v_dcin>; + }; + + vcc5v0_host: regulator-vcc5v0-host { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_host"; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; + + vcc5v0_sys: regulator-vcc5v0-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc12v_dcin>; + }; + + vcc5v0_usb: regulator-vcc5v0-usb { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_usb"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc12v_dcin>; + }; +}; + +&combphy0_ps { + status = "okay"; +}; + +&combphy1_ps { + status = "okay"; +}; + +&combphy2_psu { + status = "okay"; +}; + +&cpu_b0 { + cpu-supply = <&vdd_cpu_big0_s0>; + mem-supply = <&vdd_cpu_big0_s0>; +}; + +&cpu_b1 { + cpu-supply = <&vdd_cpu_big0_s0>; + mem-supply = <&vdd_cpu_big0_s0>; +}; + +&cpu_b2 { + cpu-supply = <&vdd_cpu_big1_s0>; + mem-supply = <&vdd_cpu_big1_s0>; +}; + +&cpu_b3 { + cpu-supply = <&vdd_cpu_big1_s0>; + mem-supply = <&vdd_cpu_big1_s0>; +}; + +&cpu_l0 { + cpu-supply = <&vdd_cpu_lit_s0>; + mem-supply = <&vdd_cpu_lit_mem_s0>; +}; + +&cpu_l1 { + cpu-supply = <&vdd_cpu_lit_s0>; + mem-supply = <&vdd_cpu_lit_mem_s0>; +}; + +&cpu_l2 { + cpu-supply = <&vdd_cpu_lit_s0>; + mem-supply = <&vdd_cpu_lit_mem_s0>; +}; + +&cpu_l3 { + cpu-supply = <&vdd_cpu_lit_s0>; + mem-supply = <&vdd_cpu_lit_mem_s0>; +}; + +&gmac0 { + clock_in_out = "output"; + phy-handle = <&rgmii_phy>; + phy-mode = "rgmii-id"; + pinctrl-names = "default"; + pinctrl-0 = <&gmac0_miim + &gmac0_tx_bus2 + &gmac0_rx_bus2 + &gmac0_rgmii_clk + &gmac0_rgmii_bus + &gmac0_clkinout + ð_phy_reset>; + status = "okay"; +}; + +&gpu { + mali-supply = <&vdd_gpu_s0>; + sram-supply = <&vdd_gpu_mem_s0>; + status = "okay"; +}; + +&hdmi0 { + status = "okay"; +}; + +&hdmi0_in { + hdmi0_in_vp2: endpoint { + remote-endpoint = <&vp2_out_hdmi0>; + }; +}; + +&hdptxphy_hdmi0 { + status = "okay"; +}; + +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0m2_xfer>; + status = "okay"; + + vdd_cpu_big0_s0: regulator@42 { + compatible = "rockchip,rk8602"; + reg = <0x42>; + fcs,suspend-voltage-selector = <1>; + regulator-name = "vdd_cpu_big0_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <1050000>; + regulator-ramp-delay = <2300>; + vin-supply = <&vcc5v0_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_cpu_big1_s0: regulator@43 { + compatible = "rockchip,rk8603", "rockchip,rk8602"; + reg = <0x43>; + fcs,suspend-voltage-selector = <1>; + regulator-name = "vdd_cpu_big1_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <1050000>; + regulator-ramp-delay = <2300>; + vin-supply = <&vcc5v0_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1m2_xfer>; + status = "okay"; + + vdd_npu_s0: regulator@42 { + compatible = "rockchip,rk8602"; + reg = <0x42>; + fcs,suspend-voltage-selector = <1>; + regulator-name = "vdd_npu_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <950000>; + regulator-ramp-delay = <2300>; + vin-supply = <&vcc5v0_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; +}; + +&i2c6 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c6m0_xfer>; + + rtc@68 { + compatible = "nxp,pcf8523"; + reg = <0x68>; + }; +}; + +&pcie2x1l2 { + reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&pcie2_0_rst>; + status = "okay"; +}; + +&pcie30phy { + status = "okay"; +}; + +&pcie3x4 { + pinctrl-names = "default"; + pinctrl-0 = <&pcie3_reset>; + reset-gpios = <&gpio1 RK_PB4 GPIO_ACTIVE_HIGH>; + num-lanes = <1>; + vpcie3v3-supply = <&vcc3v3_pcie30>; + status = "okay"; +}; + +&i2c3 { + status = "okay"; +}; + +&pwm8 { + pinctrl-0 = <&pwm8m2_pins>; + status = "okay"; +}; + +&saradc { + vref-supply = <&avcc_1v8_s0>; + status = "okay"; +}; + +&tsadc { + status = "okay"; +}; + +&sdhci { + bus-width = <8>; + no-sdio; + no-sd; + non-removable; + max-frequency = <150000000>; + mmc-hs400-1_8v; + mmc-hs400-enhanced-strobe; + status = "okay"; +}; + +&sdmmc { + bus-width = <4>; + max-frequency = <40000000>; + no-sdio; + no-mmc; + no-1-8-v; + cap-sd-highspeed; + vqmmc-supply = <&vcc3v3_pcie30>; + vmmc-supply = <&vcc3v3_pcie30>; + cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; + disable-wp; + status = "okay"; +}; + +&spi2 { + assigned-clocks = <&cru CLK_SPI2>; + assigned-clock-rates = <200000000>; + num-cs = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; + status = "okay"; + + pmic@0 { + compatible = "rockchip,rk806"; + reg = <0x0>; + gpio-controller; + #gpio-cells = <2>; + interrupt-parent = <&gpio0>; + interrupts = <7 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, + <&rk806_dvs2_null>, <&rk806_dvs3_null>; + spi-max-frequency = <1000000>; + system-power-controller; + + vcc1-supply = <&vcc5v0_sys>; + vcc2-supply = <&vcc5v0_sys>; + vcc3-supply = <&vcc5v0_sys>; + vcc4-supply = <&vcc5v0_sys>; + vcc5-supply = <&vcc5v0_sys>; + vcc6-supply = <&vcc5v0_sys>; + vcc7-supply = <&vcc5v0_sys>; + vcc8-supply = <&vcc5v0_sys>; + vcc9-supply = <&vcc5v0_sys>; + vcc10-supply = <&vcc5v0_sys>; + vcc11-supply = <&vcc_2v0_pldo_s3>; + vcc12-supply = <&vcc5v0_sys>; + vcc13-supply = <&vcc_1v1_nldo_s3>; + vcc14-supply = <&vcc_1v1_nldo_s3>; + vcca-supply = <&vcc5v0_sys>; + + rk806_dvs1_null: dvs1-null-pins { + pins = "gpio_pwrctrl1"; + function = "pin_fun0"; + }; + + rk806_dvs2_null: dvs2-null-pins { + pins = "gpio_pwrctrl2"; + function = "pin_fun0"; + }; + + rk806_dvs3_null: dvs3-null-pins { + pins = "gpio_pwrctrl3"; + function = "pin_fun0"; + }; + + regulators { + vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 { + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <950000>; + regulator-ramp-delay = <12500>; + regulator-name = "vdd_gpu_s0"; + regulator-enable-ramp-delay = <400>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <950000>; + regulator-ramp-delay = <12500>; + regulator-name = "vdd_cpu_lit_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_log_s0: dcdc-reg3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <675000>; + regulator-max-microvolt = <750000>; + regulator-ramp-delay = <12500>; + regulator-name = "vdd_log_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <750000>; + }; + }; + + vdd_vdenc_s0: dcdc-reg4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <950000>; + regulator-ramp-delay = <12500>; + regulator-name = "vdd_vdenc_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_ddr_s0: dcdc-reg5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <675000>; + regulator-max-microvolt = <950000>; + regulator-ramp-delay = <12500>; + regulator-name = "vdd_ddr_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <850000>; + }; + }; + + vdd2_ddr_s3: dcdc-reg6 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vdd2_ddr_s3"; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_2v0_pldo_s3: dcdc-reg7 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <2000000>; + regulator-max-microvolt = <2000000>; + regulator-name = "vdd_2v0_pldo_s3"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <2000000>; + }; + }; + + vcc_3v3_s3: dcdc-reg8 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc_3v3_s3"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vddq_ddr_s0: dcdc-reg9 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vddq_ddr_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v8_s3: dcdc-reg10 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc_1v8_s3"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + avcc_1v8_s0: pldo-reg1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "avcc_1v8_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v8_s0: pldo-reg2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc_1v8_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + avdd_1v2_s0: pldo-reg3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-name = "avdd_1v2_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_3v3_s0: pldo-reg4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc_3v3_s0"; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vccio_sd_s0: pldo-reg5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vccio_sd_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + pldo6_s3: pldo-reg6 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "pldo6_s3"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vdd_0v75_s3: nldo-reg1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <750000>; + regulator-name = "vdd_0v75_s3"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <750000>; + }; + }; + + vdd_ddr_pll_s0: nldo-reg2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <850000>; + regulator-name = "vdd_ddr_pll_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <850000>; + }; + }; + + avdd_0v75_s0: nldo-reg3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <750000>; + regulator-name = "avdd_0v75_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_0v85_s0: nldo-reg4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <850000>; + regulator-name = "vdd_0v85_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_0v75_s0: nldo-reg5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <750000>; + regulator-name = "vdd_0v75_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + }; +}; + +&mdio0 { + rgmii_phy: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x0>; + }; +}; + +&pinctrl { + dp { + dp1_hpd: dp1-hpd { + rockchip,pins = <1 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pcie2 { + pcie2_0_rst: pcie2-0-rst { + rockchip,pins = <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pcie3 { + pcie3_reset: pcie3-reset { + rockchip,pins = <1 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + eth_phy { + eth_phy_reset: eth-phy-reset { + rockchip,pins = <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&u2phy0 { + status = "okay"; +}; + +&u2phy0_otg { + status = "okay"; +}; + +&u2phy1 { + status = "okay"; +}; + +&u2phy1_otg { + status = "okay"; +}; + +&u2phy2 { + status = "okay"; +}; + +&u2phy2_host { + phy-supply = <&vcc5v0_host>; + status = "okay"; +}; + +&u2phy3 { + status = "okay"; +}; + +&u2phy3_host { + phy-supply = <&vcc5v0_host>; + status = "okay"; +}; + +&uart2 { + pinctrl-0 = <&uart2m0_xfer>; + status = "okay"; +}; + +&usb_host0_ehci { + status = "okay"; +}; + +&usb_host0_ohci { + status = "okay"; +}; + +&usb_host1_ehci { + status = "okay"; +}; + +&usb_host1_ohci { + status = "okay"; +}; + +&usbdp_phy0 { + status = "okay"; +}; + +&usbdp_phy1 { + status = "okay"; +}; + +&usb_host0_xhci { + dr_mode = "host"; + status = "okay"; +}; + +&usb_host1_xhci { + dr_mode = "host"; + status = "okay"; +}; + +&vop_mmu { + status = "okay"; +}; + +&vop { + status = "okay"; +}; + +&vp2 { + vp2_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { + reg = ; + remote-endpoint = <&hdmi0_in_vp2>; + }; +};