From patchwork Mon Feb 10 22:45:08 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Heiko Stuebner X-Patchwork-Id: 13969334 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2166A254B17; Mon, 10 Feb 2025 22:45:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739227530; cv=none; b=ItVPkMJ5r3upM0jx/SlxRBWvk5XMe4NqAoz8RR/X9MgnZ5aRxFmomAtGUjnNqKcuo8QlgMh3H5nuvrJvUUyGPyE3dhe1wqQckRMV9AvIL6ifQNVlK6pPsRBkeiMGhB8rf2IsDKvmq0SXolceKJ7ewMWP+vP/g+zJ0gLmqS03kr0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739227530; c=relaxed/simple; bh=X19WOOPYgP+DuZFchChLeLEFY5CA1hNJzhrLmeGnrWk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=HtEkn7Fw7Pkx91q9lFhlzFGj757l1G7mGdLR7S/PGiMzot+UHiM4X3LMd/Z1Qg+uYCPAMYnAwKGzAgR9T6A6QB2CN21nRK5phZ5kaqbfdGv9K+cRSJEV3IW3fHTfg13Td4faVMERsFRmNuLCxkJEtnU8cLizJUnGI8giwzObAGQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b=Mnqsuejh; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b="Mnqsuejh" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sntech.de; s=gloria202408; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Sender:Reply-To:Content-Type: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=GpXTu8Jl9+ElR55rXNmhyGQY8Q6lpRd3ddRiifaA3MA=; b=MnqsuejhUiY2v0YatPHLxFAs7a iEIOs2TLSk48gPAV4TZ+b2j8GdKgbbeksTaf3iRHeSYKBvduqJJOvY190llWjqReGeH0D4hYQFkT3 fRfbDF47bP5xPDtJECht8XTEfugG3r7cM/4VQX2X09Q9aPLdNqRM2RcVe2o1OJc/whGEsNIAU5Q61 s69KoSKP6j6KIPyqRtWFIJEXmr/dLBfX5O+NuUEwzAcIUO8QqTx6O0t+3TztdzedazA8jctxXpWl1 Di2Lig9tV3dCl1tp21/J9OhXgLYDAtd307izVciWdMfFkHdKXNcTi61OjPQJcpeAdJCbdY5pHZZPa FeNfgNJQ==; Received: from i53875bc0.versanet.de ([83.135.91.192] helo=localhost.localdomain) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1thcWq-0008Re-Cg; Mon, 10 Feb 2025 23:45:24 +0100 From: Heiko Stuebner To: srinivas.kandagatla@linaro.org Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, heiko@sntech.de, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, detlev.casanova@collabora.com, sebastian.reichel@collabora.com Subject: [PATCH RESEND v2 4/6] dt-bindings: nvmem: rockchip,otp: Add compatible for RK3576 Date: Mon, 10 Feb 2025 23:45:08 +0100 Message-ID: <20250210224510.1194963-5-heiko@sntech.de> X-Mailer: git-send-email 2.47.2 In-Reply-To: <20250210224510.1194963-1-heiko@sntech.de> References: <20250210224510.1194963-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Document the OTP memory found on Rockchip RK3576 SoC. The RK3576 uses the same set of clocks as the px30/rk3308 but has one reset more, so adapt the binding to handle this variant as well. Signed-off-by: Heiko Stuebner Acked-by: Conor Dooley --- .../bindings/nvmem/rockchip,otp.yaml | 21 +++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/Documentation/devicetree/bindings/nvmem/rockchip,otp.yaml b/Documentation/devicetree/bindings/nvmem/rockchip,otp.yaml index 3201ff8f9334..dc89020b0950 100644 --- a/Documentation/devicetree/bindings/nvmem/rockchip,otp.yaml +++ b/Documentation/devicetree/bindings/nvmem/rockchip,otp.yaml @@ -14,6 +14,7 @@ properties: enum: - rockchip,px30-otp - rockchip,rk3308-otp + - rockchip,rk3576-otp - rockchip,rk3588-otp reg: @@ -70,6 +71,26 @@ allOf: items: - const: phy + - if: + properties: + compatible: + contains: + enum: + - rockchip,rk3576-otp + then: + properties: + clocks: + maxItems: 3 + clock-names: + maxItems: 3 + resets: + minItems: 2 + maxItems: 2 + reset-names: + items: + - const: otp + - const: apb + - if: properties: compatible: From patchwork Mon Feb 10 22:45:09 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Heiko Stuebner X-Patchwork-Id: 13969335 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5C3E3257422; Mon, 10 Feb 2025 22:45:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739227530; cv=none; b=XIgyj6UdfCxQUVGWuFIL6tWbJVLJKqZ055RywGn4rTvm9Lidb+S38YpTw3pvidChmCTWcGsf611NGKVWRIU9DkHZD/EUjd03tpWrbKoGJyLXhuuF+4YJtNPF5BZGFXi0KUpmBaAinc7roZ+A4oHcrNE1A8TY3U8EJpbBouX4uVg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739227530; c=relaxed/simple; bh=BVJxFp26hQxuOIjb9WU7dvu3gglWDB0wMQRce6wT38g=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=CMDieOmOrvPA7Fn+FXmuyfUdQZD2DhDg+4DJ4WhdLk5oY9KXk8o0Fny6FpSBnzp/KtDfZjCFCCXvIxipchvMp4vVeXfYMnpfm6UHhZ5I21TyHm8tnqdNMJ29wSy45jZuT0eClC30qItmoTDk1a0Vm63+j+jXSc9Lxz/ZUfWL+ew= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b=YqhHgqVH; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b="YqhHgqVH" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sntech.de; s=gloria202408; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Sender:Reply-To:Content-Type: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=x62ijsNCPVrYm4nC3upourBy1Fy9pOeygf/DPMb93sY=; b=YqhHgqVH1KmLYmM/0G8Qrd9shE QrvKslLO7KYJHV7Y5VsxF+kqxmBz0NrRW/VoWvt45H2dm0gOjApe63HT0gmPgGr5xg4ccsYi80k8r 3TY2tNpQBPHPlpNh2p+HKUDtulJK+3Dm0CxBkKGy3xpM2qSn7FNWva7lTJHuav3wx+QhOI+Sym/Yk l7QzHEKP9ICHj8w+wvm38p67E1QLwq6talLoRL5hyegiaBXJ3c2/x/DEbfJXib4IQn96KgTpst02Y BD7QmLQxVPR9t1RcHyeNC9y0yVCqxp050KdLnAps2PcN4Eou+9RzsULU1MsKYJrt67YVvK7jnq/2C LD2Gf2bg==; Received: from i53875bc0.versanet.de ([83.135.91.192] helo=localhost.localdomain) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1thcWq-0008Re-Si; Mon, 10 Feb 2025 23:45:24 +0100 From: Heiko Stuebner To: srinivas.kandagatla@linaro.org Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, heiko@sntech.de, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, detlev.casanova@collabora.com, sebastian.reichel@collabora.com Subject: [PATCH RESEND v2 5/6] nvmem: rockchip-otp: add rk3576 variant data Date: Mon, 10 Feb 2025 23:45:09 +0100 Message-ID: <20250210224510.1194963-6-heiko@sntech.de> X-Mailer: git-send-email 2.47.2 In-Reply-To: <20250210224510.1194963-1-heiko@sntech.de> References: <20250210224510.1194963-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The variant works very similar to the rk3588, just with a different read-offset and size. Signed-off-by: Heiko Stuebner --- drivers/nvmem/rockchip-otp.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/nvmem/rockchip-otp.c b/drivers/nvmem/rockchip-otp.c index 3edfbfc2d722..d88f12c53242 100644 --- a/drivers/nvmem/rockchip-otp.c +++ b/drivers/nvmem/rockchip-otp.c @@ -274,6 +274,14 @@ static const struct rockchip_data px30_data = { .reg_read = px30_otp_read, }; +static const struct rockchip_data rk3576_data = { + .size = 0x100, + .read_offset = 0x700, + .clks = px30_otp_clocks, + .num_clks = ARRAY_SIZE(px30_otp_clocks), + .reg_read = rk3588_otp_read, +}; + static const char * const rk3588_otp_clocks[] = { "otp", "apb_pclk", "phy", "arb", }; @@ -295,6 +303,10 @@ static const struct of_device_id rockchip_otp_match[] = { .compatible = "rockchip,rk3308-otp", .data = &px30_data, }, + { + .compatible = "rockchip,rk3576-otp", + .data = &rk3576_data, + }, { .compatible = "rockchip,rk3588-otp", .data = &rk3588_data, From patchwork Mon Feb 10 22:45:10 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Heiko Stuebner X-Patchwork-Id: 13969336 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DFCC8257ADA; Mon, 10 Feb 2025 22:45:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739227531; cv=none; b=Vskrtmv8nAH3ZnDTGqXfY64O3hmZIGGoA9g+QRC0Ix//LMFJ6G+w6dhASQlAlNqVXf1zn6y9dnx21/vSfC2zX41golhtEACNvHXKt1zdPuxBGFZhrxvp1WbV8pgxe4SfzuosIeB+gcIjNkECPzmxeFe1dIkr/fo25qXlx9Rxsag= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739227531; c=relaxed/simple; bh=w95MJfxzfRGWFOpMQJPgSmIkbW+uGttHTGyC1aMnmdA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=i41zTs1k3mVs+8Y8UK+21TA5FhEUwICDbyYZdikuhvCu+m9DSp6Kp6iRItOXeNVqJIYC57uF+o+cYM0CYYpQtnD+yFlev9oTr8vXuwJfi3ddVLea9t1MqCqUphHm0bN1qxCF0qaGSTz4aSwZPtxD4R6J1nohZp8Gc7EVbRzS6S0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b=Cr23s9de; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b="Cr23s9de" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sntech.de; s=gloria202408; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Sender:Reply-To:Content-Type: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=q4Sl4j7z0914oZOToKd009OuMMVWZTH/qa7XeAPVimQ=; b=Cr23s9depxi0kBcC4raALGKcHz sq9N1ty8NzSvYSLJQrG5nxm7l1Pv9TDBaP3vs/zegJ56U4C4uRdTvlJjEQIXJgXTltEt53S2tkXJY uo/Qc8vjNao2vJcT3Ba2lCR1r55gvrlXESqXQHXR1KbjfgPRYgYE2c+vSzRuCQv8jXz4LntSqmwfL mgYrEBCkEpBQe3CTkjEN4lE+JiP+CIXX0dmdOw3xUMMjvDwNhgPxsm6LxXgLMsUbZJL3xx7iDzOWu qkkJUSvTPQfQrxlvsAqsng9r2o9AKyUrfTnCxjWhXTCfvQefIRsE7+zDW9HtERNfTIvBBPrzOUI9I KLMd6x5w==; Received: from i53875bc0.versanet.de ([83.135.91.192] helo=localhost.localdomain) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1thcWr-0008Re-CF; Mon, 10 Feb 2025 23:45:25 +0100 From: Heiko Stuebner To: srinivas.kandagatla@linaro.org Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, heiko@sntech.de, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, detlev.casanova@collabora.com, sebastian.reichel@collabora.com Subject: [PATCH RESEND v2 6/6] arm64: dts: rockchip: add rk3576 otp node Date: Mon, 10 Feb 2025 23:45:10 +0100 Message-ID: <20250210224510.1194963-7-heiko@sntech.de> X-Mailer: git-send-email 2.47.2 In-Reply-To: <20250210224510.1194963-1-heiko@sntech.de> References: <20250210224510.1194963-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 This adds the otp node to the rk3576 soc devicetree including the individual fields we know about. Signed-off-by: Heiko Stuebner --- arch/arm64/boot/dts/rockchip/rk3576.dtsi | 39 ++++++++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3576.dtsi b/arch/arm64/boot/dts/rockchip/rk3576.dtsi index 4dde954043ef..29b47799849a 100644 --- a/arch/arm64/boot/dts/rockchip/rk3576.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3576.dtsi @@ -1260,6 +1260,45 @@ sdhci: mmc@2a330000 { status = "disabled"; }; + otp: otp@2a580000 { + compatible = "rockchip,rk3576-otp"; + reg = <0x0 0x2a580000 0x0 0x400>; + #address-cells = <1>; + #size-cells = <1>; + clocks = <&cru CLK_OTPC_NS>, <&cru PCLK_OTPC_NS>, + <&cru CLK_OTP_PHY_G>; + clock-names = "otp", "apb_pclk", "phy"; + resets = <&cru SRST_OTPC_NS>, <&cru SRST_P_OTPC_NS>; + reset-names = "otp", "apb"; + + /* Data cells */ + cpu_code: cpu-code@2 { + reg = <0x02 0x2>; + }; + otp_cpu_version: cpu-version@5 { + reg = <0x05 0x1>; + bits = <3 3>; + }; + otp_id: id@a { + reg = <0x0a 0x10>; + }; + cpub_leakage: cpub-leakage@1e { + reg = <0x1e 0x1>; + }; + cpul_leakage: cpul-leakage@1f { + reg = <0x1f 0x1>; + }; + npu_leakage: npu-leakage@20 { + reg = <0x20 0x1>; + }; + gpu_leakage: gpu-leakage@21 { + reg = <0x21 0x1>; + }; + log_leakage: log-leakage@22 { + reg = <0x22 0x1>; + }; + }; + gic: interrupt-controller@2a701000 { compatible = "arm,gic-400"; reg = <0x0 0x2a701000 0 0x10000>,