From patchwork Tue Feb 11 15:19:13 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?QmVuY2UgQ3PDs2vDoXM=?= X-Patchwork-Id: 13969500 Received: from fw2.prolan.hu (fw2.prolan.hu [193.68.50.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4DED925A2C0; Tue, 11 Feb 2025 15:21:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.68.50.107 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739287294; cv=none; b=Y69r55Jqr8FlsVOej75R41mMYIqyVE+TS2jOkr7mY7OAbSRP3M7VMZ66qPR5HF63jcnovAsV83XqJZt8Lp0Pm14+ET88scdgzAL2SwmcgNzIBTDYvU1FmbZzubSI7wrIgAJvpCiSjQsLu69HS03fcShwmrZxvVNVqcVL3rTSk3k= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739287294; c=relaxed/simple; bh=nXd9jDD+UBXvLWmFoVYPSxR6JJw5p4FcvxMKng9Zjr0=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; 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c=relaxed/relaxed; d=prolan.hu; h=cc :cc:content-transfer-encoding:content-type:content-type:date :from:from:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=mail; bh=eGN8HCKpPLICbDQqrP0r Fs4LLz4Nm9uBjPVU6M1vIWE=; b=oof6vXAG5k9mxF8yySy3LgsazAGSbGdVVleQ x4NRkSwWSK2SQXFmnN/ppH8gQiEZHLZqW39vTmJ6NXtdHLvNXhV7AGn6itj2BL9Y pGTWzjk8XiBZMdsvLJjIM6VWtOJmqQywkDcIPvGFDusP/ZNuUWnNOLX5E0ZToEsm 3vC2KVD94+PA1ItirPgBmjyakK1Y6LHxz33E0R6gyiTtXwofUdXgvfGy0fkJnVR2 1JMm0CnZlcg/m1n/8TeLjn8rHVjOy+JoBi6PtesiPEom83bS/bD/gJugOlvFkKyF zKPG4+O2pN+Jv6yWTkYafhcx384tyXv4CVDb5p9SUdv83eVatDFbJcC4vgFfwK0T MkJLwM8F4vdxWdCPRih5iAIpOpkw0J+hDeQtgGxei07xsTJlteurVW8/vS0vHy/7 637Fv9CVijWQfpl4IL/y6tu2cqsCaSWtpXrhl0lkece1aZcRwojcdW0Ft4XJsVIN sYOBNup/uydc25XBBzjm2zjueAULHuo71AgiJS4mG1SmICqk6mjfS9tdiRw4mQ5F f5QRWNZQFmepwgL6bfifdhAdXcRDRF9ElSILMGk/l3dLIQTav/3wTgG/IaC1cKiQ RtLL9LqEz2lSohSiy0jRa4dTpNhVebaf1TbnrSSsJ2BCeoAv5XZQKTqOk7K745bu z0BO5lE= From: =?utf-8?b?QmVuY2UgQ3PDs2vDoXM=?= To: , , CC: =?utf-8?b?QmVuY2UgQ3PDs2vDoXM=?= , , Kamel Bouhara , "William Breathitt Gray" Subject: [PATCH v4 1/2] counter: microchip-tcb-capture: Add IRQ handling Date: Tue, 11 Feb 2025 16:19:13 +0100 Message-ID: <20250211151914.313585-5-csokas.bence@prolan.hu> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250211151914.313585-3-csokas.bence@prolan.hu> References: <20250211151914.313585-3-csokas.bence@prolan.hu> Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ESET-AS: R=OK;S=0;OP=CALC;TIME=1739287289;VERSION=7985;MC=2055640490;ID=778525;TRN=0;CRV=0;IPC=;SP=0;SIPS=0;PI=3;F=0 X-ESET-Antispam: OK X-EsetResult: clean, is OK X-EsetId: 37303A2980D94852617160 Add interrupt servicing to allow userspace to wait for the following events: * Change-of-state caused by external trigger * Capture of timer value into RA/RB * Compare to RC register * Overflow Signed-off-by: Bence Csókás --- Notes: New in v2 Changes in v3: * Add IRQs for Capture events (from next patch) * Add IRQ for RC Compare * Add events as bullet points to commit msg Changes in v4: * Add uapi header, names for the event channels * Add check for -EPROBE_DEFER from `of_irq_get()` MAINTAINERS | 1 + drivers/counter/microchip-tcb-capture.c | 75 +++++++++++++++++++ .../linux/counter/microchip-tcb-capture.h | 40 ++++++++++ 3 files changed, 116 insertions(+) create mode 100644 include/uapi/linux/counter/microchip-tcb-capture.h diff --git a/MAINTAINERS b/MAINTAINERS index 8e047e20fbd8..0a8ce24ff467 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -15579,6 +15579,7 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) L: linux-iio@vger.kernel.org S: Maintained F: drivers/counter/microchip-tcb-capture.c +F: include/uapi/linux/counter/microchip-tcb-capture.c MICROCHIP USB251XB DRIVER M: Richard Leitner diff --git a/drivers/counter/microchip-tcb-capture.c b/drivers/counter/microchip-tcb-capture.c index 2f096a5b973d..cc12c2e2113a 100644 --- a/drivers/counter/microchip-tcb-capture.c +++ b/drivers/counter/microchip-tcb-capture.c @@ -6,18 +6,24 @@ */ #include #include +#include #include #include #include #include +#include #include #include +#include #include #define ATMEL_TC_CMR_MASK (ATMEL_TC_LDRA_RISING | ATMEL_TC_LDRB_FALLING | \ ATMEL_TC_ETRGEDG_RISING | ATMEL_TC_LDBDIS | \ ATMEL_TC_LDBSTOP) +#define ATMEL_TC_DEF_IRQS (ATMEL_TC_ETRGS | ATMEL_TC_COVFS | \ + ATMEL_TC_LDRAS | ATMEL_TC_LDRBS | ATMEL_TC_CPCS) + #define ATMEL_TC_QDEN BIT(8) #define ATMEL_TC_POSEN BIT(9) @@ -27,6 +33,7 @@ struct mchp_tc_data { int qdec_mode; int num_channels; int channel[2]; + int irq; }; static const enum counter_function mchp_tc_count_functions[] = { @@ -294,6 +301,65 @@ static const struct of_device_id atmel_tc_of_match[] = { { /* sentinel */ } }; +static irqreturn_t mchp_tc_isr(int irq, void *dev_id) +{ + struct counter_device *const counter = dev_id; + struct mchp_tc_data *const priv = counter_priv(counter); + u32 sr, mask; + + regmap_read(priv->regmap, ATMEL_TC_REG(priv->channel[0], SR), &sr); + regmap_read(priv->regmap, ATMEL_TC_REG(priv->channel[0], IMR), &mask); + + sr &= mask; + if (!(sr & ATMEL_TC_ALL_IRQ)) + return IRQ_NONE; + + if (sr & ATMEL_TC_ETRGS) + counter_push_event(counter, COUNTER_EVENT_CHANGE_OF_STATE, + COUNTER_MCHP_EVCHN_CV); + if (sr & ATMEL_TC_LDRAS) + counter_push_event(counter, COUNTER_EVENT_CAPTURE, + COUNTER_MCHP_EVCHN_RA); + if (sr & ATMEL_TC_LDRBS) + counter_push_event(counter, COUNTER_EVENT_CAPTURE, + COUNTER_MCHP_EVCHN_RB); + if (sr & ATMEL_TC_CPCS) + counter_push_event(counter, COUNTER_EVENT_THRESHOLD, + COUNTER_MCHP_EVCHN_RC); + if (sr & ATMEL_TC_COVFS) + counter_push_event(counter, COUNTER_EVENT_OVERFLOW, + COUNTER_MCHP_EVCHN_CV); + + return IRQ_HANDLED; +} + +static void mchp_tc_irq_remove(void *ptr) +{ + struct mchp_tc_data *priv = ptr; + + regmap_write(priv->regmap, ATMEL_TC_REG(priv->channel[0], IDR), ATMEL_TC_DEF_IRQS); +} + +static int mchp_tc_irq_enable(struct counter_device *const counter) +{ + struct mchp_tc_data *const priv = counter_priv(counter); + int ret = devm_request_irq(counter->parent, priv->irq, mchp_tc_isr, 0, + dev_name(counter->parent), counter); + + if (ret < 0) + return ret; + + ret = regmap_write(priv->regmap, ATMEL_TC_REG(priv->channel[0], IER), ATMEL_TC_DEF_IRQS); + if (ret < 0) + return ret; + + ret = devm_add_action_or_reset(counter->parent, mchp_tc_irq_remove, priv); + if (ret < 0) + return ret; + + return 0; +} + static void mchp_tc_clk_remove(void *ptr) { clk_disable_unprepare((struct clk *)ptr); @@ -378,6 +444,15 @@ static int mchp_tc_probe(struct platform_device *pdev) counter->num_signals = ARRAY_SIZE(mchp_tc_count_signals); counter->signals = mchp_tc_count_signals; + priv->irq = of_irq_get(np->parent, 0); + if (priv->irq == -EPROBE_DEFER) + return -EPROBE_DEFER; + if (priv->irq > 0) { + ret = mchp_tc_irq_enable(counter); + if (ret < 0) + return dev_err_probe(&pdev->dev, ret, "Failed to set up IRQ"); + } + ret = devm_counter_add(&pdev->dev, counter); if (ret < 0) return dev_err_probe(&pdev->dev, ret, "Failed to add counter\n"); diff --git a/include/uapi/linux/counter/microchip-tcb-capture.h b/include/uapi/linux/counter/microchip-tcb-capture.h new file mode 100644 index 000000000000..b91d8954f06e --- /dev/null +++ b/include/uapi/linux/counter/microchip-tcb-capture.h @@ -0,0 +1,40 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ +/* + * Channel numbers used by the microchip-tcb-capture driver + * Copyright (C) 2025 Bence Csókás + */ +#ifndef _UAPI_COUNTER_MCHP_TCB_H_ +#define _UAPI_COUNTER_MCHP_TCB_H_ + +/* + * The driver defines the following components: + * + * Count 0 + * \__ Synapse 0 -- Signal 0 (Channel A, i.e. TIOA) + * \__ Synapse 1 -- Signal 1 (Channel B, i.e. TIOB) + * + * It also supports the following events: + * + * Channel 0: + * - CV register changed + * - CV overflowed + * - RA captured + * Channel 1: + * - RB captured + * Channel 2: + * - RC compare triggered + */ + +enum counter_mchp_signals { + COUNTER_MCHP_SIG_TIOA, + COUNTER_MCHP_SIG_TIOB, +}; + +enum counter_mchp_event_channels { + COUNTER_MCHP_EVCHN_CV = 0, + COUNTER_MCHP_EVCHN_RA = 0, + COUNTER_MCHP_EVCHN_RB, + COUNTER_MCHP_EVCHN_RC, +}; + +#endif /* _UAPI_COUNTER_MCHP_TCB_H_ */ From patchwork Tue Feb 11 15:19:15 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?QmVuY2UgQ3PDs2vDoXM=?= X-Patchwork-Id: 13969501 Received: from fw2.prolan.hu (fw2.prolan.hu [193.68.50.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4F8D425332B; Tue, 11 Feb 2025 15:21:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.68.50.107 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739287305; cv=none; b=Wksh+IU0dXthbTuZkuEr8tAUhl13II2MsjQrXO+EMnndVuIuIo7D2r679Y7cmU3zfKrgfOn7jmyBDRgHaYTJqTqQw6Sae+8kSDY41R3N7X95HQN/dkN1J0InpN7Gym9dFruK4lgpJ1v3LkhnKdZSqsM8YRV0LYNGEZPU2AgGG8M= ARC-Message-Signature: i=1; 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Tue, 11 Feb 2025 16:21:41 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=prolan.hu; h=cc :cc:content-transfer-encoding:content-type:content-type:date :from:from:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=mail; bh=lnd07H6K+00qVcWwkSgQ RGOualEQLbdZn+x//xQ7Mmg=; b=FPFj6iAr5CU+JBBscEX1n0uy+yx+lEAonj+v 2zw2W4hL5lJtZ2nravuyVwLZGoBLRpDMGt/zbnYBX0zKu+nZctQrcfMuEE05zY6x Hvn/lIg5OgenPiqx1d5+4tdM5LFbd0trQCXHHlhlyK5MQbdakaTMlqjEoezv4vPe iT60+rzfj7hYDfNO1CHxcT5TnbKF/HYFC9lcydls3JDIvFSAzQgi1/lgIh/MVP2O TEbUsbq9dLybLyfRXmhENSeZFdMEK1kBf4j90uvXWJdahefi7EBk7AeBvV0vqxrk Ut208byCxGEjByjJvQ62OMq1vHWbG7eaLsc8l1yKxjvSz2BM6y5n6JneYBJxnyoG T+vv4HPTO7SJz6TF6hMPByr0CVoBsZdSvgGc9iWZ8m/XvDeqzDdhVZk/vavhY0h5 X42icnZJuUU5Y66TwuBa/ouFxtibV3uxoOAl16K0RuRS8B/oRWACGp5GdbOyiUVp Bez3bCP00I2NgAupoDo9U9C5eY2/HmaHVFqxeNpzeW2Tcc6KmwwDBUfcl71oGG7o sN7nxuTGha0oaCz5m/WIZ0/X1tbjjcX8z7CDl6d9izqhNkFJ748Tt1NSeFo229vE lkVC3E2IkC1Ph5OnLh69/4wP+RsgH3X1CVc3Q6U1bXWfzCiap9JSiDTI7bnor2+B SopXbyI= From: =?utf-8?b?QmVuY2UgQ3PDs2vDoXM=?= To: , , CC: =?utf-8?b?QmVuY2UgQ3PDs2vDoXM=?= , , Kamel Bouhara , "William Breathitt Gray" Subject: [PATCH v4 2/2] counter: microchip-tcb-capture: Add capture extensions for registers RA-RC Date: Tue, 11 Feb 2025 16:19:15 +0100 Message-ID: <20250211151914.313585-7-csokas.bence@prolan.hu> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250211151914.313585-3-csokas.bence@prolan.hu> References: <20250211151914.313585-3-csokas.bence@prolan.hu> Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ESET-AS: R=OK;S=0;OP=CALC;TIME=1739287300;VERSION=7985;MC=3490347217;ID=762887;TRN=0;CRV=0;IPC=;SP=0;SIPS=0;PI=3;F=0 X-ESET-Antispam: OK X-EsetResult: clean, is OK X-EsetId: 37303A29ACD94852617160 TCB hardware is capable of capturing the timer value to registers RA and RB. On top, it is capable of triggering on compare against a third register, RC. Add these registers as extensions. Signed-off-by: Bence Csókás --- Notes: Changes in v2: * Add IRQs Changes in v3: * Move IRQs to previous patch Changes in v4: * Return the status of the regmap_*() operations * Add names for the extension numbers drivers/counter/microchip-tcb-capture.c | 62 +++++++++++++++++++ .../linux/counter/microchip-tcb-capture.h | 9 +++ 2 files changed, 71 insertions(+) diff --git a/drivers/counter/microchip-tcb-capture.c b/drivers/counter/microchip-tcb-capture.c index cc12c2e2113a..369f69aaf14f 100644 --- a/drivers/counter/microchip-tcb-capture.c +++ b/drivers/counter/microchip-tcb-capture.c @@ -254,6 +254,66 @@ static int mchp_tc_count_read(struct counter_device *counter, return 0; } +static int mchp_tc_count_cap_read(struct counter_device *counter, + struct counter_count *count, size_t idx, u64 *val) +{ + struct mchp_tc_data *const priv = counter_priv(counter); + u32 cnt; + int ret; + + switch (idx) { + case COUNTER_MCHP_EXCAP_RA: + ret = regmap_read(priv->regmap, ATMEL_TC_REG(priv->channel[0], RA), &cnt); + break; + case COUNTER_MCHP_EXCAP_RB: + ret = regmap_read(priv->regmap, ATMEL_TC_REG(priv->channel[0], RB), &cnt); + break; + case COUNTER_MCHP_EXCAP_RC: + ret = regmap_read(priv->regmap, ATMEL_TC_REG(priv->channel[0], RC), &cnt); + break; + default: + return -EINVAL; + } + + if (!ret) + *val = cnt; + + return ret; +} + +static int mchp_tc_count_cap_write(struct counter_device *counter, + struct counter_count *count, size_t idx, u64 val) +{ + struct mchp_tc_data *const priv = counter_priv(counter); + int ret; + + if (val > U32_MAX) + return -ERANGE; + + switch (idx) { + case COUNTER_MCHP_EXCAP_RA: + ret = regmap_write(priv->regmap, ATMEL_TC_REG(priv->channel[0], RA), val); + break; + case COUNTER_MCHP_EXCAP_RB: + ret = regmap_write(priv->regmap, ATMEL_TC_REG(priv->channel[0], RB), val); + break; + case COUNTER_MCHP_EXCAP_RC: + ret = regmap_write(priv->regmap, ATMEL_TC_REG(priv->channel[0], RC), val); + break; + default: + return -EINVAL; + } + + return ret; +} + +static DEFINE_COUNTER_ARRAY_CAPTURE(mchp_tc_cnt_cap_array, 3); + +static struct counter_comp mchp_tc_count_ext[] = { + COUNTER_COMP_ARRAY_CAPTURE(mchp_tc_count_cap_read, mchp_tc_count_cap_write, + mchp_tc_cnt_cap_array), +}; + static struct counter_count mchp_tc_counts[] = { { .id = 0, @@ -262,6 +322,8 @@ static struct counter_count mchp_tc_counts[] = { .num_functions = ARRAY_SIZE(mchp_tc_count_functions), .synapses = mchp_tc_count_synapses, .num_synapses = ARRAY_SIZE(mchp_tc_count_synapses), + .ext = mchp_tc_count_ext, + .num_ext = ARRAY_SIZE(mchp_tc_count_ext), }, }; diff --git a/include/uapi/linux/counter/microchip-tcb-capture.h b/include/uapi/linux/counter/microchip-tcb-capture.h index b91d8954f06e..0bef1c9d1535 100644 --- a/include/uapi/linux/counter/microchip-tcb-capture.h +++ b/include/uapi/linux/counter/microchip-tcb-capture.h @@ -12,6 +12,9 @@ * Count 0 * \__ Synapse 0 -- Signal 0 (Channel A, i.e. TIOA) * \__ Synapse 1 -- Signal 1 (Channel B, i.e. TIOB) + * \__ Extension capture0 (RA register) + * \__ Extension capture1 (RB register) + * \__ Extension capture2 (RC register) * * It also supports the following events: * @@ -30,6 +33,12 @@ enum counter_mchp_signals { COUNTER_MCHP_SIG_TIOB, }; +enum counter_mchp_capture_extensions { + COUNTER_MCHP_EXCAP_RA, + COUNTER_MCHP_EXCAP_RB, + COUNTER_MCHP_EXCAP_RC, +}; + enum counter_mchp_event_channels { COUNTER_MCHP_EVCHN_CV = 0, COUNTER_MCHP_EVCHN_RA = 0,