From patchwork Tue Feb 11 19:54:26 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alyssa Rosenzweig X-Patchwork-Id: 13970646 X-Patchwork-Delegate: kw@linux.com Received: from out-178.mta0.migadu.com (out-178.mta0.migadu.com [91.218.175.178]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 598A4265617 for ; Tue, 11 Feb 2025 19:54:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.178 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739303680; cv=none; b=tNrIXr513lhDopTiOKNShldZPXLML1GHx0MpHkWyEMDlyGx9DoGRXirVJAie1dxTTwOzY2839VCrqqcDQ8rnKe5eIdh6VVvCmHbXzD4l8E9ZRaPvaqOHdPKDJdMnvVSjEru9wAYygg68BgyaN/fIcPyVgFPdWCjjv1CEG/6Hc+8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739303680; c=relaxed/simple; bh=pFpf8dL5ADZfvFnoqSP2NvXLSTIOTz1Wa6whLoN7LuU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=EJZsmsADnjiwVa+Q+3DbUK32hIsbUD7NK1fA8gPT7nZF9DnoTDTfM48Cn9HSccWD+VIOEe0kwv/p613ewNvWU7Tsg3fBaw0Fz1nerf+4SpIF/lS28L+iSfhYXEZywRQTqgjLimWa/HJb94+bVNBFDaxEt47mFLj6TXxFRWfXw4Q= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=rosenzweig.io; spf=pass smtp.mailfrom=rosenzweig.io; dkim=pass (2048-bit key) header.d=rosenzweig.io header.i=@rosenzweig.io header.b=c+gXPHYR; arc=none smtp.client-ip=91.218.175.178 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=rosenzweig.io Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rosenzweig.io Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=rosenzweig.io header.i=@rosenzweig.io header.b="c+gXPHYR" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rosenzweig.io; s=key1; t=1739303676; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=9z3aAv8IagfPXTqvWHznNbHWmTyNuVAlNgwMD8bOopE=; b=c+gXPHYRXLFvGM7DA1cUyWXIsY1fL2QlNrQv+qo+cy+YuIKJRaYQmfX5TXPD9S25GhPzgI rGD9XAFOgED3gMWGl7QVBFwXlPx9kRiFE4vrbdSi2mUluO4paEZf0ZU8D/K9hVJYxoREFR THXO9Tw8To2Slxj7abSFgSI5GqN55ZFInxWkenTCtYKHqhMcDppzvIIjHKlHjv3Xw2etCw hbWRSAl+Nkbpf3hPkCahb9CVLVEwNzl18JuWnuqa5x31DN3O56wg+7i6k+8l4yERRZfjTc T6CmwO46lScEVf4lNT+y4gV+u75X3UdoT6hbt8Mfrnv5Sc7JkBB+MMssNcma7g== From: Alyssa Rosenzweig Date: Tue, 11 Feb 2025 14:54:26 -0500 Subject: [PATCH 1/7] dt-bindings: pci: apple,pcie: Add t6020 support Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250211-pcie-t6-v1-1-b60e6d2501bb@rosenzweig.io> References: <20250211-pcie-t6-v1-0-b60e6d2501bb@rosenzweig.io> In-Reply-To: <20250211-pcie-t6-v1-0-b60e6d2501bb@rosenzweig.io> To: Hector Martin , Sven Peter , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Manivannan Sadhasivam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Mark Kettenis , Marc Zyngier , Stan Skowronek Cc: asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Alyssa Rosenzweig X-Developer-Signature: v=1; a=openpgp-sha256; l=788; i=alyssa@rosenzweig.io; h=from:subject:message-id; bh=pFpf8dL5ADZfvFnoqSP2NvXLSTIOTz1Wa6whLoN7LuU=; b=owEBbQKS/ZANAwAIAf7+UFoK9VgNAcsmYgBnq6r1TeeVHZs1Xd12TSUBL6/EGOnx4tDyU6cMg OlYJ/9tK9yJAjMEAAEIAB0WIQRDXuCbsK8A0B2q9jj+/lBaCvVYDQUCZ6uq9QAKCRD+/lBaCvVY DdKxD/9rD0CnxsgdepfE6OswMxwTF4VjruMeWCA6bEaPLzpHPU+237FDLpVVWeJGnkDpLOY/r5I kS1dAHlEFPfwD7jwwqmW6Kwx/5COt5GE0RcDDxjdGY7GX9Tw16alajpKqqSLGgRUlpYc1sMl+Kj E84JOrk3z4uutDS5oqCZw458sRgEUmjcKfh1dkA4/MuLkMlj+ADav6JCr2lgcHrZIb/CBixPbFs dAbGIJJ6ePr9fpTrXVZj4LUxMljCTi009B2EW3vnfSRe5cdlpjGsR5uc7fJw9K3ByFldsaHgbLI 1lMcYf1FDm/c1dJAunf02CSgi1ZWUIvMFyAoyUGQXGpNyTUyeLdKfYTh+SdUBiLuIZzl0OcbXau kgEMnXqTpmJU0xuKtLhLrdybTkFid/9frs0dZJUsXuxi0R2R6n3jEiNODLsc3+tQsfJoTpMg1RB xAFSs0lGmPRWyDNSLRbMUDf4Pe3K43WEs39uj96bf/7O0WKOh49SoHirE+XrjJXijK/g1HGUwbh watKZzg7cNHN957cBKH+nAzA1Gvmd6e0H9zSm2GRmLd+J7nXktn6xKTzqwTnDQSYJm69Mbw8k3n DILYGrbsxTSfbe2VpH8DgRq1f46+Ca6I1lTdFrDRlSpvKXCd1l2dR05A9CJXxajvwUzTbFZRiuB Z/CfA9cCixoB9iQ== X-Developer-Key: i=alyssa@rosenzweig.io; a=openpgp; fpr=435EE09BB0AF00D01DAAF638FEFE505A0AF5580D X-Migadu-Flow: FLOW_OUT This shuffles some registers versus t6000, so requires a new compatible. Signed-off-by: Alyssa Rosenzweig Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/pci/apple,pcie.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/pci/apple,pcie.yaml b/Documentation/devicetree/bindings/pci/apple,pcie.yaml index c8775f9cb071339dfa6f17f9f4a99f031c98b70a..4885788ff623eebe6a79bccc0f8a9a231a01c5ca 100644 --- a/Documentation/devicetree/bindings/pci/apple,pcie.yaml +++ b/Documentation/devicetree/bindings/pci/apple,pcie.yaml @@ -35,6 +35,7 @@ properties: - apple,t8103-pcie - apple,t8112-pcie - apple,t6000-pcie + - apple,t6020-pcie - const: apple,pcie reg: From patchwork Tue Feb 11 19:54:27 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alyssa Rosenzweig X-Patchwork-Id: 13970647 X-Patchwork-Delegate: kw@linux.com Received: from out-185.mta0.migadu.com (out-185.mta0.migadu.com [91.218.175.185]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 361D226563B for ; Tue, 11 Feb 2025 19:54:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.185 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739303683; cv=none; b=IP4JiZB7r7llPpc6TCnHTVIVO9y3Ara+yZLdeWvtVnLA8e+XRo7EK390AfitO4I/0toY1jKSsTIkmgzppiL1Wdxbn5tV6gCGXNtUGvwuhsQN564dc102QeYDYxa/4JYhuhnvUfzRgg0hpMSgzZ89u2pcsYympBzG5XW4TxSFaIs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739303683; c=relaxed/simple; bh=yl+USkLKEMh9QsdKOr60k5N73ynmCqgb8FX+a+0tI1Y=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=hCPwQeGkVnpkJRnMfHUu0u4PFMTGZ6KF56TffljTn0beT5FUBG2lfmm1Y/J9dJadKUqEM8R8UE6ZL6xhV7T0xjYVmYzcrAfJiH0Ba7aq9Hfbt90+Ppfy2GOFO2ZhFhSgKLCwzfKohnAfeouHnfL8FRFZmQQGzshEHqE4rLwGFTA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=rosenzweig.io; spf=pass smtp.mailfrom=rosenzweig.io; dkim=pass (2048-bit key) header.d=rosenzweig.io header.i=@rosenzweig.io header.b=pDEX3FAD; arc=none smtp.client-ip=91.218.175.185 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=rosenzweig.io Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rosenzweig.io Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=rosenzweig.io header.i=@rosenzweig.io header.b="pDEX3FAD" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rosenzweig.io; s=key1; t=1739303679; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=94QHz8s3x5xn+pO8rBCK3/IvZxkKB7/6zt01u+1XuTM=; b=pDEX3FADIaxZqP3isL/WiMyLef1K4xb9sxTX7LRopb4HsNgAR6VYntUTm4OhNJ6V1ZqCNO uRYkF0RR5WbaKAGWRZf0N4RBMib6cjbYWFRN2szniy9IE5gOEFvi3QKUUUPaLwqCnTVkLk uwE1XS1V2ldcaUQox8EDq9meAxiOAzzyf6OBL+ztG0B9Kfq64Rxg14wzyleimmABWnutSC vk+UcuDyDm0AwrQn5e3ID5G9o4UYqfJ4B02UukNqbXvB6+81OHaVZwtsW89fbEqBeaQebz +d+TQmBvQ4Sbnpv/GABq7Qe3WUu1BwkOfS8rhvJeqcuFgO5bLcdwsGCmonkLKA== From: Alyssa Rosenzweig Date: Tue, 11 Feb 2025 14:54:27 -0500 Subject: [PATCH 2/7] PCI: apple: Fix missing OF node reference in apple_pcie_setup_port Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250211-pcie-t6-v1-2-b60e6d2501bb@rosenzweig.io> References: <20250211-pcie-t6-v1-0-b60e6d2501bb@rosenzweig.io> In-Reply-To: <20250211-pcie-t6-v1-0-b60e6d2501bb@rosenzweig.io> To: Hector Martin , Sven Peter , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Manivannan Sadhasivam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Mark Kettenis , Marc Zyngier , Stan Skowronek Cc: asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Alyssa Rosenzweig X-Developer-Signature: v=1; a=openpgp-sha256; l=946; i=alyssa@rosenzweig.io; h=from:subject:message-id; bh=br8u3Lwb/VWy9zwnA4KwWQFXuGukXNpIxSbrSFqjuw4=; b=owEBbQKS/ZANAwAIAf7+UFoK9VgNAcsmYgBnq6r1lSpZWagAS4cG/cY2wbT3jejBBZIBmSm+c HyLBDRftpiJAjMEAAEIAB0WIQRDXuCbsK8A0B2q9jj+/lBaCvVYDQUCZ6uq9QAKCRD+/lBaCvVY DTX/EACUiHlwws8oozaS9C1v7YbZPWIKXIdhfYeASI4iF7fyekhYgal15Vnzf/jqgkN2Ma7vARE LOc23fkA9UBb0ydPBMRvOH3PyMzd1LZkrVTgBKkPqp0PN6o8XOB3MBdR2h2OB97ijw0rhJ0gds4 yvE2X2F428EGB7LFX3/RAO9RhmZm54WpYy1ZMlh5UpLWKPi7NV1mErTYOs7ED2dFcaGOlg/ZekL 1iFMNMmDCOX1vO0d1lFOl3/DGkoGmbCJlcATohXlsMfTApneIyUj92wmNUVgXjL/PEuLxFRTLcp a2Qr0qUK8disAbWvUQ+EFhvkc4qheHUaU5qukpSfTZdg81aznoVxSO4p44h5ihIDBr4KZlJLGaw 0kAElwx+RZyQ/SSLjdgX+CAPxkC8Ir7MULoIX/t8LdWvXqk3NJJDxV4pFbnr8Z0KgD+URZXM5TL IulEHFmdkqEP3ZtmqqJg45zrTdWy2gZkGKhj4L9goQyTTaQt7w9fKaWX+rQqxqFkwvv86Ad6+NY eyO8G5FagnpQJhjyqGBPKP53Gb63LmTNX/coWpXY4H3AsyeIFJD7DERYM42A0EIsplFeZa0hE5O SkmOz4ly5bDySc1nGE5VoKjQm/sJO7S2u4WOXmbRktKy5xJedSE7dGzkJGdlZzQac/4heXHon3X Nb1lCU+DOd7WJow== X-Developer-Key: i=alyssa@rosenzweig.io; a=openpgp; fpr=435EE09BB0AF00D01DAAF638FEFE505A0AF5580D X-Migadu-Flow: FLOW_OUT From: Hector Martin In the success path we hang onto a reference to the node, so make sure to grab one. The caller iterator puts our borrowed reference when we return. Signed-off-by: Hector Martin Signed-off-by: Alyssa Rosenzweig --- drivers/pci/controller/pcie-apple.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/pci/controller/pcie-apple.c b/drivers/pci/controller/pcie-apple.c index a7e51bc1c2fe8ec31902816e9be6749b756ec77d..8ea3e258fe2768a33ec56f0a8a86d168ed615973 100644 --- a/drivers/pci/controller/pcie-apple.c +++ b/drivers/pci/controller/pcie-apple.c @@ -584,6 +584,9 @@ static int apple_pcie_setup_port(struct apple_pcie *pcie, list_add_tail(&port->entry, &pcie->ports); init_completion(&pcie->event); + /* In the success path, we keep a reference to np around */ + of_node_get(np); + ret = apple_pcie_port_register_irqs(port); WARN_ON(ret); From patchwork Tue Feb 11 19:54:28 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alyssa Rosenzweig X-Patchwork-Id: 13970648 X-Patchwork-Delegate: kw@linux.com Received: from out-175.mta0.migadu.com (out-175.mta0.migadu.com [91.218.175.175]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1C60326561B for ; Tue, 11 Feb 2025 19:54:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.175 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739303685; cv=none; b=li3+TJoIpMa8nfblNh0dBYE/b3qzq64zfL+cD+uWDYg81lrmp0k40uOdb/hN+27ymElokvnmMC6QRY2d5+CnnPuS1cp5W5ZYIPej8/t03z28GIZk7bygftJR61o5gntjNcGpG8Y+33HjCd5/3xXOoZp6HBrm8pUIbGEqRyveiL0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739303685; c=relaxed/simple; bh=cRC6Mm9xvEF3QPvD9hkNc+NlaqTFkpFSLSGHFnrodP0=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=GQgoZFqi3wQQqjfeaZmq+gBOGyU+LtEryf4/w7NFMdBYFlDOHH/dPqEXhzEualPFgMa1F+hJktRstZ7LRdvFz6X8iuA8ys4FV5thj2eB+OjLiBWagUH/hUk/hUynYwtqTcOhOEhRRTi/7l4kjLzQRpqDB/nG81iYzN+p68JqUOI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=rosenzweig.io; spf=pass smtp.mailfrom=rosenzweig.io; dkim=pass (2048-bit key) header.d=rosenzweig.io header.i=@rosenzweig.io header.b=NPj1gyI8; arc=none smtp.client-ip=91.218.175.175 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=rosenzweig.io Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rosenzweig.io Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=rosenzweig.io header.i=@rosenzweig.io header.b="NPj1gyI8" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rosenzweig.io; s=key1; t=1739303682; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=KETb6jUJDsIFYbLNfZswJFm0D8g4KXETeYZ9lpgFSZU=; b=NPj1gyI8ZymeuCqAhTbAbmYWvMnmfdxaADDxf9VoSVNMZ/at+eh/gHVHOFI/90EF3c2cQR UpbhkH4mQ+2HDpvCv0mtW86NI74Jvgjp99AHOFdUpur+LkYa5ISGw8G64MkGroTiuWl6Re W9JOwR8FVPmDlDmb5TnRoxof5qYy8tpZZ+S9uhN++aqd5Huo7O4g5i+sgmWfXIGD89GpeX 701q+NNVX3Dnh/fBV8FMuQXpdxuUY+iHMWcyZfIoFahCiLEuvCy0JrpN310AafK458hE4G 0YDj0/4ckIC+r6RM1DOogk2xor7BIhKlzviztDwQGL9NohnTgX0gtrG0jGhOZw== From: Alyssa Rosenzweig Date: Tue, 11 Feb 2025 14:54:28 -0500 Subject: [PATCH 3/7] PCI: apple: Set only available ports up Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250211-pcie-t6-v1-3-b60e6d2501bb@rosenzweig.io> References: <20250211-pcie-t6-v1-0-b60e6d2501bb@rosenzweig.io> In-Reply-To: <20250211-pcie-t6-v1-0-b60e6d2501bb@rosenzweig.io> To: Hector Martin , Sven Peter , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Manivannan Sadhasivam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Mark Kettenis , Marc Zyngier , Stan Skowronek Cc: asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Alyssa Rosenzweig , Janne Grunau , stable@vger.kernel.org X-Developer-Signature: v=1; a=openpgp-sha256; l=1354; i=alyssa@rosenzweig.io; h=from:subject:message-id; bh=VQa9ECNMV5dQ+VPNHGrM6EfNjLD7vuIHAEUchvK/Y2A=; b=owEBbQKS/ZANAwAIAf7+UFoK9VgNAcsmYgBnq6r1foBi9YRZrXcHVAkQvYeTVMv9aps9Nidwj jtblZ/PGlCJAjMEAAEIAB0WIQRDXuCbsK8A0B2q9jj+/lBaCvVYDQUCZ6uq9QAKCRD+/lBaCvVY DSxzD/9rBloDn6QBlNmK/61u1BJgVi4Dw6MNkUXbiP98cvMYhll8U+3HoGG8yje/h8NueaqDxBZ 8iP89Scdg69/sCTU4EHBf2a3+uWS+8SSRmiDxJliskEzJ+xyG8f7MzPb2WLxuGbF/pspBm9RiFH kiiQ8Wi+HkS0oN0F5lMjc1cxcrW2O5DgfxSDsTbWfegmDfCH6R1GXnUMwpTfWYwI/fBCR4OSjh+ 1LdU3dGSC6wZvuv4ng2YlieS5f0N/jJU9keKq9al2kCkzr/mgSJun8TN9a0JT8N46JAgDWKKFzH OCJKtf0GHw+5cniAd6LP9AN6VMUNzaWoEqeNd3f2PGPa6qPG/Mu4lOLFi9ECzHLxuvlG9an0IwO G2eVoAGIsHtUgG5NOrGP0RgDzZLkBGFFGGK/ynQIISN0p9xHdTs+k814S/TcRkGtfnI7oQNMj1y OdXCBxhvJPRP4vIk6EPse1/RT7L1cjixTsNr6oF5UeSPn8sAv6PXP4wHuDQeSDYWQaSF7lVL2KA xlKEYjmy0GHMPdvJ6H2sROdftJIb0+SFabsQrHHwheitA0idvHkS2IOjBLm/38Rsz0ggNXJQnpT R1vJ23PAlTArB9RESOINl6YJO4RDnW4yYepnCILX4aHcFhOQ6U6GYCepgdR1PzurcaAUmeh6F03 uh9EHFESSald4pA== X-Developer-Key: i=alyssa@rosenzweig.io; a=openpgp; fpr=435EE09BB0AF00D01DAAF638FEFE505A0AF5580D X-Migadu-Flow: FLOW_OUT From: Janne Grunau Fixes "interrupt-map" parsing in of_irq_parse_raw() which takes the node's availability into account. This became apparent after disabling unused PCIe ports in the Apple silicon device trees instead of disabling them. Link: https://lore.kernel.org/asahi/20230214-apple_dts_pcie_disable_unused-v1-0-5ea0d3ddcde3@jannau.net/ Link: https://lore.kernel.org/asahi/1ea2107a-bb86-8c22-0bbc-82c453ab08ce@linaro.org/ Fixes: 1e33888fbe44 ("PCI: apple: Add initial hardware bring-up") Cc: stable@vger.kernel.org Signed-off-by: Janne Grunau Signed-off-by: Alyssa Rosenzweig --- drivers/pci/controller/pcie-apple.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pci/controller/pcie-apple.c b/drivers/pci/controller/pcie-apple.c index 8ea3e258fe2768a33ec56f0a8a86d168ed615973..958cf459d4c64dffa1f993e57b7a58cfb2199b8f 100644 --- a/drivers/pci/controller/pcie-apple.c +++ b/drivers/pci/controller/pcie-apple.c @@ -758,7 +758,7 @@ static int apple_pcie_init(struct pci_config_window *cfg) if (ret) return ret; - for_each_child_of_node(dev->of_node, of_port) { + for_each_available_child_of_node(dev->of_node, of_port) { ret = apple_pcie_setup_port(pcie, of_port); if (ret) { dev_err(pcie->dev, "Port %pOF setup fail: %d\n", of_port, ret); From patchwork Tue Feb 11 19:54:29 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alyssa Rosenzweig X-Patchwork-Id: 13970650 X-Patchwork-Delegate: kw@linux.com Received: from out-183.mta0.migadu.com (out-183.mta0.migadu.com [91.218.175.183]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F0A8B2641C3 for ; Tue, 11 Feb 2025 19:54:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.183 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739303688; cv=none; b=om5PwjYAT63f+OdgjfWxdtrVm778CRxpeU4Qz3ZE64YayIvITvhsqEWWzE09pdTgxFOq4XXPu98meYiv5dUtVD5KETHbwOVWXyqsZaqRRhB2N9lxfs2Rv4fAo3gTMr8pRc0Zqt2F6TtS94KPbZKwiG16W1YjH4SL3K1CLEm4HxE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739303688; c=relaxed/simple; bh=evSzVy4TRIqrGWVSEbIbvZOoeJKoVhbPp7EMTz7edvY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=XvN6CV3u/F4qSkGstUz+6/Bb0oWMrz7xOWIuSGi0zm9iP7xOzKHhb58ZN7U2c2t0mjkADH86qgEMlAz/IKIW9UK87gVBtMgBkKPFkPcymjGGLbSKU6tuRLttADiwMgrKwvzhJYPwfAQUkB+QsNkvQajdcaEjWY7jL0LaQYO32f8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=rosenzweig.io; spf=pass smtp.mailfrom=rosenzweig.io; dkim=pass (2048-bit key) header.d=rosenzweig.io header.i=@rosenzweig.io header.b=WAV47Fv5; arc=none smtp.client-ip=91.218.175.183 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=rosenzweig.io Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rosenzweig.io Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=rosenzweig.io header.i=@rosenzweig.io header.b="WAV47Fv5" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rosenzweig.io; s=key1; t=1739303684; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Pj4w2leCnY/nj4Xl2+RPpzvbfj+hrlWDBqoX2zhbX4Y=; b=WAV47Fv5coixIPh40DlrjI71Eq2UE+VFWRb6xZwNZtFAD1xQYEM1YywP237pxCdsgS93un JkOD5klQGvgNks1BaiVC1Jp8vEoHQonyzzb/cOv5ziiw3zuJvfaVu3Y9bpnu/+85zmu8Yo A4PxdAgNSTfQurQHGeOGPCMYg9WdZ4nvVLaQHYNk85hW41vlMf7Ok0MaKWMmyfXsfBSd43 t2iuJAKQp7WUI/D3MTHjzyKrCedBNMGILmWavt96sgWQd1pEWeLFc9Hj7yRWLpndDPwZjQ BrZhr7rC87/XYNbFbZrS8NU17dFORc9USZYHKnNJJ+CD4pR1VqGSw4h3I6igTg== From: Alyssa Rosenzweig Date: Tue, 11 Feb 2025 14:54:29 -0500 Subject: [PATCH 4/7] PCI: apple: Move port PHY registers to their own reg items Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250211-pcie-t6-v1-4-b60e6d2501bb@rosenzweig.io> References: <20250211-pcie-t6-v1-0-b60e6d2501bb@rosenzweig.io> In-Reply-To: <20250211-pcie-t6-v1-0-b60e6d2501bb@rosenzweig.io> To: Hector Martin , Sven Peter , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Manivannan Sadhasivam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Mark Kettenis , Marc Zyngier , Stan Skowronek Cc: asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Alyssa Rosenzweig , Janne Grunau X-Developer-Signature: v=1; a=openpgp-sha256; l=5194; i=alyssa@rosenzweig.io; h=from:subject:message-id; bh=c4UQnZ1yNlclQoJA6wxg/GcH8AshzfypyEZtc8NzpfA=; b=owEBbQKS/ZANAwAIAf7+UFoK9VgNAcsmYgBnq6r28yiuwKDywRkuV4aqnNe+dXu92ZsWlKTPV s6mWRrrVkqJAjMEAAEIAB0WIQRDXuCbsK8A0B2q9jj+/lBaCvVYDQUCZ6uq9gAKCRD+/lBaCvVY DVVnEACeJNc9vIWHJBSk0ckG+ZbgcKCacOEMIvWjDMQ6lAQFlSky2E1m1vfg8Zj6rEg0bVuW+Gm MTgqZ+D5kXP81x1f1npaL7un3sQFAXo6bk2e/lY9u9bnnkrRZ4wVbReZvDX3TO0wrYSLeBku3fz v3vzc5MfRe8kKPOH1Ovhhf/sC6bnPqHoW8CkeaVGNq/+hItn+A5lto1kegEmGnLc4/EInaj3ngE HredW4OIJPQh6uobM3fsOIx3IGbZhrCkgZ/tG1LB5tTVfPwLv75WFP0oX4rv6CD9Li152t4uaGt A395PMZ/VAPB2bqlX9w2eaPnC/NF05xReZRt0AmqzgtT1LRaH2jmWSGKm/jtxWfvKjHMWmue3rs JsDCwPp5x8jLnkpDLfjYMX13xB/Ockv4Gdiq//YTIMssmM1UFgmqqzAfsPcMZUpBTH8dDqIYnoI jENd9oafevAryp1zy/vOVoRpotyM1qG+DZs4qVIGqyzbhtbZtHAHN9VMYzs2uzYp3F7csVkbF9h HeUklORh5bRQXwoCUW31DbdLqRV2nWYruQcK75gjPprDElzbfoIJLW1ha/dYs4btKRpU7+V72iP vOdNLksJxugD40vStmwGFF8IBMxleIPnFqwwo4+F/Egb4XNlEgVNhFqgvuwPMN/+gN/KMBODfDM OgnIfSHt+eKc4LA== X-Developer-Key: i=alyssa@rosenzweig.io; a=openpgp; fpr=435EE09BB0AF00D01DAAF638FEFE505A0AF5580D X-Migadu-Flow: FLOW_OUT From: Hector Martin T602x PCIe cores move these registers around. Instead of hardcoding in another offset, let's move them into their own reg entries. This matches what Apple does on macOS device trees too. Maintains backwards compatibility with old DTs by using the old offsets. Note that we open code devm_platform_ioremap_resource_byname() to avoid error messages on older platforms with missing resources in the pcie node. ("pcie-apple 590000000.pcie: invalid resource (null)" on probe) Co-developed-by: Janne Grunau Signed-off-by: Janne Grunau Signed-off-by: Hector Martin Signed-off-by: Alyssa Rosenzweig --- drivers/pci/controller/pcie-apple.c | 55 +++++++++++++++++++++++++------------ 1 file changed, 37 insertions(+), 18 deletions(-) diff --git a/drivers/pci/controller/pcie-apple.c b/drivers/pci/controller/pcie-apple.c index 958cf459d4c64dffa1f993e57b7a58cfb2199b8f..806eeb911bbd4f1ae5832b34f775fa18c866670b 100644 --- a/drivers/pci/controller/pcie-apple.c +++ b/drivers/pci/controller/pcie-apple.c @@ -39,14 +39,18 @@ #define CORE_RC_STAT_READY BIT(0) #define CORE_FABRIC_STAT 0x04000 #define CORE_FABRIC_STAT_MASK 0x001F001F -#define CORE_LANE_CFG(port) (0x84000 + 0x4000 * (port)) -#define CORE_LANE_CFG_REFCLK0REQ BIT(0) -#define CORE_LANE_CFG_REFCLK1REQ BIT(1) -#define CORE_LANE_CFG_REFCLK0ACK BIT(2) -#define CORE_LANE_CFG_REFCLK1ACK BIT(3) -#define CORE_LANE_CFG_REFCLKEN (BIT(9) | BIT(10)) -#define CORE_LANE_CTL(port) (0x84004 + 0x4000 * (port)) -#define CORE_LANE_CTL_CFGACC BIT(15) + +#define CORE_PHY_DEFAULT_BASE(port) (0x84000 + 0x4000 * (port)) + +#define PHY_LANE_CFG 0x00000 +#define PHY_LANE_CFG_REFCLK0REQ BIT(0) +#define PHY_LANE_CFG_REFCLK1REQ BIT(1) +#define PHY_LANE_CFG_REFCLK0ACK BIT(2) +#define PHY_LANE_CFG_REFCLK1ACK BIT(3) +#define PHY_LANE_CFG_REFCLKEN (BIT(9) | BIT(10)) +#define PHY_LANE_CFG_REFCLKCGEN (BIT(30) | BIT(31)) +#define PHY_LANE_CTL 0x00004 +#define PHY_LANE_CTL_CFGACC BIT(15) #define PORT_LTSSMCTL 0x00080 #define PORT_LTSSMCTL_START BIT(0) @@ -145,6 +149,7 @@ struct apple_pcie_port { struct apple_pcie *pcie; struct device_node *np; void __iomem *base; + void __iomem *phy; struct irq_domain *domain; struct list_head entry; DECLARE_BITMAP(sid_map, MAX_RID2SID); @@ -473,26 +478,26 @@ static int apple_pcie_setup_refclk(struct apple_pcie *pcie, if (res < 0) return res; - rmw_set(CORE_LANE_CTL_CFGACC, pcie->base + CORE_LANE_CTL(port->idx)); - rmw_set(CORE_LANE_CFG_REFCLK0REQ, pcie->base + CORE_LANE_CFG(port->idx)); + rmw_set(PHY_LANE_CTL_CFGACC, port->phy + PHY_LANE_CTL); + rmw_set(PHY_LANE_CFG_REFCLK0REQ, port->phy + PHY_LANE_CFG); - res = readl_relaxed_poll_timeout(pcie->base + CORE_LANE_CFG(port->idx), - stat, stat & CORE_LANE_CFG_REFCLK0ACK, + res = readl_relaxed_poll_timeout(port->phy + PHY_LANE_CFG, + stat, stat & PHY_LANE_CFG_REFCLK0ACK, 100, 50000); if (res < 0) return res; - rmw_set(CORE_LANE_CFG_REFCLK1REQ, pcie->base + CORE_LANE_CFG(port->idx)); - res = readl_relaxed_poll_timeout(pcie->base + CORE_LANE_CFG(port->idx), - stat, stat & CORE_LANE_CFG_REFCLK1ACK, + rmw_set(PHY_LANE_CFG_REFCLK1REQ, port->phy + PHY_LANE_CFG); + res = readl_relaxed_poll_timeout(port->phy + PHY_LANE_CFG, + stat, stat & PHY_LANE_CFG_REFCLK1ACK, 100, 50000); if (res < 0) return res; - rmw_clear(CORE_LANE_CTL_CFGACC, pcie->base + CORE_LANE_CTL(port->idx)); + rmw_clear(PHY_LANE_CTL_CFGACC, port->phy + PHY_LANE_CTL); - rmw_set(CORE_LANE_CFG_REFCLKEN, pcie->base + CORE_LANE_CFG(port->idx)); + rmw_set(PHY_LANE_CFG_REFCLKEN, port->phy + PHY_LANE_CFG); rmw_set(PORT_REFCLK_EN, port->base + PORT_REFCLK); return 0; @@ -512,8 +517,10 @@ static int apple_pcie_setup_port(struct apple_pcie *pcie, struct platform_device *platform = to_platform_device(pcie->dev); struct apple_pcie_port *port; struct gpio_desc *reset; + struct resource *res; u32 stat, idx; int ret, i; + char name[16]; reset = devm_fwnode_gpiod_get(pcie->dev, of_fwnode_handle(np), "reset", GPIOD_OUT_LOW, "PERST#"); @@ -533,10 +540,22 @@ static int apple_pcie_setup_port(struct apple_pcie *pcie, port->pcie = pcie; port->np = np; - port->base = devm_platform_ioremap_resource(platform, port->idx + 2); + snprintf(name, sizeof(name), "port%d", port->idx); + res = platform_get_resource_byname(platform, IORESOURCE_MEM, name); + if (res) + port->base = devm_ioremap_resource(&platform->dev, res); + else + port->base = devm_platform_ioremap_resource(platform, port->idx + 2); if (IS_ERR(port->base)) return PTR_ERR(port->base); + snprintf(name, sizeof(name), "phy%d", port->idx); + res = platform_get_resource_byname(platform, IORESOURCE_MEM, name); + if (res) + port->phy = devm_ioremap_resource(&platform->dev, res); + else + port->phy = pcie->base + CORE_PHY_DEFAULT_BASE(port->idx); + rmw_set(PORT_APPCLK_EN, port->base + PORT_APPCLK); /* Assert PERST# before setting up the clock */ From patchwork Tue Feb 11 19:54:30 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alyssa Rosenzweig X-Patchwork-Id: 13970651 X-Patchwork-Delegate: kw@linux.com Received: from out-187.mta0.migadu.com (out-187.mta0.migadu.com [91.218.175.187]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6A7E826562A for ; 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DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rosenzweig.io; s=key1; t=1739303687; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=tvMzFvDFPtNYc9beeiDGU1QfzgA0X8H/s3MjLPK83/s=; b=xzz1DCD+FgNmcew4nFWLGjYQFCe6sA/KdgUUqLpzSUt/rVZxxKiUOqy/svVsjOYt+xalNc b5YmIlV3Lp3B1CbeAT8KesfeYujrLuPGOQ+iOlUe6oXY5IEFsVGuLCkIr9xCPokU7VYi8D RiEYC6twxK57MfnQysTn+iJaQqpGzx/SNkUWguQQ2dNUyVkTMmBSPv91QxaBvKCIxnui6L +0wJCWCnyXFKfxDQuVfyvzbh9oEJFSrqUsA4dcrudKgEqApNVwSPfKIqGvzTbl/MS9x71P 6AG0bxHFkpwFj38uaoOpwTx7wQFHwASWJAdJIblBqa6VMIAOSeZ9lTTFCsxpwA== From: Alyssa Rosenzweig Date: Tue, 11 Feb 2025 14:54:30 -0500 Subject: [PATCH 5/7] PCI: apple: Drop poll for CORE_RC_PHYIF_STAT_REFCLK Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250211-pcie-t6-v1-5-b60e6d2501bb@rosenzweig.io> References: <20250211-pcie-t6-v1-0-b60e6d2501bb@rosenzweig.io> In-Reply-To: <20250211-pcie-t6-v1-0-b60e6d2501bb@rosenzweig.io> To: Hector Martin , Sven Peter , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Manivannan Sadhasivam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Mark Kettenis , Marc Zyngier , Stan Skowronek Cc: asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Alyssa Rosenzweig X-Developer-Signature: v=1; a=openpgp-sha256; l=1050; i=alyssa@rosenzweig.io; h=from:subject:message-id; bh=PXCtvv5N3o1ijghyFwcjjiYtA4dsCcCo/zzcFKCevKk=; b=owEBbQKS/ZANAwAIAf7+UFoK9VgNAcsmYgBnq6r28PCvGN2V+WHKUhGyarStlr41tcudnZ4dQ HvrlQVn2XOJAjMEAAEIAB0WIQRDXuCbsK8A0B2q9jj+/lBaCvVYDQUCZ6uq9gAKCRD+/lBaCvVY Dbj7EACMcBHDuzhazrjCZuOERME9/KkzaAPLCGa0fd3dYJCK+QaS12j3u8D/lYk3EG01TwqvOAN BWDWE8iSmcW0ewo61p2NbdmyabmMA2EKewdDsrt/1+SVwd/ntYv4737LIcHp9OkrCKTP2BRCV0x UvEPG8ZZXvS3Re4spQB9qn5Ke07KReBKO/iDfzogMEq1LN3z71RI6e1HLcBtWBKF8zQoXhsEE5D oq57PxA3WF5OPxQzgZNVVdIjrdHoaZ5o+xbZbCcuZa3tCqHBJ5ArzTSMNNsn9saOeiNCsar6ZYZ FW4nllMh9LOamx+DCMTlJHiEn/TOr6/KYRFGCnUInmhNwfbBQaQo/ysulv9XXNL3V7SJEcDdEkz IDjYbtRU95ua9kDZJ0FeMwWr7QjMS7D7fWxVRqmnRcHFdcLIT6RRPhvs5w425SpiGCkKqn3jF5N CfRI0ApM/sKjFEFgRYJ7d/ToBVIC8JlHD/u+ppPR++qpe5/xuU9I+739xPAqojxE1tZ9Qj2RIcR HatGJszXFASmiKwQeRxU2VGp+iWN5pc9I8ebm7wJ5WWOw2peN56Nyq6AR1Dti+k3G3sMpFRGCkk eEAmlhwJmyfIvYDUFejCIfkU4tgAvhzp7bm9n7fnAUrTbuzTokwxCgqw5H9ilj9Qj5xSGZXVHZz xroFVy45lDiCe5A== X-Developer-Key: i=alyssa@rosenzweig.io; a=openpgp; fpr=435EE09BB0AF00D01DAAF638FEFE505A0AF5580D X-Migadu-Flow: FLOW_OUT From: Hector Martin This is checking a core refclk in per-port setup which doesn't make a lot of sense, and the bootloader needs to have gone through this anyway. It doesn't work on T602x, so just drop it across the board. Signed-off-by: Alyssa Rosenzweig --- drivers/pci/controller/pcie-apple.c | 6 ------ 1 file changed, 6 deletions(-) diff --git a/drivers/pci/controller/pcie-apple.c b/drivers/pci/controller/pcie-apple.c index 806eeb911bbd4f1ae5832b34f775fa18c866670b..209535db7855fa1ee0d75290b33525dce18f560d 100644 --- a/drivers/pci/controller/pcie-apple.c +++ b/drivers/pci/controller/pcie-apple.c @@ -472,12 +472,6 @@ static int apple_pcie_setup_refclk(struct apple_pcie *pcie, u32 stat; int res; - res = readl_relaxed_poll_timeout(pcie->base + CORE_RC_PHYIF_STAT, stat, - stat & CORE_RC_PHYIF_STAT_REFCLK, - 100, 50000); - if (res < 0) - return res; - rmw_set(PHY_LANE_CTL_CFGACC, port->phy + PHY_LANE_CTL); rmw_set(PHY_LANE_CFG_REFCLK0REQ, port->phy + PHY_LANE_CFG); From patchwork Tue Feb 11 19:54:31 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alyssa Rosenzweig X-Patchwork-Id: 13970652 X-Patchwork-Delegate: kw@linux.com Received: from out-184.mta0.migadu.com (out-184.mta0.migadu.com [91.218.175.184]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 87604264F96 for ; Tue, 11 Feb 2025 19:54:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.184 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739303695; cv=none; b=otCTORKcXYBlgIYG4NRKLs0aoMBWbpb8LaFXiRg4xBs8mIgWAXzJmNFAODhHnTv3Om8sHlzA5P1m7dpj/EFypHMvvSEw28mdqpQG2zl+xFtTpJbsdPRkMqlbLd/FbLb9PdMQtv0Z70MBXI0iu+k6mSWTiBFEfb9JZmyJatVHwcY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739303695; c=relaxed/simple; bh=xd1/gSsSOX0c4PDs8eFFwC5Q/yKRU7zGuUmYDaZ+aRw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=PpiuWSTvs/ckq7Pmsgw5SnJRZkLmCldI2N4Xns++B1jdltMcaKHbekWjqzWXoZkBTE1FDKFajTiGzkSoVF9Nu7STyik0THrN7x+S6iMqfRLYkfruHTfej0hyqLWwK6Ijsffyi6oq/3TbJu+vhETDjwF/rlRBg4Z2XLnfjgP3KV4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=rosenzweig.io; spf=pass smtp.mailfrom=rosenzweig.io; dkim=pass (2048-bit key) header.d=rosenzweig.io header.i=@rosenzweig.io header.b=eleVucTA; arc=none smtp.client-ip=91.218.175.184 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=rosenzweig.io Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rosenzweig.io Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=rosenzweig.io header.i=@rosenzweig.io header.b="eleVucTA" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rosenzweig.io; s=key1; t=1739303690; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=8c1c9c+jF/PV1jw8NDHsbVdhxY5rat61pZm6lsNJS64=; b=eleVucTA6Y/Aq+KS/KuUhMfrZ/8vSFdBN3OlWrWdHHpBU0ghk49P3xQYdUjDxAGBU+0HrJ J2abXR3zsIU58AiKOvZgYMjsLdzaOfmdYmW4SV3ELBhWfTB3p/TfBIOZ8sI13LkcX4kLBm EZJWGlmrWK+vOnD/No3/g3Y2Dw6IvujzqRpUTh7M74Jd15+p6fis+55+5e0XuWNVJOd2M/ TviuwO3e63iiVfBXr5xPUkfifLz1M7d48S8S1Y9kHmasxFpkyuC8MHtOAzi2SdgD6iXxVk 0O8dt1e+2qFLlZf4G5n5hSITxwOD4lalNZqtrqGFIzrz8PxJNm2w6+e6Yw0a3w== From: Alyssa Rosenzweig Date: Tue, 11 Feb 2025 14:54:31 -0500 Subject: [PATCH 6/7] PCI: apple: Use gpiod_set_value_cansleep in probe flow Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250211-pcie-t6-v1-6-b60e6d2501bb@rosenzweig.io> References: <20250211-pcie-t6-v1-0-b60e6d2501bb@rosenzweig.io> In-Reply-To: <20250211-pcie-t6-v1-0-b60e6d2501bb@rosenzweig.io> To: Hector Martin , Sven Peter , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Manivannan Sadhasivam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Mark Kettenis , Marc Zyngier , Stan Skowronek Cc: asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Alyssa Rosenzweig X-Developer-Signature: v=1; a=openpgp-sha256; l=1317; i=alyssa@rosenzweig.io; h=from:subject:message-id; bh=tkJEj/YQzRh1expKxGHWwtdYnql3z/mkcCDS+zSX2Ic=; b=owEBbQKS/ZANAwAIAf7+UFoK9VgNAcsmYgBnq6r2StvxCY5TXwIMlIs4Iw+P0DiN0ayir0EJ6 KQ/HmRUygiJAjMEAAEIAB0WIQRDXuCbsK8A0B2q9jj+/lBaCvVYDQUCZ6uq9gAKCRD+/lBaCvVY DdzkD/4/L/bBMDYggvde1Eqx824QWWfDu44UG+t80LZZu/TviEIF84g+m2pAxfFuMTlnUZoDFQC 67aPjwjeOJKhz9cUDs8w4axQz/gXMfQB98a1yoEe5TImHVKYixY2XJBVfxNrWIjPRVSNs112AOx dPEVRbijgncjlJU5han4ojOiqMJNAlzaTb7qGlvXsklXYx0HEUzGmEQOl+6N6/ewJdEdUUWhUE4 it3WQPd8VLHwEvpGdKvd5NAKkL0kS0zjsRpcF6eVIPEFMDp+lB9G+c6rdaUsBT2bGDk0QZO+n0W LsXI9b7GVw3YaBRjxVubuX5vyRy31oL0WUo+pIfg6mdxFo+LxElJlaZY38E+FmIyyb/hl4P0Ct/ 9VINkr1gZs5U3O0YV5fiTRmlKSNmraf1M94W3SYIPnXJnpqwQlA+xpNuM0nj1eYXPFGdUPFmvJ1 BWgFLJsIKL+Ryl4RBdSq19Gi1ePnHxj3u3QUzNEpf7KXKsD42TgjV0S+tuFbrJGik1NGblXa3nt Dg+QXvHhJsPEfmwaMul17292CtsQsAhnLB1YfgWrndsNWspwgKAYq0LnH3RRZjmtecMW6rNR4y2 8lvFr1vzSeknF6ePm2IputGPoX/LIrujpVmdgFOEz9yn/74FWvotzIAzEH/HVsPquELrOygZDAn Qjf8FoVwZwUwoVQ== X-Developer-Key: i=alyssa@rosenzweig.io; a=openpgp; fpr=435EE09BB0AF00D01DAAF638FEFE505A0AF5580D X-Migadu-Flow: FLOW_OUT From: Hector Martin We're allowed to sleep here, so tell the GPIO core by using gpiod_set_value_cansleep instead of gpiod_set_value. Fixes: 1e33888fbe44 ("PCI: apple: Add initial hardware bring-up") Signed-off-by: Hector Martin Signed-off-by: Alyssa Rosenzweig --- drivers/pci/controller/pcie-apple.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/pci/controller/pcie-apple.c b/drivers/pci/controller/pcie-apple.c index 209535db7855fa1ee0d75290b33525dce18f560d..7f4839fb0a5b15a9ca87337f53c14a1ce08301fc 100644 --- a/drivers/pci/controller/pcie-apple.c +++ b/drivers/pci/controller/pcie-apple.c @@ -553,7 +553,7 @@ static int apple_pcie_setup_port(struct apple_pcie *pcie, rmw_set(PORT_APPCLK_EN, port->base + PORT_APPCLK); /* Assert PERST# before setting up the clock */ - gpiod_set_value(reset, 1); + gpiod_set_value_cansleep(reset, 1); ret = apple_pcie_setup_refclk(pcie, port); if (ret < 0) @@ -564,7 +564,7 @@ static int apple_pcie_setup_port(struct apple_pcie *pcie, /* Deassert PERST# */ rmw_set(PORT_PERST_OFF, port->base + PORT_PERST); - gpiod_set_value(reset, 0); + gpiod_set_value_cansleep(reset, 0); /* Wait for 100ms after PERST# deassertion (PCIe r5.0, 6.6.1) */ msleep(100); From patchwork Tue Feb 11 19:54:32 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alyssa Rosenzweig X-Patchwork-Id: 13970653 X-Patchwork-Delegate: kw@linux.com Received: from out-178.mta0.migadu.com (out-178.mta0.migadu.com [91.218.175.178]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2DCF1264FB0 for ; Tue, 11 Feb 2025 19:54:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.178 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739303697; cv=none; b=A/Q+2L1+rGPAzCEg3oidja671toKi6opCLp85f/qaN4/Vw06izrbOrCuHCkhAKGtFzmYl6xB24AvTevtRAy5z3uqaIGdVUNem0OooYjtmZEZoG/eihG+c3dGDqXYbU4vTw6tEw5j7hA0b5s74R3c3WZ2JJ3D/ksrthlFqx+s+Ss= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739303697; c=relaxed/simple; bh=/4aY8e4/EKwBSViCWWmVA8tLgFhQVwQ316OFmbEHQ60=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=i5/ApWipkA77LhnB+QamRG0PDAyM6qE2av7J2sjaSVDmmvcS7oDSUH2iyJwi1OemxfKUOQi9TbcAbJ0H4EahswjLokh0vpPQUpShIbUdhM2rmP5VtazET25396/Q1LZuc/IqGcfrenvpJbGj90QYS1ySUvN4fDPmadSK422oFDc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=rosenzweig.io; spf=pass smtp.mailfrom=rosenzweig.io; dkim=pass (2048-bit key) header.d=rosenzweig.io header.i=@rosenzweig.io header.b=anqR4Pu7; arc=none smtp.client-ip=91.218.175.178 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=rosenzweig.io Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rosenzweig.io Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=rosenzweig.io header.i=@rosenzweig.io header.b="anqR4Pu7" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rosenzweig.io; s=key1; t=1739303693; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=3Hn9eo3mxMwP4PHVPqNLPOJKyU8EeYRHxTKZoXnCY/s=; b=anqR4Pu7xBGTHCgc47nmaM24QW1F2Hjf0dSUtRWszaMtJNJyIhDaplvItl2K4CzN2GvsXd LfWsV03wWFz39eoJZeJY5kJLyA5Q5wwpbmASPjuu3PxpSjlhUtIZY1MroOa/8Sg969Idxp KSWMEAzRM/XKNF9h5xOLRQchUVIpgG0pWyvgfsaJJ7CD0P98idnU7BwEcuILbha0buTl+L D//7o736krUM/9b1H7c6Y7ATFUXJmcx321hYvyP1X7x0WFewr3Lo6xYCgNk+z8V4aXKXHs maZnjkdl3M6PePzcrBr9W/WzIVOBgQEJICsgUVv6Vorlb8Y4cvSDQmqRTBv9MA== From: Alyssa Rosenzweig Date: Tue, 11 Feb 2025 14:54:32 -0500 Subject: [PATCH 7/7] PCI: apple: Add T602x PCIe support Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250211-pcie-t6-v1-7-b60e6d2501bb@rosenzweig.io> References: <20250211-pcie-t6-v1-0-b60e6d2501bb@rosenzweig.io> In-Reply-To: <20250211-pcie-t6-v1-0-b60e6d2501bb@rosenzweig.io> To: Hector Martin , Sven Peter , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Manivannan Sadhasivam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Mark Kettenis , Marc Zyngier , Stan Skowronek Cc: asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Alyssa Rosenzweig X-Developer-Signature: v=1; a=openpgp-sha256; l=9798; i=alyssa@rosenzweig.io; h=from:subject:message-id; bh=iFWGB/VvFeLzLyS+KG8D2A435AlKV4YFBa+MItwwa6Q=; b=owEBbQKS/ZANAwAIAf7+UFoK9VgNAcsmYgBnq6r22VdvMG95oRYpc0a3Y+hfrFPR4A8pH3KLr qRWrDjxCrCJAjMEAAEIAB0WIQRDXuCbsK8A0B2q9jj+/lBaCvVYDQUCZ6uq9gAKCRD+/lBaCvVY DZh3D/4l1pDvAfKmIk7/pSKwwZWYyq//39IbbNPtbdA4C9xFF0xX2BemF0eboTU/Oxu0rDo35wJ kwewSoizjtiZ05RUcNCrMseffi8gJn2LKfJxWPKasSfILP2WZ8OE16f5J/QUOHNW/HQJ8SCaH7B AZblR3lj/vG9Udc33jhKcElKYvDQh2D9E7yM0khFQDoJ6u+ltnslAIqRqwNC67TegydqV6zi0TC ET/OPGZ2WafXFsiYEVHZK2xeV71mNdJjetKXXniZcEIZe2aQeot2L466D00RdbLUl5LBUhGuVmF 4GaCjUJVOpxRZqaLXUJxp++UKghvAh7AL20DG1RC+UsqHXRvi2Rji8JPH2244jYysdzbrshCXc/ KK/ebqG2Cu3dAFStQTvXEx88z2zhTKn5VNkv8ed2tWj4sA1jgXo9subxoIBx7WqNTe+OrG7DQB1 ed5DzNfS9cp8xPN1r+qP1M4wbvgJe9Vp+cBgsAa6MTVGLOsSbu7NN2ydnRoKLzzpGDSfoBraV/f UhW+55q39Fi+1oxg0jkY2T5DNHnswFE7cPVi4Myf8HjrcJFFZhcxaYK1yRKzc+EEwtCIBgTp2W3 BcsUbIx8Qsu1SHAY0H90vDN83Aq09Sl5KXKoZeI1sqW2sGkFC7jRVCl0eJ3mgAywvSyvINvHYv6 eswFtJqRXmShJbA== X-Developer-Key: i=alyssa@rosenzweig.io; a=openpgp; fpr=435EE09BB0AF00D01DAAF638FEFE505A0AF5580D X-Migadu-Flow: FLOW_OUT From: Hector Martin This version of the hardware moved around a bunch of registers, so we drop the old compatible for these and introduce register offset structures to handle the differences. Signed-off-by: Hector Martin Signed-off-by: Alyssa Rosenzweig --- drivers/pci/controller/pcie-apple.c | 125 ++++++++++++++++++++++++++++++------ 1 file changed, 105 insertions(+), 20 deletions(-) diff --git a/drivers/pci/controller/pcie-apple.c b/drivers/pci/controller/pcie-apple.c index 7f4839fb0a5b15a9ca87337f53c14a1ce08301fc..7c598334427cb56ca066890ac61143ae1d3ed744 100644 --- a/drivers/pci/controller/pcie-apple.c +++ b/drivers/pci/controller/pcie-apple.c @@ -26,6 +26,7 @@ #include #include #include +#include #include #include @@ -104,7 +105,7 @@ #define PORT_REFCLK_CGDIS BIT(8) #define PORT_PERST 0x00814 #define PORT_PERST_OFF BIT(0) -#define PORT_RID2SID(i16) (0x00828 + 4 * (i16)) +#define PORT_RID2SID 0x00828 #define PORT_RID2SID_VALID BIT(31) #define PORT_RID2SID_SID_SHIFT 16 #define PORT_RID2SID_BUS_SHIFT 8 @@ -122,7 +123,7 @@ #define PORT_TUNSTAT_PERST_ACK_PEND BIT(1) #define PORT_PREFMEM_ENABLE 0x00994 -#define MAX_RID2SID 64 +#define MAX_RID2SID 512 /* * The doorbell address is set to 0xfffff000, which by convention @@ -133,6 +134,57 @@ */ #define DOORBELL_ADDR CONFIG_PCIE_APPLE_MSI_DOORBELL_ADDR +struct reg_info { + u32 phy_lane_ctl; + u32 port_msiaddr; + u32 port_msiaddr_hi; + u32 port_refclk; + u32 port_perst; + u32 port_rid2sid; + u32 port_msimap; + u32 max_rid2sid; + u32 max_msimap; +}; + +const struct reg_info t8103_hw = { + .phy_lane_ctl = PHY_LANE_CTL, + .port_msiaddr = PORT_MSIADDR, + .port_msiaddr_hi = 0, + .port_refclk = PORT_REFCLK, + .port_perst = PORT_PERST, + .port_rid2sid = PORT_RID2SID, + .port_msimap = 0, + .max_rid2sid = 64, + .max_msimap = 0, +}; + +#define PORT_T602X_MSIADDR 0x016c +#define PORT_T602X_MSIADDR_HI 0x0170 +#define PORT_T602X_PERST 0x082c +#define PORT_T602X_RID2SID 0x3000 +#define PORT_T602X_MSIMAP 0x3800 + +#define PORT_MSIMAP_ENABLE BIT(31) +#define PORT_MSIMAP_TARGET GENMASK(7, 0) + +const struct reg_info t602x_hw = { + .phy_lane_ctl = 0, + .port_msiaddr = PORT_T602X_MSIADDR, + .port_msiaddr_hi = PORT_T602X_MSIADDR_HI, + .port_refclk = 0, + .port_perst = PORT_T602X_PERST, + .port_rid2sid = PORT_T602X_RID2SID, + .port_msimap = PORT_T602X_MSIMAP, + .max_rid2sid = 512, /* 16 on t602x, guess for autodetect on future HW */ + .max_msimap = 512, /* 96 on t602x, guess for autodetect on future HW */ +}; + +static const struct of_device_id apple_pcie_of_match_hw[] = { + { .compatible = "apple,t6020-pcie", .data = &t602x_hw }, + { .compatible = "apple,pcie", .data = &t8103_hw }, + { } +}; + struct apple_pcie { struct mutex lock; struct device *dev; @@ -143,6 +195,7 @@ struct apple_pcie { struct completion event; struct irq_fwspec fwspec; u32 nvecs; + const struct reg_info *hw; }; struct apple_pcie_port { @@ -266,14 +319,14 @@ static void apple_port_irq_mask(struct irq_data *data) { struct apple_pcie_port *port = irq_data_get_irq_chip_data(data); - writel_relaxed(BIT(data->hwirq), port->base + PORT_INTMSKSET); + rmw_set(BIT(data->hwirq), port->base + PORT_INTMSK); } static void apple_port_irq_unmask(struct irq_data *data) { struct apple_pcie_port *port = irq_data_get_irq_chip_data(data); - writel_relaxed(BIT(data->hwirq), port->base + PORT_INTMSKCLR); + rmw_clear(BIT(data->hwirq), port->base + PORT_INTMSK); } static bool hwirq_is_intx(unsigned int hwirq) @@ -377,6 +430,7 @@ static void apple_port_irq_handler(struct irq_desc *desc) static int apple_pcie_port_setup_irq(struct apple_pcie_port *port) { struct fwnode_handle *fwnode = &port->np->fwnode; + struct apple_pcie *pcie = port->pcie; unsigned int irq; /* FIXME: consider moving each interrupt under each port */ @@ -392,19 +446,35 @@ static int apple_pcie_port_setup_irq(struct apple_pcie_port *port) return -ENOMEM; /* Disable all interrupts */ - writel_relaxed(~0, port->base + PORT_INTMSKSET); + writel_relaxed(~0, port->base + PORT_INTMSK); writel_relaxed(~0, port->base + PORT_INTSTAT); + writel_relaxed(~0, port->base + PORT_LINKCMDSTS); irq_set_chained_handler_and_data(irq, apple_port_irq_handler, port); /* Configure MSI base address */ BUILD_BUG_ON(upper_32_bits(DOORBELL_ADDR)); - writel_relaxed(lower_32_bits(DOORBELL_ADDR), port->base + PORT_MSIADDR); + writel_relaxed(lower_32_bits(DOORBELL_ADDR), + port->base + pcie->hw->port_msiaddr); + if (pcie->hw->port_msiaddr_hi) + writel_relaxed(0, port->base + pcie->hw->port_msiaddr_hi); /* Enable MSIs, shared between all ports */ - writel_relaxed(0, port->base + PORT_MSIBASE); - writel_relaxed((ilog2(port->pcie->nvecs) << PORT_MSICFG_L2MSINUM_SHIFT) | - PORT_MSICFG_EN, port->base + PORT_MSICFG); + if (pcie->hw->port_msimap) { + int i; + + for (i = 0; i < pcie->nvecs; i++) { + writel_relaxed(FIELD_PREP(PORT_MSIMAP_TARGET, i) | + PORT_MSIMAP_ENABLE, + port->base + pcie->hw->port_msimap + 4 * i); + } + + writel_relaxed(PORT_MSICFG_EN, port->base + PORT_MSICFG); + } else { + writel_relaxed(0, port->base + PORT_MSIBASE); + writel_relaxed((ilog2(pcie->nvecs) << PORT_MSICFG_L2MSINUM_SHIFT) | + PORT_MSICFG_EN, port->base + PORT_MSICFG); + } return 0; } @@ -472,7 +542,9 @@ static int apple_pcie_setup_refclk(struct apple_pcie *pcie, u32 stat; int res; - rmw_set(PHY_LANE_CTL_CFGACC, port->phy + PHY_LANE_CTL); + if (pcie->hw->phy_lane_ctl) + rmw_set(PHY_LANE_CTL_CFGACC, port->phy + pcie->hw->phy_lane_ctl); + rmw_set(PHY_LANE_CFG_REFCLK0REQ, port->phy + PHY_LANE_CFG); res = readl_relaxed_poll_timeout(port->phy + PHY_LANE_CFG, @@ -489,10 +561,13 @@ static int apple_pcie_setup_refclk(struct apple_pcie *pcie, if (res < 0) return res; - rmw_clear(PHY_LANE_CTL_CFGACC, port->phy + PHY_LANE_CTL); + if (pcie->hw->phy_lane_ctl) + rmw_clear(PHY_LANE_CTL_CFGACC, port->phy + pcie->hw->phy_lane_ctl); rmw_set(PHY_LANE_CFG_REFCLKEN, port->phy + PHY_LANE_CFG); - rmw_set(PORT_REFCLK_EN, port->base + PORT_REFCLK); + + if (pcie->hw->port_refclk) + rmw_set(PORT_REFCLK_EN, port->base + pcie->hw->port_refclk); return 0; } @@ -500,9 +575,9 @@ static int apple_pcie_setup_refclk(struct apple_pcie *pcie, static u32 apple_pcie_rid2sid_write(struct apple_pcie_port *port, int idx, u32 val) { - writel_relaxed(val, port->base + PORT_RID2SID(idx)); + writel_relaxed(val, port->base + port->pcie->hw->port_rid2sid + 4 * idx); /* Read back to ensure completion of the write */ - return readl_relaxed(port->base + PORT_RID2SID(idx)); + return readl_relaxed(port->base + port->pcie->hw->port_rid2sid + 4 * idx); } static int apple_pcie_setup_port(struct apple_pcie *pcie, @@ -563,7 +638,7 @@ static int apple_pcie_setup_port(struct apple_pcie *pcie, usleep_range(100, 200); /* Deassert PERST# */ - rmw_set(PORT_PERST_OFF, port->base + PORT_PERST); + rmw_set(PORT_PERST_OFF, port->base + pcie->hw->port_perst); gpiod_set_value_cansleep(reset, 0); /* Wait for 100ms after PERST# deassertion (PCIe r5.0, 6.6.1) */ @@ -576,15 +651,12 @@ static int apple_pcie_setup_port(struct apple_pcie *pcie, return ret; } - rmw_clear(PORT_REFCLK_CGDIS, port->base + PORT_REFCLK); - rmw_clear(PORT_APPCLK_CGDIS, port->base + PORT_APPCLK); - ret = apple_pcie_port_setup_irq(port); if (ret) return ret; /* Reset all RID/SID mappings, and check for RAZ/WI registers */ - for (i = 0; i < MAX_RID2SID; i++) { + for (i = 0; i < pcie->hw->max_rid2sid; i++) { if (apple_pcie_rid2sid_write(port, i, 0xbad1d) != 0xbad1d) break; apple_pcie_rid2sid_write(port, i, 0); @@ -608,6 +680,12 @@ static int apple_pcie_setup_port(struct apple_pcie *pcie, if (!wait_for_completion_timeout(&pcie->event, HZ / 10)) dev_warn(pcie->dev, "%pOF link didn't come up\n", np); + if (pcie->hw->port_refclk) + rmw_clear(PORT_REFCLK_CGDIS, port->base + PORT_REFCLK); + else + rmw_set(PHY_LANE_CFG_REFCLKCGEN, port->phy + PHY_LANE_CFG); + rmw_clear(PORT_APPCLK_CGDIS, port->base + PORT_APPCLK); + return 0; } @@ -732,7 +810,7 @@ static void apple_pcie_disable_device(struct pci_host_bridge *bridge, struct pci for_each_set_bit(idx, port->sid_map, port->sid_map_sz) { u32 val; - val = readl_relaxed(port->base + PORT_RID2SID(idx)); + val = readl_relaxed(port->base + port->pcie->hw->port_rid2sid + 4 * idx); if ((val & 0xffff) == rid) { apple_pcie_rid2sid_write(port, idx, 0); bitmap_release_region(port->sid_map, idx, 0); @@ -750,13 +828,19 @@ static int apple_pcie_init(struct pci_config_window *cfg) struct platform_device *platform = to_platform_device(dev); struct device_node *of_port; struct apple_pcie *pcie; + const struct of_device_id *match; int ret; + match = of_match_device(apple_pcie_of_match_hw, dev); + if (!match) + return -ENODEV; + pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL); if (!pcie) return -ENOMEM; pcie->dev = dev; + pcie->hw = match->data; mutex_init(&pcie->lock); @@ -795,6 +879,7 @@ static const struct pci_ecam_ops apple_pcie_cfg_ecam_ops = { }; static const struct of_device_id apple_pcie_of_match[] = { + { .compatible = "apple,t6020-pcie", .data = &apple_pcie_cfg_ecam_ops }, { .compatible = "apple,pcie", .data = &apple_pcie_cfg_ecam_ops }, { } };