From patchwork Wed Feb 12 07:57:21 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Swiatkowski X-Patchwork-Id: 13971314 X-Patchwork-Delegate: kuba@kernel.org Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B1831204694 for ; Wed, 12 Feb 2025 07:57:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.11 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739347052; cv=none; b=InlsR6EZ6JpTbsY7hx3L5LORWx/pt9cLWu8FnCyY2d1CqIUwZT0g+HVhfHJupa3vJ8XYqvPF4GTjREXxoQE+rh/YnqpFoX6oTGYIdtS7uNCkb/nh6SPRIry55foKGVt24v31AmjNIjbYTtVYhRHwBpnRV1ydas8dCTz/x8vm8SQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739347052; c=relaxed/simple; bh=+r6KnAcDVpkoAHYw8iFtiV+DY+pi7pukgZUBnjg1mZc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=b45fZD0MZj2W10DAqv9JHjuG9jwhETc5QH8HbCkHvhtI5b4Ftw4PBLF4wGsq+fy1B5bO1obfXsAmHBpaR4w6oSqSOhKe29WJ58MnQIndLDXdJiUQ/5Ji7kYcM4Ogi4BsL73q5F5FR0nOWTagDhhtZdqTPBNtA/QzbG8r/gVGan8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=lWdCOHAv; arc=none smtp.client-ip=198.175.65.11 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="lWdCOHAv" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1739347051; x=1770883051; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=+r6KnAcDVpkoAHYw8iFtiV+DY+pi7pukgZUBnjg1mZc=; b=lWdCOHAvMg21tS1L02agJIA+dC/mj1+6QwKwUBrZJYZpDC44WFzeK2mb KFeyL5PgozXMovUTV0dPuuHiOJie5xrOIghreUOFGWpRJRwE44niZ2UJs ORJ447UF53v3F48+D/fIRYpyDOYrbOyUlv+Jzhp/6i4s0LWCNpGNv4Fn7 4phKOSnfONkNdQAhPTkgsB0qJgXNhEzchNq8S64WbxahgRZ3Xg/rKsDem SctmbECKMctr68rnySnupvWPePjANLrCLfH0HVh36VKA8fGNG5Sas1GJd s36MuKSP+ovAfrNX4rCz3wzAObFG82GzRAgfJQQ2r6u+ZDyaFM1s4R+q8 w==; X-CSE-ConnectionGUID: wb3kFIa0QcGdoB0yD99zWA== X-CSE-MsgGUID: OmuL5eQdRt67CHAcPlarqA== X-IronPort-AV: E=McAfee;i="6700,10204,11342"; a="50212346" X-IronPort-AV: E=Sophos;i="6.13,279,1732608000"; d="scan'208";a="50212346" Received: from fmviesa006.fm.intel.com ([10.60.135.146]) by orvoesa103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Feb 2025 23:57:31 -0800 X-CSE-ConnectionGUID: dPrkRuUeS52sMEeWjZ40qw== X-CSE-MsgGUID: GycKQyf4R6aI3XCFHqiLWA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.13,279,1732608000"; d="scan'208";a="112579843" Received: from gk3153-dr2-r750-36946.igk.intel.com ([10.102.20.192]) by fmviesa006.fm.intel.com with ESMTP; 11 Feb 2025 23:57:28 -0800 From: Michal Swiatkowski To: intel-wired-lan@lists.osuosl.org Cc: netdev@vger.kernel.org, marcin.szycik@linux.intel.com, jedrzej.jagielski@intel.com, przemyslaw.kitszel@intel.com, piotr.kwapulinski@intel.com, anthony.l.nguyen@intel.com, dawid.osuchowski@intel.com, horms@kernel.org Subject: [iwl-next v2 1/4] ixgbe: add MDD support Date: Wed, 12 Feb 2025 08:57:21 +0100 Message-ID: <20250212075724.3352715-2-michal.swiatkowski@linux.intel.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20250212075724.3352715-1-michal.swiatkowski@linux.intel.com> References: <20250212075724.3352715-1-michal.swiatkowski@linux.intel.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org From: Paul Greenwalt Add malicious driver detection. Support enabling MDD, disabling MDD, handling a MDD event, and restoring a MDD VF. Reviewed-by: Przemek Kitszel Reviewed-by: Jedrzej Jagielski Reviewed-by: Marcin Szycik Signed-off-by: Paul Greenwalt Signed-off-by: Michal Swiatkowski --- drivers/net/ethernet/intel/ixgbe/ixgbe_type.h | 28 ++++ drivers/net/ethernet/intel/ixgbe/ixgbe_x550.h | 5 + drivers/net/ethernet/intel/ixgbe/ixgbe_e610.c | 4 + drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c | 120 ++++++++++++++++++ 4 files changed, 157 insertions(+) diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h b/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h index 5fdf32d79d82..d446c375335a 100644 --- a/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h +++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h @@ -2746,6 +2746,28 @@ enum ixgbe_fdir_pballoc_type { #define FW_PHY_INFO_ID_HI_MASK 0xFFFF0000u #define FW_PHY_INFO_ID_LO_MASK 0x0000FFFFu +/* There are only 3 options for VFs creation on this device: + * 16 VFs pool with 8 queues each + * 32 VFs pool with 4 queues each + * 64 VFs pool with 2 queues each + * + * That means reading some VF registers that map VF to queue depending on + * chosen option. Define values that help dealing with each scenario. + */ +/* Number of queues based on VFs pool */ +#define IXGBE_16VFS_QUEUES 8 +#define IXGBE_32VFS_QUEUES 4 +#define IXGBE_64VFS_QUEUES 2 +/* Mask for getting queues bits based on VFs pool */ +#define IXGBE_16VFS_BITMASK GENMASK(IXGBE_16VFS_QUEUES - 1, 0) +#define IXGBE_32VFS_BITMASK GENMASK(IXGBE_32VFS_QUEUES - 1, 0) +#define IXGBE_64VFS_BITMASK GENMASK(IXGBE_64VFS_QUEUES - 1, 0) +/* Convert queue index to register number. + * We have 4 registers with 32 queues in each. + */ +#define IXGBE_QUEUES_PER_REG 32 +#define IXGBE_QUEUES_REG_AMOUNT 4 + /* Host Interface Command Structures */ struct ixgbe_hic_hdr { u8 cmd; @@ -3534,6 +3556,12 @@ struct ixgbe_mac_operations { int (*dmac_config_tcs)(struct ixgbe_hw *hw); int (*read_iosf_sb_reg)(struct ixgbe_hw *, u32, u32, u32 *); int (*write_iosf_sb_reg)(struct ixgbe_hw *, u32, u32, u32); + + /* MDD events */ + void (*enable_mdd)(struct ixgbe_hw *hw); + void (*disable_mdd)(struct ixgbe_hw *hw); + void (*restore_mdd_vf)(struct ixgbe_hw *hw, u32 vf); + void (*handle_mdd)(struct ixgbe_hw *hw, unsigned long *vf_bitmap); }; struct ixgbe_phy_operations { diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_x550.h b/drivers/net/ethernet/intel/ixgbe/ixgbe_x550.h index 3e4092f8da3e..2a11147fb1bc 100644 --- a/drivers/net/ethernet/intel/ixgbe/ixgbe_x550.h +++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_x550.h @@ -17,4 +17,9 @@ void ixgbe_set_source_address_pruning_x550(struct ixgbe_hw *hw, void ixgbe_set_ethertype_anti_spoofing_x550(struct ixgbe_hw *hw, bool enable, int vf); +void ixgbe_enable_mdd_x550(struct ixgbe_hw *hw); +void ixgbe_disable_mdd_x550(struct ixgbe_hw *hw); +void ixgbe_restore_mdd_vf_x550(struct ixgbe_hw *hw, u32 vf); +void ixgbe_handle_mdd_x550(struct ixgbe_hw *hw, unsigned long *vf_bitmap); + #endif /* _IXGBE_X550_H_ */ diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_e610.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_e610.c index cb07ecd8937d..788f3372ebf1 100644 --- a/drivers/net/ethernet/intel/ixgbe/ixgbe_e610.c +++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_e610.c @@ -2630,6 +2630,10 @@ static const struct ixgbe_mac_operations mac_ops_e610 = { .prot_autoc_write = prot_autoc_write_generic, .setup_fc = ixgbe_setup_fc_e610, .fc_autoneg = ixgbe_fc_autoneg_e610, + .enable_mdd = ixgbe_enable_mdd_x550, + .disable_mdd = ixgbe_disable_mdd_x550, + .restore_mdd_vf = ixgbe_restore_mdd_vf_x550, + .handle_mdd = ixgbe_handle_mdd_x550, }; static const struct ixgbe_phy_operations phy_ops_e610 = { diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c index 277ceaf8a793..b5cbfd1f71fd 100644 --- a/drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c +++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c @@ -3800,6 +3800,122 @@ static int ixgbe_write_phy_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr, return status; } +static void ixgbe_set_mdd_x550(struct ixgbe_hw *hw, bool ena) +{ + u32 reg_dma, reg_rdr; + + reg_dma = IXGBE_READ_REG(hw, IXGBE_DMATXCTL); + reg_rdr = IXGBE_READ_REG(hw, IXGBE_RDRXCTL); + + if (ena) { + reg_dma |= (IXGBE_DMATXCTL_MDP_EN | IXGBE_DMATXCTL_MBINTEN); + reg_rdr |= (IXGBE_RDRXCTL_MDP_EN | IXGBE_RDRXCTL_MBINTEN); + } else { + reg_dma &= ~(IXGBE_DMATXCTL_MDP_EN | IXGBE_DMATXCTL_MBINTEN); + reg_rdr &= ~(IXGBE_RDRXCTL_MDP_EN | IXGBE_RDRXCTL_MBINTEN); + } + + IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, reg_dma); + IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, reg_rdr); +} + +/** + * ixgbe_enable_mdd_x550 - enable malicious driver detection + * @hw: pointer to hardware structure + */ +void ixgbe_enable_mdd_x550(struct ixgbe_hw *hw) +{ + ixgbe_set_mdd_x550(hw, true); +} + +/** + * ixgbe_disable_mdd_x550 - disable malicious driver detection + * @hw: pointer to hardware structure + */ +void ixgbe_disable_mdd_x550(struct ixgbe_hw *hw) +{ + ixgbe_set_mdd_x550(hw, false); +} + +/** + * ixgbe_restore_mdd_vf_x550 - restore VF that was disabled during MDD event + * @hw: pointer to hardware structure + * @vf: vf index + */ +void ixgbe_restore_mdd_vf_x550(struct ixgbe_hw *hw, u32 vf) +{ + u32 idx, reg, val, num_qs, start_q, bitmask; + + /* Map VF to queues */ + reg = IXGBE_READ_REG(hw, IXGBE_MRQC); + switch (reg & IXGBE_MRQC_MRQE_MASK) { + case IXGBE_MRQC_VMDQRT8TCEN: + num_qs = IXGBE_16VFS_QUEUES; + bitmask = IXGBE_16VFS_BITMASK; + break; + case IXGBE_MRQC_VMDQRSS32EN: + case IXGBE_MRQC_VMDQRT4TCEN: + num_qs = IXGBE_32VFS_QUEUES; + bitmask = IXGBE_32VFS_BITMASK; + break; + default: + num_qs = IXGBE_64VFS_QUEUES; + bitmask = IXGBE_64VFS_BITMASK; + break; + } + start_q = vf * num_qs; + + /* Release vf's queues by clearing WQBR_TX and WQBR_RX (RW1C) */ + idx = start_q / IXGBE_QUEUES_PER_REG; + val = bitmask << (start_q % IXGBE_QUEUES_PER_REG); + IXGBE_WRITE_REG(hw, IXGBE_WQBR_TX(idx), val); + IXGBE_WRITE_REG(hw, IXGBE_WQBR_RX(idx), val); +} + +/** + * ixgbe_handle_mdd_x550 - handle malicious driver detection event + * @hw: pointer to hardware structure + * @vf_bitmap: output vf bitmap of malicious vfs + */ +void ixgbe_handle_mdd_x550(struct ixgbe_hw *hw, unsigned long *vf_bitmap) +{ + u32 i, j, reg, q, div, vf; + unsigned long wqbr; + + /* figure out pool size for mapping to vf's */ + reg = IXGBE_READ_REG(hw, IXGBE_MRQC); + switch (reg & IXGBE_MRQC_MRQE_MASK) { + case IXGBE_MRQC_VMDQRT8TCEN: + div = IXGBE_16VFS_QUEUES; + break; + case IXGBE_MRQC_VMDQRSS32EN: + case IXGBE_MRQC_VMDQRT4TCEN: + div = IXGBE_32VFS_QUEUES; + break; + default: + div = IXGBE_64VFS_QUEUES; + break; + } + + /* Read WQBR_TX and WQBR_RX and check for malicious queues */ + for (i = 0; i < IXGBE_QUEUES_REG_AMOUNT; i++) { + wqbr = IXGBE_READ_REG(hw, IXGBE_WQBR_TX(i)) | + IXGBE_READ_REG(hw, IXGBE_WQBR_RX(i)); + if (!wqbr) + continue; + + /* Get malicious queue */ + for_each_set_bit(j, (unsigned long *)&wqbr, + IXGBE_QUEUES_PER_REG) { + /* Get queue from bitmask */ + q = j + (i * IXGBE_QUEUES_PER_REG); + /* Map queue to vf */ + vf = q / div; + set_bit(vf, vf_bitmap); + } + } +} + #define X550_COMMON_MAC \ .init_hw = &ixgbe_init_hw_generic, \ .start_hw = &ixgbe_start_hw_X540, \ @@ -3863,6 +3979,10 @@ static const struct ixgbe_mac_operations mac_ops_X550 = { .prot_autoc_write = prot_autoc_write_generic, .setup_fc = ixgbe_setup_fc_generic, .fc_autoneg = ixgbe_fc_autoneg, + .enable_mdd = ixgbe_enable_mdd_x550, + .disable_mdd = ixgbe_disable_mdd_x550, + .restore_mdd_vf = ixgbe_restore_mdd_vf_x550, + .handle_mdd = ixgbe_handle_mdd_x550, }; static const struct ixgbe_mac_operations mac_ops_X550EM_x = { From patchwork Wed Feb 12 07:57:22 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Swiatkowski X-Patchwork-Id: 13971315 X-Patchwork-Delegate: kuba@kernel.org Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5361E204C01 for ; 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X-CSE-ConnectionGUID: 1urqKckkSE2kFyLt72ueeQ== X-CSE-MsgGUID: VS8CqQfqSYWe4lPmBK1T6w== X-IronPort-AV: E=McAfee;i="6700,10204,11342"; a="50212349" X-IronPort-AV: E=Sophos;i="6.13,279,1732608000"; d="scan'208";a="50212349" Received: from fmviesa006.fm.intel.com ([10.60.135.146]) by orvoesa103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Feb 2025 23:57:33 -0800 X-CSE-ConnectionGUID: /b2RurflRiOnMzV/c0ApDA== X-CSE-MsgGUID: 0w5lhYfXRI+gRNkpvQY1EA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.13,279,1732608000"; d="scan'208";a="112579847" Received: from gk3153-dr2-r750-36946.igk.intel.com ([10.102.20.192]) by fmviesa006.fm.intel.com with ESMTP; 11 Feb 2025 23:57:30 -0800 From: Michal Swiatkowski To: intel-wired-lan@lists.osuosl.org Cc: netdev@vger.kernel.org, marcin.szycik@linux.intel.com, jedrzej.jagielski@intel.com, przemyslaw.kitszel@intel.com, piotr.kwapulinski@intel.com, anthony.l.nguyen@intel.com, dawid.osuchowski@intel.com, horms@kernel.org Subject: [iwl-next v2 2/4] ixgbe: check for MDD events Date: Wed, 12 Feb 2025 08:57:22 +0100 Message-ID: <20250212075724.3352715-3-michal.swiatkowski@linux.intel.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20250212075724.3352715-1-michal.swiatkowski@linux.intel.com> References: <20250212075724.3352715-1-michal.swiatkowski@linux.intel.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org From: Don Skidmore When an event is detected it is logged and, for the time being, the queue is immediately re-enabled. This is due to the lack of an API to the hypervisor so it could deal with it as it chooses. Reviewed-by: Przemek Kitszel Reviewed-by: Jedrzej Jagielski Reviewed-by: Marcin Szycik Signed-off-by: Don Skidmore Signed-off-by: Michal Swiatkowski --- .../net/ethernet/intel/ixgbe/ixgbe_sriov.h | 1 + drivers/net/ethernet/intel/ixgbe/ixgbe_type.h | 2 + drivers/net/ethernet/intel/ixgbe/ixgbe_main.c | 3 ++ .../net/ethernet/intel/ixgbe/ixgbe_sriov.c | 50 +++++++++++++++++++ 4 files changed, 56 insertions(+) diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.h b/drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.h index 0690ecb8dfa3..bc4cab976bf9 100644 --- a/drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.h +++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.h @@ -15,6 +15,7 @@ #ifdef CONFIG_PCI_IOV void ixgbe_restore_vf_multicasts(struct ixgbe_adapter *adapter); #endif +bool ixgbe_check_mdd_event(struct ixgbe_adapter *adapter); void ixgbe_msg_task(struct ixgbe_adapter *adapter); int ixgbe_vf_configuration(struct pci_dev *pdev, unsigned int event_mask); void ixgbe_ping_all_vfs(struct ixgbe_adapter *adapter); diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h b/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h index d446c375335a..aa3b498558bc 100644 --- a/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h +++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h @@ -402,6 +402,8 @@ struct ixgbe_nvm_version { #define IXGBE_MRCTL(_i) (0x0F600 + ((_i) * 4)) #define IXGBE_VMRVLAN(_i) (0x0F610 + ((_i) * 4)) #define IXGBE_VMRVM(_i) (0x0F630 + ((_i) * 4)) +#define IXGBE_LVMMC_RX 0x2FA8 +#define IXGBE_LVMMC_TX 0x8108 #define IXGBE_WQBR_RX(_i) (0x2FB0 + ((_i) * 4)) /* 4 total */ #define IXGBE_WQBR_TX(_i) (0x8130 + ((_i) * 4)) /* 4 total */ #define IXGBE_L34T_IMIR(_i) (0x0E800 + ((_i) * 4)) /*128 of these (0-127)*/ diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c index 467f81239e12..3ff48207165c 100644 --- a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c +++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c @@ -7959,6 +7959,9 @@ static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *adapter) netif_carrier_on(netdev); ixgbe_check_vf_rate_limit(adapter); + if (adapter->num_vfs && hw->mac.ops.enable_mdd) + hw->mac.ops.enable_mdd(hw); + /* enable transmits */ netif_tx_wake_all_queues(adapter->netdev); diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c index ccdce80edd14..c374ebd4a56b 100644 --- a/drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c +++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c @@ -207,6 +207,7 @@ void ixgbe_enable_sriov(struct ixgbe_adapter *adapter, unsigned int max_vfs) int ixgbe_disable_sriov(struct ixgbe_adapter *adapter) { unsigned int num_vfs = adapter->num_vfs, vf; + struct ixgbe_hw *hw = &adapter->hw; unsigned long flags; int rss; @@ -237,6 +238,9 @@ int ixgbe_disable_sriov(struct ixgbe_adapter *adapter) if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) return 0; + if (hw->mac.ops.disable_mdd) + hw->mac.ops.disable_mdd(hw); + #ifdef CONFIG_PCI_IOV /* * If our VFs are assigned we cannot shut down SR-IOV @@ -1353,12 +1357,58 @@ static void ixgbe_rcv_ack_from_vf(struct ixgbe_adapter *adapter, u32 vf) ixgbe_write_mbx(hw, &msg, 1, vf); } +/** + * ixgbe_check_mdd_event - check for MDD event on all VFs + * @adapter: pointer to ixgbe adapter + * + * Return: true if there is a VF on which MDD event occurred, false otherwise. + */ +bool ixgbe_check_mdd_event(struct ixgbe_adapter *adapter) +{ + struct ixgbe_hw *hw = &adapter->hw; + DECLARE_BITMAP(vf_bitmap, 64); + bool ret = false; + int i; + + if (!hw->mac.ops.handle_mdd) + return false; + + /* Did we have a malicious event */ + hw->mac.ops.handle_mdd(hw, vf_bitmap); + + /* Log any blocked queues and release lock */ + for_each_set_bit(i, vf_bitmap, 64) { + dev_warn(&adapter->pdev->dev, + "Malicious event on VF %d tx:%x rx:%x\n", i, + IXGBE_READ_REG(hw, IXGBE_LVMMC_TX), + IXGBE_READ_REG(hw, IXGBE_LVMMC_RX)); + + if (hw->mac.ops.restore_mdd_vf) { + u32 ping; + + hw->mac.ops.restore_mdd_vf(hw, i); + + /* get the VF to rebuild its queues */ + adapter->vfinfo[i].clear_to_send = 0; + ping = IXGBE_PF_CONTROL_MSG | + IXGBE_VT_MSGTYPE_CTS; + ixgbe_write_mbx(hw, &ping, 1, i); + } + + ret = true; + } + + return ret; +} + void ixgbe_msg_task(struct ixgbe_adapter *adapter) { struct ixgbe_hw *hw = &adapter->hw; unsigned long flags; u32 vf; + ixgbe_check_mdd_event(adapter); + spin_lock_irqsave(&adapter->vfs_lock, flags); for (vf = 0; vf < adapter->num_vfs; vf++) { /* process any reset requests */ From patchwork Wed Feb 12 07:57:23 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Swiatkowski X-Patchwork-Id: 13971316 X-Patchwork-Delegate: kuba@kernel.org Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8216F204C0D for ; Wed, 12 Feb 2025 07:57:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.11 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739347057; cv=none; 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d="scan'208";a="50212352" Received: from fmviesa006.fm.intel.com ([10.60.135.146]) by orvoesa103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Feb 2025 23:57:35 -0800 X-CSE-ConnectionGUID: eE8b23t3TSK6+HPUVR94eQ== X-CSE-MsgGUID: /PPBdBrcRHq0PKOmexDL/A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.13,279,1732608000"; d="scan'208";a="112579850" Received: from gk3153-dr2-r750-36946.igk.intel.com ([10.102.20.192]) by fmviesa006.fm.intel.com with ESMTP; 11 Feb 2025 23:57:32 -0800 From: Michal Swiatkowski To: intel-wired-lan@lists.osuosl.org Cc: netdev@vger.kernel.org, marcin.szycik@linux.intel.com, jedrzej.jagielski@intel.com, przemyslaw.kitszel@intel.com, piotr.kwapulinski@intel.com, anthony.l.nguyen@intel.com, dawid.osuchowski@intel.com, horms@kernel.org Subject: [iwl-next v2 3/4] ixgbe: add Tx hang detection unhandled MDD Date: Wed, 12 Feb 2025 08:57:23 +0100 Message-ID: <20250212075724.3352715-4-michal.swiatkowski@linux.intel.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20250212075724.3352715-1-michal.swiatkowski@linux.intel.com> References: <20250212075724.3352715-1-michal.swiatkowski@linux.intel.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org From: Slawomir Mrozowicz Add Tx Hang detection due to an unhandled MDD Event. Previously, a malicious VF could disable the entire port causing TX to hang on the E610 card. Those events that caused PF to freeze were not detected as an MDD event and usually required a Tx Hang watchdog timer to catch the suspension, and perform a physical function reset. Implement flows in the affected PF driver in such a way to check the cause of the hang, detect it as an MDD event and log an entry of the malicious VF that caused the Hang. The PF blocks the malicious VF, if it continues to be the source of several MDD events. Reviewed-by: Przemek Kitszel Reviewed-by: Marcin Szycik Signed-off-by: Slawomir Mrozowicz Co-developed-by: Michal Swiatkowski Signed-off-by: Michal Swiatkowski --- drivers/net/ethernet/intel/ixgbe/ixgbe.h | 5 + drivers/net/ethernet/intel/ixgbe/ixgbe_type.h | 12 +- drivers/net/ethernet/intel/ixgbe/ixgbe_lib.c | 3 +- drivers/net/ethernet/intel/ixgbe/ixgbe_main.c | 211 ++++++++++++++++-- 4 files changed, 209 insertions(+), 22 deletions(-) diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe.h b/drivers/net/ethernet/intel/ixgbe/ixgbe.h index e6a380d4929b..81ccb4c591ba 100644 --- a/drivers/net/ethernet/intel/ixgbe/ixgbe.h +++ b/drivers/net/ethernet/intel/ixgbe/ixgbe.h @@ -427,6 +427,10 @@ enum ixgbe_ring_f_enum { #define IXGBE_BAD_L2A_QUEUE 3 #define IXGBE_MAX_MACVLANS 63 +#define IXGBE_MAX_TX_QUEUES 128 +#define IXGBE_MAX_TX_DESCRIPTORS 40 +#define IXGBE_MAX_TX_VF_HANGS 4 + DECLARE_STATIC_KEY_FALSE(ixgbe_xdp_locking_key); struct ixgbe_ring_feature { @@ -798,6 +802,7 @@ struct ixgbe_adapter { u32 timer_event_accumulator; u32 vferr_refcount; struct ixgbe_mac_addr *mac_table; + u8 tx_hang_count[IXGBE_MAX_TX_QUEUES]; struct kobject *info_kobj; u16 lse_mask; #ifdef CONFIG_IXGBE_HWMON diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h b/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h index aa3b498558bc..783e76c0e8a2 100644 --- a/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h +++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h @@ -1044,6 +1044,7 @@ struct ixgbe_nvm_version { #define IXGBE_GCR_EXT_VT_MODE_16 0x00000001 #define IXGBE_GCR_EXT_VT_MODE_32 0x00000002 #define IXGBE_GCR_EXT_VT_MODE_64 0x00000003 +#define IXGBE_GCR_EXT_VT_MODE_MASK 0x00000003 #define IXGBE_GCR_EXT_SRIOV (IXGBE_GCR_EXT_MSIX_EN | \ IXGBE_GCR_EXT_VT_MODE_64) @@ -2935,6 +2936,13 @@ struct ixgbe_adv_tx_context_desc { __le32 mss_l4len_idx; }; +enum { + IXGBE_VLAN_MACIP_LENS_REG = 0, + IXGBE_FCEOF_SAIDX_REG = 1, + IXGBE_TYPE_TUCMD_MLHL = 2, + IXGBE_MSS_L4LEN_IDX = 3, +}; + /* Adv Transmit Descriptor Config Masks */ #define IXGBE_ADVTXD_DTALEN_MASK 0x0000FFFF /* Data buf length(bytes) */ #define IXGBE_ADVTXD_MAC_LINKSEC 0x00040000 /* Insert LinkSec */ @@ -2942,7 +2950,7 @@ struct ixgbe_adv_tx_context_desc { #define IXGBE_ADVTXD_IPSEC_SA_INDEX_MASK 0x000003FF /* IPSec SA index */ #define IXGBE_ADVTXD_IPSEC_ESP_LEN_MASK 0x000001FF /* IPSec ESP length */ #define IXGBE_ADVTXD_DTYP_MASK 0x00F00000 /* DTYP mask */ -#define IXGBE_ADVTXD_DTYP_CTXT 0x00200000 /* Advanced Context Desc */ +#define IXGBE_ADVTXD_DTYP_CTXT 0x2 /* Advanced Context Desc */ #define IXGBE_ADVTXD_DTYP_DATA 0x00300000 /* Advanced Data Descriptor */ #define IXGBE_ADVTXD_DCMD_EOP IXGBE_TXD_CMD_EOP /* End of Packet */ #define IXGBE_ADVTXD_DCMD_IFCS IXGBE_TXD_CMD_IFCS /* Insert FCS */ @@ -2991,6 +2999,8 @@ struct ixgbe_adv_tx_context_desc { #define IXGBE_ADVTXD_FCOEF_EOF_MASK (3u << 10) /* FC EOF index */ #define IXGBE_ADVTXD_L4LEN_SHIFT 8 /* Adv ctxt L4LEN shift */ #define IXGBE_ADVTXD_MSS_SHIFT 16 /* Adv ctxt MSS shift */ +#define IXGBE_ADVTXD_MSS_MASK GENMASK(31, IXGBE_ADVTXD_MSS_SHIFT) +#define IXGBE_ADVTXD_HEADER_LEN_MASK GENMASK(8, 0) /* Autonegotiation advertised speeds */ typedef u32 ixgbe_autoneg_advertised; diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_lib.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_lib.c index 336d47ffb95a..54d75cf94cc1 100644 --- a/drivers/net/ethernet/intel/ixgbe/ixgbe_lib.c +++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_lib.c @@ -1293,7 +1293,8 @@ void ixgbe_tx_ctxtdesc(struct ixgbe_ring *tx_ring, u32 vlan_macip_lens, tx_ring->next_to_use = (i < tx_ring->count) ? i : 0; /* set bits to identify this as an advanced context descriptor */ - type_tucmd |= IXGBE_TXD_CMD_DEXT | IXGBE_ADVTXD_DTYP_CTXT; + type_tucmd |= IXGBE_TXD_CMD_DEXT | + FIELD_PREP(IXGBE_ADVTXD_DTYP_MASK, IXGBE_ADVTXD_DTYP_CTXT); context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens); context_desc->fceof_saidx = cpu_to_le32(fceof_saidx); diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c index 3ff48207165c..22148e65e596 100644 --- a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c +++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c @@ -9,6 +9,7 @@ #include #include #include +#include #include #include #include @@ -1039,6 +1040,48 @@ static u64 ixgbe_get_tx_pending(struct ixgbe_ring *ring) return ((head <= tail) ? tail : tail + ring->count) - head; } +/** + * ixgbe_get_vf_idx - provide VF index number based on queue index + * @adapter: pointer to the adapter struct + * @queue: Tx queue identifier + * @vf: output VF index + * + * Provide VF index number associated to the input queue. + * + * Returns: 0 if VF provided or error number. + */ +static int ixgbe_get_vf_idx(struct ixgbe_adapter *adapter, u16 queue, u16 *vf) +{ + struct ixgbe_hw *hw = &adapter->hw; + u8 queue_count; + u32 reg; + + if (queue >= adapter->num_tx_queues) + return -EINVAL; + + /* Determine number of queues by checking + * number of virtual functions + */ + reg = IXGBE_READ_REG(hw, IXGBE_GCR_EXT); + switch (reg & IXGBE_GCR_EXT_VT_MODE_MASK) { + case IXGBE_GCR_EXT_VT_MODE_64: + queue_count = IXGBE_64VFS_QUEUES; + break; + case IXGBE_GCR_EXT_VT_MODE_32: + queue_count = IXGBE_32VFS_QUEUES; + break; + case IXGBE_GCR_EXT_VT_MODE_16: + queue_count = IXGBE_16VFS_QUEUES; + break; + default: + return -EINVAL; + } + + *vf = queue / queue_count; + + return 0; +} + static bool ixgbe_check_tx_hang(struct ixgbe_ring *tx_ring) { u32 tx_done = ixgbe_get_tx_completed(tx_ring); @@ -1157,6 +1200,150 @@ void ixgbe_update_rx_ring_stats(struct ixgbe_ring *rx_ring, q_vector->rx.total_packets += pkts; } +/** + * ixgbe_pf_handle_tx_hang - handle Tx hang on PF + * @tx_ring: tx ring number + * @next: next ring + * + * Prints a message containing details about the tx hang. + */ +static void ixgbe_pf_handle_tx_hang(struct ixgbe_ring *tx_ring, + unsigned int next) +{ + struct ixgbe_adapter *adapter = netdev_priv(tx_ring->netdev); + struct ixgbe_hw *hw = &adapter->hw; + + e_err(drv, "Detected Tx Unit Hang%s\n" + " Tx Queue <%d>\n" + " TDH, TDT <%x>, <%x>\n" + " next_to_use <%x>\n" + " next_to_clean <%x>\n" + "tx_buffer_info[next_to_clean]\n" + " time_stamp <%lx>\n" + " jiffies <%lx>\n", + ring_is_xdp(tx_ring) ? " (XDP)" : "", + tx_ring->queue_index, + IXGBE_READ_REG(hw, IXGBE_TDH(tx_ring->reg_idx)), + IXGBE_READ_REG(hw, IXGBE_TDT(tx_ring->reg_idx)), + tx_ring->next_to_use, next, + tx_ring->tx_buffer_info[next].time_stamp, jiffies); + + if (!ring_is_xdp(tx_ring)) + netif_stop_subqueue(tx_ring->netdev, + tx_ring->queue_index); +} + +/** + * ixgbe_vf_handle_tx_hang - handle Tx hang on VF + * @adapter: structure containing ring specific data + * @vf: VF index + * + * Print a message containing details about malicious driver detection. + * Set malicious VF link down if the detection happened several times. + */ +static void ixgbe_vf_handle_tx_hang(struct ixgbe_adapter *adapter, u16 vf) +{ + struct ixgbe_hw *hw = &adapter->hw; + + if (adapter->hw.mac.type != ixgbe_mac_e610) + return; + + e_warn(drv, + "Malicious Driver Detection tx hang detected on PF %d VF %d MAC: %pM", + hw->bus.func, vf, adapter->vfinfo[vf].vf_mac_addresses); + + adapter->tx_hang_count[vf]++; + if (adapter->tx_hang_count[vf] == IXGBE_MAX_TX_VF_HANGS) { + ixgbe_set_vf_link_state(adapter, vf, + IFLA_VF_LINK_STATE_DISABLE); + adapter->tx_hang_count[vf] = 0; + } +} + +static u32 ixgbe_poll_tx_icache(struct ixgbe_hw *hw, u16 queue, u16 idx) +{ + IXGBE_WRITE_REG(hw, IXGBE_TXDESCIC, queue * idx); + return IXGBE_READ_REG(hw, IXGBE_TXDESCIC); +} + +/** + * ixgbe_check_illegal_queue - search for queue with illegal packet + * @adapter: structure containing ring specific data + * @queue: queue index + * + * Check if tx descriptor connected with input queue + * contains illegal packet. + * + * Returns: true if queue contain illegal packet. + */ +static bool ixgbe_check_illegal_queue(struct ixgbe_adapter *adapter, + u16 queue) +{ + u32 hdr_len_reg, mss_len_reg, type_reg; + struct ixgbe_hw *hw = &adapter->hw; + u32 mss_len, header_len, reg; + + for (u16 i = 0; i < IXGBE_MAX_TX_DESCRIPTORS; i++) { + /* HW will clear bit IXGBE_TXDESCIC_READY when address + * is written to address field. HW will set this bit + * when iCache read is done, and data is ready at TIC_DWx. + * Set descriptor address. + */ + read_poll_timeout(ixgbe_poll_tx_icache, reg, + !(reg & IXGBE_TXDESCIC_READY), 0, 0, false, + hw, queue, i); + + /* read tx descriptor access registers */ + hdr_len_reg = IXGBE_READ_REG(hw, IXGBE_TIC_DW2(IXGBE_VLAN_MACIP_LENS_REG)); + type_reg = IXGBE_READ_REG(hw, IXGBE_TIC_DW2(IXGBE_TYPE_TUCMD_MLHL)); + mss_len_reg = IXGBE_READ_REG(hw, IXGBE_TIC_DW2(IXGBE_MSS_L4LEN_IDX)); + + /* check if Advanced Context Descriptor */ + if (FIELD_GET(IXGBE_ADVTXD_DTYP_MASK, type_reg) != + IXGBE_ADVTXD_DTYP_CTXT) + continue; + + /* check for illegal MSS and Header length */ + mss_len = FIELD_GET(IXGBE_ADVTXD_MSS_MASK, mss_len_reg); + header_len = FIELD_GET(IXGBE_ADVTXD_HEADER_LEN_MASK, + hdr_len_reg); + if ((mss_len + header_len) > SZ_16K) { + e_warn(probe, "mss len + header len too long\n"); + return true; + } + } + + return false; +} + +/** + * ixgbe_handle_mdd_event - handle mdd event + * @adapter: structure containing ring specific data + * @tx_ring: tx descriptor ring to handle + * + * Reset VF driver if malicious vf detected or + * illegal packet in an any queue detected. + */ +static void ixgbe_handle_mdd_event(struct ixgbe_adapter *adapter, + struct ixgbe_ring *tx_ring) +{ + u16 vf, q; + + if (adapter->vfinfo && ixgbe_check_mdd_event(adapter)) { + /* vf mdd info and malicious vf detected */ + if (!ixgbe_get_vf_idx(adapter, tx_ring->queue_index, &vf)) + ixgbe_vf_handle_tx_hang(adapter, vf); + } else { + /* malicious vf not detected */ + for (q = 0; q < IXGBE_MAX_TX_QUEUES; q++) { + if (ixgbe_check_illegal_queue(adapter, q) && + !ixgbe_get_vf_idx(adapter, q, &vf)) + /* illegal queue detected */ + ixgbe_vf_handle_tx_hang(adapter, vf); + } + } +} + /** * ixgbe_clean_tx_irq - Reclaim resources after transmit completes * @q_vector: structure containing interrupt and ring information @@ -1264,26 +1451,10 @@ static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector, adapter->tx_ipsec += total_ipsec; if (check_for_tx_hang(tx_ring) && ixgbe_check_tx_hang(tx_ring)) { - /* schedule immediate reset if we believe we hung */ - struct ixgbe_hw *hw = &adapter->hw; - e_err(drv, "Detected Tx Unit Hang %s\n" - " Tx Queue <%d>\n" - " TDH, TDT <%x>, <%x>\n" - " next_to_use <%x>\n" - " next_to_clean <%x>\n" - "tx_buffer_info[next_to_clean]\n" - " time_stamp <%lx>\n" - " jiffies <%lx>\n", - ring_is_xdp(tx_ring) ? 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Turn MDD off during SRRCTL register write to prevent generating MDD. Fix RCT in ixgbe_set_rx_drop_en(). Reviewed-by: Marcin Szycik Reviewed-by: Przemek Kitszel Signed-off-by: Radoslaw Tyl Signed-off-by: Michal Swiatkowski --- drivers/net/ethernet/intel/ixgbe/ixgbe_main.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c index 22148e65e596..873b46d21042 100644 --- a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c +++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c @@ -4099,8 +4099,12 @@ void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter) static void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter) #endif { - int i; bool pfc_en = adapter->dcb_cfg.pfc_mode_enable; + struct ixgbe_hw *hw = &adapter->hw; + int i; + + if (hw->mac.ops.disable_mdd) + hw->mac.ops.disable_mdd(hw); if (adapter->ixgbe_ieee_pfc) pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en); @@ -4122,6 +4126,9 @@ static void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter) for (i = 0; i < adapter->num_rx_queues; i++) ixgbe_disable_rx_drop(adapter, adapter->rx_ring[i]); } + + if (hw->mac.ops.enable_mdd) + hw->mac.ops.enable_mdd(hw); } #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2