From patchwork Wed Feb 12 19:28:01 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 13972367 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6309D1FCFE2; Wed, 12 Feb 2025 19:31:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739388686; cv=none; b=JfZvmYucLlz/PskPViHuyBRx0V7+OtaqMLzsr6y6WiSZD+IBPCKMBMFsc3EUauyekwE4r0f07/FA0hHSZnBKWydfwKF//PSPFNYovuZl6T7QGHd6RhurURiha+114u/4MHsGjuWkhLraonBzPaIPwuE3f9mlgYftTY/fauzVUQU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739388686; c=relaxed/simple; bh=Ze4Uk+nUu5ksQDzaMxOYhGlURLhavDr5sueanXUJg4I=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Yg5I4dFV6v3apod3A4BAqvM32SsE0m2U4hlDAeg5laeg3e8bN+W0f2VGvEqNELGKNfCH+NTIwPTSjd/7XQDs/f70rE21lHszuVK5h4l4w9X9dzwO7NLI272iYzm/sKX2iNpzkRK0BCQbIq4oafrrrYrEByocNXyrToRAVj1h4Qg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=MdbB9hGr; arc=none smtp.client-ip=198.175.65.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="MdbB9hGr" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1739388685; x=1770924685; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Ze4Uk+nUu5ksQDzaMxOYhGlURLhavDr5sueanXUJg4I=; b=MdbB9hGr62dMLC5uy1mEYLZzLt1zpZO+QhuqUPF3nt8XYo3P4r5uXbk0 NzfDNv8dJrBOapg3vLHH3qqp0nzSbofYJid2WSLqL8xdkyNmB7Gg/pTz4 qJpy53ig820H4iRF/6FLj9jWSJgPMuSLogXXqGnxGKe2Oq9brV0qU1ODE wxeKlY/mXHg9k8ooo82eDJuECDayjaKNAIeMdr5QdqiyFnTaGKcc+gaP8 tWUbTTWkATZdcN9YPYhxrFKFvFVGLC0nEqhmIhYv3PV62UvSntAsO5SMb HsSizBkYWQTvEmNtWSIzv0lIkCSMJ/TuqUMKa3gJtdFFOu92linPtkw9q g==; X-CSE-ConnectionGUID: ZMA/fwJMTLu2Q9YNEhQTKA== X-CSE-MsgGUID: t95BTWm/QiWjouurikkS1w== X-IronPort-AV: E=McAfee;i="6700,10204,11314"; a="40183660" X-IronPort-AV: E=Sophos;i="6.12,310,1728975600"; d="scan'208";a="40183660" Received: from fmviesa005.fm.intel.com ([10.60.135.145]) by orvoesa110.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Feb 2025 11:31:23 -0800 X-CSE-ConnectionGUID: jZzIFCRWQrSRGiToBbcmjA== X-CSE-MsgGUID: 83Ttg1O6SLC5MMotY1ehWw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="117542534" Received: from black.fi.intel.com ([10.237.72.28]) by fmviesa005.fm.intel.com with ESMTP; 12 Feb 2025 11:31:21 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id 5353810F; Wed, 12 Feb 2025 21:31:19 +0200 (EET) From: Andy Shevchenko To: Greg Kroah-Hartman , Thinh Nguyen , Felipe Balbi , linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andy Shevchenko , Ferry Toth Subject: [PATCH v3 1/4] dt-bindings: usb: dwc3: Add a property to reserve endpoints Date: Wed, 12 Feb 2025 21:28:01 +0200 Message-ID: <20250212193116.2487289-2-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.45.1.3035.g276e886db78b In-Reply-To: <20250212193116.2487289-1-andriy.shevchenko@linux.intel.com> References: <20250212193116.2487289-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Some of the endpoints may be reserved by hardware for different purposes, e.g., tracing control and output. This is the case, for instance, on Intel Merrifield and Moorefield platforms that reserve a few and USB driver may not use them for the regular transfers. Add the respective bindings. Signed-off-by: Andy Shevchenko Tested-by: Ferry Toth Reviewed-by: Rob Herring (Arm) --- .../devicetree/bindings/usb/snps,dwc3-common.yaml | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/Documentation/devicetree/bindings/usb/snps,dwc3-common.yaml b/Documentation/devicetree/bindings/usb/snps,dwc3-common.yaml index c956053fd036..71249b6ba616 100644 --- a/Documentation/devicetree/bindings/usb/snps,dwc3-common.yaml +++ b/Documentation/devicetree/bindings/usb/snps,dwc3-common.yaml @@ -65,6 +65,17 @@ properties: mode. type: boolean + snps,reserved-endpoints: + description: + Reserve endpoints for other needs, e.g, for tracing control and output. + When set, the driver will avoid using them for the regular USB transfers. + $ref: /schemas/types.yaml#/definitions/uint8-array + minItems: 1 + maxItems: 30 + items: + minimum: 2 + maximum: 31 + snps,dis-start-transfer-quirk: description: When set, disable isoc START TRANSFER command failure SW work-around From patchwork Wed Feb 12 19:28:02 2025 Content-Type: text/plain; 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X-CSE-ConnectionGUID: 4cr8yDuNQtOxlvtUnnOCfA== X-CSE-MsgGUID: rLaqWmk4RtOxl5yZCfEs9g== X-IronPort-AV: E=McAfee;i="6700,10204,11314"; a="40183664" X-IronPort-AV: E=Sophos;i="6.12,310,1728975600"; d="scan'208";a="40183664" Received: from fmviesa005.fm.intel.com ([10.60.135.145]) by orvoesa110.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Feb 2025 11:31:23 -0800 X-CSE-ConnectionGUID: OSrKSwJzSryo7GTuTIoVUQ== X-CSE-MsgGUID: FnU14+NaTN+T3xBT0/W1+A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="117542535" Received: from black.fi.intel.com ([10.237.72.28]) by fmviesa005.fm.intel.com with ESMTP; 12 Feb 2025 11:31:21 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id 637211FD; Wed, 12 Feb 2025 21:31:19 +0200 (EET) From: Andy Shevchenko To: Greg Kroah-Hartman , Thinh Nguyen , Felipe Balbi , linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andy Shevchenko , Ferry Toth Subject: [PATCH v3 2/4] usb: dwc3: gadget: Refactor loop to avoid NULL endpoints Date: Wed, 12 Feb 2025 21:28:02 +0200 Message-ID: <20250212193116.2487289-3-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.45.1.3035.g276e886db78b In-Reply-To: <20250212193116.2487289-1-andriy.shevchenko@linux.intel.com> References: <20250212193116.2487289-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Prepare the gadget driver to handle the reserved endpoints that will be not allocated at the initialisation time. While at it, add a warning where the NULL endpoint should never happen. Signed-off-by: Andy Shevchenko Tested-by: Ferry Toth Acked-by: Thinh Nguyen --- drivers/usb/dwc3/gadget.c | 22 ++++++++++++++++++---- 1 file changed, 18 insertions(+), 4 deletions(-) diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c index d27af65eb08a..73cebb7d90c2 100644 --- a/drivers/usb/dwc3/gadget.c +++ b/drivers/usb/dwc3/gadget.c @@ -547,6 +547,7 @@ static int dwc3_gadget_set_xfer_resource(struct dwc3_ep *dep) int dwc3_gadget_start_config(struct dwc3 *dwc, unsigned int resource_index) { struct dwc3_gadget_ep_cmd_params params; + struct dwc3_ep *dep; u32 cmd; int i; int ret; @@ -563,8 +564,13 @@ int dwc3_gadget_start_config(struct dwc3 *dwc, unsigned int resource_index) return ret; /* Reset resource allocation flags */ - for (i = resource_index; i < dwc->num_eps && dwc->eps[i]; i++) - dwc->eps[i]->flags &= ~DWC3_EP_RESOURCE_ALLOCATED; + for (i = resource_index; i < dwc->num_eps; i++) { + dep = dwc->eps[i]; + if (!dep) + continue; + + dep->flags &= ~DWC3_EP_RESOURCE_ALLOCATED; + } return 0; } @@ -751,9 +757,11 @@ void dwc3_gadget_clear_tx_fifos(struct dwc3 *dwc) dwc->last_fifo_depth = fifo_depth; /* Clear existing TXFIFO for all IN eps except ep0 */ - for (num = 3; num < min_t(int, dwc->num_eps, DWC3_ENDPOINTS_NUM); - num += 2) { + for (num = 3; num < min_t(int, dwc->num_eps, DWC3_ENDPOINTS_NUM); num += 2) { dep = dwc->eps[num]; + if (!dep) + continue; + /* Don't change TXFRAMNUM on usb31 version */ size = DWC3_IP_IS(DWC3) ? 0 : dwc3_readl(dwc->regs, DWC3_GTXFIFOSIZ(num >> 1)) & @@ -3669,6 +3677,8 @@ static bool dwc3_gadget_endpoint_trbs_complete(struct dwc3_ep *dep, for (i = 0; i < DWC3_ENDPOINTS_NUM; i++) { dep = dwc->eps[i]; + if (!dep) + continue; if (!(dep->flags & DWC3_EP_ENABLED)) continue; @@ -3818,6 +3828,10 @@ static void dwc3_endpoint_interrupt(struct dwc3 *dwc, u8 epnum = event->endpoint_number; dep = dwc->eps[epnum]; + if (!dep) { + dev_warn(dwc->dev, "spurious event, endpoint %u is not allocated\n", epnum); + return; + } if (!(dep->flags & DWC3_EP_ENABLED)) { if ((epnum > 1) && !(dep->flags & DWC3_EP_TRANSFER_STARTED)) From patchwork Wed Feb 12 19:28:03 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 13972369 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.9]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1D7B71FF7D9; Wed, 12 Feb 2025 19:31:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.9 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739388687; cv=none; b=nQWN36+ttJfLhrG+tbGHoc4l79VBjSdN4EKUlH+ZJ9f0Ut+JUjVWtmKdA2268a/Oyx/HghdneLSstsbUu/S4WvfMnlJULiqpfF9dQbExtTKdTL0uE5cy4JlY6nW6dRW8EojCXlO/00ItycBlRKMS3TQizLd8lfd7+DjiSCRIBCE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739388687; c=relaxed/simple; bh=Zka1OgwBNU8gVd96R+RYcxMXujnKFe2UmvDxynnRWSw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=eR3AAtqQt+MFz6xAFGdd10R5nFlkqR+MVKNP1F3z82sb0VCvp6jroFwVlN+xsbXcXCRzPYkvSGtGnI0Kx6B71pcSEXRPFij+HIqF9XWs19FzRZVV5NK6yvZb5ovJbweBUN+SJbGIS7KxYdHcjz8CspCs1i99xh6Cf+sDfUdQZow= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=J6W3LKvR; arc=none smtp.client-ip=192.198.163.9 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="J6W3LKvR" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1739388686; x=1770924686; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Zka1OgwBNU8gVd96R+RYcxMXujnKFe2UmvDxynnRWSw=; b=J6W3LKvRQpdy3PGZigvrEIcNmtSlHb0/ZC6nlfYbF2Gjj+iU+T8IY0PT K/zzOCOHNNblN9nTD6I3z6l10mvYUbPx8Sn1tbCl8wp8wT0o0n5B2QpsZ 26GlNCNY52ekCfZ3uOwPtgrearlHHVYbiiJxGW24Czu4xV3YcCwt0Pp6i 6aJLo79E2iheNLQi8it56EEstKRpqmnpX+HacZo+LxsATMsGK2IWlsERM d5KHJx+ITEXwwl/Uy+shDiL8m/ilrMIf7MvilAYwRgklpz94VAa2DbaIj tOPuY4lWw1h93FV8FwgoZFyK1L8qc2Yf9jOv/ckAHxV0FQuif8NifNN9S Q==; X-CSE-ConnectionGUID: 2pufIgPvRVuHcvxTshK4FA== X-CSE-MsgGUID: 2KjSeKFWTjqjLYKIK8iPXA== X-IronPort-AV: E=McAfee;i="6700,10204,11343"; a="50714407" X-IronPort-AV: E=Sophos;i="6.13,280,1732608000"; d="scan'208";a="50714407" Received: from orviesa006.jf.intel.com ([10.64.159.146]) by fmvoesa103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Feb 2025 11:31:24 -0800 X-CSE-ConnectionGUID: sXj48DD0TU26vi1Z7vJOnA== X-CSE-MsgGUID: mULhXL8bSGC45HZosk7uvg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.13,280,1732608000"; d="scan'208";a="112880549" Received: from black.fi.intel.com ([10.237.72.28]) by orviesa006.jf.intel.com with ESMTP; 12 Feb 2025 11:31:21 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id 6F4682CA; Wed, 12 Feb 2025 21:31:19 +0200 (EET) From: Andy Shevchenko To: Greg Kroah-Hartman , Thinh Nguyen , Felipe Balbi , linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andy Shevchenko , Ferry Toth Subject: [PATCH v3 3/4] usb: dwc3: gadget: Add support for snps,reserved-endpoints property Date: Wed, 12 Feb 2025 21:28:03 +0200 Message-ID: <20250212193116.2487289-4-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.45.1.3035.g276e886db78b In-Reply-To: <20250212193116.2487289-1-andriy.shevchenko@linux.intel.com> References: <20250212193116.2487289-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The snps,reserved-endpoints property lists the reserved endpoints that shouldn't be used for normal transfers. Add support for that to the driver. Signed-off-by: Andy Shevchenko Tested-by: Ferry Toth Acked-by: Thinh Nguyen --- drivers/usb/dwc3/gadget.c | 41 ++++++++++++++++++++++++++++++++++++++- 1 file changed, 40 insertions(+), 1 deletion(-) diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c index 73cebb7d90c2..f3ad8434366e 100644 --- a/drivers/usb/dwc3/gadget.c +++ b/drivers/usb/dwc3/gadget.c @@ -3403,14 +3403,53 @@ static int dwc3_gadget_init_endpoint(struct dwc3 *dwc, u8 epnum) return 0; } +static int dwc3_gadget_get_reserved_endpoints(struct dwc3 *dwc, const char *propname, + u8 *eps, u8 num) +{ + u8 count; + int ret; + + if (!device_property_present(dwc->dev, propname)) + return 0; + + ret = device_property_count_u8(dwc->dev, propname); + if (ret < 0) + return ret; + count = ret; + + ret = device_property_read_u8_array(dwc->dev, propname, eps, min(num, count)); + if (ret) + return ret; + + return count; +} + static int dwc3_gadget_init_endpoints(struct dwc3 *dwc, u8 total) { + const char *propname = "snps,reserved-endpoints"; u8 epnum; + u8 reserved_eps[DWC3_ENDPOINTS_NUM]; + u8 count; + u8 num; + int ret; INIT_LIST_HEAD(&dwc->gadget->ep_list); + ret = dwc3_gadget_get_reserved_endpoints(dwc, propname, + reserved_eps, ARRAY_SIZE(reserved_eps)); + if (ret < 0) { + dev_err(dwc->dev, "failed to read %s\n", propname); + return ret; + } + count = ret; + for (epnum = 0; epnum < total; epnum++) { - int ret; + for (num = 0; num < count; num++) { + if (epnum == reserved_eps[num]) + break; + } + if (num < count) + continue; ret = dwc3_gadget_init_endpoint(dwc, epnum); if (ret) From patchwork Wed Feb 12 19:28:04 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 13972366 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.9]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4F2FB1DC07D; Wed, 12 Feb 2025 19:31:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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a="50714405" X-IronPort-AV: E=Sophos;i="6.13,280,1732608000"; d="scan'208";a="50714405" Received: from orviesa006.jf.intel.com ([10.64.159.146]) by fmvoesa103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Feb 2025 11:31:24 -0800 X-CSE-ConnectionGUID: Oi6g4VVQRSWYiCtLZuw10A== X-CSE-MsgGUID: SalJIseoSXmw88IeDLGjrQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.13,280,1732608000"; d="scan'208";a="112880548" Received: from black.fi.intel.com ([10.237.72.28]) by orviesa006.jf.intel.com with ESMTP; 12 Feb 2025 11:31:21 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id 7F3C531C; Wed, 12 Feb 2025 21:31:19 +0200 (EET) From: Andy Shevchenko To: Greg Kroah-Hartman , Thinh Nguyen , Felipe Balbi , linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andy Shevchenko , Ferry Toth Subject: [PATCH v3 4/4] usb: dwc3: gadget: Avoid using reserved endpoints on Intel Merrifield Date: Wed, 12 Feb 2025 21:28:04 +0200 Message-ID: <20250212193116.2487289-5-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.45.1.3035.g276e886db78b In-Reply-To: <20250212193116.2487289-1-andriy.shevchenko@linux.intel.com> References: <20250212193116.2487289-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Intel Merrifield SoC uses these endpoints for tracing and they cannot be re-allocated if being used because the side band flow control signals are hard wired to certain endpoints: • 1 High BW Bulk IN (IN#1) (RTIT) • 1 1KB BW Bulk IN (IN#8) + 1 1KB BW Bulk OUT (Run Control) (OUT#8) In device mode, since RTIT (EP#1) and EXI/RunControl (EP#8) uses External Buffer Control (EBC) mode, these endpoints are to be mapped to EBC mode (to be done by EXI target driver). Additionally TRB for RTIT and EXI are maintained in STM (System Trace Module) unit and the EXI target driver will as well configure the TRB location for EP #1 IN and EP#8 (IN and OUT). Since STM/PTI and EXI hardware blocks manage these endpoints and interface to OTG3 controller through EBC interface, there is no need to enable any events (such as XferComplete etc) for these end points. Signed-off-by: Andy Shevchenko Tested-by: Ferry Toth Acked-by: Thinh Nguyen --- drivers/usb/dwc3/dwc3-pci.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/usb/dwc3/dwc3-pci.c b/drivers/usb/dwc3/dwc3-pci.c index 052852f80146..54a4ee2b90b7 100644 --- a/drivers/usb/dwc3/dwc3-pci.c +++ b/drivers/usb/dwc3/dwc3-pci.c @@ -148,11 +148,21 @@ static const struct property_entry dwc3_pci_intel_byt_properties[] = { {} }; +/* + * Intel Merrifield SoC uses these endpoints for tracing and they cannot + * be re-allocated if being used because the side band flow control signals + * are hard wired to certain endpoints: + * - 1 High BW Bulk IN (IN#1) (RTIT) + * - 1 1KB BW Bulk IN (IN#8) + 1 1KB BW Bulk OUT (Run Control) (OUT#8) + */ +static const u8 dwc3_pci_mrfld_reserved_endpoints[] = { 3, 16, 17 }; + static const struct property_entry dwc3_pci_mrfld_properties[] = { PROPERTY_ENTRY_STRING("dr_mode", "otg"), PROPERTY_ENTRY_STRING("linux,extcon-name", "mrfld_bcove_pwrsrc"), PROPERTY_ENTRY_BOOL("snps,dis_u3_susphy_quirk"), PROPERTY_ENTRY_BOOL("snps,dis_u2_susphy_quirk"), + PROPERTY_ENTRY_U8_ARRAY("snps,reserved-endpoints", dwc3_pci_mrfld_reserved_endpoints), PROPERTY_ENTRY_BOOL("snps,usb2-gadget-lpm-disable"), PROPERTY_ENTRY_BOOL("linux,sysdev_is_parent"), {}