From patchwork Thu Feb 13 08:00:01 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ziqi Chen X-Patchwork-Id: 13972912 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 73353C021A0 for ; Thu, 13 Feb 2025 08:08:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=kcXMXBydClXJG21enc1D63EjY+VSku5uMG/oiFrstO0=; b=rO3c+Py7SBdeDJX1vt1laXCcwW c8fBKGPYfSe1H22iivznPvtx9GVOABSeiytNP1H6YUZWCSAhzTRXVlI/gvfbLO0UOtNvMASICnwT1 SkYK6uoZK41I3wDiPIGLmPFuCPBzykamfIrpzGeGDXX9vH87aSG4CgV0sT8I9nWNvdYDKMKSHTj1X Asaxel8aq+e5LtAiEGJSr3uJTx0QR0m0j9nNQbWfHyQaTOh8tP7utbFFWX6iw0OQu69KTT/Bvj0b0 PEtQ0lZFmMwd1w3jfhnggcBWG5ab7rDrHRMnuNwtX8GEMrN6dqwAzkmTe2JurPTW8IK1GOnqQcjo/ h9/7H2pg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tiUH2-0000000ADsq-25lw; Thu, 13 Feb 2025 08:08:40 +0000 Received: from mx0b-0031df01.pphosted.com ([205.220.180.131]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tiU9U-0000000ACCA-0YIX; Thu, 13 Feb 2025 08:00:53 +0000 Received: from pps.filterd (m0279873.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 51CLAKpW026628; Thu, 13 Feb 2025 08:00:33 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:date:from:in-reply-to:message-id :mime-version:references:subject:to; s=qcppdkim1; bh=kcXMXBydClX JG21enc1D63EjY+VSku5uMG/oiFrstO0=; b=aOH/gW2xtMAfD8z7Pz2GGJosSQo fALCyxWa19bzOia4/hqfrUyU0SY8kO8VehumZ6gVUCpeIC+Qi68a0IxsHZY1AbPA 6sgnZjWxWU5QQpIGiBp7SYiinbTd+/U4AV7myWqFbDOBgqoW7YY0Nz2HXXwQlC9p BCTCKKiejvZlBHOXkKZyYEhgezPARfXKh3qEIjuqJvc4aUcYWOLXdvjCMMyHdLes 0qR68gN6i7chokexAftiZY2FKnyp9C7919t8Z5RbtE/QyJpXS1IiDgz1Rij/bnIq iwqAXKzWgPKcp5UX8Q/8TBIWNy61ug4Y/paxjyMVbGjHkHef/7QX5KbLXLw== Received: from aptaippmta02.qualcomm.com (tpe-colo-wan-fw-bordernet.qualcomm.com [103.229.16.4]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 44r5j5ea19-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 13 Feb 2025 08:00:33 +0000 (GMT) Received: from pps.filterd (APTAIPPMTA02.qualcomm.com [127.0.0.1]) by APTAIPPMTA02.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTP id 51D80UWf020811; Thu, 13 Feb 2025 08:00:30 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APTAIPPMTA02.qualcomm.com (PPS) with ESMTPS id 44p0bkxyb4-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 13 Feb 2025 08:00:30 +0000 Received: from APTAIPPMTA02.qualcomm.com (APTAIPPMTA02.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 51D80KWB020786; Thu, 13 Feb 2025 08:00:30 GMT Received: from cbsp-sh-gv.ap.qualcomm.com (CBSP-SH-gv.ap.qualcomm.com [10.231.249.68]) by APTAIPPMTA02.qualcomm.com (PPS) with ESMTPS id 51D80T9P020804 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 13 Feb 2025 08:00:30 +0000 Received: by cbsp-sh-gv.ap.qualcomm.com (Postfix, from userid 393357) id B957240C04; Thu, 13 Feb 2025 16:00:28 +0800 (CST) From: Ziqi Chen To: quic_cang@quicinc.com, bvanassche@acm.org, mani@kernel.org, beanhuo@micron.com, avri.altman@wdc.com, junwoo80.lee@samsung.com, martin.petersen@oracle.com, quic_ziqichen@quicinc.com, quic_nguyenb@quicinc.com, quic_nitirawa@quicinc.com, peter.wang@mediatek.com, quic_rampraka@quicinc.com Cc: linux-arm-msm@vger.kernel.org, linux-scsi@vger.kernel.org, Neil Armstrong , Alim Akhtar , "James E.J. Bottomley" , Stanley Jhu , Manivannan Sadhasivam , Matthias Brugger , AngeloGioacchino Del Regno , Andrew Halaney , Eric Biggers , Minwoo Im , linux-kernel@vger.kernel.org (open list), linux-mediatek@lists.infradead.org (moderated list:UNIVERSAL FLASH STORAGE HOST CONTROLLER DRIVER...), linux-arm-kernel@lists.infradead.org (moderated list:ARM/Mediatek SoC support:Keyword:mediatek) Subject: [PATCH v5 1/8] scsi: ufs: core: Pass target_freq to clk_scale_notify() vop Date: Thu, 13 Feb 2025 16:00:01 +0800 Message-Id: <20250213080008.2984807-2-quic_ziqichen@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250213080008.2984807-1-quic_ziqichen@quicinc.com> References: <20250213080008.2984807-1-quic_ziqichen@quicinc.com> MIME-Version: 1.0 X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: IYpf3aePiYxJI7QI-vCovFBOpBHWOxNb X-Proofpoint-GUID: IYpf3aePiYxJI7QI-vCovFBOpBHWOxNb X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-02-13_02,2025-02-11_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 priorityscore=1501 mlxscore=0 bulkscore=0 suspectscore=0 malwarescore=0 phishscore=0 adultscore=0 spamscore=0 clxscore=1015 impostorscore=0 mlxlogscore=999 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2501170000 definitions=main-2502130060 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250213_000052_303076_9070363D X-CRM114-Status: GOOD ( 16.77 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org From: Can Guo Instead of only two frequencies, if OPP V2 is used, the UFS devfreq clock scaling may scale the clock among multiple frequencies, so just passing up/down to vop clk_scale_notify() is not enough to cover the intermediate clock freqs between the min and max freqs. Hence pass the target_freq , which will be used in successive commits, to clk_scale_notify() to allow the vop to perform corresponding configurations with regard to the clock freqs. Signed-off-by: Can Guo Co-developed-by: Ziqi Chen Signed-off-by: Ziqi Chen Reviewed-by: Bean Huo Reviewed-by: Bart Van Assche Tested-by: Neil Armstrong Reviewed-by: Peter Wang --- v1 -> v2: Modify commit message to make it more clear. v2 -> v3: Change 'vops' to 'vop' in commit message. v4 -> v5: keep the indentation consistent for clk_scale_notify() definition. --- drivers/ufs/core/ufshcd-priv.h | 7 ++++--- drivers/ufs/core/ufshcd.c | 4 ++-- drivers/ufs/host/ufs-mediatek.c | 1 + drivers/ufs/host/ufs-qcom.c | 5 +++-- include/ufs/ufshcd.h | 4 ++-- 5 files changed, 12 insertions(+), 9 deletions(-) diff --git a/drivers/ufs/core/ufshcd-priv.h b/drivers/ufs/core/ufshcd-priv.h index 9ffd94ddf8c7..0549b65f71ed 100644 --- a/drivers/ufs/core/ufshcd-priv.h +++ b/drivers/ufs/core/ufshcd-priv.h @@ -117,11 +117,12 @@ static inline u32 ufshcd_vops_get_ufs_hci_version(struct ufs_hba *hba) return ufshcd_readl(hba, REG_UFS_VERSION); } -static inline int ufshcd_vops_clk_scale_notify(struct ufs_hba *hba, - bool up, enum ufs_notify_change_status status) +static inline int ufshcd_vops_clk_scale_notify(struct ufs_hba *hba, bool up, + unsigned long target_freq, + enum ufs_notify_change_status status) { if (hba->vops && hba->vops->clk_scale_notify) - return hba->vops->clk_scale_notify(hba, up, status); + return hba->vops->clk_scale_notify(hba, up, target_freq, status); return 0; } diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c index acc3607bbd9c..8d295cc827cc 100644 --- a/drivers/ufs/core/ufshcd.c +++ b/drivers/ufs/core/ufshcd.c @@ -1157,7 +1157,7 @@ static int ufshcd_scale_clks(struct ufs_hba *hba, unsigned long freq, int ret = 0; ktime_t start = ktime_get(); - ret = ufshcd_vops_clk_scale_notify(hba, scale_up, PRE_CHANGE); + ret = ufshcd_vops_clk_scale_notify(hba, scale_up, freq, PRE_CHANGE); if (ret) goto out; @@ -1168,7 +1168,7 @@ static int ufshcd_scale_clks(struct ufs_hba *hba, unsigned long freq, if (ret) goto out; - ret = ufshcd_vops_clk_scale_notify(hba, scale_up, POST_CHANGE); + ret = ufshcd_vops_clk_scale_notify(hba, scale_up, freq, POST_CHANGE); if (ret) { if (hba->use_pm_opp) ufshcd_opp_set_rate(hba, diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c index 135cd78109e2..977dd0caaef6 100644 --- a/drivers/ufs/host/ufs-mediatek.c +++ b/drivers/ufs/host/ufs-mediatek.c @@ -1643,6 +1643,7 @@ static void ufs_mtk_clk_scale(struct ufs_hba *hba, bool scale_up) } static int ufs_mtk_clk_scale_notify(struct ufs_hba *hba, bool scale_up, + unsigned long target_freq, enum ufs_notify_change_status status) { if (!ufshcd_is_clkscaling_supported(hba)) diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c index 68040b2ab5f8..b6eef975dc46 100644 --- a/drivers/ufs/host/ufs-qcom.c +++ b/drivers/ufs/host/ufs-qcom.c @@ -1333,8 +1333,9 @@ static int ufs_qcom_clk_scale_down_post_change(struct ufs_hba *hba) return ufs_qcom_set_core_clk_ctrl(hba, false); } -static int ufs_qcom_clk_scale_notify(struct ufs_hba *hba, - bool scale_up, enum ufs_notify_change_status status) +static int ufs_qcom_clk_scale_notify(struct ufs_hba *hba, bool scale_up, + unsigned long target_freq, + enum ufs_notify_change_status status) { struct ufs_qcom_host *host = ufshcd_get_variant(hba); int err; diff --git a/include/ufs/ufshcd.h b/include/ufs/ufshcd.h index d7aca9e61684..02802981f07f 100644 --- a/include/ufs/ufshcd.h +++ b/include/ufs/ufshcd.h @@ -344,8 +344,8 @@ struct ufs_hba_variant_ops { void (*exit)(struct ufs_hba *); u32 (*get_ufs_hci_version)(struct ufs_hba *); int (*set_dma_mask)(struct ufs_hba *); - int (*clk_scale_notify)(struct ufs_hba *, bool, - enum ufs_notify_change_status); + int (*clk_scale_notify)(struct ufs_hba *, bool, unsigned long, + enum ufs_notify_change_status); int (*setup_clocks)(struct ufs_hba *, bool, enum ufs_notify_change_status); int (*hce_enable_notify)(struct ufs_hba *, From patchwork Thu Feb 13 08:00:06 2025 Content-Type: text/plain; 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Thu, 13 Feb 2025 08:00:51 +0000 Received: from APTAIPPMTA01.qualcomm.com (APTAIPPMTA01.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 51D80mKL031714; Thu, 13 Feb 2025 08:00:51 GMT Received: from cbsp-sh-gv.ap.qualcomm.com (CBSP-SH-gv.ap.qualcomm.com [10.231.249.68]) by APTAIPPMTA01.qualcomm.com (PPS) with ESMTPS id 51D80pPt031743 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 13 Feb 2025 08:00:51 +0000 Received: by cbsp-sh-gv.ap.qualcomm.com (Postfix, from userid 393357) id 7067240C04; Thu, 13 Feb 2025 16:00:50 +0800 (CST) From: Ziqi Chen To: quic_cang@quicinc.com, bvanassche@acm.org, mani@kernel.org, beanhuo@micron.com, avri.altman@wdc.com, junwoo80.lee@samsung.com, martin.petersen@oracle.com, quic_ziqichen@quicinc.com, quic_nguyenb@quicinc.com, quic_nitirawa@quicinc.com, peter.wang@mediatek.com, quic_rampraka@quicinc.com Cc: linux-arm-msm@vger.kernel.org, linux-scsi@vger.kernel.org, Neil Armstrong , Alim Akhtar , "James E.J. Bottomley" , Matthias Brugger , AngeloGioacchino Del Regno , Manivannan Sadhasivam , Andrew Halaney , linux-kernel@vger.kernel.org (open list), linux-arm-kernel@lists.infradead.org (moderated list:ARM/Mediatek SoC support:Keyword:mediatek), linux-mediatek@lists.infradead.org (moderated list:ARM/Mediatek SoC support:Keyword:mediatek) Subject: [PATCH v5 6/8] scsi: ufs: core: Check if scaling up is required when disable clkscale Date: Thu, 13 Feb 2025 16:00:06 +0800 Message-Id: <20250213080008.2984807-7-quic_ziqichen@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250213080008.2984807-1-quic_ziqichen@quicinc.com> References: <20250213080008.2984807-1-quic_ziqichen@quicinc.com> MIME-Version: 1.0 X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: Ng-XFjBtEhVtIG9dXqBhJ1xpozRW7NZx X-Proofpoint-ORIG-GUID: Ng-XFjBtEhVtIG9dXqBhJ1xpozRW7NZx X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-02-13_02,2025-02-11_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 impostorscore=0 bulkscore=0 malwarescore=0 mlxlogscore=999 lowpriorityscore=0 suspectscore=0 adultscore=0 mlxscore=0 spamscore=0 priorityscore=1501 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2501170000 definitions=main-2502130060 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250213_000105_479880_A8D77E66 X-CRM114-Status: GOOD ( 10.54 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org When disabling clkscale via the clkscale_enable sysfs entry, UFS driver shall perform scaling up once regardless. Check if scaling up is required or not first to avoid repetitive work. Signed-off-by: Ziqi Chen Co-developed-by: Can Guo Signed-off-by: Can Guo Reviewed-by: Bart Van Assche Tested-by: Neil Armstrong Reviewed-by: Bean Huo Reviewed-by: Peter Wang --- drivers/ufs/core/ufshcd.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c index 9908c0d6a1e1..727ca930c2ef 100644 --- a/drivers/ufs/core/ufshcd.c +++ b/drivers/ufs/core/ufshcd.c @@ -1770,6 +1770,10 @@ static ssize_t ufshcd_clkscale_enable_store(struct device *dev, freq = clki->max_freq; ufshcd_suspend_clkscaling(hba); + + if (!ufshcd_is_devfreq_scaling_required(hba, freq, true)) + goto out_rel; + err = ufshcd_devfreq_scale(hba, freq, true); if (err) dev_err(hba->dev, "%s: failed to scale clocks up %d\n", From patchwork Thu Feb 13 08:00:07 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Ziqi Chen X-Patchwork-Id: 13972927 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 37FE1C0219D for ; Thu, 13 Feb 2025 08:11:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc: To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=q6uyma+HDaTr80GZgI9jQtPOtdwyIuNDfTKOJAgOfB8=; b=McRELKDixvPyRvjJ53gtoxawOs BmBqWbAUPq4nzMmyvSC58tTANCsQNuStkRzaD2LJKt2ft+SwsqOgGVIWK9SNqMgkE2+rXyZ4b5Kg/ 5tNMVGCKIG5U8JajEfcdp+WWqAZyuSPn8VsNJmn9/altbyHcXwjJFqOrrrDnHUETVahEbi6NVSfvo PFekarqKc95KdzEhFOpGSGL8WJMXlpC2hRjMyarqPVI7/Y4gR3cO2/6KC0eJ4mV8i3PzN0Il7CPyP Ij8ySFOe4M7VsXG8zW7pCNB+EmxZEGFXJQCibsFLbz36djQTj+tmV4tvjhTwU8vcAutRCL2NtfOP0 Uvzn9rBw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tiUJq-0000000AEPT-0fPo; Thu, 13 Feb 2025 08:11:34 +0000 Received: from mx0b-0031df01.pphosted.com ([205.220.180.131]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tiU9l-0000000ACEN-3OrJ; Thu, 13 Feb 2025 08:01:11 +0000 Received: from pps.filterd (m0279870.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 51D7H7fP032643; Thu, 13 Feb 2025 08:01:00 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= q6uyma+HDaTr80GZgI9jQtPOtdwyIuNDfTKOJAgOfB8=; b=T20nn3smej6HwXNC ag/TBMOO8EyEcJRhuz28UbUSFUkzkDlA0+fTX2O+0sFdwpS9ySc0TmzMDc6Y5xLT QAEcJ8Qk/nr49tyvDWliXgq9lpVSe8/Wxzu5EOl1Cshqx+dGxnANXPAqnBHjEayI 8p7M47S1rCEdE1/dPjgMVB+5wi2MRJfilexd+bUk+cfwRt/nY8Fhyckcw+Om5g55 Dukwlhltk9ac9tC5Ownxaf9qYeB3JGLUqP+k1Y71QaPqceWx1SIBi/CMmYxQse7V to0SC16AZohxz1DUcvw/IMMt1vofcsQJ2uRFBtFjwc9Lb3t3v2+PIKI5tyRsklWr cSEP/g== Received: from aptaippmta02.qualcomm.com (tpe-colo-wan-fw-bordernet.qualcomm.com [103.229.16.4]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 44sc7b83aw-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 13 Feb 2025 08:00:59 +0000 (GMT) Received: from pps.filterd (APTAIPPMTA02.qualcomm.com [127.0.0.1]) by APTAIPPMTA02.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTP id 51D80v1f020926; Thu, 13 Feb 2025 08:00:57 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APTAIPPMTA02.qualcomm.com (PPS) with ESMTPS id 44p0bkxycb-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 13 Feb 2025 08:00:57 +0000 Received: from APTAIPPMTA02.qualcomm.com (APTAIPPMTA02.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 51D80uOs020920; Thu, 13 Feb 2025 08:00:56 GMT Received: from cbsp-sh-gv.ap.qualcomm.com (CBSP-SH-gv.ap.qualcomm.com [10.231.249.68]) by APTAIPPMTA02.qualcomm.com (PPS) with ESMTPS id 51D80uSV020918 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 13 Feb 2025 08:00:56 +0000 Received: by cbsp-sh-gv.ap.qualcomm.com (Postfix, from userid 393357) id 84A9040C04; Thu, 13 Feb 2025 16:00:55 +0800 (CST) From: Ziqi Chen To: quic_cang@quicinc.com, bvanassche@acm.org, mani@kernel.org, beanhuo@micron.com, avri.altman@wdc.com, junwoo80.lee@samsung.com, martin.petersen@oracle.com, quic_ziqichen@quicinc.com, quic_nguyenb@quicinc.com, quic_nitirawa@quicinc.com, peter.wang@mediatek.com, quic_rampraka@quicinc.com Cc: linux-arm-msm@vger.kernel.org, linux-scsi@vger.kernel.org, Neil Armstrong , Alim Akhtar , "James E.J. Bottomley" , Matthias Brugger , AngeloGioacchino Del Regno , Manivannan Sadhasivam , Andrew Halaney , Eric Biggers , Minwoo Im , linux-kernel@vger.kernel.org (open list), linux-arm-kernel@lists.infradead.org (moderated list:ARM/Mediatek SoC support:Keyword:mediatek), linux-mediatek@lists.infradead.org (moderated list:ARM/Mediatek SoC support:Keyword:mediatek) Subject: [PATCH v5 7/8] scsi: ufs: core: Toggle Write Booster during clock scaling base on gear speed Date: Thu, 13 Feb 2025 16:00:07 +0800 Message-Id: <20250213080008.2984807-8-quic_ziqichen@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250213080008.2984807-1-quic_ziqichen@quicinc.com> References: <20250213080008.2984807-1-quic_ziqichen@quicinc.com> MIME-Version: 1.0 X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: aM9pWxy1_Z6ESXLoG0QYa55UUxTaOM6c X-Proofpoint-GUID: aM9pWxy1_Z6ESXLoG0QYa55UUxTaOM6c X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-02-13_02,2025-02-11_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 mlxlogscore=999 phishscore=0 priorityscore=1501 adultscore=0 lowpriorityscore=0 bulkscore=0 mlxscore=0 malwarescore=0 clxscore=1015 impostorscore=0 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2501170000 definitions=main-2502130060 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250213_000109_964763_65449FDF X-CRM114-Status: GOOD ( 16.88 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org From: Can Guo During clock scaling, Write Booster is toggled on or off based on whether the clock is scaled up or down. However, with OPP V2 powered multi-level gear scaling, the gear can be scaled amongst multiple gear speeds, e.g., it may scale down from G5 to G4, or from G4 to G2. To provide flexibilities, add a new field for clock scaling such that during clock scaling Write Booster can be enabled or disabled based on gear speeds but not based on scaling up or down. Signed-off-by: Can Guo Co-developed-by: Ziqi Chen Signed-off-by: Ziqi Chen Reviewed-by: Bean Huo Tested-by: Neil Armstrong Reviewed-by: Peter Wang --- v1 - > v2: Initialize the local variables "wb_en" as "false". v3 -> v4: 1. Add comment for default initialized wb_gear. 2. Remove the unnecessary variable “wb_en" in function ufshcd_clock_scaling_unprepare(). --- drivers/ufs/core/ufshcd.c | 12 ++++++++---- include/ufs/ufshcd.h | 3 +++ 2 files changed, 11 insertions(+), 4 deletions(-) diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c index 727ca930c2ef..628bf2aebbeb 100644 --- a/drivers/ufs/core/ufshcd.c +++ b/drivers/ufs/core/ufshcd.c @@ -1393,13 +1393,13 @@ static int ufshcd_clock_scaling_prepare(struct ufs_hba *hba, u64 timeout_us) return ret; } -static void ufshcd_clock_scaling_unprepare(struct ufs_hba *hba, int err, bool scale_up) +static void ufshcd_clock_scaling_unprepare(struct ufs_hba *hba, int err) { up_write(&hba->clk_scaling_lock); - /* Enable Write Booster if we have scaled up else disable it */ + /* Enable Write Booster if current gear requires it else disable it */ if (ufshcd_enable_wb_if_scaling_up(hba) && !err) - ufshcd_wb_toggle(hba, scale_up); + ufshcd_wb_toggle(hba, hba->pwr_info.gear_rx >= hba->clk_scaling.wb_gear); mutex_unlock(&hba->wb_mutex); @@ -1454,7 +1454,7 @@ static int ufshcd_devfreq_scale(struct ufs_hba *hba, unsigned long freq, } out_unprepare: - ufshcd_clock_scaling_unprepare(hba, ret, scale_up); + ufshcd_clock_scaling_unprepare(hba, ret); return ret; } @@ -1814,6 +1814,10 @@ static void ufshcd_init_clk_scaling(struct ufs_hba *hba) if (!hba->clk_scaling.min_gear) hba->clk_scaling.min_gear = UFS_HS_G1; + if (!hba->clk_scaling.wb_gear) + /* Use intermediate gear speed HS_G3 as the default wb_gear */ + hba->clk_scaling.wb_gear = UFS_HS_G3; + INIT_WORK(&hba->clk_scaling.suspend_work, ufshcd_clk_scaling_suspend_work); INIT_WORK(&hba->clk_scaling.resume_work, diff --git a/include/ufs/ufshcd.h b/include/ufs/ufshcd.h index b34301de3cf8..6633c1a1c224 100644 --- a/include/ufs/ufshcd.h +++ b/include/ufs/ufshcd.h @@ -447,6 +447,8 @@ struct ufs_clk_gating { * @resume_work: worker to resume devfreq * @target_freq: frequency requested by devfreq framework * @min_gear: lowest HS gear to scale down to + * @wb_gear: enable Write Booster when HS gear scales above or equal to it, else + * disable Write Booster * @is_enabled: tracks if scaling is currently enabled or not, controlled by * clkscale_enable sysfs node * @is_allowed: tracks if scaling is currently allowed or not, used to block @@ -467,6 +469,7 @@ struct ufs_clk_scaling { struct work_struct resume_work; unsigned long target_freq; u32 min_gear; + u32 wb_gear; bool is_enabled; bool is_allowed; bool is_initialized;