From patchwork Tue Mar 19 06:50:06 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anson Huang X-Patchwork-Id: 10858873 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2B2B06C2 for ; Tue, 19 Mar 2019 06:51:00 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id F268B28740 for ; Tue, 19 Mar 2019 06:50:59 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E655C2956C; Tue, 19 Mar 2019 06:50:59 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 63AA829570 for ; Tue, 19 Mar 2019 06:50:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:In-Reply-To:References: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=UpBhYFzqL21NmIS7zxv2YSwDHWR4GDUaBkbc+GfBlik=; b=PzZKa0QMTOE0j/ OFYgYgXM1CzCKVa6FmLGRopIGY6V8uEh6chgH7IwNh7/i3RykFBCiy7e1AhGHhA3I7fjvOmCwTplz 2hWDIC5cxNNbgj9XQVTjetiI4Lceg+JTbB5dXtr70rY/GFRaaJ7+fl9Oi/v7/Uo1Ee/BAOvnO68FD QcGkmIs2hsIrk1Aen39WjDxv0Wi5sm1BYxzRJdumAO0G2GrmMVlyILetuKcNenIEBH5RZE3skrzFW mrZ3nem36pKbCuid8mw8djvE+FGrwWeKJjB5aC1tSbBstkyALeatKSNLZOhuhW7prYtsiZC/jJ6lj oQC9Nnp3TjITVDDGsiRA==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1h68aH-0005tI-NY; Tue, 19 Mar 2019 06:50:49 +0000 Received: from mail-eopbgr150081.outbound.protection.outlook.com ([40.107.15.81] helo=EUR01-DB5-obe.outbound.protection.outlook.com) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1h68aC-0005ri-K5 for linux-arm-kernel@lists.infradead.org; Tue, 19 Mar 2019 06:50:47 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=QYrfdCybAFnNgD9DH8DV4chU4OPX+5rBcPx14fH7wTk=; b=v9NBPp9+cwYWlS7PZOAidV2mQ3FikDuCtOwGAoVKz+OXM1obTfWG8tUG0MweYs8qHXJxxHUXI9ZkjRiEnR8A0YYP6NJMw7WG+9a9ZUKgH01jfthGx2nfRB0vrAgaokdhzH43LxUhzmy6fGPyynBD8vqrtqjyce2M1243nFxxrCk= Received: from DB3PR0402MB3916.eurprd04.prod.outlook.com (52.134.72.18) by DB3PR0402MB3788.eurprd04.prod.outlook.com (52.134.72.17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1709.14; Tue, 19 Mar 2019 06:50:34 +0000 Received: from DB3PR0402MB3916.eurprd04.prod.outlook.com ([fe80::f1b4:a1fb:cfd1:3f08]) by DB3PR0402MB3916.eurprd04.prod.outlook.com ([fe80::f1b4:a1fb:cfd1:3f08%6]) with mapi id 15.20.1709.015; Tue, 19 Mar 2019 06:50:34 +0000 From: Anson Huang To: "thierry.reding@gmail.com" , "robh+dt@kernel.org" , "mark.rutland@arm.com" , "shawnguo@kernel.org" , "s.hauer@pengutronix.de" , "kernel@pengutronix.de" , "festevam@gmail.com" , "linux@armlinux.org.uk" , "stefan@agner.ch" , "otavio@ossystems.com.br" , Leonard Crestez , "schnitzeltony@gmail.com" , "jan.tuerk@emtrion.com" , Robin Gong , "linux-pwm@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "u.kleine-koenig@pengutronix.de" Subject: [PATCH V6 1/5] dt-bindings: pwm: Add i.MX TPM PWM binding Thread-Topic: [PATCH V6 1/5] dt-bindings: pwm: Add i.MX TPM PWM binding Thread-Index: AQHU3h/8vPmt411kB02aOAUpMTuiLA== Date: Tue, 19 Mar 2019 06:50:06 +0000 Message-ID: <1552977898-5590-2-git-send-email-Anson.Huang@nxp.com> References: <1552977898-5590-1-git-send-email-Anson.Huang@nxp.com> In-Reply-To: <1552977898-5590-1-git-send-email-Anson.Huang@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: git-send-email 2.7.4 x-clientproxiedby: HK0PR03CA0082.apcprd03.prod.outlook.com (2603:1096:203:72::22) To DB3PR0402MB3916.eurprd04.prod.outlook.com (2603:10a6:8:10::18) authentication-results: spf=none (sender IP is ) smtp.mailfrom=anson.huang@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [119.31.174.66] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 4420ee99-016c-4615-fdf5-08d6ac371eec x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; PCL:0; RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600127)(711020)(4605104)(4618075)(2017052603328)(7153060)(7193020); SRVR:DB3PR0402MB3788; x-ms-traffictypediagnostic: DB3PR0402MB3788: x-microsoft-antispam-prvs: x-forefront-prvs: 0981815F2F x-forefront-antispam-report: SFV:NSPM; SFS:(10009020)(366004)(376002)(39860400002)(346002)(396003)(136003)(199004)(189003)(6506007)(50226002)(25786009)(8936002)(14454004)(26005)(76176011)(256004)(386003)(4326008)(99286004)(110136005)(305945005)(8676002)(81166006)(68736007)(102836004)(446003)(81156014)(316002)(7416002)(7736002)(186003)(2501003)(105586002)(106356001)(6486002)(11346002)(97736004)(6436002)(2616005)(3846002)(486006)(2906002)(476003)(71200400001)(66066001)(52116002)(478600001)(5660300002)(6666004)(71190400001)(6116002)(2201001)(86362001)(36756003)(53936002)(6512007)(921003)(1121003); DIR:OUT; SFP:1101; SCL:1; SRVR:DB3PR0402MB3788; H:DB3PR0402MB3916.eurprd04.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: iKxdZYqKCNAtkeAwEX9i8Hzo9bi4T8jBNGWkHg4xtUuOETzBMREYlsha7V5fEH9k3BtglspmXiSzRSXxa8oxOD94oBdtOOTIGGoukc6YxgEzQNO5qfNoO/2pmIzVJa7CZwQA8l75vHMCip8RyKRs+dN6q3PHoMPoRo5aXtD6OIdsW4SvRFgFdyzBv4w3K0n3m3HoTg3R72hEP6Qjbl4MIdmHwVQdqoVmExZCsk1EIXci6ZCQ4Z3mdlndVA8bcR7ZeXMuhaOfuIYGebq/lrSPUxxB5XrM6MxHzDI9Rij28M5eU//csRTC4WUENirqlLxSy/tIQ4HnJ/dSaWxzst0IBU+YrosSoSvlKaDuTK2qaocjPRNv1p+Z/q9Pc0/nEI9Dc48CCO8kvCxUdgUaVeZsWvQJMNilDTSBq9nRNBCOixc= MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 4420ee99-016c-4615-fdf5-08d6ac371eec X-MS-Exchange-CrossTenant-originalarrivaltime: 19 Mar 2019 06:50:06.4692 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB3PR0402MB3788 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190318_235044_790949_F6633CD9 X-CRM114-Status: GOOD ( 12.27 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: dl-linux-imx Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Add i.MX TPM(Low Power Timer/Pulse Width Modulation Module) PWM binding. Signed-off-by: Anson Huang --- Changes since V5: - improve compatible string; - change #pwm-cells to 3; - "pwm" -> "PWM"; --- .../devicetree/bindings/pwm/imx-tpm-pwm.txt | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) create mode 100644 Documentation/devicetree/bindings/pwm/imx-tpm-pwm.txt diff --git a/Documentation/devicetree/bindings/pwm/imx-tpm-pwm.txt b/Documentation/devicetree/bindings/pwm/imx-tpm-pwm.txt new file mode 100644 index 0000000..94f1ad5 --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/imx-tpm-pwm.txt @@ -0,0 +1,22 @@ +Freescale i.MX TPM PWM controller + +Required properties: +- compatible : Should be "fsl,imx-tpm". +- reg: Physical base address and length of the controller's registers. +- #pwm-cells: Should be 3. See pwm.txt in this directory for a description of the cells format. +- clocks : The clock provided by the SoC to drive the PWM. +- interrupts: The interrupt for the PWM controller. + +Note: The TPM counter and period counter are shared between multiple channels, so all channels +should use same period setting. + +Example: + +pwm0: tpm@40250000 { + compatible = "fsl,imx-tpm"; + reg = <0x40250000 0x1000>; + assigned-clocks = <&clks IMX7ULP_CLK_LPTPM4>; + assigned-clock-parents = <&clks IMX7ULP_CLK_SOSC_BUS_CLK>; + clocks = <&clks IMX7ULP_CLK_LPTPM4>; + #pwm-cells = <3>; +}; From patchwork Tue Mar 19 06:50:12 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anson Huang X-Patchwork-Id: 10858879 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1F8046C2 for ; Tue, 19 Mar 2019 06:51:32 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id EED7428740 for ; Tue, 19 Mar 2019 06:51:31 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E219329003; Tue, 19 Mar 2019 06:51:31 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id D7A35294FF for ; Tue, 19 Mar 2019 06:51:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:In-Reply-To:References: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=nNSanyIUGAxlYqUjgcL66qXH0jZ3m/0mPg5Rei0GLzI=; b=otopHb41oauGWW ITUl0AqatwVY5E6ZXiy2mBUNZH1Ns8caG3c1gJexUPBWiTolGG+mLDk4IkEfh2F9MyrjCGkEI+YU7 /teVvmwFGOUG4Xf+g9z2I/wtRGL3dvjw3o8gHXnYqtLrw7xU2AjG6DFcSu2E3JXyjELnBvkGzC1eZ Q/PWRbMXojQyfZUVOVL3NOE93n1BYXYT3dN8feSuapEfn0dgTt/P55CErTvY/yzgog3kfbNgfcFg7 SIXYYJYrnbAepWKWgikB929k0NiL0GtubdGP6ONieFetU35DccHk7af5ly1ujPhURc2rR6oREG+2z BvMseai3e3k8TmSGpL8Q==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1h68au-0006aV-Eh; Tue, 19 Mar 2019 06:51:28 +0000 Received: from mail-eopbgr150081.outbound.protection.outlook.com ([40.107.15.81] helo=EUR01-DB5-obe.outbound.protection.outlook.com) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1h68aG-0005ri-44 for linux-arm-kernel@lists.infradead.org; Tue, 19 Mar 2019 06:50:50 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=u0LDb8kDY8pVRSkkkFYTYGKwpeSaVIgCUyANvxL3Els=; b=xcQkAvPFSsKdEocFU1Cu0hvFEPzcOv+uCy9bOwxpdaSdyyysGNB8IR/nh50zj3vqsdv74aurbJYFIZo82sLrca7GlaxTsihYmkSlNyzVNARn9DUPV9XkZoVMMUKEzFRExX8j4P1umtrVttrBo+SOuD7kKs758pprQSqZiWbY/u4= Received: from DB3PR0402MB3916.eurprd04.prod.outlook.com (52.134.72.18) by DB3PR0402MB3788.eurprd04.prod.outlook.com (52.134.72.17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1709.14; Tue, 19 Mar 2019 06:50:34 +0000 Received: from DB3PR0402MB3916.eurprd04.prod.outlook.com ([fe80::f1b4:a1fb:cfd1:3f08]) by DB3PR0402MB3916.eurprd04.prod.outlook.com ([fe80::f1b4:a1fb:cfd1:3f08%6]) with mapi id 15.20.1709.015; Tue, 19 Mar 2019 06:50:34 +0000 From: Anson Huang To: "thierry.reding@gmail.com" , "robh+dt@kernel.org" , "mark.rutland@arm.com" , "shawnguo@kernel.org" , "s.hauer@pengutronix.de" , "kernel@pengutronix.de" , "festevam@gmail.com" , "linux@armlinux.org.uk" , "stefan@agner.ch" , "otavio@ossystems.com.br" , Leonard Crestez , "schnitzeltony@gmail.com" , "jan.tuerk@emtrion.com" , Robin Gong , "linux-pwm@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "u.kleine-koenig@pengutronix.de" Subject: [PATCH V6 2/5] pwm: Add i.MX TPM PWM driver support Thread-Topic: [PATCH V6 2/5] pwm: Add i.MX TPM PWM driver support Thread-Index: AQHU3iAAbXQsZVPnD0StwW4JRo2kLQ== Date: Tue, 19 Mar 2019 06:50:12 +0000 Message-ID: <1552977898-5590-3-git-send-email-Anson.Huang@nxp.com> References: <1552977898-5590-1-git-send-email-Anson.Huang@nxp.com> In-Reply-To: <1552977898-5590-1-git-send-email-Anson.Huang@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: git-send-email 2.7.4 x-clientproxiedby: HK0PR03CA0082.apcprd03.prod.outlook.com (2603:1096:203:72::22) To DB3PR0402MB3916.eurprd04.prod.outlook.com (2603:10a6:8:10::18) authentication-results: spf=none (sender IP is ) smtp.mailfrom=anson.huang@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [119.31.174.66] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 5933b225-f55d-4cc9-e972-08d6ac3722b4 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; PCL:0; RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600127)(711020)(4605104)(4618075)(2017052603328)(7153060)(7193020); SRVR:DB3PR0402MB3788; x-ms-traffictypediagnostic: DB3PR0402MB3788: x-microsoft-antispam-prvs: x-forefront-prvs: 0981815F2F x-forefront-antispam-report: SFV:NSPM; SFS:(10009020)(366004)(376002)(39860400002)(346002)(396003)(136003)(199004)(189003)(6506007)(50226002)(25786009)(8936002)(14454004)(26005)(76176011)(256004)(30864003)(14444005)(386003)(4326008)(99286004)(110136005)(305945005)(8676002)(81166006)(68736007)(102836004)(446003)(81156014)(316002)(7416002)(7736002)(186003)(2501003)(105586002)(106356001)(6486002)(11346002)(97736004)(6436002)(2616005)(3846002)(486006)(2906002)(53946003)(476003)(71200400001)(66066001)(52116002)(478600001)(5660300002)(6666004)(71190400001)(6116002)(2201001)(86362001)(36756003)(53936002)(6512007)(921003)(1121003); DIR:OUT; SFP:1101; SCL:1; SRVR:DB3PR0402MB3788; H:DB3PR0402MB3916.eurprd04.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: cObJtyM7vhCtwFIyNUDHbDk3sY0Or3cvF07in//NZNVzodsKXbufN1V2Bi0MXQUQs5XYIkirJtl8n53KP1ROjXvCwRh9fO/8vf5CLVvfv6Us72NOPZODk0nHtz5n+n604u878xl/JLcemmtY3AaCkJvjz+hNCEGJrcFhwI8lacpDhErAoJKC151Kn1a2VWsaK9zrYaEQnSs6+OrBioxVGHe1VQii3IOW83SMAmx7Y4wqk69aKzcE+RAdXDB+4yeiypb3g4Q9veNLhmPLNujR4oj9pLgcPrLI7yHdevOOPJKAaszqzZHSWWreIq6Z7+srg/JYBspTC98HlX5G+Z+/YqUb76VsHAdg5tt2qtcn7ePMCEtjU02NBiKtynNwJ28FbdQeiFgONtG4LXhfVm/AtORSwa7oxr+bmQHMnrBV+eo= MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 5933b225-f55d-4cc9-e972-08d6ac3722b4 X-MS-Exchange-CrossTenant-originalarrivaltime: 19 Mar 2019 06:50:12.9016 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB3PR0402MB3788 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190318_235048_298453_433AFE83 X-CRM114-Status: GOOD ( 21.67 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: dl-linux-imx Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP i.MX7ULP has TPM(Low Power Timer/Pulse Width Modulation Module) inside, it can support multiple PWM channels, all the channels share same counter and period setting, but each channel can configure its duty and polarity independently. There are several TPM modules in i.MX7ULP, the number of channels in TPM modules are different, it can be read from each TPM module's PARAM register. Signed-off-by: Anson Huang --- Changes since V5: - improve commit message body; - add period round function; - use per channel data for saving channel's private data; - improve error message output during probe; - improve different period settings by different channels' handling; - support #pwm-cells 3 cases. --- drivers/pwm/Kconfig | 11 ++ drivers/pwm/Makefile | 1 + drivers/pwm/pwm-imx-tpm.c | 463 ++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 475 insertions(+) create mode 100644 drivers/pwm/pwm-imx-tpm.c diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig index 54f8238..3ea0391 100644 --- a/drivers/pwm/Kconfig +++ b/drivers/pwm/Kconfig @@ -210,6 +210,17 @@ config PWM_IMX27 To compile this driver as a module, choose M here: the module will be called pwm-imx27. +config PWM_IMX_TPM + tristate "i.MX TPM PWM support" + depends on ARCH_MXC || COMPILE_TEST + depends on HAVE_CLK && HAS_IOMEM + help + Generic PWM framework driver for i.MX7ULP TPM module, TPM's full + name is Low Power Timer/Pulse Width Modulation Module. + + To compile this driver as a module, choose M here: the module + will be called pwm-imx-tpm. + config PWM_JZ4740 tristate "Ingenic JZ47xx PWM support" depends on MACH_INGENIC diff --git a/drivers/pwm/Makefile b/drivers/pwm/Makefile index 448825e..c368599 100644 --- a/drivers/pwm/Makefile +++ b/drivers/pwm/Makefile @@ -19,6 +19,7 @@ obj-$(CONFIG_PWM_HIBVT) += pwm-hibvt.o obj-$(CONFIG_PWM_IMG) += pwm-img.o obj-$(CONFIG_PWM_IMX1) += pwm-imx1.o obj-$(CONFIG_PWM_IMX27) += pwm-imx27.o +obj-$(CONFIG_PWM_IMX_TPM) += pwm-imx-tpm.o obj-$(CONFIG_PWM_JZ4740) += pwm-jz4740.o obj-$(CONFIG_PWM_LP3943) += pwm-lp3943.o obj-$(CONFIG_PWM_LPC18XX_SCT) += pwm-lpc18xx-sct.o diff --git a/drivers/pwm/pwm-imx-tpm.c b/drivers/pwm/pwm-imx-tpm.c new file mode 100644 index 0000000..bb6b27e --- /dev/null +++ b/drivers/pwm/pwm-imx-tpm.c @@ -0,0 +1,463 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright 2018-2019 NXP. + * + * Limitations: + * - The TPM counter and period counter are shared between + * multiple channels, so all channels should use same period + * settings. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define PWM_IMX_TPM_PARAM 0x4 +#define PWM_IMX_TPM_GLOBAL 0x8 +#define PWM_IMX_TPM_SC 0x10 +#define PWM_IMX_TPM_CNT 0x14 +#define PWM_IMX_TPM_MOD 0x18 +#define PWM_IMX_TPM_CnSC(n) (0x20 + (n) * 0x8) +#define PWM_IMX_TPM_CnV(n) (0x24 + (n) * 0x8) + +#define PWM_IMX_TPM_PARAM_CHAN GENMASK(7, 0) + +#define PWM_IMX_TPM_SC_PS GENMASK(2, 0) +#define PWM_IMX_TPM_SC_CMOD GENMASK(4, 3) +#define PWM_IMX_TPM_SC_CMOD_INC_EVERY_CLK BIT(3) +#define PWM_IMX_TPM_SC_CPWMS BIT(5) + +#define PWM_IMX_TPM_CnSC_CHF BIT(7) +#define PWM_IMX_TPM_CnSC_MSB BIT(5) +#define PWM_IMX_TPM_CnSC_MSA BIT(4) +#define PWM_IMX_TPM_CnSC_ELS GENMASK(3, 2) /* combine ELSA and ELSB as a field */ + +#define PWM_IMX_TPM_MOD_MOD GENMASK(15, 0) + +#define PWM_IMX_TPM_MAX_COUNT 0xffff + +struct imx_tpm_pwm_chip { + struct pwm_chip chip; + struct clk *clk; + void __iomem *base; + struct mutex lock; + u32 user_count; + u32 enable_count; + u32 real_period; +}; + +struct imx_tpm_pwm_channel { + u32 config; + bool status; +}; + +static inline struct imx_tpm_pwm_chip *to_imx_tpm_pwm_chip(struct pwm_chip *chip) +{ + return container_of(chip, struct imx_tpm_pwm_chip, chip); +} + +static unsigned int pwm_imx_tpm_round_period(struct pwm_chip *chip, + u32 period) +{ + struct imx_tpm_pwm_chip *tpm = to_imx_tpm_pwm_chip(chip); + u32 rate, real_period, prescale, period_count; + u64 tmp; + + rate = clk_get_rate(tpm->clk); + tmp = period; + tmp *= rate; + tmp = DIV_ROUND_CLOSEST_ULL(tmp, NSEC_PER_SEC); + if (tmp <= PWM_IMX_TPM_MAX_COUNT) { + prescale = 0; + } else { + prescale = roundup_pow_of_two(tmp / + (PWM_IMX_TPM_MAX_COUNT + 1)); + prescale = ilog2(prescale); + } + + /* if no valid prescale found, use MAX instead */ + if ((!FIELD_FIT(PWM_IMX_TPM_SC_PS, prescale))) + prescale = PWM_IMX_TPM_SC_PS >> __bf_shf(PWM_IMX_TPM_SC_PS); + + /* if no valid period count found, use MAX instead */ + period_count = (tmp + ((1 << prescale) >> 1)) >> prescale; + if (period_count > PWM_IMX_TPM_MOD_MOD) + period_count = PWM_IMX_TPM_MOD_MOD; + + /* calculate real period HW can support */ + tmp = period_count; + tmp *= (1 << prescale) * NSEC_PER_SEC; + real_period = DIV_ROUND_CLOSEST_ULL(tmp, rate); + + return real_period; +} + +static void pwm_imx_tpm_config_counter(struct pwm_chip *chip, u32 period) +{ + struct imx_tpm_pwm_chip *tpm = to_imx_tpm_pwm_chip(chip); + u32 val, rate, prescale, saved_cmod; + u64 tmp; + + rate = clk_get_rate(tpm->clk); + tmp = period; + tmp *= rate; + tmp = DIV_ROUND_CLOSEST_ULL(tmp, NSEC_PER_SEC); + if (tmp <= PWM_IMX_TPM_MAX_COUNT) { + prescale = 0; + } else { + prescale = roundup_pow_of_two(tmp / + (PWM_IMX_TPM_MAX_COUNT + 1)); + prescale = ilog2(prescale); + } + + /* make sure counter is disabled for programming prescale */ + val = readl(tpm->base + PWM_IMX_TPM_SC); + saved_cmod = FIELD_GET(PWM_IMX_TPM_SC_CMOD, val); + if (saved_cmod) { + val &= ~PWM_IMX_TPM_SC_CMOD; + writel(val, tpm->base + PWM_IMX_TPM_SC); + } + + /* set TPM counter prescale */ + val = readl(tpm->base + PWM_IMX_TPM_SC); + val &= ~PWM_IMX_TPM_SC_PS; + val |= FIELD_PREP(PWM_IMX_TPM_SC_PS, prescale); + writel(val, tpm->base + PWM_IMX_TPM_SC); + + /* + * set period count: according to RM, the MOD register is + * updated immediately after CMOD[1:0] = 2b'00 above + */ + val = (tmp + ((1 << prescale) >> 1)) >> prescale; + writel(val, tpm->base + PWM_IMX_TPM_MOD); + + /* restore the clock mode if necessary */ + if (saved_cmod) { + val = readl(tpm->base + PWM_IMX_TPM_SC); + val |= FIELD_PREP(PWM_IMX_TPM_SC_CMOD, saved_cmod); + writel(val, tpm->base + PWM_IMX_TPM_SC); + } + + tpm->real_period = period; +} + +static void pwm_imx_tpm_config(struct pwm_chip *chip, + struct pwm_device *pwm, + u32 period, + u32 duty_cycle, + enum pwm_polarity polarity) +{ + struct imx_tpm_pwm_chip *tpm = to_imx_tpm_pwm_chip(chip); + struct imx_tpm_pwm_channel *chan = pwm_get_chip_data(pwm); + u32 val; + u64 tmp; + + /* set duty counter */ + tmp = readl(tpm->base + PWM_IMX_TPM_MOD) & PWM_IMX_TPM_MOD_MOD; + tmp *= duty_cycle; + val = DIV_ROUND_CLOSEST_ULL(tmp, period); + writel(val, tpm->base + PWM_IMX_TPM_CnV(pwm->hwpwm)); + + /* + * set polarity (for edge-aligned PWM modes) + * + * ELS[1:0] = 2b10 yields normal polarity behaviour, + * ELS[1:0] = 2b01 yields inversed polarity. + * The other values are reserved. + */ + val = readl(tpm->base + PWM_IMX_TPM_CnSC(pwm->hwpwm)); + val &= ~(PWM_IMX_TPM_CnSC_ELS | PWM_IMX_TPM_CnSC_MSA); + val |= PWM_IMX_TPM_CnSC_MSB; + val |= (polarity == PWM_POLARITY_NORMAL) ? + FIELD_PREP(PWM_IMX_TPM_CnSC_ELS, 0x2) : + FIELD_PREP(PWM_IMX_TPM_CnSC_ELS, 0x1); + /* + * polarity settings will enabled/disable output status + * immediately, so here ONLY save the config and write + * it into register when channel is enabled/disabled. + */ + chan->config = val; +} + +/* + * When a channel's polarity is configured, the polarity settings + * will be saved and ONLY write into the register when the channel + * is enabled. + * + * When a channel is disabled, its polarity settings will be saved + * and its output will be disabled by clearing polarity settings. + * + * When a channel is enabled, its polarity settings will be restored + * and output will be enabled again. + */ +static void pwm_imx_tpm_enable(struct pwm_chip *chip, + struct pwm_device *pwm, + bool enable) +{ + struct imx_tpm_pwm_chip *tpm = to_imx_tpm_pwm_chip(chip); + struct imx_tpm_pwm_channel *chan = pwm_get_chip_data(pwm); + u32 val; + + val = readl(tpm->base + PWM_IMX_TPM_SC); + if (enable) { + /* restore channel config */ + writel(chan->config, + tpm->base + PWM_IMX_TPM_CnSC(pwm->hwpwm)); + + if (++tpm->enable_count == 1) { + /* start TPM counter */ + val |= PWM_IMX_TPM_SC_CMOD_INC_EVERY_CLK; + writel(val, tpm->base + PWM_IMX_TPM_SC); + } + } else { + /* disable channel */ + val = readl(tpm->base + PWM_IMX_TPM_CnSC(pwm->hwpwm)); + val &= ~(PWM_IMX_TPM_CnSC_MSA | PWM_IMX_TPM_CnSC_MSB | + PWM_IMX_TPM_CnSC_ELS); + writel(val, tpm->base + PWM_IMX_TPM_CnSC(pwm->hwpwm)); + + if (--tpm->enable_count == 0) { + /* stop TPM counter since all channels are disabled */ + val &= ~PWM_IMX_TPM_SC_CMOD; + writel(val, tpm->base + PWM_IMX_TPM_SC); + } + } + + /* update channel status */ + chan->status = enable; +} + +static void pwm_imx_tpm_get_state(struct pwm_chip *chip, + struct pwm_device *pwm, + struct pwm_state *state) +{ + struct imx_tpm_pwm_chip *tpm = to_imx_tpm_pwm_chip(chip); + u32 rate, val; + u64 tmp; + + /* get period */ + state->period = tpm->real_period; + + /* get duty cycle */ + rate = clk_get_rate(tpm->clk); + val = readl(tpm->base + PWM_IMX_TPM_SC); + val = FIELD_GET(PWM_IMX_TPM_SC_PS, val); + tmp = readl(tpm->base + PWM_IMX_TPM_CnV(pwm->hwpwm)); + tmp *= (1 << val) * NSEC_PER_SEC; + state->duty_cycle = DIV_ROUND_CLOSEST_ULL(tmp, rate); + + /* get polarity */ + val = readl(tpm->base + PWM_IMX_TPM_CnSC(pwm->hwpwm)); + if (FIELD_GET(PWM_IMX_TPM_CnSC_ELS, val) == 0x1) + state->polarity = PWM_POLARITY_INVERSED; + else if (FIELD_GET(PWM_IMX_TPM_CnSC_ELS, val) == 0x2) + state->polarity = PWM_POLARITY_NORMAL; + + /* get channel status */ + state->enabled = FIELD_GET(PWM_IMX_TPM_CnSC_ELS, val) ? true : false; +} + +static int pwm_imx_tpm_apply(struct pwm_chip *chip, struct pwm_device *pwm, + struct pwm_state *state) +{ + struct imx_tpm_pwm_chip *tpm = to_imx_tpm_pwm_chip(chip); + struct imx_tpm_pwm_channel *chan = pwm_get_chip_data(pwm); + u32 p; + + mutex_lock(&tpm->lock); + + if (state->period != tpm->real_period) { + /* + * TPM counter is shared by multiple channels, so + * prescale and period can NOT be modified when + * there are multiple channels in use with different + * period settings. + */ + p = pwm_imx_tpm_round_period(chip, state->period); + if (p != tpm->real_period && tpm->user_count != 1) + return -EBUSY; + else if (p != tpm->real_period) + pwm_imx_tpm_config_counter(chip, p); + } + + if (state->enabled == false) { + /* + * if eventually the PWM output is LOW, either + * duty cycle is 0 or status is disabled, need + * to make sure the output pin is LOW. + */ + pwm_imx_tpm_config(chip, pwm, state->period, + 0, state->polarity); + if (chan->status == true) + pwm_imx_tpm_enable(chip, pwm, false); + } else { + pwm_imx_tpm_config(chip, pwm, state->period, + state->duty_cycle, state->polarity); + if (chan->status == false) + pwm_imx_tpm_enable(chip, pwm, true); + } + + mutex_unlock(&tpm->lock); + + return 0; +} + +static int pwm_imx_tpm_request(struct pwm_chip *chip, struct pwm_device *pwm) +{ + struct imx_tpm_pwm_chip *tpm = to_imx_tpm_pwm_chip(chip); + struct imx_tpm_pwm_channel *chan; + + chan = devm_kzalloc(chip->dev, sizeof(*chan), GFP_KERNEL); + if (!chan) + return -ENOMEM; + + pwm_set_chip_data(pwm, chan); + + mutex_lock(&tpm->lock); + tpm->user_count++; + mutex_unlock(&tpm->lock); + + return 0; +} + +static void pwm_imx_tpm_free(struct pwm_chip *chip, struct pwm_device *pwm) +{ + struct imx_tpm_pwm_chip *tpm = to_imx_tpm_pwm_chip(chip); + + mutex_lock(&tpm->lock); + tpm->user_count--; + mutex_unlock(&tpm->lock); + + devm_kfree(chip->dev, pwm_get_chip_data(pwm)); + pwm_set_chip_data(pwm, NULL); +} + +static const struct pwm_ops imx_tpm_pwm_ops = { + .request = pwm_imx_tpm_request, + .free = pwm_imx_tpm_free, + .get_state = pwm_imx_tpm_get_state, + .apply = pwm_imx_tpm_apply, + .owner = THIS_MODULE, +}; + +static int pwm_imx_tpm_probe(struct platform_device *pdev) +{ + struct imx_tpm_pwm_chip *tpm; + int ret; + u32 val; + + tpm = devm_kzalloc(&pdev->dev, sizeof(*tpm), GFP_KERNEL); + if (!tpm) + return -ENOMEM; + + platform_set_drvdata(pdev, tpm); + + tpm->base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(tpm->base)) + return PTR_ERR(tpm->base); + + tpm->clk = devm_clk_get(&pdev->dev, NULL); + if (IS_ERR(tpm->clk)) { + ret = PTR_ERR(tpm->clk); + if (ret != -EPROBE_DEFER) + dev_err(&pdev->dev, + "failed to get PWM clock: %d\n", ret); + return ret; + } + + ret = clk_prepare_enable(tpm->clk); + if (ret) { + dev_err(&pdev->dev, + "failed to prepare or enable clock: %d\n", ret); + return ret; + } + + tpm->chip.dev = &pdev->dev; + tpm->chip.ops = &imx_tpm_pwm_ops; + tpm->chip.base = -1; + tpm->chip.of_xlate = of_pwm_xlate_with_flags; + tpm->chip.of_pwm_n_cells = 3; + + /* get number of channels */ + val = readl(tpm->base + PWM_IMX_TPM_PARAM); + tpm->chip.npwm = FIELD_GET(PWM_IMX_TPM_PARAM_CHAN, val); + + mutex_init(&tpm->lock); + + ret = pwmchip_add(&tpm->chip); + if (ret) { + dev_err(&pdev->dev, "failed to add PWM chip: %d\n", ret); + clk_disable_unprepare(tpm->clk); + } + + return ret; +} + +static int pwm_imx_tpm_remove(struct platform_device *pdev) +{ + struct imx_tpm_pwm_chip *tpm = platform_get_drvdata(pdev); + int ret = pwmchip_remove(&tpm->chip); + + clk_disable_unprepare(tpm->clk); + + return ret; +} + +static int __maybe_unused pwm_imx_tpm_suspend(struct device *dev) +{ + struct imx_tpm_pwm_chip *tpm = dev_get_drvdata(dev); + + if (tpm->enable_count == 0) + clk_disable_unprepare(tpm->clk); + + return 0; +} + +static int __maybe_unused pwm_imx_tpm_resume(struct device *dev) +{ + struct imx_tpm_pwm_chip *tpm = dev_get_drvdata(dev); + int ret = 0; + + if (tpm->enable_count == 0) { + ret = clk_prepare_enable(tpm->clk); + if (ret) + dev_err(dev, + "failed to prepare or enable clock: %d\n", + ret); + } + + return ret; +} + +static SIMPLE_DEV_PM_OPS(imx_tpm_pwm_pm, + pwm_imx_tpm_suspend, pwm_imx_tpm_resume); + +static const struct of_device_id imx_tpm_pwm_dt_ids[] = { + { .compatible = "fsl,imx-tpm", }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, imx_tpm_pwm_dt_ids); + +static struct platform_driver imx_tpm_pwm_driver = { + .driver = { + .name = "imx-tpm-pwm", + .of_match_table = imx_tpm_pwm_dt_ids, + .pm = &imx_tpm_pwm_pm, + }, + .probe = pwm_imx_tpm_probe, + .remove = pwm_imx_tpm_remove, +}; +module_platform_driver(imx_tpm_pwm_driver); + +MODULE_AUTHOR("Anson Huang "); +MODULE_DESCRIPTION("i.MX TPM PWM Driver"); +MODULE_LICENSE("GPL v2"); From patchwork Tue Mar 19 06:50:19 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anson Huang X-Patchwork-Id: 10858877 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0BC436C2 for ; Tue, 19 Mar 2019 06:51:25 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DD94628740 for ; Tue, 19 Mar 2019 06:51:24 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id DB6E629585; Tue, 19 Mar 2019 06:51:24 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 83229295D0 for ; Tue, 19 Mar 2019 06:51:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:In-Reply-To:References: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=LcQmpko470St3Ta664UVdZsjUIewEYJ27qOCTgSh2Tw=; b=AewURm2Sl9yV8R 6OO2vN0hytAnNnn7vLfFc1e4STQBZMfuurr5TB5cqS/3yxTU8jZ9Gu2ZPdUMWwsFLVWhDhdlUrbBV PmwXdVscdLCsE1TYoUYiKerVtYYMWLGvWmlkxasbkoaxTdzcZfTFTw+f/Pi1jxvntMs27zu1c3rEJ 5rflTA7DKNl9VXijwkyk3NhQL0yEIiKg9UEHgRiEMeW3b77TA6BstpuL4pS9LdE+V2/WrHuo3FvXj /A4m4hFhTkAhObRjjAzYRq126WqsafIZ/83LlYLYmG+VlGQDjrfNiKheT9HTi+EVz/oBiuqbJbTk/ LKa9GuF0EPGGAiTU8/JA==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1h68aj-0006Qq-0i; Tue, 19 Mar 2019 06:51:17 +0000 Received: from mail-eopbgr20066.outbound.protection.outlook.com ([40.107.2.66] helo=EUR02-VE1-obe.outbound.protection.outlook.com) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1h68aG-0005rL-L3 for linux-arm-kernel@lists.infradead.org; Tue, 19 Mar 2019 06:50:50 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=12B47s41r6WVMjNwY2Bys+/e8IDF2fW1ux+7yBvMVWs=; b=JZTD0mCAHZ1ghEfR+sHdP76HbsaFQcU1oRbRP1k+5/hoiEGtO3Yqe5vFr6HO7ftl8zvdoKgHCdWQT+T84HvmikKzw26gxCpZPu8BkzsGaGwX+7723qicqc+nNjK8kCEbzaCEhr3OZerHUVcth4h3IKRw6zhtZr4O94GtZUAb8r4= Received: from DB3PR0402MB3916.eurprd04.prod.outlook.com (52.134.72.18) by DB3PR0402MB3788.eurprd04.prod.outlook.com (52.134.72.17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1709.14; Tue, 19 Mar 2019 06:50:35 +0000 Received: from DB3PR0402MB3916.eurprd04.prod.outlook.com ([fe80::f1b4:a1fb:cfd1:3f08]) by DB3PR0402MB3916.eurprd04.prod.outlook.com ([fe80::f1b4:a1fb:cfd1:3f08%6]) with mapi id 15.20.1709.015; Tue, 19 Mar 2019 06:50:35 +0000 From: Anson Huang To: "thierry.reding@gmail.com" , "robh+dt@kernel.org" , "mark.rutland@arm.com" , "shawnguo@kernel.org" , "s.hauer@pengutronix.de" , "kernel@pengutronix.de" , "festevam@gmail.com" , "linux@armlinux.org.uk" , "stefan@agner.ch" , "otavio@ossystems.com.br" , Leonard Crestez , "schnitzeltony@gmail.com" , "jan.tuerk@emtrion.com" , Robin Gong , "linux-pwm@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "u.kleine-koenig@pengutronix.de" Subject: [PATCH V6 3/5] ARM: imx_v6_v7_defconfig: Add TPM PWM support by default Thread-Topic: [PATCH V6 3/5] ARM: imx_v6_v7_defconfig: Add TPM PWM support by default Thread-Index: AQHU3iAESFeFT5cbG0KV4gflOBwXRQ== Date: Tue, 19 Mar 2019 06:50:19 +0000 Message-ID: <1552977898-5590-4-git-send-email-Anson.Huang@nxp.com> References: <1552977898-5590-1-git-send-email-Anson.Huang@nxp.com> In-Reply-To: <1552977898-5590-1-git-send-email-Anson.Huang@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: git-send-email 2.7.4 x-clientproxiedby: HK0PR03CA0082.apcprd03.prod.outlook.com (2603:1096:203:72::22) To DB3PR0402MB3916.eurprd04.prod.outlook.com (2603:10a6:8:10::18) authentication-results: spf=none (sender IP is ) smtp.mailfrom=anson.huang@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [119.31.174.66] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 144c9133-9fe7-43bd-9534-08d6ac372693 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; PCL:0; RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600127)(711020)(4605104)(4618075)(2017052603328)(7153060)(7193020); SRVR:DB3PR0402MB3788; x-ms-traffictypediagnostic: DB3PR0402MB3788: x-microsoft-antispam-prvs: x-forefront-prvs: 0981815F2F x-forefront-antispam-report: SFV:NSPM; SFS:(10009020)(366004)(376002)(39860400002)(346002)(396003)(136003)(199004)(189003)(6506007)(50226002)(25786009)(8936002)(14454004)(26005)(76176011)(256004)(4744005)(386003)(4326008)(99286004)(110136005)(305945005)(8676002)(81166006)(68736007)(102836004)(446003)(81156014)(316002)(7416002)(7736002)(186003)(2501003)(105586002)(106356001)(6486002)(11346002)(97736004)(6436002)(2616005)(3846002)(486006)(2906002)(476003)(71200400001)(66066001)(52116002)(478600001)(5660300002)(6666004)(71190400001)(6116002)(2201001)(86362001)(36756003)(53936002)(6512007)(921003)(1121003); DIR:OUT; SFP:1101; SCL:1; SRVR:DB3PR0402MB3788; H:DB3PR0402MB3916.eurprd04.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: PT55T+lS4pcdajZjDruPUio4bTr9tuJWqRN1lN2PaaOZ8g86KHEw79AbYHfeguX+O7PwOIcfL/F3sispxpyNJAq5nHFl8H+DmdFSlgjlPgNuUIK9Fe4obpJn90yNmobE/QyeUAEAN26MkKgFMsgJil5JhvnCCiGbTO4UVvLs9Me5IaPV7VM06zYYxnKVfY22vzUW+TaezAo/i+LMBbEgwYbdkapmciRdHnuqn0X/IcDUUGNefoWZtqT9Kg6tkexilI5tb1WjCA9NzKOGeek3QusQ6qgtfpZcGUEAossYNP4StShAZAXm8Pkg9IEW57N8hhoFgNum0J1lPyCNAdNZaT5vOLCrhH9s+fPpXwNI1tO+9ltAx8wJL4kIdUbY9nRtpUKqqFGXXpEOgQ2ce37mWjNF8hmAYi1mah9FaM/8AzM= MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 144c9133-9fe7-43bd-9534-08d6ac372693 X-MS-Exchange-CrossTenant-originalarrivaltime: 19 Mar 2019 06:50:19.4892 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB3PR0402MB3788 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190318_235048_685960_147AA8C6 X-CRM114-Status: GOOD ( 11.06 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: dl-linux-imx Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Select CONFIG_PWM_IMX_TPM by default to support i.MX7ULP TPM PWM. Signed-off-by: Anson Huang --- No changes. --- arch/arm/configs/imx_v6_v7_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/configs/imx_v6_v7_defconfig b/arch/arm/configs/imx_v6_v7_defconfig index 5586a50..57862c6 100644 --- a/arch/arm/configs/imx_v6_v7_defconfig +++ b/arch/arm/configs/imx_v6_v7_defconfig @@ -399,6 +399,7 @@ CONFIG_MPL3115=y CONFIG_PWM=y CONFIG_PWM_FSL_FTM=y CONFIG_PWM_IMX=y +CONFIG_PWM_IMX_TPM=y CONFIG_NVMEM_IMX_OCOTP=y CONFIG_NVMEM_VF610_OCOTP=y CONFIG_TEE=y From patchwork Tue Mar 19 06:50:26 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anson Huang X-Patchwork-Id: 10858883 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0CDD014DE for ; Tue, 19 Mar 2019 06:52:09 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E0F5829566 for ; Tue, 19 Mar 2019 06:52:08 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D4B8B29571; Tue, 19 Mar 2019 06:52:08 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 7687A29566 for ; Tue, 19 Mar 2019 06:52:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:In-Reply-To:References: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=GeVWqjgWa/d6l/OtfvQqGnK7mzwHP/CSAxNcJGEUALw=; b=uXCeyDI4Cqoto7 hHGhx44qlYMoXN/yEKVrGo1VXxsq00V0EXRVn9KCideEFndzjSqJF1NVdV4T/KQKxtDEmX4sFmIF2 RS6L5DDED5K8mD+KkJZToMKrnbCrYfyokwDL5uNXScjKD+GRBSiEraE1yYlDmTKiUdgaB2i7qh25g y4emBuDfR71Ro4QPrSPkaEBM0B3ha13pu2EH8x6aiR2krgY+pMMn5fHwZ43oLAeKxmy5lX/O8B/6K OBSGgOg3hwabywp6cndLGCGbcvQUlFezUZXEFbABNY/8Z8Ox+UhzSxRK/kTtcgw6K9Etd4ZtSxUlg YxdWanLFHfuZ+BCR1kfg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1h68bW-0007Nr-9O; Tue, 19 Mar 2019 06:52:06 +0000 Received: from mail-eopbgr20066.outbound.protection.outlook.com ([40.107.2.66] helo=EUR02-VE1-obe.outbound.protection.outlook.com) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1h68aI-0005rL-El for linux-arm-kernel@lists.infradead.org; Tue, 19 Mar 2019 06:50:52 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=SpkACA0L7frlxQM8bG7KE2jktMqhhcxK8nVbvVr8D6I=; b=i2fphuwEc8bMdDBIkXpqqXAfzqW349rioUFKsQbF2q8h0/IgsYeUBEl05lR1puHijlOJhy2LJBIer5RgprNDtzIygN4D72ZRj5wVinnzTWCw5N+zjBgYyz985I+G+3f6BTxqG5P6dWJqQMe+UyOVK3nXwRpfTF40E10nMxHXSnM= Received: from DB3PR0402MB3916.eurprd04.prod.outlook.com (52.134.72.18) by DB3PR0402MB3788.eurprd04.prod.outlook.com (52.134.72.17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1709.14; Tue, 19 Mar 2019 06:50:36 +0000 Received: from DB3PR0402MB3916.eurprd04.prod.outlook.com ([fe80::f1b4:a1fb:cfd1:3f08]) by DB3PR0402MB3916.eurprd04.prod.outlook.com ([fe80::f1b4:a1fb:cfd1:3f08%6]) with mapi id 15.20.1709.015; Tue, 19 Mar 2019 06:50:36 +0000 From: Anson Huang To: "thierry.reding@gmail.com" , "robh+dt@kernel.org" , "mark.rutland@arm.com" , "shawnguo@kernel.org" , "s.hauer@pengutronix.de" , "kernel@pengutronix.de" , "festevam@gmail.com" , "linux@armlinux.org.uk" , "stefan@agner.ch" , "otavio@ossystems.com.br" , Leonard Crestez , "schnitzeltony@gmail.com" , "jan.tuerk@emtrion.com" , Robin Gong , "linux-pwm@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "u.kleine-koenig@pengutronix.de" Subject: [PATCH V6 4/5] ARM: dts: imx7ulp: Add pwm0 support Thread-Topic: [PATCH V6 4/5] ARM: dts: imx7ulp: Add pwm0 support Thread-Index: AQHU3iAIM+6v/EpQHU6qvziWi0cYLw== Date: Tue, 19 Mar 2019 06:50:26 +0000 Message-ID: <1552977898-5590-5-git-send-email-Anson.Huang@nxp.com> References: <1552977898-5590-1-git-send-email-Anson.Huang@nxp.com> In-Reply-To: <1552977898-5590-1-git-send-email-Anson.Huang@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: git-send-email 2.7.4 x-clientproxiedby: HK0PR03CA0082.apcprd03.prod.outlook.com (2603:1096:203:72::22) To DB3PR0402MB3916.eurprd04.prod.outlook.com (2603:10a6:8:10::18) authentication-results: spf=none (sender IP is ) smtp.mailfrom=anson.huang@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [119.31.174.66] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 6e5f0026-102d-46f2-40d8-08d6ac372aa5 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; PCL:0; RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600127)(711020)(4605104)(4618075)(2017052603328)(7153060)(7193020); SRVR:DB3PR0402MB3788; x-ms-traffictypediagnostic: DB3PR0402MB3788: x-microsoft-antispam-prvs: x-forefront-prvs: 0981815F2F x-forefront-antispam-report: SFV:NSPM; SFS:(10009020)(366004)(376002)(39860400002)(346002)(396003)(136003)(199004)(189003)(6506007)(50226002)(25786009)(8936002)(14454004)(26005)(76176011)(256004)(14444005)(386003)(4326008)(99286004)(110136005)(305945005)(8676002)(81166006)(68736007)(102836004)(446003)(81156014)(316002)(7416002)(7736002)(186003)(2501003)(105586002)(106356001)(6486002)(11346002)(97736004)(6436002)(2616005)(3846002)(486006)(2906002)(476003)(71200400001)(66066001)(52116002)(478600001)(5660300002)(6666004)(71190400001)(6116002)(2201001)(86362001)(36756003)(53936002)(6512007)(921003)(1121003); DIR:OUT; SFP:1101; SCL:1; SRVR:DB3PR0402MB3788; H:DB3PR0402MB3916.eurprd04.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: HEAxRmhkMqkkETRCt43TmLEgABmazfNUKbmKj+AQUXEpb26ymUh5f7YXMkO5TIqItDpDOfuktdH4YAJ5CCzgGGLahvbzGifMoug5iujktq12GemxmJvRc55OIJcLoYknnnZTx6suOe8gFNOBlFCtm19lsWDjop3SVvcZT0nBPzWBhdzVuFiBLyNpOm0zF++duxlFOyWxInQwgd0req5Ef+KdzaX/j7sHmRephDFFGB0TYVFzK9/oPaxFyNykvJCCHb4NF8wmIKfvCCGUwqKu2xh10i1/H1vmMvVEV6oNPkevISVBUCeh6ynEmk7w3QarC7QAe3NsGWb0IvmCAgKxX3KyIGMTyXDx87uTUvS7jhW/uZrGOPyLO/aXKCwP6NXc+zIDcD9xFx8WmTeeKU0U0penX2zE2bCU9iDSrBsCNwY= MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 6e5f0026-102d-46f2-40d8-08d6ac372aa5 X-MS-Exchange-CrossTenant-originalarrivaltime: 19 Mar 2019 06:50:26.0967 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB3PR0402MB3788 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190318_235050_709064_D0024D3F X-CRM114-Status: GOOD ( 13.04 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: dl-linux-imx Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Add i.MX7ULP EVK board PWM0 support. Signed-off-by: Anson Huang --- Changes since V5: - change #pwm-cells to 3. --- arch/arm/boot/dts/imx7ulp-evk.dts | 12 ++++++++++++ arch/arm/boot/dts/imx7ulp.dtsi | 10 ++++++++++ 2 files changed, 22 insertions(+) diff --git a/arch/arm/boot/dts/imx7ulp-evk.dts b/arch/arm/boot/dts/imx7ulp-evk.dts index a09026a..3f5ea18 100644 --- a/arch/arm/boot/dts/imx7ulp-evk.dts +++ b/arch/arm/boot/dts/imx7ulp-evk.dts @@ -40,6 +40,12 @@ status = "okay"; }; +&pwm0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm0>; + status = "okay"; +}; + &usdhc0 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc0>; @@ -57,6 +63,12 @@ bias-pull-up; }; + pinctrl_pwm0: pwm0grp { + fsl,pins = < + IMX7ULP_PAD_PTF2__TPM4_CH1 0x2 + >; + }; + pinctrl_usdhc0: usdhc0grp { fsl,pins = < IMX7ULP_PAD_PTD1__SDHC0_CMD 0x43 diff --git a/arch/arm/boot/dts/imx7ulp.dtsi b/arch/arm/boot/dts/imx7ulp.dtsi index eb349fd..15d04fb 100644 --- a/arch/arm/boot/dts/imx7ulp.dtsi +++ b/arch/arm/boot/dts/imx7ulp.dtsi @@ -124,6 +124,16 @@ status = "disabled"; }; + pwm0: pwm@40250000 { + compatible = "fsl,imx-tpm"; + reg = <0x40250000 0x1000>; + assigned-clocks = <&pcc2 IMX7ULP_CLK_LPTPM4>; + assigned-clock-parents = <&scg1 IMX7ULP_CLK_SOSC_BUS_CLK>; + clocks = <&pcc2 IMX7ULP_CLK_LPTPM4>; + #pwm-cells = <3>; + status = "disabled"; + }; + tpm5: tpm@40260000 { compatible = "fsl,imx7ulp-tpm"; reg = <0x40260000 0x1000>; From patchwork Tue Mar 19 06:50:32 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anson Huang X-Patchwork-Id: 10858881 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2880A14DE for ; Tue, 19 Mar 2019 06:51:41 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0379329574 for ; Tue, 19 Mar 2019 06:51:41 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id EBA3829575; Tue, 19 Mar 2019 06:51:40 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 93CE42957A for ; Tue, 19 Mar 2019 06:51:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:In-Reply-To:References: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=ozcs+CsOp+sDa4oyBGEogn0SeKpvYArKdEqqOvZeCdw=; b=Sjxm04kG7/6IQ2 qmUCw6H6QTDIafeoegHW6aJQhW8Ee2OZ+AfwbGSW69qSjncb+KuKrSMdzENuWxE+oR+7Or6aud3dg jJqMIzken/B2wD9YFm+aCLrbSJpxi1odm2He5n6UoCSpYnyfPTztdN0Buh6mDwI/dIMsqeF+5BEEr le3v9foH7zCBXr3O0aNogB2rCt9HvyNKnxdiYo3rkUaNrStkJQfq1OYxOPmmvl//NUOTJIDrFpkwG 7EePWg4FIMTbjlk/2veSrpReQYiEzFSMfe7LeDKhF8+dhmrvDCRMz5F/frOwzI7+VqHeDzjqsoUAd UyJP3exZkUR3Q6wyyfWw==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1h68b5-0006us-26; Tue, 19 Mar 2019 06:51:39 +0000 Received: from mail-eopbgr150081.outbound.protection.outlook.com ([40.107.15.81] helo=EUR01-DB5-obe.outbound.protection.outlook.com) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1h68aI-0005ri-MR for linux-arm-kernel@lists.infradead.org; Tue, 19 Mar 2019 06:50:52 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=rp7VCvA7299O45IcomPYmegmh/PENzW/dackYQzSOag=; b=BajxlEvTG5nn8BKX+WTPbX8K/Dnts4Lm0sPee+FrwV8u81dtDJ/GF/PXRTD/AP6bMMDuf9lun/5/21b4HTPBUFdtN5OKkUYJ+pXnsZXPe3hpU6TF6mer+nqHxRA7uJibqx6Q1TmICaSpKryN00lncQUG1lAsgknN7yFqDkZCgus= Received: from DB3PR0402MB3916.eurprd04.prod.outlook.com (52.134.72.18) by DB3PR0402MB3788.eurprd04.prod.outlook.com (52.134.72.17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1709.14; Tue, 19 Mar 2019 06:50:36 +0000 Received: from DB3PR0402MB3916.eurprd04.prod.outlook.com ([fe80::f1b4:a1fb:cfd1:3f08]) by DB3PR0402MB3916.eurprd04.prod.outlook.com ([fe80::f1b4:a1fb:cfd1:3f08%6]) with mapi id 15.20.1709.015; Tue, 19 Mar 2019 06:50:36 +0000 From: Anson Huang To: "thierry.reding@gmail.com" , "robh+dt@kernel.org" , "mark.rutland@arm.com" , "shawnguo@kernel.org" , "s.hauer@pengutronix.de" , "kernel@pengutronix.de" , "festevam@gmail.com" , "linux@armlinux.org.uk" , "stefan@agner.ch" , "otavio@ossystems.com.br" , Leonard Crestez , "schnitzeltony@gmail.com" , "jan.tuerk@emtrion.com" , Robin Gong , "linux-pwm@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "u.kleine-koenig@pengutronix.de" Subject: [PATCH V6 5/5] ARM: dts: imx7ulp-evk: Add backlight support Thread-Topic: [PATCH V6 5/5] ARM: dts: imx7ulp-evk: Add backlight support Thread-Index: AQHU3iAMiOS8d63V+UqZKwB9b+CcKw== Date: Tue, 19 Mar 2019 06:50:32 +0000 Message-ID: <1552977898-5590-6-git-send-email-Anson.Huang@nxp.com> References: <1552977898-5590-1-git-send-email-Anson.Huang@nxp.com> In-Reply-To: <1552977898-5590-1-git-send-email-Anson.Huang@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: git-send-email 2.7.4 x-clientproxiedby: HK0PR03CA0082.apcprd03.prod.outlook.com (2603:1096:203:72::22) To DB3PR0402MB3916.eurprd04.prod.outlook.com (2603:10a6:8:10::18) authentication-results: spf=none (sender IP is ) smtp.mailfrom=anson.huang@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [119.31.174.66] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 9b60d7f6-4d0b-485c-7459-08d6ac372e66 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; PCL:0; RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600127)(711020)(4605104)(4618075)(2017052603328)(7153060)(7193020); SRVR:DB3PR0402MB3788; x-ms-traffictypediagnostic: DB3PR0402MB3788: x-microsoft-antispam-prvs: x-forefront-prvs: 0981815F2F x-forefront-antispam-report: SFV:NSPM; SFS:(10009020)(366004)(376002)(39860400002)(346002)(396003)(136003)(199004)(189003)(6506007)(50226002)(25786009)(8936002)(14454004)(26005)(76176011)(256004)(4744005)(386003)(4326008)(99286004)(110136005)(305945005)(8676002)(81166006)(68736007)(102836004)(446003)(81156014)(316002)(7416002)(7736002)(186003)(2501003)(105586002)(106356001)(6486002)(11346002)(97736004)(6436002)(2616005)(3846002)(486006)(2906002)(476003)(71200400001)(66066001)(52116002)(478600001)(5660300002)(6666004)(71190400001)(6116002)(2201001)(86362001)(36756003)(53936002)(6512007)(921003)(1121003); DIR:OUT; SFP:1101; SCL:1; SRVR:DB3PR0402MB3788; H:DB3PR0402MB3916.eurprd04.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: b1d/H6efG0hgx2icnnMwzUIgzFuL2rhiCoMaQK705bLPOYdKCDBSoG/sk1ZfQODWMcrFVHjHTSuFvwUTbY0VXb06Hb6B4lyD0P6/n+gXfglVtfCNBMKjyDO/VX1kxsrSxi+Fqhe9Rsq3OvZD/FxAYwQTQ81rivJlCI/AYOe/U3NL+kH3HnxMObSKRzFWcNkLHL9hnPm+Nv9u5T2k4fxLoIGl5G6EKZ+l8ZdT4SCR1HiEqKqfkEuBKxMGT0Tm5WOfsa4pm1HTVfM1WpRxk6O3DojPTHNH9VYXXk8szWDZ0Tsvszf7EzS6P6RO0rGMui7Ng+2kKovnzfDUssV1dfgQC85wAQQcxUzCYiqXSxAVed1fq1Wu2LfdXypRB0NicsQoxkbCrThAE7cJ6X93mivdnmF7YxU3gjI9mBkxOY25v+k= MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 9b60d7f6-4d0b-485c-7459-08d6ac372e66 X-MS-Exchange-CrossTenant-originalarrivaltime: 19 Mar 2019 06:50:32.5812 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB3PR0402MB3788 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190318_235050_898828_CCD2E630 X-CRM114-Status: GOOD ( 11.71 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: dl-linux-imx Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds i.MX7ULP EVK board MIPI-DSI backlight support. Signed-off-by: Anson Huang --- Changes since V5: - change #pwm-cells to 3, add polarity settings. --- arch/arm/boot/dts/imx7ulp-evk.dts | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm/boot/dts/imx7ulp-evk.dts b/arch/arm/boot/dts/imx7ulp-evk.dts index 3f5ea18..7c44ffa 100644 --- a/arch/arm/boot/dts/imx7ulp-evk.dts +++ b/arch/arm/boot/dts/imx7ulp-evk.dts @@ -8,6 +8,7 @@ /dts-v1/; #include "imx7ulp.dtsi" +#include / { model = "NXP i.MX7ULP EVK"; @@ -22,6 +23,14 @@ reg = <0x60000000 0x40000000>; }; + backlight { + compatible = "pwm-backlight"; + pwms = <&pwm0 1 50000 0>; + brightness-levels = <0 20 25 30 35 40 100>; + default-brightness-level = <6>; + status = "okay"; + }; + reg_vsd_3v3: regulator-vsd-3v3 { compatible = "regulator-fixed"; regulator-name = "VSD_3V3";