From patchwork Fri Feb 14 18:08:14 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Wanner X-Patchwork-Id: 13975454 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7BD62268C51; Fri, 14 Feb 2025 18:08:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.153.233 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739556527; cv=none; b=iiTILxaEck75XVHy45eq5SH0IrIWzFH9VVzODEk6tEvNKWBTaL1ZgGg5GoN/OfCKM9rjnvoap0IBLB6p5Fq000uKSI/GNEwHoXCOKorE22iuiPZN1cWJqydfDIJ5ti1/o5Jl9i4YDpt46D3If6cg1CS3nJifNCsp0AXpcQPrA9A= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739556527; c=relaxed/simple; bh=IiA3Lsk8M2dYMgk/4nS7W+qSoNllaePb+DQMH94UMsk=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=pbniT4uUvfdjRA6EYyej+0siJPljrYKqxG7HZnO+lUR5mAQ/Ox87Ba/z5aRWnr35u6OFILbSzDgbj6Qfs7wnOVzFDfe2HnjCE/yp6iw3kt9TQ9mkqF8btzXeg4rqAPWQdj/mM3lVxSxxNPlgrZgIIPLrx3VkzNsII8PaSk1g9RU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=CrGVD99z; arc=none smtp.client-ip=68.232.153.233 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="CrGVD99z" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1739556526; x=1771092526; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=IiA3Lsk8M2dYMgk/4nS7W+qSoNllaePb+DQMH94UMsk=; b=CrGVD99z0CGJ9iwGUm4ZHEXXZY9dOjc+xISb5Xw1vwGMjvWXpg5HkLac /h6drHuwfcaWyzmY7bPXNQy1Yxm7ZHJw/9rqUTPfZSE55XXRH5f7hTSer yDY1NR5WZdbCffwNxDgckPbjRyK1m6c70orTRXCiXX5DHj4eMXkROWBx1 nKT/IxLZETG6BDfgDnAKUw8nLnj6s/y+OF3Vapdirp9HxSQZTAxB/svTY rLIh3pMZ7ENEW4x3QhRrPgj4nIVJV3rcnRazlr5yR/gnvaT1SwbjY/0Lg 7dJq/co/MAijV4zK63muy1iu2f3Kjr7flBA780BIpS+98kQQ6wQYScLPV g==; X-CSE-ConnectionGUID: afEECSQvQkGMMmDvtHvTFg== X-CSE-MsgGUID: ObyPD2RNTM+y/AWm3wOGew== X-IronPort-AV: E=Sophos;i="6.13,286,1732604400"; d="scan'208";a="37700925" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa3.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 14 Feb 2025 11:08:38 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Fri, 14 Feb 2025 11:08:25 -0700 Received: from ryan-Precision-3630-Tower.microchip.com (10.10.85.11) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Fri, 14 Feb 2025 11:08:25 -0700 From: To: , , , , , , , , CC: , , , , , Ryan Wanner Subject: [PATCH 1/8] dt-bindings: atmel-sysreg: Add SAMA7D65 Chip ID Date: Fri, 14 Feb 2025 11:08:14 -0700 Message-ID: <008e4e49c9fd315cc96a185662b31eca1a64a614.1739555984.git.Ryan.Wanner@microchip.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-watchdog@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Ryan Wanner Add compatible string for SAMA7D65 SoC ChipID dt-bindings. Signed-off-by: Ryan Wanner Acked-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/arm/atmel-sysregs.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt index 1a173e92bb137..d3821f651e728 100644 --- a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt +++ b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt @@ -2,6 +2,7 @@ Atmel system registers Chipid required properties: - compatible: Should be "atmel,sama5d2-chipid" or "microchip,sama7g5-chipid" + "microchip,sama7d65-chipid" - reg : Should contain registers location and length PIT Timer required properties: From patchwork Fri Feb 14 18:08:15 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Wanner X-Patchwork-Id: 13975455 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D7B2C268FF5; Fri, 14 Feb 2025 18:08:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.153.233 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739556527; cv=none; b=IYuD/PcGGgQjtuJCyuYsyEEoTPOTi9l3o940xKu65IeKai87DO8uCfgwHHpbnGxS1jdqeOJM41t6I473xAVHW+F2xL7ArQ4XsP0YzQgW1fYScqKwrU2JDmLWI6QHg0SHMfDqrY/SixA1ei0+Knt6U6pFMlvfEP2wqpOSSoQSshI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739556527; c=relaxed/simple; bh=jbCTVPEWFw9WF15vsBw6QaeoypJLSenxXsize2yrV+s=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=XRCsa1DvcqDeOFJkLdWd9jv6/MpylXF73OqpjqfHrmXbx/9qnXPd7uAPJmHpGJCy8UQQ+MHrFevfCrA1YpZnMIxJoLedmO+eJdlbR0XPuDE4mutz7CMv5436sYkBBjr9Fi47wtD5Ftn0tB93nxVbcSlhXnKhSXHdATsO6F4bK8g= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=Fx0CtvFq; arc=none smtp.client-ip=68.232.153.233 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="Fx0CtvFq" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1739556526; x=1771092526; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=jbCTVPEWFw9WF15vsBw6QaeoypJLSenxXsize2yrV+s=; b=Fx0CtvFqM87gWlpmotMlP3AhHyxS4oMmPdTtxVcNGI7zjYUHWfNvOkCa LDiaOlpfP/3U0tMOK86HYzlOG1zGzXAPhJD2bKdn8LcwNEGO7oA57qK9V xAeCpkSi6cgXHl4nF1U4GZTtYmnaqVKXDufYdUwUeBQUPXC94dTGAnB+G pxHsc+40pKkfsqjJ7M8iWCDddHBClkk2uBDV1dv97fiMi0aMb/1VAEvVV IEr2QV6Se4vhJDW/NT3uxe0iBwX5Yn4uucbVblVL3epCoQozZkpfAQGPr bNFtu35Wvf8dvsG0psmAJZyiNolfd6r/hmIEegKB2SajMpsRU6QFyAHPP g==; X-CSE-ConnectionGUID: afEECSQvQkGMMmDvtHvTFg== X-CSE-MsgGUID: dqD54zzST1Cb0T7PxsIoAw== X-IronPort-AV: E=Sophos;i="6.13,286,1732604400"; d="scan'208";a="37700926" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa3.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 14 Feb 2025 11:08:38 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Fri, 14 Feb 2025 11:08:25 -0700 Received: from ryan-Precision-3630-Tower.microchip.com (10.10.85.11) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Fri, 14 Feb 2025 11:08:25 -0700 From: To: , , , , , , , , CC: , , , , , Ryan Wanner Subject: [PATCH 2/8] dt-bindings: watchdog: sama5d4-wdt: Add sama7d65-wdt Date: Fri, 14 Feb 2025 11:08:15 -0700 Message-ID: <3c55e634f2993ac5a49e1b8bfceb2333e175d376.1739555984.git.Ryan.Wanner@microchip.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-watchdog@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Ryan Wanner Add microchip,sama7d65-wdt compatible string to the dt-binding documentation. Signed-off-by: Ryan Wanner --- .../devicetree/bindings/watchdog/atmel,sama5d4-wdt.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/watchdog/atmel,sama5d4-wdt.yaml b/Documentation/devicetree/bindings/watchdog/atmel,sama5d4-wdt.yaml index cdf87db361837..e9c026194d403 100644 --- a/Documentation/devicetree/bindings/watchdog/atmel,sama5d4-wdt.yaml +++ b/Documentation/devicetree/bindings/watchdog/atmel,sama5d4-wdt.yaml @@ -23,6 +23,9 @@ properties: - const: microchip,sam9x7-wdt - const: microchip,sam9x60-wdt + - items: + - const: microchip,sama7d65-wdt + - const: microchip,sama7g5-wdt reg: maxItems: 1 From patchwork Fri Feb 14 18:08:16 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Wanner X-Patchwork-Id: 13975456 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 34F9E2690E1; Fri, 14 Feb 2025 18:08:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.153.233 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739556528; cv=none; b=MFyMzbf3IGR1+UaxMGtEEAxYuwm9soRPXCdq+aFEZz4MN3sDWiD6HiIiT2wkwvMEfh9QYCO2EDG/mirntyAFlp+Vgo1yRDtx+PVjZMIy70sCgLN0xhMJAF+gyBbE2isOcB9ZpKIBw1jr1wQdZ88uz8c0N9DveiPLXSJVg096MNU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739556528; c=relaxed/simple; bh=sKWqjvEpkcI2HOheld8cEwxYIv45wbwACNAWn1NaBNQ=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=jLY91LN1no8uRAyEtEeuUDRvowzDEmAiQ/2IpdgeBhzDFTDKSkFpOjX0D2sVPQkZJYFNwyjhpytnZhiGejCOXgtyUMAzK5SjXkSVKxzECCDk8q+ZuljSo7u8u86+TO99proYBiRAFPfErbse0u0z6NIJsaEW/0/zulX6jTDD5BA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=aJFJ8Nc3; arc=none smtp.client-ip=68.232.153.233 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="aJFJ8Nc3" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1739556528; x=1771092528; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=sKWqjvEpkcI2HOheld8cEwxYIv45wbwACNAWn1NaBNQ=; b=aJFJ8Nc3wa9BjA3LRTwXCU9Wp7/deHDBARwVSBe7kczoyd8WbmyPNUQk Go2OpdpZRjln1Dho5KBqbHMknQMe9og4OD7F81WdRTDdu0b8igLtL2dRk fHaSmiIrYrT29XJ3ZVYPbDl5qUD7iMj49bkZiRUg1aiGk+fcLj6CTYZAb yi185Zb4QTEPOlJHbNOpLqRsg7qeoTF6CSoZ7JAtlUacGjhygJ08EUgmW WOdNB8avs08OnAHpAg0BhuBeqtQKvQFYfskwAky6gtus3QZoYolGWhGHj UY2Ype2C/rUwdjBQmk/VhsfjYcC5gNpyxzezdCfFoq40u/2/x6NsgfGJK Q==; X-CSE-ConnectionGUID: afEECSQvQkGMMmDvtHvTFg== X-CSE-MsgGUID: Hc1GFQtYTc6wh5HSOspKzQ== X-IronPort-AV: E=Sophos;i="6.13,286,1732604400"; d="scan'208";a="37700927" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa3.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 14 Feb 2025 11:08:39 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Fri, 14 Feb 2025 11:08:26 -0700 Received: from ryan-Precision-3630-Tower.microchip.com (10.10.85.11) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Fri, 14 Feb 2025 11:08:26 -0700 From: To: , , , , , , , , CC: , , , , , Ryan Wanner Subject: [PATCH 3/8] dt-bindings: dma: atmel: add microchip,sama7d65-dma Date: Fri, 14 Feb 2025 11:08:16 -0700 Message-ID: <8b69f0c6d8955790edcdbe5d1e205b43dedb99ff.1739555984.git.Ryan.Wanner@microchip.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-watchdog@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Ryan Wanner Add microchip,sama7d65-dma compatible string to DT bindings documentation. Signed-off-by: Ryan Wanner Acked-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/dma/atmel,sama5d4-dma.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/dma/atmel,sama5d4-dma.yaml b/Documentation/devicetree/bindings/dma/atmel,sama5d4-dma.yaml index 9ca1c5d1f00f8..73fc13b902b38 100644 --- a/Documentation/devicetree/bindings/dma/atmel,sama5d4-dma.yaml +++ b/Documentation/devicetree/bindings/dma/atmel,sama5d4-dma.yaml @@ -32,6 +32,9 @@ properties: - microchip,sam9x60-dma - microchip,sam9x7-dma - const: atmel,sama5d4-dma + - items: + - const: microchip,sama7d65-dma + - const: microchip,sama7g5-dma "#dma-cells": description: | From patchwork Fri Feb 14 18:08:17 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Wanner X-Patchwork-Id: 13975458 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id ACCEA269823; Fri, 14 Feb 2025 18:08:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.153.233 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739556529; cv=none; b=L9ahoBCbsKBTkbK99XsEo7InhU3iW3dcYUkAHWw4O/NnpXkuzHlJJ94UZJcNSoSMapqQatGBcivueaFQsxbuufQxHiqWjlyFWZSmcLfWk8b6u/+9oF5R0f6Pd6n+Z+jU6SdnDRajHvxblzS5ZRFvbRJYK8cv2PA+vCOiDTYXw2E= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739556529; c=relaxed/simple; bh=qPQso1ZYtWTmJIC7QhndAu/PixzdR+a209Sd11Fb4Ig=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=k1kaepOCjm06JV1m+d9LayNO/B65UViEtwv+KGlogdkqsdGANLQNWB1ddkmOgPvlhYGDJTzbLL4rFy+oOvVJCVV5HL88A40Lt92/pR41UzeWZP2DeTYafUrfYAcKL/och6ZVYfi690rQpoE7BMTowwW0IjAcvfFlrSs08ig6sAc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=eAZNQbAC; arc=none smtp.client-ip=68.232.153.233 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="eAZNQbAC" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1739556528; x=1771092528; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=qPQso1ZYtWTmJIC7QhndAu/PixzdR+a209Sd11Fb4Ig=; b=eAZNQbACy9cgmUCtRy7N1QBSSUYAKl03AkIoSeGTnczkdAP/ml8ACDbE T4pB3r5EVAQd4Ufcj08bJEgryGWJvAnyPDdrKD1WGZGgO7pZdOSM9LJQG R/SRgMcZvwcWuMaXH7skFrCBi7NjsuGKtVWH4Q+824WFwBwcghsqJk345 Pj3N9446kYtBgr2HWZFz+DPNtu3aivBeGSqzEeXBZcptkXkIcMywBbPa9 LtaxkNa1G/tEm9Tv4xES6Uodr/GcS7BnWZNOnFGVlq5Bz2cRWNb3GVBtr j1E4ZfdYIq9sFpnXNpwmxQRRBmce7FBh6pozIlSIFxpO/+Z27E9yeKbyh w==; X-CSE-ConnectionGUID: afEECSQvQkGMMmDvtHvTFg== X-CSE-MsgGUID: 2IsM7achQlmES/jyjdqu2w== X-IronPort-AV: E=Sophos;i="6.13,286,1732604400"; d="scan'208";a="37700928" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa3.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 14 Feb 2025 11:08:39 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Fri, 14 Feb 2025 11:08:26 -0700 Received: from ryan-Precision-3630-Tower.microchip.com (10.10.85.11) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Fri, 14 Feb 2025 11:08:26 -0700 From: To: , , , , , , , , CC: , , , , , Ryan Wanner Subject: [PATCH 4/8] ARM: at91: Add Support in SoC driver for SAMA7D65 Date: Fri, 14 Feb 2025 11:08:17 -0700 Message-ID: <84b4a7ec0025741bc3ab647671fd4e880b2ed1d5.1739555984.git.Ryan.Wanner@microchip.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-watchdog@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Ryan Wanner Add support for SAMA7D65 SoC in the SoC driver. Signed-off-by: Ryan Wanner --- drivers/soc/atmel/soc.c | 5 +++++ drivers/soc/atmel/soc.h | 3 +++ 2 files changed, 8 insertions(+) diff --git a/drivers/soc/atmel/soc.c b/drivers/soc/atmel/soc.c index 298b542dd1c06..68f20024dcebb 100644 --- a/drivers/soc/atmel/soc.c +++ b/drivers/soc/atmel/soc.c @@ -246,6 +246,9 @@ static const struct at91_soc socs[] __initconst = { "samv70q19", "samv7"), #endif #ifdef CONFIG_SOC_SAMA7 + AT91_SOC(SAMA7D65_CIDR_MATCH, AT91_CIDR_MASK_SAMA7G5, + AT91_CIDR_VERSION_MASK_SAMA7G5, SAMA7D65_EXID_MATCH, + "sama7d65", "sama7d6"), AT91_SOC(SAMA7G5_CIDR_MATCH, AT91_CIDR_MATCH_MASK, AT91_CIDR_VERSION_MASK_SAMA7G5, SAMA7G51_EXID_MATCH, "sama7g51", "sama7g5"), @@ -305,6 +308,7 @@ static int __init at91_get_cidr_exid_from_chipid(u32 *cidr, u32 *exid) void __iomem *regs; static const struct of_device_id chipids[] = { { .compatible = "atmel,sama5d2-chipid" }, + { .compatible = "microchip,sama7d65-chipid"}, { .compatible = "microchip,sama7g5-chipid" }, { }, }; @@ -393,6 +397,7 @@ static const struct of_device_id at91_soc_allowed_list[] __initconst = { { .compatible = "atmel,at91sam9", }, { .compatible = "atmel,sama5", }, { .compatible = "atmel,samv7", }, + { .compatible = "microchip,sama7d65",}, { .compatible = "microchip,sama7g5", }, { } }; diff --git a/drivers/soc/atmel/soc.h b/drivers/soc/atmel/soc.h index 2c78e54255f7f..66a74017d9a3e 100644 --- a/drivers/soc/atmel/soc.h +++ b/drivers/soc/atmel/soc.h @@ -45,6 +45,7 @@ at91_soc_init(const struct at91_soc *socs); #define AT91SAM9N12_CIDR_MATCH 0x019a07a0 #define SAM9X60_CIDR_MATCH 0x019b35a0 #define SAM9X7_CIDR_MATCH 0x09750020 +#define SAMA7D65_CIDR_MATCH 0x00262100 #define SAMA7G5_CIDR_MATCH 0x00162100 #define AT91SAM9M11_EXID_MATCH 0x00000001 @@ -75,6 +76,8 @@ at91_soc_init(const struct at91_soc *socs); #define SAM9X75_D5M_EXID_MATCH 0x00000010 #define SAM9X75_EXID_MATCH 0x00000000 +#define SAMA7D65_EXID_MATCH 0x00000080 + #define SAMA7G51_EXID_MATCH 0x3 #define SAMA7G52_EXID_MATCH 0x2 #define SAMA7G53_EXID_MATCH 0x1 From patchwork Fri Feb 14 18:08:18 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Wanner X-Patchwork-Id: 13975457 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9368D269806; 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X-CSE-ConnectionGUID: afEECSQvQkGMMmDvtHvTFg== X-CSE-MsgGUID: AB1UyuEZQfyQS6dgQjsgaA== X-IronPort-AV: E=Sophos;i="6.13,286,1732604400"; d="scan'208";a="37700930" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa3.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 14 Feb 2025 11:08:40 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Fri, 14 Feb 2025 11:08:26 -0700 Received: from ryan-Precision-3630-Tower.microchip.com (10.10.85.11) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Fri, 14 Feb 2025 11:08:26 -0700 From: To: , , , , , , , , CC: , , , , , Ryan Wanner Subject: [PATCH 5/8] ARM: dts: microchip: sama7d65: Add chipID for sama7d65 Date: Fri, 14 Feb 2025 11:08:18 -0700 Message-ID: <14e6cafb64df345e6bd79ac96961248cc266770c.1739555984.git.Ryan.Wanner@microchip.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-watchdog@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Ryan Wanner Add chipID for the sama7d65 SoC to the device tree. Signed-off-by: Ryan Wanner --- arch/arm/boot/dts/microchip/sama7d65.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/microchip/sama7d65.dtsi b/arch/arm/boot/dts/microchip/sama7d65.dtsi index 854b30d15dcd4..b1b236e1f6e38 100644 --- a/arch/arm/boot/dts/microchip/sama7d65.dtsi +++ b/arch/arm/boot/dts/microchip/sama7d65.dtsi @@ -83,6 +83,11 @@ clk32k: clock-controller@e001d500 { #clock-cells = <1>; }; + chipid@e0020000 { + compatible = "microchip,sama7d65-chipid"; + reg = <0xe0020000 0x8>; + }; + sdmmc1: mmc@e1208000 { compatible = "microchip,sama7d65-sdhci", "microchip,sam9x60-sdhci"; reg = <0xe1208000 0x400>; From patchwork Fri Feb 14 18:08:19 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Wanner X-Patchwork-Id: 13975459 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0ACD22698A3; Fri, 14 Feb 2025 18:08:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.153.233 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739556530; cv=none; b=ar4PaIWQOXJJrfCaHVeJ8b+4AtdGOWMROCS3XUD48Qw+Gp6hnnkgXlTHufd/mVJVk3r1YwsJPYzcuky7U+PdujkXcSo8jZnWiuHsVds2nOU+wx8D5GTeb8soGSgqwhu1T8sTzwUoWc88xk3i6GNjoN0U5E9MXgmvlxrelouhamg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739556530; c=relaxed/simple; bh=K6+jsMBEPeG5a4vof3OQyYuJjApw91RkV7RMLdW/B2Q=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=nA4k5UWypXTh8e9GKOHJeK1L+02bDYC2jc8ZC5Ozcsr8chlV3QwC9ZfpUudPi5BPRPM6miV3ns4irxXV9H7tboOkzAZcfLMRyiKNKyyBecigkiW9MkF0FLZ8KTbbOzvoO7aVQWr/AQEEAhYo7lLybZ1gH6nEbSKoHS22DrmhEs0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=x0pEMlnI; arc=none smtp.client-ip=68.232.153.233 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="x0pEMlnI" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1739556529; x=1771092529; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=K6+jsMBEPeG5a4vof3OQyYuJjApw91RkV7RMLdW/B2Q=; b=x0pEMlnIE9LQBWoZ5sSDSrlFOh++9AcQX0fpkhcoZBlQDtlrg40keNkJ /VrItGDavoQMaeWKBpKcQhnOk8wPKG+A6ewkQCihmED4I9cEjCoRhn8n/ 293whzNlGrFof4wYNkmrZRzXuHYqHSdS/Hko9KHO1xkqqhWFgGnaxa6jm m9+jgaQ4uFiP/jA22fzZJqwjXsWxKOFrVKzRsbkW2BhBkuCYocli8iiyH bzbaUv72gTy9ru/aJhxmcCFF+cYKpMfXy3ZIn3FF+f5Nd4ntAqTLGL2kZ t8oA6WrkfTDsDuToV/TGYAxgBS55RtdKED9/BH/rjjaJS33AT1fK1/p6Y g==; X-CSE-ConnectionGUID: afEECSQvQkGMMmDvtHvTFg== X-CSE-MsgGUID: Vy7NjoOqR+iWKMmSPvhT5w== X-IronPort-AV: E=Sophos;i="6.13,286,1732604400"; d="scan'208";a="37700931" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa3.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 14 Feb 2025 11:08:40 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Fri, 14 Feb 2025 11:08:26 -0700 Received: from ryan-Precision-3630-Tower.microchip.com (10.10.85.11) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Fri, 14 Feb 2025 11:08:26 -0700 From: To: , , , , , , , , CC: , , , , , Ryan Wanner Subject: [PATCH 6/8] ARM: dts: microchip: sama7d65: Add watchdog for sama7d65 Date: Fri, 14 Feb 2025 11:08:19 -0700 Message-ID: <05431cf86beb742a9a53336c4ec792be8bde14e2.1739555984.git.Ryan.Wanner@microchip.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-watchdog@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Ryan Wanner Add watchdog timer support for SAMA7D65 SoC. Signed-off-by: Ryan Wanner --- arch/arm/boot/dts/microchip/sama7d65.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/microchip/sama7d65.dtsi b/arch/arm/boot/dts/microchip/sama7d65.dtsi index b1b236e1f6e38..d06a51972d363 100644 --- a/arch/arm/boot/dts/microchip/sama7d65.dtsi +++ b/arch/arm/boot/dts/microchip/sama7d65.dtsi @@ -83,6 +83,13 @@ clk32k: clock-controller@e001d500 { #clock-cells = <1>; }; + ps_wdt: watchdog@e001d180 { + compatible = "microchip,sama7d65-wdt", "microchip,sama7g5-wdt"; + reg = <0xe001d000 0x30>; + interrupts = ; + clocks = <&clk32k 0>; + }; + chipid@e0020000 { compatible = "microchip,sama7d65-chipid"; reg = <0xe0020000 0x8>; From patchwork Fri Feb 14 18:08:20 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Wanner X-Patchwork-Id: 13975460 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8C35E269AE8; Fri, 14 Feb 2025 18:08:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.153.233 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739556531; cv=none; b=KOXQZUjQPSPpUaVlKjl4Xl9QgaFaDprRgasGe/QZNOBGeo+AsSzQMv12sVAVbH3Twva8HffuxD755CgP6o6l8ZVryfCdSVGSgTIMG4mKArlYN8tUMP29AOpTTMzHBIjvHl/A1LauiY7soLiX+fRG4akFnFvzlciKpeB94xGKmAE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739556531; c=relaxed/simple; bh=1jirbwm0amL5vmDsxIqDjfqVX7+BXeBDlukbPMT/bKI=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=YBA0jnZ6UiFRKX78sDo06+lpw4M/dgIGqQWjB2gqX70buk5Y3GQrZR1L8ZAw91wgf8i5RsKR3+IuKzK5JdSazMxARn8JikcaKQe2ZFqnu81VjbGhuYXrQdQg6Tbcad67/Il+jHVr3MCDjvIZVRdMUUjtgYvZ240NT/lbTi9dIuc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=0k83SsB+; arc=none smtp.client-ip=68.232.153.233 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="0k83SsB+" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1739556530; x=1771092530; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=1jirbwm0amL5vmDsxIqDjfqVX7+BXeBDlukbPMT/bKI=; b=0k83SsB+8rhHn55ILx5rq7UjYkJQV0u2Kb5ZbF/k3GlZNtwDmR7TS6XU HHat/YKq4IxCd7HGa8ZjIe2tJaYA4S8n73oQxEes5bvZdwsMj62UvyoBM Q6tX2LpUGqRLi/SL1kE+tsfQrtlQYPxaMmRzErXin5GtIlQiw+/hqqaI3 1bEEFbkmsmW3JhoB/2hKDxIw+3PPfWcnz4hBAPIAd43dAsZ4Znyjah+cO VTk2/rxxPPkFYQH6LdRZe4xX5B3qHinOjxwR3VIU/EY0VcSemdKiko2f2 pyWExBFJt+GCKNQv0gonOh2pJMrJhhZNhUIZdVUuJrMA/yD8SsgtKiSX5 g==; X-CSE-ConnectionGUID: afEECSQvQkGMMmDvtHvTFg== X-CSE-MsgGUID: dnELiuSgQq+xQPam+KENXg== X-IronPort-AV: E=Sophos;i="6.13,286,1732604400"; d="scan'208";a="37700932" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa3.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 14 Feb 2025 11:08:40 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Fri, 14 Feb 2025 11:08:26 -0700 Received: from ryan-Precision-3630-Tower.microchip.com (10.10.85.11) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Fri, 14 Feb 2025 11:08:26 -0700 From: To: , , , , , , , , CC: , , , , , Ryan Wanner Subject: [PATCH 7/8] ARM: dts: microchip: sama7d65: Add DMAs to sama7d65 SoC Date: Fri, 14 Feb 2025 11:08:20 -0700 Message-ID: <78da4125a991c6f4081fce78825f1f983091e0f5.1739555984.git.Ryan.Wanner@microchip.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-watchdog@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Ryan Wanner Add DMAs to the SAMA7D65 SoC device tree. Signed-off-by: Ryan Wanner --- arch/arm/boot/dts/microchip/sama7d65.dtsi | 32 +++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/arch/arm/boot/dts/microchip/sama7d65.dtsi b/arch/arm/boot/dts/microchip/sama7d65.dtsi index d06a51972d363..b472a7d929ee4 100644 --- a/arch/arm/boot/dts/microchip/sama7d65.dtsi +++ b/arch/arm/boot/dts/microchip/sama7d65.dtsi @@ -9,6 +9,7 @@ */ #include +#include #include #include #include @@ -95,6 +96,17 @@ chipid@e0020000 { reg = <0xe0020000 0x8>; }; + dma2: dma-controller@e1200000 { + compatible = "microchip,sama7d65-dma", "microchip,sama7g5-dma"; + reg = <0xe1200000 0x1000>; + interrupts = ; + #dma-cells = <1>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 23>; + clock-names = "dma_clk"; + dma-requests = <0>; + status = "disabled"; + }; + sdmmc1: mmc@e1208000 { compatible = "microchip,sama7d65-sdhci", "microchip,sam9x60-sdhci"; reg = <0xe1208000 0x400>; @@ -107,6 +119,26 @@ sdmmc1: mmc@e1208000 { status = "disabled"; }; + dma0: dma-controller@e1610000 { + compatible = "microchip,sama7d65-dma", "microchip,sama7g5-dma"; + reg = < 0xe1610000 0x1000>; + interrupts = ; + #dma-cells = <1>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 21>; + clock-names = "dma_clk"; + status = "disabled"; + }; + + dma1: dma-controller@e1614000 { + compatible = "microchip,sama7d65-dma", "microchip,sama7g5-dma"; + reg = <0xe1614000 0x1000>; + interrupts = ; + #dma-cells = <1>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 22>; + clock-names = "dma_clk"; + status = "disabled"; + }; + pit64b0: timer@e1800000 { compatible = "microchip,sama7d65-pit64b", "microchip,sam9x60-pit64b"; reg = <0xe1800000 0x100>; From patchwork Fri Feb 14 18:08:21 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Wanner X-Patchwork-Id: 13975461 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 953F4269AEF; Fri, 14 Feb 2025 18:08:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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d="scan'208";a="37700933" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa3.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 14 Feb 2025 11:08:41 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Fri, 14 Feb 2025 11:08:26 -0700 Received: from ryan-Precision-3630-Tower.microchip.com (10.10.85.11) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Fri, 14 Feb 2025 11:08:26 -0700 From: To: , , , , , , , , CC: , , , , , Ryan Wanner Subject: [PATCH 8/8] ARM: dts: microchip: sama7d65: Enable DMAs Date: Fri, 14 Feb 2025 11:08:21 -0700 Message-ID: X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-watchdog@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Ryan Wanner Enable DMA interface for sama7d65_curiosity board. Signed-off-by: Ryan Wanner --- .../boot/dts/microchip/at91-sama7d65_curiosity.dts | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts b/arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts index 0f86360fb733a..0c21e3ed3a95a 100644 --- a/arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts +++ b/arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts @@ -32,6 +32,18 @@ memory@60000000 { }; }; +&dma0 { + status = "okay"; +}; + +&dma1 { + status = "okay"; +}; + +&dma2 { + status = "okay"; +}; + &flx6 { atmel,flexcom-mode = ; status = "okay";