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a=ed25519-sha256; t=1739950145; l=1351; i=xianwei.zhao@amlogic.com; s=20231208; h=from:subject:message-id; bh=vjPBu1HHhtJ40032LUG+5H8YJbi/gKBdDE3m5hFavvg=; b=0aRX+LboPpexOaTwmX3H+YQd0Y2mCu1hV2pp4pVwj/4pM5zotWkSSzIl64AOHuySD3aaUFC4c nkskPATR3SuBhUeZ4PnX5/a0Dr2mK3HMwpE9vMkxBt7H4774FUf4PEb X-Developer-Key: i=xianwei.zhao@amlogic.com; a=ed25519; pk=o4fDH8ZXL6xQg5h17eNzRljf6pwZHWWjqcOSsj3dW24= X-Endpoint-Received: by B4 Relay for xianwei.zhao@amlogic.com/20231208 with auth_id=107 X-Original-From: Xianwei Zhao X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250218_232908_719943_061256BE X-CRM114-Status: GOOD ( 10.26 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: xianwei.zhao@amlogic.com Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org From: Xianwei Zhao Update dt-binding document for GPIO interrupt controller of Amlogic A4 and A5 SoCs Signed-off-by: Xianwei Zhao --- .../bindings/interrupt-controller/amlogic,meson-gpio-intc.yaml | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.yaml index a93744763787..03548ee695bd 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.yaml @@ -35,6 +35,9 @@ properties: - amlogic,meson-sm1-gpio-intc - amlogic,meson-a1-gpio-intc - amlogic,meson-s4-gpio-intc + - amlogic,a4-gpio-intc + - amlogic,a4-gpio-ao-intc + - amlogic,a5-gpio-intc - amlogic,c3-gpio-intc - amlogic,t7-gpio-intc - const: amlogic,meson-gpio-intc @@ -49,7 +52,7 @@ properties: amlogic,channel-interrupts: description: Array with the upstream hwirq numbers - minItems: 8 + minItems: 2 maxItems: 12 $ref: /schemas/types.yaml#/definitions/uint32-array From patchwork Wed Feb 19 07:29:04 2025 Content-Type: text/plain; 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a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1739950147; bh=xEeZyRoQRruxpefQllMnf+kWHv/3Cpvf7HrMLj91LyA=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=RU2qqt5iRjYNuLz8lrmsNg0Pj2D++9Pxi1SF0bkD7ljQXii4fdsmooZBH35+OJOJa adWabSVR0TSzkrOmXx/uXK4O2e18aRrNDNE3Y3y/BNUW0lvPpRq1TfCNNzohTL8pDN jyBUtxuDsUqXHcd7Z6gnXCvVNKfzTBw5qpFIaNxQNYJqYPoK2XQevSvOuFkKyLQDCA Bvodg+dFzyxRPiGrzKkK/PMqvooNLOdEfit6JbNtBMSSL3pd8Xoe01uxDB7pIyUAvc ER+32fb7+IIz2+vn7XB8v9k7mpGZTQOx8X7VBg49pQiUVck9vZJrB6RlxgnvLYwhGH BT2FTJeQ/+RwQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0C968C021AB; Wed, 19 Feb 2025 07:29:07 +0000 (UTC) From: Xianwei Zhao via B4 Relay Date: Wed, 19 Feb 2025 15:29:04 +0800 Subject: [PATCH 2/4] irqchip: Add support for Amlogic A4 and A5 SoCs MIME-Version: 1.0 Message-Id: <20250219-irqchip-gpio-a4-a5-v1-2-3c8e44ae42df@amlogic.com> References: <20250219-irqchip-gpio-a4-a5-v1-0-3c8e44ae42df@amlogic.com> In-Reply-To: <20250219-irqchip-gpio-a4-a5-v1-0-3c8e44ae42df@amlogic.com> To: Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Heiner Kallweit Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, Xianwei Zhao X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=ed25519-sha256; t=1739950145; l=4752; i=xianwei.zhao@amlogic.com; s=20231208; h=from:subject:message-id; bh=pb4tVlKfAN8KCdBXm0QJKMo++EPvlghYeR+n/8s7LkY=; b=7s5AHDZUMk8Cr5FaIDMYFqtYK0Gffq5h1EDUDl8DrH1uQJ8GfnCKBpmDq75kIEVlyBLzCjYQy Uc8WZBlzGhDCM9+ohF9wG+sI6LROI3d9QA8KoXseHIZzoq3JuPIz0yv X-Developer-Key: i=xianwei.zhao@amlogic.com; a=ed25519; pk=o4fDH8ZXL6xQg5h17eNzRljf6pwZHWWjqcOSsj3dW24= X-Endpoint-Received: by B4 Relay for xianwei.zhao@amlogic.com/20231208 with auth_id=107 X-Original-From: Xianwei Zhao X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250218_232908_565193_E8BDEC63 X-CRM114-Status: GOOD ( 16.09 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: xianwei.zhao@amlogic.com Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org From: Xianwei Zhao The Amlogic A4 SoCs support 12 GPIO IRQ lines and 2 AO GPIO IRQ lines, A5 SoCs support 12 GPIO IRQ lines, details are as below. A4 IRQ Number: - 72:55 18 pins on bank T - 54:32 23 pins on bank X - 31:16 16 pins on bank D - 15:14 2 pins on bank E - 13:0 14 pins on bank B A4 AO IRQ Number: - 7 1 pin on bank TESTN - 6:0 7 pins on bank AO A5 IRQ Number: - 98 1 pin on bank TESTN - 97:82 16 pins on bank Z - 81:62 20 pins on bank X - 61:48 14 pins on bank T - 47:32 16 pins on bank D - 31:27 5 pins on bank H - 26:25 2 pins on bank E - 24:14 11 pins on bank C - 13:0 14 pins on bank B Signed-off-by: Xianwei Zhao --- drivers/irqchip/irq-meson-gpio.c | 61 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 61 insertions(+) diff --git a/drivers/irqchip/irq-meson-gpio.c b/drivers/irqchip/irq-meson-gpio.c index cd789fa51519..1ef391274653 100644 --- a/drivers/irqchip/irq-meson-gpio.c +++ b/drivers/irqchip/irq-meson-gpio.c @@ -28,6 +28,8 @@ #define REG_PIN_A1_SEL 0x04 /* Used for s4 chips */ #define REG_EDGE_POL_S4 0x1c +/* Used for A4 AO chips */ +#define REG_EDGE_POL_AO 0x08 /* * Note: The S905X3 datasheet reports that BOTH_EDGE is controlled by @@ -57,6 +59,8 @@ static int meson8_gpio_irq_set_type(struct meson_gpio_irq_controller *ctl, unsigned int type, u32 *channel_hwirq); static int meson_s4_gpio_irq_set_type(struct meson_gpio_irq_controller *ctl, unsigned int type, u32 *channel_hwirq); +static int meson_ao_gpio_irq_set_type(struct meson_gpio_irq_controller *ctl, + unsigned int type, u32 *channel_hwirq); struct irq_ctl_ops { void (*gpio_irq_sel_pin)(struct meson_gpio_irq_controller *ctl, @@ -105,6 +109,17 @@ struct meson_gpio_irq_params { .pin_sel_mask = 0x7f, \ .nr_channels = 8, \ +#define INIT_MESON_A4_AO_COMMON_DATA(irqs) \ + INIT_MESON_COMMON(irqs, meson_a1_gpio_irq_init, \ + meson_a1_gpio_irq_sel_pin, \ + meson_ao_gpio_irq_set_type) \ + .support_edge_both = true, \ + .edge_both_offset = 0, \ + .edge_single_offset = 12, \ + .pol_low_offset = 0, \ + .pin_sel_mask = 0xff, \ + .nr_channels = 2, \ + #define INIT_MESON_S4_COMMON_DATA(irqs) \ INIT_MESON_COMMON(irqs, meson_a1_gpio_irq_init, \ meson_a1_gpio_irq_sel_pin, \ @@ -146,6 +161,18 @@ static const struct meson_gpio_irq_params a1_params = { INIT_MESON_A1_COMMON_DATA(62) }; +static const struct meson_gpio_irq_params a4_params = { + INIT_MESON_S4_COMMON_DATA(81) +}; + +static const struct meson_gpio_irq_params a4_ao_params = { + INIT_MESON_A4_AO_COMMON_DATA(8) +}; + +static const struct meson_gpio_irq_params a5_params = { + INIT_MESON_S4_COMMON_DATA(99) +}; + static const struct meson_gpio_irq_params s4_params = { INIT_MESON_S4_COMMON_DATA(82) }; @@ -168,6 +195,9 @@ static const struct of_device_id meson_irq_gpio_matches[] __maybe_unused = { { .compatible = "amlogic,meson-sm1-gpio-intc", .data = &sm1_params }, { .compatible = "amlogic,meson-a1-gpio-intc", .data = &a1_params }, { .compatible = "amlogic,meson-s4-gpio-intc", .data = &s4_params }, + { .compatible = "amlogic,a4-gpio-ao-intc", .data = &a4_ao_params }, + { .compatible = "amlogic,a4-gpio-intc", .data = &a4_params }, + { .compatible = "amlogic,a5-gpio-intc", .data = &a5_params }, { .compatible = "amlogic,c3-gpio-intc", .data = &c3_params }, { .compatible = "amlogic,t7-gpio-intc", .data = &t7_params }, { } @@ -383,6 +413,37 @@ static int meson_s4_gpio_irq_set_type(struct meson_gpio_irq_controller *ctl, return 0; }; +static int meson_ao_gpio_irq_set_type(struct meson_gpio_irq_controller *ctl, + unsigned int type, u32 *channel_hwirq) +{ + u32 val = 0; + unsigned int idx; + + idx = meson_gpio_irq_get_channel_idx(ctl, channel_hwirq); + + type &= IRQ_TYPE_SENSE_MASK; + + meson_gpio_irq_update_bits(ctl, REG_EDGE_POL_AO, BIT(idx), 0); + + if (type == IRQ_TYPE_EDGE_BOTH) { + val |= BIT(ctl->params->edge_both_offset + (idx)); + meson_gpio_irq_update_bits(ctl, REG_EDGE_POL_AO, + BIT(ctl->params->edge_both_offset + (idx)), val); + return 0; + } + + if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_EDGE_FALLING)) + val |= BIT(ctl->params->pol_low_offset + idx); + + if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) + val |= BIT(ctl->params->edge_single_offset + idx); + + meson_gpio_irq_update_bits(ctl, REG_EDGE_POL, + BIT(idx) | BIT(12 + idx), val); + + return 0; +}; + static unsigned int meson_gpio_irq_type_output(unsigned int type) { unsigned int sense = type & IRQ_TYPE_SENSE_MASK; From patchwork Wed Feb 19 07:29:05 2025 Content-Type: text/plain; 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X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: xianwei.zhao@amlogic.com Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org From: Xianwei Zhao Add GPIO interrupt controller device. Signed-off-by: Xianwei Zhao --- arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi index de10e7aebf21..a06838552f21 100644 --- a/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi +++ b/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi @@ -48,3 +48,24 @@ pwrc: power-controller { }; }; }; + +&apb { + gpio_intc: interrupt-controller@4080 { + compatible = "amlogic,a4-gpio-intc", + "amlogic,meson-gpio-intc"; + reg = <0x0 0x4080 0x0 0x20>; + interrupt-controller; + #interrupt-cells = <2>; + amlogic,channel-interrupts = + <10 11 12 13 14 15 16 17 18 19 20 21>; + }; + + gpio_ao_intc: interrupt-controller@8e72c { + compatible = "amlogic,a4-gpio-ao-intc", + "amlogic,meson-gpio-intc"; + reg = <0x0 0x8e72c 0x0 0x0c>; + interrupt-controller; + #interrupt-cells = <2>; + amlogic,channel-interrupts = <140 141>; + }; +}; From patchwork Wed Feb 19 07:29:06 2025 Content-Type: text/plain; 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X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: xianwei.zhao@amlogic.com Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org From: Xianwei Zhao Add GPIO interrupt controller device. Signed-off-by: Xianwei Zhao --- arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi index 17a6316de891..32ed1776891b 100644 --- a/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi +++ b/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi @@ -48,3 +48,15 @@ pwrc: power-controller { }; }; }; + +&apb { + gpio_intc: interrupt-controller@4080 { + compatible = "amlogic,a5-gpio-intc", + "amlogic,meson-gpio-intc"; + reg = <0x0 0x4080 0x0 0x20>; + interrupt-controller; + #interrupt-cells = <2>; + amlogic,channel-interrupts = + <10 11 12 13 14 15 16 17 18 19 20 21>; + }; +};