From patchwork Thu Feb 20 10:26:18 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 13983670 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 73C93C021B2 for ; Thu, 20 Feb 2025 10:26:27 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E4E5310E91B; Thu, 20 Feb 2025 10:26:26 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="IwTxxxq0"; dkim-atps=neutral Received: from mail-lf1-f43.google.com (mail-lf1-f43.google.com [209.85.167.43]) by gabe.freedesktop.org (Postfix) with ESMTPS id 751C010E919 for ; Thu, 20 Feb 2025 10:26:24 +0000 (UTC) Received: by mail-lf1-f43.google.com with SMTP id 2adb3069b0e04-5452ed5b5b2so846482e87.0 for ; Thu, 20 Feb 2025 02:26:24 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1740047183; x=1740651983; darn=lists.freedesktop.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=BHG5/92JHG16RLprBRzXgLa8hI+3p50zsk7zJC6YSjI=; b=IwTxxxq00dZFzA4PUcfrceo2TjGueC3RyOOPrbY/BUnDYO9uwoVjo9wDbmU6uLi3Hc kjcFOIBYou6QPemHJiG+iiW//4+1DhdTUn2RSacKzZq/mM/EuFHVZlWsMlPFHyn5A7yx KROcsGEecotGivrNHZKlTBTk+w5CrKmaXdEYU21udsGxLcSPR4VTIp5WXaEYYoxmrm1Z S3lRMEkWr7FMvX3/52g5bnMb5q9opE9Z29C1lyCOd4IUI268AKjXdHElZy1tuISmd+zI WcRracLYuLtARr1R6ZHmberx0gJXPMnyH9GuyfajSwTbPqQx45JpSMNvl9RqbbUKBlTQ 238g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1740047183; x=1740651983; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=BHG5/92JHG16RLprBRzXgLa8hI+3p50zsk7zJC6YSjI=; b=uzpDocNtlyiG+SMsyZ2pPDKd8ReCunNVvS2d5rMsnnQ/80fyJzqzox/GftBNlCKGoh ClaYuVihLFJzeM3zcqL4lU6SOE7cZbOQEr+QyB6glK81+B+CPC+kgQvGxfAPtr4y/UnF LT+z2VrZ6flhFhp/UjtnurHsDMqKylSzntVZWR543kFZ+V5ZID/Wp4EwuyrhYJM6s50J FFMa3j5YyiHAqHdHKFrht+UQPX19rqZffqSplcfUz6/w4gNf7A7MnFTDyEPqo6OP2YnS XSJbXZ4MeTn9Dst1toXX8000pnYVnZGwbAOfaHRSvonQ+RONSSIkq2xPtzIBOeD3l/hQ vJRw== X-Forwarded-Encrypted: i=1; AJvYcCXY2I9MThCAmhGq9+Jtim6uf/RtPCu6Lg13+y3h2CBZEghfvj0+VEr4fYmAeKEn/0sXGb42ub92wZI=@lists.freedesktop.org X-Gm-Message-State: AOJu0YzmZ2njl0mvgWnwv4GBDeCyl8/8J0h81ozTXdk5DzabTobbSbGz NZocBazGgJebJH3yc108Cu6tXXOxibdGDhkvq+EkFPm/Qu9vJqavwS+62rT29og= X-Gm-Gg: ASbGncuKSSZqzVtxvV3kw13Ow9tPtAxlWkwZMqQZFKGGPlWRTPk+zSfekyjb7qq+iED qCorM2QJ/t3HU0I4WfdYd5rxIhLHO38Z1q5zY+/Sr0slHU5Dk7YIzwV0rCccS4QbWYGf4+3iGec tm5zrTwgbuliVw37OO3TAAWYBCPVa0rMqGTGtRO0dyLCvjgRaRrl6DNkfWOfIGKmFQO/Q6LAkH1 /JvRMJsD5+RkB66CMVrL19++kcflTd51hq52WuR+BR+eWzfyd5Eao+61XRvoQhQuT/yeba/Ps/a UB39nAixdK+Z9xr1/E/Ep5w= X-Google-Smtp-Source: AGHT+IHoB8cGAPCGqCy5Ys3Z/ClpL2nQWVmYQHHBfQ6tZBAycg+fN9nJybcNHcZmN/tcLAhsEfwZzQ== X-Received: by 2002:a05:6512:308d:b0:545:2f09:a3fc with SMTP id 2adb3069b0e04-5452fe26402mr9020270e87.3.1740047182645; Thu, 20 Feb 2025 02:26:22 -0800 (PST) Received: from umbar.lan ([192.130.178.90]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-545e939224esm1588052e87.135.2025.02.20.02.26.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 Feb 2025 02:26:21 -0800 (PST) From: Dmitry Baryshkov Date: Thu, 20 Feb 2025 12:26:18 +0200 Subject: [PATCH 1/7] drm/msm/dpu: don't overwrite CTL_MERGE_3D_ACTIVE register MIME-Version: 1.0 Message-Id: <20250220-dpu-active-ctl-v1-1-71ca67a564f8@linaro.org> References: <20250220-dpu-active-ctl-v1-0-71ca67a564f8@linaro.org> In-Reply-To: <20250220-dpu-active-ctl-v1-0-71ca67a564f8@linaro.org> To: Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2119; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=w10ZfN4br6Ap7llW/HC7sm0zGLP894PWSldkoISRy7I=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBntwNKGB2SRGw4F+CCKnh3jnyyk4Z50hcLkYJZL WDHvV06OyuJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZ7cDSgAKCRCLPIo+Aiko 1dz1B/9E+EDZuiyFKbu+SOvzfZfWbAo0fN+Z7dtd6euH0aZu3Xj0jlLMVWKP5Gp98xq1o+/fBQw mSvUCdUuEsf4Dx1B8IDw0NCpJq0SpYCgZFjQo7jy3jNGrM0s2dYkT/+ZDRzQQtIu34oiYi0AFLK lvPc8qzUidfSVyfB/LarXGTT/HPKmqn7uFjrDVOqFJeQLV8PNLTjQbjNp+Mc17t3dYlv+hXXnSU mj30TPmuI6n0Y0GFklZBoHHtNHaUZVJXsRHm1q2V8emUk6Y+8cnCQ+PO3xm1qSb7PNSl8Wi0ZIM CXxZrghI2QOhgosSlmSjvUD2JTpAKq91N3VTX1O6/N/HZIfC X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" In case of complex pipelines (e.g. the forthcoming quad-pipe) the DPU might use more that one MERGE_3D block for a single output. Follow the pattern and extend the CTL_MERGE_3D_ACTIVE active register instead of simply writing new value there. Currently at most one MERGE_3D block is being used, so this has no impact on existing targets. Signed-off-by: Dmitry Baryshkov Reviewed-by: Marijn Suijten --- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c index 4893f10d6a5832521808c0f4d8b231c356dbdc41..321a89e6400d2824ebda2c08be5e6943cb0f6b11 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c @@ -548,6 +548,7 @@ static void dpu_hw_ctl_intf_cfg_v1(struct dpu_hw_ctl *ctx, u32 dsc_active = 0; u32 wb_active = 0; u32 mode_sel = 0; + u32 merge_3d_active = 0; /* CTL_TOP[31:28] carries group_id to collate CTL paths * per VM. Explicitly disable it until VM support is @@ -562,6 +563,7 @@ static void dpu_hw_ctl_intf_cfg_v1(struct dpu_hw_ctl *ctx, intf_active = DPU_REG_READ(c, CTL_INTF_ACTIVE); wb_active = DPU_REG_READ(c, CTL_WB_ACTIVE); dsc_active = DPU_REG_READ(c, CTL_DSC_ACTIVE); + merge_3d_active = DPU_REG_READ(c, CTL_MERGE_3D_ACTIVE); if (cfg->intf) intf_active |= BIT(cfg->intf - INTF_0); @@ -572,14 +574,16 @@ static void dpu_hw_ctl_intf_cfg_v1(struct dpu_hw_ctl *ctx, if (cfg->dsc) dsc_active |= cfg->dsc; + if (cfg->merge_3d) + merge_3d_active |= BIT(cfg->merge_3d - MERGE_3D_0); + DPU_REG_WRITE(c, CTL_TOP, mode_sel); DPU_REG_WRITE(c, CTL_INTF_ACTIVE, intf_active); DPU_REG_WRITE(c, CTL_WB_ACTIVE, wb_active); DPU_REG_WRITE(c, CTL_DSC_ACTIVE, dsc_active); if (cfg->merge_3d) - DPU_REG_WRITE(c, CTL_MERGE_3D_ACTIVE, - BIT(cfg->merge_3d - MERGE_3D_0)); + DPU_REG_WRITE(c, CTL_MERGE_3D_ACTIVE, merge_3d_active); if (cfg->cdm) DPU_REG_WRITE(c, CTL_CDM_ACTIVE, cfg->cdm); From patchwork Thu Feb 20 10:26:19 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 13983671 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A1E65C021B2 for ; Thu, 20 Feb 2025 10:26:30 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1E21F10E917; Thu, 20 Feb 2025 10:26:30 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="dD8njV75"; dkim-atps=neutral Received: from mail-lf1-f51.google.com (mail-lf1-f51.google.com [209.85.167.51]) by gabe.freedesktop.org (Postfix) with ESMTPS id D06F610E91A for ; Thu, 20 Feb 2025 10:26:26 +0000 (UTC) Received: by mail-lf1-f51.google.com with SMTP id 2adb3069b0e04-546210287c1so887748e87.2 for ; Thu, 20 Feb 2025 02:26:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1740047185; x=1740651985; darn=lists.freedesktop.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=6MXT2UHEqR4mXPV5rukuE4Ox5VYKDfzTrqOVamfQ/v4=; b=dD8njV75RLg2iVZFFCQM5N2FlAf2OhsuV5BaArwxktY0N7Ee97Mfz7Ng5E+Ky3oJO9 nEnE6YZZeLLj5Ty5zUvqV5UDqxa+nYa+fSorF8h7v8T9sHTCr0BeEi1FPqH6rGGESTfX aPZO5N9HR4ua9Acf1Cw8UD5ABJC5aw8rxjKQX7/ufOszCz0DD47IkEYFBGitGKmbSsZY Dt5C9B1h7S/4GGPNv5SEJaZ2ORa7q5zVnGF77MbKzZldyZRCBQlY8ckql0PHpvvayjC7 1o8UCADupJUAgNmElsRWNup678wlAY4WaBdE90JbQCsIfa4puMd6yR31ZXJu5o8Etnxv wNUw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1740047185; x=1740651985; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=6MXT2UHEqR4mXPV5rukuE4Ox5VYKDfzTrqOVamfQ/v4=; b=vt6O5GVABxNjm6QhKzscF0QSCLFluia0FklomD+vO7veUPRv5kMj+BR5Kn1RMT3Nn4 dOYM6XyZAoyJ6B8HIrF9elXgK7PUB/WuD2A6boDcgV5fKdWMgWKBLV4q70caQu3w6yTf sUWzgzlwpXjlh3puT/SzwqfBGb+rzMJy6MDRnzqFuGO0HAQ5kK0kVBejhXX4myb+EsMf IY2Rq2MwbQkJ34quLl993X4mf+ZG0YS29K+lX10+O06YcH0v5Jps1FmsQuhjE0G/2hAZ Brm24Yt+2EcjASVIo7h9cEZ7+/gbjoOFvZSNxfkJQonNvY8l1JjYRGemFAR9jel9y5NG jZNA== X-Forwarded-Encrypted: i=1; AJvYcCWuElEYzWddSdDpQWr/76CJRg/0d74ET5WUfeD0TV/YfVStT9ERW39UrDsZq96rQVQoYQq3CrzYgbU=@lists.freedesktop.org X-Gm-Message-State: AOJu0YzQ7/q+8JIrXjBQv09sAxKWr97NExBX4a4FdfETX40q3j+4ypZk cYu0Ln0UdLsA182lo5DR2abpK26pxdZOo/Gzw9vznXP3pt+zKQ9NdoE9ui76Ixs= X-Gm-Gg: ASbGncuR9VcWT8TLifENe2IRNc/qMzHYhaGI7x8sm2UNueozwBVIVW3TYlo6+6x55ft V+JeEOjyNgmSOKMfw7EvXjT0iVfIbMANbO8U9FE2ZOrD7tXGmEcN7JRbnJhD7sUgsgXWxbTqbOl doiUbAEfr43d1sDByU6P3wPBk6yEwIPem9KUiFOmWNY1XCv1TJZxrbpMx963FgvVu/kO4pgdnch D2aPNYlBNsOFHLQvm51OHASER0LGeSKdjzji32ciCiPzzRENIHLQo9pz8bq+WqCufdxnC0k6MW+ 1vbPy9VabKY8DUewca6HiFc= X-Google-Smtp-Source: AGHT+IHVs7/HB47jqAC6EzTTnNTZAfzg+x9KZYaVr4/z6kRTIYCgC/Ny36xPicgL5AjVTPvk7mAqow== X-Received: by 2002:a05:6512:3d8a:b0:545:2ab1:3de with SMTP id 2adb3069b0e04-5452fe3a020mr7735223e87.13.1740047185105; Thu, 20 Feb 2025 02:26:25 -0800 (PST) Received: from umbar.lan ([192.130.178.90]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-545e939224esm1588052e87.135.2025.02.20.02.26.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 Feb 2025 02:26:23 -0800 (PST) From: Dmitry Baryshkov Date: Thu, 20 Feb 2025 12:26:19 +0200 Subject: [PATCH 2/7] drm/msm/dpu: program master INTF value MIME-Version: 1.0 Message-Id: <20250220-dpu-active-ctl-v1-2-71ca67a564f8@linaro.org> References: <20250220-dpu-active-ctl-v1-0-71ca67a564f8@linaro.org> In-Reply-To: <20250220-dpu-active-ctl-v1-0-71ca67a564f8@linaro.org> To: Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1992; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=Zeu2WMMg3KSN6/su6MRFquf4B/jwSUnZPPK7KQNFjVE=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBntwNKFKkzsD3IaKYWEHR+cLcNe4qWLzmyk7+Rt Q1BXnwf2LeJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZ7cDSgAKCRCLPIo+Aiko 1dnnB/9INNm7rqUorusuSFff9lMPBp5yiIpIzWu28DU9UfuKT/GZSDwpGxHhwpVllxYm6SaoRUA JsIxGieMq8CZxRFUboUzZnWVk4RIFIz1KasecaOaj+u/Wy7r9ZP65ngf8eexv4uVkPGhQudKtNT 61ciN5o1CqshJMBxtf2jjNiLbERRmtQvFYl7zt07KxSfjzUP2Jp029aB/oHcLV7AIbSikxNO5g2 2V5mkBLUTfomKKWU7YN6F6V6NmHllQuGWYBLPiwgxt/JFxxX2CCFol+diApEB9EFMu1KR/wifhT DsTnkQisTC5CZXzpEDK04jKAD2PKgtr1r4VTCo/kHKUtoYlO X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" If several interfaces are being handled through a single CTL, a main ('master') INTF needs to be programmed into a separate register. Write corresponding value into that register. Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 3 +++ drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h | 2 ++ 2 files changed, 5 insertions(+) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c index 321a89e6400d2824ebda2c08be5e6943cb0f6b11..db36bfa98fc310c1bf35c4817d601ae6cf88d151 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c @@ -582,6 +582,9 @@ static void dpu_hw_ctl_intf_cfg_v1(struct dpu_hw_ctl *ctx, DPU_REG_WRITE(c, CTL_WB_ACTIVE, wb_active); DPU_REG_WRITE(c, CTL_DSC_ACTIVE, dsc_active); + if (cfg->intf_master) + DPU_REG_WRITE(c, CTL_INTF_MASTER, BIT(cfg->intf_master - INTF_0)); + if (cfg->merge_3d) DPU_REG_WRITE(c, CTL_MERGE_3D_ACTIVE, merge_3d_active); diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h index 85c6c835cc8780e6cb66f3a262d9897c91962935..e95989a2fdda6344d0cb9d3036e6ed22a0458675 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h @@ -36,6 +36,7 @@ struct dpu_hw_stage_cfg { /** * struct dpu_hw_intf_cfg :Describes how the DPU writes data to output interface * @intf : Interface id + * @intf_master: Master interface id in the dual pipe topology * @mode_3d: 3d mux configuration * @merge_3d: 3d merge block used * @intf_mode_sel: Interface mode, cmd / vid @@ -45,6 +46,7 @@ struct dpu_hw_stage_cfg { */ struct dpu_hw_intf_cfg { enum dpu_intf intf; + enum dpu_intf intf_master; enum dpu_wb wb; enum dpu_3d_blend_mode mode_3d; enum dpu_merge_3d merge_3d; From patchwork Thu Feb 20 10:26:20 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 13983672 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BE03EC021B1 for ; Thu, 20 Feb 2025 10:26:33 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 31B7C10E91C; Thu, 20 Feb 2025 10:26:33 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="CylNF4Ja"; dkim-atps=neutral Received: from mail-lf1-f41.google.com (mail-lf1-f41.google.com [209.85.167.41]) by gabe.freedesktop.org (Postfix) with ESMTPS id 60DBF10E917 for ; Thu, 20 Feb 2025 10:26:29 +0000 (UTC) Received: by mail-lf1-f41.google.com with SMTP id 2adb3069b0e04-5439a6179a7so878010e87.1 for ; Thu, 20 Feb 2025 02:26:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1740047187; x=1740651987; darn=lists.freedesktop.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=wJNAJ9S8ZhpIeOStYgLD52jkOeAB/llU9h9KOXd2yuE=; b=CylNF4Ja9yZiIUrJYy3FuP7xlE7DXPReX3L2N7byuMTP480IoNCmRC77Mh96HWVdVT w5jUhI6nj8BWy/3SSQq3pkdRK2TBqqI/qxevnlhQtbGXJQc3uVKQ/1mYTv3TP9ZK0Wcd ZdzsjLo0aBwCnlzXcFlQca/fK4ZHyAD96zLuVEX2uc8fZRoU/0Rue+CuQZAQWwwp4gUT fHKoaxr9WcnAlE37RCSynnSjhA+WlAEtwXEQq/cXZX89dhJKdTiLQT5B9wXi4ai98iXT eo33vyThVwSCh3jrn0yKRqEu2fBkCqREDkjVV2glSNNTvx9tE797FyW6Yj3rocmoBN2o ugmg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1740047187; x=1740651987; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=wJNAJ9S8ZhpIeOStYgLD52jkOeAB/llU9h9KOXd2yuE=; b=IQ7VpyGc55ou5oeHCMgIIhIzLNNPquE7vVqHPxeW+e0L7tccBtI5HtXi71teYOT6Rv qefoWKJwFDi74Tye4peB43HMj/I+7p9HMh8wWXakJ/POQRhZuUfxQnyMkA8TT2DWaYdM hUSBJC3aEuJbHu31498iincqbAxBGiDdZAOQcxcVHZtKbFbiAZ9oJpVdoEH9vZog5CSF YKXu98WpKcHs6Xhb9Kr0VbmJIQorcFxLUgASShUpCBAmhwL79bXUJvOcPBkRVf6RnsX4 nsbJ5m4zUzLiyOR5cWmbra0WzrlFpZbk/3Mo+f5ZkB6NPQfKs6A3wnEsq9HiA8RiHicA bE7Q== X-Forwarded-Encrypted: i=1; AJvYcCXvWnwDMwNCGjLhW8A4K+zWZurWNMCZ80u/ureNS0X/AwqgjkTt/k1jroO6c0ZEIJf3BEa3bTd2RXw=@lists.freedesktop.org X-Gm-Message-State: AOJu0YxZxyhvYI2QNWjRYo+s6Ch6IEGygLVRJEAd9zufORwSH26bxsTv fzsBhrDqcOSwzl7fQQLCP9kzYeuKiA285kJMFIp7gQoAwVK9RrLDlfZjq80y+uQ= X-Gm-Gg: ASbGncswLtlj+QHKp0jwiG8a0clptoDs0bohthqKAAmvnCNvGnUaeSnvImv2DABzBkZ MTnmB+EmdzzN9TPdczTg+hFlk2/mfn3PwOJcQ3uaMW5LwzdPhPcojJgiGnFFNmiunfj8zC/RQJY 9TkCTmEeCMW8tsMHa3YLqI28qHz+g2Jj12a2Cyp+CMWeOmIRYraiHMrbTVN93UovlvzlJwy2W11 xlVsp2Yah4ISuvaeleONJXzEPLMQY2A0drQsPisPNcUNFcL8i8Kg6xl+k+ZXYTnZ5qtSsQ14Iu/ xOvEVq+A/pY8ulv2fTyCXfQ= X-Google-Smtp-Source: AGHT+IF331MiMfKkOmnrNILcorNZpHZK9yLwRpgvYJ7WEviZijKR1lVKHGb4C+1ru/+g/xzWTNOJhg== X-Received: by 2002:a05:6512:2399:b0:546:2109:1efb with SMTP id 2adb3069b0e04-546e4662c70mr1044724e87.11.1740047187568; Thu, 20 Feb 2025 02:26:27 -0800 (PST) Received: from umbar.lan ([192.130.178.90]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-545e939224esm1588052e87.135.2025.02.20.02.26.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 Feb 2025 02:26:26 -0800 (PST) From: Dmitry Baryshkov Date: Thu, 20 Feb 2025 12:26:20 +0200 Subject: [PATCH 3/7] drm/msm/dpu: pass master interface to CTL configuration MIME-Version: 1.0 Message-Id: <20250220-dpu-active-ctl-v1-3-71ca67a564f8@linaro.org> References: <20250220-dpu-active-ctl-v1-0-71ca67a564f8@linaro.org> In-Reply-To: <20250220-dpu-active-ctl-v1-0-71ca67a564f8@linaro.org> To: Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1894; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=/O+unDh5T1VFusnWXWTP7rs8hDxFqzKuCi3hJ4pCKbA=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBntwNKBFIT3AwoFKTScXTNMjZQ2C302xc/Ih6ae /0vg1jl0m6JATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZ7cDSgAKCRCLPIo+Aiko 1S44B/wIvkjQwHjwie/PsatFKnwZx+EoYi3i/LW0hl9ylAvK2w6DmmfzL+Bmj4+LW93FtBaWvII tP8iTCLrVfaXjq+uWjGpkkQydL4uIwTggZex6YpzVf2VqUBrbJEFDrx8alY+FsZY7qA8WG5yn6p gWQo603hoUZhG/GxzpU9Yd5HC/ubu7x33LFa9EplSqI7Dm6UKWyUXeUaz7NDZC9hgu7pNRM2jJb Si+E5E2Gln050Ey0XAONMApWO8p+x2JtqMef+yI6aqeJfMhK5rjvaizXgvyGGVGKh7U1GtByGwc qp2uKF8QeV0QGDWzBjhDSFAet+8SMpKhy7tBdjtITtGsOYkJ X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Active controls require setup of the master interface. Pass the selected interface to CTL configuration. Signed-off-by: Dmitry Baryshkov Reviewed-by: Marijn Suijten --- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 2 ++ drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 2 ++ 2 files changed, 4 insertions(+) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c index e9bbccc44dad8b391cd51daf902307105b2598fc..d1e16da00529de35cf4e205077c4264bdb70de16 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c @@ -59,6 +59,8 @@ static void _dpu_encoder_phys_cmd_update_intf_cfg( return; intf_cfg.intf = phys_enc->hw_intf->idx; + if (phys_enc->split_role == ENC_ROLE_MASTER) + intf_cfg.intf_master = phys_enc->hw_intf->idx; intf_cfg.intf_mode_sel = DPU_CTL_MODE_SEL_CMD; intf_cfg.stream_sel = cmd_enc->stream_sel; intf_cfg.mode_3d = dpu_encoder_helper_get_3d_blend_mode(phys_enc); diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c index abd6600046cb3a91bf88ca240fd9b9c306b0ea2e..232055473ba55998b79dd2e8c752c129bbffbff4 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c @@ -298,6 +298,8 @@ static void dpu_encoder_phys_vid_setup_timing_engine( if (phys_enc->hw_cdm) intf_cfg.cdm = phys_enc->hw_cdm->idx; intf_cfg.intf = phys_enc->hw_intf->idx; + if (phys_enc->split_role == ENC_ROLE_MASTER) + intf_cfg.intf_master = phys_enc->hw_intf->idx; intf_cfg.intf_mode_sel = DPU_CTL_MODE_SEL_VID; intf_cfg.stream_sel = 0; /* Don't care value for video mode */ intf_cfg.mode_3d = dpu_encoder_helper_get_3d_blend_mode(phys_enc); From patchwork Thu Feb 20 10:26:21 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 13983673 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B98DCC021B3 for ; Thu, 20 Feb 2025 10:26:34 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7EDE510E91D; Thu, 20 Feb 2025 10:26:33 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="zmUOyMUa"; dkim-atps=neutral Received: from mail-lf1-f51.google.com (mail-lf1-f51.google.com [209.85.167.51]) by gabe.freedesktop.org (Postfix) with ESMTPS id BFC5F10E91C for ; Thu, 20 Feb 2025 10:26:31 +0000 (UTC) Received: by mail-lf1-f51.google.com with SMTP id 2adb3069b0e04-5452e6f2999so804488e87.3 for ; Thu, 20 Feb 2025 02:26:31 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1740047190; x=1740651990; darn=lists.freedesktop.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=ff7ItJ+SnMHnASEHcZ5O+TpGECb0jLJ30NNOzaJgwmg=; b=zmUOyMUasW2cjhhlgx3L3FzYUjxSAlgKteSLQJ6jPTBXExmOXc/ORS5/BT7WyyRiso VuxRuJrLMJ8eipWfI8h4yAGQetGAo2TcvLlED6Q04R7omE3gAVREjtZiUMQhllhqZXcR 7j2ysWtKI8MhhcFuNP57vZJ/lKgtLjLrz4t2lS/tui3m2fc5H8TlJmg429NML0LnRWk+ M4+9CvSE6w9ab7pBeLuY+hCnrok5eDFR/55H5emm5PJ9gt54WtvI6rNsU4J3m42FVzmU zvLyloF9aBbLwPaBsD8tsB5NLDP0sfhvmzUD7unLXNpnMofN5uL6LQIzD7lYNwGFfr+B 8pjA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1740047190; x=1740651990; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ff7ItJ+SnMHnASEHcZ5O+TpGECb0jLJ30NNOzaJgwmg=; b=g0IuO0t+M91aLKZix0HPJbmkSXfkPmjndTIi9qWmfnmbarTkOEnkjmu5dRWgvsYKT5 J+2qFg6uXlVY7pj8ku6ctlw5d/DCmQXxywbbaGHoJ8kZ+jrBY3I3BuyZAy/RpAqGL6Qn KsZz2cLmdFlYMK1Qv8ldPyH5SB3wwnBmYEqKr71qWCaO5tNam61+YtSJw0IEDRtQFdiR J2v07127vwujXm+srjql3gSyGR2h8+Qsy2vSlt2l8fK7bPI1KOTdWwlWUZbCfSC36kE9 90KHBwTT4FQ2L1V8xFM/n5FpKSKMVbl92krAZC/437aqAaAJA0+e3VRXD6Flb0goOmjr xxbw== X-Forwarded-Encrypted: i=1; AJvYcCWmxfUcaw25mBq0GULSOpVBnVSdwx2ioeFHcTUR0f7WOprhzMzKmTrnbofkt/eI1XdvjMI96QY9HW8=@lists.freedesktop.org X-Gm-Message-State: AOJu0Yz8tWMQf7VpkliUBmz6KZtD3brRIcNrfOGuA3gmdnfypZfoB1WP mcVpqiW6hsmB8wsses4kcWLVsMqkxlHbrT6EkRp4Uj4B2R/DxTPeh6/V5uMC7Ic= X-Gm-Gg: ASbGncsvPcNP2F+n9ZL7GvjnVGB3461NZNw4MLTY/fRVULx+4UOyC0Iu+3LYbvitfUe 1abefOPyf5V+x6w2N9rhKN3/iXC+Bu0/BsY3TAjdRQU53XOYP8rbZKf3hS2sx5v/Mg8WAMRAaQ0 EIirz9xWYvwN2ue4/G/pNKMxfvgDpvUY+a9qa7aN58X9Wcik8UBmoF9AWioLuvPebZr+jdQ+few ORXsIptCkdbRD6Rx1UD39uiJ4Tsnbq41xSZWoYrySPmGRKFEfIh/3ry/ns7cHnTfIZeqUGH0wFD PF/4VE1W34Sncwl2/gAjKRI= X-Google-Smtp-Source: AGHT+IHBt9HzRKY8jmkakzOnUvvbEh4NOe+or6nzqbYZMeRyoIBCIJTZbNW9HUfXavUHGy8LrqzxzA== X-Received: by 2002:a19:5f1e:0:b0:546:2ea4:8e72 with SMTP id 2adb3069b0e04-5462ea490bamr2874449e87.49.1740047190016; Thu, 20 Feb 2025 02:26:30 -0800 (PST) Received: from umbar.lan ([192.130.178.90]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-545e939224esm1588052e87.135.2025.02.20.02.26.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 Feb 2025 02:26:28 -0800 (PST) From: Dmitry Baryshkov Date: Thu, 20 Feb 2025 12:26:21 +0200 Subject: [PATCH 4/7] drm/msm/dpu: use single CTL if it is the only CTL returned by RM MIME-Version: 1.0 Message-Id: <20250220-dpu-active-ctl-v1-4-71ca67a564f8@linaro.org> References: <20250220-dpu-active-ctl-v1-0-71ca67a564f8@linaro.org> In-Reply-To: <20250220-dpu-active-ctl-v1-0-71ca67a564f8@linaro.org> To: Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1197; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=R+chS185SijcfPYYCgAaRcXeK8VYBg1VE8B3d9ZjF0k=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBntwNKH5HPpczCu9L/5cp+mmYPkPzXuoJvH2zlI /BJSbMIVtaJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZ7cDSgAKCRCLPIo+Aiko 1U/bB/oDpQQYxShoHXWOQQeQDRt4B7KsbhHYKFXsqWyzLIMbrhA2+AYfan+s3Yq5pdKzRTf3LyU 0hiFB09nCcmi8MDPcXtCiN+eDDJWkISat3ZWao6vEH81ToCIcb5opY0qewxzHsl2BB6ytR4DrrP tZLETlHLLEHNswnxDMFE3oQuVO18wQdNR8OItn7QnvTFV4vRr2OZly04xb6qfeWXVSaIs2TTu/q n038iCfbHa4xGdJ7qeiIybTB2quagcnpfdvPMe4onA/rgYIOlI3BSXZZtpWIhvX1VokAzA1oZX8 zg4wRffj7liG//1uxiAL25vyvqYRTEGtI3vPaZmZhoWIYRcb X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" On DPU >= 5.0 CTL blocks were reworked in order to support using a single CTL for all outputs. In preparation of reworking the RM code to return single CTL make sure that dpu_encoder can cope with that. Signed-off-by: Dmitry Baryshkov Reviewed-by: Marijn Suijten --- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c index 5172ab4dea995a154cd88d05c3842d7425fc34ce..666a755dc74b41b79fa1bb2878339592478e4333 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c @@ -1283,7 +1283,11 @@ static void dpu_encoder_virt_atomic_mode_set(struct drm_encoder *drm_enc, return; } - phys->hw_ctl = i < num_ctl ? to_dpu_hw_ctl(hw_ctl[i]) : NULL; + /* Use first (and only) CTL if active CTLs are supported */ + if (num_ctl == 1) + phys->hw_ctl = to_dpu_hw_ctl(hw_ctl[0]); + else + phys->hw_ctl = i < num_ctl ? to_dpu_hw_ctl(hw_ctl[i]) : NULL; if (!phys->hw_ctl) { DPU_ERROR_ENC(dpu_enc, "no ctl block assigned at idx: %d\n", i); From patchwork Thu Feb 20 10:26:22 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 13983674 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 50D67C021B1 for ; Thu, 20 Feb 2025 10:26:39 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id ACF5910E922; Thu, 20 Feb 2025 10:26:38 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="L5Z3Aa6M"; dkim-atps=neutral Received: from mail-lf1-f46.google.com (mail-lf1-f46.google.com [209.85.167.46]) by gabe.freedesktop.org (Postfix) with ESMTPS id 5192B10E91D for ; Thu, 20 Feb 2025 10:26:33 +0000 (UTC) Received: by mail-lf1-f46.google.com with SMTP id 2adb3069b0e04-546237cd3cbso819546e87.0 for ; Thu, 20 Feb 2025 02:26:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1740047191; x=1740651991; darn=lists.freedesktop.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=X3V4xBbQpvjplr+11vPrizjbtJxjqV5/lKZ5s7afZXk=; b=L5Z3Aa6MnKj04v+i5SnkwWmGI1mRSSvOE5+IGvCCJjSwnquRCQNg9mV95K5Zdef5ha 7avP6miRryhij0ruCOB/Y9S0mvja0QORcdmgLqdbEXgt9N0RZ/y/HOe2MU/8t7KKyE4Z ASU4xTSGbdRO3nAW/DK30d16hO+WPnSMkAESCxx4Uu5MK9LUZ2YdLyO4z1aUccBX3xaO q3rV1LbJ3hmbNEVji9RTC6B3CLF13SPH0KFe6PKgO+yP2NMOsfhWxphaHvqIQqqFWaVv AhR/Z5bu8suQFwDlRdXWoAZprFQqEuAT5r2EdK+fpbSR1NcpQtdw4TIOnBCFc0a5hWYy h7dg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1740047192; x=1740651992; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=X3V4xBbQpvjplr+11vPrizjbtJxjqV5/lKZ5s7afZXk=; b=csaedw6pG/3PqmBaNXkCOoHe7K4BZuoYLex0ibbIYgAbhSUF9IBQ6TkJbqa4LlGRm6 8XQ9pwP6IxDN18i7UIpBs2Jr6+VRSnUFVnoxjlprt9k+7SWdlAg3mW9gDEzgHnYXnnEB 8DABEahzT3nAyMvsVXwTsofwpBZcChjiRbMNgAS9Kxf2BPTFxGAKO+37RbvYIOeSL3bn 65WpcoC4g1jGCekVplAa84DGaGZb2RFDCSUGlkxYE612/b/kcNTHVg2AVUHZrElkdcse cBpLdSPw5jyT/gqPrBF2DyFevVpBhQOZ4q5rLxKs/pPSgUMhGYwnvlLIHUTlnQis5xtE TuaQ== X-Forwarded-Encrypted: i=1; AJvYcCU9tHCI/ZYT2eootjism7s1ZkCxAy8rXf71WoWEGpa9yhRwN5Kt2z989yAcQgQ6OXh32bSzUF45/nI=@lists.freedesktop.org X-Gm-Message-State: AOJu0YwwJ8Rc5nzn4LeRhF4je6zeffR/DLMsRA1xFHoCRWDUsCsxCFyf EkcaQSruWnaZXfyGhNpv2sVMwCqOLG4W2719FBUGkSvDQJXjMx4/1KbF+Mg7hG89O+rm5IQYjZX K X-Gm-Gg: ASbGncuJPiZm6HqVkNC6gMGCwuHgiXHs23z1TPVKQNBlXCTTG8HH9++BK+o39eKix6c TkaoPOSuxthilaTK99Xu+z5K6pFk9gs7+Jz0CWH+ZHdW/X+hz34frDBMxi6VF0B3L/z+nl3rZkn RrpJysgeljRhHkeBTYpbKbfdB6himA6mGByTQPJq/7hBtjwCvFblS3h+/2wEDsVEEQHWOx/Edil 84li8BYKCYG5v88ZOCbSSjqxD7HfTTiswLizdq5BFDGd9aKf8g+dgt69ykMooxbX3tMRss9bhTl HHLp9jizr1xki4u/zkpTUCc= X-Google-Smtp-Source: AGHT+IFT7l/AtVtBLArk2SRlJ/wJq5MyR0YALvIDoLeckr+vIWmad/Qo311RAVJkfTcP2k498cUn/A== X-Received: by 2002:a05:6512:eaa:b0:545:c9d:ef26 with SMTP id 2adb3069b0e04-5452fea5da8mr7575910e87.46.1740047191589; Thu, 20 Feb 2025 02:26:31 -0800 (PST) Received: from umbar.lan ([192.130.178.90]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-545e939224esm1588052e87.135.2025.02.20.02.26.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 Feb 2025 02:26:31 -0800 (PST) From: Dmitry Baryshkov Date: Thu, 20 Feb 2025 12:26:22 +0200 Subject: [PATCH 5/7] drm/msm/dpu: don't select single flush for active CTL blocks MIME-Version: 1.0 Message-Id: <20250220-dpu-active-ctl-v1-5-71ca67a564f8@linaro.org> References: <20250220-dpu-active-ctl-v1-0-71ca67a564f8@linaro.org> In-Reply-To: <20250220-dpu-active-ctl-v1-0-71ca67a564f8@linaro.org> To: Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1072; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=Mj6W/g1cQTXrPDSCV2G/UAnCYQZDcnBUJoxZDb1VnZ4=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBntwNLSoDCJhBaYmL2ldFx0C1L91FbiV3nkagNu zV9tG1YFlWJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZ7cDSwAKCRCLPIo+Aiko 1Xl+CACrEnvEy3oMgM9VlWjdwvKg0hXcZYrjUorlyeRUYERUk9dlZKLpH1zwax5tK0rUBc6Eq47 A3Jpti5ik0g9bLxSisjpAwlNEgK+js56CDJ/++RgzCxWtZNligajW7lTnYDiWekbR1DngK1HBLU RZtrlTc9BE62ycVDxN9iwpfzyZKNi7Odk6UAgnA1RPb9l/WBnh5bAqytMKywl70PCuDC7N6XkvH kKQhlVaF5U+ZYU8lYwds1aI8QQlXAQ6JtpeoubML+TUyeONzeyyJICJcLrS6Dqhec64HUfPnuGi TPufr0KlKKM4eweQwpOnN2F7QE5k4Qt3bfsUPj5sfEzj9JkU X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" In case of ACTIVE CTLs, a single CTL is being used for flushing all INTF blocks. Don't skip programming the CTL on those targets. Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c index 232055473ba55998b79dd2e8c752c129bbffbff4..8a618841e3ea89acfe4a42d48319a6c54a1b3495 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c @@ -374,7 +374,8 @@ static void dpu_encoder_phys_vid_underrun_irq(void *arg) static bool dpu_encoder_phys_vid_needs_single_flush( struct dpu_encoder_phys *phys_enc) { - return phys_enc->split_role != ENC_ROLE_SOLO; + return !(phys_enc->hw_ctl->caps->features & BIT(DPU_CTL_ACTIVE_CFG)) && + phys_enc->split_role != ENC_ROLE_SOLO; } static void dpu_encoder_phys_vid_atomic_mode_set( From patchwork Thu Feb 20 10:26:23 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 13983676 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D584DC021B2 for ; Thu, 20 Feb 2025 10:26:40 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 54F3510E925; Thu, 20 Feb 2025 10:26:39 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="cE1fy5bg"; dkim-atps=neutral Received: from mail-lf1-f54.google.com (mail-lf1-f54.google.com [209.85.167.54]) by gabe.freedesktop.org (Postfix) with ESMTPS id 0B92710E921 for ; Thu, 20 Feb 2025 10:26:35 +0000 (UTC) Received: by mail-lf1-f54.google.com with SMTP id 2adb3069b0e04-54298ec925bso1298468e87.3 for ; Thu, 20 Feb 2025 02:26:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1740047193; x=1740651993; darn=lists.freedesktop.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=XcgN3KcZQIKunyhp5MN5k0ww8zI0POS9d4nm1tGHVCo=; b=cE1fy5bgeDx1G1dlbYZQMPdxsEHbRs8jiozf5VGQRh7LR4ghJ/THPMq6nqChxVQ6jH RcsdT3RapMlNQUu6igUD94eUVq64/EoCNHDFji3ZB2oy702RkwnuGzlyUXKBJ1YT4tdG Et5e+4oO5pj+psriEsuLihrYG3Rb8WNTESDthezXRFXuBp7Ew0eyq2vluHzDMz1whvql S73JfJ/ypRHhydQ3YdkeiUwqS0xUAisBzBH3Q4qQUkdCNwqrIkvrey+iiPxR0vGB2ycY ssCM04c9hAxViuUGdGUFw17oNQJ7a+MxtwJl5IWbnKQ3EeG5HO850awpilHYei4+eppR CnWA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1740047193; x=1740651993; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=XcgN3KcZQIKunyhp5MN5k0ww8zI0POS9d4nm1tGHVCo=; b=ijmMMEgaI9DTld0JJRW2rYbtcwHc9+vef9qgnQRf2ekyZAMM2FgjERLARlFQHLyEiA LP7Pvm98g1qeen3WEUgrpm0kRi2ixYYfLeJcc5T04Tl8liiTHNOxFDVKtbtBxn27RXKn 526lsvU4puxAoP4YBKu0LLl1mOyw0IX7MgGttYcyPF6spJyi1wCYwAXks4aIwuxf5oDZ 9jvRCc+bhYIvoPJRLpYBDx9y8PIKLtxDVYt6wb9ZrAAmii9ZGvdH6WnftGYce9Uuus89 WTC74bd5rSir5qFn9Mon1pf305f31++BUTN725iQHSgp9rQDRaItcz3y/nL4Rf+z+D4i P5Dw== X-Forwarded-Encrypted: i=1; AJvYcCXoKfFbG5szKuHlO5/Vu8d+3lNuYsumKa6Xcqy8dqbk9SmBMnnHa1foWwEPc7L/W/WmNKsow3CaUWk=@lists.freedesktop.org X-Gm-Message-State: AOJu0YzQOSScVTUllG2R6JJb1rj3jajwTMN+P3azdZ4L8NM8SQE8vvCQ 6vKMs55F3FvE3oRfcNiTDtwtr0jtgMBN8sLeuaHllcM+0NY0Ezz3YhxWN1k9i/0= X-Gm-Gg: ASbGncvYZt3jcf622kLT4gYRnUrevs3k1FFU+NO8v24H6qOBtnRa2CIWaCcO5aliU7x JFBMWL1XYmiposYP/nFeKCEsDCOeDpJWbMsYktK4rLhbiEMMEJuL/4F07/5Izcw9Xe2xsSmhDm7 4PPaXikIyn0oZohAniAPe58j6RAMEWbxehG8eKn5RTVwny16vs548MPs+azCNMeLVhfdFgLsNnc hFokk6wuNINVxa/jeBeIPGpve1UDE/Og2p6btHuOX9kUuHis1avrosUApvicStPthOB5tmFXxIV P6IUYqhqHGyrpMtE0/VHWNk= X-Google-Smtp-Source: AGHT+IEM9+GwpoyKZl6DXyfHoUFNWFP013z/rJDJY6azNQJu3BsrfRzXnCOVs/HY3FvHdFiR+OFW2A== X-Received: by 2002:a05:6512:2396:b0:545:1d25:460d with SMTP id 2adb3069b0e04-5462eee6586mr3144030e87.12.1740047193190; Thu, 20 Feb 2025 02:26:33 -0800 (PST) Received: from umbar.lan ([192.130.178.90]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-545e939224esm1588052e87.135.2025.02.20.02.26.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 Feb 2025 02:26:31 -0800 (PST) From: Dmitry Baryshkov Date: Thu, 20 Feb 2025 12:26:23 +0200 Subject: [PATCH 6/7] drm/msm/dpu: allocate single CTL for DPU >= 5.0 MIME-Version: 1.0 Message-Id: <20250220-dpu-active-ctl-v1-6-71ca67a564f8@linaro.org> References: <20250220-dpu-active-ctl-v1-0-71ca67a564f8@linaro.org> In-Reply-To: <20250220-dpu-active-ctl-v1-0-71ca67a564f8@linaro.org> To: Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2889; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=bTtPeLTR7bIGAjAGWZZbYSPB+kORXsbXpocudthnDVU=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBntwNLcO4pIN+ypbPAk3kZc9xkCx3N/uJ1cgUA4 9Jx+DG4DTuJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZ7cDSwAKCRCLPIo+Aiko 1b4sCACwhvMnemZlynSEuUk5qg5JVNllVcUdExghA2X1IiBLMjPPRqFLSOs40D2uxyzV5xc8ZkN DV+h0qhdC20PUTM7ZUtl/Ngb6gvmA10XOTFlli0ITCbOuItVfJrj8QopMwsQasQ4R32Xg6jXOnA jy+HXtzpD4feH+5hz+PiR8v+ZOe/epUccGfXOIx0rEJ+tD0RT1htDMg34FAlmwkPKoG+pBz4E3N KpX15ArRQDd5zAZrsb+sKYoVcbdWkU8wbvOzcc5dudT95O+yhmYEThoIIShE6NwdvgibQL0U/8k MBuoevG8EUDJ1+wSsL3VJkxGBSalC90b4I6Bo9QB5AupStG/ X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Unlike previous generation, since DPU 5.0 it is possible to use just one CTL to handle all INTF and WB blocks for a single output. And one has to use single CTL to support bonded DSI config. Allocate single CTL for these DPU versions. Signed-off-by: Dmitry Baryshkov Reviewed-by: Marijn Suijten --- drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 17 +++++++++++++---- drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 2 ++ 2 files changed, 15 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c index 5baf9df702b84b74ba00e703ad3cc12afb0e94a4..4dbc9bc7eb4f151f83055220665ee5fd238ae7ba 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c @@ -53,6 +53,8 @@ int dpu_rm_init(struct drm_device *dev, /* Clear, setup lists */ memset(rm, 0, sizeof(*rm)); + rm->has_legacy_ctls = (cat->mdss_ver->core_major_ver < 5); + /* Interrogate HW catalog and create tracking items for hw blocks */ for (i = 0; i < cat->mixer_count; i++) { struct dpu_hw_mixer *hw; @@ -381,10 +383,16 @@ static int _dpu_rm_reserve_ctls( int i = 0, j, num_ctls; bool needs_split_display; - /* each hw_intf needs its own hw_ctrl to program its control path */ - num_ctls = top->num_intf; + if (rm->has_legacy_ctls) { + /* each hw_intf needs its own hw_ctrl to program its control path */ + num_ctls = top->num_intf; - needs_split_display = _dpu_rm_needs_split_display(top); + needs_split_display = _dpu_rm_needs_split_display(top); + } else { + /* use single CTL */ + num_ctls = 1; + needs_split_display = false; + } for (j = 0; j < ARRAY_SIZE(rm->ctl_blks); j++) { const struct dpu_hw_ctl *ctl; @@ -402,7 +410,8 @@ static int _dpu_rm_reserve_ctls( DPU_DEBUG("ctl %d caps 0x%lX\n", j + CTL_0, features); - if (needs_split_display != has_split_display) + if (rm->has_legacy_ctls && + needs_split_display != has_split_display) continue; ctl_idx[i] = j; diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h index 99bd594ee0d1995eca5a1f661b15e24fdf6acf39..130f753c36338544e84a305b266c3b47fa028d84 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h @@ -24,6 +24,7 @@ struct dpu_global_state; * @dspp_blks: array of dspp hardware resources * @hw_sspp: array of sspp hardware resources * @cdm_blk: cdm hardware resource + * @has_legacy_ctls: DPU uses pre-ACTIVE CTL blocks. */ struct dpu_rm { struct dpu_hw_blk *pingpong_blks[PINGPONG_MAX - PINGPONG_0]; @@ -37,6 +38,7 @@ struct dpu_rm { struct dpu_hw_blk *dsc_blks[DSC_MAX - DSC_0]; struct dpu_hw_sspp *hw_sspp[SSPP_MAX - SSPP_NONE]; struct dpu_hw_blk *cdm_blk; + bool has_legacy_ctls; }; struct dpu_rm_sspp_requirements { From patchwork Thu Feb 20 10:26:24 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 13983675 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 78211C021B3 for ; Thu, 20 Feb 2025 10:26:39 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id AA8A110E920; Thu, 20 Feb 2025 10:26:38 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="JCcTrLnX"; dkim-atps=neutral Received: from mail-lf1-f48.google.com (mail-lf1-f48.google.com [209.85.167.48]) by gabe.freedesktop.org (Postfix) with ESMTPS id 9210610E922 for ; Thu, 20 Feb 2025 10:26:37 +0000 (UTC) Received: by mail-lf1-f48.google.com with SMTP id 2adb3069b0e04-54529eeb38aso619222e87.2 for ; Thu, 20 Feb 2025 02:26:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1740047196; x=1740651996; darn=lists.freedesktop.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=JXV+41aWmBax3Mr2Ai2cx6npG1dbHSfJC49MTHURMEc=; b=JCcTrLnXaU5cgWgWd6LK3EKj27zpTjXgXCgO4FaAuQaLFEthIJAQO4sdfFz6Ig9OCF VUcNGn3ybZHPTpg2VhVQDfernh5JNayF7/1AmTZi3mCvon80rorWNeZCK34ypzdav6YU Hy1XL5Bqd1Cst10cbWvjXO4V70PMXCDqyJMmLzuWdp6/PepREloDGQ0SEIXDQC8lH9wY 5e8wDQ6MwB3YaSnWP89e7fgT8KtLdoLlxxjmGUCBImuPB0Kzarn+MBDadHIhcEM03zou K5axeLjzdrOit2dc0krk+9Nh/Qw9D+YhgMPKQV/SMbkgx5WZxlizTAkxxubsYlPQU1Kg Snsg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1740047196; x=1740651996; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=JXV+41aWmBax3Mr2Ai2cx6npG1dbHSfJC49MTHURMEc=; b=uyUmaFFJEpmoRq61jr8R0PXCPAuxRuCEayG1z2JkFMexFWocBiKZoA+8WuH/2ogO3s 0kMxYui6oI7ZnR6lLp/WADmxWCtoRpvwxVtLv4aD7opkXmxKxhI3lX1GYGHCnLoz7ygD xU2MtjExjxco+aNZI+2xS4d8yD84Q0ypTkgPN8LoaMo7wfPGOXjZWpP5ksuLkRUO+fFp NqZLVug64z/J7Nxkd9c/g2dI0lt1+TiUyotBRfGDNz5+JhniQHfihTgBE8EOEC3iQtXH sJYmTaLP34ccIQTXm+jqPId+4sIxR2qFySN1l8T8+41dwRKadkXo1hG3fWGSmgw1QiTB d2uw== X-Forwarded-Encrypted: i=1; AJvYcCX07YfAaBjXyIbV/cF1XRN8WTLDwS6DcxOMMP+GtoYtD6ZGBnJ6QwVM888GxHKC3NH4umDSjtGf/8I=@lists.freedesktop.org X-Gm-Message-State: AOJu0Yx6bGtujqo4hpa42dyZAs94gCEJq3eeb0/a71zVAxVY8XGYLvVi HizvxjXo/ipYfcaT50NV+2RrLiNCGCVXt96o0r0kyWnIWAU06iSUJyfzkFcYTyk= X-Gm-Gg: ASbGncuSCimgw6fdsNnqQ4hHUJPQ/UgqPDZihM4beGiDqJvi7XERRvYOau9n98bfmmo UX4saF2M55yQrPI5WPHGYtD/ntnjkx3+hcqjSPTB/ywaSy4fK/cbB1CHECBLV3ggYpEjDlH8F5R NaoZxcnWNmF3zDSEO+TPwp/MvyL4PnEghaGP6yJKLj/rRRYM64LXI1HuOQ1Zsej3ltBUajXO2DJ kheTKIIlvji461/D8jukm7vw3N6jha85Nx1b5390nFB8TXyceIgQ7oLI86ZmNlwGxWrNtcxTqEf c+PqkFT7TzghNlRvwMmrO+0= X-Google-Smtp-Source: AGHT+IH1rFaCfEon5U0XhPyy5VxFnS+y1/5rsc5dcY7BoKqss96U6i4/V5aafzo8e1npNsdPsk7lqQ== X-Received: by 2002:a05:6512:2396:b0:545:1d25:460d with SMTP id 2adb3069b0e04-5462eee6586mr3144085e87.12.1740047195732; Thu, 20 Feb 2025 02:26:35 -0800 (PST) Received: from umbar.lan ([192.130.178.90]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-545e939224esm1588052e87.135.2025.02.20.02.26.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 Feb 2025 02:26:34 -0800 (PST) From: Dmitry Baryshkov Date: Thu, 20 Feb 2025 12:26:24 +0200 Subject: [PATCH 7/7] drm/msm/dpu: remove DPU_CTL_SPLIT_DISPLAY from CTL blocks on DPU >= 5.0 MIME-Version: 1.0 Message-Id: <20250220-dpu-active-ctl-v1-7-71ca67a564f8@linaro.org> References: <20250220-dpu-active-ctl-v1-0-71ca67a564f8@linaro.org> In-Reply-To: <20250220-dpu-active-ctl-v1-0-71ca67a564f8@linaro.org> To: Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=12609; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=F2+KlNEiE24AXgRgmBMHY9zrf48emWjOElv//W0lysM=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBntwNLY6lcqUHb9VOhvlnyHhq7KTQVsN2cQo1S2 6ZMMxrJR5aJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZ7cDSwAKCRCLPIo+Aiko 1XmaB/9McVYa64+vUEsjSllSkio5eio12GIRpFYhuhFW/j57FCbiIi6Qu6DoqwjNecSMZJCMLX4 Yzi07BDDGIOzl8GXyIv+ajZ3vHRcykyJ80lyfgCm53txKwPeBYIy5tvkBMKWE9/OefkwKfRBAfJ traLdibowCauzVnFjy4P2MQGB6oGz6dleq78A1BT0/A9hpCG/QZ2t3M40VCGnaGIkk1Y0JiKO4m FR0uAoFI+mXiSQpT2RG92X4Iz++I1mRehCev8bLqb5TXH8pBtrOiobQfLx9vpGrCUF5Ob5VGrLs dOJvB9ChOt7vJJ+HopvNaRnoYNAh+QbhwsVSYQQYsKouBdw4 X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Since DPU 5.0 CTL blocks do not require DPU_CTL_SPLIT_DISPLAY, as single CTL is used for both interfaces. As both RM and encoder now handle active CTLs, drop that feature bit. Signed-off-by: Dmitry Baryshkov Reviewed-by: Marijn Suijten --- drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_10_0_sm8650.h | 5 ++--- drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h | 5 ++--- drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h | 4 ++-- drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_2_sm7150.h | 4 ++-- drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h | 5 ++--- drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h | 5 ++--- drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h | 5 ++--- drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h | 5 ++--- drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_4_sa8775p.h | 5 ++--- drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h | 5 ++--- drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_2_x1e80100.h | 5 ++--- 11 files changed, 22 insertions(+), 31 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_10_0_sm8650.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_10_0_sm8650.h index bcb39807fe61e231d6e318d8729ed86f213fb06a..a705e3e761d9a578777cd03011e90df8002127a6 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_10_0_sm8650.h +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_10_0_sm8650.h @@ -27,17 +27,16 @@ static const struct dpu_mdp_cfg sm8650_mdp = { }, }; -/* FIXME: get rid of DPU_CTL_SPLIT_DISPLAY in favour of proper ACTIVE_CTL support */ static const struct dpu_ctl_cfg sm8650_ctl[] = { { .name = "ctl_0", .id = CTL_0, .base = 0x15000, .len = 0x1000, - .features = CTL_SM8550_MASK | BIT(DPU_CTL_SPLIT_DISPLAY), + .features = CTL_SM8550_MASK, .intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 9), }, { .name = "ctl_1", .id = CTL_1, .base = 0x16000, .len = 0x1000, - .features = CTL_SM8550_MASK | BIT(DPU_CTL_SPLIT_DISPLAY), + .features = CTL_SM8550_MASK, .intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 10), }, { .name = "ctl_2", .id = CTL_2, diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h index 421afacb7248039abd9fb66bcb73b756ae0d640a..bf4ff275bba4320e70acf516cb784b1bdd0cf966 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h @@ -37,17 +37,16 @@ static const struct dpu_mdp_cfg sm8150_mdp = { }, }; -/* FIXME: get rid of DPU_CTL_SPLIT_DISPLAY in favour of proper ACTIVE_CTL support */ static const struct dpu_ctl_cfg sm8150_ctl[] = { { .name = "ctl_0", .id = CTL_0, .base = 0x1000, .len = 0x1e0, - .features = BIT(DPU_CTL_ACTIVE_CFG) | BIT(DPU_CTL_SPLIT_DISPLAY), + .features = BIT(DPU_CTL_ACTIVE_CFG), .intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 9), }, { .name = "ctl_1", .id = CTL_1, .base = 0x1200, .len = 0x1e0, - .features = BIT(DPU_CTL_ACTIVE_CFG) | BIT(DPU_CTL_SPLIT_DISPLAY), + .features = BIT(DPU_CTL_ACTIVE_CFG), .intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 10), }, { .name = "ctl_2", .id = CTL_2, diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h index 641023b102bf59352546f0782d9264986367de78..7ec4fd702fd2f37e2e6a5758154d14967ba11504 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h @@ -41,12 +41,12 @@ static const struct dpu_ctl_cfg sc8180x_ctl[] = { { .name = "ctl_0", .id = CTL_0, .base = 0x1000, .len = 0x1e0, - .features = BIT(DPU_CTL_ACTIVE_CFG) | BIT(DPU_CTL_SPLIT_DISPLAY), + .features = BIT(DPU_CTL_ACTIVE_CFG), .intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 9), }, { .name = "ctl_1", .id = CTL_1, .base = 0x1200, .len = 0x1e0, - .features = BIT(DPU_CTL_ACTIVE_CFG) | BIT(DPU_CTL_SPLIT_DISPLAY), + .features = BIT(DPU_CTL_ACTIVE_CFG), .intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 10), }, { .name = "ctl_2", .id = CTL_2, diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_2_sm7150.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_2_sm7150.h index 2fe674d1e05988f39f66a01fedee96113437ea65..0d102888741a0c61ac547ec568e44c1e91350835 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_2_sm7150.h +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_2_sm7150.h @@ -38,12 +38,12 @@ static const struct dpu_ctl_cfg sm7150_ctl[] = { { .name = "ctl_0", .id = CTL_0, .base = 0x1000, .len = 0x1e0, - .features = BIT(DPU_CTL_ACTIVE_CFG) | BIT(DPU_CTL_SPLIT_DISPLAY), + .features = BIT(DPU_CTL_ACTIVE_CFG), .intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 9), }, { .name = "ctl_1", .id = CTL_1, .base = 0x1200, .len = 0x1e0, - .features = BIT(DPU_CTL_ACTIVE_CFG) | BIT(DPU_CTL_SPLIT_DISPLAY), + .features = BIT(DPU_CTL_ACTIVE_CFG), .intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 10), }, { .name = "ctl_2", .id = CTL_2, diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h index e8916ae826a6daf30eb08de53521dae89c07636c..3da26970426f9672c34f213064cdb8eff8c18da5 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h @@ -35,17 +35,16 @@ static const struct dpu_mdp_cfg sm8250_mdp = { }, }; -/* FIXME: get rid of DPU_CTL_SPLIT_DISPLAY in favour of proper ACTIVE_CTL support */ static const struct dpu_ctl_cfg sm8250_ctl[] = { { .name = "ctl_0", .id = CTL_0, .base = 0x1000, .len = 0x1e0, - .features = BIT(DPU_CTL_ACTIVE_CFG) | BIT(DPU_CTL_SPLIT_DISPLAY), + .features = BIT(DPU_CTL_ACTIVE_CFG), .intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 9), }, { .name = "ctl_1", .id = CTL_1, .base = 0x1200, .len = 0x1e0, - .features = BIT(DPU_CTL_ACTIVE_CFG) | BIT(DPU_CTL_SPLIT_DISPLAY), + .features = BIT(DPU_CTL_ACTIVE_CFG), .intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 10), }, { .name = "ctl_2", .id = CTL_2, diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h index f7c08e89c882038aa658955ca1202bda3d928e80..16fbfea01e3272229c817db480b86c1a715d5c4a 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h @@ -35,17 +35,16 @@ static const struct dpu_mdp_cfg sm8350_mdp = { }, }; -/* FIXME: get rid of DPU_CTL_SPLIT_DISPLAY in favour of proper ACTIVE_CTL support */ static const struct dpu_ctl_cfg sm8350_ctl[] = { { .name = "ctl_0", .id = CTL_0, .base = 0x15000, .len = 0x1e8, - .features = BIT(DPU_CTL_SPLIT_DISPLAY) | CTL_SC7280_MASK, + .features = CTL_SC7280_MASK, .intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 9), }, { .name = "ctl_1", .id = CTL_1, .base = 0x16000, .len = 0x1e8, - .features = BIT(DPU_CTL_SPLIT_DISPLAY) | CTL_SC7280_MASK, + .features = CTL_SC7280_MASK, .intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 10), }, { .name = "ctl_2", .id = CTL_2, diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h index 0d143e390eca964b1c81f835d0904a2079b0b941..e6f2a8665ea2598ca5a813158ba1cdd9f491a41f 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h @@ -35,17 +35,16 @@ static const struct dpu_mdp_cfg sc8280xp_mdp = { }, }; -/* FIXME: get rid of DPU_CTL_SPLIT_DISPLAY in favour of proper ACTIVE_CTL support */ static const struct dpu_ctl_cfg sc8280xp_ctl[] = { { .name = "ctl_0", .id = CTL_0, .base = 0x15000, .len = 0x204, - .features = BIT(DPU_CTL_SPLIT_DISPLAY) | CTL_SC7280_MASK, + .features = CTL_SC7280_MASK, .intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 9), }, { .name = "ctl_1", .id = CTL_1, .base = 0x16000, .len = 0x204, - .features = BIT(DPU_CTL_SPLIT_DISPLAY) | CTL_SC7280_MASK, + .features = CTL_SC7280_MASK, .intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 10), }, { .name = "ctl_2", .id = CTL_2, diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h index 08742472f9cc812fbaf8f842ff7bd78f597e2b8d..bac75783063fd5588bc1cc19cb79f11cb0431bb8 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h @@ -36,17 +36,16 @@ static const struct dpu_mdp_cfg sm8450_mdp = { }, }; -/* FIXME: get rid of DPU_CTL_SPLIT_DISPLAY in favour of proper ACTIVE_CTL support */ static const struct dpu_ctl_cfg sm8450_ctl[] = { { .name = "ctl_0", .id = CTL_0, .base = 0x15000, .len = 0x204, - .features = BIT(DPU_CTL_SPLIT_DISPLAY) | CTL_SC7280_MASK, + .features = CTL_SC7280_MASK, .intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 9), }, { .name = "ctl_1", .id = CTL_1, .base = 0x16000, .len = 0x204, - .features = BIT(DPU_CTL_SPLIT_DISPLAY) | CTL_SC7280_MASK, + .features = CTL_SC7280_MASK, .intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 10), }, { .name = "ctl_2", .id = CTL_2, diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_4_sa8775p.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_4_sa8775p.h index 76ec72a323781363d37b62fec752ea1232bbd75b..2b36c438bc8a22e2650f1d546d0259f8c6e747b4 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_4_sa8775p.h +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_4_sa8775p.h @@ -35,17 +35,16 @@ static const struct dpu_mdp_cfg sa8775p_mdp = { }, }; -/* FIXME: get rid of DPU_CTL_SPLIT_DISPLAY in favour of proper ACTIVE_CTL support */ static const struct dpu_ctl_cfg sa8775p_ctl[] = { { .name = "ctl_0", .id = CTL_0, .base = 0x15000, .len = 0x204, - .features = BIT(DPU_CTL_SPLIT_DISPLAY) | CTL_SC7280_MASK, + .features = CTL_SC7280_MASK, .intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 9), }, { .name = "ctl_1", .id = CTL_1, .base = 0x16000, .len = 0x204, - .features = BIT(DPU_CTL_SPLIT_DISPLAY) | CTL_SC7280_MASK, + .features = CTL_SC7280_MASK, .intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 10), }, { .name = "ctl_2", .id = CTL_2, diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h index 4d3787fceb72fb3641057a7ea04ae6503b671042..5e0d2e8aabbaa406e332024676c5eb8205fec177 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h @@ -27,17 +27,16 @@ static const struct dpu_mdp_cfg sm8550_mdp = { }, }; -/* FIXME: get rid of DPU_CTL_SPLIT_DISPLAY in favour of proper ACTIVE_CTL support */ static const struct dpu_ctl_cfg sm8550_ctl[] = { { .name = "ctl_0", .id = CTL_0, .base = 0x15000, .len = 0x290, - .features = CTL_SM8550_MASK | BIT(DPU_CTL_SPLIT_DISPLAY), + .features = CTL_SM8550_MASK, .intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 9), }, { .name = "ctl_1", .id = CTL_1, .base = 0x16000, .len = 0x290, - .features = CTL_SM8550_MASK | BIT(DPU_CTL_SPLIT_DISPLAY), + .features = CTL_SM8550_MASK, .intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 10), }, { .name = "ctl_2", .id = CTL_2, diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_2_x1e80100.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_2_x1e80100.h index 6b112e3d17da6a4423851525262b66aa6c8622e3..a500a38ce07b84c2c9ad51aaf5847ee0bbcc72a5 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_2_x1e80100.h +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_2_x1e80100.h @@ -26,17 +26,16 @@ static const struct dpu_mdp_cfg x1e80100_mdp = { }, }; -/* FIXME: get rid of DPU_CTL_SPLIT_DISPLAY in favour of proper ACTIVE_CTL support */ static const struct dpu_ctl_cfg x1e80100_ctl[] = { { .name = "ctl_0", .id = CTL_0, .base = 0x15000, .len = 0x290, - .features = CTL_SM8550_MASK | BIT(DPU_CTL_SPLIT_DISPLAY), + .features = CTL_SM8550_MASK, .intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 9), }, { .name = "ctl_1", .id = CTL_1, .base = 0x16000, .len = 0x290, - .features = CTL_SM8550_MASK | BIT(DPU_CTL_SPLIT_DISPLAY), + .features = CTL_SM8550_MASK, .intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 10), }, { .name = "ctl_2", .id = CTL_2,