From patchwork Fri Feb 21 07:48:31 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Friday Yang X-Patchwork-Id: 13984938 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EC41AC021B3 for ; Fri, 21 Feb 2025 07:53:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date :Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=qQaDmPLgmLKJU2RGkP+s8KDAJyoBGEU+1cNzeAXZsmU=; b=PhMnj2L2w56HyVdBvphMAbAZSx wqAXxf15ebozH41Il3BLOr18sHZviYB0YdGoE9o1OiP0h7WXCavZ8BKWISHwtg5/BWttD2HiQ/Ik9 XquRX2s+sMZCbGM88Sobamia0i8AfjNvv2ti+1lIM/YuE5hxUZ0cCKsMtk4b6VAaT+F6jar6uu6kx Q9JZ+PDDL1pPDqStPGVAiu5/dj89K7pjHuWfuPUduKtEruOqhtbQbSOL4Kd7IVVQ9R5cil+1rErg7 fgk3L07rwIR5AqCz5X2FmREK8IgJdLJ26KJMa/sX5vDIT2tOzVggmMyo3S9t1JMRpAkR/V+UjxIzr 6K7adyWg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tlNqO-00000004aaG-1Nul; Fri, 21 Feb 2025 07:53:08 +0000 Received: from mailgw02.mediatek.com ([216.200.240.185]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tlNmM-00000004ZhR-28RO; Fri, 21 Feb 2025 07:48:59 +0000 X-UUID: 4c5fe6e0f02811efa1e849db4cc18d44-20250221 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=qQaDmPLgmLKJU2RGkP+s8KDAJyoBGEU+1cNzeAXZsmU=; b=Q7lFic++8vbeEwZ59ON9gBZGvKNXi4gdj8OYsIPmANHsCNPhBg/EJpNDw2ibJ6k6wyRI7pttmO+rR1+OuWfe4Se68tuztRy7g/UniVXfbDa7F4GKGD8ibJoDHwspDGJQzxzXBndEWD1iqpqcHoFPR9VsWiF8xge2My4jg+AImKc=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.46,REQID:800155df-788e-49eb-847b-76992b607806,IP:0,U RL:0,TC:0,Content:0,EDM:-25,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTIO N:release,TS:-25 X-CID-META: VersionHash:60aa074,CLOUDID:06d01529-e0f8-414e-b8c3-b75c08217be8,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:81|82|102,TC:nil,Content:0|50,EDM:1| 19,IP:nil,URL:1,File:nil,RT:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0, AV:0,LES:1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0 X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR,TF_CID_SPAM_ULS X-UUID: 4c5fe6e0f02811efa1e849db4cc18d44-20250221 Received: from mtkmbs09n2.mediatek.inc [(172.21.101.94)] by mailgw02.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1114910968; Fri, 21 Feb 2025 00:48:54 -0700 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by MTKMBS14N1.mediatek.inc (172.21.101.75) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Fri, 21 Feb 2025 15:48:51 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1258.28 via Frontend Transport; Fri, 21 Feb 2025 15:48:50 +0800 From: Friday Yang To: Yong Wu , Krzysztof Kozlowski , Rob Herring , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Philipp Zabel CC: Friday Yang , , , , , Subject: [PATCH v4 1/2] dt-bindings: memory: mediatek: Add SMI reset and clamp for MT8188 Date: Fri, 21 Feb 2025 15:48:31 +0800 Message-ID: <20250221074846.14105-2-friday.yang@mediatek.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20250221074846.14105-1-friday.yang@mediatek.com> References: <20250221074846.14105-1-friday.yang@mediatek.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250220_234858_552183_C52549CF X-CRM114-Status: GOOD ( 14.86 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: "Friday Yang" On the MediaTek platform, some SMI LARBs are directly connected to the SMI Common, while others are connected to the SMI Sub-Common, which in turn is connected to the SMI Common. The hardware block diagram can be described as follows. SMI-Common(Smart Multimedia Interface Common) | +----------------+------------------+ | | | | | | | | | | | | | | | larb0 SMI-Sub-Common0 SMI-Sub-Common1 | | | | | larb1 larb2 larb3 larb7 larb9 For previous discussion on the direction of the code modifications, please refer to: https://lore.kernel.org/all/CAFGrd9qZhObQXvm2_abqaX83xMLqxjQETB2= wXpobDWU1CnvkA@mail.gmail.com/ https://lore.kernel.org/all/CAPDyKFpokXV2gJDgowbixTvOH_5VL3B5H8ey hP+KJ5Fasm2rFg@mail.gmail.com/ On the MediaTek MT8188 SoC platform, we encountered power-off failures and SMI bus hang issues during camera stress tests. The issue arises because bus glitches are sometimes produced when MTCMOS powers on or off. While this is fairly normal, the software must handle these glitches to avoid mistaking them for transaction signals. What's more, this issue emerged only after the initial upstreaming of this binding. Without these patches, the SMI becomes unstable during camera stress tests. The software solutions can be summarized as follows: 1. Use CLAMP to disable the SMI sub-common port after turning off the LARB CG and before turning off the LARB MTCMOS. 2. Use CLAMP to disable/enable the SMI sub-common port. 3. Implement an AXI reset for SMI LARBs. This patch primarily add two changes: 1. Add compatible for SMI sub-common on MT8188 SoC. 2. Add 'resets' and 'reset-names' properties for SMI LARBs to support SMI reset operations. Signed-off-by: Friday Yang --- .../mediatek,smi-common.yaml | 2 ++ .../memory-controllers/mediatek,smi-larb.yaml | 20 +++++++++++++++++++ 2 files changed, 22 insertions(+) -- 2.46.0 diff --git a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml index 2f36ac23604c..4392d349878c 100644 --- a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml @@ -39,6 +39,7 @@ properties: - mediatek,mt8186-smi-common - mediatek,mt8188-smi-common-vdo - mediatek,mt8188-smi-common-vpp + - mediatek,mt8188-smi-sub-common - mediatek,mt8192-smi-common - mediatek,mt8195-smi-common-vdo - mediatek,mt8195-smi-common-vpp @@ -107,6 +108,7 @@ allOf: compatible: contains: enum: + - mediatek,mt8188-smi-sub-common - mediatek,mt8195-smi-sub-common then: required: diff --git a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml index 2381660b324c..2e86bb3455f9 100644 --- a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml @@ -69,6 +69,12 @@ properties: description: the hardware id of this larb. It's only required when this hardware id is not consecutive from its M4U point of view. + resets: + maxItems: 1 + + reset-names: + const: larb + required: - compatible - reg @@ -125,6 +131,20 @@ allOf: required: - mediatek,larb-id + - if: # only for image, camera and ipe subsys + properties: + compatible: + const: mediatek,mt8188-smi-larb + mediatek,larb-id: + oneOf: + - enum: + [ 9, 10, 11, 12, 13, 16, 17, 18, 19, 20 ] + + then: + required: + - resets + - reset-names + additionalProperties: false examples: From patchwork Fri Feb 21 07:48:32 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Friday Yang X-Patchwork-Id: 13984939 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4B13AC021AA for ; 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Fri, 21 Feb 2025 00:48:56 -0700 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Fri, 21 Feb 2025 15:48:53 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1258.28 via Frontend Transport; Fri, 21 Feb 2025 15:48:52 +0800 From: Friday Yang To: Yong Wu , Krzysztof Kozlowski , "Rob Herring" , Conor Dooley , "Matthias Brugger" , AngeloGioacchino Del Regno , Philipp Zabel CC: Friday Yang , , , , , Subject: [PATCH v4 2/2] memory: mtk-smi: mt8188: Add SMI reset and clamp for MT8188 Date: Fri, 21 Feb 2025 15:48:32 +0800 Message-ID: <20250221074846.14105-3-friday.yang@mediatek.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20250221074846.14105-1-friday.yang@mediatek.com> References: <20250221074846.14105-1-friday.yang@mediatek.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250220_234900_754273_F053536B X-CRM114-Status: GOOD ( 21.61 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: "Friday Yang" To prevent handling glitch signals during MTCMOS on/off transitions, SMI requires clamp and reset operations. Parse the reset settings for SMI LARBs and the clamp settings for the SMI Sub-Common. Register genpd callback for the SMI LARBs located in image, camera and IPE subsystems, and apply reset and clamp operations within the callback. Signed-off-by: Friday Yang --- drivers/memory/mtk-smi.c | 141 +++++++++++++++++++++++++++++++++++++-- 1 file changed, 137 insertions(+), 4 deletions(-) -- 2.46.0 diff --git a/drivers/memory/mtk-smi.c b/drivers/memory/mtk-smi.c index 5710348f72f6..51235c2a2081 100644 --- a/drivers/memory/mtk-smi.c +++ b/drivers/memory/mtk-smi.c @@ -10,11 +10,15 @@ #include #include #include +#include #include #include #include #include +#include #include +#include +#include #include #include #include @@ -36,6 +40,12 @@ #define SMI_DCM 0x300 #define SMI_DUMMY 0x444 +#define SMI_COMMON_CLAMP_EN 0x3c0 +#define SMI_COMMON_CLAMP_EN_SET 0x3c4 +#define SMI_COMMON_CLAMP_EN_CLR 0x3c8 + +#define SMI_SUB_COMM_INPORT_NR (8) + /* SMI LARB */ #define SMI_LARB_SLP_CON 0xc #define SLP_PROT_EN BIT(0) @@ -134,6 +144,7 @@ struct mtk_smi_larb_gen { unsigned int larb_direct_to_common_mask; unsigned int flags_general; const u8 (*ostd)[SMI_LARB_PORT_NR_MAX]; + const u8 *clamp_port; }; struct mtk_smi { @@ -150,6 +161,7 @@ struct mtk_smi { }; struct mtk_smi_larb { /* larb: local arbiter */ + struct device *dev; struct mtk_smi smi; void __iomem *base; struct device *smi_common_dev; /* common or sub-common dev */ @@ -157,6 +169,10 @@ struct mtk_smi_larb { /* larb: local arbiter */ int larbid; u32 *mmu; unsigned char *bank; + struct regmap *sub_comm_syscon; + u8 sub_comm_inport; + struct notifier_block nb; + struct reset_control *rst_con; }; static int @@ -377,6 +393,19 @@ static const u8 mtk_smi_larb_mt8195_ostd[][SMI_LARB_PORT_NR_MAX] = { [28] = {0x1a, 0x0e, 0x0a, 0x0a, 0x0c, 0x0e, 0x10,}, }; +static const u8 mtk_smi_larb_clamp_port_mt8188[MTK_LARB_NR_MAX] = { + [9] = BIT(1), /* larb10 */ + [10] = BIT(2), /* larb11a */ + [11] = BIT(2), /* larb11b */ + [12] = BIT(3), /* larb11c */ + [13] = BIT(0), /* larb12 */ + [16] = BIT(1), /* larb15 */ + [17] = BIT(2), /* larb16a */ + [18] = BIT(2), /* larb16b */ + [19] = BIT(3), /* larb17a */ + [20] = BIT(3), /* larb17b */ +}; + static const struct mtk_smi_larb_gen mtk_smi_larb_mt2701 = { .port_in_larb = { LARB0_PORT_OFFSET, LARB1_PORT_OFFSET, @@ -423,6 +452,7 @@ static const struct mtk_smi_larb_gen mtk_smi_larb_mt8188 = { .flags_general = MTK_SMI_FLAG_THRT_UPDATE | MTK_SMI_FLAG_SW_FLAG | MTK_SMI_FLAG_SLEEP_CTL | MTK_SMI_FLAG_CFG_PORT_SEC_CTL, .ostd = mtk_smi_larb_mt8188_ostd, + .clamp_port = mtk_smi_larb_clamp_port_mt8188, }; static const struct mtk_smi_larb_gen mtk_smi_larb_mt8192 = { @@ -472,6 +502,46 @@ static void mtk_smi_larb_sleep_ctrl_disable(struct mtk_smi_larb *larb) writel_relaxed(0, larb->base + SMI_LARB_SLP_CON); } +static int mtk_smi_larb_clamp_protect_enable(struct device *dev, bool enable) +{ + struct mtk_smi_larb *larb = dev_get_drvdata(dev); + u32 reg; + int ret; + + /* sub_comm_syscon could be NULL if larb directly linked to SMI common */ + if (!larb->sub_comm_syscon) + return -EINVAL; + + reg = enable ? SMI_COMMON_CLAMP_EN_SET : SMI_COMMON_CLAMP_EN_CLR; + + ret = regmap_write(larb->sub_comm_syscon, reg, + larb->sub_comm_inport); + if (ret) + dev_err(dev, "Unable to %s clamp for input port %d: %d\n", + enable ? "enable" : "disable", + larb->sub_comm_inport, ret); + + return ret; +} + +static int mtk_smi_genpd_callback(struct notifier_block *nb, + unsigned long flags, void *data) +{ + struct mtk_smi_larb *larb = container_of(nb, struct mtk_smi_larb, nb); + struct device *dev = larb->dev; + + if (flags == GENPD_NOTIFY_PRE_ON || flags == GENPD_NOTIFY_PRE_OFF) { + /* disable related SMI sub-common port */ + mtk_smi_larb_clamp_protect_enable(dev, true); + } else if (flags == GENPD_NOTIFY_ON) { + /* enable related SMI sub-common port */ + reset_control_reset(larb->rst_con); + mtk_smi_larb_clamp_protect_enable(dev, false); + } + + return NOTIFY_OK; +} + static int mtk_smi_device_link_common(struct device *dev, struct device **com_dev) { struct platform_device *smi_com_pdev; @@ -528,6 +598,53 @@ static int mtk_smi_dts_clk_init(struct device *dev, struct mtk_smi *smi, return ret; } +static int mtk_smi_larb_parse_clamp_optional(struct mtk_smi_larb *larb) +{ + struct device *dev = larb->dev; + const struct mtk_smi_larb_gen *larb_gen = larb->larb_gen; + u32 larb_id; + int ret; + + /** + * Only SMI LARBs in camera, image and IPE subsys need to + * apply clamp and reset operations, others can be skipped. + */ + ret = of_property_read_u32(dev->of_node, "mediatek,larb-id", &larb_id); + if (ret) + return -EINVAL; + if (!larb_gen->clamp_port || !larb_gen->clamp_port[larb_id]) + return 0; + + larb->sub_comm_inport = larb_gen->clamp_port[larb_id]; + larb->sub_comm_syscon = syscon_regmap_lookup_by_phandle(dev->of_node, + "mediatek,smi"); + if (IS_ERR(larb->sub_comm_syscon)) { + larb->sub_comm_syscon = NULL; + return dev_err_probe(dev, -EINVAL, + "Unknown clamp port for larb %d\n", larb_id); + } + + return 0; +} + +static int mtk_smi_larb_parse_reset_optional(struct mtk_smi_larb *larb) +{ + struct device *dev = larb->dev; + int ret; + + larb->rst_con = devm_reset_control_get_optional_exclusive(dev, "larb"); + if (!larb->rst_con) + return 0; + + larb->nb.notifier_call = mtk_smi_genpd_callback; + ret = dev_pm_genpd_add_notifier(dev, &larb->nb); + if (ret) + return dev_err_probe(dev, -EINVAL, + "Failed to add genpd callback %d\n", ret); + + return 0; +} + static int mtk_smi_larb_probe(struct platform_device *pdev) { struct mtk_smi_larb *larb; @@ -538,6 +655,7 @@ static int mtk_smi_larb_probe(struct platform_device *pdev) if (!larb) return -ENOMEM; + larb->dev = dev; larb->larb_gen = of_device_get_match_data(dev); larb->base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(larb->base)) @@ -554,15 +672,24 @@ static int mtk_smi_larb_probe(struct platform_device *pdev) if (ret < 0) return ret; - pm_runtime_enable(dev); + ret = mtk_smi_larb_parse_clamp_optional(larb); + if (ret) + goto err_link_remove; + + ret = mtk_smi_larb_parse_reset_optional(larb); + if (ret) + goto err_link_remove; + platform_set_drvdata(pdev, larb); ret = component_add(dev, &mtk_smi_larb_component_ops); if (ret) - goto err_pm_disable; + goto err_link_remove; + + pm_runtime_enable(dev); + return 0; -err_pm_disable: - pm_runtime_disable(dev); +err_link_remove: device_link_remove(dev, larb->smi_common_dev); return ret; } @@ -686,6 +813,11 @@ static const struct mtk_smi_common_plat mtk_smi_common_mt8188_vpp = { .init = mtk_smi_common_mt8195_init, }; +static const struct mtk_smi_common_plat mtk_smi_sub_common_mt8188 = { + .type = MTK_SMI_GEN2_SUB_COMM, + .has_gals = true, +}; + static const struct mtk_smi_common_plat mtk_smi_common_mt8192 = { .type = MTK_SMI_GEN2, .has_gals = true, @@ -729,6 +861,7 @@ static const struct of_device_id mtk_smi_common_of_ids[] = { {.compatible = "mediatek,mt8186-smi-common", .data = &mtk_smi_common_mt8186}, {.compatible = "mediatek,mt8188-smi-common-vdo", .data = &mtk_smi_common_mt8188_vdo}, {.compatible = "mediatek,mt8188-smi-common-vpp", .data = &mtk_smi_common_mt8188_vpp}, + {.compatible = "mediatek,mt8188-smi-sub-common", .data = &mtk_smi_sub_common_mt8188}, {.compatible = "mediatek,mt8192-smi-common", .data = &mtk_smi_common_mt8192}, {.compatible = "mediatek,mt8195-smi-common-vdo", .data = &mtk_smi_common_mt8195_vdo}, {.compatible = "mediatek,mt8195-smi-common-vpp", .data = &mtk_smi_common_mt8195_vpp},