From patchwork Tue Mar 4 15:23:23 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mario Limonciello X-Patchwork-Id: 14000939 X-Patchwork-Delegate: mario.limonciello@amd.com Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7B5A028136E; Tue, 4 Mar 2025 15:23:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741101815; cv=none; b=qv261YZYtok4wBLLL/59cSB0ZhMQev5aLtfD5hpbB0ZROZJBbcipTmlPZPcNn8nFnSQOAOkLPDaSXotnijBWoxiDQVxURER376cVi7CVKDISkOAmQeFNRrBYkDGf8VmQCMRPUWDpp1BeGKtY7hc4WwHpkjw/fsVldN/NXQ3U/FY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741101815; c=relaxed/simple; bh=cBnD3T0W3/BA/HYOjLIQM4x1KeXQ6j9o9g6Kgg0ICUI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=anIIyypkGGhkW9itK/0YxlMjWjRSVzf0Mn190S7+mbuoU642T3tXoCSoJ7/H/mJLQgKGB1wkQOetmol3x7MI8ZuS9CZijE/ZOU+MPFb4yoEOcXRh1bJO4Wv2e7iiyx5aOhPbX5g8NQ/CWJ1869cwKHeH8IDphRt3kZAZVUCLSlQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Iim9ACWF; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Iim9ACWF" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 61E55C4CEE9; Tue, 4 Mar 2025 15:23:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1741101815; bh=cBnD3T0W3/BA/HYOjLIQM4x1KeXQ6j9o9g6Kgg0ICUI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Iim9ACWFc9bp0Xr6Wqr4B3MSoziGWyu2lqLsmjCl0p31t3meUpl3S/YSUfCMXFcHq qz9lxL15mb8UlLowSqezWy6/y+JuQDBY0akX1Lpqtn7vQ91ps+UNWVHBUgaomQC7lw H/5I1aIsH7bvwCWWHR7c86F/ZlGVUmcyTOXhxlImw9nDdjuauTrozFgXcEd7r9DTOF amBEcAgkgDGaOVbQVCKgINS5LxvwENotflzmcBkZ9VN18xrP6A36nNYZPcadflpoMm VzEPqroUI9NiIlVE2c4zsRh8pvWregLm+4j7uW8zYC74HegqK9/PpDhTkckkkMYxTm GBSx4xiwAHT2Q== From: Mario Limonciello To: "Gautham R . Shenoy" , Perry Yuan Cc: Dhananjay Ugwekar , linux-kernel@vger.kernel.org (open list:X86 ARCHITECTURE (32-BIT AND 64-BIT)), linux-pm@vger.kernel.org (open list:CPU FREQUENCY SCALING FRAMEWORK), Mario Limonciello Subject: [PATCH v2 1/5] cpufreq/amd-pstate: Add dynamic energy performance preference Date: Tue, 4 Mar 2025 09:23:23 -0600 Message-ID: <20250304152327.1561017-2-superm1@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250304152327.1561017-1-superm1@kernel.org> References: <20250304152327.1561017-1-superm1@kernel.org> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Mario Limonciello Dynamic energy performance preference will change the EPP profile based on whether the machine is running on AC or DC power. A notification chain from the power supply core is used to adjust EPP values on plug in or plug out events. For non-server systems: * the default EPP for AC mode is `performance`. * the default EPP for DC mode is `balance_performance`. Signed-off-by: Mario Limonciello --- v1->v2: * Change defaults to performance (AC) and balance_performance (DC) * Default Kconfig to disabled for now * Rebase on latest branch --- Documentation/admin-guide/pm/amd-pstate.rst | 18 ++- drivers/cpufreq/Kconfig.x86 | 12 ++ drivers/cpufreq/amd-pstate.c | 129 ++++++++++++++++++-- drivers/cpufreq/amd-pstate.h | 5 +- 4 files changed, 155 insertions(+), 9 deletions(-) diff --git a/Documentation/admin-guide/pm/amd-pstate.rst b/Documentation/admin-guide/pm/amd-pstate.rst index 412423c54f258..2e076650dc77c 100644 --- a/Documentation/admin-guide/pm/amd-pstate.rst +++ b/Documentation/admin-guide/pm/amd-pstate.rst @@ -289,7 +289,7 @@ and user can change current preference according to energy or performance needs Please get all support profiles list from ``energy_performance_available_preferences`` attribute, all the profiles are integer values defined between 0 to 255 when EPP feature is enabled by platform -firmware, if EPP feature is disabled, driver will ignore the written value +firmware, but if the dynamic EPP feature is enabled, driver will block writes. This attribute is read-write. ``boost`` @@ -311,6 +311,22 @@ boost or `1` to enable it, for the respective CPU using the sysfs path Other performance and frequency values can be read back from ``/sys/devices/system/cpu/cpuX/acpi_cppc/``, see :ref:`cppc_sysfs`. +Dynamic energy performance profile +================================== +The amd-pstate driver supports dynamically selecting the energy performance +profile based on whether the machine is running on AC or DC power. + +Whether this behavior is enabled by default with the kernel config option +`CONFIG_X86_AMD_PSTATE_DYNAMIC_EPP`. This behavior can also be overridden +at runtime by the sysfs file ``/sys/devices/system/cpu/cpufreq/policyX/dynamic_epp``. + +When set to enabled, the driver will select a different energy performance +profile when the machine is running on battery or AC power. +When set to disabled, the driver will not change the energy performance profile +based on the power source and will not react to user desired power state. + +Attempting to manually write to the ``energy_performance_preference`` sysfs +file will fail when ``dynamic_epp`` is enabled. ``amd-pstate`` vs ``acpi-cpufreq`` ====================================== diff --git a/drivers/cpufreq/Kconfig.x86 b/drivers/cpufreq/Kconfig.x86 index 97c2d4f15d76e..c5ef92634ddf4 100644 --- a/drivers/cpufreq/Kconfig.x86 +++ b/drivers/cpufreq/Kconfig.x86 @@ -68,6 +68,18 @@ config X86_AMD_PSTATE_DEFAULT_MODE For details, take a look at: . +config X86_AMD_PSTATE_DYNAMIC_EPP + bool "AMD Processor P-State dynamic EPP support" + depends on X86_AMD_PSTATE + default n + help + Allow the kenrel to dynamically change the energy performance + value from events like ACPI platform profile and AC adapter plug + events. + + This feature can also be changed at runtime, this configuration + option only sets the kernel default value behavior. + config X86_AMD_PSTATE_UT tristate "selftest for AMD Processor P-State driver" depends on X86 && ACPI_PROCESSOR diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index e98ef41083ba1..f00fb4ba9f26e 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -36,6 +36,7 @@ #include #include #include +#include #include #include @@ -86,6 +87,7 @@ static struct cpufreq_driver amd_pstate_driver; static struct cpufreq_driver amd_pstate_epp_driver; static int cppc_state = AMD_PSTATE_UNDEFINED; static bool amd_pstate_prefcore = true; +static bool dynamic_epp = CONFIG_X86_AMD_PSTATE_DYNAMIC_EPP; static struct quirk_entry *quirks; /* @@ -1050,6 +1052,73 @@ static void amd_pstate_cpu_exit(struct cpufreq_policy *policy) kfree(cpudata); } +static int amd_pstate_get_balanced_epp(struct cpufreq_policy *policy) +{ + struct amd_cpudata *cpudata = policy->driver_data; + + if (power_supply_is_system_supplied()) + return cpudata->epp_default_ac; + else + return cpudata->epp_default_dc; +} + +static int amd_pstate_power_supply_notifier(struct notifier_block *nb, + unsigned long event, void *data) +{ + struct amd_cpudata *cpudata = container_of(nb, struct amd_cpudata, power_nb); + struct cpufreq_policy *policy __free(put_cpufreq_policy) = cpufreq_cpu_get(cpudata->cpu); + u8 epp; + int ret; + + if (event != PSY_EVENT_PROP_CHANGED) + return NOTIFY_OK; + + epp = amd_pstate_get_balanced_epp(policy); + + ret = amd_pstate_set_epp(policy, epp); + if (ret) + pr_warn("Failed to set CPU %d EPP %u: %d\n", cpudata->cpu, epp, ret); + + return NOTIFY_OK; +} +static void amd_pstate_clear_dynamic_epp(struct cpufreq_policy *policy) +{ + struct amd_cpudata *cpudata = policy->driver_data; + + if (cpudata->power_nb.notifier_call) + power_supply_unreg_notifier(&cpudata->power_nb); + cpudata->dynamic_epp = false; +} + +static int amd_pstate_set_dynamic_epp(struct cpufreq_policy *policy) +{ + struct amd_cpudata *cpudata = policy->driver_data; + int ret; + u8 epp; + + epp = amd_pstate_get_balanced_epp(policy); + ret = amd_pstate_set_epp(policy, epp); + if (ret) + return ret; + + /* only enable notifier if things will actually change */ + if (cpudata->epp_default_ac != cpudata->epp_default_dc) { + ret = power_supply_reg_notifier(&cpudata->power_nb); + if (ret) + goto cleanup; + cpudata->power_nb.notifier_call = amd_pstate_power_supply_notifier; + } + + cpudata->dynamic_epp = true; + + return 0; + +cleanup: + amd_pstate_clear_dynamic_epp(policy); + + return ret; +} + /* Sysfs attributes */ /* @@ -1146,6 +1215,11 @@ static ssize_t store_energy_performance_preference( ssize_t ret; u8 epp; + if (cpudata->dynamic_epp) { + pr_debug("EPP cannot be set when dynamic EPP is enabled\n"); + return -EBUSY; + } + ret = sscanf(buf, "%20s", str_preference); if (ret != 1) return -EINVAL; @@ -1154,10 +1228,10 @@ static ssize_t store_energy_performance_preference( if (ret < 0) return -EINVAL; - if (!ret) - epp = cpudata->epp_default; - else + if (ret) epp = epp_values[ret]; + else + epp = amd_pstate_get_balanced_epp(policy); if (epp > 0 && policy->policy == CPUFREQ_POLICY_PERFORMANCE) { pr_debug("EPP cannot be set under performance policy\n"); @@ -1165,6 +1239,8 @@ static ssize_t store_energy_performance_preference( } ret = amd_pstate_set_epp(policy, epp); + if (ret) + return ret; return ret ? ret : count; } @@ -1364,6 +1440,32 @@ static ssize_t prefcore_show(struct device *dev, return sysfs_emit(buf, "%s\n", str_enabled_disabled(amd_pstate_prefcore)); } +static ssize_t dynamic_epp_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + return sysfs_emit(buf, "%s\n", str_enabled_disabled(dynamic_epp)); +} + +static ssize_t dynamic_epp_store(struct device *a, struct device_attribute *b, + const char *buf, size_t count) +{ + bool enabled; + int ret; + + ret = kstrtobool(buf, &enabled); + if (ret) + return ret; + + if (dynamic_epp == enabled) + return -EINVAL; + + /* reinitialize with desired dynamic EPP value */ + dynamic_epp = enabled; + ret = amd_pstate_change_driver_mode(cppc_state); + + return ret ? ret : count; +} + cpufreq_freq_attr_ro(amd_pstate_max_freq); cpufreq_freq_attr_ro(amd_pstate_lowest_nonlinear_freq); @@ -1374,6 +1476,7 @@ cpufreq_freq_attr_rw(energy_performance_preference); cpufreq_freq_attr_ro(energy_performance_available_preferences); static DEVICE_ATTR_RW(status); static DEVICE_ATTR_RO(prefcore); +static DEVICE_ATTR_RW(dynamic_epp); static struct freq_attr *amd_pstate_attr[] = { &amd_pstate_max_freq, @@ -1398,6 +1501,7 @@ static struct freq_attr *amd_pstate_epp_attr[] = { static struct attribute *pstate_global_attributes[] = { &dev_attr_status.attr, &dev_attr_prefcore.attr, + &dev_attr_dynamic_epp.attr, NULL }; @@ -1490,10 +1594,11 @@ static int amd_pstate_epp_cpu_init(struct cpufreq_policy *policy) if (amd_pstate_acpi_pm_profile_server() || amd_pstate_acpi_pm_profile_undefined()) { policy->policy = CPUFREQ_POLICY_PERFORMANCE; - cpudata->epp_default = amd_pstate_get_epp(cpudata); + cpudata->epp_default_ac = cpudata->epp_default_dc = amd_pstate_get_epp(cpudata); } else { policy->policy = CPUFREQ_POLICY_POWERSAVE; - cpudata->epp_default = AMD_CPPC_EPP_BALANCE_PERFORMANCE; + cpudata->epp_default_ac = AMD_CPPC_EPP_PERFORMANCE; + cpudata->epp_default_dc = AMD_CPPC_EPP_BALANCE_PERFORMANCE; } if (cpu_feature_enabled(X86_FEATURE_CPPC)) { @@ -1502,9 +1607,13 @@ static int amd_pstate_epp_cpu_init(struct cpufreq_policy *policy) return ret; WRITE_ONCE(cpudata->cppc_req_cached, value); } - ret = amd_pstate_set_epp(policy, cpudata->epp_default); + + if (dynamic_epp) + ret = amd_pstate_set_dynamic_epp(policy); + else + ret = amd_pstate_set_epp(policy, amd_pstate_get_balanced_epp(policy)); if (ret) - return ret; + goto free_cpudata1; current_pstate_driver->adjust_perf = NULL; @@ -1521,6 +1630,8 @@ static void amd_pstate_epp_cpu_exit(struct cpufreq_policy *policy) struct amd_cpudata *cpudata = policy->driver_data; if (cpudata) { + if (cpudata->dynamic_epp) + amd_pstate_clear_dynamic_epp(policy); kfree(cpudata); policy->driver_data = NULL; } @@ -1556,6 +1667,10 @@ static int amd_pstate_epp_set_policy(struct cpufreq_policy *policy) if (!policy->cpuinfo.max_freq) return -ENODEV; + /* policy can't be changed to performance policy while dynamic epp is enabled */ + if (policy->policy == CPUFREQ_POLICY_PERFORMANCE && cpudata->dynamic_epp) + return -EBUSY; + cpudata->policy = policy->policy; ret = amd_pstate_epp_update_limit(policy); diff --git a/drivers/cpufreq/amd-pstate.h b/drivers/cpufreq/amd-pstate.h index fbe1c08d3f061..6882876f895de 100644 --- a/drivers/cpufreq/amd-pstate.h +++ b/drivers/cpufreq/amd-pstate.h @@ -104,7 +104,10 @@ struct amd_cpudata { /* EPP feature related attributes*/ u32 policy; bool suspended; - u8 epp_default; + u8 epp_default_ac; + u8 epp_default_dc; + bool dynamic_epp; + struct notifier_block power_nb; }; /* From patchwork Tue Mar 4 15:23:24 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mario Limonciello X-Patchwork-Id: 14000940 X-Patchwork-Delegate: mario.limonciello@amd.com Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 44F0A283C88; Tue, 4 Mar 2025 15:23:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741101816; cv=none; b=fvQeqU4+Un0Odqd0iDyQP8fG/ZsrRKIZqGyRSwZZFTQgaCpYz7J3IepvLQppgdaqFNLqLUXaLvDebesrxUDfNueNDSJTYGVzPZOFSHpWud8OTPw8N/zF95AVSqfAEAa5slQ7IZfnaj0NKIRiNn1dtWuEQMIDx+ef26nJiewMQRQ= ARC-Message-Signature: i=1; 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b=QWKAzK76v62dTwL2jH9yU0yoErPoEFPm37aWn5WmXP+biS+a7HbN+Svo0mvN3fuiQ DvSFjFrc/LRSanhHBoqoX/BxBZVZ7zu+4YFvztPpGJNhZN4Yg8wIC0H4vfEr0kGEkk z36yuG9K1gQjJXnW6Knq0MQlXohqPMvUWwd2FgBF0yXh6ldk1nDFN5kEKcfLTfOudF GRVQ0jtmesqyrVn5qCJLA/zREuRG4vEhnKVYXu0pi1GisVDUOx+RNF3A4Ct8BIo+dk Rz+kDKpQGwaPeS9XpQ/vuZP1ybL0b0UXk66RgCm7ZmL7neKzIcRvIOLomMpqtd7IMN qjIpgpEY18GXw== From: Mario Limonciello To: "Gautham R . Shenoy" , Perry Yuan Cc: Dhananjay Ugwekar , linux-kernel@vger.kernel.org (open list:X86 ARCHITECTURE (32-BIT AND 64-BIT)), linux-pm@vger.kernel.org (open list:CPU FREQUENCY SCALING FRAMEWORK), Mario Limonciello Subject: [PATCH v2 2/5] cpufreq/amd-pstate: add kernel command line to override dynamic epp Date: Tue, 4 Mar 2025 09:23:24 -0600 Message-ID: <20250304152327.1561017-3-superm1@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250304152327.1561017-1-superm1@kernel.org> References: <20250304152327.1561017-1-superm1@kernel.org> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Mario Limonciello Add `amd_dynamic_epp=enable` and `amd_dynamic_epp=disable` to override the kernel configuration option `CONFIG_X86_AMD_PSTATE_DYNAMIC_EPP` locally. Signed-off-by: Mario Limonciello Reviewed-by: Gautham R. Shenoy --- Documentation/admin-guide/kernel-parameters.txt | 7 +++++++ Documentation/admin-guide/pm/amd-pstate.rst | 7 +++++++ drivers/cpufreq/amd-pstate.c | 11 +++++++++++ 3 files changed, 25 insertions(+) diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index fb8752b42ec85..1afe6d8ab09bb 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -392,6 +392,13 @@ disable Disable amd-pstate preferred core. + amd_dynamic_epp= + [X86] + disable + Disable amd-pstate dynamic EPP. + enable + Enable amd-pstate dynamic EPP. + amijoy.map= [HW,JOY] Amiga joystick support Map of devices attached to JOY0DAT and JOY1DAT Format: , diff --git a/Documentation/admin-guide/pm/amd-pstate.rst b/Documentation/admin-guide/pm/amd-pstate.rst index 2e076650dc77c..8424e7119dd7e 100644 --- a/Documentation/admin-guide/pm/amd-pstate.rst +++ b/Documentation/admin-guide/pm/amd-pstate.rst @@ -438,6 +438,13 @@ For systems that support ``amd-pstate`` preferred core, the core rankings will always be advertised by the platform. But OS can choose to ignore that via the kernel parameter ``amd_prefcore=disable``. +``amd_dynamic_epp`` + +When AMD pstate is in auto mode, dynamic EPP will control whether the kernel +autonomously changes the EPP mode. The default is configured by +``CONFIG_X86_AMD_PSTATE_DYNAMIC_EPP`` but can be explicitly enabled with +``amd_pstate_epp=enable`` or disabled with ``amd_pstate_epp=disable``. + User Space Interface in ``sysfs`` - General =========================================== diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index f00fb4ba9f26e..9911808fe0bcf 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -1928,8 +1928,19 @@ static int __init amd_prefcore_param(char *str) return 0; } +static int __init amd_dynamic_epp_param(char *str) +{ + if (!strcmp(str, "disable")) + dynamic_epp = false; + if (!strcmp(str, "enable")) + dynamic_epp = true; + + return 0; +} + early_param("amd_pstate", amd_pstate_param); early_param("amd_prefcore", amd_prefcore_param); +early_param("amd_dynamic_epp", amd_dynamic_epp_param); MODULE_AUTHOR("Huang Rui "); MODULE_DESCRIPTION("AMD Processor P-state Frequency Driver"); From patchwork Tue Mar 4 15:23:25 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mario Limonciello X-Patchwork-Id: 14000941 X-Patchwork-Delegate: mario.limonciello@amd.com Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CC52D283C9C; Tue, 4 Mar 2025 15:23:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741101816; cv=none; b=Ri8maESoVe4wWq2G6vqGJJWhogGEsK3mIrmPc/uJZclfeC0JFF7IbLgJoB/48mizNrDQO9xfBTLInqog+VKzZkDS6wBnlqB+TQNdhEwGH+zS7pa4gFl2NdCi7MoUGdcB1GKcTf5zLCWMkc8IMhz2Jn23uLkmnOAIIdCjgkhdhvc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741101816; c=relaxed/simple; bh=pv1JboXBtYOhmhVe7vTQAqTwGyRMK5jKJVQGBj93aBU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=haVpenbAuV1T20XuHWlX4/i60pmP1QB1api95UGjUu62oN6hriPHdbVVFrMA2ALAagg/57bxmuY9I/m2iznsWH+27+CXDJ/JVtadkCNDPSiJrI6bbMkkQ/cgDnNL0etgaJ+C7gVkpZ+oOuUltPCPJO8iRBvq1LjJyTIJA1Zveao= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=qVs3J5tV; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="qVs3J5tV" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 18145C4CEE5; Tue, 4 Mar 2025 15:23:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1741101816; bh=pv1JboXBtYOhmhVe7vTQAqTwGyRMK5jKJVQGBj93aBU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=qVs3J5tVEJUBtMLnb52E1gbWiJVd0w23jlTQ6431ZSeR4pWKZAmy9YHV8HzBSK8v9 Owq6+VWWZPeLh72Hgo9CckJk0cFllHQIdu2N3YB8fCO/TDBzfCBSaUaW+6iEPSI3cB quvj7lb7IJp9zV+PBQV8CgHkgY+4NerJCaQeE4hd5pLxotYRYUwvN7SQJHGgvY0W3n PJFZ+DkrvcBQDmTbyXE6E7KR0HgmbGZpHUVfiuA6ReioiJLLHmxPMKmz82YKV5UDXX zrG1G0+kvaPafxF0mWKlxotRa+UFVllDI5LogUjvhScs4cucxZpHBXen1tTlOBuRQd IRoNW1/JzdXIQ== From: Mario Limonciello To: "Gautham R . Shenoy" , Perry Yuan Cc: Dhananjay Ugwekar , linux-kernel@vger.kernel.org (open list:X86 ARCHITECTURE (32-BIT AND 64-BIT)), linux-pm@vger.kernel.org (open list:CPU FREQUENCY SCALING FRAMEWORK), Mario Limonciello Subject: [PATCH v2 3/5] cpufreq/amd-pstate: Add support for platform profile class Date: Tue, 4 Mar 2025 09:23:25 -0600 Message-ID: <20250304152327.1561017-4-superm1@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250304152327.1561017-1-superm1@kernel.org> References: <20250304152327.1561017-1-superm1@kernel.org> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Mario Limonciello The platform profile core allows multiple drivers and devices to register platform profile support. When the legacy platform profile interface is used all drivers will adjust the platform profile as well. Add support for registering every CPU with the platform profile handler when dynamic EPP is enabled. The end result will be that changing the platform profile will modify EPP accordingly. Signed-off-by: Mario Limonciello --- Documentation/admin-guide/pm/amd-pstate.rst | 4 +- drivers/cpufreq/Kconfig.x86 | 1 + drivers/cpufreq/amd-pstate.c | 142 +++++++++++++++++--- drivers/cpufreq/amd-pstate.h | 10 ++ 4 files changed, 140 insertions(+), 17 deletions(-) diff --git a/Documentation/admin-guide/pm/amd-pstate.rst b/Documentation/admin-guide/pm/amd-pstate.rst index 8424e7119dd7e..36950fb6568c0 100644 --- a/Documentation/admin-guide/pm/amd-pstate.rst +++ b/Documentation/admin-guide/pm/amd-pstate.rst @@ -321,7 +321,9 @@ Whether this behavior is enabled by default with the kernel config option at runtime by the sysfs file ``/sys/devices/system/cpu/cpufreq/policyX/dynamic_epp``. When set to enabled, the driver will select a different energy performance -profile when the machine is running on battery or AC power. +profile when the machine is running on battery or AC power. The driver will +also register with the platform profile handler to receive notifications of +user desired power state and react to those. When set to disabled, the driver will not change the energy performance profile based on the power source and will not react to user desired power state. diff --git a/drivers/cpufreq/Kconfig.x86 b/drivers/cpufreq/Kconfig.x86 index c5ef92634ddf4..905eab998b836 100644 --- a/drivers/cpufreq/Kconfig.x86 +++ b/drivers/cpufreq/Kconfig.x86 @@ -40,6 +40,7 @@ config X86_AMD_PSTATE select ACPI_PROCESSOR select ACPI_CPPC_LIB if X86_64 select CPU_FREQ_GOV_SCHEDUTIL if SMP + select ACPI_PLATFORM_PROFILE help This driver adds a CPUFreq driver which utilizes a fine grain processor performance frequency control range instead of legacy diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index 9911808fe0bcf..28c02edf6e40b 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -105,6 +105,7 @@ static struct quirk_entry *quirks; * 2 balance_performance * 3 balance_power * 4 power + * 5 custom (for raw EPP values) */ enum energy_perf_value_index { EPP_INDEX_DEFAULT = 0, @@ -112,6 +113,7 @@ enum energy_perf_value_index { EPP_INDEX_BALANCE_PERFORMANCE, EPP_INDEX_BALANCE_POWERSAVE, EPP_INDEX_POWERSAVE, + EPP_INDEX_CUSTOM, }; static const char * const energy_perf_strings[] = { @@ -120,6 +122,7 @@ static const char * const energy_perf_strings[] = { [EPP_INDEX_BALANCE_PERFORMANCE] = "balance_performance", [EPP_INDEX_BALANCE_POWERSAVE] = "balance_power", [EPP_INDEX_POWERSAVE] = "power", + [EPP_INDEX_CUSTOM] = "custom", NULL }; @@ -1073,6 +1076,10 @@ static int amd_pstate_power_supply_notifier(struct notifier_block *nb, if (event != PSY_EVENT_PROP_CHANGED) return NOTIFY_OK; + /* dynamic actions are only applied while platform profile is in balanced */ + if (cpudata->current_profile != PLATFORM_PROFILE_BALANCED) + return 0; + epp = amd_pstate_get_balanced_epp(policy); ret = amd_pstate_set_epp(policy, epp); @@ -1081,14 +1088,84 @@ static int amd_pstate_power_supply_notifier(struct notifier_block *nb, return NOTIFY_OK; } -static void amd_pstate_clear_dynamic_epp(struct cpufreq_policy *policy) + +static int amd_pstate_profile_probe(void *drvdata, unsigned long *choices) +{ + set_bit(PLATFORM_PROFILE_LOW_POWER, choices); + set_bit(PLATFORM_PROFILE_BALANCED, choices); + set_bit(PLATFORM_PROFILE_PERFORMANCE, choices); + + return 0; +} + +static int amd_pstate_profile_get(struct device *dev, + enum platform_profile_option *profile) +{ + struct amd_cpudata *cpudata = dev_get_drvdata(dev); + + *profile = cpudata->current_profile; + + return 0; +} + +static int amd_pstate_profile_set(struct device *dev, + enum platform_profile_option profile) +{ + struct amd_cpudata *cpudata = dev_get_drvdata(dev); + struct cpufreq_policy *policy __free(put_cpufreq_policy) = cpufreq_cpu_get(cpudata->cpu); + int ret; + + switch (profile) { + case PLATFORM_PROFILE_LOW_POWER: + if (cpudata->policy != CPUFREQ_POLICY_POWERSAVE) + cpudata->policy = CPUFREQ_POLICY_POWERSAVE; + ret = amd_pstate_set_epp(policy, AMD_CPPC_EPP_POWERSAVE); + if (ret) + return ret; + break; + case PLATFORM_PROFILE_BALANCED: + if (cpudata->policy != CPUFREQ_POLICY_POWERSAVE) + cpudata->policy = CPUFREQ_POLICY_POWERSAVE; + ret = amd_pstate_set_epp(policy, + amd_pstate_get_balanced_epp(policy)); + if (ret) + return ret; + break; + case PLATFORM_PROFILE_PERFORMANCE: + ret = amd_pstate_set_epp(policy, AMD_CPPC_EPP_PERFORMANCE); + if (ret) + return ret; + break; + default: + pr_err("Unknown Platform Profile %d\n", profile); + return -EOPNOTSUPP; + } + + cpudata->current_profile = profile; + + return 0; +} + +static const struct platform_profile_ops amd_pstate_profile_ops = { + .probe = amd_pstate_profile_probe, + .profile_set = amd_pstate_profile_set, + .profile_get = amd_pstate_profile_get, +}; + +void amd_pstate_clear_dynamic_epp(struct cpufreq_policy *policy) { struct amd_cpudata *cpudata = policy->driver_data; if (cpudata->power_nb.notifier_call) power_supply_unreg_notifier(&cpudata->power_nb); + if (cpudata->ppdev) { + platform_profile_remove(cpudata->ppdev); + cpudata->ppdev = NULL; + } + kfree(cpudata->profile_name); cpudata->dynamic_epp = false; } +EXPORT_SYMBOL_GPL(amd_pstate_clear_dynamic_epp); static int amd_pstate_set_dynamic_epp(struct cpufreq_policy *policy) { @@ -1096,11 +1173,35 @@ static int amd_pstate_set_dynamic_epp(struct cpufreq_policy *policy) int ret; u8 epp; - epp = amd_pstate_get_balanced_epp(policy); + switch (cpudata->current_profile) { + case PLATFORM_PROFILE_PERFORMANCE: + epp = AMD_CPPC_EPP_PERFORMANCE; + break; + case PLATFORM_PROFILE_LOW_POWER: + epp = AMD_CPPC_EPP_POWERSAVE; + break; + case PLATFORM_PROFILE_BALANCED: + epp = amd_pstate_get_balanced_epp(policy); + break; + default: + pr_err("Unknown Platform Profile %d\n", cpudata->current_profile); + return -EOPNOTSUPP; + } ret = amd_pstate_set_epp(policy, epp); if (ret) return ret; + cpudata->profile_name = kasprintf(GFP_KERNEL, "amd-pstate-epp-cpu%d", cpudata->cpu); + + cpudata->ppdev = platform_profile_register(get_cpu_device(policy->cpu), + cpudata->profile_name, + policy->driver_data, + &amd_pstate_profile_ops); + if (IS_ERR(cpudata->ppdev)) { + ret = PTR_ERR(cpudata->ppdev); + goto cleanup; + } + /* only enable notifier if things will actually change */ if (cpudata->epp_default_ac != cpudata->epp_default_dc) { ret = power_supply_reg_notifier(&cpudata->power_nb); @@ -1207,8 +1308,8 @@ static ssize_t show_energy_performance_available_preferences( return offset; } -static ssize_t store_energy_performance_preference( - struct cpufreq_policy *policy, const char *buf, size_t count) +ssize_t store_energy_performance_preference(struct cpufreq_policy *policy, + const char *buf, size_t count) { struct amd_cpudata *cpudata = policy->driver_data; char str_preference[21]; @@ -1224,16 +1325,22 @@ static ssize_t store_energy_performance_preference( if (ret != 1) return -EINVAL; - ret = match_string(energy_perf_strings, -1, str_preference); - if (ret < 0) - return -EINVAL; - - if (ret) - epp = epp_values[ret]; - else - epp = amd_pstate_get_balanced_epp(policy); + /* + * if the value matches a number, use that, otherwise see if + * matches an index in the energy_perf_strings array + */ + ret = kstrtou8(str_preference, 0, &epp); + if (ret) { + ret = match_string(energy_perf_strings, -1, str_preference); + if (ret < 0 || ret == EPP_INDEX_CUSTOM) + return -EINVAL; + if (ret) + epp = epp_values[ret]; + else + epp = amd_pstate_get_balanced_epp(policy); + } - if (epp > 0 && policy->policy == CPUFREQ_POLICY_PERFORMANCE) { + if (epp > 0 && cpudata->policy == CPUFREQ_POLICY_PERFORMANCE) { pr_debug("EPP cannot be set under performance policy\n"); return -EBUSY; } @@ -1244,9 +1351,9 @@ static ssize_t store_energy_performance_preference( return ret ? ret : count; } +EXPORT_SYMBOL_GPL(store_energy_performance_preference); -static ssize_t show_energy_performance_preference( - struct cpufreq_policy *policy, char *buf) +ssize_t show_energy_performance_preference(struct cpufreq_policy *policy, char *buf) { struct amd_cpudata *cpudata = policy->driver_data; u8 preference, epp; @@ -1267,11 +1374,12 @@ static ssize_t show_energy_performance_preference( preference = EPP_INDEX_POWERSAVE; break; default: - return -EINVAL; + return sysfs_emit(buf, "%u\n", epp); } return sysfs_emit(buf, "%s\n", energy_perf_strings[preference]); } +EXPORT_SYMBOL_GPL(show_energy_performance_preference); static void amd_pstate_driver_cleanup(void) { @@ -1595,10 +1703,12 @@ static int amd_pstate_epp_cpu_init(struct cpufreq_policy *policy) amd_pstate_acpi_pm_profile_undefined()) { policy->policy = CPUFREQ_POLICY_PERFORMANCE; cpudata->epp_default_ac = cpudata->epp_default_dc = amd_pstate_get_epp(cpudata); + cpudata->current_profile = PLATFORM_PROFILE_PERFORMANCE; } else { policy->policy = CPUFREQ_POLICY_POWERSAVE; cpudata->epp_default_ac = AMD_CPPC_EPP_PERFORMANCE; cpudata->epp_default_dc = AMD_CPPC_EPP_BALANCE_PERFORMANCE; + cpudata->current_profile = PLATFORM_PROFILE_BALANCED; } if (cpu_feature_enabled(X86_FEATURE_CPPC)) { diff --git a/drivers/cpufreq/amd-pstate.h b/drivers/cpufreq/amd-pstate.h index 6882876f895de..b4c5374762110 100644 --- a/drivers/cpufreq/amd-pstate.h +++ b/drivers/cpufreq/amd-pstate.h @@ -9,6 +9,7 @@ #define _LINUX_AMD_PSTATE_H #include +#include /********************************************************************* * AMD P-state INTERFACE * @@ -108,6 +109,11 @@ struct amd_cpudata { u8 epp_default_dc; bool dynamic_epp; struct notifier_block power_nb; + + /* platform profile */ + enum platform_profile_option current_profile; + struct device *ppdev; + char *profile_name; }; /* @@ -123,5 +129,9 @@ enum amd_pstate_mode { }; const char *amd_pstate_get_mode_string(enum amd_pstate_mode mode); int amd_pstate_update_status(const char *buf, size_t size); +ssize_t store_energy_performance_preference(struct cpufreq_policy *policy, + const char *buf, size_t count); +ssize_t show_energy_performance_preference(struct cpufreq_policy *policy, char *buf); +void amd_pstate_clear_dynamic_epp(struct cpufreq_policy *policy); #endif /* _LINUX_AMD_PSTATE_H */ From patchwork Tue Mar 4 15:23:26 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mario Limonciello X-Patchwork-Id: 14000942 X-Patchwork-Delegate: mario.limonciello@amd.com Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AD7ED283CBA; Tue, 4 Mar 2025 15:23:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; 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Tue, 4 Mar 2025 15:23:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1741101817; bh=VymNDH1jT+gpaLwW2gldk72PJ+nc5piVYY5i4ZwV7dA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=fxyBetpHB22VDtA1O0dhruAFFhtLwTWLk31jKstAqV9F5n3SPlaGos5T9vKGmLoPi 3733IqwMUxNBi68Y1CAlHnG4dks6kg7qhoFObRiShPD4djf77Rsq4SaWXoQMInQHhd lehz7Cz5C437qExf+YyxmXBG+nQrjdIXHeR2ukpM1QqvoIvY9uQbNrdKf0hRP2y+CB 9v1dLMquC0+h5JnY3Y+KA40UELaXc5ui7qwDecuGnzO/NtBrOI9gNRdvYlfGl1FIob 5O2AhFUG4L4xGndnGUI5HoRu4QHwb0wXY60rG3GYX+SWsVmoRmsPKy7KTS/zHdynhX AnwpcBbIBC1dg== From: Mario Limonciello To: "Gautham R . Shenoy" , Perry Yuan Cc: Dhananjay Ugwekar , linux-kernel@vger.kernel.org (open list:X86 ARCHITECTURE (32-BIT AND 64-BIT)), linux-pm@vger.kernel.org (open list:CPU FREQUENCY SCALING FRAMEWORK), Mario Limonciello Subject: [PATCH v2 4/5] cpufreq/amd-pstate: Add support for raw EPP writes Date: Tue, 4 Mar 2025 09:23:26 -0600 Message-ID: <20250304152327.1561017-5-superm1@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250304152327.1561017-1-superm1@kernel.org> References: <20250304152327.1561017-1-superm1@kernel.org> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Mario Limonciello The energy performance preference field of the CPPC request MSR supports values from 0 to 255, but the strings only offer 4 values. The other values are useful for tuning the performance of some workloads. Add support for writing the raw energy performance preference value to the sysfs file. If the last value written was an integer then an integer will be returned. If the last value written was a string then a string will be returned. Signed-off-by: Mario Limonciello --- Documentation/admin-guide/pm/amd-pstate.rst | 16 +++++++++++----- drivers/cpufreq/amd-pstate.c | 11 +++++++++-- drivers/cpufreq/amd-pstate.h | 1 + 3 files changed, 21 insertions(+), 7 deletions(-) diff --git a/Documentation/admin-guide/pm/amd-pstate.rst b/Documentation/admin-guide/pm/amd-pstate.rst index 36950fb6568c0..0e4d2e0aaeff7 100644 --- a/Documentation/admin-guide/pm/amd-pstate.rst +++ b/Documentation/admin-guide/pm/amd-pstate.rst @@ -280,16 +280,22 @@ A list of all the supported EPP preferences that could be used for These profiles represent different hints that are provided to the low-level firmware about the user's desired energy vs efficiency tradeoff. ``default`` represents the epp value is set by platform -firmware. This attribute is read-only. +firmware. ``custom`` designates that integer values 0-255 may be written +as well. This attribute is read-only. ``energy_performance_preference`` The current energy performance preference can be read from this attribute. and user can change current preference according to energy or performance needs -Please get all support profiles list from -``energy_performance_available_preferences`` attribute, all the profiles are -integer values defined between 0 to 255 when EPP feature is enabled by platform -firmware, but if the dynamic EPP feature is enabled, driver will block writes. +Coarse named profiles are available in the attribute +``energy_performance_available_preferences``. +Users can also write individual integer values between 0 to 255. +When EPP feature is enabled by platform firmware but if the dynamic EPP feature is +enabled, driver will ignore the written value. Lower epp values shift the bias +towards improved performance while a higher epp value shifts the bias towards +power-savings. The exact impact can change from one platform to the other. +If a valid integer was last written, then a number will be returned on future reads. +If a valid string was last written then a string will be returned on future reads. This attribute is read-write. ``boost`` diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index 28c02edf6e40b..dcf6e36d693f8 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -1314,6 +1314,7 @@ ssize_t store_energy_performance_preference(struct cpufreq_policy *policy, struct amd_cpudata *cpudata = policy->driver_data; char str_preference[21]; ssize_t ret; + bool raw_epp = FALSE; u8 epp; if (cpudata->dynamic_epp) { @@ -1330,6 +1331,7 @@ ssize_t store_energy_performance_preference(struct cpufreq_policy *policy, * matches an index in the energy_perf_strings array */ ret = kstrtou8(str_preference, 0, &epp); + raw_epp = !ret; if (ret) { ret = match_string(energy_perf_strings, -1, str_preference); if (ret < 0 || ret == EPP_INDEX_CUSTOM) @@ -1349,7 +1351,9 @@ ssize_t store_energy_performance_preference(struct cpufreq_policy *policy, if (ret) return ret; - return ret ? ret : count; + cpudata->raw_epp = raw_epp; + + return count; } EXPORT_SYMBOL_GPL(store_energy_performance_preference); @@ -1360,6 +1364,9 @@ ssize_t show_energy_performance_preference(struct cpufreq_policy *policy, char * epp = FIELD_GET(AMD_CPPC_EPP_PERF_MASK, cpudata->cppc_req_cached); + if (cpudata->raw_epp) + return sysfs_emit(buf, "%u\n", epp); + switch (epp) { case AMD_CPPC_EPP_PERFORMANCE: preference = EPP_INDEX_PERFORMANCE; @@ -1374,7 +1381,7 @@ ssize_t show_energy_performance_preference(struct cpufreq_policy *policy, char * preference = EPP_INDEX_POWERSAVE; break; default: - return sysfs_emit(buf, "%u\n", epp); + return -EINVAL; } return sysfs_emit(buf, "%s\n", energy_perf_strings[preference]); diff --git a/drivers/cpufreq/amd-pstate.h b/drivers/cpufreq/amd-pstate.h index b4c5374762110..b6be2b8fbffbf 100644 --- a/drivers/cpufreq/amd-pstate.h +++ b/drivers/cpufreq/amd-pstate.h @@ -108,6 +108,7 @@ struct amd_cpudata { u8 epp_default_ac; u8 epp_default_dc; bool dynamic_epp; + bool raw_epp; struct notifier_block power_nb; /* platform profile */ From patchwork Tue Mar 4 15:23:27 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mario Limonciello X-Patchwork-Id: 14000943 X-Patchwork-Delegate: mario.limonciello@amd.com Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8E512284B3A; Tue, 4 Mar 2025 15:23:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741101818; cv=none; b=RPzNQBslPx2Uk3o63JLA8wS+dPDtgprWQQj5JK4KeubqKMzaudWNHiFRcf9SzekOTalk64e6sy4F5tsR1nGu48B91YZwYK7YJQ/NQefEVKS96Oe1HD70q54c3clBUpCWmxoF511kmxuixkM9oz6PEbhGokDcXP2O6blTJFoqmrg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741101818; c=relaxed/simple; bh=Ovxkur7Th1bj1n91ym6geZ1kTrWIxYLfjpr2pVhZrw4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Lly4dqldcTXatuolpx9duNmoSvu6z/7hYVZWrLWOjNr7uK0xSyqoFQE88LAZbbkBzilUluac3eQcFhaPNRMNIcQuXZRI+wXqAgZH97/Uw2uZ8ap2IcVnx9dMjz8gyaVtZKD4ruwuPJGkUrv7u6ECVQBuR75PgCAEm8a+CC/3A/Q= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=kEQZSg7D; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="kEQZSg7D" Received: by smtp.kernel.org (Postfix) with ESMTPSA id CA44AC4CEEF; Tue, 4 Mar 2025 15:23:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1741101818; bh=Ovxkur7Th1bj1n91ym6geZ1kTrWIxYLfjpr2pVhZrw4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=kEQZSg7DTXo2d31QQQ6pkAwUhAw5E/jJ7NsjHva76xYZ9IWvym/w8bWs+kKcOxi0z iTNP/twrfServawBsR/o0xDynDEJ7G/Z9YjFuZCZgFC3SQ4QNL4oRRQ3eu+6NaENET fjb17bACotIGURQ1PrdSZqrfn/fREQOMkRTobhjTpY1xTItsHUixX+mRkrUOC4yzu3 tRng3lp2H5JJpb1HSIZ0w+OCf77pdoRCdt6osug9fYCAIJcdvQZRzvz7D9q3prRl2Y EG0U2i2Ejf4Aiy8oHvw3C11eXz6JQ83f9az3rja8hhIEtbNm+BuRJgFTjQRlSv+cbt SCs62lQs6kBVA== From: Mario Limonciello To: "Gautham R . Shenoy" , Perry Yuan Cc: Dhananjay Ugwekar , linux-kernel@vger.kernel.org (open list:X86 ARCHITECTURE (32-BIT AND 64-BIT)), linux-pm@vger.kernel.org (open list:CPU FREQUENCY SCALING FRAMEWORK), Mario Limonciello Subject: [PATCH v2 5/5] cpufreq/amd-pstate-ut: Add a unit test for raw EPP Date: Tue, 4 Mar 2025 09:23:27 -0600 Message-ID: <20250304152327.1561017-6-superm1@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250304152327.1561017-1-superm1@kernel.org> References: <20250304152327.1561017-1-superm1@kernel.org> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Mario Limonciello Ensure that all supported raw EPP values work properly. Signed-off-by: Mario Limonciello --- drivers/cpufreq/amd-pstate-ut.c | 58 +++++++++++++++++++++++++++++++++ 1 file changed, 58 insertions(+) diff --git a/drivers/cpufreq/amd-pstate-ut.c b/drivers/cpufreq/amd-pstate-ut.c index e671bc7d15508..d0c5c0aa3cc94 100644 --- a/drivers/cpufreq/amd-pstate-ut.c +++ b/drivers/cpufreq/amd-pstate-ut.c @@ -26,6 +26,7 @@ #include #include #include +#include #include #include @@ -33,6 +34,7 @@ #include "amd-pstate.h" +DEFINE_FREE(free_page, void *, if (_T) free_page((unsigned long)_T)) struct amd_pstate_ut_struct { const char *name; @@ -46,6 +48,7 @@ static int amd_pstate_ut_acpi_cpc_valid(u32 index); static int amd_pstate_ut_check_enabled(u32 index); static int amd_pstate_ut_check_perf(u32 index); static int amd_pstate_ut_check_freq(u32 index); +static int amd_pstate_ut_epp(u32 index); static int amd_pstate_ut_check_driver(u32 index); static struct amd_pstate_ut_struct amd_pstate_ut_cases[] = { @@ -53,6 +56,7 @@ static struct amd_pstate_ut_struct amd_pstate_ut_cases[] = { {"amd_pstate_ut_check_enabled", amd_pstate_ut_check_enabled }, {"amd_pstate_ut_check_perf", amd_pstate_ut_check_perf }, {"amd_pstate_ut_check_freq", amd_pstate_ut_check_freq }, + {"amd_pstate_ut_epp", amd_pstate_ut_epp }, {"amd_pstate_ut_check_driver", amd_pstate_ut_check_driver } }; @@ -239,6 +243,60 @@ static int amd_pstate_set_mode(enum amd_pstate_mode mode) return amd_pstate_update_status(mode_str, strlen(mode_str)); } +static int amd_pstate_ut_epp(u32 index) +{ + struct cpufreq_policy *policy __free(put_cpufreq_policy) = NULL; + void *buf __free(free_page) = NULL; + struct amd_cpudata *cpudata; + int ret, cpu = 0; + u16 epp; + + policy = cpufreq_cpu_get(cpu); + if (!policy) + return -ENODEV; + + cpudata = policy->driver_data; + + /* disable dynamic EPP before running test */ + if (cpudata->dynamic_epp) { + pr_debug("Dynamic EPP is enabled, disabling it\n"); + amd_pstate_clear_dynamic_epp(policy); + } + + buf = (void *)__get_free_page(GFP_KERNEL); + if (!buf) + return -ENOMEM; + + ret = amd_pstate_set_mode(AMD_PSTATE_ACTIVE); + if (ret) + return ret; + + for (epp = 0; epp <= U8_MAX; epp++) { + u8 val; + + /* write all EPP values */ + memset(buf, 0, sizeof(*buf)); + snprintf(buf, PAGE_SIZE, "%d", epp); + ret = store_energy_performance_preference(policy, buf, sizeof(*buf)); + if (ret < 0) + return ret; + + /* check if the EPP value reads back correctly for raw numbers */ + memset(buf, 0, sizeof(*buf)); + ret = show_energy_performance_preference(policy, buf); + if (ret < 0) + return ret; + strreplace(buf, '\n', '\0'); + ret = kstrtou8(buf, 0, &val); + if (!ret && epp != val) { + pr_err("Raw EPP value mismatch: %d != %d\n", epp, val); + return -EINVAL; + } + } + + return 0; +} + static int amd_pstate_ut_check_driver(u32 index) { enum amd_pstate_mode mode1, mode2 = AMD_PSTATE_DISABLE;