From patchwork Wed Mar 20 01:04:30 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajat Jain X-Patchwork-Id: 10860655 X-Patchwork-Delegate: andy.shevchenko@gmail.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 20C1215AC for ; Wed, 20 Mar 2019 01:04:42 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id ED10B29948 for ; Wed, 20 Mar 2019 01:04:41 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id DE0CE29991; Wed, 20 Mar 2019 01:04:41 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.5 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI, USER_IN_DEF_DKIM_WL autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6431B29948 for ; Wed, 20 Mar 2019 01:04:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727246AbfCTBEh (ORCPT ); Tue, 19 Mar 2019 21:04:37 -0400 Received: from mail-yw1-f74.google.com ([209.85.161.74]:44466 "EHLO mail-yw1-f74.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727205AbfCTBEg (ORCPT ); Tue, 19 Mar 2019 21:04:36 -0400 Received: by mail-yw1-f74.google.com with SMTP id l203so896208ywb.11 for ; Tue, 19 Mar 2019 18:04:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=date:in-reply-to:message-id:mime-version:references:subject:from:to :cc; bh=No6fDABdGUuFmTDwPQq43WXJwl+CadMwlN7qs62e0To=; b=XtAoOwpejCayTEEzlIvDIi3bWL+UuueswrUG6TJ7/p01/HhQbFMpyi2dh1bZJllBah BbYd4z0zk+mPAXzEUXRbxhArDGU+O/fu+wvpent99ED4u/uc5TrLjGRL35NwiVxoJFZa MnCs55GoBfWrxbUGwmcpYYPdAhgZ4Vq4mVbV8mwRcpj78bgvNR3LhRerWRE04X/jWrsR fpuJwR/ESIb1zdKw42QSWYG8ZgwOenBOPW50haHDkYpenW42C7DzPohT9Ds0FtB8BSvp fS4tGF5P/lj7y/4AiJb5a8LvdYiOGdgGlxpGSI3kOld/azyzXntnE6O+1hWeHkg+d4Yg 5TLg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:in-reply-to:message-id:mime-version :references:subject:from:to:cc; bh=No6fDABdGUuFmTDwPQq43WXJwl+CadMwlN7qs62e0To=; b=gm4xBN6HLkOnGZcukmpypoXYfOXX0PjO8fchUug08cIck2gybMPsy2qPg/agOSRfu0 WNy4R2tz4sby+WfZWpUS2+Xp+NxKP8NwYZByTMYxNlsmZoyQ/LY42NrQW7iBuaOuOBQT +yge6IrIVe1eugoccx78h5iQ4jPWNtg/qJ/x0Ug3//H1DxSFAJei0HEhnyqQsmn0j2uS udjO4ho6R4a4Ih9DtvKz4i4f/eJHb8qEDFsxnVq4k6QFqWYfccJNlqYbqvLggWBiJbiT FkAzZ5I7bJcxqx7VZjWwWnugSAnRDTBWcjXt5MlC0yOAZjqVOPqQc0EGpUdZtwD/a2+x Uuyw== X-Gm-Message-State: APjAAAVxFtMDmHj0xNECggS9c7kzgLWoiM5hRSunUJyhXKqRAcqzJ6RO yWmFJ8qC7j0IKC0CTwTdoup9zcNU01D/ X-Google-Smtp-Source: APXvYqwTGjANcNze7Rd9PCENWzdfwChccFyp6mQEvrdiHBvULiJnHJLm8zl16MyuolYoqfYI9Y4008iEtYEg X-Received: by 2002:a25:2ac1:: with SMTP id q184mr1517297ybq.35.1553043875938; Tue, 19 Mar 2019 18:04:35 -0700 (PDT) Date: Tue, 19 Mar 2019 18:04:30 -0700 In-Reply-To: <20190313222124.229371-1-rajatja@google.com> Message-Id: <20190320010431.19833-1-rajatja@google.com> Mime-Version: 1.0 References: <20190313222124.229371-1-rajatja@google.com> X-Mailer: git-send-email 2.21.0.225.g810b269d1ac-goog Subject: [PATCH 1/2] platform/x86: intel_pmc_core: Convert to a platform_driver From: Rajat Jain To: Rajneesh Bhardwaj , Vishwanath Somayaji , Darren Hart , Andy Shevchenko , platform-driver-x86@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Rajat Jain , furquan@google.com, evgreen@google.com, rajatxjain@gmail.com Sender: platform-driver-x86-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: platform-driver-x86@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Convert the intel_pmc_core driver to a platform driver. There is no functional change. Some code that tried to determine the kind of CPU, has been moved from pmc_core_probe() to pmc_core_init(). Signed-off-by: Rajat Jain --- v2: Rephrase the commit log. No code changes. drivers/platform/x86/intel_pmc_core.c | 93 ++++++++++++++++++++------- 1 file changed, 68 insertions(+), 25 deletions(-) diff --git a/drivers/platform/x86/intel_pmc_core.c b/drivers/platform/x86/intel_pmc_core.c index f2c621b55f49..55578d07610c 100644 --- a/drivers/platform/x86/intel_pmc_core.c +++ b/drivers/platform/x86/intel_pmc_core.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include @@ -854,12 +855,59 @@ static const struct dmi_system_id pmc_core_dmi_table[] = { {} }; -static int __init pmc_core_probe(void) +static int pmc_core_probe(struct platform_device *pdev) { - struct pmc_dev *pmcdev = &pmc; + struct pmc_dev *pmcdev = platform_get_drvdata(pdev); + int err; + + pmcdev->regbase = ioremap(pmcdev->base_addr, + pmcdev->map->regmap_length); + if (!pmcdev->regbase) + return -ENOMEM; + + mutex_init(&pmcdev->lock); + pmcdev->pmc_xram_read_bit = pmc_core_check_read_lock_bit(); + + err = pmc_core_dbgfs_register(pmcdev); + if (err < 0) { + dev_warn(&pdev->dev, "debugfs register failed.\n"); + iounmap(pmcdev->regbase); + return err; + } + + dmi_check_system(pmc_core_dmi_table); + dev_info(&pdev->dev, " initialized\n"); + return 0; +} + +static int pmc_core_remove(struct platform_device *pdev) +{ + struct pmc_dev *pmcdev = platform_get_drvdata(pdev); + + pmc_core_dbgfs_unregister(pmcdev); + mutex_destroy(&pmcdev->lock); + iounmap(pmcdev->regbase); + return 0; +} + +static struct platform_driver pmc_core_driver = { + .driver = { + .name = "pmc_core", + }, + .probe = pmc_core_probe, + .remove = pmc_core_remove, +}; + +static struct platform_device pmc_core_device = { + .name = "pmc_core", +}; + +static int __init pmc_core_init(void) +{ + int ret; const struct x86_cpu_id *cpu_id; + struct pmc_dev *pmcdev = &pmc; u64 slp_s0_addr; - int err; cpu_id = x86_match_cpu(intel_pmc_core_ids); if (!cpu_id) @@ -880,36 +928,31 @@ static int __init pmc_core_probe(void) else pmcdev->base_addr = slp_s0_addr - pmcdev->map->slp_s0_offset; - pmcdev->regbase = ioremap(pmcdev->base_addr, - pmcdev->map->regmap_length); - if (!pmcdev->regbase) - return -ENOMEM; + platform_set_drvdata(&pmc_core_device, pmcdev); - mutex_init(&pmcdev->lock); - pmcdev->pmc_xram_read_bit = pmc_core_check_read_lock_bit(); + ret = platform_device_register(&pmc_core_device); + if (ret) + return ret; - err = pmc_core_dbgfs_register(pmcdev); - if (err < 0) { - pr_warn(" debugfs register failed.\n"); - iounmap(pmcdev->regbase); - return err; - } + ret = platform_driver_register(&pmc_core_driver); + if (ret) + goto out_remove_dev; - dmi_check_system(pmc_core_dmi_table); - pr_info(" initialized\n"); return 0; + +out_remove_dev: + platform_device_unregister(&pmc_core_device); + return ret; } -module_init(pmc_core_probe) -static void __exit pmc_core_remove(void) +static void __init pmc_core_exit(void) { - struct pmc_dev *pmcdev = &pmc; - - pmc_core_dbgfs_unregister(pmcdev); - mutex_destroy(&pmcdev->lock); - iounmap(pmcdev->regbase); + platform_driver_unregister(&pmc_core_driver); + platform_device_unregister(&pmc_core_device); } -module_exit(pmc_core_remove) + +module_init(pmc_core_init); +module_exit(pmc_core_exit); MODULE_LICENSE("GPL v2"); MODULE_DESCRIPTION("Intel PMC Core Driver"); From patchwork Wed Mar 20 01:04:31 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajat Jain X-Patchwork-Id: 10860657 X-Patchwork-Delegate: andy.shevchenko@gmail.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3F5F317E9 for ; Wed, 20 Mar 2019 01:04:42 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 24ED929948 for ; Wed, 20 Mar 2019 01:04:42 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 1518B29949; Wed, 20 Mar 2019 01:04:42 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.5 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI, USER_IN_DEF_DKIM_WL autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8F17729949 for ; Wed, 20 Mar 2019 01:04:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727411AbfCTBEl (ORCPT ); Tue, 19 Mar 2019 21:04:41 -0400 Received: from mail-vs1-f73.google.com ([209.85.217.73]:50569 "EHLO mail-vs1-f73.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727148AbfCTBEk (ORCPT ); Tue, 19 Mar 2019 21:04:40 -0400 Received: by mail-vs1-f73.google.com with SMTP id b68so188210vsb.17 for ; Tue, 19 Mar 2019 18:04:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=date:in-reply-to:message-id:mime-version:references:subject:from:to :cc; bh=FjGKF+9fQR3oX5+16IJIymH9iLuHR5HxuJmit6BGji4=; b=gnl9Jl8/gtPJurfj/iCHxxyc0bx2lUu/PcCqjIDRhZbnYRgLk+8zyS/8KrkkKblMHd v2EibdcN9ZeLZgb9awwOBj+Df9NpnszHMJm097kawu1oI0oYE/mSOhX7yn0QrrG07rQU AKhiUzCFXPspxqyKJAotRQgsxfPV7eK5bzz52paQZiSzFo9E1GPj2Gch58WNYgydUSiJ oy9A/TpjHZhv3URruRlV554Xd7AqRHiemm2N6AyfqdQQB2JmTpPE0G7U0xYVr0xwdMc6 1rphiPrIjX8dbK4kFO0ZPLw0/YwrlbpE+avMzVF2ttQ9s5iwGpJv+BR7y8LpsNqKW0Ux N8Ow== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:in-reply-to:message-id:mime-version :references:subject:from:to:cc; bh=FjGKF+9fQR3oX5+16IJIymH9iLuHR5HxuJmit6BGji4=; b=fiKKyT2Y1uj46EteDfUP7J6p/6iV4npwbqYL/Ug0nW250noS5+RjnwCqjFAzcm1eO1 6lFjDGNkwNrLChDH6fazdZ8GYwzPA8GLCW9eM0t12500tx6IJi+jKLLnHUQEN094pb+/ WAYhzDxbVaA7M5D7pOYcV+eeB3OE5MzWsK0FZQ/O51BeihJecRj2ubQ6J7vcyDoU5/na c+4BgBWMxnWnJ+W7F99zss862Yrj4MFmi3GxhAeYwGYvA/CGqauj2q7l0JSfEbjvSd7T Vk43mxlUNki0dtfur+fSfrVMrN0v34d53JVqv239+K5SVbE7VsfVUaFJoAbzyNK/gRNK DEfg== X-Gm-Message-State: APjAAAVQIScXp9p6k2uf/2i0uDcNIftf6gkU2Kn4s78bbABelddwsCDB C0EDEvCMBoTWPCmdJxZQqk5Rob7je1HA X-Google-Smtp-Source: APXvYqyKznbiWjVODxukg+J3yydSECtZCA1O07wXT1X1G1UO+IEvahOfPwOQWsr/u85sTxMxZGrFbgiQ2GiQ X-Received: by 2002:ab0:641a:: with SMTP id x26mr1504316uao.12.1553043879468; Tue, 19 Mar 2019 18:04:39 -0700 (PDT) Date: Tue, 19 Mar 2019 18:04:31 -0700 In-Reply-To: <20190320010431.19833-1-rajatja@google.com> Message-Id: <20190320010431.19833-2-rajatja@google.com> Mime-Version: 1.0 References: <20190313222124.229371-1-rajatja@google.com> <20190320010431.19833-1-rajatja@google.com> X-Mailer: git-send-email 2.21.0.225.g810b269d1ac-goog Subject: [PATCH 2/2] platform/x86: intel_pmc_core: Allow to dump debug registers on S0ix failure From: Rajat Jain To: Rajneesh Bhardwaj , Vishwanath Somayaji , Darren Hart , Andy Shevchenko , platform-driver-x86@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Rajat Jain , furquan@google.com, evgreen@google.com, rajatxjain@gmail.com Sender: platform-driver-x86-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: platform-driver-x86@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add a module parameter which when enabled, will check on resume, if the last S0ix attempt was successful. If not, the driver would warn and provide helpful debug information (which gets latched during the failed suspend attempt) to debug the S0ix failure. This information is very useful to debug S0ix failures. Specially since the latched debug information will be lost (over-written) if the system attempts to go into runtime (or imminent) S0ix again after that failed suspend attempt. Signed-off-by: Rajat Jain --- v2: Use pm_suspend_via_firmware() to enable the check only for S0ix (I think). drivers/platform/x86/intel_pmc_core.c | 86 +++++++++++++++++++++++++++ drivers/platform/x86/intel_pmc_core.h | 7 +++ 2 files changed, 93 insertions(+) diff --git a/drivers/platform/x86/intel_pmc_core.c b/drivers/platform/x86/intel_pmc_core.c index 55578d07610c..0ab893fac4bb 100644 --- a/drivers/platform/x86/intel_pmc_core.c +++ b/drivers/platform/x86/intel_pmc_core.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include @@ -890,9 +891,94 @@ static int pmc_core_remove(struct platform_device *pdev) return 0; } +#ifdef CONFIG_PM_SLEEP + +static bool warn_on_s0ix_failures; +module_param(warn_on_s0ix_failures, bool, 0644); +MODULE_PARM_DESC(warn_on_s0ix_failures, "Check and warn for S0ix failures"); + +static int pmc_core_suspend(struct device *dev) +{ + struct pmc_dev *pmcdev = dev_get_drvdata(dev); + + /* Save PC10 and S0ix residency for checking later */ + if (warn_on_s0ix_failures && !pm_suspend_via_firmware() && + !rdmsrl_safe(MSR_PKG_C10_RESIDENCY, &pmcdev->pc10_counter) && + !pmc_core_dev_state_get(pmcdev, &pmcdev->s0ix_counter)) + pmcdev->check_counters = true; + else + pmcdev->check_counters = false; + + return 0; +} + +static inline bool pc10_failed(struct pmc_dev *pmcdev) +{ + u64 pc10_counter; + + if (!rdmsrl_safe(MSR_PKG_C10_RESIDENCY, &pc10_counter) && + pc10_counter == pmcdev->pc10_counter) + return true; + else + return false; +} + +static inline bool s0ix_failed(struct pmc_dev *pmcdev) +{ + u64 s0ix_counter; + + if (!pmc_core_dev_state_get(pmcdev, &s0ix_counter) && + s0ix_counter == pmcdev->s0ix_counter) + return true; + else + return false; +} + +static int pmc_core_resume(struct device *dev) +{ + struct pmc_dev *pmcdev = dev_get_drvdata(dev); + + if (!pmcdev->check_counters) + return 0; + + if (pc10_failed(pmcdev)) { + dev_info(dev, "PC10 entry had failed (PC10 cnt=0x%llx)\n", + pmcdev->pc10_counter); + } else if (s0ix_failed(pmcdev)) { + + const struct pmc_bit_map **maps = pmcdev->map->slps0_dbg_maps; + const struct pmc_bit_map *map; + int offset = pmcdev->map->slps0_dbg_offset; + u32 data; + + dev_warn(dev, "S0ix entry had failed (S0ix cnt=%llu)\n", + pmcdev->s0ix_counter); + while (*maps) { + map = *maps; + data = pmc_core_reg_read(pmcdev, offset); + offset += 4; + while (map->name) { + dev_warn(dev, "SLP_S0_DBG: %-32s\tState: %s\n", + map->name, + data & map->bit_mask ? "Yes" : "No"); + ++map; + } + ++maps; + } + } + return 0; +} + +#endif + +const struct dev_pm_ops pmc_core_pm_ops = { + SET_LATE_SYSTEM_SLEEP_PM_OPS(pmc_core_suspend, pmc_core_resume) +}; + static struct platform_driver pmc_core_driver = { .driver = { .name = "pmc_core", + .pm = &pmc_core_pm_ops }, .probe = pmc_core_probe, .remove = pmc_core_remove, diff --git a/drivers/platform/x86/intel_pmc_core.h b/drivers/platform/x86/intel_pmc_core.h index 88d9c0653a5f..fdee5772e532 100644 --- a/drivers/platform/x86/intel_pmc_core.h +++ b/drivers/platform/x86/intel_pmc_core.h @@ -241,6 +241,9 @@ struct pmc_reg_map { * @pmc_xram_read_bit: flag to indicate whether PMC XRAM shadow registers * used to read MPHY PG and PLL status are available * @mutex_lock: mutex to complete one transcation + * @check_counters: On resume, check if counters are getting incremented + * @pc10_counter: PC10 residency counter + * @s0ix_counter: S0ix residency (step adjusted) * * pmc_dev contains info about power management controller device. */ @@ -253,6 +256,10 @@ struct pmc_dev { #endif /* CONFIG_DEBUG_FS */ int pmc_xram_read_bit; struct mutex lock; /* generic mutex lock for PMC Core */ + + bool check_counters; /* Check for counter increments on resume */ + u64 pc10_counter; + u64 s0ix_counter; }; #endif /* PMC_CORE_H */