From patchwork Wed Mar 5 20:09:32 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 14003327 Received: from relay2-d.mail.gandi.net (relay2-d.mail.gandi.net [217.70.183.194]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 577E71A5B85; Wed, 5 Mar 2025 20:09:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.194 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741205388; cv=none; b=U7xqTHmQ++fmy+DVobw26VUWNWvfhy1X1lVMRIcOa+hgwR84RfonrmKC8hoDeuBCcZVwBc9ae/SqOMFcuBXtEZWzGFqVvX3ro5YKfsyOueSo2hJJHOo8N6Zp9t6KPoN3vkG8qFfUasABSwl8UJlDztx6vOErVFagUedelpvfC5w= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741205388; c=relaxed/simple; bh=k8mb5Jfciu80+flRs2hqisKHG5XI2NFbUimR9plw8SY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=S+nOXixb6EdEf5TTqvjHoVHJ1CtQiAELAPmMgSG/xitf96MtA26Boj0xzO6N6cw2UoPTTamolo4CgyKHJCAsdxn+qiuBSWubEycpXaeWHdNoICeLA4hEXCI8Rvo6JFSXmEGL77iloYL42bjVDNJN+wrpwVZkWVsNe0HqHOi65Mk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=Bbsbz7KU; arc=none smtp.client-ip=217.70.183.194 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="Bbsbz7KU" Received: by mail.gandi.net (Postfix) with ESMTPSA id 71D2E442B0; Wed, 5 Mar 2025 20:09:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1741205384; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=PCI17V6UosVGLC0a4LPHUTF/v045rts51UEtquocDIU=; b=Bbsbz7KU47TY++Yx8L4Lz3ucpzl4UZ1g5/xiQGoTofUVw5RIDPGYpKSvX5nKsmmCjvOUnG MscI3OZy/Itd3Bm4yBjJ1V3hJReFb/dgg5RdxoAyk2oo8Rz8zXScP+Swz1HiSUknov2vp+ wV8ewPMkmTQkIjtJtd9G2bImWtW9WxRdlH/jXnBc/jjbovyp4+p/FwdRuL8/ReedfpZNFf KI6ztykL8dVTWOpzCvAV493ZSss3XusxAyHDiEEhhkW1LBLpSVMc5BrUnamMGgiT2fw1et yi8k2mhQbFg9lJlZNTH7Oe04yuCbINH4nxA0LsjDVQT7BarPFDlWuFgREve5cg== From: Miquel Raynal To: Mark Brown , Cc: Tudor Ambarus , Vignesh Raghavendra , Thomas Petazzoni , Miquel Raynal , stable@vger.kernel.org Subject: [PATCH 1/2] spi: cadence-qspi: Fix probe on AM62A LP SK Date: Wed, 5 Mar 2025 21:09:32 +0100 Message-ID: <20250305200933.2512925-2-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250305200933.2512925-1-miquel.raynal@bootlin.com> References: <20250305200933.2512925-1-miquel.raynal@bootlin.com> Precedence: bulk X-Mailing-List: linux-spi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-GND-State: clean X-GND-Score: -100 X-GND-Cause: gggruggvucftvghtrhhoucdtuddrgeefvddrtddtgddutdehjeehucetufdoteggodetrfdotffvucfrrhhofhhilhgvmecuifetpfffkfdpucggtfgfnhhsuhgsshgtrhhisggvnecuuegrihhlohhuthemuceftddunecusecvtfgvtghiphhivghnthhsucdlqddutddtmdenucfjughrpefhvfevufffkffojghfggfgsedtkeertdertddtnecuhfhrohhmpefoihhquhgvlhcutfgrhihnrghluceomhhiqhhuvghlrdhrrgihnhgrlhessghoohhtlhhinhdrtghomheqnecuggftrfgrthhtvghrnhepueffgeevteevkeegkeehleetteffhffffefgleeuleevjedtgeelgeeutdekgeelnecukfhppeelvddrudekgedruddtkedrleeinecuvehluhhsthgvrhfuihiivgeptdenucfrrghrrghmpehinhgvthepledvrddukeegrddutdekrdeliedphhgvlhhopehlohgtrghlhhhoshhtrdhlohgtrghlughomhgrihhnpdhmrghilhhfrhhomhepmhhiqhhuvghlrdhrrgihnhgrlhessghoohhtlhhinhdrtghomhdpnhgspghrtghpthhtohepjedprhgtphhtthhopegsrhhoohhnihgvsehkvghrnhgvlhdrohhrghdprhgtphhtthhopehlihhnuhigqdhsphhisehvghgvrhdrkhgvrhhnvghlrdhorhhgpdhrtghpthhtohepthhuughorhdrrghmsggrrhhusheslhhinhgrrhhordhorhhgpdhrtghpthhtohepvhhighhnvghshhhrsehtihdrtghomhdprhgtphhtthhopehthhhomhgrshdrphgvthgriiiiohhnihess ghoohhtlhhinhdrtghomhdprhgtphhtthhopehmihhquhgvlhdrrhgrhihnrghlsegsohhothhlihhnrdgtohhmpdhrtghpthhtohepshhtrggslhgvsehvghgvrhdrkhgvrhhnvghlrdhorhhg X-GND-Sasl: miquel.raynal@bootlin.com In 2020, there's been an unnoticed change which rightfully attempted to report probe deferrals upon DMA absence by checking the return value of dma_request_chan_by_mask(). By doing so, it also reported errors which were simply ignored otherwise, likely on purpose. This change actually turned a void return into an error code. Hence, not only the -EPROBE_DEFER error codes but all error codes got reported to the callers, now failing to probe in the absence of Rx DMA channel, despite the fact that DMA seems to not be supported natively by many implementations. Looking at the history, this change probably led to: ad2775dc3fc5 ("spi: cadence-quadspi: Disable the DAC for Intel LGM SoC") f724c296f2f2 ("spi: cadence-quadspi: fix Direct Access Mode disable for SoCFPGA") In my case, the AM62A LP SK core octo-SPI node from TI does not advertise any DMA channel, hinting that there is likely no support for it, but yet when the support for the am654 compatible was added, DMA seemed to be used, so just discarding its use with the CQSPI_DISABLE_DAC_MODE quirk for this compatible does not seem the correct approach. Let's get change the return condition back to: - return a probe deferral error if we get one - ignore the return value otherwise The "error" log level was however likely too high for something that is expected to fail, so let's lower it arbitrarily to the info level. Fixes: 935da5e5100f ("mtd: spi-nor: cadence-quadspi: Handle probe deferral while requesting DMA channel") Cc: stable@vger.kernel.org Signed-off-by: Miquel Raynal --- drivers/spi/spi-cadence-quadspi.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c index 0cd37a7436d5..c90462783b3f 100644 --- a/drivers/spi/spi-cadence-quadspi.c +++ b/drivers/spi/spi-cadence-quadspi.c @@ -1658,6 +1658,12 @@ static int cqspi_request_mmap_dma(struct cqspi_st *cqspi) int ret = PTR_ERR(cqspi->rx_chan); cqspi->rx_chan = NULL; + if (ret == -ENODEV) { + /* DMA support is not mandatory */ + dev_info(&cqspi->pdev->dev, "No Rx DMA available\n"); + return 0; + } + return dev_err_probe(&cqspi->pdev->dev, ret, "No Rx DMA available\n"); } init_completion(&cqspi->rx_dma_complete); From patchwork Wed Mar 5 20:09:33 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 14003328 Received: from relay2-d.mail.gandi.net (relay2-d.mail.gandi.net [217.70.183.194]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8C0D019D06A for ; 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arc=none smtp.client-ip=217.70.183.194 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="ntw6iRZB" Received: by mail.gandi.net (Postfix) with ESMTPSA id 590DF442B2; Wed, 5 Mar 2025 20:09:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1741205386; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=jEQNmi8WIVrqFymiVEP02jh11Ii5GRFTp/TusI0BYkc=; b=ntw6iRZB3XqQwOwEoz/OLbmCMODYzkfrcQ5f+jeJUI1jenWG+d7CnnfsgmroheRa7FBdFG gf944jbMuxH1qNN4pLKHqo5st0oQwx2LLT+/Ko9s/sFbkkDKi1MaU/dOJFasaEpqExAfiH J1joic5DrsLHmdMPi5jIfLVQZJPxpoXOxUsRSMUOpg39UBQX1BRC7bsYPDzlIHA9ogHT8I NN6RJoI+36FboA0mQIxGHbulBHy+gWz9cUx/vCFZOhbsrOMA7GDX/uAKc6QVC1QqX/2G9+ ZD9Bxqtq/DiGBkfxwrsk5D8J4EQ6Bd4kPAwy5SwYZzFeQA9ui3VQ1rycX/YggQ== From: Miquel Raynal To: Mark Brown , Cc: Tudor Ambarus , Vignesh Raghavendra , Thomas Petazzoni , Miquel Raynal Subject: [PATCH 2/2] spi: cadence-qspi: Improve spi memory performance Date: Wed, 5 Mar 2025 21:09:33 +0100 Message-ID: <20250305200933.2512925-3-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250305200933.2512925-1-miquel.raynal@bootlin.com> References: <20250305200933.2512925-1-miquel.raynal@bootlin.com> Precedence: bulk X-Mailing-List: linux-spi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-GND-State: clean X-GND-Score: -100 X-GND-Cause: gggruggvucftvghtrhhoucdtuddrgeefvddrtddtgddutdehjeehucetufdoteggodetrfdotffvucfrrhhofhhilhgvmecuifetpfffkfdpucggtfgfnhhsuhgsshgtrhhisggvnecuuegrihhlohhuthemuceftddunecusecvtfgvtghiphhivghnthhsucdlqddutddtmdenucfjughrpefhvfevufffkffojghfggfgsedtkeertdertddtnecuhfhrohhmpefoihhquhgvlhcutfgrhihnrghluceomhhiqhhuvghlrdhrrgihnhgrlhessghoohhtlhhinhdrtghomheqnecuggftrfgrthhtvghrnhepueffgeevteevkeegkeehleetteffhffffefgleeuleevjedtgeelgeeutdekgeelnecukfhppeelvddrudekgedruddtkedrleeinecuvehluhhsthgvrhfuihiivgeptdenucfrrghrrghmpehinhgvthepledvrddukeegrddutdekrdeliedphhgvlhhopehlohgtrghlhhhoshhtrdhlohgtrghlughomhgrihhnpdhmrghilhhfrhhomhepmhhiqhhuvghlrdhrrgihnhgrlhessghoohhtlhhinhdrtghomhdpnhgspghrtghpthhtohepiedprhgtphhtthhopegsrhhoohhnihgvsehkvghrnhgvlhdrohhrghdprhgtphhtthhopehlihhnuhigqdhsphhisehvghgvrhdrkhgvrhhnvghlrdhorhhgpdhrtghpthhtohepthhuughorhdrrghmsggrrhhusheslhhinhgrrhhordhorhhgpdhrtghpthhtohepvhhighhnvghshhhrsehtihdrtghomhdprhgtphhtthhopehthhhomhgrshdrphgvthgriiiiohhnihess ghoohhtlhhinhdrtghomhdprhgtphhtthhopehmihhquhgvlhdrrhgrhihnrghlsegsohhothhlihhnrdgtohhm X-GND-Sasl: miquel.raynal@bootlin.com I do not know the controller enough to really understand what is happening under the hood, but most of the supported IPs just disable direct access without explicit reason. In practice we observe a significant speed improvement when using indirect mode, some kind of direct mapping, instead of DAC, Direct ACcess. Add the relevant quirk for all boards with the same defaults as AM654 to use INDAC (INDirect ACcess) instead. Speed tests show no change on the write speed on a SPI NAND chip clocked at 25MHz on the AM62A LP SK, but a read speed jumping from 3500kiB/s up to more than 10000kiB/s (approximately x3). Signed-off-by: Miquel Raynal --- drivers/spi/spi-cadence-quadspi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c index c90462783b3f..559fbdfbd9f7 100644 --- a/drivers/spi/spi-cadence-quadspi.c +++ b/drivers/spi/spi-cadence-quadspi.c @@ -2073,7 +2073,7 @@ static const struct cqspi_driver_platdata k2g_qspi = { static const struct cqspi_driver_platdata am654_ospi = { .hwcaps_mask = CQSPI_SUPPORTS_OCTAL | CQSPI_SUPPORTS_QUAD, - .quirks = CQSPI_NEEDS_WR_DELAY, + .quirks = CQSPI_DISABLE_DAC_MODE | CQSPI_NEEDS_WR_DELAY, }; static const struct cqspi_driver_platdata intel_lgm_qspi = {