From patchwork Thu Mar 6 13:10:16 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chukun Pan X-Patchwork-Id: 14004502 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C9A6DC282D1 for ; Thu, 6 Mar 2025 13:26:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=hGdrtfG+0godCYYt9ZtlbR7cnCOj6Q+xMT5VPvg4gk4=; b=oEyHsEY219GgbdPg1hhQF2gqAY KqP+OmP3Wi1TIMZfTFptBx2EpGttHccKEehpF7UA83hhP8PSohZTVkd7hxsNmsW2DaUUI5yrf6FH4 cst3oux96RIe4ISscj2qjF657aCfhPL6Myf2Xqr2JSGxDljOKPKLzJ1CGdc9el1vvVWKko7bKRojC /TUQNxoHAo9xttDmXcTR5cEyKVz029LAyZrEXH41ZtsVoAOxw70e4/UrHXHJ1z3qdM2Getaj5uGK5 h/o8CgNldHnYBF1nrg6tlZivAEWV98v9yYKDf3p7EpOAJhm5wvbE0kh8TKVGgYdaAdKbiv9bdPo2A Fj5nOReQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tqBEc-0000000B3VC-3pDZ; Thu, 06 Mar 2025 13:25:58 +0000 Received: from mail-m49198.qiye.163.com ([45.254.49.198]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tqAzc-0000000B0c5-3D7S; Thu, 06 Mar 2025 13:10:30 +0000 Received: from localhost.localdomain (unknown [119.122.215.89]) by smtp.qiye.163.com (Hmail) with ESMTP id d2ca2cf2; Thu, 6 Mar 2025 21:10:26 +0800 (GMT+08:00) From: Chukun Pan To: Heiko Stuebner Cc: Yao Zi , Rob Herring , Conor Dooley , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Chukun Pan Subject: [PATCH 1/1] arm64: dts: rockchip: enable SCMI clk for RK3528 SoC Date: Thu, 6 Mar 2025 21:10:16 +0800 Message-Id: <20250306131016.281290-2-amadeus@jmu.edu.cn> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250306131016.281290-1-amadeus@jmu.edu.cn> References: <20250306131016.281290-1-amadeus@jmu.edu.cn> MIME-Version: 1.0 X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFITzdXWS1ZQUlXWQ8JGhUIEh9ZQVlDHkIaVh1LGB5CTB4eTx4ZTlYeHw5VEwETFhoSFy QUDg9ZV1kYEgtZQVlKSkJVSklJVUlKTlVDQllXWRYaDxIVHRRZQVlPS0hVSktISk5MTlVKS0tVSk JLS1kG X-HM-Tid: 0a956b94261403a2kunmd2ca2cf2 X-HM-MType: 10 X-HM-Sender-Digest: e1kMHhlZQR0aFwgeV1kSHx4VD1lBWUc6Kwg6UQw4FzIDTTMZTk1PDhgT NzoKFD9VSlVKTE9KSU1NTUlNTU1DVTMWGhIXVRoWGh8eDgg7ERYOVR4fDlUYFUVZV1kSC1lBWUpK QlVKSUlVSUpOVUNCWVdZCAFZQUpCT0w3Bg++ X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250306_051028_993444_CC5F3621 X-CRM114-Status: UNSURE ( 7.61 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Same as RK3568, RK3528 uses SCMI clk instead of ARMCLK. Add SCMI clk for CPU, GPU and RNG will also use it. Signed-off-by: Chukun Pan --- arch/arm64/boot/dts/rockchip/rk3528.dtsi | 32 ++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3528.dtsi b/arch/arm64/boot/dts/rockchip/rk3528.dtsi index 0c0e7f151462..aa68c2fef2f3 100644 --- a/arch/arm64/boot/dts/rockchip/rk3528.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3528.dtsi @@ -59,6 +59,7 @@ cpu0: cpu@0 { reg = <0x0>; device_type = "cpu"; enable-method = "psci"; + clocks = <&scmi_clk SCMI_CLK_CPU>; }; cpu1: cpu@1 { @@ -66,6 +67,7 @@ cpu1: cpu@1 { reg = <0x1>; device_type = "cpu"; enable-method = "psci"; + clocks = <&scmi_clk SCMI_CLK_CPU>; }; cpu2: cpu@2 { @@ -73,6 +75,7 @@ cpu2: cpu@2 { reg = <0x2>; device_type = "cpu"; enable-method = "psci"; + clocks = <&scmi_clk SCMI_CLK_CPU>; }; cpu3: cpu@3 { @@ -80,6 +83,22 @@ cpu3: cpu@3 { reg = <0x3>; device_type = "cpu"; enable-method = "psci"; + clocks = <&scmi_clk SCMI_CLK_CPU>; + }; + }; + + firmware { + scmi: scmi { + compatible = "arm,scmi-smc"; + arm,smc-id = <0x82000010>; + shmem = <&scmi_shmem>; + #address-cells = <1>; + #size-cells = <0>; + + scmi_clk: protocol@14 { + reg = <0x14>; + #clock-cells = <1>; + }; }; }; @@ -110,6 +129,19 @@ gmac0_clk: clock-gmac50m { #clock-cells = <0>; }; + sram@10f000 { + compatible = "mmio-sram"; + reg = <0x0 0x0010f000 0x0 0x100>; + ranges = <0 0x0 0x0010f000 0x100>; + #address-cells = <1>; + #size-cells = <1>; + + scmi_shmem: sram@0 { + compatible = "arm,scmi-shmem"; + reg = <0x0 0x100>; + }; + }; + soc { compatible = "simple-bus"; ranges = <0x0 0xfe000000 0x0 0xfe000000 0x0 0x2000000>;