From patchwork Fri Mar 7 22:41:19 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Cavitt, Jonathan" X-Patchwork-Id: 14007261 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 593FAC282DE for ; Fri, 7 Mar 2025 22:41:28 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8DF5C10EC4C; Fri, 7 Mar 2025 22:41:27 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="a4Mxdvia"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) by gabe.freedesktop.org (Postfix) with ESMTPS id 9006110EC4F; Fri, 7 Mar 2025 22:41:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1741387287; x=1772923287; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=NBeXvSWAsJ4e7D6fq+XzQgXufZPHcwB28J2XpBnFFR8=; b=a4MxdviaYzlLMxij/FcVjT+H1u/Sl0KjKHZYhJ167CzUXPzpppY2FkNR d7owPQddcIuCbyiIJNhJj0fE1zhOcvDN8pp5dqPTftMofOaEtFtOjrSQr wpM9T8P1BODwUtxcHUmwYLf0gxYMOMQAZ6dquZMrQw+ToFTqyWIKO4L3O AD3cew24o3AVSQDfCScMeJPUZ2K/S7vV0wQ6DXx+hyn6pAHy6QkREgDRC yUQPFVxwy6s6DgIY2Q8uDyuw9d+znj2RJ1qDUpU32/JOQWz5Q/hVdt8m9 wwJEff9oFuvGn/Lz3fhP3XC/34jqgSghEeBkfHeAx+es4JAgkTUD4Dd4A Q==; X-CSE-ConnectionGUID: 5wGDD1vaRmKRRZnZtWO/RQ== X-CSE-MsgGUID: HwchswiISGaFxs/fbvJr6Q== X-IronPort-AV: E=McAfee;i="6700,10204,11366"; a="41704513" X-IronPort-AV: E=Sophos;i="6.14,230,1736841600"; d="scan'208";a="41704513" Received: from orviesa004.jf.intel.com ([10.64.159.144]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Mar 2025 14:41:26 -0800 X-CSE-ConnectionGUID: G34JJSsBRuGgsehXdtexFw== X-CSE-MsgGUID: agQWWY5LSEidnQcCd0rVxg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.14,230,1736841600"; d="scan'208";a="124457942" Received: from dut4440lnl.fm.intel.com ([10.105.10.114]) by orviesa004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Mar 2025 14:41:26 -0800 From: Jonathan Cavitt To: intel-xe@lists.freedesktop.org Cc: saurabhg.gupta@intel.com, alex.zuo@intel.com, jonathan.cavitt@intel.com, joonas.lahtinen@linux.intel.com, matthew.brost@intel.com, jianxun.zhang@intel.com, shuicheng.lin@intel.com, dri-devel@lists.freedesktop.org Subject: [PATCH v6 1/6] drm/xe/xe_gt_pagefault: Disallow writes to read-only VMAs Date: Fri, 7 Mar 2025 22:41:19 +0000 Message-ID: <20250307224125.111430-2-jonathan.cavitt@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250307224125.111430-1-jonathan.cavitt@intel.com> References: <20250307224125.111430-1-jonathan.cavitt@intel.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The page fault handler should reject write/atomic access to read only VMAs. Add code to handle this in handle_pagefault after the VMA lookup. Fixes: 3d420e9fa848 ("drm/xe: Rework GPU page fault handling") Signed-off-by: Jonathan Cavitt Suggested-by: Matthew Brost --- drivers/gpu/drm/xe/xe_gt_pagefault.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/gpu/drm/xe/xe_gt_pagefault.c b/drivers/gpu/drm/xe/xe_gt_pagefault.c index c5ad9a0a89c2..a4e688e72efd 100644 --- a/drivers/gpu/drm/xe/xe_gt_pagefault.c +++ b/drivers/gpu/drm/xe/xe_gt_pagefault.c @@ -237,6 +237,11 @@ static int handle_pagefault(struct xe_gt *gt, struct pagefault *pf) goto unlock_vm; } + if (xe_vma_read_only(vma) && pf->access_type != ACCESS_TYPE_READ) { + err = -EPERM; + goto unlock_vm; + } + atomic = access_is_atomic(pf->access_type); if (xe_vma_is_cpu_addr_mirror(vma)) From patchwork Fri Mar 7 22:41:20 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Cavitt, Jonathan" X-Patchwork-Id: 14007264 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E9A49C35FF1 for ; Fri, 7 Mar 2025 22:41:35 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0C5D310EC56; Fri, 7 Mar 2025 22:41:31 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="MDaA04FF"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) by gabe.freedesktop.org (Postfix) with ESMTPS id B287710EC4E; Fri, 7 Mar 2025 22:41:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1741387287; x=1772923287; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=zRC7H4cC6sNb29jEFb7rfdw7OLmZ4f7I74F62LPVQE0=; b=MDaA04FF1SHb4ehb9Y+PgcgKac0i8+JpbXuEKjQ5RRUy0p6aNgEpMRWd Dh+3FO8nK/KaU+htL6fym5mXQ2D78zcNl6We2fYSi1PzI0uqylJNCCVNW N2/TgSZjAFYNxsdeWaErgXFuqnYjxqguHH67ApwvL74TJYZgmMs8o0mbn FEcEH5A5SPwdEtIcnuSFOymr/UsLo/MISWXuK9DJN2tvkj2ffd1ivM53Y +/fT0F1FpaIAq6ak7ftg9HPchPgkC+I2OZdxkNKiN5S+jgI/DY7/6WVKj IbinKVBTAkuwxDi9NS2RYyMTHLP/kUa6DBZE/JXtcdUan6RsijmKKNcmH g==; X-CSE-ConnectionGUID: KzV1kG96RheWe/F2a3wFuA== X-CSE-MsgGUID: GxPd4IdCT9O20xmuitceJg== X-IronPort-AV: E=McAfee;i="6700,10204,11366"; a="41704517" X-IronPort-AV: E=Sophos;i="6.14,230,1736841600"; d="scan'208";a="41704517" Received: from orviesa004.jf.intel.com ([10.64.159.144]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Mar 2025 14:41:26 -0800 X-CSE-ConnectionGUID: YooH/cz5RDSVhVO38Cm4bw== X-CSE-MsgGUID: nevDqW6kSseBfL8Vv6wFVg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.14,230,1736841600"; d="scan'208";a="124457946" Received: from dut4440lnl.fm.intel.com ([10.105.10.114]) by orviesa004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Mar 2025 14:41:26 -0800 From: Jonathan Cavitt To: intel-xe@lists.freedesktop.org Cc: saurabhg.gupta@intel.com, alex.zuo@intel.com, jonathan.cavitt@intel.com, joonas.lahtinen@linux.intel.com, matthew.brost@intel.com, jianxun.zhang@intel.com, shuicheng.lin@intel.com, dri-devel@lists.freedesktop.org Subject: [PATCH v6 2/6] drm/xe/xe_gt_pagefault: Migrate pagefault struct to header Date: Fri, 7 Mar 2025 22:41:20 +0000 Message-ID: <20250307224125.111430-3-jonathan.cavitt@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250307224125.111430-1-jonathan.cavitt@intel.com> References: <20250307224125.111430-1-jonathan.cavitt@intel.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Migrate the pagefault struct from xe_gt_pagefault.c to the xe_gt_pagefault.h header file, along with the associated enum values. v2: Normalize names for common header (Matt Brost) Signed-off-by: Jonathan Cavitt --- drivers/gpu/drm/xe/xe_gt_pagefault.c | 41 +++++----------------------- drivers/gpu/drm/xe/xe_gt_pagefault.h | 28 +++++++++++++++++++ 2 files changed, 35 insertions(+), 34 deletions(-) diff --git a/drivers/gpu/drm/xe/xe_gt_pagefault.c b/drivers/gpu/drm/xe/xe_gt_pagefault.c index a4e688e72efd..c8a9058aa09f 100644 --- a/drivers/gpu/drm/xe/xe_gt_pagefault.c +++ b/drivers/gpu/drm/xe/xe_gt_pagefault.c @@ -23,33 +23,6 @@ #include "xe_trace_bo.h" #include "xe_vm.h" -struct pagefault { - u64 page_addr; - u32 asid; - u16 pdata; - u8 vfid; - u8 access_type; - u8 fault_type; - u8 fault_level; - u8 engine_class; - u8 engine_instance; - u8 fault_unsuccessful; - bool trva_fault; -}; - -enum access_type { - ACCESS_TYPE_READ = 0, - ACCESS_TYPE_WRITE = 1, - ACCESS_TYPE_ATOMIC = 2, - ACCESS_TYPE_RESERVED = 3, -}; - -enum fault_type { - NOT_PRESENT = 0, - WRITE_ACCESS_VIOLATION = 1, - ATOMIC_ACCESS_VIOLATION = 2, -}; - struct acc { u64 va_range_base; u32 asid; @@ -61,9 +34,9 @@ struct acc { u8 engine_instance; }; -static bool access_is_atomic(enum access_type access_type) +static bool access_is_atomic(enum xe_pagefault_access_type access_type) { - return access_type == ACCESS_TYPE_ATOMIC; + return access_type == XE_PAGEFAULT_ACCESS_TYPE_ATOMIC; } static bool vma_is_valid(struct xe_tile *tile, struct xe_vma *vma) @@ -205,7 +178,7 @@ static struct xe_vm *asid_to_vm(struct xe_device *xe, u32 asid) return vm; } -static int handle_pagefault(struct xe_gt *gt, struct pagefault *pf) +static int handle_pagefault(struct xe_gt *gt, struct xe_pagefault *pf) { struct xe_device *xe = gt_to_xe(gt); struct xe_vm *vm; @@ -237,7 +210,7 @@ static int handle_pagefault(struct xe_gt *gt, struct pagefault *pf) goto unlock_vm; } - if (xe_vma_read_only(vma) && pf->access_type != ACCESS_TYPE_READ) { + if (xe_vma_read_only(vma) && pf->access_type != XE_PAGEFAULT_ACCESS_TYPE_READ) { err = -EPERM; goto unlock_vm; } @@ -271,7 +244,7 @@ static int send_pagefault_reply(struct xe_guc *guc, return xe_guc_ct_send(&guc->ct, action, ARRAY_SIZE(action), 0, 0); } -static void print_pagefault(struct xe_device *xe, struct pagefault *pf) +static void print_pagefault(struct xe_device *xe, struct xe_pagefault *pf) { drm_dbg(&xe->drm, "\n\tASID: %d\n" "\tVFID: %d\n" @@ -291,7 +264,7 @@ static void print_pagefault(struct xe_device *xe, struct pagefault *pf) #define PF_MSG_LEN_DW 4 -static bool get_pagefault(struct pf_queue *pf_queue, struct pagefault *pf) +static bool get_pagefault(struct pf_queue *pf_queue, struct xe_pagefault *pf) { const struct xe_guc_pagefault_desc *desc; bool ret = false; @@ -378,7 +351,7 @@ static void pf_queue_work_func(struct work_struct *w) struct xe_gt *gt = pf_queue->gt; struct xe_device *xe = gt_to_xe(gt); struct xe_guc_pagefault_reply reply = {}; - struct pagefault pf = {}; + struct xe_pagefault pf = {}; unsigned long threshold; int ret; diff --git a/drivers/gpu/drm/xe/xe_gt_pagefault.h b/drivers/gpu/drm/xe/xe_gt_pagefault.h index 839c065a5e4c..33616043d17a 100644 --- a/drivers/gpu/drm/xe/xe_gt_pagefault.h +++ b/drivers/gpu/drm/xe/xe_gt_pagefault.h @@ -11,6 +11,34 @@ struct xe_gt; struct xe_guc; +struct xe_pagefault { + u64 page_addr; + u32 asid; + u16 pdata; + u8 vfid; + u8 access_type; + u8 fault_type; + u8 fault_level; + u8 engine_class; + u8 engine_instance; + u8 fault_unsuccessful; + bool prefetch; + bool trva_fault; +}; + +enum xe_pagefault_access_type { + XE_PAGEFAULT_ACCESS_TYPE_READ = 0, + XE_PAGEFAULT_ACCESS_TYPE_WRITE = 1, + XE_PAGEFAULT_ACCESS_TYPE_ATOMIC = 2, + XE_PAGEFAULT_ACCESS_TYPE_RESERVED = 3, +}; + +enum xe_pagefault_type { + XE_PAGEFAULT_TYPE_NOT_PRESENT = 0, + XE_PAGEFAULT_TYPE_WRITE_ACCESS_VIOLATION = 1, + XE_PAGEFAULT_TYPE_ATOMIC_ACCESS_VIOLATION = 2, +}; + int xe_gt_pagefault_init(struct xe_gt *gt); void xe_gt_pagefault_reset(struct xe_gt *gt); int xe_guc_pagefault_handler(struct xe_guc *guc, u32 *msg, u32 len); From patchwork Fri Mar 7 22:41:21 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Cavitt, Jonathan" X-Patchwork-Id: 14007263 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4428DC28B31 for ; Fri, 7 Mar 2025 22:41:33 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0AEE610EC4F; Fri, 7 Mar 2025 22:41:28 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="dn97wpRu"; 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d="scan'208";a="41704518" Received: from orviesa004.jf.intel.com ([10.64.159.144]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Mar 2025 14:41:26 -0800 X-CSE-ConnectionGUID: 923c6qudTw2EUMhI8cGasQ== X-CSE-MsgGUID: 1WvN6JyhS+aRvK/pume62A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.14,230,1736841600"; d="scan'208";a="124457950" Received: from dut4440lnl.fm.intel.com ([10.105.10.114]) by orviesa004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Mar 2025 14:41:26 -0800 From: Jonathan Cavitt To: intel-xe@lists.freedesktop.org Cc: saurabhg.gupta@intel.com, alex.zuo@intel.com, jonathan.cavitt@intel.com, joonas.lahtinen@linux.intel.com, matthew.brost@intel.com, jianxun.zhang@intel.com, shuicheng.lin@intel.com, dri-devel@lists.freedesktop.org Subject: [PATCH v6 3/6] drm/xe/xe_vm: Add per VM pagefault info Date: Fri, 7 Mar 2025 22:41:21 +0000 Message-ID: <20250307224125.111430-4-jonathan.cavitt@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250307224125.111430-1-jonathan.cavitt@intel.com> References: <20250307224125.111430-1-jonathan.cavitt@intel.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Add additional information to each VM so they can report up to the first 50 seen pagefaults. Only failed pagefaults are saved this way, as successful pagefaults should recover and not need to be reported to userspace. v2: - Free vm after use (Shuicheng) - Compress pf copy logic (Shuicheng) - Update fault_unsuccessful before storing (Shuicheng) - Fix old struct name in comments (Shuicheng) - Keep first 50 pagefaults instead of last 50 (Jianxun) Signed-off-by: Jonathan Cavitt Suggested-by: Matthew Brost CC: Shuicheng Lin CC: Zhang Jianxun --- drivers/gpu/drm/xe/xe_gt_pagefault.c | 17 +++++++++++ drivers/gpu/drm/xe/xe_vm.c | 42 ++++++++++++++++++++++++++++ drivers/gpu/drm/xe/xe_vm.h | 6 ++++ drivers/gpu/drm/xe/xe_vm_types.h | 20 +++++++++++++ 4 files changed, 85 insertions(+) diff --git a/drivers/gpu/drm/xe/xe_gt_pagefault.c b/drivers/gpu/drm/xe/xe_gt_pagefault.c index c8a9058aa09f..964ca1efb698 100644 --- a/drivers/gpu/drm/xe/xe_gt_pagefault.c +++ b/drivers/gpu/drm/xe/xe_gt_pagefault.c @@ -343,6 +343,22 @@ int xe_guc_pagefault_handler(struct xe_guc *guc, u32 *msg, u32 len) return full ? -ENOSPC : 0; } +static void save_pagefault_to_vm(struct xe_device *xe, struct xe_pagefault *pf) +{ + struct xe_vm *vm; + struct xe_pagefault *store; + + vm = asid_to_vm(xe, pf->asid); + if (IS_ERR(vm)) + return; + + spin_lock(&vm->pfs.lock); + store = kmemdup(pf, sizeof(*pf), GFP_KERNEL); + xe_vm_add_pf_entry(vm, store); + spin_unlock(&vm->pfs.lock); + xe_vm_put(vm); +} + #define USM_QUEUE_MAX_RUNTIME_MS 20 static void pf_queue_work_func(struct work_struct *w) @@ -362,6 +378,7 @@ static void pf_queue_work_func(struct work_struct *w) if (unlikely(ret)) { print_pagefault(xe, &pf); pf.fault_unsuccessful = 1; + save_pagefault_to_vm(xe, &pf); drm_dbg(&xe->drm, "Fault response: Unsuccessful %d\n", ret); } diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c index 22a26aff3a6e..eada3ecc2364 100644 --- a/drivers/gpu/drm/xe/xe_vm.c +++ b/drivers/gpu/drm/xe/xe_vm.c @@ -778,6 +778,43 @@ int xe_vm_userptr_check_repin(struct xe_vm *vm) list_empty_careful(&vm->userptr.invalidated)) ? 0 : -EAGAIN; } +void xe_vm_add_pf_entry(struct xe_vm *vm, struct xe_pagefault *pf) +{ + struct xe_vm_pf_entry *e = NULL; + + e = kzalloc(sizeof(*e), GFP_KERNEL); + xe_assert(vm->xe, e); + + spin_lock(&vm->pfs.lock); + + /** + * Limit the number of pfs in the pf list to prevent memory overuse. + */ + if (vm->pfs.len >= MAX_PFS) { + kfree(e); + spin_unlock(&vm->pfs.lock); + return; + } + + list_add_tail(&e->list, &vm->pfs.list); + vm->pfs.len++; + spin_unlock(&vm->pfs.lock); +} + +void xe_vm_remove_pf_entries(struct xe_vm *vm) +{ + struct xe_vm_pf_entry *e, *tmp; + + spin_lock(&vm->pfs.lock); + list_for_each_entry_safe(e, tmp, &vm->pfs.list, list) { + list_del(&e->list); + kfree(e->pf); + kfree(e); + } + vm->pfs.len = 0; + spin_unlock(&vm->pfs.lock); +} + static int xe_vma_ops_alloc(struct xe_vma_ops *vops, bool array_of_binds) { int i; @@ -1660,6 +1697,9 @@ struct xe_vm *xe_vm_create(struct xe_device *xe, u32 flags) init_rwsem(&vm->userptr.notifier_lock); spin_lock_init(&vm->userptr.invalidated_lock); + INIT_LIST_HEAD(&vm->pfs.list); + spin_lock_init(&vm->pfs.lock); + ttm_lru_bulk_move_init(&vm->lru_bulk_move); INIT_WORK(&vm->destroy_work, vm_destroy_work_func); @@ -1930,6 +1970,8 @@ void xe_vm_close_and_put(struct xe_vm *vm) } up_write(&xe->usm.lock); + xe_vm_remove_pf_entries(vm); + for_each_tile(tile, xe, id) xe_range_fence_tree_fini(&vm->rftree[id]); diff --git a/drivers/gpu/drm/xe/xe_vm.h b/drivers/gpu/drm/xe/xe_vm.h index 0ef811fc2bde..fe068e4448a6 100644 --- a/drivers/gpu/drm/xe/xe_vm.h +++ b/drivers/gpu/drm/xe/xe_vm.h @@ -12,6 +12,8 @@ #include "xe_map.h" #include "xe_vm_types.h" +#define MAX_PFS 50 + struct drm_device; struct drm_printer; struct drm_file; @@ -257,6 +259,10 @@ int xe_vma_userptr_pin_pages(struct xe_userptr_vma *uvma); int xe_vma_userptr_check_repin(struct xe_userptr_vma *uvma); +void xe_vm_add_pf_entry(struct xe_vm *vm, struct xe_pagefault *pf); + +void xe_vm_remove_pf_entries(struct xe_vm *vm); + bool xe_vm_validate_should_retry(struct drm_exec *exec, int err, ktime_t *end); int xe_vm_lock_vma(struct drm_exec *exec, struct xe_vma *vma); diff --git a/drivers/gpu/drm/xe/xe_vm_types.h b/drivers/gpu/drm/xe/xe_vm_types.h index 84fa41b9fa20..3a2329f54fb1 100644 --- a/drivers/gpu/drm/xe/xe_vm_types.h +++ b/drivers/gpu/drm/xe/xe_vm_types.h @@ -19,6 +19,7 @@ #include "xe_range_fence.h" struct xe_bo; +struct xe_pagefault; struct xe_svm_range; struct xe_sync_entry; struct xe_user_fence; @@ -142,6 +143,13 @@ struct xe_userptr_vma { struct xe_device; +struct xe_vm_pf_entry { + /** @pf: observed pagefault */ + struct xe_pagefault *pf; + /** @list: link into @xe_vm.pfs.list */ + struct list_head list; +}; + struct xe_vm { /** @gpuvm: base GPUVM used to track VMAs */ struct drm_gpuvm gpuvm; @@ -305,6 +313,18 @@ struct xe_vm { bool capture_once; } error_capture; + /** + * @pfs: List of all pagefaults associated with this VM + */ + struct { + /** @lock: lock protecting @pfs.list */ + spinlock_t lock; + /** @list: list of xe_exec_queue_ban_entry entries */ + struct list_head list; + /** @len: length of @pfs.list */ + unsigned int len; + } pfs; + /** * @tlb_flush_seqno: Required TLB flush seqno for the next exec. * protected by the vm resv. From patchwork Fri Mar 7 22:41:22 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Cavitt, Jonathan" X-Patchwork-Id: 14007267 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AB669C28B25 for ; Fri, 7 Mar 2025 22:41:37 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5D11510EC58; Fri, 7 Mar 2025 22:41:32 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="fmXLtFz/"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) by gabe.freedesktop.org (Postfix) with ESMTPS id 08BC910EC4E; Fri, 7 Mar 2025 22:41:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1741387287; x=1772923287; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Js3F+xcvqQ/b3H2lkKt5SK4bLmNS8gHwcvM+mikSozk=; b=fmXLtFz/N3R+0FUu5/qtPssS2v6NnyIRNYl6VlwhNJsLEKdTNueRJOhZ XXcLyQrec8vbz+/ZY/OZfnuNGUfL9C7uvUmhPLAmg6Pj+6xC6nM1DfcGq 5zibri4lZQcUazAgZMrPKRiuyS0u07GBwHAx4PMvb9rhQQN3CAo3AAx7e BSoMPdLWHxT6a7DlzVIpPb9IhyVDpp+xJD4uFKAdGdQAisuIrTALckzZm x01z+LmQiBN39UEkmC9nnwBs3bAE780kVjmotUF5Twjr0iG1+YI8PwWtG EM+ySrkJMQ9iXRpJT4x4WlNzBQkyfRk9OA9OHw1viBdBHcyrRxhrw1Y+K w==; X-CSE-ConnectionGUID: /GYqH8aiRii5T8OzbkF5EA== X-CSE-MsgGUID: kCyRbQpzTgOoV9gDZ6OhWA== X-IronPort-AV: E=McAfee;i="6700,10204,11366"; a="41704520" X-IronPort-AV: E=Sophos;i="6.14,230,1736841600"; d="scan'208";a="41704520" Received: from orviesa004.jf.intel.com ([10.64.159.144]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Mar 2025 14:41:27 -0800 X-CSE-ConnectionGUID: q5HJtphAQ/yUiJT5ypTVLw== X-CSE-MsgGUID: mknF5kecT96DiPNhMbzB/g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.14,230,1736841600"; d="scan'208";a="124457955" Received: from dut4440lnl.fm.intel.com ([10.105.10.114]) by orviesa004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Mar 2025 14:41:27 -0800 From: Jonathan Cavitt To: intel-xe@lists.freedesktop.org Cc: saurabhg.gupta@intel.com, alex.zuo@intel.com, jonathan.cavitt@intel.com, joonas.lahtinen@linux.intel.com, matthew.brost@intel.com, jianxun.zhang@intel.com, shuicheng.lin@intel.com, dri-devel@lists.freedesktop.org Subject: [PATCH v6 4/6] drm/xe/uapi: Define drm_xe_vm_get_faults Date: Fri, 7 Mar 2025 22:41:22 +0000 Message-ID: <20250307224125.111430-5-jonathan.cavitt@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250307224125.111430-1-jonathan.cavitt@intel.com> References: <20250307224125.111430-1-jonathan.cavitt@intel.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Add initial declarations for the drm_xe_vm_get_faults ioctl. Signed-off-by: Jonathan Cavitt --- include/uapi/drm/xe_drm.h | 49 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 49 insertions(+) diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h index 616916985e3f..90c2fcdbd5c1 100644 --- a/include/uapi/drm/xe_drm.h +++ b/include/uapi/drm/xe_drm.h @@ -81,6 +81,7 @@ extern "C" { * - &DRM_IOCTL_XE_EXEC * - &DRM_IOCTL_XE_WAIT_USER_FENCE * - &DRM_IOCTL_XE_OBSERVATION + * - %DRM_IOCTL_XE_VM_GET_FAULTS */ /* @@ -102,6 +103,7 @@ extern "C" { #define DRM_XE_EXEC 0x09 #define DRM_XE_WAIT_USER_FENCE 0x0a #define DRM_XE_OBSERVATION 0x0b +#define DRM_XE_VM_GET_FAULTS 0x0c /* Must be kept compact -- no holes */ @@ -117,6 +119,7 @@ extern "C" { #define DRM_IOCTL_XE_EXEC DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC, struct drm_xe_exec) #define DRM_IOCTL_XE_WAIT_USER_FENCE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_WAIT_USER_FENCE, struct drm_xe_wait_user_fence) #define DRM_IOCTL_XE_OBSERVATION DRM_IOW(DRM_COMMAND_BASE + DRM_XE_OBSERVATION, struct drm_xe_observation_param) +#define DRM_IOCTL_XE_VM_GET_FAULTS DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_VM_GET_FAULTS, struct drm_xe_vm_get_faults) /** * DOC: Xe IOCTL Extensions @@ -1189,6 +1192,52 @@ struct drm_xe_vm_bind { __u64 reserved[2]; }; +struct xe_vm_fault { + /** @address: Address of the fault, if relevant */ + __u64 address; +#define DRM_XE_FAULT_ADDRESS_TYPE_NONE_EXT 0 +#define DRM_XE_FAULT_ADDRESS_TYPE_READ_INVALID_EXT 1 +#define DRM_XE_FAULT_ADDRESS_TYPE_WRITE_INVALID_EXT 2 + /** @address_type: , if relevant */ + __u32 address_type; + /** + * @address_precision: Precision of faulted address, if relevant. + * Currently only SZ_4K. + */ + __u32 address_precision; + /** @reserved: MBZ */ + __u64 reserved[3]; +}; + +/** + * struct drm_xe_vm_get_faults - Input of &DRM_IOCTL_XE_VM_GET_FAULTS + * + * The user provides a VM ID, and the ioctl will + * + */ +struct drm_xe_vm_get_faults { + /** @extensions: Pointer to the first extension struct, if any */ + __u64 extensions; + + /** @vm_id: The ID of the VM to query the properties of */ + __u32 vm_id; + + /** @size: Size to allocate for @ptr */ + __u32 size; + + /** @fault_count: Number of faults to be returned */ + __u32 fault_count; + + /** @pad: MBZ */ + __u32 pad; + + /** @reserved: MBZ */ + __u64 reserved[2]; + + /** @faults: Pointer to user-defined array of xe_vm_fault of flexible size */ + __u64 faults; +}; + /** * struct drm_xe_exec_queue_create - Input of &DRM_IOCTL_XE_EXEC_QUEUE_CREATE * From patchwork Fri Mar 7 22:41:23 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Cavitt, Jonathan" X-Patchwork-Id: 14007265 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C55D3C28B28 for ; Fri, 7 Mar 2025 22:41:34 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 014B310EC55; Fri, 7 Mar 2025 22:41:31 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; 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a="41704521" X-IronPort-AV: E=Sophos;i="6.14,230,1736841600"; d="scan'208";a="41704521" Received: from orviesa004.jf.intel.com ([10.64.159.144]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Mar 2025 14:41:27 -0800 X-CSE-ConnectionGUID: JwMl4at3SnmlkdOxvuj3hg== X-CSE-MsgGUID: T/nWD2GJTLaSOs3fQPG0fg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.14,230,1736841600"; d="scan'208";a="124457958" Received: from dut4440lnl.fm.intel.com ([10.105.10.114]) by orviesa004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Mar 2025 14:41:27 -0800 From: Jonathan Cavitt To: intel-xe@lists.freedesktop.org Cc: saurabhg.gupta@intel.com, alex.zuo@intel.com, jonathan.cavitt@intel.com, joonas.lahtinen@linux.intel.com, matthew.brost@intel.com, jianxun.zhang@intel.com, shuicheng.lin@intel.com, dri-devel@lists.freedesktop.org Subject: [PATCH v6 5/6] drm/xe/xe_gt_pagefault: Add address_type field to pagefaults Date: Fri, 7 Mar 2025 22:41:23 +0000 Message-ID: <20250307224125.111430-6-jonathan.cavitt@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250307224125.111430-1-jonathan.cavitt@intel.com> References: <20250307224125.111430-1-jonathan.cavitt@intel.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Add a new field to the xe_pagefault struct, address_type, that tracks the type of fault the pagefault incurred. Signed-off-by: Jonathan Cavitt --- drivers/gpu/drm/xe/xe_gt_pagefault.c | 3 +++ drivers/gpu/drm/xe/xe_gt_pagefault.h | 1 + 2 files changed, 4 insertions(+) diff --git a/drivers/gpu/drm/xe/xe_gt_pagefault.c b/drivers/gpu/drm/xe/xe_gt_pagefault.c index 964ca1efb698..fa8bf743d4d7 100644 --- a/drivers/gpu/drm/xe/xe_gt_pagefault.c +++ b/drivers/gpu/drm/xe/xe_gt_pagefault.c @@ -206,11 +206,13 @@ static int handle_pagefault(struct xe_gt *gt, struct xe_pagefault *pf) vma = lookup_vma(vm, pf->page_addr); if (!vma) { + pf->address_type = DRM_XE_FAULT_ADDRESS_TYPE_NONE_EXT; err = -EINVAL; goto unlock_vm; } if (xe_vma_read_only(vma) && pf->access_type != XE_PAGEFAULT_ACCESS_TYPE_READ) { + pf->address_type = DRM_XE_FAULT_ADDRESS_TYPE_WRITE_INVALID_EXT; err = -EPERM; goto unlock_vm; } @@ -284,6 +286,7 @@ static bool get_pagefault(struct pf_queue *pf_queue, struct xe_pagefault *pf) pf->asid = FIELD_GET(PFD_ASID, desc->dw1); pf->vfid = FIELD_GET(PFD_VFID, desc->dw2); pf->access_type = FIELD_GET(PFD_ACCESS_TYPE, desc->dw2); + pf->address_type = 0; pf->fault_type = FIELD_GET(PFD_FAULT_TYPE, desc->dw2); pf->page_addr = (u64)(FIELD_GET(PFD_VIRTUAL_ADDR_HI, desc->dw3)) << PFD_VIRTUAL_ADDR_HI_SHIFT; diff --git a/drivers/gpu/drm/xe/xe_gt_pagefault.h b/drivers/gpu/drm/xe/xe_gt_pagefault.h index 33616043d17a..969f7b458d3f 100644 --- a/drivers/gpu/drm/xe/xe_gt_pagefault.h +++ b/drivers/gpu/drm/xe/xe_gt_pagefault.h @@ -17,6 +17,7 @@ struct xe_pagefault { u16 pdata; u8 vfid; u8 access_type; + u8 address_type; u8 fault_type; u8 fault_level; u8 engine_class; From patchwork Fri Mar 7 22:41:24 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Cavitt, Jonathan" X-Patchwork-Id: 14007266 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E09B0C282DE for ; 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X-CSE-ConnectionGUID: gAcow1yuQlCq3Lppol/rJQ== X-CSE-MsgGUID: MSR4Iv6dR4edEyglvyZxjQ== X-IronPort-AV: E=McAfee;i="6700,10204,11366"; a="41704522" X-IronPort-AV: E=Sophos;i="6.14,230,1736841600"; d="scan'208";a="41704522" Received: from orviesa004.jf.intel.com ([10.64.159.144]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Mar 2025 14:41:27 -0800 X-CSE-ConnectionGUID: f4seJWASSNCMFhmqeOa0kA== X-CSE-MsgGUID: r6pe+WKCRBKhIdHGcuCWqA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.14,230,1736841600"; d="scan'208";a="124457962" Received: from dut4440lnl.fm.intel.com ([10.105.10.114]) by orviesa004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Mar 2025 14:41:27 -0800 From: Jonathan Cavitt To: intel-xe@lists.freedesktop.org Cc: saurabhg.gupta@intel.com, alex.zuo@intel.com, jonathan.cavitt@intel.com, joonas.lahtinen@linux.intel.com, matthew.brost@intel.com, jianxun.zhang@intel.com, shuicheng.lin@intel.com, dri-devel@lists.freedesktop.org Subject: [PATCH v6 6/6] drm/xe/xe_vm: Implement xe_vm_get_faults_ioctl Date: Fri, 7 Mar 2025 22:41:24 +0000 Message-ID: <20250307224125.111430-7-jonathan.cavitt@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250307224125.111430-1-jonathan.cavitt@intel.com> References: <20250307224125.111430-1-jonathan.cavitt@intel.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Add support for userspace to request a list of observed failed pagefaults from a specified VM. v2: - Only allow querying of failed pagefaults (Matt Brost) v3: - Remove unnecessary size parameter from helper function, as it is a property of the arguments. (jcavitt) - Remove unnecessary copy_from_user (Jainxun) - Set address_precision to 1 (Jainxun) - Report max size instead of dynamic size for memory allocation purposes. Total memory usage is reported separately. v4: - Return int from xe_vm_get_property_size (Shuicheng) - Fix memory leak (Shuicheng) - Remove unnecessary size variable (jcavitt) v5: - Rename ioctl to xe_vm_get_faults_ioctl (jcavitt) Signed-off-by: Jonathan Cavitt Suggested-by: Matthew Brost CC: Jainxun Zhang CC: Shuicheng Lin --- drivers/gpu/drm/xe/xe_device.c | 3 ++ drivers/gpu/drm/xe/xe_vm.c | 78 ++++++++++++++++++++++++++++++++++ drivers/gpu/drm/xe/xe_vm.h | 2 + 3 files changed, 83 insertions(+) diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c index 5d79b439dd62..2d22b3c2df09 100644 --- a/drivers/gpu/drm/xe/xe_device.c +++ b/drivers/gpu/drm/xe/xe_device.c @@ -194,6 +194,9 @@ static const struct drm_ioctl_desc xe_ioctls[] = { DRM_IOCTL_DEF_DRV(XE_WAIT_USER_FENCE, xe_wait_user_fence_ioctl, DRM_RENDER_ALLOW), DRM_IOCTL_DEF_DRV(XE_OBSERVATION, xe_observation_ioctl, DRM_RENDER_ALLOW), + DRM_IOCTL_DEF_DRV(XE_VM_GET_FAULTS, xe_vm_get_faults_ioctl, + DRM_RENDER_ALLOW), + }; static long xe_drm_ioctl(struct file *file, unsigned int cmd, unsigned long arg) diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c index eada3ecc2364..e24601707f2a 100644 --- a/drivers/gpu/drm/xe/xe_vm.c +++ b/drivers/gpu/drm/xe/xe_vm.c @@ -3538,6 +3538,84 @@ int xe_vm_bind_ioctl(struct drm_device *dev, void *data, struct drm_file *file) return err; } +static int xe_vm_get_faults_size(struct xe_vm *vm) +{ + int size; + + spin_lock(&vm->pfs.lock); + size = vm->pfs.len * sizeof(struct xe_vm_fault); + spin_unlock(&vm->pfs.lock); + + return size; +} + +static int fill_faults(struct xe_vm *vm, + struct drm_xe_vm_get_faults *args) +{ + struct xe_vm_fault __user *usr_ptr = u64_to_user_ptr(args->faults); + struct xe_vm_pf_entry *entry; + int ret = 0, i = 0; + + spin_lock(&vm->pfs.lock); + list_for_each_entry(entry, &vm->pfs.list, list) { + struct xe_pagefault *pf = entry->pf; + + ret = put_user(pf->page_addr, &usr_ptr->address); + if (ret) + break; + + ret = put_user(pf->address_type, &usr_ptr->address_type); + if (ret) + break; + + ret = put_user(1, &usr_ptr->address_precision); + if (ret) + break; + + usr_ptr++; + + if (i == args->fault_count) + break; + } + spin_unlock(&vm->pfs.lock); + + return ret ? -EFAULT : 0; +} + +int xe_vm_get_faults_ioctl(struct drm_device *drm, void *data, + struct drm_file *file) +{ + struct xe_device *xe = to_xe_device(drm); + struct xe_file *xef = to_xe_file(file); + struct drm_xe_vm_get_faults *args = data; + struct xe_vm *vm; + int size, fault_count; + + if (XE_IOCTL_DBG(xe, args->reserved[0] || args->reserved[1])) + return -EINVAL; + + vm = xe_vm_lookup(xef, args->vm_id); + if (XE_IOCTL_DBG(xe, !vm)) + return -ENOENT; + + size = xe_vm_get_faults_size(vm); + fault_count = size / sizeof(struct xe_vm_fault); + + if (size < 0) { + return size; + } else if (!args->size && !args->fault_count) { + args->size = size; + args->fault_count = fault_count; + return 0; + } else if (args->size > size || args->fault_count > fault_count) { + return -EINVAL; + } else if (args->size / sizeof(struct xe_vm_fault) != args->fault_count) { + return -EINVAL; + } + + return fill_faults(vm, args); +} + /** * xe_vm_bind_kernel_bo - bind a kernel BO to a VM * @vm: VM to bind the BO to diff --git a/drivers/gpu/drm/xe/xe_vm.h b/drivers/gpu/drm/xe/xe_vm.h index fe068e4448a6..c48bd6e6fe34 100644 --- a/drivers/gpu/drm/xe/xe_vm.h +++ b/drivers/gpu/drm/xe/xe_vm.h @@ -191,6 +191,8 @@ int xe_vm_destroy_ioctl(struct drm_device *dev, void *data, struct drm_file *file); int xe_vm_bind_ioctl(struct drm_device *dev, void *data, struct drm_file *file); +int xe_vm_get_faults_ioctl(struct drm_device *dev, void *data, + struct drm_file *file); void xe_vm_close_and_put(struct xe_vm *vm);