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[83.11.221.132]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ac25d376342sm213104766b.106.2025.03.07.23.50.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 07 Mar 2025 23:50:44 -0800 (PST) From: Artur Weber Date: Sat, 08 Mar 2025 08:50:39 +0100 Subject: [PATCH v3 1/9] clk: bcm: kona: Move CLOCK_COUNT defines into the driver Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250308-kona-bus-clock-v3-1-d6fb5bfc3b67@gmail.com> References: <20250308-kona-bus-clock-v3-0-d6fb5bfc3b67@gmail.com> In-Reply-To: <20250308-kona-bus-clock-v3-0-d6fb5bfc3b67@gmail.com> To: Michael Turquette , Stephen Boyd , Florian Fainelli , Ray Jui , Scott Branden , Broadcom internal kernel review list , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Alex Elder , Stanislav Jakubek , linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, Artur Weber X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1741420241; l=3541; i=aweber.kernel@gmail.com; s=20231030; h=from:subject:message-id; bh=8JHmyZ7xLSoRXw3dONXnXLQVoPD98R1ElG49T2mRM6E=; b=pVKFj//KQZzmknNbHNnxr+nmeB4my1RioX6bh3mVlBnOTAcOVN9Kt8Wlwj+9SYsJdISnsFjk8 uZE7MpkFZtSBO2FWyT3f1eLUhqNrndqpUKO+uGt2Jzr3lLRF9TMsaaw X-Developer-Key: i=aweber.kernel@gmail.com; a=ed25519; pk=RhDBfWbJEHqDibXbhNEBAnc9FMkyznGxX/hwfhL8bv8= CLOCK_COUNT defines for each CCU are stored in the DT binding header. This is not correct - they are not used by device trees, only internally by the driver. Move the CLOCK_COUNT defines directly into the driver in preparation for dropping them from the DT binding include. Signed-off-by: Artur Weber --- drivers/clk/bcm/clk-bcm21664.c | 8 ++++++++ drivers/clk/bcm/clk-bcm281xx.c | 10 ++++++++++ 2 files changed, 18 insertions(+) diff --git a/drivers/clk/bcm/clk-bcm21664.c b/drivers/clk/bcm/clk-bcm21664.c index 520c3aeb4ea9c4a431512c0909f9545c1761d17a..fa6e1649d6f5f459b63026109caea9e2f72e22dd 100644 --- a/drivers/clk/bcm/clk-bcm21664.c +++ b/drivers/clk/bcm/clk-bcm21664.c @@ -17,6 +17,8 @@ static struct peri_clk_data frac_1m_data = { .clocks = CLOCKS("ref_crystal"), }; +#define BCM21664_ROOT_CCU_CLOCK_COUNT (BCM21664_ROOT_CCU_FRAC_1M + 1) + static struct ccu_data root_ccu_data = { BCM21664_CCU_COMMON(root, ROOT), /* no policy control */ @@ -39,6 +41,8 @@ static struct peri_clk_data hub_timer_data = { .trig = TRIGGER(0x0a40, 4), }; +#define BCM21664_AON_CCU_CLOCK_COUNT (BCM21664_AON_CCU_HUB_TIMER + 1) + static struct ccu_data aon_ccu_data = { BCM21664_CCU_COMMON(aon, AON), .policy = { @@ -122,6 +126,8 @@ static struct peri_clk_data sdio4_sleep_data = { .gate = HW_SW_GATE(0x0360, 18, 2, 3), }; +#define BCM21664_MASTER_CCU_CLOCK_COUNT (BCM21664_MASTER_CCU_SDIO4_SLEEP + 1) + static struct ccu_data master_ccu_data = { BCM21664_CCU_COMMON(master, MASTER), .policy = { @@ -225,6 +231,8 @@ static struct peri_clk_data bsc4_data = { .trig = TRIGGER(0x0afc, 19), }; +#define BCM21664_SLAVE_CCU_CLOCK_COUNT (BCM21664_SLAVE_CCU_BSC4 + 1) + static struct ccu_data slave_ccu_data = { BCM21664_CCU_COMMON(slave, SLAVE), .policy = { diff --git a/drivers/clk/bcm/clk-bcm281xx.c b/drivers/clk/bcm/clk-bcm281xx.c index 823d5dfa31b84f502fcd6ada1eff6d8f4673b3dd..7589ad9db99767485d73e91ed8db4d2842cd6e32 100644 --- a/drivers/clk/bcm/clk-bcm281xx.c +++ b/drivers/clk/bcm/clk-bcm281xx.c @@ -19,6 +19,8 @@ static struct peri_clk_data frac_1m_data = { .clocks = CLOCKS("ref_crystal"), }; +#define BCM281XX_ROOT_CCU_CLOCK_COUNT (BCM281XX_ROOT_CCU_FRAC_1M + 1) + static struct ccu_data root_ccu_data = { BCM281XX_CCU_COMMON(root, ROOT), .kona_clks = { @@ -57,6 +59,8 @@ static struct peri_clk_data pmu_bsc_var_data = { .trig = TRIGGER(0x0a40, 2), }; +#define BCM281XX_AON_CCU_CLOCK_COUNT (BCM281XX_AON_CCU_PMU_BSC_VAR + 1) + static struct ccu_data aon_ccu_data = { BCM281XX_CCU_COMMON(aon, AON), .kona_clks = { @@ -80,6 +84,8 @@ static struct peri_clk_data tmon_1m_data = { .trig = TRIGGER(0x0e84, 1), }; +#define BCM281XX_HUB_CCU_CLOCK_COUNT (BCM281XX_HUB_CCU_TMON_1M + 1) + static struct ccu_data hub_ccu_data = { BCM281XX_CCU_COMMON(hub, HUB), .kona_clks = { @@ -172,6 +178,8 @@ static struct peri_clk_data hsic2_12m_data = { .trig = TRIGGER(0x0afc, 5), }; +#define BCM281XX_MASTER_CCU_CLOCK_COUNT (BCM281XX_MASTER_CCU_HSIC2_12M + 1) + static struct ccu_data master_ccu_data = { BCM281XX_CCU_COMMON(master, MASTER), .kona_clks = { @@ -301,6 +309,8 @@ static struct peri_clk_data pwm_data = { .trig = TRIGGER(0x0afc, 15), }; +#define BCM281XX_SLAVE_CCU_CLOCK_COUNT (BCM281XX_SLAVE_CCU_PWM + 1) + static struct ccu_data slave_ccu_data = { BCM281XX_CCU_COMMON(slave, SLAVE), .kona_clks = { From patchwork Sat Mar 8 07:50:40 2025 Content-Type: text/plain; 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[83.11.221.132]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ac25d376342sm213104766b.106.2025.03.07.23.50.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 07 Mar 2025 23:50:45 -0800 (PST) From: Artur Weber Date: Sat, 08 Mar 2025 08:50:40 +0100 Subject: [PATCH v3 2/9] dt-bindings: clock: brcm,kona-ccu: Drop CLOCK_COUNT defines from DT headers Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250308-kona-bus-clock-v3-2-d6fb5bfc3b67@gmail.com> References: <20250308-kona-bus-clock-v3-0-d6fb5bfc3b67@gmail.com> In-Reply-To: <20250308-kona-bus-clock-v3-0-d6fb5bfc3b67@gmail.com> To: Michael Turquette , Stephen Boyd , Florian Fainelli , Ray Jui , Scott Branden , Broadcom internal kernel review list , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Alex Elder , Stanislav Jakubek , linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, Artur Weber X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1741420241; l=2707; i=aweber.kernel@gmail.com; s=20231030; h=from:subject:message-id; bh=fgvu2deeJuwI81T2zFOPfO7hmnLXlSGvvGOOEjq7FpE=; b=Pbpkyv6c9EaCevjAbNNRgmb3bdp6jG9/QUDVquOqr4RuBXzx0HFHY5NuhIg5rlrY9h0RZW8f3 LEXZkd0ZRRKAgzM6ndKV5QfKmESi4IgN0xFPw3C1GIkwMn7Jy0RCLKj X-Developer-Key: i=aweber.kernel@gmail.com; a=ed25519; pk=RhDBfWbJEHqDibXbhNEBAnc9FMkyznGxX/hwfhL8bv8= The CLOCK_COUNT defines are not used by device trees, only by the clock driver. Keeping them in the DT binding header is frowned upon. Since they're being moved to the clock driver directly, drop these defines from the dt-bindings header and only keep clock IDs. Signed-off-by: Artur Weber Reviewed-by: Krzysztof Kozlowski --- Changes in v3: - Add this commit --- include/dt-bindings/clock/bcm21664.h | 4 ---- include/dt-bindings/clock/bcm281xx.h | 5 ----- 2 files changed, 9 deletions(-) diff --git a/include/dt-bindings/clock/bcm21664.h b/include/dt-bindings/clock/bcm21664.h index 7c7492742f3d4ca439236f2f352e432989409570..7a380a51848ce100cbf94f9da2b997dbe3a65230 100644 --- a/include/dt-bindings/clock/bcm21664.h +++ b/include/dt-bindings/clock/bcm21664.h @@ -21,12 +21,10 @@ /* root CCU clock ids */ #define BCM21664_ROOT_CCU_FRAC_1M 0 -#define BCM21664_ROOT_CCU_CLOCK_COUNT 1 /* aon CCU clock ids */ #define BCM21664_AON_CCU_HUB_TIMER 0 -#define BCM21664_AON_CCU_CLOCK_COUNT 1 /* master CCU clock ids */ @@ -38,7 +36,6 @@ #define BCM21664_MASTER_CCU_SDIO2_SLEEP 5 #define BCM21664_MASTER_CCU_SDIO3_SLEEP 6 #define BCM21664_MASTER_CCU_SDIO4_SLEEP 7 -#define BCM21664_MASTER_CCU_CLOCK_COUNT 8 /* slave CCU clock ids */ @@ -49,6 +46,5 @@ #define BCM21664_SLAVE_CCU_BSC2 4 #define BCM21664_SLAVE_CCU_BSC3 5 #define BCM21664_SLAVE_CCU_BSC4 6 -#define BCM21664_SLAVE_CCU_CLOCK_COUNT 7 #endif /* _CLOCK_BCM21664_H */ diff --git a/include/dt-bindings/clock/bcm281xx.h b/include/dt-bindings/clock/bcm281xx.h index d74ca42112e79746c513f6861a89628ee03f0f79..0c7a7e10cb425ddb597392939cb218545a48bf22 100644 --- a/include/dt-bindings/clock/bcm281xx.h +++ b/include/dt-bindings/clock/bcm281xx.h @@ -27,19 +27,16 @@ /* root CCU clock ids */ #define BCM281XX_ROOT_CCU_FRAC_1M 0 -#define BCM281XX_ROOT_CCU_CLOCK_COUNT 1 /* aon CCU clock ids */ #define BCM281XX_AON_CCU_HUB_TIMER 0 #define BCM281XX_AON_CCU_PMU_BSC 1 #define BCM281XX_AON_CCU_PMU_BSC_VAR 2 -#define BCM281XX_AON_CCU_CLOCK_COUNT 3 /* hub CCU clock ids */ #define BCM281XX_HUB_CCU_TMON_1M 0 -#define BCM281XX_HUB_CCU_CLOCK_COUNT 1 /* master CCU clock ids */ @@ -50,7 +47,6 @@ #define BCM281XX_MASTER_CCU_USB_IC 4 #define BCM281XX_MASTER_CCU_HSIC2_48M 5 #define BCM281XX_MASTER_CCU_HSIC2_12M 6 -#define BCM281XX_MASTER_CCU_CLOCK_COUNT 7 /* slave CCU clock ids */ @@ -64,6 +60,5 @@ #define BCM281XX_SLAVE_CCU_BSC2 7 #define BCM281XX_SLAVE_CCU_BSC3 8 #define BCM281XX_SLAVE_CCU_PWM 9 -#define BCM281XX_SLAVE_CCU_CLOCK_COUNT 10 #endif /* _CLOCK_BCM281XX_H */ From patchwork Sat Mar 8 07:50:41 2025 Content-Type: text/plain; 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[83.11.221.132]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ac25d376342sm213104766b.106.2025.03.07.23.50.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 07 Mar 2025 23:50:47 -0800 (PST) From: Artur Weber Date: Sat, 08 Mar 2025 08:50:41 +0100 Subject: [PATCH v3 3/9] dt-bindings: clock: brcm,kona-ccu: Add BCM21664 bus clocks Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250308-kona-bus-clock-v3-3-d6fb5bfc3b67@gmail.com> References: <20250308-kona-bus-clock-v3-0-d6fb5bfc3b67@gmail.com> In-Reply-To: <20250308-kona-bus-clock-v3-0-d6fb5bfc3b67@gmail.com> To: Michael Turquette , Stephen Boyd , Florian Fainelli , Ray Jui , Scott Branden , Broadcom internal kernel review list , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Alex Elder , Stanislav Jakubek , linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, Artur Weber X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1741420241; l=3512; i=aweber.kernel@gmail.com; s=20231030; h=from:subject:message-id; bh=VRfyIRPUUTsK/JAOBRpc1FmYS+oVb+MBp+/5a37K6K0=; b=3C3jv/6eSHk5YvQ4IPzz+mCLSShMvNbohIkBGEz2UPxRCYLMUKASi43PiVYk4fwF+9zEoegqK TAlZOogWN88DcigZUelfQFC4emAhZLRiZDOjvdkOiYIy0JUVP5FSZiO X-Developer-Key: i=aweber.kernel@gmail.com; a=ed25519; pk=RhDBfWbJEHqDibXbhNEBAnc9FMkyznGxX/hwfhL8bv8= Add bus clocks for hub_timer, sdio, bsc, uart and usb_otg_ahb to the allowed clock output names for BCM21664 CCUs and add the relevant clock IDs to the clock/bcm21664.h dt-bindings header. Signed-off-by: Artur Weber Reviewed-by: Krzysztof Kozlowski --- Changes in v3: - Fix UARTBx_APB clocks being out of order in DT binding header - Drop CLOCK_COUNT defines from DT binding header Changes in v2: - Move clock ID dt-bindings header changes into this commit --- .../devicetree/bindings/clock/brcm,kona-ccu.yaml | 18 ++++++++++++++++-- include/dt-bindings/clock/bcm21664.h | 13 +++++++++++++ 2 files changed, 29 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/brcm,kona-ccu.yaml b/Documentation/devicetree/bindings/clock/brcm,kona-ccu.yaml index e5656950b3bd0ad44ba47f0ada84b558e71df590..dff04e24e92829b890bf7cd336f0e083bdb30fa6 100644 --- a/Documentation/devicetree/bindings/clock/brcm,kona-ccu.yaml +++ b/Documentation/devicetree/bindings/clock/brcm,kona-ccu.yaml @@ -40,7 +40,7 @@ properties: clock-output-names: minItems: 1 - maxItems: 10 + maxItems: 14 required: - compatible @@ -124,7 +124,9 @@ allOf: then: properties: clock-output-names: - const: hub_timer + items: + - const: hub_timer + - const: hub_timer_apb - if: properties: compatible: @@ -142,6 +144,11 @@ allOf: - const: sdio2_sleep - const: sdio3_sleep - const: sdio4_sleep + - const: sdio1_ahb + - const: sdio2_ahb + - const: sdio3_ahb + - const: sdio4_ahb + - const: usb_otg_ahb - if: properties: compatible: @@ -158,6 +165,13 @@ allOf: - const: bsc2 - const: bsc3 - const: bsc4 + - const: uartb_apb + - const: uartb2_apb + - const: uartb3_apb + - const: bsc1_apb + - const: bsc2_apb + - const: bsc3_apb + - const: bsc4_apb additionalProperties: false diff --git a/include/dt-bindings/clock/bcm21664.h b/include/dt-bindings/clock/bcm21664.h index 7a380a51848ce100cbf94f9da2b997dbe3a65230..9f3614eb9036b5ce36b610fd7437338655a9cf97 100644 --- a/include/dt-bindings/clock/bcm21664.h +++ b/include/dt-bindings/clock/bcm21664.h @@ -25,6 +25,7 @@ /* aon CCU clock ids */ #define BCM21664_AON_CCU_HUB_TIMER 0 +#define BCM21664_AON_CCU_HUB_TIMER_APB 1 /* master CCU clock ids */ @@ -36,6 +37,11 @@ #define BCM21664_MASTER_CCU_SDIO2_SLEEP 5 #define BCM21664_MASTER_CCU_SDIO3_SLEEP 6 #define BCM21664_MASTER_CCU_SDIO4_SLEEP 7 +#define BCM21664_MASTER_CCU_SDIO1_AHB 8 +#define BCM21664_MASTER_CCU_SDIO2_AHB 9 +#define BCM21664_MASTER_CCU_SDIO3_AHB 10 +#define BCM21664_MASTER_CCU_SDIO4_AHB 11 +#define BCM21664_MASTER_CCU_USB_OTG_AHB 12 /* slave CCU clock ids */ @@ -46,5 +52,12 @@ #define BCM21664_SLAVE_CCU_BSC2 4 #define BCM21664_SLAVE_CCU_BSC3 5 #define BCM21664_SLAVE_CCU_BSC4 6 +#define BCM21664_SLAVE_CCU_UARTB_APB 7 +#define BCM21664_SLAVE_CCU_UARTB2_APB 8 +#define BCM21664_SLAVE_CCU_UARTB3_APB 9 +#define BCM21664_SLAVE_CCU_BSC1_APB 10 +#define BCM21664_SLAVE_CCU_BSC2_APB 11 +#define BCM21664_SLAVE_CCU_BSC3_APB 12 +#define BCM21664_SLAVE_CCU_BSC4_APB 13 #endif /* _CLOCK_BCM21664_H */ From patchwork Sat Mar 8 07:50:42 2025 Content-Type: text/plain; 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[83.11.221.132]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ac25d376342sm213104766b.106.2025.03.07.23.50.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 07 Mar 2025 23:50:49 -0800 (PST) From: Artur Weber Date: Sat, 08 Mar 2025 08:50:42 +0100 Subject: [PATCH v3 4/9] dt-bindings: clock: brcm,kona-ccu: Add BCM281xx bus clocks Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250308-kona-bus-clock-v3-4-d6fb5bfc3b67@gmail.com> References: <20250308-kona-bus-clock-v3-0-d6fb5bfc3b67@gmail.com> In-Reply-To: <20250308-kona-bus-clock-v3-0-d6fb5bfc3b67@gmail.com> To: Michael Turquette , Stephen Boyd , Florian Fainelli , Ray Jui , Scott Branden , Broadcom internal kernel review list , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Alex Elder , Stanislav Jakubek , linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, Artur Weber X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1741420241; l=4555; i=aweber.kernel@gmail.com; s=20231030; h=from:subject:message-id; bh=KwnPacKC6sWDvjHgOSmanHuUb/zLQ7+jh/3FbyRmuek=; b=pdaBNr+Psc2iIbdwdhvwFirksVMOyVKYYmX+sWBBJBotxVmZOMY11gXf9223kP0v3QGeVSzU6 JnsoQkwNfo2BUWTAZvCtQghejW5JDX0Uo9aEKbDE9yaQKzLGFeIwvnc X-Developer-Key: i=aweber.kernel@gmail.com; a=ed25519; pk=RhDBfWbJEHqDibXbhNEBAnc9FMkyznGxX/hwfhL8bv8= Add bus clocks corresponding to peripheral clocks currently supported by the BCM281xx clock driver and add the relevant clock IDs to the clock/bcm281xx.h dt-bindings header. Signed-off-by: Artur Weber --- Changes in v3: - Add more clock output names to example - Drop CLOCK_COUNT defines from the DT binding header Changes in v2: - Add this commit (BCM281xx bus clocks) --- .../devicetree/bindings/clock/brcm,kona-ccu.yaml | 33 ++++++++++++++++++++-- include/dt-bindings/clock/bcm281xx.h | 19 +++++++++++++ 2 files changed, 50 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/brcm,kona-ccu.yaml b/Documentation/devicetree/bindings/clock/brcm,kona-ccu.yaml index dff04e24e92829b890bf7cd336f0e083bdb30fa6..d00dcf916b45904177614c6f19a5df02abdf42f7 100644 --- a/Documentation/devicetree/bindings/clock/brcm,kona-ccu.yaml +++ b/Documentation/devicetree/bindings/clock/brcm,kona-ccu.yaml @@ -40,7 +40,7 @@ properties: clock-output-names: minItems: 1 - maxItems: 14 + maxItems: 20 required: - compatible @@ -61,6 +61,8 @@ allOf: - const: hub_timer - const: pmu_bsc - const: pmu_bsc_var + - const: hub_timer_apb + - const: pmu_bsc_apb - if: properties: compatible: @@ -86,6 +88,13 @@ allOf: - const: usb_ic - const: hsic2_48m - const: hsic2_12m + - const: sdio1_ahb + - const: sdio2_ahb + - const: sdio3_ahb + - const: sdio4_ahb + - const: usb_ic_ahb + - const: hsic2_ahb + - const: usb_otg_ahb - if: properties: compatible: @@ -116,6 +125,16 @@ allOf: - const: bsc2 - const: bsc3 - const: pwm + - const: uartb_apb + - const: uartb2_apb + - const: uartb3_apb + - const: uartb4_apb + - const: ssp0_apb + - const: ssp2_apb + - const: bsc1_apb + - const: bsc2_apb + - const: bsc3_apb + - const: pwm_apb - if: properties: compatible: @@ -190,6 +209,16 @@ examples: "bsc1", "bsc2", "bsc3", - "pwm"; + "pwm", + "uartb_apb", + "uartb2_apb", + "uartb3_apb", + "uartb4_apb", + "ssp0_apb", + "ssp2_apb", + "bsc1_apb", + "bsc2_apb", + "bsc3_apb", + "pwm_apb"; }; ... diff --git a/include/dt-bindings/clock/bcm281xx.h b/include/dt-bindings/clock/bcm281xx.h index 0c7a7e10cb425ddb597392939cb218545a48bf22..8e3ac4ab3e16fb33a82259ccb82287fdfbb749bc 100644 --- a/include/dt-bindings/clock/bcm281xx.h +++ b/include/dt-bindings/clock/bcm281xx.h @@ -33,6 +33,8 @@ #define BCM281XX_AON_CCU_HUB_TIMER 0 #define BCM281XX_AON_CCU_PMU_BSC 1 #define BCM281XX_AON_CCU_PMU_BSC_VAR 2 +#define BCM281XX_AON_CCU_HUB_TIMER_APB 3 +#define BCM281XX_AON_CCU_PMU_BSC_APB 4 /* hub CCU clock ids */ @@ -47,6 +49,13 @@ #define BCM281XX_MASTER_CCU_USB_IC 4 #define BCM281XX_MASTER_CCU_HSIC2_48M 5 #define BCM281XX_MASTER_CCU_HSIC2_12M 6 +#define BCM281XX_MASTER_CCU_SDIO1_AHB 7 +#define BCM281XX_MASTER_CCU_SDIO2_AHB 8 +#define BCM281XX_MASTER_CCU_SDIO3_AHB 9 +#define BCM281XX_MASTER_CCU_SDIO4_AHB 10 +#define BCM281XX_MASTER_CCU_USB_IC_AHB 11 +#define BCM281XX_MASTER_CCU_HSIC2_AHB 12 +#define BCM281XX_MASTER_CCU_USB_OTG_AHB 13 /* slave CCU clock ids */ @@ -60,5 +69,15 @@ #define BCM281XX_SLAVE_CCU_BSC2 7 #define BCM281XX_SLAVE_CCU_BSC3 8 #define BCM281XX_SLAVE_CCU_PWM 9 +#define BCM281XX_SLAVE_CCU_UARTB_APB 10 +#define BCM281XX_SLAVE_CCU_UARTB2_APB 11 +#define BCM281XX_SLAVE_CCU_UARTB3_APB 12 +#define BCM281XX_SLAVE_CCU_UARTB4_APB 13 +#define BCM281XX_SLAVE_CCU_SSP0_APB 14 +#define BCM281XX_SLAVE_CCU_SSP2_APB 15 +#define BCM281XX_SLAVE_CCU_BSC1_APB 16 +#define BCM281XX_SLAVE_CCU_BSC2_APB 17 +#define BCM281XX_SLAVE_CCU_BSC3_APB 18 +#define BCM281XX_SLAVE_CCU_PWM_APB 19 #endif /* _CLOCK_BCM281XX_H */ From patchwork Sat Mar 8 07:50:43 2025 Content-Type: text/plain; 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[83.11.221.132]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ac25d376342sm213104766b.106.2025.03.07.23.50.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 07 Mar 2025 23:50:51 -0800 (PST) From: Artur Weber Date: Sat, 08 Mar 2025 08:50:43 +0100 Subject: [PATCH v3 5/9] clk: bcm: kona: Add support for bus clocks Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250308-kona-bus-clock-v3-5-d6fb5bfc3b67@gmail.com> References: <20250308-kona-bus-clock-v3-0-d6fb5bfc3b67@gmail.com> In-Reply-To: <20250308-kona-bus-clock-v3-0-d6fb5bfc3b67@gmail.com> To: Michael Turquette , Stephen Boyd , Florian Fainelli , Ray Jui , Scott Branden , Broadcom internal kernel review list , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Alex Elder , Stanislav Jakubek , linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, Artur Weber , Alex Elder X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1741420241; l=8577; i=aweber.kernel@gmail.com; s=20231030; h=from:subject:message-id; bh=MTjjumplLIdg/n+qAO5fFv6tHfrmUwLPV/PXYF40D9Q=; b=pVBzx+27YetSXkafyCJC8wOYIBDGjJqoIodlDyaKCW+2kfABwwrz/Np1Y6xnb7ZE5QPqdKtAE cTVY0VLPo2pD+dSpazb4t/Mn/HQ978d6M+KbzDyOM3vLL+VpH7ChyhN X-Developer-Key: i=aweber.kernel@gmail.com; a=ed25519; pk=RhDBfWbJEHqDibXbhNEBAnc9FMkyznGxX/hwfhL8bv8= Introduce support for bus clocks into the Broadcom Kona common clock driver. Most of these functions have been adapted from their peripheral clock counterparts, as they are nearly identical (bus clocks are just much more limited in terms of allowed operations). Reviewed-by: Alex Elder Signed-off-by: Artur Weber --- drivers/clk/bcm/clk-kona-setup.c | 116 +++++++++++++++++++++++++++++++++++++++ drivers/clk/bcm/clk-kona.c | 62 ++++++++++++++++++++- drivers/clk/bcm/clk-kona.h | 10 ++++ 3 files changed, 187 insertions(+), 1 deletion(-) diff --git a/drivers/clk/bcm/clk-kona-setup.c b/drivers/clk/bcm/clk-kona-setup.c index 338558f6fbaec27418497fc246de17e15236ca0d..8b6123e188fbc035cda2cf394035d35197671d06 100644 --- a/drivers/clk/bcm/clk-kona-setup.c +++ b/drivers/clk/bcm/clk-kona-setup.c @@ -167,6 +167,58 @@ static bool peri_clk_data_offsets_valid(struct kona_clk *bcm_clk) return true; } +static bool bus_clk_data_offsets_valid(struct kona_clk *bcm_clk) +{ + struct bus_clk_data *bus; + struct bcm_clk_policy *policy; + struct bcm_clk_gate *gate; + struct bcm_clk_hyst *hyst; + const char *name; + u32 range; + u32 limit; + + BUG_ON(bcm_clk->type != bcm_clk_bus); + bus = bcm_clk->u.bus; + name = bcm_clk->init_data.name; + range = bcm_clk->ccu->range; + + limit = range - sizeof(u32); + limit = round_down(limit, sizeof(u32)); + + policy = &bus->policy; + if (policy_exists(policy)) { + if (policy->offset > limit) { + pr_err("%s: bad policy offset for %s (%u > %u)\n", + __func__, name, policy->offset, limit); + return false; + } + } + + gate = &bus->gate; + hyst = &bus->hyst; + if (gate_exists(gate)) { + if (gate->offset > limit) { + pr_err("%s: bad gate offset for %s (%u > %u)\n", + __func__, name, gate->offset, limit); + return false; + } + + if (hyst_exists(hyst)) { + if (hyst->offset > limit) { + pr_err("%s: bad hysteresis offset for %s " + "(%u > %u)\n", __func__, + name, hyst->offset, limit); + return false; + } + } + } else if (hyst_exists(hyst)) { + pr_err("%s: hysteresis but no gate for %s\n", __func__, name); + return false; + } + + return true; +} + /* A bit position must be less than the number of bits in a 32-bit register. */ static bool bit_posn_valid(u32 bit_posn, const char *field_name, const char *clock_name) @@ -481,9 +533,46 @@ peri_clk_data_valid(struct kona_clk *bcm_clk) return kona_dividers_valid(bcm_clk); } +/* Determine whether the set of bus clock registers are valid. */ +static bool +bus_clk_data_valid(struct kona_clk *bcm_clk) +{ + struct bus_clk_data *bus; + struct bcm_clk_policy *policy; + struct bcm_clk_gate *gate; + struct bcm_clk_hyst *hyst; + const char *name; + + BUG_ON(bcm_clk->type != bcm_clk_bus); + + if (!bus_clk_data_offsets_valid(bcm_clk)) + return false; + + bus = bcm_clk->u.bus; + name = bcm_clk->init_data.name; + + policy = &bus->policy; + if (policy_exists(policy) && !policy_valid(policy, name)) + return false; + + gate = &bus->gate; + if (gate_exists(gate) && !gate_valid(gate, "gate", name)) + return false; + + hyst = &bus->hyst; + if (hyst_exists(hyst) && !hyst_valid(hyst, name)) + return false; + + return true; +} + static bool kona_clk_valid(struct kona_clk *bcm_clk) { switch (bcm_clk->type) { + case bcm_clk_bus: + if (!bus_clk_data_valid(bcm_clk)) + return false; + break; case bcm_clk_peri: if (!peri_clk_data_valid(bcm_clk)) return false; @@ -656,6 +745,14 @@ static void peri_clk_teardown(struct peri_clk_data *data, clk_sel_teardown(&data->sel, init_data); } +static void bus_clk_teardown(struct bus_clk_data *data, + struct clk_init_data *init_data) +{ + init_data->num_parents = 0; + kfree(init_data->parent_names); + init_data->parent_names = NULL; +} + /* * Caller is responsible for freeing the parent_names[] and * parent_sel[] arrays in the peripheral clock's "data" structure @@ -670,9 +767,23 @@ peri_clk_setup(struct peri_clk_data *data, struct clk_init_data *init_data) return clk_sel_setup(data->clocks, &data->sel, init_data); } +static int +bus_clk_setup(struct bus_clk_data *data, struct clk_init_data *init_data) +{ + init_data->flags = CLK_IGNORE_UNUSED; + + init_data->parent_names = NULL; + init_data->num_parents = 0; + + return 0; +} + static void bcm_clk_teardown(struct kona_clk *bcm_clk) { switch (bcm_clk->type) { + case bcm_clk_bus: + bus_clk_teardown(bcm_clk->u.data, &bcm_clk->init_data); + break; case bcm_clk_peri: peri_clk_teardown(bcm_clk->u.data, &bcm_clk->init_data); break; @@ -702,6 +813,11 @@ static int kona_clk_setup(struct kona_clk *bcm_clk) struct clk_init_data *init_data = &bcm_clk->init_data; switch (bcm_clk->type) { + case bcm_clk_bus: + ret = bus_clk_setup(bcm_clk->u.data, init_data); + if (ret) + return ret; + break; case bcm_clk_peri: ret = peri_clk_setup(bcm_clk->u.data, init_data); if (ret) diff --git a/drivers/clk/bcm/clk-kona.c b/drivers/clk/bcm/clk-kona.c index ec5749e301ba82933144f34acfaf6f3680c443f7..e92d57f3bbb147e72221802175a80502897d7504 100644 --- a/drivers/clk/bcm/clk-kona.c +++ b/drivers/clk/bcm/clk-kona.c @@ -961,7 +961,7 @@ static int selector_write(struct ccu_data *ccu, struct bcm_clk_gate *gate, return ret; } -/* Clock operations */ +/* Peripheral clock operations */ static int kona_peri_clk_enable(struct clk_hw *hw) { @@ -1233,9 +1233,69 @@ static bool __peri_clk_init(struct kona_clk *bcm_clk) return true; } +/* Bus clock operations */ + +static int kona_bus_clk_enable(struct clk_hw *hw) +{ + struct kona_clk *bcm_clk = to_kona_clk(hw); + struct bcm_clk_gate *gate = &bcm_clk->u.bus->gate; + + return clk_gate(bcm_clk->ccu, bcm_clk->init_data.name, gate, true); +} + +static void kona_bus_clk_disable(struct clk_hw *hw) +{ + struct kona_clk *bcm_clk = to_kona_clk(hw); + struct bcm_clk_gate *gate = &bcm_clk->u.bus->gate; + + (void)clk_gate(bcm_clk->ccu, bcm_clk->init_data.name, gate, false); +} + +static int kona_bus_clk_is_enabled(struct clk_hw *hw) +{ + struct kona_clk *bcm_clk = to_kona_clk(hw); + struct bcm_clk_gate *gate = &bcm_clk->u.bus->gate; + + return is_clk_gate_enabled(bcm_clk->ccu, gate) ? 1 : 0; +} + +struct clk_ops kona_bus_clk_ops = { + .enable = kona_bus_clk_enable, + .disable = kona_bus_clk_disable, + .is_enabled = kona_bus_clk_is_enabled, +}; + +/* Put a bus clock into its initial state */ +static bool __bus_clk_init(struct kona_clk *bcm_clk) +{ + struct ccu_data *ccu = bcm_clk->ccu; + struct bus_clk_data *bus = bcm_clk->u.bus; + const char *name = bcm_clk->init_data.name; + + BUG_ON(bcm_clk->type != bcm_clk_bus); + + if (!policy_init(ccu, &bus->policy)) { + pr_err("%s: error initializing policy for %s\n", + __func__, name); + return false; + } + if (!gate_init(ccu, &bus->gate)) { + pr_err("%s: error initializing gate for %s\n", __func__, name); + return false; + } + if (!hyst_init(ccu, &bus->hyst)) { + pr_err("%s: error initializing hyst for %s\n", __func__, name); + return false; + } + + return true; +} + static bool __kona_clk_init(struct kona_clk *bcm_clk) { switch (bcm_clk->type) { + case bcm_clk_bus: + return __bus_clk_init(bcm_clk); case bcm_clk_peri: return __peri_clk_init(bcm_clk); default: diff --git a/drivers/clk/bcm/clk-kona.h b/drivers/clk/bcm/clk-kona.h index e09655024ac2ad42538b924f304b23e87b7db2ce..a5b3d8bdb54eaee9fad80c28796170207b817dfd 100644 --- a/drivers/clk/bcm/clk-kona.h +++ b/drivers/clk/bcm/clk-kona.h @@ -390,6 +390,14 @@ struct peri_clk_data { struct bcm_clk_sel sel; const char *clocks[]; /* must be last; use CLOCKS() to declare */ }; + +struct bus_clk_data { + struct bcm_clk_policy policy; + struct bcm_clk_gate gate; + struct bcm_clk_hyst hyst; + const char *clocks[]; /* must be last; use CLOCKS() to declare */ +}; + #define CLOCKS(...) { __VA_ARGS__, NULL, } #define NO_CLOCKS { NULL, } /* Must use of no parent clocks */ @@ -401,6 +409,7 @@ struct kona_clk { union { void *data; struct peri_clk_data *peri; + struct bus_clk_data *bus; } u; }; #define to_kona_clk(_hw) \ @@ -488,6 +497,7 @@ struct ccu_data { /* Exported globals */ extern struct clk_ops kona_peri_clk_ops; +extern struct clk_ops kona_bus_clk_ops; /* Externally visible functions */ From patchwork Sat Mar 8 07:50:44 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Artur Weber X-Patchwork-Id: 14007446 Received: from mail-ej1-f45.google.com (mail-ej1-f45.google.com [209.85.218.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 88BCE1AF0C9; Sat, 8 Mar 2025 07:50:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.45 ARC-Seal: i=1; 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[83.11.221.132]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ac25d376342sm213104766b.106.2025.03.07.23.50.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 07 Mar 2025 23:50:52 -0800 (PST) From: Artur Weber Date: Sat, 08 Mar 2025 08:50:44 +0100 Subject: [PATCH v3 6/9] clk: bcm21664: Add matching bus clocks for peripheral clocks Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250308-kona-bus-clock-v3-6-d6fb5bfc3b67@gmail.com> References: <20250308-kona-bus-clock-v3-0-d6fb5bfc3b67@gmail.com> In-Reply-To: <20250308-kona-bus-clock-v3-0-d6fb5bfc3b67@gmail.com> To: Michael Turquette , Stephen Boyd , Florian Fainelli , Ray Jui , Scott Branden , Broadcom internal kernel review list , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Alex Elder , Stanislav Jakubek , linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, Artur Weber X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1741420241; l=4962; i=aweber.kernel@gmail.com; s=20231030; h=from:subject:message-id; bh=oquOoPMtK5XsMhLVUCejF4XDRVd+flbgwR9aw0XPHXc=; b=ZId+ES/3D+3LQyHOLlbBz3j3NcrC26QMWeXN5hJAb6Uil7SJvrN51sFxyVVvQJQvuBAEOe4eO tS9b5+53a9pAq2Ra8I8n/JyvMpiL1tMzp3dwrk3hqoF6ingJB92HRCo X-Developer-Key: i=aweber.kernel@gmail.com; a=ed25519; pk=RhDBfWbJEHqDibXbhNEBAnc9FMkyznGxX/hwfhL8bv8= Now that bus clock support has been implemented into the Broadcom Kona clock driver, add bus clocks corresponding to HUB_TIMER, SDIO, UART and BSC, as well as the USB OTG bus clock. Signed-off-by: Artur Weber --- Changes in v3: - Adapt to CLOCK_COUNT defines being moved Changes in v2: - Adapt to dropped prereq clocks --- drivers/clk/bcm/clk-bcm21664.c | 89 ++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 86 insertions(+), 3 deletions(-) diff --git a/drivers/clk/bcm/clk-bcm21664.c b/drivers/clk/bcm/clk-bcm21664.c index fa6e1649d6f5f459b63026109caea9e2f72e22dd..53fd46d97b6514ebe228a874c63cd2cccb8a0f55 100644 --- a/drivers/clk/bcm/clk-bcm21664.c +++ b/drivers/clk/bcm/clk-bcm21664.c @@ -41,7 +41,12 @@ static struct peri_clk_data hub_timer_data = { .trig = TRIGGER(0x0a40, 4), }; -#define BCM21664_AON_CCU_CLOCK_COUNT (BCM21664_AON_CCU_HUB_TIMER + 1) +static struct bus_clk_data hub_timer_apb_data = { + .gate = HW_SW_GATE(0x0414, 18, 3, 2), + .hyst = HYST(0x0414, 10, 11), +}; + +#define BCM21664_AON_CCU_CLOCK_COUNT (BCM21664_AON_CCU_HUB_TIMER_APB + 1) static struct ccu_data aon_ccu_data = { BCM21664_CCU_COMMON(aon, AON), @@ -52,6 +57,8 @@ static struct ccu_data aon_ccu_data = { .kona_clks = { [BCM21664_AON_CCU_HUB_TIMER] = KONA_CLK(aon, hub_timer, peri), + [BCM21664_AON_CCU_HUB_TIMER_APB] = + KONA_CLK(aon, hub_timer_apb, bus), [BCM21664_AON_CCU_CLOCK_COUNT] = LAST_KONA_CLK, }, }; @@ -126,7 +133,27 @@ static struct peri_clk_data sdio4_sleep_data = { .gate = HW_SW_GATE(0x0360, 18, 2, 3), }; -#define BCM21664_MASTER_CCU_CLOCK_COUNT (BCM21664_MASTER_CCU_SDIO4_SLEEP + 1) +static struct bus_clk_data sdio1_ahb_data = { + .gate = HW_SW_GATE(0x0358, 16, 0, 1), +}; + +static struct bus_clk_data sdio2_ahb_data = { + .gate = HW_SW_GATE(0x035c, 16, 0, 1), +}; + +static struct bus_clk_data sdio3_ahb_data = { + .gate = HW_SW_GATE(0x0364, 16, 0, 1), +}; + +static struct bus_clk_data sdio4_ahb_data = { + .gate = HW_SW_GATE(0x0360, 16, 0, 1), +}; + +static struct bus_clk_data usb_otg_ahb_data = { + .gate = HW_SW_GATE(0x0348, 16, 0, 1), +}; + +#define BCM21664_MASTER_CCU_CLOCK_COUNT (BCM21664_MASTER_CCU_USB_OTG_AHB + 1) static struct ccu_data master_ccu_data = { BCM21664_CCU_COMMON(master, MASTER), @@ -151,6 +178,16 @@ static struct ccu_data master_ccu_data = { KONA_CLK(master, sdio3_sleep, peri), [BCM21664_MASTER_CCU_SDIO4_SLEEP] = KONA_CLK(master, sdio4_sleep, peri), + [BCM21664_MASTER_CCU_SDIO1_AHB] = + KONA_CLK(master, sdio1_ahb, bus), + [BCM21664_MASTER_CCU_SDIO2_AHB] = + KONA_CLK(master, sdio2_ahb, bus), + [BCM21664_MASTER_CCU_SDIO3_AHB] = + KONA_CLK(master, sdio3_ahb, bus), + [BCM21664_MASTER_CCU_SDIO4_AHB] = + KONA_CLK(master, sdio4_ahb, bus), + [BCM21664_MASTER_CCU_USB_OTG_AHB] = + KONA_CLK(master, usb_otg_ahb, bus), [BCM21664_MASTER_CCU_CLOCK_COUNT] = LAST_KONA_CLK, }, }; @@ -231,7 +268,39 @@ static struct peri_clk_data bsc4_data = { .trig = TRIGGER(0x0afc, 19), }; -#define BCM21664_SLAVE_CCU_CLOCK_COUNT (BCM21664_SLAVE_CCU_BSC4 + 1) +static struct bus_clk_data uartb_apb_data = { + .gate = HW_SW_GATE_AUTO(0x0400, 16, 0, 1), +}; + +static struct bus_clk_data uartb2_apb_data = { + .gate = HW_SW_GATE_AUTO(0x0404, 16, 0, 1), +}; + +static struct bus_clk_data uartb3_apb_data = { + .gate = HW_SW_GATE_AUTO(0x0408, 16, 0, 1), +}; + +static struct bus_clk_data bsc1_apb_data = { + .gate = HW_SW_GATE_AUTO(0x0458, 16, 0, 1), + .hyst = HYST(0x0458, 8, 9), +}; + +static struct bus_clk_data bsc2_apb_data = { + .gate = HW_SW_GATE_AUTO(0x045c, 16, 0, 1), + .hyst = HYST(0x045c, 8, 9), +}; + +static struct bus_clk_data bsc3_apb_data = { + .gate = HW_SW_GATE_AUTO(0x0470, 16, 0, 1), + .hyst = HYST(0x0470, 8, 9), +}; + +static struct bus_clk_data bsc4_apb_data = { + .gate = HW_SW_GATE_AUTO(0x0474, 16, 0, 1), + .hyst = HYST(0x0474, 8, 9), +}; + +#define BCM21664_SLAVE_CCU_CLOCK_COUNT (BCM21664_SLAVE_CCU_BSC4_APB + 1) static struct ccu_data slave_ccu_data = { BCM21664_CCU_COMMON(slave, SLAVE), @@ -254,6 +323,20 @@ static struct ccu_data slave_ccu_data = { KONA_CLK(slave, bsc3, peri), [BCM21664_SLAVE_CCU_BSC4] = KONA_CLK(slave, bsc4, peri), + [BCM21664_SLAVE_CCU_UARTB_APB] = + KONA_CLK(slave, uartb_apb, bus), + [BCM21664_SLAVE_CCU_UARTB2_APB] = + KONA_CLK(slave, uartb2_apb, bus), + [BCM21664_SLAVE_CCU_UARTB3_APB] = + KONA_CLK(slave, uartb3_apb, bus), + [BCM21664_SLAVE_CCU_BSC1_APB] = + KONA_CLK(slave, bsc1_apb, bus), + [BCM21664_SLAVE_CCU_BSC2_APB] = + KONA_CLK(slave, bsc2_apb, bus), + [BCM21664_SLAVE_CCU_BSC3_APB] = + KONA_CLK(slave, bsc3_apb, bus), + [BCM21664_SLAVE_CCU_BSC4_APB] = + KONA_CLK(slave, bsc4_apb, bus), [BCM21664_SLAVE_CCU_CLOCK_COUNT] = LAST_KONA_CLK, }, }; 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[83.11.221.132]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ac25d376342sm213104766b.106.2025.03.07.23.50.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 07 Mar 2025 23:50:54 -0800 (PST) From: Artur Weber Date: Sat, 08 Mar 2025 08:50:45 +0100 Subject: [PATCH v3 7/9] clk: bcm281xx: Add corresponding bus clocks for peripheral clocks Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250308-kona-bus-clock-v3-7-d6fb5bfc3b67@gmail.com> References: <20250308-kona-bus-clock-v3-0-d6fb5bfc3b67@gmail.com> In-Reply-To: <20250308-kona-bus-clock-v3-0-d6fb5bfc3b67@gmail.com> To: Michael Turquette , Stephen Boyd , Florian Fainelli , Ray Jui , Scott Branden , Broadcom internal kernel review list , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Alex Elder , Stanislav Jakubek , linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, Artur Weber X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1741420241; l=5954; i=aweber.kernel@gmail.com; s=20231030; h=from:subject:message-id; bh=1bmo74LYFV3BLr/JFDmpiVjZNBn9CNtCOQIjtQp+4KA=; b=m5ABRBf8xLYVcHQyf4aikZp1uMSPzFMzJooKfmwYDbAh2HOSf9Kx5jVAEo+vuWBOu5+ceNX+G gFQg6fyeYzRDT8yWX2LBxQgyIMgPKefLEcXi2dzY4ySrUEJBC4AHRT+ X-Developer-Key: i=aweber.kernel@gmail.com; a=ed25519; pk=RhDBfWbJEHqDibXbhNEBAnc9FMkyznGxX/hwfhL8bv8= Add bus clocks corresponding to peripheral clocks currently supported by the BCM281xx clock driver. Signed-off-by: Artur Weber --- Changes in v3: - Adapt to CLOCK_COUNT defines being moved Changes in v2: - Add this patch (BCM281xx bus clocks) --- drivers/clk/bcm/clk-bcm281xx.c | 127 ++++++++++++++++++++++++++++++++++++++++- 1 file changed, 124 insertions(+), 3 deletions(-) diff --git a/drivers/clk/bcm/clk-bcm281xx.c b/drivers/clk/bcm/clk-bcm281xx.c index 7589ad9db99767485d73e91ed8db4d2842cd6e32..b3f6c86adc7ea142b882b6971031411392c689ab 100644 --- a/drivers/clk/bcm/clk-bcm281xx.c +++ b/drivers/clk/bcm/clk-bcm281xx.c @@ -59,7 +59,17 @@ static struct peri_clk_data pmu_bsc_var_data = { .trig = TRIGGER(0x0a40, 2), }; -#define BCM281XX_AON_CCU_CLOCK_COUNT (BCM281XX_AON_CCU_PMU_BSC_VAR + 1) +static struct bus_clk_data hub_timer_apb_data = { + .gate = HW_SW_GATE(0x0414, 18, 3, 2), + .hyst = HYST(0x0414, 10, 11), +}; + +static struct bus_clk_data pmu_bsc_apb_data = { + .gate = HW_SW_GATE(0x0418, 18, 3, 2), + .hyst = HYST(0x0418, 10, 11), +}; + +#define BCM281XX_AON_CCU_CLOCK_COUNT (BCM281XX_AON_CCU_PMU_BSC_APB + 1) static struct ccu_data aon_ccu_data = { BCM281XX_CCU_COMMON(aon, AON), @@ -70,6 +80,10 @@ static struct ccu_data aon_ccu_data = { KONA_CLK(aon, pmu_bsc, peri), [BCM281XX_AON_CCU_PMU_BSC_VAR] = KONA_CLK(aon, pmu_bsc_var, peri), + [BCM281XX_AON_CCU_HUB_TIMER_APB] = + KONA_CLK(aon, hub_timer_apb, bus), + [BCM281XX_AON_CCU_PMU_BSC_APB] = + KONA_CLK(aon, pmu_bsc_apb, bus), [BCM281XX_AON_CCU_CLOCK_COUNT] = LAST_KONA_CLK, }, }; @@ -178,7 +192,36 @@ static struct peri_clk_data hsic2_12m_data = { .trig = TRIGGER(0x0afc, 5), }; -#define BCM281XX_MASTER_CCU_CLOCK_COUNT (BCM281XX_MASTER_CCU_HSIC2_12M + 1) +static struct bus_clk_data sdio1_ahb_data = { + .gate = HW_SW_GATE(0x0358, 16, 1, 0), +}; + +static struct bus_clk_data sdio2_ahb_data = { + .gate = HW_SW_GATE(0x035c, 16, 1, 0), +}; + +static struct bus_clk_data sdio3_ahb_data = { + .gate = HW_SW_GATE(0x0364, 16, 1, 0), +}; + +static struct bus_clk_data sdio4_ahb_data = { + .gate = HW_SW_GATE(0x0360, 16, 1, 0), +}; + +static struct bus_clk_data usb_ic_ahb_data = { + .gate = HW_SW_GATE(0x0354, 16, 1, 0), +}; + +/* also called usbh_ahb */ +static struct bus_clk_data hsic2_ahb_data = { + .gate = HW_SW_GATE(0x0370, 16, 1, 0), +}; + +static struct bus_clk_data usb_otg_ahb_data = { + .gate = HW_SW_GATE(0x0348, 16, 1, 0), +}; + +#define BCM281XX_MASTER_CCU_CLOCK_COUNT (BCM281XX_MASTER_CCU_USB_OTG_AHB + 1) static struct ccu_data master_ccu_data = { BCM281XX_CCU_COMMON(master, MASTER), @@ -197,6 +240,20 @@ static struct ccu_data master_ccu_data = { KONA_CLK(master, hsic2_48m, peri), [BCM281XX_MASTER_CCU_HSIC2_12M] = KONA_CLK(master, hsic2_12m, peri), + [BCM281XX_MASTER_CCU_SDIO1_AHB] = + KONA_CLK(master, sdio1_ahb, bus), + [BCM281XX_MASTER_CCU_SDIO2_AHB] = + KONA_CLK(master, sdio2_ahb, bus), + [BCM281XX_MASTER_CCU_SDIO3_AHB] = + KONA_CLK(master, sdio3_ahb, bus), + [BCM281XX_MASTER_CCU_SDIO4_AHB] = + KONA_CLK(master, sdio4_ahb, bus), + [BCM281XX_MASTER_CCU_USB_IC_AHB] = + KONA_CLK(master, usb_ic_ahb, bus), + [BCM281XX_MASTER_CCU_HSIC2_AHB] = + KONA_CLK(master, hsic2_ahb, bus), + [BCM281XX_MASTER_CCU_USB_OTG_AHB] = + KONA_CLK(master, usb_otg_ahb, bus), [BCM281XX_MASTER_CCU_CLOCK_COUNT] = LAST_KONA_CLK, }, }; @@ -309,7 +366,51 @@ static struct peri_clk_data pwm_data = { .trig = TRIGGER(0x0afc, 15), }; -#define BCM281XX_SLAVE_CCU_CLOCK_COUNT (BCM281XX_SLAVE_CCU_PWM + 1) +static struct bus_clk_data uartb_apb_data = { + .gate = HW_SW_GATE(0x0400, 16, 1, 0), +}; + +static struct bus_clk_data uartb2_apb_data = { + .gate = HW_SW_GATE(0x0404, 16, 1, 0), +}; + +static struct bus_clk_data uartb3_apb_data = { + .gate = HW_SW_GATE(0x0408, 16, 1, 0), +}; + +static struct bus_clk_data uartb4_apb_data = { + .gate = HW_SW_GATE(0x040c, 16, 1, 0), +}; + +static struct bus_clk_data ssp0_apb_data = { + .gate = HW_SW_GATE(0x0410, 16, 1, 0), +}; + +static struct bus_clk_data ssp2_apb_data = { + .gate = HW_SW_GATE(0x0418, 16, 1, 0), +}; + +static struct bus_clk_data bsc1_apb_data = { + .gate = HW_SW_GATE(0x0458, 16, 1, 0), + .hyst = HYST(0x0458, 8, 9), +}; + +static struct bus_clk_data bsc2_apb_data = { + .gate = HW_SW_GATE(0x045c, 16, 1, 0), + .hyst = HYST(0x045c, 8, 9), +}; + +static struct bus_clk_data bsc3_apb_data = { + .gate = HW_SW_GATE(0x0484, 16, 1, 0), + .hyst = HYST(0x0484, 8, 9), +}; + +static struct bus_clk_data pwm_apb_data = { + .gate = HW_SW_GATE(0x0468, 16, 1, 0), + .hyst = HYST(0x0468, 8, 9), +}; + +#define BCM281XX_SLAVE_CCU_CLOCK_COUNT (BCM281XX_SLAVE_CCU_PWM_APB + 1) static struct ccu_data slave_ccu_data = { BCM281XX_CCU_COMMON(slave, SLAVE), @@ -334,6 +435,26 @@ static struct ccu_data slave_ccu_data = { KONA_CLK(slave, bsc3, peri), [BCM281XX_SLAVE_CCU_PWM] = KONA_CLK(slave, pwm, peri), + [BCM281XX_SLAVE_CCU_UARTB_APB] = + KONA_CLK(slave, uartb_apb, bus), + [BCM281XX_SLAVE_CCU_UARTB2_APB] = + KONA_CLK(slave, uartb2_apb, bus), + [BCM281XX_SLAVE_CCU_UARTB3_APB] = + KONA_CLK(slave, uartb3_apb, bus), + [BCM281XX_SLAVE_CCU_UARTB4_APB] = + KONA_CLK(slave, uartb4_apb, bus), + [BCM281XX_SLAVE_CCU_SSP0_APB] = + KONA_CLK(slave, ssp0_apb, bus), + [BCM281XX_SLAVE_CCU_SSP2_APB] = + KONA_CLK(slave, ssp2_apb, bus), + [BCM281XX_SLAVE_CCU_BSC1_APB] = + KONA_CLK(slave, bsc1_apb, bus), + [BCM281XX_SLAVE_CCU_BSC2_APB] = + KONA_CLK(slave, bsc2_apb, bus), + [BCM281XX_SLAVE_CCU_BSC3_APB] = + KONA_CLK(slave, bsc3_apb, bus), + [BCM281XX_SLAVE_CCU_PWM_APB] = + KONA_CLK(slave, pwm_apb, bus), [BCM281XX_SLAVE_CCU_CLOCK_COUNT] = LAST_KONA_CLK, }, }; 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[83.11.221.132]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ac25d376342sm213104766b.106.2025.03.07.23.50.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 07 Mar 2025 23:50:56 -0800 (PST) From: Artur Weber Date: Sat, 08 Mar 2025 08:50:46 +0100 Subject: [PATCH v3 8/9] ARM: dts: bcm2166x-common: Add matching bus clocks for peripheral clocks Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250308-kona-bus-clock-v3-8-d6fb5bfc3b67@gmail.com> References: <20250308-kona-bus-clock-v3-0-d6fb5bfc3b67@gmail.com> In-Reply-To: <20250308-kona-bus-clock-v3-0-d6fb5bfc3b67@gmail.com> To: Michael Turquette , Stephen Boyd , Florian Fainelli , Ray Jui , Scott Branden , Broadcom internal kernel review list , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Alex Elder , Stanislav Jakubek , linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, Artur Weber X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1741420241; l=2369; i=aweber.kernel@gmail.com; s=20231030; h=from:subject:message-id; bh=NWxQJr69T1lJZmCiHGaLhprHxELl4TcRh7xLKs+PcuA=; b=68WrJZ5qnwnBLofOhhsWqXSoMSMpwFgvHDM6Qp+Je5YacEXEe6ORsDZFiC4kVDOX2tkDPiPHF KGAMftEoBwfC/sBBRX8ZVAWVR2yowXiD7Wk2mMDmfRCoxFtXJ4yUWYr X-Developer-Key: i=aweber.kernel@gmail.com; a=ed25519; pk=RhDBfWbJEHqDibXbhNEBAnc9FMkyznGxX/hwfhL8bv8= Following changes in the clock driver, add bus clocks for timer, SDIO, BSC and UART to the DTS clock output names. Replace the usb_otg_ahb fixed clock with the real bus clock. Signed-off-by: Artur Weber --- arch/arm/boot/dts/broadcom/bcm2166x-common.dtsi | 28 ++++++++++++++++--------- 1 file changed, 18 insertions(+), 10 deletions(-) diff --git a/arch/arm/boot/dts/broadcom/bcm2166x-common.dtsi b/arch/arm/boot/dts/broadcom/bcm2166x-common.dtsi index 87180b7fd695e65b52c52743e6315cbcca385fba..ab6ad8c6d326171a6da1762ecd839bd82e9da482 100644 --- a/arch/arm/boot/dts/broadcom/bcm2166x-common.dtsi +++ b/arch/arm/boot/dts/broadcom/bcm2166x-common.dtsi @@ -143,7 +143,7 @@ usbotg: usb@e20000 { compatible = "snps,dwc2"; reg = <0x00e20000 0x10000>; interrupts = ; - clocks = <&usb_otg_ahb_clk>; + clocks = <&master_ccu BCM21664_MASTER_CCU_USB_OTG_AHB>; clock-names = "otg"; phys = <&usbphy>; phy-names = "usb2-phy"; @@ -248,12 +248,6 @@ var_52m_clk: var_52m { clock-frequency = <52000000>; }; - usb_otg_ahb_clk: usb_otg_ahb { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <52000000>; - }; - ref_96m_clk: ref_96m { #clock-cells = <0>; compatible = "fixed-clock"; @@ -301,7 +295,8 @@ aon_ccu: aon_ccu@35002000 { compatible = "brcm,bcm21664-aon-ccu"; reg = <0x35002000 0x0f00>; #clock-cells = <1>; - clock-output-names = "hub_timer"; + clock-output-names = "hub_timer", + "hub_timer_apb"; }; slave_ccu: slave_ccu@3e011000 { @@ -314,7 +309,15 @@ slave_ccu: slave_ccu@3e011000 { "bsc1", "bsc2", "bsc3", - "bsc4"; + "bsc4", + "uartb_apb", + "uartb2_apb", + "uartb3_apb", + "bsc1_apb", + "bsc2_apb", + "bsc3_apb", + "bsc4_apb"; + }; master_ccu: master_ccu@3f001000 { @@ -328,7 +331,12 @@ master_ccu: master_ccu@3f001000 { "sdio1_sleep", "sdio2_sleep", "sdio3_sleep", - "sdio4_sleep"; + "sdio4_sleep", + "sdio1_ahb", + "sdio2_ahb", + "sdio3_ahb", + "sdio4_ahb", + "usb_otg_ahb"; }; }; }; From patchwork Sat Mar 8 07:50:47 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Artur Weber X-Patchwork-Id: 14007449 Received: from mail-ej1-f53.google.com (mail-ej1-f53.google.com [209.85.218.53]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 633C01B425C; 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[83.11.221.132]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ac25d376342sm213104766b.106.2025.03.07.23.50.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 07 Mar 2025 23:50:59 -0800 (PST) From: Artur Weber Date: Sat, 08 Mar 2025 08:50:47 +0100 Subject: [PATCH v3 9/9] ARM: dts: bcm11351: Add corresponding bus clocks for peripheral clocks Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250308-kona-bus-clock-v3-9-d6fb5bfc3b67@gmail.com> References: <20250308-kona-bus-clock-v3-0-d6fb5bfc3b67@gmail.com> In-Reply-To: <20250308-kona-bus-clock-v3-0-d6fb5bfc3b67@gmail.com> To: Michael Turquette , Stephen Boyd , Florian Fainelli , Ray Jui , Scott Branden , Broadcom internal kernel review list , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Alex Elder , Stanislav Jakubek , linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, Artur Weber X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1741420241; l=2485; i=aweber.kernel@gmail.com; s=20231030; h=from:subject:message-id; bh=6WL3+gww7pwy7HeSxhHT435XK+Ky7XngeaLYGMY0ueU=; b=S+ne26yjaEAziJt6Hen4F5vs7TSLH7eYElTQDr9fk1DZftrPd+kqW3L5pMCzrsr7+4mX6a+sn 7X4Fa9Wk3wgAlInT+5Ko+cdi5XYnJ27HGfnFrlL3Q8a41p3JG+Xn7BS X-Developer-Key: i=aweber.kernel@gmail.com; a=ed25519; pk=RhDBfWbJEHqDibXbhNEBAnc9FMkyznGxX/hwfhL8bv8= Following changes in the clock driver, add matching bus clocks for existing peripheral clocks. Replace the usb_otg_ahb fixed clock with the real bus clock. Signed-off-by: Artur Weber --- Changes in v2: - Add this patch (BCM281xx bus clocks) --- arch/arm/boot/dts/broadcom/bcm11351.dtsi | 33 ++++++++++++++++++++++---------- 1 file changed, 23 insertions(+), 10 deletions(-) diff --git a/arch/arm/boot/dts/broadcom/bcm11351.dtsi b/arch/arm/boot/dts/broadcom/bcm11351.dtsi index 53857e572080d752732c512ed27f942756d59c46..fac5cf5a46bd9a4b7e09a2e65c3e807d1b4ef960 100644 --- a/arch/arm/boot/dts/broadcom/bcm11351.dtsi +++ b/arch/arm/boot/dts/broadcom/bcm11351.dtsi @@ -233,7 +233,9 @@ aon_ccu: aon_ccu@35002000 { #clock-cells = <1>; clock-output-names = "hub_timer", "pmu_bsc", - "pmu_bsc_var"; + "pmu_bsc_var", + "hub_timer_apb", + "pmu_bsc_apb"; }; master_ccu: master_ccu@3f001000 { @@ -246,7 +248,14 @@ master_ccu: master_ccu@3f001000 { "sdio4", "usb_ic", "hsic2_48m", - "hsic2_12m"; + "hsic2_12m", + "sdio1_ahb", + "sdio2_ahb", + "sdio3_ahb", + "sdio4_ahb", + "usb_ic_ahb", + "hsic2_ahb", + "usb_otg_ahb"; }; slave_ccu: slave_ccu@3e011000 { @@ -262,7 +271,17 @@ slave_ccu: slave_ccu@3e011000 { "bsc1", "bsc2", "bsc3", - "pwm"; + "pwm", + "uartb_apb", + "uartb2_apb", + "uartb3_apb", + "uartb4_apb", + "ssp0_apb", + "ssp2_apb", + "bsc1_apb", + "bsc2_apb", + "bsc3_apb", + "pwm_apb"; }; ref_1m_clk: ref_1m { @@ -325,12 +344,6 @@ var_52m_clk: var_52m { clock-frequency = <52000000>; }; - usb_otg_ahb_clk: usb_otg_ahb { - compatible = "fixed-clock"; - clock-frequency = <52000000>; - #clock-cells = <0>; - }; - ref_96m_clk: ref_96m { #clock-cells = <0>; compatible = "fixed-clock"; @@ -396,7 +409,7 @@ usbotg: usb@3f120000 { compatible = "snps,dwc2"; reg = <0x3f120000 0x10000>; interrupts = ; - clocks = <&usb_otg_ahb_clk>; + clocks = <&master_ccu BCM281XX_MASTER_CCU_USB_OTG_AHB>; clock-names = "otg"; phys = <&usbphy>; phy-names = "usb2-phy";