From patchwork Sat Mar 8 12:21:10 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Ciocaltea X-Patchwork-Id: 14007471 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 41898C282EC for ; Sat, 8 Mar 2025 12:23:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=XZ55/qgBFyg7Yq5+cL+rVlGA/LqKcaq3vxMjwfDOP04=; b=T/4uCP+Yw0FiyO z/dugXcigMBla7LIbEfJryrBlyYuzsA1bqSjL/ZYWNdMop7AmZiLFWq0baUHhBMdi/69T4LY0+PPL sfNYQc9W2yCsLlNI6xD57kMmc0yIEcpGycReltvYNmcBB3XCtcvBI874jafVNfPOglKncMzBirtDE KJnD1BM+nwQe30gzd3ekfWhSp60asy6hZfVpYcnPg9urvvMQrkVIBmYxpIAa6wQrNjIGCvAZO1iI5 JiCM0YRszUImfhEOhMYFbg4bHGFM6jatFMcarH8rwdFqbFMcUX6PT9s7OkEX7Pp+e02A9VxIue0dW xAJFq3atzMqXssoQ6IiA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tqtD2-0000000GZwW-0yid; Sat, 08 Mar 2025 12:23:16 +0000 Received: from bali.collaboradmins.com ([2a01:4f8:201:9162::2]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tqtBN-0000000GZb9-354S; Sat, 08 Mar 2025 12:21:35 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1741436491; bh=iDVPebVtBVKbo8sc+q34EtLBvJPNOV2/Slk4+XhkzX8=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=jWHd00EJ9hnePWEz/DrdG7009UAG36ybY9d22YaIM0Q9eNBvahc9jVuXRkdTbN8xa jq5AORSVk3/Wq0jZLut0P3wQMbPm8zmaqr/1NjeEtMlkm+u/nBB/ER14LPhRLAQWxp dB5lk0tvG1GFCBfDbRtpeGTCzlKQDj9X1R+XyPq/eZN/35Lv9Z9RSAqDkiBO4Atj15 RSgGGZKouWZPXAiJ1VU0sWgCTXL6QfNQmNeIGsR+CALva+qJXxfSApC87tJ2e+zQPJ 0ApPrwiWFVO9MwcKQuu39fsDMSUN+dUCmoIpAzhEnJs5NbNxaIiTvYmxe9wQMrBCjc z8tAr39JqFiNQ== Received: from localhost (unknown [84.232.140.93]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (prime256v1) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by bali.collaboradmins.com (Postfix) with UTF8SMTPSA id 8496F17E0B12; Sat, 8 Mar 2025 13:21:31 +0100 (CET) From: Cristian Ciocaltea Date: Sat, 08 Mar 2025 14:21:10 +0200 Subject: [PATCH v5 01/12] phy: Add HDMI configuration options MIME-Version: 1.0 Message-Id: <20250308-phy-sam-hdptx-bpc-v5-1-35087287f9d1@collabora.com> References: <20250308-phy-sam-hdptx-bpc-v5-0-35087287f9d1@collabora.com> In-Reply-To: <20250308-phy-sam-hdptx-bpc-v5-0-35087287f9d1@collabora.com> To: Vinod Koul , Kishon Vijay Abraham I , Heiko Stuebner Cc: Algea Cao , Sandor Yu , Dmitry Baryshkov , Maxime Ripard , kernel@collabora.com, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org X-Mailer: b4 0.14.2 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250308_042133_968853_09F0F68A X-CRM114-Status: GOOD ( 14.74 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org From: Sandor Yu Allow HDMI PHYs to be configured through the generic functions through a custom structure added to the generic union. The parameters added here are based on HDMI PHY implementation practices. The current set of parameters should cover the potential users. Signed-off-by: Sandor Yu Reviewed-by: Dmitry Baryshkov Reviewed-by: Maxime Ripard Acked-by: Vinod Koul Link: https://lore.kernel.org/r/d1cff6c03ec3732d2244022029245ab2d954d997.1734340233.git.Sandor.yu@nxp.com Signed-off-by: Cristian Ciocaltea --- include/linux/phy/phy-hdmi.h | 19 +++++++++++++++++++ include/linux/phy/phy.h | 7 ++++++- 2 files changed, 25 insertions(+), 1 deletion(-) diff --git a/include/linux/phy/phy-hdmi.h b/include/linux/phy/phy-hdmi.h new file mode 100644 index 0000000000000000000000000000000000000000..6a696922bc7f29af63d88646701b2c0fcee5c885 --- /dev/null +++ b/include/linux/phy/phy-hdmi.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright 2022,2024 NXP + */ + +#ifndef __PHY_HDMI_H_ +#define __PHY_HDMI_H_ + +/** + * struct phy_configure_opts_hdmi - HDMI configuration set + * @tmds_char_rate: HDMI TMDS Character Rate in Hertz. + * + * This structure is used to represent the configuration state of a HDMI phy. + */ +struct phy_configure_opts_hdmi { + unsigned long long tmds_char_rate; +}; + +#endif /* __PHY_HDMI_H_ */ diff --git a/include/linux/phy/phy.h b/include/linux/phy/phy.h index 03cd5bae92d3f189d739c453fe4c160dd2a5063e..4ac486b101fe4023b8f2a84e907e65a0ff0a5ede 100644 --- a/include/linux/phy/phy.h +++ b/include/linux/phy/phy.h @@ -17,6 +17,7 @@ #include #include +#include #include #include @@ -42,7 +43,8 @@ enum phy_mode { PHY_MODE_MIPI_DPHY, PHY_MODE_SATA, PHY_MODE_LVDS, - PHY_MODE_DP + PHY_MODE_DP, + PHY_MODE_HDMI, }; enum phy_media { @@ -60,11 +62,14 @@ enum phy_media { * the DisplayPort protocol. * @lvds: Configuration set applicable for phys supporting * the LVDS phy mode. + * @hdmi: Configuration set applicable for phys supporting + * the HDMI phy mode. */ union phy_configure_opts { struct phy_configure_opts_mipi_dphy mipi_dphy; struct phy_configure_opts_dp dp; struct phy_configure_opts_lvds lvds; + struct phy_configure_opts_hdmi hdmi; }; /** From patchwork Sat Mar 8 12:21:11 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Ciocaltea X-Patchwork-Id: 14007472 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 45653C282EC for ; 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Sat, 8 Mar 2025 13:21:32 +0100 (CET) From: Cristian Ciocaltea Date: Sat, 08 Mar 2025 14:21:11 +0200 Subject: [PATCH v5 02/12] phy: hdmi: Add color depth configuration MIME-Version: 1.0 Message-Id: <20250308-phy-sam-hdptx-bpc-v5-2-35087287f9d1@collabora.com> References: <20250308-phy-sam-hdptx-bpc-v5-0-35087287f9d1@collabora.com> In-Reply-To: <20250308-phy-sam-hdptx-bpc-v5-0-35087287f9d1@collabora.com> To: Vinod Koul , Kishon Vijay Abraham I , Heiko Stuebner Cc: Algea Cao , Sandor Yu , Dmitry Baryshkov , Maxime Ripard , kernel@collabora.com, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org X-Mailer: b4 0.14.2 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250308_042135_047060_B13429DF X-CRM114-Status: UNSURE ( 9.12 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org Extend the HDMI configuration options to allow managing bits per color channel. This is required by some PHY drivers such as rockchip-samsung-hdptx. Signed-off-by: Cristian Ciocaltea Reviewed-by: Dmitry Baryshkov --- include/linux/phy/phy-hdmi.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/linux/phy/phy-hdmi.h b/include/linux/phy/phy-hdmi.h index 6a696922bc7f29af63d88646701b2c0fcee5c885..f0ec963c6e84f1b7728acafc824dff191c6b873d 100644 --- a/include/linux/phy/phy-hdmi.h +++ b/include/linux/phy/phy-hdmi.h @@ -9,11 +9,13 @@ /** * struct phy_configure_opts_hdmi - HDMI configuration set * @tmds_char_rate: HDMI TMDS Character Rate in Hertz. + * @bpc: Bits per color channel. * * This structure is used to represent the configuration state of a HDMI phy. */ struct phy_configure_opts_hdmi { unsigned long long tmds_char_rate; + unsigned int bpc; }; #endif /* __PHY_HDMI_H_ */ From patchwork Sat Mar 8 12:21:12 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Ciocaltea X-Patchwork-Id: 14007479 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DCC96C28B2E for ; Sat, 8 Mar 2025 12:29:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=HfaoHBGSkI34mL0DMKruhLMr0uWoHohsWCOUAbR9I/Q=; b=WTOT1m8wlsyTyH yzjQ/daq5aDN06jnDwoZwfNIKx8osUs30Z5Y0fnDDariazdoi56BMgIcwuC4a3NW2Y+F3TvRB6EEx ar7qNN0vqxTN1tAUOd0ne861wzfApVrrT9TsI4pJL2DomHsPihbjSvd4ORRv/Vbs63JkhgYe9GUYa Zkgk7StG9CMFVOQguwWcq16Ca5t+PQv/tmpJ0sXDuhv/lJ4WfSg6yxLoObYsbUrshWF8lEAyd/AQo SXgAz2pWXSEYbBteXSvVf8DUdDMwiuzBOzSVbzxl0U+E9Sbfpl4lEvvoBoe5fRRSpVCuYCML5qFzt uOrYIBFfs7eNujRlelXA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tqtJQ-0000000GagA-1C2H; Sat, 08 Mar 2025 12:29:52 +0000 Received: from bali.collaboradmins.com ([2a01:4f8:201:9162::2]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tqtBP-0000000GZbQ-0tGL; Sat, 08 Mar 2025 12:21:37 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1741436493; bh=JVO6B5huh7eGDo+k3A1fG3SKCxGyB11XeWKMxuuZ+rw=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=HPioRTv4CnTVqQh81bzz/2o6ENJerd7U3kGDTqmShoHEsNZdO5m193+SPAfLDvBA4 Qu5Qktc3iCmujLpVZPu82JaSRVAsvtw1XY0rvJOddfFWDc+Bb0ChVfT7gs0Fus4eL4 ofppyfFyejOWHhE+B/TvP7ow4WBDwqsVT7qXMk/Ta/BeWmsp76dGcM8kYPCypYZhLX Gp0Op8err6kj/xSCDn71TY50aXBNVg3Se+UrC0BSK0/fd9Y0zls7SkX4WKw+YVqhmG uWqWH1Phr0PYzHZso4pKqksBnLOobfDxZ2eeFcO6XaSY9YHIjXvRyPOfKFMViss5Y2 WM4qraw/HTawg== Received: from localhost (unknown [84.232.140.93]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (prime256v1) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by bali.collaboradmins.com (Postfix) with UTF8SMTPSA id 6300117E1016; Sat, 8 Mar 2025 13:21:33 +0100 (CET) From: Cristian Ciocaltea Date: Sat, 08 Mar 2025 14:21:12 +0200 Subject: [PATCH v5 03/12] phy: rockchip: samsung-hdptx: Fix clock ratio setup MIME-Version: 1.0 Message-Id: <20250308-phy-sam-hdptx-bpc-v5-3-35087287f9d1@collabora.com> References: <20250308-phy-sam-hdptx-bpc-v5-0-35087287f9d1@collabora.com> In-Reply-To: <20250308-phy-sam-hdptx-bpc-v5-0-35087287f9d1@collabora.com> To: Vinod Koul , Kishon Vijay Abraham I , Heiko Stuebner Cc: Algea Cao , Sandor Yu , Dmitry Baryshkov , Maxime Ripard , kernel@collabora.com, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org X-Mailer: b4 0.14.2 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250308_042135_426611_5FFF5E3D X-CRM114-Status: UNSURE ( 9.27 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org The switch from 1/10 to 1/40 clock ratio must happen when exceeding the 340 MHz rate limit of HDMI 1.4, i.e. when entering the HDMI 2.0 domain, and not before. While at it, introduce a define for this rate limit constant. Fixes: 553be2830c5f ("phy: rockchip: Add Samsung HDMI/eDP Combo PHY driver") Signed-off-by: Cristian Ciocaltea Reviewed-by: Dmitry Baryshkov --- drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c index f88369864c50e4563834ccbb26f1f9f440e99271..cf2c3a46604cb9d8c26fe5ec8346904e0b62848f 100644 --- a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c +++ b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c @@ -320,6 +320,7 @@ #define LN3_TX_SER_RATE_SEL_HBR2_MASK BIT(3) #define LN3_TX_SER_RATE_SEL_HBR3_MASK BIT(2) +#define HDMI14_MAX_RATE 340000000 #define HDMI20_MAX_RATE 600000000 enum dp_link_rate { @@ -1072,7 +1073,7 @@ static int rk_hdptx_ropll_tmds_mode_config(struct rk_hdptx_phy *hdptx, regmap_write(hdptx->regmap, LNTOP_REG(0200), 0x06); - if (rate >= 3400000) { + if (rate > HDMI14_MAX_RATE / 100) { /* For 1/40 bitrate clk */ rk_hdptx_multi_reg_write(hdptx, rk_hdtpx_tmds_lntop_highbr_seq); } else { From patchwork Sat Mar 8 12:21:13 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Ciocaltea X-Patchwork-Id: 14007478 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 68CC7C282EC for ; Sat, 8 Mar 2025 12:29:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=fYgk41lyqDGwOlzxUXl0tdcuJdkV9bvu1lLzbOW4GGY=; b=AI1dDsDmguF/pg 3kWNYTS/2U0oh4kIx5HXFxXHQp7zqRM61MnbX3r4GSWHq0CEJV8kLqTMdy8Rq1XRNriTsF4anAv2Q BBIILNYxq2mQaodwA/hfPsdqzZfeS4fk8YtuchuqeauqgNfDHGtHeOXiv7vY9e7brBPDOghZq1ZqO BI7t6ZCDT+/956pb2IGuXN4SIaTOHbir0wEP1mFbzNbB+PwCUVjJA+VkFBzSe0yzqfi5WnzaxlEs2 YKEquxeXiFkX2elRTDbAuu5cWVl3vAP3alZ8qsFhj6ylExicXIxsBDqwTL7rzyDoxrqtFSgbrCh20 v9xBa+uE6wpXNkEcPgUQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tqtJQ-0000000GagL-2fnY; Sat, 08 Mar 2025 12:29:52 +0000 Received: from bali.collaboradmins.com ([2a01:4f8:201:9162::2]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tqtBP-0000000GZbT-3Fb4; Sat, 08 Mar 2025 12:21:37 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1741436494; bh=XP3rwzkTa1mXnGdnUHFUWqLPHJxazgMc4cL1Dqwrxk8=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=CxAAxjClEE0/qPs7zIirxtrqVEsJ8Ru/XPqEYQt2YUpbcL/WHnb52cw/BN9VFOeZP XLbgSAGV81OhAp/k3OHfMXU0kk+/AlJDBvWgtIIzxmywuDdQ6z9MnfoEY8oiYQtqDN /VaELiSVssXLBAu4y3brRUmbcrIjRIC818lQhwMAvo0IkKkzPgR0hcDRvrGMPZ2Xvo nBTZ0tR0b8v90dUKVZwbCNLZFLfs0kCjoexFMmhiLVDsJIWp0RlfL1fJlfauSiE1p2 pm2n5ut8xcUqHPVPhhvqw6U/KNH/gZROM5czJeovgkaUnlrMOs66hNJGKQvBgk6eLZ qHCj5aKrGzByw== Received: from localhost (unknown [84.232.140.93]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (prime256v1) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by bali.collaboradmins.com (Postfix) with UTF8SMTPSA id 33FAA17E1022; Sat, 8 Mar 2025 13:21:34 +0100 (CET) From: Cristian Ciocaltea Date: Sat, 08 Mar 2025 14:21:13 +0200 Subject: [PATCH v5 04/12] phy: rockchip: samsung-hdptx: Drop unused struct lcpll_config MIME-Version: 1.0 Message-Id: <20250308-phy-sam-hdptx-bpc-v5-4-35087287f9d1@collabora.com> References: <20250308-phy-sam-hdptx-bpc-v5-0-35087287f9d1@collabora.com> In-Reply-To: <20250308-phy-sam-hdptx-bpc-v5-0-35087287f9d1@collabora.com> To: Vinod Koul , Kishon Vijay Abraham I , Heiko Stuebner Cc: Algea Cao , Sandor Yu , Dmitry Baryshkov , Maxime Ripard , kernel@collabora.com, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org X-Mailer: b4 0.14.2 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250308_042135_958383_EE19BBA9 X-CRM114-Status: UNSURE ( 5.97 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org This is just a leftover from downstream support for HDMI 2.1. Remove the unused struct for now. Signed-off-by: Cristian Ciocaltea Reviewed-by: Dmitry Baryshkov --- drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c | 31 ----------------------- 1 file changed, 31 deletions(-) diff --git a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c index cf2c3a46604cb9d8c26fe5ec8346904e0b62848f..f9b5c96d6c789e435657e224032d35b5a6950945 100644 --- a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c +++ b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c @@ -329,37 +329,6 @@ enum dp_link_rate { DP_BW_HBR2, }; -struct lcpll_config { - u32 bit_rate; - u8 lcvco_mode_en; - u8 pi_en; - u8 clk_en_100m; - u8 pms_mdiv; - u8 pms_mdiv_afc; - u8 pms_pdiv; - u8 pms_refdiv; - u8 pms_sdiv; - u8 pi_cdiv_rstn; - u8 pi_cdiv_sel; - u8 sdm_en; - u8 sdm_rstn; - u8 sdc_frac_en; - u8 sdc_rstn; - u8 sdm_deno; - u8 sdm_num_sign; - u8 sdm_num; - u8 sdc_n; - u8 sdc_n2; - u8 sdc_num; - u8 sdc_deno; - u8 sdc_ndiv_rstn; - u8 ssc_en; - u8 ssc_fm_dev; - u8 ssc_fm_freq; - u8 ssc_clk_div_sel; - u8 cd_tx_ser_rate_sel; -}; - struct ropll_config { u32 bit_rate; u8 pms_mdiv; From patchwork Sat Mar 8 12:21:14 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Ciocaltea X-Patchwork-Id: 14007490 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 04166C282EC for ; Sat, 8 Mar 2025 12:31:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=I/yMsMUZXZgi6LYOSbA97Ly+ZkfORWfT4Xzl2AJw4Mg=; b=3XfnNceg/qylue s4KdU2GQsVt7u3Ck9iCPVBEgSDwNo4OMeDlnLFTNwmHCiZGIFK2FyQL2IuiabDu9GmusQwXa57qzV uUEWromXKhf0uAPXksgiy8Yc1j0GpAuf1vw4ImCstn5loPkHKfHWGhlOj7bsqHkBuLj0NdWdUuySh ix1DnzjLBaKpEKGMFwMacc/IHKQV/u2M5FF/+y32g9Kh9BAuKXFSb0yT2raRx/dILDrIgh9pDHJ1c u1tOg57Een+2iLnt6s6fciN18aHN6o1a8Bb6WbKjPD8lhe5J478ISZx4F2SdTEkBvpjGMkQjONeJy VJL75eJnwVlLXW0CJGEA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tqtL1-0000000Gau2-0ia7; Sat, 08 Mar 2025 12:31:31 +0000 Received: from bali.collaboradmins.com ([2a01:4f8:201:9162::2]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tqtBS-0000000GZcp-0Yd9; Sat, 08 Mar 2025 12:21:39 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1741436496; bh=H52on9OF9VHErJX/F0Xzfni4+/Tw4ZDeMorcaCchiac=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=SOvEmMEzdGebwFc16IIOF7TLRuQrKIXOyFI4XCFUq9ILoGX5xnclFfnJUqbRg/wlz J/mytWMTciApUh6NBb6sJxAkrCHJ20sCo8B2iFH53k+wvl899ETBJBw1hJSf5G0wDa +TZ2NVhZPJjRFM3OALa0/ITJNJE0UDq4fYwcGZGDKpTknTfxnFE0gSEk62xMjufqKv o9ZANCeFDrgByV4FUQP10TW9LaBtw0bxljDwfjdlZMNUDjK5FyaTXFE6JFsvc6FEFs 4poyHaMvelGIjbpJF2hX/gUT9OIhpVnvpcE84ZMVu5Op6eMuIEKIeSxzQAsalwyZ/s KrGk4iC5Cpjvw== Received: from localhost (unknown [84.232.140.93]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (prime256v1) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by bali.collaboradmins.com (Postfix) with UTF8SMTPSA id 4804017E0B12; Sat, 8 Mar 2025 13:21:36 +0100 (CET) From: Cristian Ciocaltea Date: Sat, 08 Mar 2025 14:21:14 +0200 Subject: [PATCH v5 05/12] phy: rockchip: samsung-hdptx: Drop unused phy_cfg driver data MIME-Version: 1.0 Message-Id: <20250308-phy-sam-hdptx-bpc-v5-5-35087287f9d1@collabora.com> References: <20250308-phy-sam-hdptx-bpc-v5-0-35087287f9d1@collabora.com> In-Reply-To: <20250308-phy-sam-hdptx-bpc-v5-0-35087287f9d1@collabora.com> To: Vinod Koul , Kishon Vijay Abraham I , Heiko Stuebner Cc: Algea Cao , Sandor Yu , Dmitry Baryshkov , Maxime Ripard , kernel@collabora.com, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org X-Mailer: b4 0.14.2 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250308_042138_346447_63FA7BD8 X-CRM114-Status: UNSURE ( 8.30 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org There is no usage of phy_cfg in the upstream driver data, nor in the downstream one, hence remove it. Signed-off-by: Cristian Ciocaltea Reviewed-by: Dmitry Baryshkov --- drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c index f9b5c96d6c789e435657e224032d35b5a6950945..06644c3d98d3f8b697fc704704df5acdd3c85bad 100644 --- a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c +++ b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c @@ -397,7 +397,6 @@ struct rk_hdptx_phy { int phy_id; struct phy *phy; - struct phy_config *phy_cfg; struct clk_bulk_data *clks; int nr_clks; struct reset_control_bulk_data rsts[RST_MAX]; From patchwork Sat Mar 8 12:21:15 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Ciocaltea X-Patchwork-Id: 14007491 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 29F58C28B25 for ; Sat, 8 Mar 2025 12:33:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=0nyJCD7gbgmJ0J5sYBhye3G8Q7u+9zFxIDduFgno+kw=; b=EOE57Gj0RgrAFv +P8tR7RCk7Rh6TlnZExuoOLLotLIuO9C9BIdBwxJB2PUtGg+zfBtgm5AVtp1SgbAg3NJBZ8c+wrf/ cHYSB36n4wY/nRVA2T6YGq1FNSQ3bwCBh9NO17PauxzKV3hGr5F86byCuw8CE3mQXHZFP0D1ZP5g+ /SKILbDgW+HISmodrgL7DgwMU9oaSJ+JQiDH9MVLskv/Y+xbWrQC1wdwjiIHvy9pj42l6cOV2M0PW snLVKxyqwBk7/YqyoZQ2fxyd0LTbklBsWUqlXN5Ad5FJ07Qsu8T0Fi1YFkd5dlaQxBqbe68goRA8x 0+yJAxgcXFOkTnWZUb6g==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tqtMc-0000000Gb5L-25tE; Sat, 08 Mar 2025 12:33:10 +0000 Received: from bali.collaboradmins.com ([2a01:4f8:201:9162::2]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tqtBS-0000000GZdG-3RNA; Sat, 08 Mar 2025 12:21:40 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1741436497; bh=MrgqgIZ157jsElaeg3dFAoESeyFXV9vNfZmK9cHxL2A=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=KBsxvZxe5BZH0eOrUVtnXUOm9hvk2iQlYpBkJSsUFj0TJYgBQJulDBC7WyX3giykq X72v8nWZRzYdLgaDQ8ZSzOeExhtGfXA+BzZmTDFl/t0epsrR1QxvySR3KeiyVRzook BiwqGzzDpqUGs+Eyn47JjMUMlCsWktH8HzmZ1Pqyaz5F7cm+Wvt7dCtqHofvE9sMgp hRQfLgdlSGzr8EI81Dvu4mtRKtNZIaivo+nlXibOzZpsIH4VgTsHFSqZsFkCjp/+FI 3zmzohvHKJZrMCs7zHXkH7ZngHlLnhxj/F9s8biMT1FP6bhKjPzSieSanhTH4a9eJr 1doPs+c5MBn/Q== Received: from localhost (unknown [84.232.140.93]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (prime256v1) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by bali.collaboradmins.com (Postfix) with UTF8SMTPSA id 128CE17E0657; Sat, 8 Mar 2025 13:21:37 +0100 (CET) From: Cristian Ciocaltea Date: Sat, 08 Mar 2025 14:21:15 +0200 Subject: [PATCH v5 06/12] phy: rockchip: samsung-hdptx: Drop superfluous cfgs driver data MIME-Version: 1.0 Message-Id: <20250308-phy-sam-hdptx-bpc-v5-6-35087287f9d1@collabora.com> References: <20250308-phy-sam-hdptx-bpc-v5-0-35087287f9d1@collabora.com> In-Reply-To: <20250308-phy-sam-hdptx-bpc-v5-0-35087287f9d1@collabora.com> To: Vinod Koul , Kishon Vijay Abraham I , Heiko Stuebner Cc: Algea Cao , Sandor Yu , Dmitry Baryshkov , Maxime Ripard , kernel@collabora.com, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org X-Mailer: b4 0.14.2 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250308_042139_039026_D6DEDAC4 X-CRM114-Status: GOOD ( 13.52 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org The ->cfgs member has been introduced via commit f08d1c085638 ("phy: phy-rockchip-samsung-hdptx: Don't use dt aliases to determine phy-id"), but it is only used during probe() in order to setup ->phy_id. Use a probe() local variable to store device match data and remove the now unnecessary member from struct rk_hdptx_phy. Signed-off-by: Cristian Ciocaltea Reviewed-by: Dmitry Baryshkov --- drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c | 12 +++++------- 1 file changed, 5 insertions(+), 7 deletions(-) diff --git a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c index 06644c3d98d3f8b697fc704704df5acdd3c85bad..2bf525514c1991a1299265d12e1e85f66333c604 100644 --- a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c +++ b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c @@ -392,10 +392,7 @@ struct rk_hdptx_phy { struct regmap *regmap; struct regmap *grf; - /* PHY const config */ - const struct rk_hdptx_phy_cfg *cfgs; int phy_id; - struct phy *phy; struct clk_bulk_data *clks; int nr_clks; @@ -1892,6 +1889,7 @@ static int rk_hdptx_phy_runtime_resume(struct device *dev) static int rk_hdptx_phy_probe(struct platform_device *pdev) { + const struct rk_hdptx_phy_cfg *cfgs; struct phy_provider *phy_provider; struct device *dev = &pdev->dev; struct rk_hdptx_phy *hdptx; @@ -1910,14 +1908,14 @@ static int rk_hdptx_phy_probe(struct platform_device *pdev) return dev_err_probe(dev, PTR_ERR(regs), "Failed to ioremap resource\n"); - hdptx->cfgs = device_get_match_data(dev); - if (!hdptx->cfgs) + cfgs = device_get_match_data(dev); + if (!cfgs) return dev_err_probe(dev, -EINVAL, "missing match data\n"); /* find the phy-id from the io address */ hdptx->phy_id = -ENODEV; - for (id = 0; id < hdptx->cfgs->num_phys; id++) { - if (res->start == hdptx->cfgs->phy_ids[id]) { + for (id = 0; id < cfgs->num_phys; id++) { + if (res->start == cfgs->phy_ids[id]) { hdptx->phy_id = id; break; } From patchwork Sat Mar 8 12:21:16 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Ciocaltea X-Patchwork-Id: 14007492 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 44CC1C282EC for ; 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Sat, 8 Mar 2025 13:21:38 +0100 (CET) From: Cristian Ciocaltea Date: Sat, 08 Mar 2025 14:21:16 +0200 Subject: [PATCH v5 07/12] phy: rockchip: samsung-hdptx: Avoid Hz<->hHz unit conversion overhead MIME-Version: 1.0 Message-Id: <20250308-phy-sam-hdptx-bpc-v5-7-35087287f9d1@collabora.com> References: <20250308-phy-sam-hdptx-bpc-v5-0-35087287f9d1@collabora.com> In-Reply-To: <20250308-phy-sam-hdptx-bpc-v5-0-35087287f9d1@collabora.com> To: Vinod Koul , Kishon Vijay Abraham I , Heiko Stuebner Cc: Algea Cao , Sandor Yu , Dmitry Baryshkov , Maxime Ripard , kernel@collabora.com, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org X-Mailer: b4 0.14.2 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250308_042140_600457_7E94D363 X-CRM114-Status: GOOD ( 15.37 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org The ropll_tmds_cfg table used to identify the configuration params for the supported rates expects the search key, i.e. bit_rate member of struct ropll_config, to be provided in hHz rather than Hz (1 hHz = 100 Hz). This requires multiple conversions between these units being performed at runtime. Improve implementation clarity and efficiency by consistently using the Hz unit throughout driver's internal data structures and functions. Also rename the rather misleading struct member. Signed-off-by: Cristian Ciocaltea --- drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c | 79 +++++++++++------------ 1 file changed, 39 insertions(+), 40 deletions(-) diff --git a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c index 2bf525514c1991a1299265d12e1e85f66333c604..e58a01bdb3ce82d66acdcb02c06de2816288b574 100644 --- a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c +++ b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c @@ -330,7 +330,7 @@ enum dp_link_rate { }; struct ropll_config { - u32 bit_rate; + u32 rate; u8 pms_mdiv; u8 pms_mdiv_afc; u8 pms_pdiv; @@ -410,45 +410,45 @@ struct rk_hdptx_phy { }; static const struct ropll_config ropll_tmds_cfg[] = { - { 5940000, 124, 124, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 62, 1, 16, 5, 0, + { 594000000, 124, 124, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 62, 1, 16, 5, 0, 1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, }, - { 3712500, 155, 155, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 62, 1, 16, 5, 0, + { 371250000, 155, 155, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 62, 1, 16, 5, 0, 1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, }, - { 2970000, 124, 124, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 62, 1, 16, 5, 0, + { 297000000, 124, 124, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 62, 1, 16, 5, 0, 1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, }, - { 1620000, 135, 135, 1, 1, 3, 1, 1, 0, 1, 1, 1, 1, 4, 0, 3, 5, 5, 0x10, + { 162000000, 135, 135, 1, 1, 3, 1, 1, 0, 1, 1, 1, 1, 4, 0, 3, 5, 5, 0x10, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, }, - { 1856250, 155, 155, 1, 1, 3, 1, 1, 1, 1, 1, 1, 1, 62, 1, 16, 5, 0, + { 185625000, 155, 155, 1, 1, 3, 1, 1, 1, 1, 1, 1, 1, 62, 1, 16, 5, 0, 1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, }, - { 1540000, 193, 193, 1, 1, 5, 1, 1, 1, 1, 1, 1, 1, 193, 1, 32, 2, 1, + { 154000000, 193, 193, 1, 1, 5, 1, 1, 1, 1, 1, 1, 1, 193, 1, 32, 2, 1, 1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, }, - { 1485000, 0x7b, 0x7b, 1, 1, 3, 1, 1, 1, 1, 1, 1, 1, 4, 0, 3, 5, 5, + { 148500000, 0x7b, 0x7b, 1, 1, 3, 1, 1, 1, 1, 1, 1, 1, 4, 0, 3, 5, 5, 0x10, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, }, - { 1462500, 122, 122, 1, 1, 3, 1, 1, 1, 1, 1, 1, 1, 244, 1, 16, 2, 1, 1, + { 146250000, 122, 122, 1, 1, 3, 1, 1, 1, 1, 1, 1, 1, 244, 1, 16, 2, 1, 1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, }, - { 1190000, 149, 149, 1, 1, 5, 1, 1, 1, 1, 1, 1, 1, 149, 1, 16, 2, 1, 1, + { 119000000, 149, 149, 1, 1, 5, 1, 1, 1, 1, 1, 1, 1, 149, 1, 16, 2, 1, 1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, }, - { 1065000, 89, 89, 1, 1, 3, 1, 1, 1, 1, 1, 1, 1, 89, 1, 16, 1, 0, 1, + { 106500000, 89, 89, 1, 1, 3, 1, 1, 1, 1, 1, 1, 1, 89, 1, 16, 1, 0, 1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, }, - { 1080000, 135, 135, 1, 1, 5, 1, 1, 0, 1, 0, 1, 1, 0x9, 0, 0x05, 0, + { 108000000, 135, 135, 1, 1, 5, 1, 1, 0, 1, 0, 1, 1, 0x9, 0, 0x05, 0, 0x14, 0x18, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, }, - { 855000, 214, 214, 1, 1, 11, 1, 1, 1, 1, 1, 1, 1, 214, 1, 16, 2, 1, + { 85500000, 214, 214, 1, 1, 11, 1, 1, 1, 1, 1, 1, 1, 214, 1, 16, 2, 1, 1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, }, - { 835000, 105, 105, 1, 1, 5, 1, 1, 1, 1, 1, 1, 1, 42, 1, 16, 1, 0, + { 83500000, 105, 105, 1, 1, 5, 1, 1, 1, 1, 1, 1, 1, 42, 1, 16, 1, 0, 1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, }, - { 928125, 155, 155, 1, 1, 7, 1, 1, 1, 1, 1, 1, 1, 62, 1, 16, 5, 0, + { 92812500, 155, 155, 1, 1, 7, 1, 1, 1, 1, 1, 1, 1, 62, 1, 16, 5, 0, 1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, }, - { 742500, 124, 124, 1, 1, 7, 1, 1, 1, 1, 1, 1, 1, 62, 1, 16, 5, 0, + { 74250000, 124, 124, 1, 1, 7, 1, 1, 1, 1, 1, 1, 1, 62, 1, 16, 5, 0, 1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, }, - { 650000, 162, 162, 1, 1, 11, 1, 1, 1, 1, 1, 1, 1, 54, 0, 16, 4, 1, + { 65000000, 162, 162, 1, 1, 11, 1, 1, 1, 1, 1, 1, 1, 54, 0, 16, 4, 1, 1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, }, - { 337500, 0x70, 0x70, 1, 1, 0xf, 1, 1, 1, 1, 1, 1, 1, 0x2, 0, 0x01, 5, + { 33750000, 0x70, 0x70, 1, 1, 0xf, 1, 1, 1, 1, 1, 1, 1, 0x2, 0, 0x01, 5, 1, 1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, }, - { 400000, 100, 100, 1, 1, 11, 1, 1, 0, 1, 0, 1, 1, 0x9, 0, 0x05, 0, + { 40000000, 100, 100, 1, 1, 11, 1, 1, 0, 1, 0, 1, 1, 0x9, 0, 0x05, 0, 0x14, 0x18, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, }, - { 270000, 0x5a, 0x5a, 1, 1, 0xf, 1, 1, 0, 1, 0, 1, 1, 0x9, 0, 0x05, 0, + { 27000000, 0x5a, 0x5a, 1, 1, 0xf, 1, 1, 0, 1, 0, 1, 1, 0x9, 0, 0x05, 0, 0x14, 0x18, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, }, - { 251750, 84, 84, 1, 1, 0xf, 1, 1, 1, 1, 1, 1, 1, 168, 1, 16, 4, 1, 1, + { 25175000, 84, 84, 1, 1, 0xf, 1, 1, 1, 1, 1, 1, 1, 168, 1, 16, 4, 1, 1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, }, }; @@ -894,10 +894,10 @@ static void rk_hdptx_phy_disable(struct rk_hdptx_phy *hdptx) regmap_write(hdptx->grf, GRF_HDPTX_CON0, val); } -static bool rk_hdptx_phy_clk_pll_calc(unsigned int data_rate, +static bool rk_hdptx_phy_clk_pll_calc(unsigned long rate, struct ropll_config *cfg) { - const unsigned int fout = data_rate / 2, fref = 24000; + const unsigned int fout = rate / 200, fref = 24000; unsigned long k = 0, lc, k_sub, lc_sub; unsigned int fvco, sdc; u32 mdiv, sdiv, n = 8; @@ -967,16 +967,16 @@ static bool rk_hdptx_phy_clk_pll_calc(unsigned int data_rate, } static int rk_hdptx_ropll_tmds_cmn_config(struct rk_hdptx_phy *hdptx, - unsigned int rate) + unsigned long rate) { const struct ropll_config *cfg = NULL; struct ropll_config rc = {0}; int i; - hdptx->rate = rate * 100; + hdptx->rate = rate; for (i = 0; i < ARRAY_SIZE(ropll_tmds_cfg); i++) - if (rate == ropll_tmds_cfg[i].bit_rate) { + if (rate == ropll_tmds_cfg[i].rate) { cfg = &ropll_tmds_cfg[i]; break; } @@ -990,8 +990,8 @@ static int rk_hdptx_ropll_tmds_cmn_config(struct rk_hdptx_phy *hdptx, } } - dev_dbg(hdptx->dev, "mdiv=%u, sdiv=%u, sdm_en=%u, k_sign=%u, k=%u, lc=%u\n", - cfg->pms_mdiv, cfg->pms_sdiv + 1, cfg->sdm_en, + dev_dbg(hdptx->dev, "%s rate=%lu mdiv=%u sdiv=%u sdm_en=%u k_sign=%u k=%u lc=%u\n", + __func__, rate, cfg->pms_mdiv, cfg->pms_sdiv + 1, cfg->sdm_en, cfg->sdm_num_sign, cfg->sdm_num, cfg->sdm_deno); rk_hdptx_pre_power_up(hdptx); @@ -1032,13 +1032,13 @@ static int rk_hdptx_ropll_tmds_cmn_config(struct rk_hdptx_phy *hdptx, } static int rk_hdptx_ropll_tmds_mode_config(struct rk_hdptx_phy *hdptx, - unsigned int rate) + unsigned long rate) { rk_hdptx_multi_reg_write(hdptx, rk_hdtpx_common_sb_init_seq); regmap_write(hdptx->regmap, LNTOP_REG(0200), 0x06); - if (rate > HDMI14_MAX_RATE / 100) { + if (rate > HDMI14_MAX_RATE) { /* For 1/40 bitrate clk */ rk_hdptx_multi_reg_write(hdptx, rk_hdtpx_tmds_lntop_highbr_seq); } else { @@ -1091,7 +1091,7 @@ static void rk_hdptx_dp_reset(struct rk_hdptx_phy *hdptx) } static int rk_hdptx_phy_consumer_get(struct rk_hdptx_phy *hdptx, - unsigned int rate) + unsigned long rate) { enum phy_mode mode = phy_get_mode(hdptx->phy); u32 status; @@ -1409,8 +1409,8 @@ static int rk_hdptx_dp_aux_init(struct rk_hdptx_phy *hdptx) static int rk_hdptx_phy_power_on(struct phy *phy) { struct rk_hdptx_phy *hdptx = phy_get_drvdata(phy); - int bus_width = phy_get_bus_width(hdptx->phy); enum phy_mode mode = phy_get_mode(phy); + unsigned long rate; int ret, lane; /* @@ -1418,10 +1418,10 @@ static int rk_hdptx_phy_power_on(struct phy *phy) * from the HDMI bridge driver until phy_configure_opts_hdmi * becomes available in the PHY API. */ - unsigned int rate = bus_width & 0xfffffff; + rate = phy_get_bus_width(hdptx->phy) & 0xfffffff; + rate *= 100; - dev_dbg(hdptx->dev, "%s bus_width=%x rate=%u\n", - __func__, bus_width, rate); + dev_dbg(hdptx->dev, "%s rate=%lu\n", __func__, rate); ret = rk_hdptx_phy_consumer_get(hdptx, rate); if (ret) @@ -1783,7 +1783,7 @@ static int rk_hdptx_phy_clk_prepare(struct clk_hw *hw) { struct rk_hdptx_phy *hdptx = to_rk_hdptx_phy(hw); - return rk_hdptx_phy_consumer_get(hdptx, hdptx->rate / 100); + return rk_hdptx_phy_consumer_get(hdptx, hdptx->rate); } static void rk_hdptx_phy_clk_unprepare(struct clk_hw *hw) @@ -1804,18 +1804,17 @@ static unsigned long rk_hdptx_phy_clk_recalc_rate(struct clk_hw *hw, static long rk_hdptx_phy_clk_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *parent_rate) { - u32 bit_rate = rate / 100; int i; if (rate > HDMI20_MAX_RATE) return rate; for (i = 0; i < ARRAY_SIZE(ropll_tmds_cfg); i++) - if (bit_rate == ropll_tmds_cfg[i].bit_rate) + if (rate == ropll_tmds_cfg[i].rate) break; if (i == ARRAY_SIZE(ropll_tmds_cfg) && - !rk_hdptx_phy_clk_pll_calc(bit_rate, NULL)) + !rk_hdptx_phy_clk_pll_calc(rate, NULL)) return -EINVAL; return rate; @@ -1826,7 +1825,7 @@ static int rk_hdptx_phy_clk_set_rate(struct clk_hw *hw, unsigned long rate, { struct rk_hdptx_phy *hdptx = to_rk_hdptx_phy(hw); - return rk_hdptx_ropll_tmds_cmn_config(hdptx, rate / 100); + return rk_hdptx_ropll_tmds_cmn_config(hdptx, rate); } static const struct clk_ops hdptx_phy_clk_ops = { From patchwork Sat Mar 8 12:21:17 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Ciocaltea X-Patchwork-Id: 14007499 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E4C04C282EC for ; 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Sat, 8 Mar 2025 13:21:39 +0100 (CET) From: Cristian Ciocaltea Date: Sat, 08 Mar 2025 14:21:17 +0200 Subject: [PATCH v5 08/12] phy: rockchip: samsung-hdptx: Setup TMDS char rate via phy_configure_opts_hdmi MIME-Version: 1.0 Message-Id: <20250308-phy-sam-hdptx-bpc-v5-8-35087287f9d1@collabora.com> References: <20250308-phy-sam-hdptx-bpc-v5-0-35087287f9d1@collabora.com> In-Reply-To: <20250308-phy-sam-hdptx-bpc-v5-0-35087287f9d1@collabora.com> To: Vinod Koul , Kishon Vijay Abraham I , Heiko Stuebner Cc: Algea Cao , Sandor Yu , Dmitry Baryshkov , Maxime Ripard , kernel@collabora.com, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org X-Mailer: b4 0.14.2 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250308_042141_599195_FA4EF6DD X-CRM114-Status: GOOD ( 17.10 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org The current workaround to setup the TMDS character rate relies on the unconventional usage of phy_set_bus_width(). Make use of the recently introduced HDMI PHY configuration API to properly handle the setup. The workaround will be dropped as soon as the switch has been completed on both ends. Rename rk_hdptx_phy_verify_config() to rk_hdptx_phy_verify_dp_config() and introduce the rk_hdptx_phy_verify_hdmi_config() helper to check the HDMI parameters during phy_configure(). Signed-off-by: Cristian Ciocaltea --- drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c | 64 +++++++++++++++++------ 1 file changed, 47 insertions(+), 17 deletions(-) diff --git a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c index e58a01bdb3ce82d66acdcb02c06de2816288b574..04c344394cbea89150bc4432cf26530fa9d71678 100644 --- a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c +++ b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c @@ -394,6 +394,7 @@ struct rk_hdptx_phy { int phy_id; struct phy *phy; + struct phy_configure_opts_hdmi hdmi_cfg; struct clk_bulk_data *clks; int nr_clks; struct reset_control_bulk_data rsts[RST_MAX]; @@ -1410,20 +1411,24 @@ static int rk_hdptx_phy_power_on(struct phy *phy) { struct rk_hdptx_phy *hdptx = phy_get_drvdata(phy); enum phy_mode mode = phy_get_mode(phy); - unsigned long rate; int ret, lane; - /* - * FIXME: Temporary workaround to pass pixel_clk_rate - * from the HDMI bridge driver until phy_configure_opts_hdmi - * becomes available in the PHY API. - */ - rate = phy_get_bus_width(hdptx->phy) & 0xfffffff; - rate *= 100; + if (mode != PHY_MODE_DP) { + if (!hdptx->hdmi_cfg.tmds_char_rate) { + /* + * FIXME: Temporary workaround to setup TMDS char rate + * from the RK DW HDMI QP bridge driver. + * Will be removed as soon the switch to the HDMI PHY + * configuration API has been completed on both ends. + */ + hdptx->hdmi_cfg.tmds_char_rate = phy_get_bus_width(hdptx->phy) & 0xfffffff; + hdptx->hdmi_cfg.tmds_char_rate *= 100; + } - dev_dbg(hdptx->dev, "%s rate=%lu\n", __func__, rate); + dev_dbg(hdptx->dev, "%s rate=%llu\n", __func__, hdptx->hdmi_cfg.tmds_char_rate); + } - ret = rk_hdptx_phy_consumer_get(hdptx, rate); + ret = rk_hdptx_phy_consumer_get(hdptx, hdptx->hdmi_cfg.tmds_char_rate); if (ret) return ret; @@ -1454,7 +1459,7 @@ static int rk_hdptx_phy_power_on(struct phy *phy) regmap_write(hdptx->grf, GRF_HDPTX_CON0, HDPTX_MODE_SEL << 16 | FIELD_PREP(HDPTX_MODE_SEL, 0x0)); - ret = rk_hdptx_ropll_tmds_mode_config(hdptx, rate); + ret = rk_hdptx_ropll_tmds_mode_config(hdptx, hdptx->hdmi_cfg.tmds_char_rate); if (ret) rk_hdptx_phy_consumer_put(hdptx, true); } @@ -1469,8 +1474,27 @@ static int rk_hdptx_phy_power_off(struct phy *phy) return rk_hdptx_phy_consumer_put(hdptx, false); } -static int rk_hdptx_phy_verify_config(struct rk_hdptx_phy *hdptx, - struct phy_configure_opts_dp *dp) +static int rk_hdptx_phy_verify_hdmi_config(struct rk_hdptx_phy *hdptx, + struct phy_configure_opts_hdmi *hdmi) +{ + int i; + + if (!hdmi->tmds_char_rate || hdmi->tmds_char_rate > HDMI20_MAX_RATE) + return -EINVAL; + + for (i = 0; i < ARRAY_SIZE(ropll_tmds_cfg); i++) + if (hdmi->tmds_char_rate == ropll_tmds_cfg[i].rate) + break; + + if (i == ARRAY_SIZE(ropll_tmds_cfg) && + !rk_hdptx_phy_clk_pll_calc(hdmi->tmds_char_rate, NULL)) + return -EINVAL; + + return 0; +} + +static int rk_hdptx_phy_verify_dp_config(struct rk_hdptx_phy *hdptx, + struct phy_configure_opts_dp *dp) { int i; @@ -1730,12 +1754,18 @@ static int rk_hdptx_phy_configure(struct phy *phy, union phy_configure_opts *opt enum phy_mode mode = phy_get_mode(phy); int ret; - if (mode != PHY_MODE_DP) - return 0; + if (mode != PHY_MODE_DP) { + ret = rk_hdptx_phy_verify_hdmi_config(hdptx, &opts->hdmi); + if (ret) + dev_err(hdptx->dev, "invalid hdmi params for phy configure\n"); + else + hdptx->hdmi_cfg = opts->hdmi; + return ret; + } - ret = rk_hdptx_phy_verify_config(hdptx, &opts->dp); + ret = rk_hdptx_phy_verify_dp_config(hdptx, &opts->dp); if (ret) { - dev_err(hdptx->dev, "invalid params for phy configure\n"); + dev_err(hdptx->dev, "invalid dp params for phy configure\n"); return ret; } From patchwork Sat Mar 8 12:21:18 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Ciocaltea X-Patchwork-Id: 14007500 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1DA98C28B25 for ; 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Sat, 8 Mar 2025 13:21:40 +0100 (CET) From: Cristian Ciocaltea Date: Sat, 08 Mar 2025 14:21:18 +0200 Subject: [PATCH v5 09/12] phy: rockchip: samsung-hdptx: Provide config params validation support MIME-Version: 1.0 Message-Id: <20250308-phy-sam-hdptx-bpc-v5-9-35087287f9d1@collabora.com> References: <20250308-phy-sam-hdptx-bpc-v5-0-35087287f9d1@collabora.com> In-Reply-To: <20250308-phy-sam-hdptx-bpc-v5-0-35087287f9d1@collabora.com> To: Vinod Koul , Kishon Vijay Abraham I , Heiko Stuebner Cc: Algea Cao , Sandor Yu , Dmitry Baryshkov , Maxime Ripard , kernel@collabora.com, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org X-Mailer: b4 0.14.2 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250308_042142_356609_DFF558A1 X-CRM114-Status: UNSURE ( 8.24 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org Implement the phy_ops.validate() callback to allow checking the PHY configuration parameters without actually applying them. Signed-off-by: Cristian Ciocaltea Reviewed-by: Dmitry Baryshkov --- drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c index 04c344394cbea89150bc4432cf26530fa9d71678..0e1391b4c8bdb9cd0facfc80999929700579d667 100644 --- a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c +++ b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c @@ -1797,10 +1797,22 @@ static int rk_hdptx_phy_configure(struct phy *phy, union phy_configure_opts *opt return 0; } +static int rk_hdptx_phy_validate(struct phy *phy, enum phy_mode mode, + int submode, union phy_configure_opts *opts) +{ + struct rk_hdptx_phy *hdptx = phy_get_drvdata(phy); + + if (mode != PHY_MODE_DP) + return rk_hdptx_phy_verify_hdmi_config(hdptx, &opts->hdmi); + + return rk_hdptx_phy_verify_dp_config(hdptx, &opts->dp); +} + static const struct phy_ops rk_hdptx_phy_ops = { .power_on = rk_hdptx_phy_power_on, .power_off = rk_hdptx_phy_power_off, .configure = rk_hdptx_phy_configure, + .validate = rk_hdptx_phy_validate, .owner = THIS_MODULE, }; From patchwork Sat Mar 8 12:21:19 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Ciocaltea X-Patchwork-Id: 14007501 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6ABABC28B25 for ; Sat, 8 Mar 2025 12:38:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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Sat, 8 Mar 2025 13:21:42 +0100 (CET) From: Cristian Ciocaltea Date: Sat, 08 Mar 2025 14:21:19 +0200 Subject: [PATCH v5 10/12] phy: rockchip: samsung-hdptx: Restrict altering TMDS char rate via CCF MIME-Version: 1.0 Message-Id: <20250308-phy-sam-hdptx-bpc-v5-10-35087287f9d1@collabora.com> References: <20250308-phy-sam-hdptx-bpc-v5-0-35087287f9d1@collabora.com> In-Reply-To: <20250308-phy-sam-hdptx-bpc-v5-0-35087287f9d1@collabora.com> To: Vinod Koul , Kishon Vijay Abraham I , Heiko Stuebner Cc: Algea Cao , Sandor Yu , Dmitry Baryshkov , Maxime Ripard , kernel@collabora.com, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org X-Mailer: b4 0.14.2 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250308_042144_118231_A619C6E8 X-CRM114-Status: GOOD ( 19.99 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org Although, in theory, the clock provider functionality could be enabled as a standalone driver feature, in practice it is unlikely that it would be ever needed separately from the common PHY related features, i.e. making use of the PHY PLL as an alternative and more accurate clock source for display modes handling. Which means the PLL will be always programmed according to the TMDS char rate set via the HDMI PHY configuration API. Currently it's possible to freely adjust the rate via the clock API as well, that is through clk_set_rate(). Making the clock read-only is not feasible since we need to ensure any rate update done via the PHY configuration API has been actually programmed into the hardware before CCF accesses it. This would be normally done during phy_ops.power_on() or clk_ops.prepare() callbacks, but it might happen that the former gets fired too late and the latter only once, hence we need to keep handle it via clk_ops.set_rate() as a fallback approach. Prevent changing the TMDS character rate via CCF by letting rk_hdptx_phy_clk_round_rate() always return the value set via phy_configure(). To avoid breaking existing users, i.e. RK DW HDMI QP bridge driver, until the switch to the HDMI PHY config based approach is completed, introduce a temporary exception to the rule, toggled via the new ->restrict_rate_change flag, which indicates whether phy_configure() has been called or not. Additionally, revert any unlikely rate change that might have occurred between the calls to ->round_rate() and ->set_rate(). Signed-off-by: Cristian Ciocaltea --- drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c | 52 +++++++++++++++++------ 1 file changed, 40 insertions(+), 12 deletions(-) diff --git a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c index 0e1391b4c8bdb9cd0facfc80999929700579d667..a62c634f5254e742088515c3b21c05f95acbaded 100644 --- a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c +++ b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c @@ -402,6 +402,7 @@ struct rk_hdptx_phy { /* clk provider */ struct clk_hw hw; unsigned long rate; + bool restrict_rate_change; atomic_t usage_count; @@ -1756,10 +1757,12 @@ static int rk_hdptx_phy_configure(struct phy *phy, union phy_configure_opts *opt if (mode != PHY_MODE_DP) { ret = rk_hdptx_phy_verify_hdmi_config(hdptx, &opts->hdmi); - if (ret) + if (ret) { dev_err(hdptx->dev, "invalid hdmi params for phy configure\n"); - else + } else { hdptx->hdmi_cfg = opts->hdmi; + hdptx->restrict_rate_change = true; + } return ret; } @@ -1846,20 +1849,31 @@ static unsigned long rk_hdptx_phy_clk_recalc_rate(struct clk_hw *hw, static long rk_hdptx_phy_clk_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *parent_rate) { - int i; + struct rk_hdptx_phy *hdptx = to_rk_hdptx_phy(hw); - if (rate > HDMI20_MAX_RATE) - return rate; + /* + * FIXME: Temporarily allow altering TMDS char rate via CCF. + * To be dropped as soon as the RK DW HDMI QP bridge driver + * switches to make use of phy_configure(). + */ + if (!hdptx->restrict_rate_change && rate != hdptx->hdmi_cfg.tmds_char_rate) { + struct phy_configure_opts_hdmi hdmi = { + .tmds_char_rate = rate, + }; + int ret = rk_hdptx_phy_verify_hdmi_config(hdptx, &hdmi); - for (i = 0; i < ARRAY_SIZE(ropll_tmds_cfg); i++) - if (rate == ropll_tmds_cfg[i].rate) - break; + if (ret) + return ret; - if (i == ARRAY_SIZE(ropll_tmds_cfg) && - !rk_hdptx_phy_clk_pll_calc(rate, NULL)) - return -EINVAL; + hdptx->hdmi_cfg = hdmi; + } - return rate; + /* + * The TMDS char rate shall be adjusted via phy_configure() only, + * hence ensure rk_hdptx_phy_clk_set_rate() won't be invoked with + * a different rate argument. + */ + return hdptx->hdmi_cfg.tmds_char_rate; } static int rk_hdptx_phy_clk_set_rate(struct clk_hw *hw, unsigned long rate, @@ -1867,6 +1881,20 @@ static int rk_hdptx_phy_clk_set_rate(struct clk_hw *hw, unsigned long rate, { struct rk_hdptx_phy *hdptx = to_rk_hdptx_phy(hw); + /* Revert any unlikely TMDS char rate change since round_rate() */ + if (hdptx->hdmi_cfg.tmds_char_rate != rate) { + dev_warn(hdptx->dev, "Reverting unexpected rate change from %lu to %llu\n", + rate, hdptx->hdmi_cfg.tmds_char_rate); + hdptx->hdmi_cfg.tmds_char_rate = rate; + } + + /* + * The TMDS char rate would be normally programmed in HW during + * phy_ops.power_on() or clk_ops.prepare() callbacks, but it might + * happen that the former gets fired too late, i.e. after this call, + * while the latter being executed only once, i.e. when clock remains + * in the prepared state during rate changes. + */ return rk_hdptx_ropll_tmds_cmn_config(hdptx, rate); } From patchwork Sat Mar 8 12:21:20 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Ciocaltea X-Patchwork-Id: 14007502 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B3A82C28B25 for ; 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Sat, 8 Mar 2025 13:21:43 +0100 (CET) From: Cristian Ciocaltea Date: Sat, 08 Mar 2025 14:21:20 +0200 Subject: [PATCH v5 11/12] phy: rockchip: samsung-hdptx: Optimize internal rate handling MIME-Version: 1.0 Message-Id: <20250308-phy-sam-hdptx-bpc-v5-11-35087287f9d1@collabora.com> References: <20250308-phy-sam-hdptx-bpc-v5-0-35087287f9d1@collabora.com> In-Reply-To: <20250308-phy-sam-hdptx-bpc-v5-0-35087287f9d1@collabora.com> To: Vinod Koul , Kishon Vijay Abraham I , Heiko Stuebner Cc: Algea Cao , Sandor Yu , Dmitry Baryshkov , Maxime Ripard , kernel@collabora.com, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org X-Mailer: b4 0.14.2 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250308_042145_328344_D0BE5E57 X-CRM114-Status: GOOD ( 16.66 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org Drop the rate parameter from a bunch of internal helpers and, instead, make better use of the newly introduced ->hdmi_cfg.tmds_char_rate driver data. Additionally, rename the rather ambiguous ->rate member of struct rk_hdptx_phy to ->hw_rate and ensure rk_hdptx_ropll_tmds_cmn_config() updates it only after all the other operations have been successful. Signed-off-by: Cristian Ciocaltea --- drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c | 59 ++++++++++++----------- 1 file changed, 30 insertions(+), 29 deletions(-) diff --git a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c index a62c634f5254e742088515c3b21c05f95acbaded..98f831c3704f5cd65dcf29a4f0a12862a4aa0482 100644 --- a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c +++ b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c @@ -401,7 +401,7 @@ struct rk_hdptx_phy { /* clk provider */ struct clk_hw hw; - unsigned long rate; + unsigned long hw_rate; bool restrict_rate_change; atomic_t usage_count; @@ -968,33 +968,34 @@ static bool rk_hdptx_phy_clk_pll_calc(unsigned long rate, return true; } -static int rk_hdptx_ropll_tmds_cmn_config(struct rk_hdptx_phy *hdptx, - unsigned long rate) +static int rk_hdptx_ropll_tmds_cmn_config(struct rk_hdptx_phy *hdptx) { const struct ropll_config *cfg = NULL; struct ropll_config rc = {0}; - int i; + int ret, i; - hdptx->rate = rate; + if (!hdptx->hdmi_cfg.tmds_char_rate) + return 0; for (i = 0; i < ARRAY_SIZE(ropll_tmds_cfg); i++) - if (rate == ropll_tmds_cfg[i].rate) { + if (hdptx->hdmi_cfg.tmds_char_rate == ropll_tmds_cfg[i].rate) { cfg = &ropll_tmds_cfg[i]; break; } if (!cfg) { - if (rk_hdptx_phy_clk_pll_calc(rate, &rc)) { - cfg = &rc; - } else { - dev_err(hdptx->dev, "%s cannot find pll cfg\n", __func__); + if (!rk_hdptx_phy_clk_pll_calc(hdptx->hdmi_cfg.tmds_char_rate, &rc)) { + dev_err(hdptx->dev, "%s cannot find pll cfg for rate=%llu\n", + __func__, hdptx->hdmi_cfg.tmds_char_rate); return -EINVAL; } + + cfg = &rc; } - dev_dbg(hdptx->dev, "%s rate=%lu mdiv=%u sdiv=%u sdm_en=%u k_sign=%u k=%u lc=%u\n", - __func__, rate, cfg->pms_mdiv, cfg->pms_sdiv + 1, cfg->sdm_en, - cfg->sdm_num_sign, cfg->sdm_num, cfg->sdm_deno); + dev_dbg(hdptx->dev, "%s rate=%llu mdiv=%u sdiv=%u sdm_en=%u k_sign=%u k=%u lc=%u\n", + __func__, hdptx->hdmi_cfg.tmds_char_rate, cfg->pms_mdiv, cfg->pms_sdiv + 1, + cfg->sdm_en, cfg->sdm_num_sign, cfg->sdm_num, cfg->sdm_deno); rk_hdptx_pre_power_up(hdptx); @@ -1030,17 +1031,20 @@ static int rk_hdptx_ropll_tmds_cmn_config(struct rk_hdptx_phy *hdptx, regmap_update_bits(hdptx->regmap, CMN_REG(0086), PLL_PCG_CLK_EN_MASK, FIELD_PREP(PLL_PCG_CLK_EN_MASK, 0x1)); - return rk_hdptx_post_enable_pll(hdptx); + ret = rk_hdptx_post_enable_pll(hdptx); + if (!ret) + hdptx->hw_rate = hdptx->hdmi_cfg.tmds_char_rate; + + return ret; } -static int rk_hdptx_ropll_tmds_mode_config(struct rk_hdptx_phy *hdptx, - unsigned long rate) +static int rk_hdptx_ropll_tmds_mode_config(struct rk_hdptx_phy *hdptx) { rk_hdptx_multi_reg_write(hdptx, rk_hdtpx_common_sb_init_seq); regmap_write(hdptx->regmap, LNTOP_REG(0200), 0x06); - if (rate > HDMI14_MAX_RATE) { + if (hdptx->hdmi_cfg.tmds_char_rate > HDMI14_MAX_RATE) { /* For 1/40 bitrate clk */ rk_hdptx_multi_reg_write(hdptx, rk_hdtpx_tmds_lntop_highbr_seq); } else { @@ -1092,8 +1096,7 @@ static void rk_hdptx_dp_reset(struct rk_hdptx_phy *hdptx) HDPTX_I_BGR_EN << 16 | FIELD_PREP(HDPTX_I_BGR_EN, 0x0)); } -static int rk_hdptx_phy_consumer_get(struct rk_hdptx_phy *hdptx, - unsigned long rate) +static int rk_hdptx_phy_consumer_get(struct rk_hdptx_phy *hdptx) { enum phy_mode mode = phy_get_mode(hdptx->phy); u32 status; @@ -1112,11 +1115,9 @@ static int rk_hdptx_phy_consumer_get(struct rk_hdptx_phy *hdptx, if (mode == PHY_MODE_DP) { rk_hdptx_dp_reset(hdptx); } else { - if (rate) { - ret = rk_hdptx_ropll_tmds_cmn_config(hdptx, rate); - if (ret) - goto dec_usage; - } + ret = rk_hdptx_ropll_tmds_cmn_config(hdptx); + if (ret) + goto dec_usage; } return 0; @@ -1429,7 +1430,7 @@ static int rk_hdptx_phy_power_on(struct phy *phy) dev_dbg(hdptx->dev, "%s rate=%llu\n", __func__, hdptx->hdmi_cfg.tmds_char_rate); } - ret = rk_hdptx_phy_consumer_get(hdptx, hdptx->hdmi_cfg.tmds_char_rate); + ret = rk_hdptx_phy_consumer_get(hdptx); if (ret) return ret; @@ -1460,7 +1461,7 @@ static int rk_hdptx_phy_power_on(struct phy *phy) regmap_write(hdptx->grf, GRF_HDPTX_CON0, HDPTX_MODE_SEL << 16 | FIELD_PREP(HDPTX_MODE_SEL, 0x0)); - ret = rk_hdptx_ropll_tmds_mode_config(hdptx, hdptx->hdmi_cfg.tmds_char_rate); + ret = rk_hdptx_ropll_tmds_mode_config(hdptx); if (ret) rk_hdptx_phy_consumer_put(hdptx, true); } @@ -1828,7 +1829,7 @@ static int rk_hdptx_phy_clk_prepare(struct clk_hw *hw) { struct rk_hdptx_phy *hdptx = to_rk_hdptx_phy(hw); - return rk_hdptx_phy_consumer_get(hdptx, hdptx->rate); + return rk_hdptx_phy_consumer_get(hdptx); } static void rk_hdptx_phy_clk_unprepare(struct clk_hw *hw) @@ -1843,7 +1844,7 @@ static unsigned long rk_hdptx_phy_clk_recalc_rate(struct clk_hw *hw, { struct rk_hdptx_phy *hdptx = to_rk_hdptx_phy(hw); - return hdptx->rate; + return hdptx->hw_rate; } static long rk_hdptx_phy_clk_round_rate(struct clk_hw *hw, unsigned long rate, @@ -1895,7 +1896,7 @@ static int rk_hdptx_phy_clk_set_rate(struct clk_hw *hw, unsigned long rate, * while the latter being executed only once, i.e. when clock remains * in the prepared state during rate changes. */ - return rk_hdptx_ropll_tmds_cmn_config(hdptx, rate); + return rk_hdptx_ropll_tmds_cmn_config(hdptx); } static const struct clk_ops hdptx_phy_clk_ops = { From patchwork Sat Mar 8 12:21:21 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Ciocaltea X-Patchwork-Id: 14007510 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0B202C282EC for ; Sat, 8 Mar 2025 12:41:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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Sat, 8 Mar 2025 13:21:44 +0100 (CET) From: Cristian Ciocaltea Date: Sat, 08 Mar 2025 14:21:21 +0200 Subject: [PATCH v5 12/12] phy: rockchip: samsung-hdptx: Add high color depth management MIME-Version: 1.0 Message-Id: <20250308-phy-sam-hdptx-bpc-v5-12-35087287f9d1@collabora.com> References: <20250308-phy-sam-hdptx-bpc-v5-0-35087287f9d1@collabora.com> In-Reply-To: <20250308-phy-sam-hdptx-bpc-v5-0-35087287f9d1@collabora.com> To: Vinod Koul , Kishon Vijay Abraham I , Heiko Stuebner Cc: Algea Cao , Sandor Yu , Dmitry Baryshkov , Maxime Ripard , kernel@collabora.com, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org X-Mailer: b4 0.14.2 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250308_042145_819433_8ACF1409 X-CRM114-Status: UNSURE ( 9.41 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org Add support for 8-bit, 10-bit, 12-bit and 16-bit color depth setup. Signed-off-by: Cristian Ciocaltea Reviewed-by: Dmitry Baryshkov --- drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c | 23 ++++++++++++++++++++++- 1 file changed, 22 insertions(+), 1 deletion(-) diff --git a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c index 98f831c3704f5cd65dcf29a4f0a12862a4aa0482..d115a026f013fdbcd025626bccaa30639856fad7 100644 --- a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c +++ b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c @@ -1028,6 +1028,9 @@ static int rk_hdptx_ropll_tmds_cmn_config(struct rk_hdptx_phy *hdptx) regmap_update_bits(hdptx->regmap, CMN_REG(0086), PLL_PCG_POSTDIV_SEL_MASK, FIELD_PREP(PLL_PCG_POSTDIV_SEL_MASK, cfg->pms_sdiv)); + regmap_update_bits(hdptx->regmap, CMN_REG(0086), PLL_PCG_CLK_SEL_MASK, + FIELD_PREP(PLL_PCG_CLK_SEL_MASK, (hdptx->hdmi_cfg.bpc - 8) >> 1)); + regmap_update_bits(hdptx->regmap, CMN_REG(0086), PLL_PCG_CLK_EN_MASK, FIELD_PREP(PLL_PCG_CLK_EN_MASK, 0x1)); @@ -1427,7 +1430,8 @@ static int rk_hdptx_phy_power_on(struct phy *phy) hdptx->hdmi_cfg.tmds_char_rate *= 100; } - dev_dbg(hdptx->dev, "%s rate=%llu\n", __func__, hdptx->hdmi_cfg.tmds_char_rate); + dev_dbg(hdptx->dev, "%s rate=%llu bpc=%u\n", __func__, + hdptx->hdmi_cfg.tmds_char_rate, hdptx->hdmi_cfg.bpc); } ret = rk_hdptx_phy_consumer_get(hdptx); @@ -1492,6 +1496,19 @@ static int rk_hdptx_phy_verify_hdmi_config(struct rk_hdptx_phy *hdptx, !rk_hdptx_phy_clk_pll_calc(hdmi->tmds_char_rate, NULL)) return -EINVAL; + if (!hdmi->bpc) + hdmi->bpc = 8; + + switch (hdmi->bpc) { + case 8: + case 10: + case 12: + case 16: + break; + default: + return -EINVAL; + }; + return 0; } @@ -1764,6 +1781,9 @@ static int rk_hdptx_phy_configure(struct phy *phy, union phy_configure_opts *opt hdptx->hdmi_cfg = opts->hdmi; hdptx->restrict_rate_change = true; } + + dev_dbg(hdptx->dev, "%s rate=%llu bpc=%u\n", __func__, + hdptx->hdmi_cfg.tmds_char_rate, hdptx->hdmi_cfg.bpc); return ret; } @@ -1972,6 +1992,7 @@ static int rk_hdptx_phy_probe(struct platform_device *pdev) return -ENOMEM; hdptx->dev = dev; + hdptx->hdmi_cfg.bpc = 8; regs = devm_platform_get_and_ioremap_resource(pdev, 0, &res); if (IS_ERR(regs))